rockchip: rock5b-rk3588: Add support for ROCK 5B+

Include FDTs for both ROCK 5B and 5B+ in the FIT and add board selection
code to load the 5B+ FDT when the DRAM type is LPDDR5 and ADC channel 5
value is close to 4095.

  U-Boot 2025.07 (Jul 14 2025 - 21:28:20 +0000)

  Model: Radxa ROCK 5B+
  SoC:   RK3588
  DRAM:  8 GiB

Features tested on a ROCK 5B+ v1.2:
- SD-card boot
- eMMC boot
- SPI flash boot
- PCIe/NVMe
- Ethernet
- USB/TCPM

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

arch/arm/dts/rk3588-rock-5b-plus-u-boot.dtsi

@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3588-rock-5b-u-boot.dtsi"

arch/arm/dts/rk3588-rock-5b-u-boot.dtsi

@@ -46,6 +46,11 @@
 	};
 };
 
+&saradc {
+	bootph-pre-ram;
+	vdd-microvolts = <1800000>;
+};
+
 &sdhci {
 	cap-mmc-highspeed;
 	mmc-hs200-1_8v;

board/radxa/rock5b-rk3588/Kconfig

@@ -9,4 +9,9 @@ config SYS_VENDOR
 config SYS_CONFIG_NAME
 	default "rock5b-rk3588"
 
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select ADC
+	select SPL_ADC
+
 endif

board/radxa/rock5b-rk3588/MAINTAINERS

@@ -5,5 +5,4 @@ S:	Maintained
 F:	board/radxa/rock5b-rk3588
 F:	include/configs/rock5b-rk3588.h
 F:	configs/rock5b-rk3588_defconfig
-F:	arch/arm/dts/rk3588-rock-5b.dts
-F:	arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+F:	arch/arm/dts/rk3588-rock-5b*

board/radxa/rock5b-rk3588/rock5b-rk3588.c

@@ -3,8 +3,71 @@
  * Copyright (c) 2023-2024 Collabora Ltd.
  */
 
+#include <adc.h>
+#include <env.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
+#include <asm/arch-rockchip/sdram.h>
+#include <linux/errno.h>
+
+#define PMU1GRF_BASE		0xfd58a000
+#define OS_REG2_REG		0x208
+
+#define HW_ID_CHANNEL		5
+
+struct board_model {
+	unsigned int dram;
+	unsigned int low;
+	unsigned int high;
+	const char *fdtfile;
+};
+
+static const struct board_model board_models[] = {
+	{ LPDDR5, 4005, 4185, "rockchip/rk3588-rock-5b-plus.dtb" },
+};
+
+static const struct board_model *get_board_model(void)
+{
+	unsigned int val, dram_type;
+	int i, ret;
+
+	dram_type = rockchip_sdram_type(PMU1GRF_BASE + OS_REG2_REG);
+
+	ret = adc_channel_single_shot("adc@fec10000", HW_ID_CHANNEL, &val);
+	if (ret)
+		return NULL;
+
+	for (i = 0; i < ARRAY_SIZE(board_models); i++) {
+		unsigned int dram = board_models[i].dram;
+		unsigned int min = board_models[i].low;
+		unsigned int max = board_models[i].high;
+
+		if (dram == dram_type && min <= val && val <= max)
+			return &board_models[i];
+	}
+
+	return NULL;
+}
+
+int rk_board_late_init(void)
+{
+	const struct board_model *model = get_board_model();
+
+	if (model)
+		env_set("fdtfile", model->fdtfile);
+
+	return 0;
+}
+
+int board_fit_config_name_match(const char *name)
+{
+	const struct board_model *model = get_board_model();
+
+	if (model && !strcmp(name, model->fdtfile))
+		return 0;
+
+	return -EINVAL;
+}
 
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, struct bd_info *bd)

configs/rock5b-rk3588_defconfig

@@ -47,6 +47,7 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_DOS_PARTITION is not set
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
+CONFIG_OF_LIST="rockchip/rk3588-rock-5b rockchip/rk3588-rock-5b-plus"
 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_REGMAP=y

doc/board/rockchip/rockchip.rst

@@ -162,7 +162,7 @@ List of mainline supported Rockchip boards:
      - Pine64 QuartzPro64 (quartzpro64-rk3588)
      - Radxa ROCK 5 ITX (rock-5-itx-rk3588)
      - Radxa ROCK 5A (rock5a-rk3588s)
-     - Radxa ROCK 5B (rock5b-rk3588)
+     - Radxa ROCK 5B/5B+ (rock5b-rk3588)
      - Radxa ROCK 5C (rock-5c-rk3588s)
      - Rockchip Toybrick TB-RK3588X (toybrick-rk3588)
      - Theobroma Systems RK3588-SBC Jaguar (jaguar-rk3588)