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arm64: dts: rockchip: move reset to dedicated eth-phy node on ringneck

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Using snps,reset-* properties to handle the ethernet-phy resets is
deprecated and instead a real phy node should be used.

Move the Ringneck phy-reset properties to such a node

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250514150745.2437804-3-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: e463625af7f92c4a9f097f7fb87f6baaad6e762a ]

(cherry picked from commit 76d0d8e00c9ac845ca8d6cbe191cf015ca3a8c16)

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
This commit is contained in:
Heiko Stuebner
2025-06-11 10:59:32 +02:00
committed by Tom Rini
parent b279bd7282
commit 8279df493c
1 changed files with 19 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
dts/upstream/src/arm64/rockchip/px30-ringneck.dtsi
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@@ -83,9 +83,7 @@
/* On-module TI DP83825I PHY but no connector, enable in carrierboard */
&gmac {
snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 50000 50000>;
phy-handle = <&dp83825>;
phy-supply = <&vcc_3v3>;
clock_in_out = "output";
};
@@ -348,6 +346,18 @@
status = "okay";
};
&mdio {
dp83825: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
pinctrl-names = "default";
pinctrl-0 = <&phy_rst>;
reset-assert-us = <50000>;
reset-deassert-us = <50000>;
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
};
};
&pinctrl {
emmc {
emmc_reset: emmc-reset {
@@ -355,6 +365,12 @@
};
};
ethernet {
phy_rst: phy-rst {
rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
module_led_pin: module-led-pin {
rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;