michael/u-boot
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

nxp: Prepare macros for KVM changes

Browse Source 
A following patch is replacing our IO accessors with
do { ... } while(0) ones in order to make them usable with KVM.

That leads to an error eventually looking like this:
arch/arm/include/asm/io.h:62:9: error: expected expression before 'do'
   62 |         do {                                            \
      |         ^~
arch/arm/include/asm/io.h:211:41: note: in expansion of macro '__raw_writel'
  211 | #define out_arch(type,endian,a,v)       __raw_write##type(cpu_to_##endian(v),a)
      |                                         ^~~~~~~~~~~
arch/arm/include/asm/io.h:223:25: note: in expansion of macro 'out_arch'
  223 | #define out_be32(a,v)   out_arch(l,be32,a,v)
      |                         ^~~~~~~~
drivers/spi/fsl_dspi.c:127:17: note: in expansion of macro 'out_be32'
  127 |                 out_be32(addr, val) : out_le32(addr, val);
      |                 ^~~~~~~~

So adjust the current macros and code to be compatible with the upcoming
change.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Ilias Apalodimas
2025-06-18 09:58:12 +03:00
committed by Tom Rini
parent b1d017afda
commit b56c0632ad
2 changed files with 16 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/spi/fsl_dspi.c
View File

@@ -123,8 +123,10 @@ static uint dspi_read32(uint flags, uint *addr)
static void dspi_write32(uint flags, uint *addr, uint val)
{
flags & DSPI_FLAG_REGMAP_ENDIAN_BIG ?
out_be32(addr, val) : out_le32(addr, val);
if (flags & DSPI_FLAG_REGMAP_ENDIAN_BIG)
out_be32(addr, val);
else
out_le32(addr, val);
}
static void dspi_halt(struct fsl_dspi_priv *priv, u8 halt)

24
include/fsl_ifc.h
View File

@@ -803,29 +803,29 @@ void init_final_memctl_regs(void);
((struct fsl_ifc_fcm *)CFG_SYS_IFC_ADDR)
#define get_ifc_cspr_ext(i) \
(ifc_in32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr_ext))
ifc_in32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr_ext)
#define get_ifc_cspr(i) \
(ifc_in32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr))
ifc_in32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr)
#define get_ifc_csor_ext(i) \
(ifc_in32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor_ext))
ifc_in32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor_ext)
#define get_ifc_csor(i) \
(ifc_in32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor))
ifc_in32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor)
#define get_ifc_amask(i) \
(ifc_in32(&(IFC_FCM_BASE_ADDR)->amask_cs[i].amask))
ifc_in32(&(IFC_FCM_BASE_ADDR)->amask_cs[i].amask)
#define get_ifc_ftim(i, j) \
(ifc_in32(&(IFC_FCM_BASE_ADDR)->ftim_cs[i].ftim[j]))
ifc_in32(&(IFC_FCM_BASE_ADDR)->ftim_cs[i].ftim[j])
#define set_ifc_cspr_ext(i, v) \
(ifc_out32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr_ext, v))
ifc_out32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr_ext, v)
#define set_ifc_cspr(i, v) \
(ifc_out32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr, v))
ifc_out32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr, v)
#define set_ifc_csor_ext(i, v) \
(ifc_out32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor_ext, v))
ifc_out32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor_ext, v)
#define set_ifc_csor(i, v) \
(ifc_out32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor, v))
ifc_out32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor, v)
#define set_ifc_amask(i, v) \
(ifc_out32(&(IFC_FCM_BASE_ADDR)->amask_cs[i].amask, v))
ifc_out32(&(IFC_FCM_BASE_ADDR)->amask_cs[i].amask, v)
#define set_ifc_ftim(i, j, v) \
(ifc_out32(&(IFC_FCM_BASE_ADDR)->ftim_cs[i].ftim[j], v))
ifc_out32(&(IFC_FCM_BASE_ADDR)->ftim_cs[i].ftim[j], v)
enum ifc_chip_sel {
IFC_CS0,