riscv: Update linker scripts to ensure appended device tree is aligned

With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end (for U-Boot) or _image_binary_end
  (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final
  section before the symbol.
- Remove a now-spurious  '. = ALIGN(x);' statement that was intended to
  provide the above alignments.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>

arch/riscv/cpu/u-boot-spl.lds

@@ -43,6 +43,7 @@ SECTIONS
 		__binman_sym_start = .;
 		KEEP(*(SORT(.binman_sym*)));
 		__binman_sym_end = .;
+		. = ALIGN(8);
 	} > .spl_mem
 
 	_end = .;
@@ -56,3 +57,6 @@ SECTIONS
 		__bss_end = .;
 	} > .bss_mem
 }
+
+ASSERT(_image_binary_end % 8 == 0, \
+       "_image_binary_end must be 8-byte aligned for device tree");

arch/riscv/cpu/u-boot.lds

@@ -73,10 +73,9 @@ SECTIONS
 		__dyn_sym_start = .;
 		*(.dynsym)
 		__dyn_sym_end = .;
+		. = ALIGN(8);
 	}
 
-	. = ALIGN(8);
-
 	_end = .;
 
 	.bss : {
@@ -86,3 +85,5 @@ SECTIONS
 		__bss_end = .;
 	}
 }
+
+ASSERT(_end % 8 == 0, "_end must be 8-byte aligned for device tree");