62 Commits

Author SHA1 Message Date
Daniel Schultz
7bcf016090 board: phytec: phytec_som_detection: Add support for phyFLEX
phyFLEX are SoMs based on the FPSC standard.

Add additional "SOM types" for the phyFLEX modules base on the
FPSC Gamma specification. These modules come in four different
variants; prototypes (PT), standard product (SP), KSP (KP) and
KSM (KM).

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Tested-by: Dominik Haller <d.haller@phytec.de>
2025-12-07 08:07:07 -06:00
Daniel Schultz
9ce3d264e3 board: phytec: phytec_som_detection: Add missing assignment
Assign the return value of snprintf (total length) to a variable to
properly check if the string has the correct length.

Currently, this variable is always zero and the length check after
snprintf will always fail.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2025-12-07 08:07:07 -06:00
Tom Rini
aff68c8514 Merge tag 'u-boot-socfpga-next-20250930' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next
SoCFPGA updates for v2025.10:

CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27762

This pull request brings a set of updates across SoCFPGA platforms
covering Agilex5, Agilex7, N5X, and Stratix10. The changes include:

* Agilex5 enhancements:
  - USB3.1 enablement and DWC3 host driver support
  - System Manager register configuration for USB3
  - Watchdog timeout increase and SDMMC clock API integration
  - dcache handling improvements in SMC mailbox path
  - Enable SPL_SYS_DCACHE_OFF in defconfig

* Clock driver improvements:
  - Introduce dt-bindings header for Agilex clocks
  - Add enable/disable API and EMAC clock selection fixes
  - Replace manual shifts with FIELD_GET usage

* DDR updates:
  - IOSSM mailbox compatibility check
  - Correct DDR calibration status handling

* Device tree changes:
  - Agilex5: disable cache allocation for reads
  - Stratix10: add NAND IP node
  - Enable driver model watchdog
  - Enable USB3.1 node for Agilex5

* Config cleanups:
  - Simplify Agilex7 VAB defconfig
  - Remove obsolete SYS_BOOTM_LEN from N5X VAB config
  - Enable CRC32 support for SoCFPGA
  - Increase USB hub debounce timeout

Overall this set improves reliability of DDR and cache flows,
adds missing USB and MMC features for Agilex5, and refines clock
and configuration handling across platforms.

This patch set has been tested on Agilex 5 devkit, and Agilex devkit.
2025-09-30 16:11:23 -06:00
Wadim Egorov
96971e5090 board: phytec: common: Fix missing newline in error message
The error message in phytec_get_product_name() was missing a newline,
causing log output to be concatenated with subsequent messages. Add
the newline to improve readability.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-09-24 07:50:13 -06:00
Tom Rini
b4ae292606 Merge patch series "Update SoM detection related code and configs"
Wadim Egorov <w.egorov@phytec.de> says:

Update Kconfig options for phyCORE-AM62Ax to align with other boards and
prepare common board code for the upcoming phyCORE-AM62L which has the
SoM EEPROM connected on a different bus.

Link: https://lore.kernel.org/r/20250815111051.2277173-1-w.egorov@phytec.de
2025-08-26 14:37:02 -06:00
Wadim Egorov
9cf4f522fc board: phytec: phycore-am62a: Update SoM detection Kconfig options
Drop SUPPORT_EXTENSION_SCAN and enable PHYTEC_SOM_DETECTION_BLOCKS
to align with other PHYTEC platforms. These options were missed when
phyCORE-AM62Ax support was added.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-08-26 12:49:21 -06:00
Dominik Haller
437f663e6c board: phytec: common: k3: Use CONFIG_PHYTEC_EEPROM_BUS
Use CONFIG_PHYTEC_EEPROM_BUS instead of the hard coded value for the i2c bus.

Signed-off-by: Dominik Haller <d.haller@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-08-26 12:49:20 -06:00
Dominik Haller
88a1816a9b board: phytec: common: Add PHYTEC_EEPROM_BUS to Kconfig
Add the option to choose a different bus number than 0 for the i2c eeprom
based som detection.

Signed-off-by: Dominik Haller <d.haller@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-08-26 12:49:20 -06:00
John Ma
29ce50acbb board: phytec: common: k3: Making setup_mac_from_eeprom optional
Making the setup_mac_from_eeprom optional for boards without
CONFIG_PHYTEC_SOM_DETECTION_BLOCKS.

Signed-off-by: John Ma <jma@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2025-08-21 10:02:49 -06:00
Ilias Apalodimas
5f520875bd kbuild: Bump the build system to 5.1
Our last sync with the kernel was 5.1. Even that was a partial one
as some patches from 4.x kernels were already missing making the
transition to a modern kbuild infeasible.

We are so out of sync now, that tracking the patches and backporting
them one by one makes little sense and it's going to take ages.

This is an attempt to sync up Makefile[.lib/.kbuild].
Unfortunately due to sheer amount of patches this is not easy to review,
but that's what we decided during a community call.

One of the biggest changes is get rid of partial linking entirely and
build .a archives isntead of .o.
We diaviate from the kernel on that. Instead of calling a custom script
to create the archive symbol table, we call ar with rcTP (isntead of
rcSTP) since we want a resulting archive that's sauble with the linker.

The only affected platforms are PPC ones. Unfortunately I don't have any
of them around to test, but the objdump of the resulting files --
arch/powerpc/lib/built-in.[oa] looks identical.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-07-08 13:10:03 -06:00
Marek Vasut
0f44d5549e env: Rename SYS_MMC_ENV_DEV to ENV_MMC_DEVICE_INDEX
Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.

Use ENV_MMC_DEVICE_INDEX to clarify this is the SD/MMC device
index, a number, as enumerated by U-Boot. Update the help text
accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-06-20 12:15:08 -06:00
Tom Rini
62905f4a92 Merge patch series "Remove <env.h> from <net.h>"
Tom Rini <trini@konsulko.com> says:

Hey all,

This is a v3 of Simon's series[1] and depends on the series[2] I posted
the other day that removes <env.h> from <command.h>. With this series
done, I believe we've tackled all of the current cases of headers which
include <env.h> without directly needing it. Much of this series is in
fact Simon's v2 with the main differneces being:
- Removing <env.h> from <net.h> at the end
- Removing env_to_ip() given how little it's used rather than shuffling
  around where it's declared and un-inline'ing it. For a rarely used
  helper, this ends up being cleaner I think. Especially looking at some
  of the users (which called env_get repeatedly). If there's strong
  opinion here about using the other method[3] we can do that instead.
- Setting aside for now how to handle CMD_ELF=y and NO_NET=y because
  today it's actually fine as we unconditionally build lib/net_utils.c
  where string_to_ip() is defined. I'm unsure if a further series is
  warranted here or not. We rely on link-time optimization to keep code
  readable too.

[1]: https://lore.kernel.org/all/20250501010456.3930701-1-sjg@chromium.org
[2]: https://lore.kernel.org/all/20250514225002.15361-1-trini@konsulko.com
[3]: https://lore.kernel.org/all/20250501010456.3930701-23-sjg@chromium.org
Link: https://lore.kernel.org/r/20250515234154.1859366-1-trini@konsulko.com
2025-05-29 08:31:07 -06:00
Simon Glass
b413511611 phytec: Include env.h to permit reading the environment
This file reads from the environment but does not include the correct
header. Update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-05-29 08:30:25 -06:00
Wadim Egorov
cd48860fec board: phytec: common: k3: Factor out mac address setup
Factor out the mac address setup into setup_mac_from_eeprom().

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-05-22 13:51:56 -06:00
Wadim Egorov
5900a2db4b board: phytec: common: k3: Update boot_targets at runtime
Factor out boot device detection from board_late_init() into a new
boot_targets_setup() helper.

Adjust the boot_targets environment variable to favor the device we
just booted from. If boot_targets is still at its default value,
prepend the current boot device to the list; otherwise leave any
user-customized order untouched.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-05-22 13:51:56 -06:00
Primoz Fiser
4c0d377858 board: phytec: common: Fix phytec_get_product_name()
Currently, phytec_get_product_name() function only takes care of PCM
SoM type, however in case of PCL, KSM or KSP SoM type it will return
error:

  phytec_get_product_name: Invalid SOM type

Add support for other SoM types as defined in phytec_som_type_str enum
(see phytec_som_detection.h) to get rid of the error.

While at it, also simplify switch case statements by grouping them
together. This makes it more concise and readable.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
2025-04-15 11:55:17 -06:00
Jonathan Humphreys
6f7fb8d29f board: remove capsule update support in set_dfu_alt_info()
Now that capsule update sets the dfu_alt_info environment variable
explicitly, there is no need to support it in the set_dfu_alt_info()
function. Decouple SET_DFU_ALT_INFO from EFI_CAPSULE_FIRMWARE_FIT and
EFI_CAPSULE_FIRMWARE_RAW. For many boards, this was the only use of
set_dfu_alt_info() so remove the function entirely.

Fixes: a9e6f01a94 ("efi: Define set_dfu_alt_info() for boards with UEFI capsule update enabled")

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> # for board/libre-computer/*
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de> # for
2025-04-11 13:20:37 +02:00
Daniel Schultz
1afc1a7401 board: phytec: common: Add phyCORE-AM62Ax
Add the phyCORE-AM62Ax to our common board directory to
enable our SOM detection for this product.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18 08:12:53 -06:00
Wadim Egorov
cc5c55567e board: phytec: common: k3: Make configure_capsule_updates() static
This function is only used in the board.c file. Make it static.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2025-03-18 08:12:53 -06:00
Daniel Schultz
058ed281fa board: phytec: common: k3: Expose product infos to Linux
Call 'phytec_ft_board_fixup' in the common K3 board code
to expose the product name and part number to Linux.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2025-01-31 11:08:04 -06:00
Daniel Schultz
9c46b8c4e0 board: phytec: common: Add product information to FTD
ft_board_setup inside the board code allows to alter
device-tree during the boot process.

Introduce a new function for the PHYTEC SOM detection
to read the product name and part number from the EEPROM
content and include both into the device-tree as
* phytec,som-part-number
* phytec,som-product-name

This function can be called from the board code when those
values should be exposed to Linux.

This patch also updates the phytec_print_som_info
function and changes the output.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
2025-01-31 11:08:04 -06:00
Daniel Schultz
b2a04cd075 board: phytec: common: k3: Add missing boot source to env
We set the boot source as environment variable 'boot'.
Also include 'uart' and 'usbdfu' as possible boot sources.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2025-01-23 12:11:50 -06:00
Tom Rini
5360c683e6 Merge patch series "Add phyCORE AM62Ax"
Garrett Giordano <ggiordano@phytec.com> says:

This patch set adds the phyCORE AM62Ax board support and documenation to
u-boot.

The phyCORE-AM62Ax is a SoM (System on Module) featuring TI's AM62Ax SoC. It can
be used in combination with different carrier boards. This module can come
with different sizes and models for DDR, eMMC, SPI NOR Flash and various SoCs
from the AM62x family.

A development Kit, called phyBOARD-Lyra is used as a carrier board reference
design around the AM62x SoM.

This series depends on the following two patches:
- [PATCH v2] arm: mach-k3: am62a7: Provide a way to obtain boot device for non SPL
  https://lists.denx.de/pipermail/u-boot/2024-October/570156.html
- [PATCH] board: phytec: common: Introduce CONFIG_PHYTEC_K3_DDR_PATCH
  https://lists.denx.de/pipermail/u-boot/2024-November/571543.html

Link: https://lore.kernel.org/r/20241118231606.3161665-1-ggiordano@phytec.com
[trini: Fix warning in board/phytec/common/k3/board.c when
        CONFIG_EFI_HAVE_CAPSULE_SUPPORT is not enabled]
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-12-13 20:09:41 -06:00
Tom Rini
7917841b00 Merge patch series "Enable EFI capsule updates for PHYTEC K3 SoMs"
Wadim Egorov <w.egorov@phytec.de> says:

This implements capsule updates for all our K3 SoMs for
eMMC, OSPI NOR and uSD cards.

We can use capsule updates to update the bootloader on all our
supported flash devices.

Link: https://lore.kernel.org/r/20241127121736.1525948-1-w.egorov@phytec.de
2024-12-13 14:15:43 -06:00
Wadim Egorov
f9fc0b7a2e board: phytec: k3: Add EFI capsule update support
Implement EFI capsule update functionality for PHYTEC K3-based SoMs.
These SoMs feature various flash device options, including eMMC,
OSPI NOR, and uSD card at the board level.

This update provides the necessary logic to enable EFI capsule updates
across all three flash devices, ensuring flexible and robust firmware
upgrade capabilities.

The GUID is dynamically generated for the board, to get it:

  efidebug capsule esrt
  ========================================
  ESRT: fw_resource_count=3
  ESRT: fw_resource_count_max=3
  ESRT: fw_resource_version=1
  [entry 0]==============================
  ESRT: fw_class=C7D64D6D-10B2-54BC-A3BF-06A9DC3653D9
  ESRT: fw_type=unknown
  ESRT: fw_version=0
  ESRT: lowest_supported_fw_version=0
  ESRT: capsule_flags=0
  ESRT: last_attempt_version=0
  ESRT: last_attempt_status=success
  [entry 1]==============================
  ESRT: fw_class=09841C3F-F177-5D57-B1F6-754D92879205
  ESRT: fw_type=unknown
  ESRT: fw_version=0
  ESRT: lowest_supported_fw_version=0
  ESRT: capsule_flags=0
  ESRT: last_attempt_version=0
  ESRT: last_attempt_status=success
  [entry 2]==============================
  ESRT: fw_class=D11A9016-515E-503A-8872-3FF65384D0C4
  ESRT: fw_type=unknown
  ESRT: fw_version=0
  ESRT: lowest_supported_fw_version=0
  ESRT: capsule_flags=0
  ESRT: last_attempt_version=0
  ESRT: last_attempt_status=success
  ========================================

On the board (from uSD card containing capsule binaries at boot):

  load mmc 1:1 $loadaddr tiboot3-capsule.bin
  efidebug capsule update $loadaddr

  load mmc 1:1 $loadaddr tispl-capsule.bin
  efidebug capsule update $loadaddr

  load mmc 1:1 $loadaddr uboot-capsule.bin
  efidebug capsule update $loadaddr

The binaries will be flashed to the flash device you are booted from.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2024-12-13 14:15:31 -06:00
Garrett Giordano
893ae07cc9 board: phytec: common: Introduce CONFIG_PHYTEC_K3_DDR_PATCH
Introduce CONFIG_PHYTEC_K3_DDR_PATCH to make DDR timing patch code
optional for PHYTEC K3 boards. This allows better control over which
boards receive DDR timing patches, rather than compiling the code for
all boards with K3_DDRSS enabled.

Also enable the feature by default for PHYCORE_AM62X_R5.

Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2024-12-04 14:04:08 -06:00
Christoph Stoidner
d3b9b79968 board: phytec: imx93: Add eeprom-based hardware introspection
The phyCORE-i.MX 93 is available in various variants. Relevant variant
options for the spl/u-boot are:
- with or without HS400 support for the eMMC
- with 1GB ram chip, or 2GB ram chip

The phyCORE's eeprom contains all information about the existing variant
options. Add evaluation of the eeprom data to the spl/u-boot to
enable/disable HS400 and to select the appropriate ram configuration at
startup.

Signed-off-by: Christoph Stoidner <c.stoidner@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Tested-by: Primoz Fiser <primoz.fiser@norik.com>
2024-11-25 23:08:02 -03:00
Wadim Egorov
a687070664 board: phytec: common: k3: Apply SoM-specific overlays to OS device tree
Our SoMs are available in multiple configurations, managed via device
tree overlays. To determine the specific variant in use, we read the
EEPROM and apply the appropriate overlays during boot to the device tree
used by the OS.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Neha Malcom Francis <n-francis@ti.com>
2024-11-14 10:46:22 -06:00
Simon Glass
dac3ce976a board: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Dominik Haller
9945a30e2e board: phytec: k3: k3_ddrss_patch: Add ddr phy reg count
Add and use the correct number of ddr phy registers to update the
corresponding settings.

Fixes: cbf5c99ef3 ("board: phytec: common: Introduce a method to inject DDR timings deltas")
Signed-off-by: Dominik Haller <d.haller@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2024-07-10 13:36:22 -06:00
Wadim Egorov
e9c4448f80 board: phytec: common: k3: Copy fixed partitions to OS device tree
Copy fixed-partitions nodes from U-Boot device tree to OS device tree.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
2024-06-18 10:28:59 -06:00
Tom Rini
0329779bfb Merge patch series "*** phyCORE-AM62x: DDR detection / Inject DDR timing deltas ***"
Wadim Egorov <w.egorov@phytec.de> says:

Changes in v2:
  - Reabse to current next
  - Add Tested-by: John Ma <jma@phytec.com>
  - Add Kconfig option to select RAM size statically
  - Make board/phytec/common/k3 always compile for CONFIG_ARCH_K3

v1: https://lists.denx.de/pipermail/u-boot/2024-May/553057.html
2024-06-07 14:03:36 -06:00
Wadim Egorov
0be402375d board: phytec: am62x: Add support for 1 & 4 GB RAM variants
Use content of EEPROM to detect the actual RAM size and adjust
DDR timings, size and banks accordingly.
Also enable the SoM detection per default in the defconfigs.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: John Ma <jma@phytec.com>
2024-06-07 14:02:26 -06:00
Wadim Egorov
cbf5c99ef3 board: phytec: common: Introduce a method to inject DDR timings deltas
Introduce fdt_apply_ddrss_timings_patch() to allow board code to
override DDR settings in the device tree prior to DDRSS driver probing.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: John Ma <jma@phytec.com>
2024-06-07 14:02:26 -06:00
Wadim Egorov
161acbdfb0 board: phytec: Fix function definitions in AM6x SOM detection
Functions are declared as phytec_am6* and not phytec_am62*.
Update the definitions to match the declarations.

Fixes: 9d152c2327 ("board: phytec: Add SOM detection for AM6x")

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: John Ma <jma@phytec.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
2024-06-07 14:02:26 -06:00
Wadim Egorov
12f09c19b7 board: phytec: Make AM6 SoM detection depend on I2C
SoM detection is using I2C driver model functions.
Let's depend on I2C.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: John Ma <jma@phytec.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
2024-06-07 14:02:26 -06:00
Daniel Schultz
946ae83246 board: phytec: common: k3: Set MAC
Read the EEPROM API v3 content and set all available
MAC-Addresses to the environment.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
2024-06-07 14:01:53 -06:00
Daniel Schultz
b100c2458a board: phytec: common: Add API v3
This API is based on a block structure with a 8 Byte large
API v3 header and various of different blocks following. It extends
our current API v2, which is always 32 Byte large, and is located
directly after v2.

Add the MAC block as first block type. It contains the physical
Ehternet interface number, a MAC address and a CRC checksum over the
MAC payload.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
2024-06-07 14:01:53 -06:00
Daniel Schultz
2c3afb76d7 board: phytec: common: Move API v2 init to new function
Move the entire initialization code for API v2 into a dedicated
function. This rework will allow to easily integrate the API v3
as next step during init.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
2024-06-07 14:01:53 -06:00
Daniel Schultz
38b96407f6 board: phytec: common: Define PHYTEC_API2_DATA_LEN
The EEPROM image length for API v2 is fixed to 32 bytes. No need
to use sizeof while this value won't change. This value is
also be required for API v3 to know where the API v3 header starts.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
2024-06-07 14:01:53 -06:00
Daniel Schultz
0329547377 board: phytec: common: Move eeprom read to new function
We need to read multiple times from different offsets in API v3.
Move the EEPROM read logic into a dedicated function to make it
usable multiple times.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
2024-06-07 14:01:53 -06:00
Tom Rini
03de305ec4 Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-20 13:35:03 -06:00
Tom Rini
d678a59d2d Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d, reversing
changes made to 2ee6f3a5f7.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-19 08:16:36 -06:00
Tom Rini
f842a7a2c0 Merge patch series "*** Commonize board code for K3 based SoMs ***"
Wadim Egorov <w.egorov@phytec.de> says:

Factor out code that we can reuse across all our K3 based SoMs.
2nd patch of this series require patch [1] to be applied first.

[1] https://lists.denx.de/pipermail/u-boot/2024-April/552021.html
2024-05-10 11:33:00 -06:00
Wadim Egorov
0b30b28ba3 board: phytec: Commonize board code for K3 based SoMs
Environment handling code can be reused across all our K3 based SoMs.
Instead of adding the same code for every new SoM, move it to a common
board.c file.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2024-05-10 10:42:22 -06:00
Tom Rini
9ac776b27c board: phytec: Remove <common.h> and add needed includes
Remove <common.h> from this board vendor directory and when needed
add missing include files directly.

Acked-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-07 08:00:25 -06:00
Daniel Schultz
9d152c2327 board: phytec: Add SOM detection for AM6x
Add all functions to read each SOM option from the EEPROM
image and detect whether it's the correct product for this
image.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2024-04-29 10:55:58 -06:00
Daniel Schultz
e8fc2effda board: phytec: common: Fix eepom is empty check
The ptr variable is currently defined as int and sizeof
returns the size of the eeprom data struct as Byte (32 in total).

In case the eeprom is empty, the check, if the eeprom is empty,
will most likely stop after 8 iterations because it will continue
with the stack which should contain some data. Therefore, the
init function will detect an empty EEPROM as API0 and return with
the valid flag set to True.

Fixes: dc22188cdc ("board: phytec: Add common PHYTEC SoM detection")

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
2024-04-29 10:55:58 -06:00
Yannic Moog
1e5de690f3 board: phytec: check eeprom_data validity
For all of the functions that access the eeprom_data, make sure these
data are valid. Use the valid member of the phytec_eeprom_data struct.
This fixes a bug where only the API revision check guarded against
accessing rubbish. But if API revision was e.g. 6, eeprom setup failed
before, but phytec_get_imx8m_eth would still happily access the data.

Fixes: dc22188cdc ("board: phytec: Add common PHYTEC SoM detection")

Signed-off-by: Yannic Moog <y.moog@phytec.de>
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
2024-04-29 10:55:57 -06:00
Yannic Moog
8fe6e9a00f board: phytec: introduce eeprom struct member 'valid'
Add a new nember to the eeprom_data that indicates whether the
associated data is valid or not. Make use of this new member in the
phytec_eeprom_data_init function by setting the valid value
appropriately.
Move the eeprom data to a new struct payload that holds
the payload of the eeprom.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
2024-04-29 10:55:57 -06:00