6defecd943
In ti_j721e_ufs_probe there is a call to clk_get_rate but the code after that attempts to detect an error from that call incorrectly uses IS_ERR_VALUE. Instead the test should just be for regular error codes. The call returns an unsigned long so that needs to be cast to a signed type first of all. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Anshul Dalal <anshuld@ti.com> Link: https://patch.msgid.link/20251007-ufs_ti-v2-1-501f575b6947@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
74 lines
1.5 KiB
C
74 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#include <asm/io.h>
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#include <clk.h>
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#include <dm.h>
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#include <dm/device_compat.h>
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#include <linux/bitops.h>
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#include <linux/err.h>
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#define UFS_SS_CTRL 0x4
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#define UFS_SS_RST_N_PCS BIT(0)
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#define UFS_SS_CLK_26MHZ BIT(4)
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static int ti_j721e_ufs_probe(struct udevice *dev)
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{
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void __iomem *base;
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unsigned long clock;
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struct clk clk;
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u32 reg = 0;
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int ret;
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ret = clk_get_by_index(dev, 0, &clk);
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if (ret) {
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dev_err(dev, "failed to get M-PHY clock\n");
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return ret;
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}
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clock = clk_get_rate(&clk);
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if ((long)clock <= 0) {
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dev_err(dev, "failed to get rate\n");
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return clock ? clock : -EIO;
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}
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base = dev_remap_addr_index(dev, 0);
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if (clock == 26000000)
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reg |= UFS_SS_CLK_26MHZ;
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/* Take UFS slave device out of reset */
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reg |= UFS_SS_RST_N_PCS;
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writel(reg, base + UFS_SS_CTRL);
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return 0;
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}
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static int ti_j721e_ufs_remove(struct udevice *dev)
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{
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void __iomem *base = dev_remap_addr_index(dev, 0);
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u32 reg = readl(base + UFS_SS_CTRL);
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reg &= ~UFS_SS_RST_N_PCS;
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writel(reg, base + UFS_SS_CTRL);
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return 0;
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}
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static const struct udevice_id ti_j721e_ufs_ids[] = {
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{
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.compatible = "ti,j721e-ufs",
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},
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{},
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};
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U_BOOT_DRIVER(ti_j721e_ufs) = {
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.name = "ti-j721e-ufs",
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.id = UCLASS_MISC,
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.of_match = ti_j721e_ufs_ids,
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.probe = ti_j721e_ufs_probe,
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.remove = ti_j721e_ufs_remove,
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.flags = DM_FLAG_OS_PREPARE,
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};
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