doc: fix spelling errors tree-wide

fix some spelling errors in code comments and Kconfig helps

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This commit is contained in:
Benjamin Cabé
2025-09-02 09:53:33 +02:00
committed by Benjamin Cabé
parent 7d45d3e821
commit 0132ea07fb
103 changed files with 131 additions and 131 deletions

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@@ -1030,7 +1030,7 @@ config WARN_EXPERIMENTAL
config NOT_SECURE
bool
help
Symbol to be selected by a feature to inidicate that feature is
Symbol to be selected by a feature to indicate that feature is
not secure.
config TAINT

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@@ -653,7 +653,7 @@ void *xtensa_excint1_c(void *esf)
* this code.
*
* Another intentionally ill is from xtensa_arch_kernel_oops.
* Kernel OOPS has to be explicity raised so we can simply
* Kernel OOPS has to be explicitly raised so we can simply
* set the reason and continue.
*/
if (cause == EXCCAUSE_ILLEGAL) {

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@@ -478,7 +478,7 @@ by non-secure. All others is going to be accessible by NS world.
endif()
As an alternative method (which recommended) user can configurate ownership peripheral by
As an alternative method (which recommended) user can configure ownership peripheral by
an cmake overlay file too without touching TF-M source files. For this path
create ``s_ns_access_overlay.cmake`` file under your project root folder and put peripheral/memory
you would like to be accessible by secure world.

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@@ -104,7 +104,7 @@ Connections and IOs
| JP4 | I2C1_SDA_PU | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Connects the pull-up to I2C1A_SDA (P0.9); sourced by V_AUX. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Oepn | | | Disconnects the pull-up from I2C1A_SDA (P0.9); sourced by V_AUX. | |
| | | | Open | | | Disconnects the pull-up from I2C1A_SDA (P0.9); sourced by V_AUX. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+

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@@ -66,7 +66,7 @@ remoteproc support, it is based around 5.15 Xilinx maintained kernel, as describ
https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/1641152513/Kria+K26+SOM#PetaLinux
The other option is to use the reference image from the openAMP project, the link
below points, betweem the options, to the kv260 target:
below points, between the options, to the kv260 target:
https://github.com/OpenAMP/openamp-ci-builds/releases/tag/v2022.12

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@@ -260,7 +260,7 @@ Running an applicatoin with FVP
-------------------------------
Here is the same example for running with FVP.
Set the ``ARMFVP_BIN_PATH`` environemnt variable to the location of your FVP you have downloaded from `here <FVP_>`_
Set the ``ARMFVP_BIN_PATH`` environment variable to the location of your FVP you have downloaded from `here <FVP_>`_
.. code-block:: console

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@@ -281,7 +281,7 @@ Running an applicatoin with FVP
-------------------------------
Here is the same example for running with FVP.
Set the ``ARMFVP_BIN_PATH`` environemnt variable to the location of your FVP you have downloaded from `here <FVP_>`_
Set the ``ARMFVP_BIN_PATH`` environment variable to the location of your FVP you have downloaded from `here <FVP_>`_
.. code-block:: console

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@@ -194,7 +194,7 @@ with the additional step of connecting an external debugger.
To test flashed software, plug in ``ctcc`` card to mPCIe/M.2 slot or use mPCIe/M.2 adapter to USB and plug such adapter to USB port.
* For ``ctcc/nrf52840`` check on Linux system by entering ``lsusb`` command if the following device appears: ``NordicSemiconductor MCUBOOT`` or ``NordicSemiconductor USB-DEV`` (when booted into blinky example).
* For ``ctcc/nrf9161`` it's not possible to see a change in ``lsusb`` due to the on-board USB-UART converter. Intead, connect to the UART console using a terminal emulation program of your choice.
* For ``ctcc/nrf9161`` it's not possible to see a change in ``lsusb`` due to the on-board USB-UART converter. Instead, connect to the UART console using a terminal emulation program of your choice.
References
**********

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@@ -150,7 +150,7 @@ corner and going clockwise.
PoE Board (B)
-------------
This board coverts power delivered over the Ethernet cable (PoE) to provide a
This board converts power delivered over the Ethernet cable (PoE) to provide a
power supply for the Ethernet Board (A). The main components of the PoE Board
(B) are shown on the block diagram under `Functionality Overview`_.

View File

@@ -15,7 +15,7 @@ Hardware
- STM32F412CGU6 UFQFPN48 package
Peripherial Mapping
Peripheral Mapping
===================
- USART_1 TX/RX : PA9/PA10

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@@ -110,7 +110,7 @@ uart2: &scb2 {
#address-cells = <1>;
#size-cells = <1>;
/* Keep bootstrap_region node to know size, finaly it will
/* Keep bootstrap_region node to know size, finally it will
* locate on beginning of code-partition. The BootROM copies
* bootstrap application in RAM and launches it.
*/

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@@ -67,7 +67,7 @@ Run ish_fw.bin on ADL RVP board for Chrome
$ /usr/share/vboot/bin/make_dev_ssd.sh --remove_rootfs_verification --partitions
$ reboot
- Go to the ISH firmware direcoty:
- Go to the ISH firmware directory:
.. code-block:: console

View File

@@ -106,7 +106,7 @@ Golden Reference Design
=======================
The Golden System Reference Design (GSRD) provides a set of essential hardware
and software system componets that can be used as a starting point for various
and software system components that can be used as a starting point for various
custom user designs.
The Zephyr support for Cyclone® V SoC Development Kit is based on GSRD hardware.
@@ -123,7 +123,7 @@ a Intel® Quartus® project:
* soc_system.qsf : Quartus® Prime Settings File
* soc_system.qsys : Platform Designer file (contains the SoC system)
* soc_system.sopcinfo : SOPC Information file contains details about modules instantiated in the project, parameter names and values.
* soc_system_timing.sdc : Synopsys Desing Constraint FILE.
* soc_system_timing.sdc : Synopsys Design Constraint FILE.
* output_files/soc_system.sof : FPGA configuration file.

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@@ -127,7 +127,7 @@ to the it8xxx2 board flash.
#. Using winflash tool flash zephyr.bin into your ITE board.
First, click ``Load`` button and select your zephyr.bin file.
Second, click ``run`` to flash the iamge into board.
Second, click ``run`` to flash the image into board.
.. figure:: WinFlashTool_P3.jpg
:align: center

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@@ -45,8 +45,8 @@ of the M5Stack Core2 board.
+------------------+------------------------------------------------------------------------+-----------+
| Power Switch | Power on/off button. | supported |
+------------------+------------------------------------------------------------------------+-----------+
| General purpose | Three buttons on the front face of the device accesible using the GPIO | supported |
| buttons | interface. | |
| General purpose | Three buttons on the front face of the device accessible using the | supported |
| buttons | GPIO interface. | |
+------------------+------------------------------------------------------------------------+-----------+
| LCD screen | Built-in LCD TFT display \(`LCD-ILI9342C`_, 2", 320x240 px\) | supported |
| | controlled via SPI interface | |

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@@ -335,7 +335,7 @@ Instead the equivalent ``bs_tests`` provided hooks should be used.
Note also that, for AMP targets like the :ref:`nrf5340bsim <nrf5340bsim>`, each embedded MCU has
its own separate ``bs_tests`` built with that MCU. You can select if and what test is used
for each MCU separatedly with the command line options.
for each MCU separately with the command line options.
Command line argument parsing
=============================

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@@ -115,7 +115,7 @@ ARM's TrustZone is not modelled in these boards. This means that:
* There is no differentiation between secure and non secure execution states or bus accesses.
* All RAM, flash and peripherals are in principle accessible from all SW. Peripherals with their
own interconnect master ports can, in principle, access any other peripheral or RAM area.
* There is no nrf5340bsim/nrf5340/cpuapp/ns board/build target, or posibility of mixing secure
* There is no nrf5340bsim/nrf5340/cpuapp/ns board/build target, or possibility of mixing secure
and non-secure images.
* Currently there is no model of the SPU, and therefore neither flash, RAM areas or peripherals
can be labelled as restricted for secure or non secure access.

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@@ -45,7 +45,7 @@ bank), and ``PTA20`` is the pin 4 of ``gpioa_h`` (high bank).
The GPIO controller provides the option to route external input pad interrupts
to either the SIUL2 EIRQ or WKPU interrupt controllers, as supported by the SoC.
By default, GPIO interrupts are routed to SIUL2 EIRQ interrupt controller,
unless they are explicity configured to be directed to the WKPU interrupt
unless they are explicitly configured to be directed to the WKPU interrupt
controller, as outlined in :zephyr_file:`dts/bindings/gpio/nxp,s32-gpio.yaml`.
To find information about which GPIOs are compatible with each interrupt
@@ -239,7 +239,7 @@ Ethernet
This board has a single instance of Ethernet Media Access Controller (EMAC)
interfacing with a `NXP TJA1103`_ 100Base-T1 Ethernet PHY. Currently, there is
limited driver for this PHY that allows for overiding the default pin strapping configuration for
limited driver for this PHY that allows for overriding the default pin strapping configuration for
the PHY (RMII, master, autonomous mode enabled, polarity correction enabled)
to slave mode.

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@@ -5,7 +5,7 @@ Overview
ESP32-C3-SUPERMINI is based on the ESP32-C3, a single-core Wi-Fi and Bluetooth 5 (LE) microcontroller SoC,
based on the open-source RISC-V architecture. This board also includes a Type-C USB Serial/JTAG port.
There may be multiple variations depending on the specific vendor. For more information a reasonbly well documented version of this board can be found at `ESP32-C3-SUPERMINI`_
There may be multiple variations depending on the specific vendor. For more information a reasonably well documented version of this board can be found at `ESP32-C3-SUPERMINI`_
Hardware
********

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@@ -56,7 +56,7 @@ built in the usual way (see :ref:`build_an_application` for more details).
Flashing
========
The board is factory-programmed with Adafruit's UF2 booloader
The board is factory-programmed with Adafruit's UF2 bootloader
#. Reset the board into the bootloader by bridging ground and RST 2 times
quickly

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@@ -6,7 +6,7 @@ Overview
The SAM4L WM-400 Cape is a full featured design to enable IEEE 802.15.4 low
power nodes. It is a Beaglebone Black cape concept with an Atmel AT86RF233
radio transceiver. User can develop Touch interface and have access to many
sensors and conectivity buses.
sensors and connectivity buses.
Hardware
********

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@@ -266,7 +266,7 @@ you can copy it from the output of the last command.
u-boot=> cp.b 0x48000000 0x7e0000 27240
And finaly starting the M4-Core at the right memory address:
And finally starting the M4-Core at the right memory address:
.. code-block:: console

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@@ -31,12 +31,12 @@ Hardware
- Module Demo Board build by MDBT50Q-512K
- Nordic nRF52833 SoC Solution
- A recommended 3rd-party module by Nordic Semiconductor.
- BT5.2&BT5.1&BT5 Bluetooth Specification Cerified
- BT5.2&BT5.1&BT5 Bluetooth Specification Certified
- Supports BT5 Long Range Features
- Cerifications: FCC, IC, CE, Telec(MIC), KC, SRRC, NCC, RCM, WPC
- Certifications: FCC, IC, CE, Telec(MIC), KC, SRRC, NCC, RCM, WPC
- 32-bit ARM® Cortex™ M4F CPU
- 512kB Flash Memory/128kB RAM
- RoHs & Reach Compiant.
- RoHs & Reach Compliant.
- 42 GPIO
- Chip Antenna
- Interfaces: SPI, UART, I2C, I2S, PWM, ADC, NFC, and USB

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@@ -31,12 +31,12 @@ Hardware
- Module Demo Board build by MDBT50Q-1MV2
- Nordic nRF52840 SoC Solution Version: 2
- A recommended 3rd-party module by Nordic Semiconductor.
- BT5.2&BT5.1&BT5 Bluetooth Specification Cerified
- BT5.2&BT5.1&BT5 Bluetooth Specification Certified
- Supports BT5 Long Range Features
- Cerifications: FCC, IC, CE, Telec(MIC), KC, SRRC, NCC, RCM, WPC
- Certifications: FCC, IC, CE, Telec(MIC), KC, SRRC, NCC, RCM, WPC
- 32-bit ARM® Cortex™ M4F CPU
- 1MB Flash Memory/256kB RAM
- RoHs & Reach Compiant.
- RoHs & Reach Compliant.
- 48 GPIO
- Chip Antenna
- Interfaces: SPI, UART, I2C, I2S, PWM, ADC, NFC, and USB

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@@ -56,7 +56,7 @@ Hardware
- Supports Bluetooth Direction Finding & Mesh
- Supports Bluetooth low energy audio
- Certifications: FCC, IC, CE, Telec (MIC), KC, SRRC, NCC, RCM, WPC
- RoHs & Reach Compiant.
- RoHs & Reach Compliant.
- 48 GPIO
- Chip Antenna
- Interfaces: SPI, UART, I2C, I2S, PWM, ADC, NFC, and USB

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@@ -55,8 +55,8 @@ Hardware
- Supports BT5 Long Range Features
- Supports Bluetooth Direction Finding & Mesh
- Supports Bluetooth low energy audio
- Cerifications: FCC, IC, CE, Telec(MIC), KC, SRRC, NCC, RCM, WPC
- RoHs & Reach Compiant.
- Certifications: FCC, IC, CE, Telec(MIC), KC, SRRC, NCC, RCM, WPC
- RoHs & Reach Compliant.
- 25 GPIO
- Chip Antenna
- Interfaces: SPI, UART, I2C, I2S, PWM, ADC, and NFC

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@@ -83,7 +83,7 @@ Flashing
========
Program can be flashed to EK-RA4C1 via the on-board SEGGER J-Link debugger.
SEGGER J-link's drivers are avaialbe at https://www.segger.com/downloads/jlink/
SEGGER J-link's drivers are available at https://www.segger.com/downloads/jlink/
To flash the program to board

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@@ -13,7 +13,7 @@ The key features of the EK-RA8D1 board are categorized in three groups as follow
**MCU Native Pin Access**
- 480MHz Arm Cortex-M85 based RA8D1 MCU in 224 pins, BGA package
- Native pin acces througgh 2 x 50-pin, and 2 x 40-pin male headers
- Native pin access through 2 x 50-pin, and 2 x 40-pin male headers
- MCU current measurement points for precision current consumption measurement
- Multiple clock sources - RA8D1 MCU oscillator and sub-clock oscillator crystals,
providing precision 20.000MHz and 32,768 Hz refeence clocks.

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@@ -13,7 +13,7 @@ The key features of the EK-RA8M1 board are categorized in three groups as follow
**MCU Native Pin Access**
- 480MHz Arm Cortex-M85 based RA8M1 MCU in 224 pins, BGA package
- Native pin acces througgh 2 x 50-pin, and 2 x 40-pin male headers
- Native pin access through 2 x 50-pin, and 2 x 40-pin male headers
- MCU current measurement points for precision current consumption measurement
- Multiple clock sources - RA8M1 MCU oscillator and sub-clock oscillator crystals,
providing precision 20.000MHz and 32,768 Hz refeence clocks.

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@@ -9,7 +9,7 @@ dual lockstep Cortex |reg|-R7.
Zephyr OS support is available for both Cortex |reg|-A cores & Cortex |reg|-R7 core.
More information about the H3 SoC can be fount at `Renesas R-Car H3 chip`_.
More information about the H3 SoC can be found at `Renesas R-Car H3 chip`_.
Hardware
********

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@@ -21,7 +21,7 @@ evaluating features and performance of this SoC.
Zephyr OS support is available for both Cortex |reg|-A cores & Cortex |reg|-R52 core.
More information about the S4 SoC can be fount at `Renesas R-Car S4 chip`_.
More information about the S4 SoC can be found at `Renesas R-Car S4 chip`_.
Hardware
********

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@@ -134,4 +134,4 @@ References
https://wiki.seeedstudio.com/Seeeduino-XIAO/#hardware-overview
.. _schematic:
https://wiki.seeedstudio.com/Seeeduino-XIAO/#resourses
https://wiki.seeedstudio.com/Seeeduino-XIAO/#resources

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@@ -11,7 +11,7 @@ the Raspberry Pi Pico to the Arduino UNO form factor
This board is designed to be use with FlexyPin connector pins.
The FlexyPin holds Pico and contacts to castellated through-hole.
With simple soldering, it can also be used as a board to convert the Rapsberry Pi Pico
With simple soldering, it can also be used as a board to convert the Raspberry Pi Pico
to the Arduino UNO form factor.
.. image:: img/rpi_pico_uno_flexypin.png

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@@ -77,7 +77,7 @@ Debugging
=========
Debuggning relies on JLink tool. JLink is not able to flash the firmware. So
debug session has to be done in two steps. ``west flash`` will flahs the
debug session has to be done in two steps. ``west flash`` will flash the
firmware using Simplicity Commander. Then ``west attach`` will use JLink to
attach to the board. The Zephyr image may has already booted when user runs
``west attach``. User may execute ``monitor reset`` in the gdb prompt to reset

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@@ -70,7 +70,7 @@ Debugging
=========
Debuggning relies on JLink tool. JLink is not able to flash the firmware. So
debug session has to be done in two steps. ``west flash`` will flahs the
debug session has to be done in two steps. ``west flash`` will flash the
firmware using Simplicity Commander. Then ``west attach`` will use JLink to
attach to the board. The Zephyr image may has already booted when user runs
``west attach``. User may execute ``monitor reset`` in the gdb prompt to reset

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@@ -86,7 +86,7 @@ MISO with MOSI, DW SPI register is configured to internally connect them. This t
use two different speed to verify data transfer with asynchronous functionality.
Note: DW SPI only available on SPI0 and SPI1.
``samples/drivers/spi_flash``: Verfiy DW SPI and SPI-FLASH on SPI1. First erase the
``samples/drivers/spi_flash``: Verify DW SPI and SPI-FLASH on SPI1. First erase the
whole flash then write 4 byte data to the flash. Read from the flash and compare the
result with buffer to check functionality.

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@@ -306,7 +306,7 @@ To disable TrustZone, it's necessary to change AT THE SAME TIME the ``TZEN``
and ``RDP`` bits. ``TZEN`` needs to get set from 1 to 0 and ``RDP``,
needs to be set from ``DC`` to ``AA`` (step 3 below).
This is docummented in the `AN5347, in section 9`_, "TrustZone deactivation".
This is documented in the `AN5347, in section 9`_, "TrustZone deactivation".
However, it's possible that the ``RDP`` bit is not yet set to ``DC``, so you
first need to set it to ``DC`` (step 2).

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@@ -32,8 +32,8 @@ Supported Features
.. zephyr:board-supported-hw::
Bluetooh support
----------------
Bluetooth support
-----------------
BLE support is enabled; however, to build a Zephyr sample using this board,
you first need to fetch the Bluetooth controller library into Zephyr as a binary BLOB.

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@@ -32,8 +32,8 @@ Supported Features
.. zephyr:board-supported-hw::
Bluetooh support
----------------
Bluetooth support
-----------------
BLE support is enabled; however, to build a Zephyr sample using this board,
you first need to fetch the Bluetooth controller library into Zephyr as a binary BLOB.

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@@ -32,8 +32,8 @@ Supported Features
.. zephyr:board-supported-hw::
Bluetooh support
----------------
Bluetooth support
-----------------
BLE support is enabled; however, to build a Zephyr sample using this board,
you first need to fetch the Bluetooth controller library into Zephyr as a binary BLOB.

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@@ -146,8 +146,8 @@ Supported Features
.. zephyr:board-supported-hw::
Bluetooh support
----------------
Bluetooth support
-----------------
BLE support is enabled on nucleo_wba55cg. To build a zephyr sample using this board
you first need to install Bluetooth Controller libraries available in Zephyr as binary

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@@ -7,7 +7,7 @@ STM32WB5MMG is an ultra-low-power and small form factor certified 2.4 GHz
wireless module. It supports Bluetooth|reg| Low Energy 5.4, Zigbee|reg| 3.0,
OpenThread, dynamic, and static concurrent modes, and 802.15.4 proprietary
protocols. This board support is added in order to make it possible use this
module on other boards as HCI layer (Specefically B-U585I-IOT02A Development board).
module on other boards as HCI layer (Specifically B-U585I-IOT02A Development board).
STM32WB5MMG supports the following features:

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@@ -89,7 +89,7 @@ Zephyr dependencies. You can replace ``all/dev.yml`` in the ``west init``
command with ``am243x/dev.yml``, if you want to clone a few less repositories.
You also need to follow the "Downloading And Installing Dependencies" section
but you need to replace all ``am263x`` occurences in commands with ``am243x``.
but you need to replace all ``am263x`` occurrences in commands with ``am243x``.
Please also take note of the ``tools`` and ``mcu_plus_sdk`` install path. The
``tools`` install path will later be referred to as ``$TI_TOOLS`` and the MCU+
SDK path as ``$MCUPSDK``. You can pass ``--skip_doxygen=true`` and

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@@ -304,7 +304,7 @@ from its currently loaded dtb file.
};
#Add these definitions under / { } just before the __symbols__
#Disgard the comments with #-->
#Discard the comments with #-->
reserved-memory {
#address-cells = <0x01>;
#size-cells = <0x01>;

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@@ -5,7 +5,7 @@ Overview
Linum is a development board released by Witte Tenology in 2023, and it was developed around the
STM32H753BI microcontroller. The board has 2 expansion connectors used by the LCD display with
touchscreen and another for access to other peripherals of microcontroller. Also it brings plenty
of communications interfaces like UART with RS232 and RS485 capabillities, CAN bus compatible to
of communications interfaces like UART with RS232 and RS485 capabilities, CAN bus compatible to
FD standard, and networking over Ethernet.
Hardware

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@@ -44,7 +44,7 @@ Socket Creation
===============
The :c:func:`net_latmon_get_socket()` function is called to create and configure a TCP socket to
communicate with the Latmus service. A connection address can be specified as a paramenter to
communicate with the Latmus service. A connection address can be specified as a parameter to
bind the socket to a specific interface and port.
Connection Handling

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@@ -25,7 +25,7 @@ with payload in json format. The library can be enabled with
core profile is supported.
OCPP charge point (CP) require a Central System (CS) server to connect, an open
source SteVe server shall be setup locally for devlopment purpose, See
source SteVe server shall be setup locally for development purpose, See
`SteVe server <https://github.com/steve-community/steve/blob/master/README.md>`_
for more information about the setup.
@@ -72,7 +72,7 @@ A filled CP, CS structure and user callback needs to be passed in ocpp_init.
ret = ocpp_init(&cpi, &csi, user_notify_cb, NULL);
A unique session must open for each physical connector before any ocpp
transcation API call.
transaction API call.
.. code-block:: c

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@@ -172,7 +172,7 @@ static int acmphs_renesas_ra_init(const struct device *dev)
}
/*
* Once the analog comparator is configurate, the program must wait
* Once the analog comparator is configured, the program must wait
* for the ACMPHS stabilization time (300ns enabling + 200ns input switching)
* before using the comparator.
*/

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@@ -217,21 +217,21 @@ static int dma_sedi_apply_single_config(sedi_dma_t dev, uint32_t channel,
if (ret != 0) {
goto INVALID_ARGS;
}
/* configurate dma width of source data*/
/* configure dma width of source data*/
ret = width_index(config->source_data_size, &temp);
if (ret != 0) {
goto INVALID_ARGS;
}
sedi_dma_control(dev, channel, SEDI_CONFIG_DMA_SR_TRANS_WIDTH, temp);
/* configurate dma width of destination data*/
/* configure dma width of destination data*/
ret = width_index(config->dest_data_size, &temp);
if (ret != 0) {
goto INVALID_ARGS;
}
sedi_dma_control(dev, channel, SEDI_CONFIG_DMA_DT_TRANS_WIDTH, temp);
/* configurate dma burst size*/
/* configure dma burst size*/
ret = burst_index(config->source_burst_length, &temp);
if (ret != 0) {
goto INVALID_ARGS;

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@@ -370,7 +370,7 @@ static int dma_si32_start(const struct device *dev, const uint32_t channel)
"Address location of the channel transfer descriptors (BASEPTR) must be set.");
__ASSERT(SI32_DMACTRL_A_is_primary_selected(SI32_DMACTRL_0, channel),
"Primary descriptors must be used for basic and auto-request operations.");
__ASSERT(SI32_SCONFIG_0->CONFIG.FDMAEN, "Fast mode is recommened to be enabled.");
__ASSERT(SI32_SCONFIG_0->CONFIG.FDMAEN, "Fast mode is recommended to be enabled.");
__ASSERT(SI32_DMACTRL_0->CHSTATUS.U32 & BIT(channel),
"Channel must be waiting for request");

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@@ -89,7 +89,7 @@ static int dma_wch_init(const struct device *dev)
return 0;
}
/* Coverts a transfer width in bytes to the corresponding bitfield */
/* Converts a transfer width in bytes to the corresponding bitfield */
static uint16_t dma_wch_width_index(uint32_t bytes)
{
switch (bytes) {

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@@ -205,7 +205,7 @@ static void configure_rng(void)
#if DT_INST_NODE_HAS_PROP(0, nist_config)
/*
* Configure the RNG_CR in compliance with the NIST SP800.
* The nist-config is direclty copied from the DTS.
* The nist-config is directly copied from the DTS.
* The RNG clock must be 48MHz else the clock DIV is not adpated.
* The RNG_CR_CONDRST is set to 1 at the same time the RNG_CR is written
*/

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@@ -420,8 +420,8 @@ static void dwxgmac_set_mac_addr_by_idx(const struct device *dev, uint8_t *addr,
/**
* 'sa' bit specifies if This MAC address[47:0] is used to compare with the source
* address fields of the received packet. MAC Address with index 0 is always enabled
* for recive packet MAC address filtering. And 'sa' bit of MAC address with index 0
* is reserved hence this step is excluded for index 0.
* for receive packet MAC address filtering. And 'sa' bit of MAC address with index
* 0 is reserved hence this step is excluded for index 0.
*/
reg_val |= CORE_MAC_ADDRESSx_HIGH_SA_SET(sa);
}
@@ -488,7 +488,7 @@ static void dwxgmac_mac_init(const struct device *dev,
sys_write32(reg_val, ioaddr + CORE_MAC_PACKET_FILTER_OFST);
/* Enable Recive queues for Data Center Bridging/ Generic */
/* Enable Receive queues for Data Center Bridging/ Generic */
reg_val = 0;
for (uint32_t q = 0; q < config->num_rx_Qs; q++) {
reg_val |= (XGMAC_RXQxEN_DCB << (q * XGMAC_RXQxEN_SIZE_BITS));
@@ -500,7 +500,7 @@ static void dwxgmac_mac_init(const struct device *dev,
sys_write32(reg_val, ioaddr + CORE_MAC_TX_CONFIGURATION_OFST);
/**
* Enable Giant Packet Size Limit Control, disable eatchdog timer on reciver and
* Enable Giant Packet Size Limit Control, disable eatchdog timer on receiver and
* Configure RX checksum offload, jumbo packet enable, ARP offload, gaint packet size limit
* in MAC RX configuration register.
*/
@@ -1060,7 +1060,7 @@ void eth_dwc_xgmac_prefill_rx_desc(const struct device *dev)
* Every RX descriptor in the descriptor ring, needs to be prefilled with 2 RX
* buffer addresses and put it to DMA ownership by setting the OWN bit. When new
* data is received the DMA will check the OWN bit and moves the data to
* corresponding recive buffers and puts the RX descriptor to application ownership
* corresponding receive buffers and puts the RX descriptor to application ownership
* by clearing the OWN bit. If received data size is more than total of 2 buffer
* sizes then DMA will use next descriptor in the ring.
*/

View File

@@ -375,7 +375,7 @@ static int phy_tja1103_init(const struct device *dev)
return ret;
}
/* Check always accesible register for handling NMIs */
/* Check always accessible register for handling NMIs */
ret = phy_tja1103_c45_read(dev, MDIO_MMD_VENDOR_SPECIFIC1, TJA1103_ALWAYS_ACCESSIBLE, &val);
if (ret < 0) {
return ret;

View File

@@ -78,8 +78,8 @@ config GIC_V3_RDIST_DMA_NONCOHERENT
depends on GIC_V3
default n
help
GIC redistributor on Some platform are connected to a non-coherent
downstream interconnect, it need to use Non-cacheable and Non-shareable
GIC redistributor on some platforms is connected to a non-coherent
downstream interconnect, it needs to use Non-cacheable and Non-shareable
access attributes to access external memory.
config GIC_V3_ITS_DMA_NONCOHERENT

View File

@@ -12,7 +12,7 @@
* ES0584 / ES0631 §2.5.2; ES0632 §2.6.2 (both Rev. 2)
* """
* RTC interrupts cannot be reliably used for real-time
* control functions, since some occurences of RTC
* control functions, since some occurrences of RTC
* interrupts may be missed.
* """
* Since alarm IRQs are unreliable, don't allow RTC alarm

View File

@@ -369,7 +369,7 @@ static int sdhc_spi_send_cmd(const struct device *dev, struct sdhc_command *cmd,
* the maximum spi response length is 5 bytes, so we provide an
* additional 5 bytes of data, leaving us with 13 bytes of 0xff.
* Finally, we send a padding byte of all 0xff, to ensure that
* the card recives at least one 0xff byte before next command.
* the card receives at least one 0xff byte before next command.
*/
/* Note: we can discard CMD data as we send it,

View File

@@ -316,7 +316,7 @@ static int uart_bt_workqueue_init(void)
return 0;
}
/** The work-queue is shared across all instances, hence we initialize it separatedly */
/** The work-queue is shared across all instances, hence we initialize it separately */
SYS_INIT(uart_bt_workqueue_init, POST_KERNEL, CONFIG_SERIAL_INIT_PRIORITY);
static int uart_bt_init(const struct device *dev)

View File

@@ -258,7 +258,7 @@ static void scan_callback(whd_scan_result_t **result_ptr, void *user_data, whd_s
return;
}
/* We recived scan data so process it */
/* We received scan data so process it */
if ((result_ptr != NULL) && (*result_ptr != NULL)) {
memcpy(&whd_scan_result, *result_ptr, sizeof(whd_scan_result_t));
parse_scan_result(&whd_scan_result, &zephyr_scan_result);

View File

@@ -51,7 +51,7 @@ struct bt_mesh_statistic {
/** @brief Get mesh frame handling statistic.
*
* @param st Bluetooh Mesh statistic.
* @param st Bluetooth Mesh statistic.
*/
void bt_mesh_stat_get(struct bt_mesh_statistic *st);

View File

@@ -180,7 +180,7 @@ struct zbus_channel_observation_mask {
};
/**
* @brief Structure for linking observers to chanels
* @brief Structure for linking observers to channels
*/
struct zbus_channel_observation {
const struct zbus_channel *chan;

View File

@@ -238,7 +238,7 @@ config MCUBOOT_BOOTLOADER_MODE_RAM_LOAD_WITH_REVERT
will select the image with the higher version number, copy it to RAM and begin execution
from there. The image must be linked to execute from RAM, the address that it is copied
to is specified using the load-addr argument when running imgtool.
This option automatically selectes MCUBOOT_BOOTLOADER_NO_DOWNGRADE as
This option automatically selects MCUBOOT_BOOTLOADER_NO_DOWNGRADE as
MCUBoot will automatically select the highest revision of the application
to boot. Note however that MCUBoot will select an older revision of
the application if the booted revision does not mark itself as confirmed.

View File

@@ -1,5 +1,5 @@
sample:
name: Bluetooh Direct Advertising
name: Bluetooth Direct Advertising
tests:
sample.bluetooth.direct_adv:
harness: bluetooth

View File

@@ -377,7 +377,7 @@ int main(void)
printk("PAwR config written to sync %d, disconnecting\n", num_synced - 1);
disconnect:
/* Adding delay (2ms * interval value, using 2ms intead of the 1.25ms
/* Adding delay (2ms * interval value, using 2ms instead of the 1.25ms
* used by controller) to ensure sync is established before
* disconnection.
*/

View File

@@ -1,5 +1,5 @@
sample:
name: Bluetooh Peripheral Accept List
name: Bluetooth Peripheral Accept List
tests:
sample.bluetooth.peripheral_accept_list:
harness: bluetooth

View File

@@ -111,7 +111,7 @@ a Windows host, this can be done with the following commands:
netsh interface ipv6 add route ::/0 "Ethernet" ::
.. note::
The above commands must be run as priviledged user.
The above commands must be run as privileged user.
If everything is configured correctly, you will be able to successfully execute
the following commands from the Zephyr shell:

View File

@@ -196,7 +196,7 @@ host OS:
$ ./hello_server_ssl 0.0.0.0 ../native-cert.pem ../native-key.pem ../qemu-cert.pem
Then, in annother terminal, run the corresponding ``hello/client`` sample:
Then, in another terminal, run the corresponding ``hello/client`` sample:
.. zephyr-app-commands::
:zephyr-app: samples/modules/thrift/hello/client

View File

@@ -57,7 +57,7 @@ Core region, thing, and device advisor configuration:
Refer to the `AWS IoT Core Documentation <https://docs.aws.amazon.com/iot/index.html>`_
for more information.
Additionnaly, it is possible to tune the firmware to pass the AWS DQP test
Additionally, it is possible to tune the firmware to pass the AWS DQP test
suite, to do set Kconfig option :kconfig:option:`CONFIG_AWS_TEST_SUITE_DQP` to ``y``.
More information about the AWS device advisor can be found here:

View File

@@ -101,7 +101,7 @@ Setup and Usage
- **Run Latmus on the SUT**
Request the appropriate options with `Latmus <https://evlproject.org/core/testing/#latmus-program>`_. Users
can for example modify the sampling period with the ``-p`` option or generate historgram data for
can for example modify the sampling period with the ``-p`` option or generate histogram data for
postprocessing with the ``-g`` option,
- **Monitor results from the SUT**

View File

@@ -571,7 +571,7 @@ allow_anonymous true
# not given then the access is read/write. <topic> can contain the + or #
# wildcards as in subscriptions.
#
# The "deny" option can used to explicity deny access to a topic that would
# The "deny" option can used to explicitly deny access to a topic that would
# otherwise be granted by a broader read/write/readwrite statement. Any "deny"
# topics are handled before topics that grant read/write access.
#

View File

@@ -339,7 +339,7 @@ int main(void)
k_sleep(K_SECONDS(1));
}
/* User could trigger remote start/stop transcation from CS server */
/* User could trigger remote start/stop transaction from CS server */
k_sleep(K_SECONDS(1200));
return 0;

View File

@@ -26,7 +26,7 @@ The source code for this sample application can be found at:
This sample uses the OpenThread CoAP API whereas Zephyr has its own CoAP API.
So, why are we using the OpenThread CoAP API here ?
* OpenThread uses it internaly to implement many of its services.
* OpenThread uses it internally to implement many of its services.
* OpenThread CoAP API has a more direct access to radio.
So by using OpenThread CoAP API instead of Zephyr one,

View File

@@ -69,5 +69,5 @@ Sample Output
<when sensor is pressed>
[00:00:09.819,061] <inf> PRESS_INT_SAMPLE: PRESSURE CHANGE INTERRUPT
<when the sensor pressure crosses defined threhold>
<when the sensor pressure crosses defined threshold>
[00:00:09.859,039] <inf> PRESS_INT_SAMPLE: PRESSURE THRESHOLD INTERRUPT

View File

@@ -43,7 +43,7 @@ on native_sim target
:compact:
After running the generated image on a native_sim target, the output on the console shows the
multiple Iterations of read/write/delete exectuted.
multiple Iterations of read/write/delete executed.
Sample Output
=============

View File

@@ -42,7 +42,7 @@ to the UART.
With FUSE access in the host filesystem
---------------------------------------
If you enable the :ref:`host FUSE filsystem access <native_fuse_flash>`
If you enable the :ref:`host FUSE filesystem access <native_fuse_flash>`
you will also have the flash filesystem mounted and accessible from your Linux host filesystem.
Before starting a build, make sure that the i386 pkgconfig directory is in your

View File

@@ -39,8 +39,8 @@ nominal number of samples every frame. Theoretically it should be possible to
obtain the timing information based on I2S and USB interrupts, but currently
neither subsystem provides the necessary timestamp information.
Explcit Feedback on nRF5340
***************************
Explicit Feedback on nRF5340
****************************
The nRF5340 is capable of counting both edges of I2S LRCLK relative to USB SOF
with the use of DPPI, TIMER and GPIOTE input. Alternatively, if the GPIOTE input

View File

@@ -128,7 +128,7 @@ class NXPS32DebugProbeRunner(ZephyrBinaryRunner):
"""Return a list of debug probe serial numbers connected via USB to this host."""
# use system's native commands to enumerate and retrieve the USB serial ID
# to avoid bloating this runner with third-party dependencies that often
# require priviledged permissions to access the device info
# require privileged permissions to access the device info
macaddr_pattern = r'(?:[0-9a-f]{2}[:]){5}[0-9a-f]{2}'
if platform.system() == 'Windows':
cmd = 'pnputil /enum-devices /connected'

View File

@@ -74,7 +74,7 @@ config WARN_DEPRECATED
config NOT_SECURE
bool
help
Symbol to be selected by a feature to inidicate that feature is
Symbol to be selected by a feature to indicate that feature is
not secure.
rsource "images/Kconfig"

View File

@@ -88,7 +88,7 @@ static int st_stm32_common_config(void)
#else
/* keeping in mind that debugging draws a lot of power we explcitly disable when not needed */
/* keeping in mind that debugging draws a lot of power we explicitly disable when not needed */
#if defined(CONFIG_SOC_SERIES_STM32F1X) || defined(CONFIG_SOC_SERIES_STM32L1X)
LL_DBGMCU_DisableDBGSleepMode();
LL_DBGMCU_DisableDBGStopMode();

View File

@@ -66,6 +66,6 @@ config CC13X2_CC26X2_XOSC_CAPARRAY_DELTA
range 0 0xFF
default 0xD5
help
Enable a specific cap array tunning delta.
Enable a specific cap array tuning delta.
endmenu

View File

@@ -27,7 +27,7 @@ config BINDESC_DEFINE_MAX_DATA_SIZE
help
Determines the maximum size of a binary descriptor's data. The theoretical
limit to this value is the maximum value of a uint16_t (65535), in practice
it's recommened to keep this value much smaller for easier handling of the data.
it's recommended to keep this value much smaller for easier handling of the data.
endif # BINDESC_DEFINE

View File

@@ -233,7 +233,7 @@ config BT_DIS_SYSTEM_ID_OUI
help
The OUI is a 24-bit number issued by the IEEE Registration Authority.
System ID characteristic in Device Information Service.
Shall contain an Organisationally Unique Identifier (OUI) followed by a manufacturer-defined indentifier unique for the device.
Shall contain an Organisationally Unique Identifier (OUI) followed by a manufacturer-defined identifier unique for the device.
config BT_DIS_SYSTEM_ID_IDENTIFIER
hex "Manufacturer-defined unique identifier."

View File

@@ -64,7 +64,7 @@ config ZMS_NO_DOUBLE_WRITE
bool "Avoid writing the same data again in the storage"
help
For some memory technologies, write cycles for memory cells are limited and any
unncessary writes should be avoided.
unnecessary writes should be avoided.
Enable this config to avoid rewriting data in the storage if it already exists.
This option will reduce write performance as it will need to do a research of the
data in the whole storage before any write.

View File

@@ -179,7 +179,7 @@ config HTTP_SERVER_RESTART_DELAY
range 1 60000
help
In case server restarts for any reason, the server re-initialization
will be delayed by this value (miliseconds). The delay is needed to
will be delayed by this value (milliseconds). The delay is needed to
allow any existing connections to finalize to avoid binding errors
during initialization.

View File

@@ -31,10 +31,10 @@ config OCPP_WSREADER_THREAD_STACKSIZE
OCPP websocket reader thread stacksize
config OCPP_RECV_BUFFER_SIZE
int "OCPP websocket recive buffer size"
int "OCPP websocket receive buffer size"
default 2048
help
OCPP websocket recive buffer size
OCPP websocket receive buffer size
config OCPP_INTERNAL_MSGQ_CNT
int "OCPP internal message queue count"
@@ -73,7 +73,7 @@ config OCPP_PROFILE_LOCAL_AUTH_LIST
help
Enables the OCPP library to support the Local Authorization List
functionality. Stores IdTag and its validity information in the
persistent stroage. Charge Point may support this as optional.
persistent storage. Charge Point may support this as optional.
config OCPP_PROFILE_FIRMWARE_MGNT
bool "OCPP profile firmware management"

View File

@@ -44,7 +44,7 @@ config WIFI_CREDENTIALS_MAX_ENTRIES
int "Number of supported WiFi credentials"
default 2
help
This detemines how many different WiFi networks can be configured at a time.
This determines how many different WiFi networks can be configured at a time.
config WIFI_CREDENTIALS_SAE_PASSWORD_LENGTH
int "Max. length of SAE password"

View File

@@ -3,7 +3,7 @@
# Copyright (c) 2025 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
menu "Platform Management Communication Infrastruction (PMCI)"
menu "Platform Management Communications Infrastructure (PMCI)"
# zephyr-keep-sorted-start

View File

@@ -5,7 +5,7 @@ menuconfig RETENTION_BOOTLOADER_INFO
bool "Bootloader info"
help
Adds a bootloader information sharing system which allows for
retreiving data from the bootloader when data sharing is enabled.
retrieving data from the bootloader when data sharing is enabled.
if RETENTION_BOOTLOADER_INFO

View File

@@ -333,7 +333,7 @@ config SHELL_MQTT_CONNECT_TIMEOUT_MS
int "MQTT connect timeout [ms]"
default 2000
help
Time to await MQTT connect acknowlegde in milliseconds.
Time to await MQTT connect acknowledge in milliseconds.
config SHELL_MQTT_WORK_DELAY_MS
int "MQTT work delay [ms]"

View File

@@ -54,7 +54,7 @@ config ZBUS_MSG_SUBSCRIBER_NET_BUF_POOL_ISOLATION
config ZBUS_MSG_SUBSCRIBER_NET_BUF_POOL_SIZE
default 16
int "The count of net_buf available to be used simutaneously."
int "The count of net_buf available to be used simultaneously."
if ZBUS_MSG_SUBSCRIBER_BUF_ALLOC_STATIC

View File

@@ -297,7 +297,7 @@ void test_reset_watchdog(uint32_t cause)
/* Flush cache as reboot may invalidate all lines. */
sys_cache_data_flush_range((void *) &machine_state, sizeof(machine_state));
LOG_INF("Watchdog shall fire in ~%u miliseconds", watchdog_window);
LOG_INF("Watchdog shall fire in ~%u milliseconds", watchdog_window);
print_bar();
k_sleep(K_FOREVER);
} else {

View File

@@ -434,7 +434,7 @@ static void test_srv_comp_data_status_respond(void)
atomic_set_bit(bt_mesh.flags, BT_MESH_COMP_DIRTY);
}
/* No server callback available. Wait 10 sec for message to be recived */
/* No server callback available. Wait 10 sec for message to be received */
k_sleep(K_SECONDS(10));
PASS();
@@ -449,7 +449,7 @@ static void test_srv_metadata_status_respond(void)
FAIL("Metadata is dirty. Test is not suited for this purpose.");
}
/* No server callback available. Wait 10 sec for message to be recived */
/* No server callback available. Wait 10 sec for message to be received */
k_sleep(K_SECONDS(10));
PASS();

View File

@@ -28,7 +28,7 @@ The Zephyr end of the CAN fixture can be configured as follows:
The host end of the CAN fixture can be configured through python-can. Available configuration
options depend on the type of host CAN adapter used. The python-can library provides a lot of
flexibility for configuration as decribed in the `python-can configuration`_ page, all centered
flexibility for configuration as described in the `python-can configuration`_ page, all centered
around the concept of a configuration "context. The configuration context for this test suite can be
configured as follows:

View File

@@ -14,6 +14,6 @@ config TEST_DRIVER_FLASH_SIZE
help
Expected flash device size the test will validate against. If the flash driver does not
support the get_size() API, leave this set as -1 to skip the test.
For the STM32 devices, the flash size is direclty given by the soc DTSI.
For the STM32 devices, the flash size is directly given by the soc DTSI.
source "Kconfig.zephyr"

View File

@@ -3,7 +3,7 @@ i2c ram test
Tests an i2c controller driver against a (s/f/nv)ram module doing a simple write and readback.
Excercises most of the i2c controller APIs in the process.
Exercises most of the i2c controller APIs in the process.
Hardware Setup
==============

View File

@@ -88,7 +88,7 @@ int main(void)
return 1;
}
LOG_INF("Watchdog shall fire in ~%u miliseconds", WDT_WINDOW_MAX);
LOG_INF("Watchdog shall fire in ~%u milliseconds", WDT_WINDOW_MAX);
k_sleep(K_FOREVER);
} else {
bool test_passing = true;

View File

@@ -1,5 +1,5 @@
# SPDX-License-Identifier: Apache-2.0
# Copyright (c) 2019 Nordic Semicondutor ASA
# Copyright (c) 2019 Nordic Semiconductor ASA
mainmenu "Timer Starvation Test"

View File

@@ -85,7 +85,7 @@ int test_ocpp_init(void)
net_dhcpv4_start(net_if_get_default());
/* wait for device dhcp ip recive */
/* wait for device dhcp ip receive */
k_sleep(K_SECONDS(3));
ret = ocpp_init(&cpi,

View File

@@ -1439,8 +1439,8 @@ send_next:
"%s:%d unexpected sequence number in original FIN, got %d",
__func__, __LINE__, get_rel_seq(th));
zassert_true(ntohl(th->th_ack) == 2,
"%s:%d unexpected acknowlegdement in original FIN, got %d",
__func__, __LINE__, ntohl(th->th_ack));
"%s:%d unexpected acknowledgment in original FIN, got %d", __func__,
__LINE__, ntohl(th->th_ack));
t_state = T_FIN_1;
/* retransmit the data that we already send*/
reply = prepare_data_packet(af, htons(MY_PORT),
@@ -1457,7 +1457,7 @@ send_next:
"%s:%i unexpected sequence number in retransmitted FIN, got %d",
__func__, __LINE__, get_rel_seq(th));
zassert_true(ntohl(th->th_ack) == 2,
"%s:%i unexpected acknowlegdement in retransmitted FIN, got %d",
"%s:%i unexpected acknowledgment in retransmitted FIN, got %d",
__func__, __LINE__, ntohl(th->th_ack));
ack = ack + 1U;
t_state = T_FIN_2;
@@ -1575,8 +1575,8 @@ static void handle_data_during_fin1_test(sa_family_t af, struct tcphdr *th)
"%s:%d unexpected sequence number in original FIN, got %d",
__func__, __LINE__, get_rel_seq(th));
zassert_true(ntohl(th->th_ack) == 1,
"%s:%d unexpected acknowlegdement in original FIN, got %d",
__func__, __LINE__, ntohl(th->th_ack));
"%s:%d unexpected acknowledgment in original FIN, got %d", __func__,
__LINE__, ntohl(th->th_ack));
ack = ack + 1U;

View File

@@ -1,4 +1,4 @@
# Configuration opions for Wi-Fi test
# Configuration options for Wi-Fi test
# Copyright (c) 2023 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

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