drivers: interrupt_controller: do not set sgi type
The GICD_ICFGR0 register is read only because SGIs are always edge-triggered. Signed-off-by: Nils Bosbach <bosbach@ice.rwth-aachen.de>
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committed by
Anas Nashif
parent
5aa835c66b
commit
2506d599a3
@@ -113,13 +113,16 @@ void arm_gic_irq_set_priority(
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int_grp = (irq / 16) * 4;
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int_off = (irq % 16) * 2;
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val = sys_read32(GICD_ICFGRn + int_grp);
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val &= ~(GICD_ICFGR_MASK << int_off);
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if (flags & IRQ_TYPE_EDGE) {
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val |= (GICD_ICFGR_TYPE << int_off);
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}
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/* GICD_ICFGR0 is read-only; SGIs are always edge-triggered */
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if (int_grp != 0) {
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val = sys_read32(GICD_ICFGRn + int_grp);
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val &= ~(GICD_ICFGR_MASK << int_off);
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if (flags & IRQ_TYPE_EDGE) {
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val |= (GICD_ICFGR_TYPE << int_off);
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}
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sys_write32(val, GICD_ICFGRn + int_grp);
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sys_write32(val, GICD_ICFGRn + int_grp);
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}
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}
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unsigned int arm_gic_get_active(void)
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