drivers: Update to use SOC_SERIES_NRF Kconfigs without X suffix
Updates usage of the old Kconfig to use the new Kconfig Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit is contained in:
committed by
Fabio Baltieri
parent
212b63a6ca
commit
3a9189aa3e
@@ -21,7 +21,7 @@ LOG_MODULE_REGISTER(dmic_nrfx_pdm, CONFIG_AUDIO_DMIC_LOG_LEVEL);
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#define NODE_AUDIO_AUXPLL DT_NODELABEL(audio_auxpll)
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#define NODE_AUDIOPLL DT_NODELABEL(audiopll)
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#if CONFIG_SOC_SERIES_NRF54HX
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#if CONFIG_SOC_SERIES_NRF54H
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#define DMIC_NRFX_CLOCK_FREQ MHZ(16)
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#define DMIC_NRFX_AUDIO_CLOCK_FREQ DT_PROP_OR(NODE_AUDIOPLL, frequency, 0)
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#elif DT_NODE_HAS_STATUS_OKAY(NODE_AUDIO_AUXPLL)
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@@ -46,18 +46,18 @@ config CLOCK_CONTROL_NRF_K32SRC_XTAL
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config CLOCK_CONTROL_NRF_K32SRC_SYNTH
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bool "Synthesized from HFCLK"
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depends on !SOC_SERIES_NRF91X
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depends on !SOC_SERIES_NRF91
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select NRFX_CLOCK_LF_SRC_SYNTH if !CLOCK_CONTROL_NRF_FORCE_ALT
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config CLOCK_CONTROL_NRF_K32SRC_EXT_LOW_SWING
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bool "External low swing"
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depends on SOC_SERIES_NRF52X
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depends on SOC_SERIES_NRF52
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select NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED if !CLOCK_CONTROL_NRF_FORCE_ALT
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select NRFX_CLOCK_LF_SRC_LOW_SWING if !CLOCK_CONTROL_NRF_FORCE_ALT
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config CLOCK_CONTROL_NRF_K32SRC_EXT_FULL_SWING
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bool "External full swing"
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depends on SOC_SERIES_NRF52X
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depends on SOC_SERIES_NRF52
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select NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED if !CLOCK_CONTROL_NRF_FORCE_ALT
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select NRFX_CLOCK_LF_SRC_FULL_SWING if !CLOCK_CONTROL_NRF_FORCE_ALT
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@@ -65,7 +65,7 @@ endchoice
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config CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION
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bool "LF clock calibration"
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depends on !SOC_SERIES_NRF91X && CLOCK_CONTROL_NRF_K32SRC_RC
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depends on !SOC_SERIES_NRF91 && CLOCK_CONTROL_NRF_K32SRC_RC
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default y if !SOC_NRF53_CPUNET_ENABLE
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select NRFX_CLOCK_LF_CAL_ENABLED if !CLOCK_CONTROL_NRF_FORCE_ALT
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help
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@@ -24,7 +24,7 @@ static ALWAYS_INLINE void pin_delay_asm(uint32_t delay)
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#endif
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}
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#if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
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#if defined(CONFIG_SOC_SERIES_NRF52) || defined(CONFIG_SOC_SERIES_NRF53)
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#include "swdp_ll_pin_nrf.h"
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@@ -96,7 +96,7 @@ BUILD_ASSERT(INST_0_SCK_FREQUENCY >= (NRF_QSPI_BASE_CLOCK_FREQ / 16),
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* need to be used to achieve the SCK frequency as close as possible (but not
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* higher) to the one specified in DT.
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*/
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#if defined(CONFIG_SOC_SERIES_NRF53X)
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#if defined(CONFIG_SOC_SERIES_NRF53)
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/*
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* On nRF53 Series SoCs, the default /4 divider for the HFCLK192M clock can
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* only be used when the QSPI peripheral is idle. When a QSPI operation is
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@@ -149,7 +149,7 @@ BUILD_ASSERT(INST_0_SCK_FREQUENCY >= (NRF_QSPI_BASE_CLOCK_FREQ / 16),
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#endif
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#endif /* defined(CONFIG_SOC_SERIES_NRF53X) */
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#endif /* defined(CONFIG_SOC_SERIES_NRF53) */
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/* 0 for MODE0 (CPOL=0, CPHA=0), 1 for MODE3 (CPOL=1, CPHA=1). */
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#define INST_0_SPI_MODE DT_INST_PROP(0, cpol)
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@@ -257,7 +257,7 @@ static inline void qspi_unlock(const struct device *dev)
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static inline void qspi_clock_div_change(const struct device *dev)
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{
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#ifdef CONFIG_SOC_SERIES_NRF53X
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#ifdef CONFIG_SOC_SERIES_NRF53
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#if NRF53_ERRATA_159_ENABLE_WORKAROUND
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struct qspi_nor_data *dev_data = dev->data;
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@@ -277,7 +277,7 @@ static inline void qspi_clock_div_change(const struct device *dev)
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static inline void qspi_clock_div_restore(const struct device *dev)
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{
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#ifdef CONFIG_SOC_SERIES_NRF53X
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#ifdef CONFIG_SOC_SERIES_NRF53
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/* Restore the default base clock divider to reduce power
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* consumption when the QSPI peripheral is idle.
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*/
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@@ -5,7 +5,7 @@ config HWINFO_NRF
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bool "NRF device ID"
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default y
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depends on SOC_FAMILY_NORDIC_NRF
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depends on SOC_SERIES_NRF54HX || NRF_SOC_SECURE_SUPPORTED
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depends on SOC_SERIES_NRF54H || NRF_SOC_SECURE_SUPPORTED
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select HWINFO_HAS_DRIVER
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help
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Enable Nordic NRF hwinfo driver.
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@@ -22,7 +22,7 @@ config I2S_NRFX_TX_BLOCK_COUNT
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config I2S_NRFX_ALLOW_MCK_BYPASS
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bool "Allow MCK bypass if a ratio exists"
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depends on SOC_SERIES_NRF53X
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depends on SOC_SERIES_NRF53
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help
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Search for a supported ratio directly from MCK and LRCK
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and enable bypass if a ratio exists. If not, fallback to
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@@ -41,7 +41,7 @@ config IEEE802154_NRF5_EXT_IRQ_MGMT
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config IEEE802154_NRF5_UICR_EUI64_ENABLE
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bool "Support usage of EUI64 value stored in UICR registers"
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depends on !IEEE802154_VENDOR_OUI_ENABLE
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depends on SOC_SERIES_NRF52X || SOC_SERIES_NRF53X || SOC_SERIES_NRF54LX
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depends on SOC_SERIES_NRF52 || SOC_SERIES_NRF53 || SOC_SERIES_NRF54L
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help
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This option enables setting custom vendor EUI64 value
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stored in User information configuration registers (UICR).
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@@ -53,9 +53,9 @@ if IEEE802154_NRF5_UICR_EUI64_ENABLE
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config IEEE802154_NRF5_UICR_EUI64_REG
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int "UICR base register for the EUI64 value"
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range 0 30 if SOC_SERIES_NRF52X
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range 0 190 if SOC_SERIES_NRF53X
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range 0 318 if SOC_SERIES_NRF54LX
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range 0 30 if SOC_SERIES_NRF52
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range 0 190 if SOC_SERIES_NRF53
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range 0 318 if SOC_SERIES_NRF54L
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default 0
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help
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Base of the two consecutive registers from the UICR customer
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@@ -71,7 +71,7 @@ static const struct device *nrf5_dev;
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#define NSEC_PER_TEN_SYMBOLS (10 * IEEE802154_PHY_OQPSK_780_TO_2450MHZ_SYMBOL_PERIOD_NS)
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#if defined(CONFIG_IEEE802154_NRF5_UICR_EUI64_ENABLE)
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#if defined(CONFIG_SOC_NRF5340_CPUAPP) || defined(CONFIG_SOC_SERIES_NRF54LX)
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#if defined(CONFIG_SOC_NRF5340_CPUAPP) || defined(CONFIG_SOC_SERIES_NRF54L)
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#if defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
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#error "NRF_UICR->OTP is not supported to read from non-secure"
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#else
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@@ -79,7 +79,7 @@ static const struct device *nrf5_dev;
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#endif /* CONFIG_TRUSTED_EXECUTION_NONSECURE */
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#else
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#define EUI64_ADDR (NRF_UICR->CUSTOMER)
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#endif /* CONFIG_SOC_NRF5340_CPUAPP || CONFIG_SOC_SERIES_NRF54LX*/
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#endif /* CONFIG_SOC_NRF5340_CPUAPP || CONFIG_SOC_SERIES_NRF54L */
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#endif /* CONFIG_IEEE802154_NRF5_UICR_EUI64_ENABLE */
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#if defined(CONFIG_IEEE802154_NRF5_UICR_EUI64_ENABLE)
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@@ -56,7 +56,7 @@ config WS2812_STRIP_GPIO
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# nRF52 and nRF53 is supported currently.
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default y
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depends on DT_HAS_WORLDSEMI_WS2812_GPIO_ENABLED
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depends on (SOC_SERIES_NRF91X || SOC_SERIES_NRF51X || SOC_SERIES_NRF52X || SOC_SERIES_NRF53X)
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depends on (SOC_SERIES_NRF91 || SOC_SERIES_NRF51 || SOC_SERIES_NRF52 || SOC_SERIES_NRF53)
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help
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Enable driver for WS2812 (and compatible) LED strips directly
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controlling with GPIO. The GPIO driver does bit-banging with inline
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@@ -17,5 +17,5 @@ config MBOX_NRF_VEVIF_EVENT_TX
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config MBOX_NRF_VEVIF_EVENT_USE_54L_ERRATA_16
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bool "Apply errata 16 for nRF54L series"
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depends on SOC_SERIES_NRF54LX
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depends on SOC_SERIES_NRF54L
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default y
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@@ -80,7 +80,7 @@ endif # MODEM_HL78XX_AT_SHELL
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menuconfig MODEM_HL78XX_AUTO_BAUDRATE
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bool "Auto Baud Rate Detection and Switching"
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select UART_USE_RUNTIME_CONFIGURE if SOC_SERIES_NRF52X
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select UART_USE_RUNTIME_CONFIGURE if SOC_SERIES_NRF52
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help
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Enable automatic baud rate detection and switching for the HL78xx modem.
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The driver will attempt to detect the modem's current baud rate and
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@@ -1898,7 +1898,7 @@ static int usb_init(void)
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.dcdcen = (DT_PROP(DT_INST(0, nordic_nrf5x_regulator), regulator_initial_mode)
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== NRF5X_REG_MODE_DCDC),
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#if NRFX_POWER_SUPPORTS_DCDCEN_VDDH
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.dcdcenhv = COND_CODE_1(CONFIG_SOC_SERIES_NRF52X,
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.dcdcenhv = COND_CODE_1(CONFIG_SOC_SERIES_NRF52,
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(DT_NODE_HAS_STATUS_OKAY(DT_INST(0, nordic_nrf52x_regulator_hv))),
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(DT_NODE_HAS_STATUS_OKAY(DT_INST(0, nordic_nrf53x_regulator_hv)))),
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#endif
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@@ -50,7 +50,7 @@ config UDC_DWC2_THREAD_PRIORITY
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config UDC_DWC2_USBHS_VBUS_READY_TIMEOUT
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int "UDC DWC2 USBHS VBUS ready event timeout in ms"
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depends on SOC_SERIES_NRF54HX || SOC_SERIES_NRF54LX || SOC_SERIES_NRF92X
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depends on SOC_SERIES_NRF54H || SOC_SERIES_NRF54L || SOC_SERIES_NRF92
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default 0
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help
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UDC DWC2 USBHS VBUS ready event timeout. If the VBUS is not ready
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@@ -1880,7 +1880,7 @@ static const struct udc_nrf_config udc_nrf_cfg = {
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.dcdcen = (DT_PROP(DT_INST(0, nordic_nrf5x_regulator), regulator_initial_mode)
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== NRF5X_REG_MODE_DCDC),
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#if NRFX_POWER_SUPPORTS_DCDCEN_VDDH
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.dcdcenhv = COND_CODE_1(CONFIG_SOC_SERIES_NRF52X,
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.dcdcenhv = COND_CODE_1(CONFIG_SOC_SERIES_NRF52,
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(DT_NODE_HAS_STATUS_OKAY(DT_INST(0, nordic_nrf52x_regulator_hv))),
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(DT_NODE_HAS_STATUS_OKAY(DT_INST(0, nordic_nrf53x_regulator_hv)))),
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#endif
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@@ -10,7 +10,7 @@ menuconfig WIFI_NRF70
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select NET_L2_WIFI_MGMT if NETWORKING
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select NET_L2_ETHERNET_MGMT if NETWORKING && NET_L2_ETHERNET
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select WIFI_USE_NATIVE_NETWORKING if NETWORKING
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select EXPERIMENTAL if !SOC_SERIES_NRF53X && !SOC_SERIES_NRF91X
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select EXPERIMENTAL if !SOC_SERIES_NRF53 && !SOC_SERIES_NRF91
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select NRF70_BUSLIB
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default y
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depends on \
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@@ -933,7 +933,7 @@ config NRF_WIFI_ZERO_COPY_TX
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select NET_L2_ETHERNET_RESERVE_HEADER
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select EXPERIMENTAL
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# 54L has lower RAM
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default y if SOC_SERIES_NRF54LX
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default y if SOC_SERIES_NRF54L
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help
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Enable this configuration to use zero copy Transmit path.
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The driver will use the network buffer directly for transmission
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