drivers: Update to use SOC_SERIES_NRF Kconfigs without X suffix

Updates usage of the old Kconfig to use the new Kconfig

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit is contained in:
Jamie McCrae
2026-01-15 09:02:59 +00:00
committed by Fabio Baltieri
parent 212b63a6ca
commit 3a9189aa3e
15 changed files with 26 additions and 26 deletions

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@@ -21,7 +21,7 @@ LOG_MODULE_REGISTER(dmic_nrfx_pdm, CONFIG_AUDIO_DMIC_LOG_LEVEL);
#define NODE_AUDIO_AUXPLL DT_NODELABEL(audio_auxpll)
#define NODE_AUDIOPLL DT_NODELABEL(audiopll)
#if CONFIG_SOC_SERIES_NRF54HX
#if CONFIG_SOC_SERIES_NRF54H
#define DMIC_NRFX_CLOCK_FREQ MHZ(16)
#define DMIC_NRFX_AUDIO_CLOCK_FREQ DT_PROP_OR(NODE_AUDIOPLL, frequency, 0)
#elif DT_NODE_HAS_STATUS_OKAY(NODE_AUDIO_AUXPLL)

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@@ -46,18 +46,18 @@ config CLOCK_CONTROL_NRF_K32SRC_XTAL
config CLOCK_CONTROL_NRF_K32SRC_SYNTH
bool "Synthesized from HFCLK"
depends on !SOC_SERIES_NRF91X
depends on !SOC_SERIES_NRF91
select NRFX_CLOCK_LF_SRC_SYNTH if !CLOCK_CONTROL_NRF_FORCE_ALT
config CLOCK_CONTROL_NRF_K32SRC_EXT_LOW_SWING
bool "External low swing"
depends on SOC_SERIES_NRF52X
depends on SOC_SERIES_NRF52
select NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED if !CLOCK_CONTROL_NRF_FORCE_ALT
select NRFX_CLOCK_LF_SRC_LOW_SWING if !CLOCK_CONTROL_NRF_FORCE_ALT
config CLOCK_CONTROL_NRF_K32SRC_EXT_FULL_SWING
bool "External full swing"
depends on SOC_SERIES_NRF52X
depends on SOC_SERIES_NRF52
select NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED if !CLOCK_CONTROL_NRF_FORCE_ALT
select NRFX_CLOCK_LF_SRC_FULL_SWING if !CLOCK_CONTROL_NRF_FORCE_ALT
@@ -65,7 +65,7 @@ endchoice
config CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION
bool "LF clock calibration"
depends on !SOC_SERIES_NRF91X && CLOCK_CONTROL_NRF_K32SRC_RC
depends on !SOC_SERIES_NRF91 && CLOCK_CONTROL_NRF_K32SRC_RC
default y if !SOC_NRF53_CPUNET_ENABLE
select NRFX_CLOCK_LF_CAL_ENABLED if !CLOCK_CONTROL_NRF_FORCE_ALT
help

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@@ -24,7 +24,7 @@ static ALWAYS_INLINE void pin_delay_asm(uint32_t delay)
#endif
}
#if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_SERIES_NRF52) || defined(CONFIG_SOC_SERIES_NRF53)
#include "swdp_ll_pin_nrf.h"

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@@ -96,7 +96,7 @@ BUILD_ASSERT(INST_0_SCK_FREQUENCY >= (NRF_QSPI_BASE_CLOCK_FREQ / 16),
* need to be used to achieve the SCK frequency as close as possible (but not
* higher) to the one specified in DT.
*/
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_SERIES_NRF53)
/*
* On nRF53 Series SoCs, the default /4 divider for the HFCLK192M clock can
* only be used when the QSPI peripheral is idle. When a QSPI operation is
@@ -149,7 +149,7 @@ BUILD_ASSERT(INST_0_SCK_FREQUENCY >= (NRF_QSPI_BASE_CLOCK_FREQ / 16),
#endif
#endif /* defined(CONFIG_SOC_SERIES_NRF53X) */
#endif /* defined(CONFIG_SOC_SERIES_NRF53) */
/* 0 for MODE0 (CPOL=0, CPHA=0), 1 for MODE3 (CPOL=1, CPHA=1). */
#define INST_0_SPI_MODE DT_INST_PROP(0, cpol)
@@ -257,7 +257,7 @@ static inline void qspi_unlock(const struct device *dev)
static inline void qspi_clock_div_change(const struct device *dev)
{
#ifdef CONFIG_SOC_SERIES_NRF53X
#ifdef CONFIG_SOC_SERIES_NRF53
#if NRF53_ERRATA_159_ENABLE_WORKAROUND
struct qspi_nor_data *dev_data = dev->data;
@@ -277,7 +277,7 @@ static inline void qspi_clock_div_change(const struct device *dev)
static inline void qspi_clock_div_restore(const struct device *dev)
{
#ifdef CONFIG_SOC_SERIES_NRF53X
#ifdef CONFIG_SOC_SERIES_NRF53
/* Restore the default base clock divider to reduce power
* consumption when the QSPI peripheral is idle.
*/

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@@ -5,7 +5,7 @@ config HWINFO_NRF
bool "NRF device ID"
default y
depends on SOC_FAMILY_NORDIC_NRF
depends on SOC_SERIES_NRF54HX || NRF_SOC_SECURE_SUPPORTED
depends on SOC_SERIES_NRF54H || NRF_SOC_SECURE_SUPPORTED
select HWINFO_HAS_DRIVER
help
Enable Nordic NRF hwinfo driver.

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@@ -22,7 +22,7 @@ config I2S_NRFX_TX_BLOCK_COUNT
config I2S_NRFX_ALLOW_MCK_BYPASS
bool "Allow MCK bypass if a ratio exists"
depends on SOC_SERIES_NRF53X
depends on SOC_SERIES_NRF53
help
Search for a supported ratio directly from MCK and LRCK
and enable bypass if a ratio exists. If not, fallback to

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@@ -41,7 +41,7 @@ config IEEE802154_NRF5_EXT_IRQ_MGMT
config IEEE802154_NRF5_UICR_EUI64_ENABLE
bool "Support usage of EUI64 value stored in UICR registers"
depends on !IEEE802154_VENDOR_OUI_ENABLE
depends on SOC_SERIES_NRF52X || SOC_SERIES_NRF53X || SOC_SERIES_NRF54LX
depends on SOC_SERIES_NRF52 || SOC_SERIES_NRF53 || SOC_SERIES_NRF54L
help
This option enables setting custom vendor EUI64 value
stored in User information configuration registers (UICR).
@@ -53,9 +53,9 @@ if IEEE802154_NRF5_UICR_EUI64_ENABLE
config IEEE802154_NRF5_UICR_EUI64_REG
int "UICR base register for the EUI64 value"
range 0 30 if SOC_SERIES_NRF52X
range 0 190 if SOC_SERIES_NRF53X
range 0 318 if SOC_SERIES_NRF54LX
range 0 30 if SOC_SERIES_NRF52
range 0 190 if SOC_SERIES_NRF53
range 0 318 if SOC_SERIES_NRF54L
default 0
help
Base of the two consecutive registers from the UICR customer

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@@ -71,7 +71,7 @@ static const struct device *nrf5_dev;
#define NSEC_PER_TEN_SYMBOLS (10 * IEEE802154_PHY_OQPSK_780_TO_2450MHZ_SYMBOL_PERIOD_NS)
#if defined(CONFIG_IEEE802154_NRF5_UICR_EUI64_ENABLE)
#if defined(CONFIG_SOC_NRF5340_CPUAPP) || defined(CONFIG_SOC_SERIES_NRF54LX)
#if defined(CONFIG_SOC_NRF5340_CPUAPP) || defined(CONFIG_SOC_SERIES_NRF54L)
#if defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
#error "NRF_UICR->OTP is not supported to read from non-secure"
#else
@@ -79,7 +79,7 @@ static const struct device *nrf5_dev;
#endif /* CONFIG_TRUSTED_EXECUTION_NONSECURE */
#else
#define EUI64_ADDR (NRF_UICR->CUSTOMER)
#endif /* CONFIG_SOC_NRF5340_CPUAPP || CONFIG_SOC_SERIES_NRF54LX*/
#endif /* CONFIG_SOC_NRF5340_CPUAPP || CONFIG_SOC_SERIES_NRF54L */
#endif /* CONFIG_IEEE802154_NRF5_UICR_EUI64_ENABLE */
#if defined(CONFIG_IEEE802154_NRF5_UICR_EUI64_ENABLE)

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@@ -56,7 +56,7 @@ config WS2812_STRIP_GPIO
# nRF52 and nRF53 is supported currently.
default y
depends on DT_HAS_WORLDSEMI_WS2812_GPIO_ENABLED
depends on (SOC_SERIES_NRF91X || SOC_SERIES_NRF51X || SOC_SERIES_NRF52X || SOC_SERIES_NRF53X)
depends on (SOC_SERIES_NRF91 || SOC_SERIES_NRF51 || SOC_SERIES_NRF52 || SOC_SERIES_NRF53)
help
Enable driver for WS2812 (and compatible) LED strips directly
controlling with GPIO. The GPIO driver does bit-banging with inline

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@@ -17,5 +17,5 @@ config MBOX_NRF_VEVIF_EVENT_TX
config MBOX_NRF_VEVIF_EVENT_USE_54L_ERRATA_16
bool "Apply errata 16 for nRF54L series"
depends on SOC_SERIES_NRF54LX
depends on SOC_SERIES_NRF54L
default y

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@@ -80,7 +80,7 @@ endif # MODEM_HL78XX_AT_SHELL
menuconfig MODEM_HL78XX_AUTO_BAUDRATE
bool "Auto Baud Rate Detection and Switching"
select UART_USE_RUNTIME_CONFIGURE if SOC_SERIES_NRF52X
select UART_USE_RUNTIME_CONFIGURE if SOC_SERIES_NRF52
help
Enable automatic baud rate detection and switching for the HL78xx modem.
The driver will attempt to detect the modem's current baud rate and

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@@ -1898,7 +1898,7 @@ static int usb_init(void)
.dcdcen = (DT_PROP(DT_INST(0, nordic_nrf5x_regulator), regulator_initial_mode)
== NRF5X_REG_MODE_DCDC),
#if NRFX_POWER_SUPPORTS_DCDCEN_VDDH
.dcdcenhv = COND_CODE_1(CONFIG_SOC_SERIES_NRF52X,
.dcdcenhv = COND_CODE_1(CONFIG_SOC_SERIES_NRF52,
(DT_NODE_HAS_STATUS_OKAY(DT_INST(0, nordic_nrf52x_regulator_hv))),
(DT_NODE_HAS_STATUS_OKAY(DT_INST(0, nordic_nrf53x_regulator_hv)))),
#endif

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@@ -50,7 +50,7 @@ config UDC_DWC2_THREAD_PRIORITY
config UDC_DWC2_USBHS_VBUS_READY_TIMEOUT
int "UDC DWC2 USBHS VBUS ready event timeout in ms"
depends on SOC_SERIES_NRF54HX || SOC_SERIES_NRF54LX || SOC_SERIES_NRF92X
depends on SOC_SERIES_NRF54H || SOC_SERIES_NRF54L || SOC_SERIES_NRF92
default 0
help
UDC DWC2 USBHS VBUS ready event timeout. If the VBUS is not ready

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@@ -1880,7 +1880,7 @@ static const struct udc_nrf_config udc_nrf_cfg = {
.dcdcen = (DT_PROP(DT_INST(0, nordic_nrf5x_regulator), regulator_initial_mode)
== NRF5X_REG_MODE_DCDC),
#if NRFX_POWER_SUPPORTS_DCDCEN_VDDH
.dcdcenhv = COND_CODE_1(CONFIG_SOC_SERIES_NRF52X,
.dcdcenhv = COND_CODE_1(CONFIG_SOC_SERIES_NRF52,
(DT_NODE_HAS_STATUS_OKAY(DT_INST(0, nordic_nrf52x_regulator_hv))),
(DT_NODE_HAS_STATUS_OKAY(DT_INST(0, nordic_nrf53x_regulator_hv)))),
#endif

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@@ -10,7 +10,7 @@ menuconfig WIFI_NRF70
select NET_L2_WIFI_MGMT if NETWORKING
select NET_L2_ETHERNET_MGMT if NETWORKING && NET_L2_ETHERNET
select WIFI_USE_NATIVE_NETWORKING if NETWORKING
select EXPERIMENTAL if !SOC_SERIES_NRF53X && !SOC_SERIES_NRF91X
select EXPERIMENTAL if !SOC_SERIES_NRF53 && !SOC_SERIES_NRF91
select NRF70_BUSLIB
default y
depends on \
@@ -933,7 +933,7 @@ config NRF_WIFI_ZERO_COPY_TX
select NET_L2_ETHERNET_RESERVE_HEADER
select EXPERIMENTAL
# 54L has lower RAM
default y if SOC_SERIES_NRF54LX
default y if SOC_SERIES_NRF54L
help
Enable this configuration to use zero copy Transmit path.
The driver will use the network buffer directly for transmission