cache: deprecate CONFIG_DOUBLEMAP
Use CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS instead. The new kconfig reflects more correctly on what is going on in hardware. Also, this is not enabled by default if CPU cache is not coherent. CPU cache can be incoherent and yet there are no mirrored memory regions. Those relying on this deprecated default behavior has their config adding CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS separately. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
committed by
Henrik Brix Andersen
parent
0540d274c0
commit
3e33978078
16
arch/Kconfig
16
arch/Kconfig
@@ -1078,10 +1078,22 @@ config ICACHE
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help
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This option enables the support for the instruction cache (i-cache).
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config CACHE_HAS_MIRRORED_MEMORY_REGIONS
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bool "Mirrored memory region(s) for both cached and uncached access"
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depends on CPU_CACHE_INCOHERENT
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help
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Enable this if hardware has mirrored memory regions at different
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addressed when accessing one would go through cache, but accessing
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the other would go to memory directly. A pointer can be cheaply
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converted to cached or uncached access.
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This applies to intra-CPU multiprocessing incoherence and makes only
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sense when MP_MAX_NUM_CPUS > 1.
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config CACHE_DOUBLEMAP
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bool "Cache double-mapping support"
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depends on CPU_CACHE_INCOHERENT
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default y
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select CACHE_HAS_MIRRORED_MEMORY_REGIONS
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select DEPRECATED
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help
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Double-mapping behavior where a pointer can be cheaply converted to
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point to the same cached/uncached memory at different locations.
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@@ -196,6 +196,11 @@ Modem HL78XX
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Other subsystems
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****************
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* Cache
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* Use :kconfig:option:`CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS` instead of
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:kconfig:option:`CONFIG_CACHE_DOUBLEMAP` as the former is more descriptive of the feature.
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JWT
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===
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@@ -337,7 +337,7 @@ size_t arch_icache_line_size_get(void);
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#endif /* CONFIG_ICACHE || __DOXYGEN__ */
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#if CONFIG_CACHE_DOUBLEMAP || __DOXYGEN__
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#if CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS || __DOXYGEN__
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bool arch_cache_is_ptr_cached(void *ptr);
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#define cache_is_ptr_cached(ptr) arch_cache_is_ptr_cached(ptr)
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@@ -349,7 +349,7 @@ void __sparse_cache *arch_cache_cached_ptr_get(void *ptr);
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void *arch_cache_uncached_ptr_get(void __sparse_cache *ptr);
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#define cache_uncached_ptr(ptr) arch_cache_uncached_ptr_get(ptr)
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#endif /* CONFIG_CACHE_DOUBLEMAP */
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#endif /* CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS */
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void arch_cache_init(void);
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@@ -449,7 +449,7 @@ static ALWAYS_INLINE size_t sys_cache_instr_line_size_get(void)
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*/
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static ALWAYS_INLINE bool sys_cache_is_ptr_cached(void *ptr)
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{
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#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_DOUBLEMAP)
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#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS)
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return cache_is_ptr_cached(ptr);
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#else
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ARG_UNUSED(ptr);
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@@ -473,7 +473,7 @@ static ALWAYS_INLINE bool sys_cache_is_ptr_cached(void *ptr)
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*/
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static ALWAYS_INLINE bool sys_cache_is_ptr_uncached(void *ptr)
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{
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#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_DOUBLEMAP)
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#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS)
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return cache_is_ptr_uncached(ptr);
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#else
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ARG_UNUSED(ptr);
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@@ -492,8 +492,8 @@ static ALWAYS_INLINE bool sys_cache_is_ptr_uncached(void *ptr)
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* the current CPU if they exist, and writes will go first into the
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* cache and be written back later.
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*
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* @note This API returns the same pointer if CONFIG_CACHE_DOUBLEMAP is not
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* enabled.
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* @note This API returns the same pointer if
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* CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS is not enabled.
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*
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* @see arch_uncached_ptr()
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*
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@@ -502,7 +502,7 @@ static ALWAYS_INLINE bool sys_cache_is_ptr_uncached(void *ptr)
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*/
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static ALWAYS_INLINE void __sparse_cache *sys_cache_cached_ptr_get(void *ptr)
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{
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#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_DOUBLEMAP)
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#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS)
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return cache_cached_ptr(ptr);
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#else
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return (__sparse_force void __sparse_cache *)ptr;
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@@ -517,8 +517,8 @@ static ALWAYS_INLINE void __sparse_cache *sys_cache_cached_ptr_get(void *ptr)
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* refer to the same memory while bypassing the L1 data cache. Data
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* in the L1 cache will not be inspected nor modified by the access.
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*
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* @note This API returns the same pointer if CONFIG_CACHE_DOUBLEMAP is not
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* enabled.
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* @note This API returns the same pointer if
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* CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS is not enabled.
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*
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* @see arch_cached_ptr()
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*
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@@ -527,7 +527,7 @@ static ALWAYS_INLINE void __sparse_cache *sys_cache_cached_ptr_get(void *ptr)
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*/
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static ALWAYS_INLINE void *sys_cache_uncached_ptr_get(void __sparse_cache *ptr)
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{
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#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_DOUBLEMAP)
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#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS)
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return cache_uncached_ptr(ptr);
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#else
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return (__sparse_force void *)ptr;
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@@ -18,23 +18,27 @@ config SOC_SERIES_INTEL_ADSP_ACE15
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select XTENSA_CPU_HAS_HIFI3
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select XTENSA_CPU_HAS_HIFI4
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select INTEL_ADSP_MEMORY_IS_MIRRORED
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select CACHE_HAS_MIRRORED_MEMORY_REGIONS
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config SOC_SERIES_INTEL_ADSP_ACE20
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select XTENSA_CPU_HAS_HIFI3
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select XTENSA_CPU_HAS_HIFI4
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select INTEL_ADSP_MEMORY_IS_MIRRORED
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select CACHE_HAS_MIRRORED_MEMORY_REGIONS
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config SOC_SERIES_INTEL_ADSP_ACE30
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select XTENSA_CPU_HAS_HIFI3
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select XTENSA_CPU_HAS_HIFI4
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select INTEL_ADSP_MEMORY_IS_MIRRORED
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select KERNEL_VM_USE_CUSTOM_MEM_RANGE_CHECK if XTENSA_MMU
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select CACHE_HAS_MIRRORED_MEMORY_REGIONS
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config SOC_SERIES_INTEL_ADSP_ACE40
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select XTENSA_CPU_HAS_HIFI3
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select XTENSA_CPU_HAS_HIFI4
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select INTEL_ADSP_MEMORY_IS_MIRRORED
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select KERNEL_VM_USE_CUSTOM_MEM_RANGE_CHECK if XTENSA_MMU
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select CACHE_HAS_MIRRORED_MEMORY_REGIONS
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config SOC_INTEL_COMM_WIDGET
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bool "Intel Communication Widget driver"
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@@ -13,6 +13,7 @@ config SOC_SERIES_INTEL_ADSP_CAVS
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select ARCH_HAS_GDBSTUB
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select HAS_PM
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select INTEL_ADSP_MEMORY_IS_MIRRORED
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select CACHE_HAS_MIRRORED_MEMORY_REGIONS
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config SOC_INTEL_CAVS_V25
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select XTENSA_WAITI_BUG
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@@ -47,7 +47,7 @@ extern "C" {
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#endif /* CONFIG_ICACHE */
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#if defined(CONFIG_CACHE_DOUBLEMAP)
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#if defined(CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS)
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/**
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* @brief Test if a pointer is in cached region.
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*
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