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boards: stm32f4: add missing pll properties

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With the new PLL bindings, fixes a few board dts and overlays
that are missing some properties.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This commit is contained in:
Guillaume Gautier
2025-12-09 15:49:36 +01:00
committed by Maureen Helm
parent 21e433eed6
commit 4bf38ff694
4 changed files with 6 additions and 1 deletions
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1
boards/96boards/stm32_sensor_mez/96b_stm32_sensor_mez.dts
View File

@@ -80,6 +80,7 @@
mul-n = <192>;
div-r = <3>;
div-q = <4>;
post-div-q = <1>;
clocks = <&clk_hse>;
status = "okay"; /* 48MHz on PLLI2SQ */
};

2
boards/st/stm32f4_disco/stm32f4_disco.dts
View File

@@ -200,8 +200,10 @@ zephyr_udc0: &usbotg_fs {
* Note: because the PLLI2S is dependent on the main PLL, the latter
* should not be changed without checking impact on PLLI2S
*/
div-m = <8>;
mul-n = <271>;
div-r = <2>;
clocks = <&clk_hse>;
status = "okay";
};

2
tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/f4_i2s2_pll.overlay
View File

@@ -64,8 +64,10 @@
};
&plli2s {
div-m = <8>;
mul-n = <384>;
div-r = <2>;
clocks = <&clk_hse>;
status = "okay";
};

2
tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/src/test_stm32_clock_configuration_sdmmc.c
View File

@@ -20,7 +20,7 @@
#warning "Missing clock 48MHz"
#endif
#if !DT_HAS_COMPAT_STATUS_OKAY(st_stm32f411_plli2s_clock)
#ifndef STM32_PLLI2S_ENABLED
#warning "Missing clock I2S PLL clock"
#endif