soc: add realtek amebad SOC integration

Add initial version of Amebad Soc integration

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>

soc/realtek/ameba/amebad/CMakeLists.txt

@@ -0,0 +1,9 @@
+# Copyright (c) 2024 Realtek Semiconductor Corp.
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_include_directories(.)
+
+zephyr_sources(soc.c)
+
+zephyr_linker_sources(SECTIONS boot_section.ld)
+set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")

soc/realtek/ameba/amebad/Kconfig

@@ -0,0 +1,16 @@
+# Copyright (c) 2024 Realtek Semiconductor Corp.
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_AMEBAD
+	select ARM
+	select CPU_CORTEX_M33
+	select CPU_HAS_DCACHE
+	select CPU_HAS_ICACHE
+	select CPU_HAS_ARM_SAU
+	select CPU_HAS_FPU
+	select CPU_HAS_VFP
+	select ARMV8_M_DSP
+	select CPU_HAS_ARM_MPU
+	select ARM_MPU
+	select ARM_TRUSTZONE_M
+	select ARM_ON_EXIT_CPU_IDLE

soc/realtek/ameba/amebad/Kconfig.defconfig

@@ -0,0 +1,15 @@
+# Copyright (c) 2024 Realtek Semiconductor Corp.
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_SERIES_AMEBAD
+
+config NUM_IRQS
+	default 64
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default $(dt_node_int_prop_int,/clocks/clk_sys,clock-frequency)
+
+config CACHE_MANAGEMENT
+	default y
+
+endif #SOC_SERIES_AMEBAD

soc/realtek/ameba/amebad/Kconfig.soc

@@ -0,0 +1,16 @@
+# Copyright (c) 2024 Realtek Semiconductor Corp.
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_AMEBAD
+	bool
+	select SOC_FAMILY_REALTEK_AMEBA
+
+config SOC_SERIES
+	default "amebad" if SOC_SERIES_AMEBAD
+
+config SOC_RTL872XD
+	bool
+	select SOC_SERIES_AMEBAD
+
+config SOC
+	default "rtl872xd" if SOC_RTL872XD

soc/realtek/ameba/amebad/boot_section.ld

@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2024 Realtek Semiconductor Corp.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+SECTION_PROLOGUE(.ram_image2.entry,,SUBALIGN(32))
+{
+	__image2_entry_func__ = .;
+	KEEP(*(SORT(.image2.entry.data*)))
+	. = ALIGN(32);
+} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
+
+SECTION_PROLOGUE(.psram_image2.text.data,,)
+{
+	__image2_backtrace_start__ = .;
+	*(*.sramdram.only.text)
+
+	__ipc_table_start__ = .;
+	KEEP(*(*.ipc.table.data*))
+	__ipc_table_end__ = .;
+
+	__image2_backtrace_end__ = .;
+} GROUP_LINK_IN(ROMABLE_REGION)

soc/realtek/ameba/amebad/pinctrl_soc.h

@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2024 Realtek Semiconductor Corp.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_SOC_REALTEK_AMEBA_AMEBAD_PINCTRL_SOC_H_
+#define ZEPHYR_SOC_REALTEK_AMEBA_AMEBAD_PINCTRL_SOC_H_
+
+#include <zephyr/devicetree.h>
+#include <zephyr/types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct pinctrl_soc_pin {
+	uint32_t pinmux: 15;
+	/* bit[14:13] port
+	 * bit[12:8] pin
+	 * bit[7:0] function ID
+	 */
+	uint32_t pull_down: 1;
+	uint32_t pull_up: 1;
+	uint32_t schmitt_disable: 1;
+	uint32_t slew_rate_slow: 1;
+	uint32_t drive_strength_low: 1;
+	uint32_t digital_input_disable: 1;
+	uint32_t swd_off: 1;
+};
+
+typedef struct pinctrl_soc_pin pinctrl_soc_pin_t;
+
+#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx)                                               \
+	{                                                                                          \
+		.pinmux = DT_PROP_BY_IDX(node_id, prop, idx),                                      \
+		.pull_down = DT_PROP(node_id, bias_pull_down),                                     \
+		.pull_up = DT_PROP(node_id, bias_pull_up),                                         \
+		.schmitt_disable = DT_PROP(node_id, input_schmitt_disable),                        \
+		.slew_rate_slow = DT_PROP(node_id, slew_rate_slow),                                \
+		.drive_strength_low = DT_PROP(node_id, drive_strength_low),                        \
+		.digital_input_disable = DT_PROP(node_id, digital_input_disable),                  \
+		.swd_off = DT_PROP(node_id, swd_off),                                              \
+	},
+
+#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop)                                                   \
+	{DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), DT_FOREACH_PROP_ELEM, pinmux,           \
+				Z_PINCTRL_STATE_PIN_INIT)}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ZEPHYR_SOC_REALTEK_AMEBA_AMEBAD_PINCTRL_SOC_H_ */

soc/realtek/ameba/amebad/soc.c

@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2024 Realtek Semiconductor Corp.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include <soc.h>
+#include <ameba_soc.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
+#include <zephyr/kernel.h>
+#include <zephyr/cache.h>
+#include "ameba_system.h"
+
+void z_arm_reset(void);
+
+IMAGE2_ENTRY_SECTION
+RAM_START_FUNCTION Img2EntryFun0 = {z_arm_reset, NULL, /* BOOT_RAM_WakeFromPG, */
+				    (uint32_t)NewVectorTable};
+
+static void app_vdd1833_detect(void)
+{
+	uint32_t temp;
+
+	if (is_power_supply18() == false) {
+		temp = sys_read32(SYSTEM_CTRL_BASE_HP + REG_HS_RFAFE_IND_VIO1833);
+		temp |= BIT_RFAFE_IND_VIO1833;
+		sys_write32(temp, SYSTEM_CTRL_BASE_HP + REG_HS_RFAFE_IND_VIO1833);
+	}
+}
+
+void soc_early_init_hook(void)
+{
+	/*
+	 * Cache is enabled by default at reset, disable it before
+	 * sys_cache*-functions can enable them.
+	 */
+	Cache_Enable(DISABLE);
+	sys_cache_data_enable();
+	sys_cache_instr_enable();
+
+	SystemSetCpuClk(CLK_KM4_200M);
+
+	app_vdd1833_detect();
+}

soc/realtek/ameba/amebad/soc.h

@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2024 Realtek Semiconductor Corp.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_SOC_REALTEK_AMEBA_AMEBAD_H_
+#define ZEPHYR_SOC_REALTEK_AMEBA_AMEBAD_H_
+
+#ifndef _ASMLANGUAGE
+
+#include <zephyr/sys/util.h>
+#include "cmsis_cpu.h"
+
+#endif /* _ASMLANGUAGE */
+
+#endif /* ZEPHYR_SOC_REALTEK_AMEBA_AMEBAD_H_ */

soc/realtek/ameba/amebad/soc_cpu_idle.h

@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2024 Realtek Semiconductor Corp.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* Workaround for WFI fused instruction issue */
+#define SOC_ON_EXIT_CPU_IDLE __NOP();

soc/realtek/ameba/amebadplus/CMakeLists.txt

@@ -1,34 +1,9 @@
 # Copyright (c) 2024 Realtek Semiconductor Corp.
 # SPDX-License-Identifier: Apache-2.0
 
-zephyr_include_directories(${ZEPHYR_BASE}/drivers)
 zephyr_include_directories(.)
 
 zephyr_sources(soc.c)
 
 zephyr_linker_sources(SECTIONS boot_section.ld)
 set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")
-
-# west sign
-file(GLOB BIN_FILES "${ZEPHYR_HAL_REALTEK_MODULE_DIR}/zephyr/blobs/${CONFIG_SOC_SERIES}/bin/*.bin")
-
-if(BIN_FILES)
-  set(python_script_args
-    --soc ${CONFIG_SOC_SERIES}
-    --bin-file ${ZEPHYR_BINARY_DIR}/${KERNEL_BIN_NAME}
-    --out-dir ${CMAKE_BINARY_DIR}
-    --module-dir ${ZEPHYR_HAL_REALTEK_MODULE_DIR}
-  )
-
-  add_custom_target(zephyr.raw.map ALL
-    DEPENDS ${ZEPHYR_BINARY_DIR}/${KERNEL_NAME}.raw.map
-  )
-
-  add_custom_command(
-    OUTPUT ${ZEPHYR_BINARY_DIR}/${KERNEL_NAME}.raw.map
-    COMMAND ${CMAKE_NM} ${ZEPHYR_BINARY_DIR}/${KERNEL_ELF_NAME} | sort > ${ZEPHYR_BINARY_DIR}/${KERNEL_NAME}.raw.map
-    COMMAND ${CMAKE_OBJDUMP} -d ${ZEPHYR_BINARY_DIR}/${KERNEL_ELF_NAME} > ${ZEPHYR_BINARY_DIR}/${KERNEL_NAME}.asm
-    COMMAND ${PYTHON_EXECUTABLE} ${ZEPHYR_HAL_REALTEK_MODULE_DIR}/ameba/scripts/merge_bin.py ${python_script_args}
-    DEPENDS ${ZEPHYR_BINARY_DIR}/${KERNEL_ELF_NAME} ${ZEPHYR_HAL_REALTEK_MODULE_DIR}/ameba/${CONFIG_SOC_SERIES}/manifest.json5
-  )
-endif()

soc/realtek/ameba/soc.yml

@@ -1,6 +1,9 @@
 family:
   - name: realtek_ameba
     series:
+      - name: amebad
+        socs:
+          - name: rtl872xd
       - name: amebadplus
         socs:
           - name: rtl8721dx