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drivers: pinctrl: sifive: use DT ngpios property

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Instead of hardcoded definitions from soc.h.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
Gerard Marull-Paretas
2024-01-16 15:08:26 +01:00
committed by Fabio Baltieri
parent 3381fb4b3d
commit 7e3b3dd258
4 changed files with 2 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/pinctrl/pinctrl_sifive.c
View File

@@ -13,6 +13,7 @@
#include <soc.h>
#define MAX_PIN_NUM DT_PROP(DT_INST_PARENT(0), ngpios)
#define PINCTRL_BASE_ADDR DT_INST_REG_ADDR(0)
#define PINCTRL_IOF_EN (PINCTRL_BASE_ADDR + 0x0)
#define PINCTRL_IOF_SEL (PINCTRL_BASE_ADDR + 0x4)
@@ -21,7 +22,7 @@ static int pinctrl_sifive_set(uint32_t pin, uint32_t func)
{
uint32_t val;
if (func > SIFIVE_PINMUX_IOF1 || pin >= SIFIVE_PINMUX_PINS) {
if (func > SIFIVE_PINMUX_IOF1 || pin >= MAX_PIN_NUM) {
return -EINVAL;
}

3
soc/riscv/sifive_freedom/e300/soc.h
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@@ -11,9 +11,6 @@
#ifndef __RISCV_SIFIVE_FREEDOM_FE300_SOC_H_
#define __RISCV_SIFIVE_FREEDOM_FE300_SOC_H_
/* PINMUX MAX PINS */
#define SIFIVE_PINMUX_PINS 32
/* Clock controller. */
#define PRCI_BASE_ADDR 0x10008000

3
soc/riscv/sifive_freedom/u500/soc.h
View File

@@ -14,9 +14,6 @@
/* Clock controller. */
#define PRCI_BASE_ADDR 0x10000000
/* PINMUX MAX PINS */
#define SIFIVE_PINMUX_PINS 16
/*
* On FE310 and FU540, peripherals such as SPI, UART, I2C and PWM are clocked
* by TLCLK, which is derived from CORECLK.

3
soc/riscv/sifive_freedom/u700/soc.h
View File

@@ -14,9 +14,6 @@
/* Clock controller. */
#define PRCI_BASE_ADDR 0x10000000
/* PINMUX MAX PINS */
#define SIFIVE_PINMUX_PINS 16
/* On FU740, peripherals are clocked by PCLK. */
#define SIFIVE_PERIPHERAL_CLOCK_FREQUENCY \
DT_PROP(DT_NODELABEL(pclk), clock_frequency)