boards: espressif: update hw breakpoint limits per soc

Fix max number of hardware breakpoints based on SOC.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This commit is contained in:
Sylvio Alves
2026-01-07 14:01:28 -03:00
committed by Fabio Baltieri
parent ab16cca665
commit a03afda472

View File

@@ -4,7 +4,17 @@ board_set_flasher_ifnset(esp32)
board_set_debugger_ifnset(openocd)
board_runner_args(openocd --no-halt --no-targets --no-load --target-handle _TARGETNAME_0)
board_runner_args(openocd --gdb-init "set remote hardware-watchpoint-limit 2")
# Set hardware watchpoint limit based on SOC capabilities
if(CONFIG_SOC_SERIES_ESP32C3)
set(ESP_HW_WATCHPOINT_LIMIT 8)
elseif(CONFIG_SOC_SERIES_ESP32C6 OR CONFIG_SOC_SERIES_ESP32H2)
set(ESP_HW_WATCHPOINT_LIMIT 4)
else()
# ESP32, ESP32-S2, ESP32-S3, ESP32-C2 all have 2 watchpoints
set(ESP_HW_WATCHPOINT_LIMIT 2)
endif()
board_runner_args(openocd --gdb-init "set remote hardware-watchpoint-limit ${ESP_HW_WATCHPOINT_LIMIT}")
board_runner_args(openocd --gdb-init "maintenance flush register-cache")
board_runner_args(openocd --gdb-init "mon esp appimage_offset ${CONFIG_FLASH_LOAD_OFFSET}")