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drivers: rtc: stm32: Add STM32U3 support for RTC alarm, clock & counter

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Extend RTC driver to handle STM32U3 series specifics:
- Include STM32U3X in condition where RTC Alarm event is not routed to EXTI
- Use LL_RCC_RTC_ClockEnable call for STM32U3 instead of LL_RCC_EnableRTC
- Adapt counter_stm32_rtc driver for STM32U3 clock and EXTI handling

Signed-off-by: Antoine Pradoux <antoine.pradoux@st.com>
This commit is contained in:
Antoine Pradoux
2025-12-16 16:26:42 +01:00
committed by Anas Nashif
parent e97559b6f2
commit c10819f93a
2 changed files with 42 additions and 16 deletions
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32
drivers/counter/counter_stm32_rtc.c
View File

@@ -372,10 +372,15 @@ static int rtc_stm32_start(const struct device *dev)
z_stm32_hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
stm32_backup_domain_enable_access();
#ifdef CONFIG_SOC_SERIES_STM32U3X
/* STM32U3 series uses LL_RCC_RTC_ClockEnable instead of LL_RCC_EnableRTC */
LL_RCC_RTC_ClockEnable();
#else
LL_RCC_EnableRTC();
#endif /* CONFIG_SOC_SERIES_STM32U3X */
stm32_backup_domain_disable_access();
z_stm32_hsem_unlock(CFG_HW_RCC_SEMID);
#endif
#endif /* CONFIG_SOC_SERIES_STM32WBAX || CONFIG_SOC_SERIES_STM32U5X */
return 0;
}
@@ -397,10 +402,15 @@ static int rtc_stm32_stop(const struct device *dev)
z_stm32_hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
stm32_backup_domain_enable_access();
#ifdef CONFIG_SOC_SERIES_STM32U3X
/* STM32U3 series uses LL_RCC_RTC_ClockDisable instead of LL_RCC_DisableRTC */
LL_RCC_RTC_ClockDisable();
#else
LL_RCC_DisableRTC();
#endif /* CONFIG_SOC_SERIES_STM32U3X */
stm32_backup_domain_disable_access();
z_stm32_hsem_unlock(CFG_HW_RCC_SEMID);
#endif
#endif /* CONFIG_SOC_SERIES_STM32WBAX || CONFIG_SOC_SERIES_STM32U5X */
return 0;
}
@@ -724,8 +734,10 @@ void rtc_stm32_isr(const struct device *dev)
|| defined(CONFIG_SOC_SERIES_STM32L5X) \
|| defined(CONFIG_SOC_SERIES_STM32H5X)
LL_EXTI_ClearRisingFlag_0_31(RTC_EXTI_LINE);
#elif defined(CONFIG_SOC_SERIES_STM32U5X) || defined(CONFIG_SOC_SERIES_STM32WBAX)
/* in STM32U5 family RTC is not connected to EXTI */
#elif defined(CONFIG_SOC_SERIES_STM32U3X) \
|| defined(CONFIG_SOC_SERIES_STM32U5X) \
|| defined(CONFIG_SOC_SERIES_STM32WBAX)
/* RTC is not connected to EXTI for these SoC series */
#else
LL_EXTI_ClearFlag_0_31(RTC_EXTI_LINE);
#endif
@@ -771,8 +783,13 @@ static int rtc_stm32_init(const struct device *dev)
}
#if !defined(CONFIG_SOC_SERIES_STM32WBAX)
#ifdef CONFIG_SOC_SERIES_STM32U3X
/* STM32U3 series uses LL_RCC_RTC_ClockEnable instead of LL_RCC_EnableRTC */
LL_RCC_RTC_ClockEnable();
#else
LL_RCC_EnableRTC();
#endif
#endif /* CONFIG_SOC_SERIES_STM32U3X */
#endif /* !CONFIG_SOC_SERIES_STM32WBAX */
z_stm32_hsem_unlock(CFG_HW_RCC_SEMID);
@@ -799,8 +816,9 @@ static int rtc_stm32_init(const struct device *dev)
#if defined(CONFIG_SOC_SERIES_STM32H7X) && defined(CONFIG_CPU_CORTEX_M4)
LL_C2_EXTI_EnableIT_0_31(RTC_EXTI_LINE);
LL_EXTI_EnableRisingTrig_0_31(RTC_EXTI_LINE);
#elif defined(CONFIG_SOC_SERIES_STM32U5X) || defined(CONFIG_SOC_SERIES_STM32WBAX)
/* in STM32U5 family RTC is not connected to EXTI */
#elif defined(CONFIG_SOC_SERIES_STM32U3X) || defined(CONFIG_SOC_SERIES_STM32U5X) || \
defined(CONFIG_SOC_SERIES_STM32WBAX)
/* RTC is not connected to EXTI for these SoC series */
#else
LL_EXTI_EnableIT_0_31(RTC_EXTI_LINE);
LL_EXTI_EnableRisingTrig_0_31(RTC_EXTI_LINE);

26
drivers/rtc/rtc_stm32.c
View File

@@ -132,8 +132,9 @@ struct rtc_stm32_data {
static inline void exti_enable_rtc_alarm_it(uint32_t line_num)
{
#if defined(CONFIG_SOC_SERIES_STM32U5X) || defined(CONFIG_SOC_SERIES_STM32WBAX)
/* in STM32U5 & STM32WBAX series, RTC Alarm event is not routed to EXTI */
#if defined(CONFIG_SOC_SERIES_STM32U3X) || defined(CONFIG_SOC_SERIES_STM32U5X) || \
defined(CONFIG_SOC_SERIES_STM32WBAX)
/* in STM32U3, STM32U5 & STM32WBAX series, RTC Alarm event is not routed to EXTI */
#else
int ret;
@@ -146,8 +147,9 @@ static inline void exti_enable_rtc_alarm_it(uint32_t line_num)
static inline void exti_clear_rtc_alarm_flag(uint32_t line_num)
{
#if defined(CONFIG_SOC_SERIES_STM32U5X) || defined(CONFIG_SOC_SERIES_STM32WBAX)
/* in STM32U5 & STM32WBAX series, RTC Alarm (EXTI event) is not routed to EXTI */
#if defined(CONFIG_SOC_SERIES_STM32U3X) || defined(CONFIG_SOC_SERIES_STM32U5X) || \
defined(CONFIG_SOC_SERIES_STM32WBAX)
/* in STM32U3, STM32U5 & STM32WBAX series, RTC Alarm (EXTI event) is not routed to EXTI */
#else
if (stm32_exti_is_pending(line_num)) {
stm32_exti_clear_pending(line_num);
@@ -502,18 +504,24 @@ static int rtc_stm32_init(const struct device *dev)
}
/*
* On STM32WBAX series, there is no bit in BCDR register to enable RTC.
* Enabling RTC is done directly via the RCC APB register bit.
* On STM32WB0 series, LL_RCC_EnableRTC is not provided by STM32CubeWB0,
* but RTC IP clock has already been turned on - skip the call as well.
* On certain series, there is no bit in BCDR register to enable RTC;
* a single bit in RCC controls both the RTC and bus interface. On
* such series, the LL_RCC_EnableRTC function is usually not provided
* by the STM32Cube package, but it's fine to skip calling it since
* the RTC is already accessible thanks to clock_control_on() above.
*/
#if !defined(CONFIG_SOC_SERIES_STM32WBAX) && !defined(CONFIG_SOC_SERIES_STM32WB0X)
z_stm32_hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
#ifdef CONFIG_SOC_SERIES_STM32U3X
/* STM32U3 series uses LL_RCC_RTC_ClockEnable instead of LL_RCC_EnableRTC */
LL_RCC_RTC_ClockEnable();
#else
LL_RCC_EnableRTC();
#endif /* CONFIG_SOC_SERIES_STM32U3X */
z_stm32_hsem_unlock(CFG_HW_RCC_SEMID);
#endif /* CONFIG_SOC_SERIES_STM32WBAX */
#endif /* !STM32WBAX && !STM32WB0X */
err = rtc_stm32_configure(dev);