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drivers: clock_control: remove clock early init for Renesas RA

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Remove the root clock control early initialization because it has
already been done in the soc_reset_hooks()

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
This commit is contained in:
The Nguyen
2025-09-18 18:28:37 +00:00
committed by Fabio Baltieri
parent d8c1333295
commit cb47fb2706
2 changed files with 2 additions and 36 deletions
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30
drivers/clock_control/clock_control_renesas_ra_cgc.c
View File

@@ -91,29 +91,6 @@ static int clock_control_renesas_ra_get_rate(const struct device *dev, clock_con
return 0;
}
/**
* @brief Initializes a peripheral clock device driver
*/
static int clock_control_ra_init_pclk(const struct device *dev)
{
ARG_UNUSED(dev);
return 0;
}
static int clock_control_ra_init(const struct device *dev)
{
ARG_UNUSED(dev);
/* Call to HAL layer to initialize system clock and peripheral clock */
#ifdef CONFIG_SOC_RA_SKIP_CLOCK_INIT
bsp_clock_freq_var_init();
SystemCoreClockUpdate();
#else
bsp_clock_init();
#endif /* CONFIG_SOC_RA_SKIP_CLOCK_INIT */
return 0;
}
static DEVICE_API(clock_control, clock_control_renesas_ra_api) = {
.on = clock_control_renesas_ra_on,
.off = clock_control_renesas_ra_off,
@@ -127,13 +104,10 @@ static DEVICE_API(clock_control, clock_control_renesas_ra_api) = {
DT_NODE_HAS_PROP(node_id, clocks), \
(RA_CGC_CLK_SRC(DT_CLOCKS_CTLR(node_id))), \
(RA_CGC_CLK_SRC(DT_CLOCKS_CTLR(DT_PARENT(node_id))))), \
.clk_div = DT_PROP(node_id, div)}; \
DEVICE_DT_DEFINE(node_id, &clock_control_ra_init_pclk, NULL, NULL, \
.clk_div = DT_PROP(node_id, div)}; \
DEVICE_DT_DEFINE(node_id, NULL, NULL, NULL, \
&node_id##_cfg, PRE_KERNEL_1, \
CONFIG_KERNEL_INIT_PRIORITY_OBJECTS, \
&clock_control_renesas_ra_api)));
DEVICE_DT_DEFINE(DT_NODELABEL(pclkblock), &clock_control_ra_init, NULL, NULL, NULL, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_OBJECTS, NULL);
DT_FOREACH_CHILD_STATUS_OKAY(DT_NODELABEL(pclkblock), INIT_PCLK);

8
soc/renesas/ra/Kconfig
View File

@@ -38,14 +38,6 @@ config SOC_RA_SECOND_CORE_BUILD
help
Indicates the image is built for the secondary core when enabled
config SOC_RA_SKIP_CLOCK_INIT
bool "Skip clock frequency configuration in system initialization"
depends on SOC_RA_SECOND_CORE_BUILD
default y
help
With this option, the CPU clock frequency is not set during system
initialization.
config RENESAS_RA_BATTERY_BACKUP_MANUAL_CONFIGURE
bool "VBAT switching manual"
default y