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soc: boards: xtensa: intel_adsp_ace: Rename with HWMv2

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Rename for better HWMv2 use:

  SoC - `intel_ace15_mtpm` --> `ace15_mtpm`
  SoC - `intel_ace20_lnl`  --> `ace20_lnl`

Resulting shortened name for boards:

  `intel_adsp_ace15_mtpm/intel_ace15_mtpm` -->
  `intel_adsp_ace15_mtpm/ace15_mtpm`

  `intel_adsp_ace20_lnl/intel_ace20_lnl` -->
  `intel_adsp_ace20_lnl/ace20_lnl`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
This commit is contained in:
Dmitrii Golovanov
2024-02-17 13:00:19 +01:00
committed by Carles Cufi
parent f362a8ae2c
commit d1b3bcce64
5 changed files with 8 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
boards/intel/intel_adsp_ace15_mtpm/board.yml
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@@ -2,4 +2,4 @@ board:
name: intel_adsp_ace15_mtpm name: intel_adsp_ace15_mtpm
vendor: intel vendor: intel
socs: socs:
- name: intel_ace15_mtpm - name: ace15_mtpm

2
boards/intel/intel_adsp_ace20_lnl/board.yml
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@@ -2,4 +2,4 @@ board:
name: intel_adsp_ace20_lnl name: intel_adsp_ace20_lnl
vendor: intel vendor: intel
socs: socs:
- name: intel_ace20_lnl - name: ace20_lnl

4
soc/intel/intel_adsp/ace/CMakeLists.txt
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@@ -1,6 +1,6 @@
# Intel ACE SoC family CMake file # Intel ACE SoC family CMake file
# #
# Copyright (c) 2022 Intel Corporation # Copyright (c) 2022-2024 Intel Corporation
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
@@ -15,7 +15,7 @@ zephyr_library_sources(
) )
zephyr_include_directories(include) zephyr_include_directories(include)
zephyr_include_directories(include/${SOC_NAME}) zephyr_include_directories(include/${SOC_TOOLCHAIN_NAME})
zephyr_library_sources_ifdef(CONFIG_SOC_INTEL_COMM_WIDGET comm_widget.c) zephyr_library_sources_ifdef(CONFIG_SOC_INTEL_COMM_WIDGET comm_widget.c)
zephyr_library_sources_ifdef(CONFIG_SOC_INTEL_COMM_WIDGET comm_widget_messages.c) zephyr_library_sources_ifdef(CONFIG_SOC_INTEL_COMM_WIDGET comm_widget_messages.c)

4
soc/intel/intel_adsp/ace/Kconfig.soc
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@@ -24,5 +24,5 @@ config SOC_INTEL_ACE20_LNL
ACE 2.0 Lunar Lake PCH ACE 2.0 Lunar Lake PCH
config SOC config SOC
default "intel_ace15_mtpm" if SOC_INTEL_ACE15_MTPM default "ace15_mtpm" if SOC_INTEL_ACE15_MTPM
default "intel_ace20_lnl" if SOC_INTEL_ACE20_LNL default "ace20_lnl" if SOC_INTEL_ACE20_LNL

4
soc/intel/intel_adsp/soc.yml
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@@ -3,8 +3,8 @@ family:
series: series:
- name: ace - name: ace
socs: socs:
- name: intel_ace15_mtpm - name: ace15_mtpm
- name: intel_ace20_lnl - name: ace20_lnl
- name: cavs - name: cavs
socs: socs:
- name: cavs25 - name: cavs25