soc: boards: xtensa: intel_adsp_ace: Rename with HWMv2
Rename for better HWMv2 use: SoC - `intel_ace15_mtpm` --> `ace15_mtpm` SoC - `intel_ace20_lnl` --> `ace20_lnl` Resulting shortened name for boards: `intel_adsp_ace15_mtpm/intel_ace15_mtpm` --> `intel_adsp_ace15_mtpm/ace15_mtpm` `intel_adsp_ace20_lnl/intel_ace20_lnl` --> `intel_adsp_ace20_lnl/ace20_lnl` Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
This commit is contained in:
committed by
Carles Cufi
parent
f362a8ae2c
commit
d1b3bcce64
@@ -2,4 +2,4 @@ board:
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name: intel_adsp_ace15_mtpm
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vendor: intel
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socs:
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- name: intel_ace15_mtpm
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- name: ace15_mtpm
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@@ -2,4 +2,4 @@ board:
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name: intel_adsp_ace20_lnl
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vendor: intel
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socs:
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- name: intel_ace20_lnl
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- name: ace20_lnl
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@@ -1,6 +1,6 @@
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# Intel ACE SoC family CMake file
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#
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# Copyright (c) 2022 Intel Corporation
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# Copyright (c) 2022-2024 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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@@ -15,7 +15,7 @@ zephyr_library_sources(
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)
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zephyr_include_directories(include)
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zephyr_include_directories(include/${SOC_NAME})
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zephyr_include_directories(include/${SOC_TOOLCHAIN_NAME})
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zephyr_library_sources_ifdef(CONFIG_SOC_INTEL_COMM_WIDGET comm_widget.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_INTEL_COMM_WIDGET comm_widget_messages.c)
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@@ -24,5 +24,5 @@ config SOC_INTEL_ACE20_LNL
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ACE 2.0 Lunar Lake PCH
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config SOC
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default "intel_ace15_mtpm" if SOC_INTEL_ACE15_MTPM
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default "intel_ace20_lnl" if SOC_INTEL_ACE20_LNL
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default "ace15_mtpm" if SOC_INTEL_ACE15_MTPM
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default "ace20_lnl" if SOC_INTEL_ACE20_LNL
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@@ -3,8 +3,8 @@ family:
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series:
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- name: ace
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socs:
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- name: intel_ace15_mtpm
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- name: intel_ace20_lnl
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- name: ace15_mtpm
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- name: ace20_lnl
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- name: cavs
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socs:
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- name: cavs25
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