The K_TIMEOUT_SUM() macro is intended as a means to add two
k_timeout_t values together. This may be useful for a developer
applying an exponential backoff algorithm.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Adds a new meta-IRQ test just for SMP. This test verifies that
a cooperative thread preempted by a meta-IRQ thread resumes on
the same CPU after the meta-IRQ thread finishes.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
arch_mem_coherent() is cache related so it is better to move it
under cache subsys. It is renamed to sys_cache_is_mem_coherent()
to reflect this change.
The only user of arch_mem_coherent() is Xtensa. However, it is
not an architecture feature. That's why it is moved to the cache
subsys.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Due to CONFIG_DCACHE_LINE_SIZE=64, the stack is always aligned
on 64 bytes. With data cache line size and the default of
CONFIG_STACK_POINTER_RANDOM=64 in test, there is not much
randomness as any added offset (<= 64) would be rounded up to
64 bytes due to stack alignment. For the added offset to stack
pointer to actually mean something, CONFIG_STACK_POINTER_RANDOM
has to be larger.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Updates the spawn_threads() sleep_sec parameter name to sleep_msec
to more accurately reflect the units of measurement.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Test had forever loop that was attempting to read k_timer_remaining_ticks
while system tick did not change. If target has relatively fast system
clock then it might be impossible.
Tweak test to repeat few times and if k_timer_remaining_ticks is not
read in the known tick then range is used to validate correctness of
the returned value.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Adjusting sleep times as core is to slow too run
the test with the default system clock frequency,
and fixing outdated comment in the test manifest file.
Signed-off-by: Paweł Pelikan <pawel.pelikan@nordicsemi.no>
The k_poll signal and event code is reworked a bit such that
signal is raised and event is processed only when appropriate.
We want to avoid changing the internal of event and signal
objects at the same time we try to raise the signal (which
changes the internal states too).
In addition, print out some information on how many signals
raised and received to indicate we are actually switching
all related threads.
Fixes#98136
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds this Kconfig, which is needed for the test, because it will
no longer be globally enabled by default
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
kernel context test check timing and extra interrupts
being thrown during sleep tests.
Power management is disabled because during tests
code tests sleep and with power management enabled
it could result in going to deep sleep that takes
more time than is allowed.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg.xr@bp.renesas.com>
Smartbond device schedules periodic calibrations work
and delayed work for xtal32 settle.
Those works can disrupt strict timing that test checks.
This change disables calibration for RCX and RC32K.
Xtal32k settle work is schedule late as not to be
executed during tests.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg.xr@bp.renesas.com>
Memory protection and userspace tests require more MMU translation
tables than the default. Without this increase, tests fail with:
E: CONFIG_MAX_XLAT_TABLES too small
ASSERTION FAIL [ret == 0] @ arch/arm64/core/mmu.c:1244
privatize_page_range() returned -12
Increase defaults when both USERSPACE and TEST are enabled:
- 32 tables for SMP configurations
- 24 tables for non-SMP configurations
This fixes:
- sample.kernel.memory_protection.shared_mem (all platforms)
- rtio.api.userspace (v8a, v9a)
- rtio.api.userspace.submit_sem (v8a, v9a)
- portability.posix.common.userspace
Consequently the demand paging test needed adjustment to its
qemu_cortex_a53 configs to keep working as this test is highly
sensitive to the amount of available free memory.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Create unified board configuration to replace verbose board naming
with shorter hierarchical structure. This board works with the new
unified fvp_aem SOC series and supports the v8a architecture variant.
This enables board targets like:
- fvp_base_revc_2xaem/v8a (basic ARMv8-A)
- fvp_base_revc_2xaem/v8a/smp (ARMv8-A SMP)
- fvp_base_revc_2xaem/v8a/smp/ns (ARMv8-A SMP non-secure)
This structure replaces the existing overly verbose board designations
with a cleaner, more maintainable organization and provides a foundation
for adding v9a variants.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Adjusting CONFIG_SYS_CLOCK_TICKS_PER_SEC as core is to slow too run
the test with the default system clock frequency.
Signed-off-by: Paweł Pelikan <pawel.pelikan@nordicsemi.no>
This moves the switching stress test into its own group simply
to signify that there is a group for stress testing. And also
rename torture to stress.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Zero size buffer pipes are not currently supported if memory is
not coherent between CPUs (CONFIG_KERNEL_COHERENCE=y) due to
possibility of buffers being in incoherent memory. So skip
the zero size test for now.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Make sure MAX32_ON_ENTER_CPU_IDLE_HOOK is disabled for the context test, so
the CPU will actually idle with WFI and not return before the timer
expires for test_cpu_idle test.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
The test_smp_thread_abort_deadlock test assumes all CPUs will
simultaneously establish a circular abort dependency (each thread
aborts the next in a ring). However, on platforms with large
emulator/simulator quantum sizes, one thread's ISR may complete
and return before another thread even calls k_thread_abort() on it,
preventing the circular dependency from forming.
This manifested on ARMv8-R FVP but not on QEMU or ARMv8-A/ARMv9-A FVP
due to different timing characteristics and quantum sizes.
Add a k_busy_wait(100) after k_thread_abort() to give all CPUs time
to call abort before any ISR completes.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This commit adds a new test case to the pipe API concurrency tests to
verify the behavior of zero-length pipes. The test ensures that writing
to a zero-length pipe blocks until data is read, and reading from a
zero-length pipe blocks until data is written—unless the pipe is closed,
reset, or the operation times out.
The test creates two pipes with zero-length buffers and spawns a helper
thread that performs complementary read/write operations. The two threads
use the pipe API as their only synchronization mechanism, validating the
correct blocking and wake-up behavior of zero-length pipes under
concurrent access.
Signed-off-by: Måns Ansgariusson <Mansgariusson@gmail.com>
Make k_is_pre_kernel safe to call from user mode. Since
z_sys_post_kernel memory is not accessible to user threads, calling
k_is_pre_kernel would result in a memory access fault.
This change adds k_is_user_context guard. It can be assumed the system
is post-kernel if k_is_user_context is true.
Signed-off-by: Rob Barnes <robbarnes@google.com>
The stackprot test currently depends on compiler-generated stack frame
layouts, which can vary between toolchains and optimization levels.
This makes the overflow check fragile and may cause unintended faults.
Add a small guard buffer in alternate_thread so the intentional overflow
is always contained within the thread stack. This ensures the test
behaves consistently across toolchains, architectures, and optimization
settings.
Signed-off-by: Mohamed Moawad <moawad@synopsys.com>
Code was using CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC value.
System can have non constant value for cycle counter when
this constant is not valid.
Now code calls sys_clock_hw_cycles_per_sec() that will expand
to CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC (as before) when needed.
It only impacts systems that can change hw cycles per second
at runtime (due to calibration or some other clock change).
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
It has been observed that, during the switching stress test,
the context switching becomes very slow due to enough CPUs
doing RCW transaction on hardware bus (e.g. spin locks).
Since the number of NOPs are the same for all CPUs, they are
simply entering and exiting the relax loop at the same time,
and hitting the bus with RCW transactions at the same time.
Not exactly a deadlock but it slows down the execution
enough to result in the test timing out. The SoC layer has
added an option to offset the number of NOPs per CPU by
adding the CPU to the number of NOPs. So enabling it for
the Intel ADSP boards to workaround the above mentioned
issue. I haven't encountered another slowdown after turning
on this option. So hopefully this lowers the probability of
that happening such that a simple retry can pass the test.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add ARC-specific variant of kernel.common.stack_protection test that
omits frame pointers to work around GNU toolchain code generation issue.
The GNU toolchain generates FP-relative memory accesses (st r0,[fp,-8])
for local variables when frame pointers are enabled, which bypasses ARC
hardware stack checking that only monitors SP-based instructions. This
causes the test to fail with MPU violations instead of
stack check violations.
Signed-off-by: Mohamed Moawad <moawad@synopsys.com>
This adds a few tests to test switching between threads where
they are under different memory domains. This is mainly to test
if permissions are set correctly during context switch.
By default the new tests are disabled and must be explicitly
enabled. This is due to some architectures requiring some config
changes (for example, x86 needing more reserved memory domains,
and ARM64 needing more translation tables). To avoid causing
mass CI failures, only enable platforms that have been tested,
for now.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The priv_stack_ptr for reading and writing tests was not set
correctly on Xtensa, and was always 0. Test would pass since
the NULL page should always generate access faults on most
Xtensa platforms. However, those tests are supposed to test
reading and writing to the privilege stack. So fix that by
populating the priv_stack_ptr correctly.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Fix format specifiers that did not match the argument type.
Use %zu format specifier for size_t type to ensure compatibility
with both 32-bit and 64-bit platforms. Escape percent signs in
format strings using %% to prevent warnings about unknown format
specifiers.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
The comment was referencing the old k_pipe api which has since been
retired. Updated the comment to reflect the current k_pipe api.
Signed-off-by: Måns Ansgariusson <Mansgariusson@gmail.com>
A follow-up to commit d6ce2f4f41 that
introduced a new fakedeferdriver node in app.overlay, but due to how
overlays are applied, the board specific overlay files also need to
be updated to avoid build errors, as they override whatever app.overlay
has.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This removes the special test case for intel_adsp to skip
the mapped code execution test. The test can now run on
the ACE3.0 hardware without issue.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The mapped code execution test uses the simple k_mem_phys_addr()
to do virtual to physical address translation. And this requires
the virtual address to be inside the kernel permanent mapping
(i.e. between __kernel_ram_start and __kernel_ram_end). With
demand paging, the translation is no longer static and it can be
mapped into any physical address. So a simple memory mapping
in the test would map an incorrect physical address which may
not even contain the said function. It has been working when
demand paging is not enabled is due to the custom sections is
immediately after the text section, so that the simple address
translation still works. But a custom linker script (i.e. board
config) may make that not true anymore.
So fix this by putting transplanted_function() into
snippets-text-sections.ld such that this would appear inside
.text section.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Updates the smp test to support nsim/nsim_hs5x/smp/12cores.
Furthermore, if someone attempts to build the smp test for more
than 12 CPUs, report an error message informing the user to
reduce the number of CPUs. This reduction can be in the form
of a custom overlay for the board in question.
Fixes#96339
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
For these particular tests, many platforms require higher
CONFIG_MAX_THREAD_BYTES than the default 2, so guard
against failures by setting it high.
Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
This adds some kconfigs to allow customizing the SMP IPI
broadcast test.
* Can running for more iterations.
* The wait period can be changed.
* Retry waiting for the other processors to complete
processing the IPI.
* This is mainly to avoid having a single long wait.
The whole wait period is broken down so that we can
bail out early if that iteration is deemed a success.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
on arc, the test fails with an MPU error instead of a stack
overflow because the priv stack is merged into the defined
stack.
Fixes#68682
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
- Since PocketBeagle 2 RevA1 has 4 cores, we need to adjust the variable
CONFIG_MAX_THREAD_BYTES to allow this test to build.
- Does not affect Rev A0 (2 cores).
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
- Since PocketBeagle 2 RevA1 has 4 cores, we need to adjust the variable
CONFIG_MAX_THREAD_BYTES to allow this test to build.
- Does not affect Rev A0 (2 cores).
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
- Since PocketBeagle 2 RevA1 has 4 cores, we need to adjust the variable
CONFIG_MAX_THREAD_BYTES to allow this test to build.
- Does not affect Rev A0 (2 cores).
Signed-off-by: Ayush Singh <ayush@beagleboard.org>
