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24 Commits

Author SHA1 Message Date
Pavel Vasilyev
e5e7142b3d bluetooth: mesh: brg_cfg_srv: ignore message with invalid parameters
When a message with invalid parameters is received, we must ignore it.

In this commit we check invalid parameters first.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2024-09-12 16:26:04 +02:00
Pavel Vasilyev
955b1f677b tests: bluetooth: mesh: add subnet bridge bsim tests
This commit adds the following tests:
- Simple test for bridging table
- Test bridging table state changes
- Test persistence storage of subnet bridge
- Test IV Index update with subnet bridge
- Test network key removal for subnet bridge

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2024-09-12 16:26:04 +02:00
Pavel Vasilyev
dab117c85e tests: bluetooth: mesh_shell: add brg_cfg_srv instance
This commit adds Bridge Configuration Server to the mesh_shell sample.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2024-09-12 16:26:04 +02:00
Pavel Vasilyev
aeeb2053c6 bluetooth: mesh: brg_cfg: use IS_ENABLED macro optimally
If use `IS_ENABLED` macro inside if statements but not as preprocessor
directives, we can always compile the code for settings even if settings
are not used. This allows to reduce amount of firmwares we need to build
in CI to ensure that code compiles.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2024-09-12 16:26:04 +02:00
Pavel Vasilyev
1b44e607a8 bluetooth: mesh: brg_cfg_srv: check buf tailroom before packing data
We must tcheck if buf has enough tailroom to fit another pair of keys or
pair addresses with direction.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2024-09-12 16:26:04 +02:00
Pavel Vasilyev
c1f5ae30c6 bluetooth: mesh: adv_ext: resched main adv set if relay doesn't have own
If relay feature doesn't have own adv set, it should use the main adv
set to send messages.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2024-09-12 16:26:04 +02:00
Pavel Vasilyev
bbd0498803 bluetooth: mesh: brg_cfg_cli: copy buf in synchronous api
When a synchronous API is used, the content of `buf` will not be
valid by the time the thread that called the synchronous API is woken up
again.

Therefore, the simplest way to solve this is when a user allocates the
buffer which will be filled up with the content of the buffer passed to
the model callback.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2024-09-12 16:26:04 +02:00
Pavel Vasilyev
85a856d79a bluetooth: mesh: net: bridge traffic regardless of relay state
The Subnet Bridge node must bridge traffic regardless of the Relay
state.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2024-09-12 16:26:04 +02:00
Pavel Vasilyev
ef43b94495 bluetooth: mesh: net: use subnet credentials when relaying
When relaying a Network PDU to another subnet, we need to update sub
field of rx structure so that correct credentials are used. We also need
to update NID field of the Network PDU.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2024-09-12 16:26:04 +02:00
Pavel Vasilyev
62f08da47b bluetooth: mesh: brg_cfg: add constants for directions
Add constants for directions so that they can be used in the
subnet bridge client api.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2024-09-12 16:26:04 +02:00
Pavel Vasilyev
81dbc697f4 bluetooth: mesh: rpl: fix rpl for subnet bridge
The initial implementation of RPL check for Subnet Bridge wasn't fully
correct. It decides whether to relay or not a PDU based on RPL of only
received messages. However, the spec section 3.9.8 says:

```
In addition, a Subnet Bridge node shall implement replay protection for
all Access and Transport Control messages that are sent to bridged
subnets.

A Subnet Bridge node shall maintain the most recent IVISeq value for
each source address authorized to send messages to bridged subnets.
Messages received by the Subnet Bridge node with the IVISeq value less
than or equal to the last stored value from that source address shall
be discarded immediately upon reception. When a message is retransmitted
to a bridged subnet, the stored IVISeq value shall be updated. In this
way, bridged subnets are protected against replay attacks from other
subnets.
```

This was noticed with MESH/NODE/SBR/NET/BV-02-C test. It passes when
PTS misses the message at step 3 and 4, and fails when PTS manages to
receive the message.

This commit fixes the wrong behavior by removing argument for
`bt_mesh_rpl_check` function making store a new message and bypassing
`local_match` check in case of Subnet Bridge node.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2024-09-12 16:26:04 +02:00
Pavel Vasilyev
dfdce2c122 bluetooth: mesh: brg_cfg: store tbl when changed only
Though nvs backend checks whether the data passed to it is identical to
the stored one, this isn't guaranteed by other the settings api. We can
also avoid going into the settings subsystem since we know what was
actually changed.

This commit adds 2 flags that allow to control whether Subnet Bridge
or Bridging Table states were changed and skips storing if the certain
state was not changed.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2024-09-12 16:26:04 +02:00
Pavel Vasilyev
6724345372 bluetooth: mesh: brg_cfg: fix restoring bridging table
We store only filled up entries, but want to restore the entire table.
`bt_mesh_setting_set` fails if the restored length didn't match the
provided length.

This commit fixes the restoring of the bridging table by allowing to
restore any size as long as the stored size is less than the allocated
one and it is a multiple of the size of a single entry.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2024-09-12 16:26:04 +02:00
Stine Åkredalen
0bb34284d9 docs: Bluetooth: Mesh: add Subnet Bridge doc
Added high-level documentation for Subnet Bridge,
connecting models together and explaining usage.

Signed-off-by: Stine Åkredalen <stine.akredalen@nordicsemi.no>
2024-09-12 16:25:51 +02:00
Ingar Kulbrandstad
55175d63e4 Bluetooth: Mesh: Fixed bugs found in PTS testing
Fixed bugs found while running PTS test.

Signed-off-by: Ingar Kulbrandstad <ingar.kulbrandstad@nordicsemi.no>
2024-09-09 09:46:58 +02:00
Ingar Kulbrandstad
d7b4497054 Bluetooth: Tester: Mesh: Added support for Bridge client/server
Added support for the Bridge Configuration client and server
to the tester application.

Signed-off-by: Ingar Kulbrandstad <ingar.kulbrandstad@nordicsemi.no>
2024-09-09 09:46:58 +02:00
Omkar Kulkarni
9d61afa758 Bluetooth: Mesh: Add bridging functionality
Adds subnet bridging functionality to the network layer.
Also fixes brg_cfg_srv for minor issues to get it working.

Signed-off-by: Omkar Kulkarni <omkar.kulkarni@nordicsemi.no>
2024-08-26 18:53:09 +02:00
Omkar Kulkarni
cddbafe374 Bluetooth: Mesh: Populate Bridge Config Server
Adds implementation for the Bridge Configuration Server model.

Updates `brg_cfg` module to add sanity check for
bt_mesh_brg_cfg_tbl_remove() API. Also, updates the unit test
accordingly.

Adds documentation for the Bridge Configuration Server model

Signed-off-by: Omkar Kulkarni <omkar.kulkarni@nordicsemi.no>
2024-08-07 13:50:22 +02:00
Håvard Reierstad
71b29f4796 Bluetooth: Mesh: Add brg_cfg_cli commands to shell
Adds the Bridge Configuration Client commands to Mesh shell.

Unifies documentation for shell Kconfig options.

Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
2024-08-07 13:50:14 +02:00
Håvard Reierstad
563aa9be92 Bluetooth: Mesh: Implement Bridge Config Client
Implements the Bridge Configuration Client model.
Adds opcodes for all Bridge messages to `foundation.h`. Adds client-side
support for these messages.
Adds a new Kconfig option for the Bridge Configuration Client model to
configure the waiting time for respones for acked messages.

Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
2024-07-22 14:57:39 +02:00
Håvard Reierstad
6874a4a719 Bluetooth: Mesh: Change bridge table add params
Change the parameters of the bridge table add function to take an
entry struct rather than the fields of an entry.

Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
2024-07-22 14:57:39 +02:00
Håvard Reierstad
380bd5483e Bluetooth: Mesh: Fix subnet bridge table status type
Changes status type to be status codes defined in Mesh Protocol 4.3.14
as defined for the `BRIDGING_TABLE_STATUS` message.

Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
2024-07-22 14:57:39 +02:00
Omkar Kulkarni
988ad5b0c2 Bluetooth: Mesh: Adds subnet bridge states
The `brg_cfg` module implements the states needed for subnet bridge
feature. It provides two states - enable state, and bridging table
state. APIs are provided to access and modify the states. The module
handles responsibility of persistence of the states.

Signed-off-by: Omkar Kulkarni <omkar.kulkarni@nordicsemi.no>
2024-07-22 14:49:24 +02:00
Ingar Kulbrandstad
470c0d13a0 Bluetooth: Mesh: Bridge Configuration Client/Server API
Adding documentation and function calles for the API's
in Bridge Configuration Client model and Bridge
Configuration Server model.

Signed-off-by: Ingar Kulbrandstad <ingar.kulbrandstad@nordicsemi.no>
2024-07-04 10:03:31 +02:00
9766 changed files with 111512 additions and 323189 deletions

View File

@@ -39,7 +39,6 @@ ForEachMacros:
- 'FOR_EACH_IDX'
- 'FOR_EACH_IDX_FIXED_ARG'
- 'FOR_EACH_NONEMPTY_TERM'
- 'FOR_EACH_FIXED_ARG_NONEMPTY_TERM'
- 'RB_FOR_EACH'
- 'RB_FOR_EACH_CONTAINER'
- 'SYS_DLIST_FOR_EACH_CONTAINER'
@@ -69,18 +68,8 @@ ForEachMacros:
- 'Z_GENLIST_FOR_EACH_NODE'
- 'Z_GENLIST_FOR_EACH_NODE_SAFE'
- 'STRUCT_SECTION_FOREACH'
- 'STRUCT_SECTION_FOREACH_ALTERNATE'
- 'TYPE_SECTION_FOREACH'
- 'K_SPINLOCK'
- 'COAP_RESOURCE_FOREACH'
- 'COAP_SERVICE_FOREACH'
- 'COAP_SERVICE_FOREACH_RESOURCE'
- 'HTTP_RESOURCE_FOREACH'
- 'HTTP_SERVER_CONTENT_TYPE_FOREACH'
- 'HTTP_SERVICE_FOREACH'
- 'HTTP_SERVICE_FOREACH_RESOURCE'
- 'I3C_BUS_FOR_EACH_I3CDEV'
- 'I3C_BUS_FOR_EACH_I2CDEV'
IfMacros:
- 'CHECKIF'
# Disabled for now, see bug https://github.com/zephyrproject-rtos/zephyr/issues/48520
@@ -95,18 +84,11 @@ IncludeCategories:
- Regex: '.*'
Priority: 3
IndentCaseLabels: false
IndentGotoLabels: false
IndentWidth: 8
InsertBraces: true
SpaceBeforeInheritanceColon: False
SpaceBeforeParens: ControlStatementsExceptControlMacros
SortIncludes: Never
UseTab: ForContinuationAndIndentation
WhitespaceSensitiveMacros:
- COND_CODE_0
- COND_CODE_1
- IF_DISABLED
- IF_ENABLED
- LISTIFY
- STRINGIFY
- Z_STRINGIFY

View File

@@ -1,21 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
#
# Copyright (c) 2024, Basalte bv
analyzer:
# Start by disabling all
- --disable-all
# Enable the sensitive profile
- --enable=sensitive
# Disable unused cases
- --disable=boost
- --disable=mpi
# Many identifiers in zephyr start with _
- --disable=clang-diagnostic-reserved-identifier
- --disable=clang-diagnostic-reserved-macro-identifier
# Cleanup
- --clean

View File

@@ -6,8 +6,8 @@ labels: bug
assignees: ''
---
<!--
**Notes**
**Notes (delete this)**
Github Discussions (https://github.com/zephyrproject-rtos/zephyr/discussions)
are available to first verify that the issue is a genuine Zephyr bug and not a
consequence of Zephyr services misuse.
@@ -16,10 +16,8 @@ This issue list is only for bugs in the main Zephyr code base
(https://github.com/zephyrproject-rtos/zephyr/). If the bug is for a project
fork (such as NCS) specific feature, please open an issue in the fork project
instead.
-->
**Describe the bug**
<!--
A clear and concise description of what the bug is.
Please also mention any information which could help others to understand
@@ -29,43 +27,31 @@ the problem you're facing:
- Is this a regression? If yes, have you been able to "git bisect" it to a
specific commit?
- ...
-->
**To Reproduce**
<!--
Steps to reproduce the behavior:
1. mkdir build; cd build
2. cmake -DBOARD=board\_xyz
3. make
4. See error
-->
**Expected behavior**
<!--
A clear and concise description of what you expected to happen.
-->
**Impact**
<!--
What impact does this issue have on your progress (e.g., annoyance, showstopper)
-->
**Logs and console output**
<!--
If applicable, add console logs or other types of debug information
e.g Wireshark capture or Logic analyzer capture (upload in zip archive).
copy-and-paste text and put a code fence (\`\`\`) before and after, to help
explain the issue. (if unable to obtain text log, add a screenshot)
-->
**Environment (please complete the following information):**
- OS: (e.g. Linux, MacOS, Windows)
- Toolchain (e.g Zephyr SDK, ...)
- Commit SHA or Version used
**Additional context**
<!--
Add any other context that could be relevant to your issue, such as pin setting,
target configuration, ...
-->

View File

@@ -8,21 +8,13 @@ assignees: ''
---
**Is your enhancement proposal related to a problem? Please describe.**
<!--
A clear and concise description of what the problem is.
-->
**Describe the solution you'd like**
<!--
A clear and concise description of what you want to happen.
-->
**Describe alternatives you've considered**
<!--
A clear and concise description of any alternative solutions or features you've considered.
-->
**Additional context**
<!--
Add any other context or graphics (drag-and-drop an image) about the feature request here.
-->

View File

@@ -9,52 +9,43 @@ assignees: ''
## Introduction
<!--
This section targets end users, TSC members, maintainers and anyone else that might
need a quick explanation of your proposed change.
-->
### Problem description
<!--
Why do we want this change and what problem are we trying to address?
-->
### Proposed change
<!--
A brief summary of the proposed change - the 10,000 ft view on what it will
change once this change is implemented.
-->
## Detailed RFC
<!--
In this section of the document the target audience is the dev team. Upon
reading this section each engineer should have a rather clear picture of what
needs to be done in order to implement the described feature.
-->
### Proposed change (Detailed)
<!--
This section is freeform - you should describe your change in as much detail
as possible. Please also ensure to include any context or background info here.
For example, do we have existing components which can be reused or altered.
By reading this section, each team member should be able to know what exactly
you're planning to change and how.
-->
### Dependencies
<!--
Highlight how the change may affect the rest of the project (new components,
modifications in other areas), or other teams/projects.
-->
### Concerns and Unresolved Questions
<!--
List any concerns, unknowns, and generally unresolved questions etc.
-->
## Alternatives
<!--
List any alternatives considered, and the reasons for choosing this option
over them.
-->

View File

@@ -8,21 +8,13 @@ assignees: ''
---
**Is your feature request related to a problem? Please describe.**
<!--
A clear and concise description of what the problem is.
-->
**Describe the solution you'd like**
<!--
A clear and concise description of what you want to happen.
-->
**Describe alternatives you've considered**
<!--
A clear and concise description of any alternative solutions or features you've considered.
-->
**Additional context**
<!--
Add any other context or graphics (drag-and-drop an image) about the feature request here.
-->

6
.github/SECURITY.md vendored
View File

@@ -11,9 +11,9 @@ updates:
At this time, with the latest release of v3.6, the supported
versions are:
- v3.7: Current LTS
- v3.6: Prior release
- v2.7: Prior LTS
- v2.7: Current LTS
- v3.5: Prior release
- v3.6: Current release
## Reporting process

View File

@@ -2,20 +2,12 @@ name: Backport Issue Check
on:
pull_request_target:
types:
- edited
- opened
- reopened
- synchronize
branches:
- v*-branch
jobs:
backport:
name: Backport Issue Check
concurrency:
group: backport-issue-check-${{ github.ref }}
cancel-in-progress: true
runs-on: ubuntu-22.04
if: github.repository == 'zephyrproject-rtos/zephyr'

View File

@@ -13,7 +13,7 @@ jobs:
steps:
- name: Download artifacts
uses: dawidd6/action-download-artifact@v6
uses: dawidd6/action-download-artifact@v3
with:
run_id: ${{ github.event.workflow_run.id }}

View File

@@ -8,8 +8,6 @@ on:
- "west.yml"
- "subsys/bluetooth/**"
- "tests/bsim/**"
- "boards/nordic/nrf5*/*dt*"
- "dts/*/nordic/**"
- "tests/bluetooth/common/testlib/**"
- "samples/bluetooth/**"
- "boards/posix/**"
@@ -36,7 +34,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.14.20240823
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
options: '--entrypoint /bin/bash'
env:
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
@@ -77,7 +75,6 @@ jobs:
git config --global user.name "Zephyr Bot"
rm -fr ".git/rebase-apply"
git rebase origin/${BASE_REF}
git clean -f -d
git log --pretty=oneline | head -n 10
west init -l . || true
west config manifest.group-filter -- +ci
@@ -88,7 +85,7 @@ jobs:
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Check common triggering files
uses: tj-actions/changed-files@v45
uses: tj-actions/changed-files@v44
id: check-common-files
with:
files: |
@@ -101,11 +98,9 @@ jobs:
include/zephyr/arch/posix/
scripts/native_simulator/
tests/bsim/*
boards/nordic/nrf5*/*dt*
dts/*/nordic/
- name: Check if Bluethooth files changed
uses: tj-actions/changed-files@v45
uses: tj-actions/changed-files@v44
id: check-bluetooth-files
with:
files: |
@@ -114,7 +109,7 @@ jobs:
subsys/bluetooth/
- name: Check if Networking files changed
uses: tj-actions/changed-files@v45
uses: tj-actions/changed-files@v44
id: check-networking-files
with:
files: |
@@ -127,7 +122,7 @@ jobs:
include/zephyr/net/ieee802154*
- name: Check if UART files changed
uses: tj-actions/changed-files@v45
uses: tj-actions/changed-files@v44
id: check-uart-files
with:
files: |
@@ -137,10 +132,10 @@ jobs:
- name: Update BabbleSim to manifest revision
if: >
steps.check-bluetooth-files.outputs.any_modified == 'true'
|| steps.check-networking-files.outputs.any_modified == 'true'
|| steps.check-uart-files.outputs.any_modified == 'true'
|| steps.check-common-files.outputs.any_modified == 'true'
steps.check-bluetooth-files.outputs.any_changed == 'true'
|| steps.check-networking-files.outputs.any_changed == 'true'
|| steps.check-uart-files.outputs.any_changed == 'true'
|| steps.check-common-files.outputs.any_changed == 'true'
run: |
export BSIM_VERSION=$( west list bsim -f {revision} )
echo "Manifest points to bsim sha $BSIM_VERSION"
@@ -151,17 +146,17 @@ jobs:
make everything -s -j 8
- name: Run Bluetooth Tests with BSIM
if: steps.check-bluetooth-files.outputs.any_modified == 'true' || steps.check-common-files.outputs.any_modified == 'true'
if: steps.check-bluetooth-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
tests/bsim/ci.bt.sh
- name: Run Networking Tests with BSIM
if: steps.check-networking-files.outputs.any_modified == 'true' || steps.check-common-files.outputs.any_modified == 'true'
if: steps.check-networking-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
tests/bsim/ci.net.sh
- name: Run UART Tests with BSIM
if: steps.check-uart-files.outputs.any_modified == 'true' || steps.check-common-files.outputs.any_modified == 'true'
if: steps.check-uart-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
tests/bsim/ci.uart.sh

View File

@@ -12,7 +12,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.14.20240823
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
@@ -62,7 +62,6 @@ jobs:
git config --global user.name "Zephyr Bot"
rm -fr ".git/rebase-apply"
git rebase origin/${BASE_REF}
git clean -f -d
git log --pretty=oneline | head -n 10
west init -l . || true
west config --global update.narrow true

View File

@@ -14,7 +14,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.14.20240823
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false

View File

@@ -41,7 +41,6 @@ jobs:
git config --global user.name "Github Actions"
git remote -v
git rebase origin/${BASE_REF}
git clean -f -d
source zephyr-env.sh
# debug
ls -la

View File

@@ -1,12 +1,6 @@
name: Compliance Checks
on:
pull_request:
types:
- edited
- opened
- reopened
- synchronize
on: pull_request
jobs:
check_compliance:
@@ -38,7 +32,7 @@ jobs:
run: |
pip3 install setuptools
pip3 install wheel
pip3 install python-magic lxml junitparser gitlint pylint pykwalify yamllint clang-format unidiff sphinx-lint
pip3 install python-magic lxml junitparser gitlint pylint pykwalify yamllint
pip3 install west
- name: west setup
@@ -52,21 +46,12 @@ jobs:
[[ "$(git rev-list --merges --count origin/${BASE_REF}..)" == "0" ]] || \
(echo "::error ::Merge commits not allowed, rebase instead";false)
git rebase origin/${BASE_REF}
git clean -f -d
# debug
git log --pretty=oneline | head -n 10
west init -l . || true
west config manifest.group-filter -- +ci,-optional
west update -o=--depth=1 -n 2>&1 1> west.update.log || west update -o=--depth=1 -n 2>&1 1> west.update2.log
- name: Check for PR description
if: ${{ github.event.pull_request.body == '' }}
continue-on-error: true
id: pr_description
run: |
echo "Pull request description cannot be empty."
exit 1
- name: Run Compliance Tests
continue-on-error: true
id: compliance
@@ -95,33 +80,19 @@ jobs:
exit 1;
fi
warns=("ClangFormat")
files=($(./scripts/ci/check_compliance.py -l))
for file in "${files[@]}"; do
f="${file}.txt"
if [[ -s $f ]]; then
results=$(cat $f)
results="${results//'%'/'%25'}"
results="${results//$'\n'/'%0A'}"
results="${results//$'\r'/'%0D'}"
if [[ "${warns[@]}" =~ "${file}" ]]; then
echo "::warning file=${f}::$results"
else
echo "::error file=${f}::$results"
exit=1
fi
errors=$(cat $f)
errors="${errors//'%'/'%25'}"
errors="${errors//$'\n'/'%0A'}"
errors="${errors//$'\r'/'%0D'}"
echo "::error file=${f}::$errors"
exit=1
fi
done
if [ "${exit}" == "1" ]; then
echo "Compliance error, check for error messages in the \"Run Compliance Tests\" step"
echo "You can run this step locally with the ./scripts/ci/check_compliance.py script."
exit 1;
fi
if [ "${{ steps.pr_description.outcome }}" == "failure" ]; then
echo "PR description cannot be empty"
exit 1;
fi

View File

@@ -27,7 +27,12 @@ jobs:
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12']
os: [ubuntu-22.04, macos-14, windows-2022]
os: [ubuntu-22.04, macos-11, windows-2022]
exclude:
- os: macos-11
python-version: 3.6
- os: windows-2022
python-version: 3.6
steps:
- name: checkout
uses: actions/checkout@v4

View File

@@ -17,7 +17,7 @@ env:
# The latest CMake available directly with apt is 3.18, but we need >=3.20
# so we fetch that through pip.
CMAKE_VERSION: 3.20.5
DOXYGEN_VERSION: 1.12.0
DOXYGEN_VERSION: 1.9.6
# Job count is set to 2 less than the vCPU count of 16 because the total available RAM is 32GiB
# and each sphinx-build process may use more than 2GiB of RAM.
JOB_COUNT: 14
@@ -29,7 +29,7 @@ jobs:
if: >
github.repository_owner == 'zephyrproject-rtos'
outputs:
file_check: ${{ steps.check-doc-files.outputs.any_modified }}
file_check: ${{ steps.check-doc-files.outputs.any_changed }}
steps:
- name: checkout
uses: actions/checkout@v4
@@ -37,7 +37,7 @@ jobs:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Check if Documentation related files changed
uses: tj-actions/changed-files@v45
uses: tj-actions/changed-files@v44
id: check-doc-files
with:
files: |
@@ -62,13 +62,20 @@ jobs:
if: >
github.repository_owner == 'zephyrproject-rtos' &&
( needs.doc-file-check.outputs.file_check == 'true' || github.event_name != 'pull_request' )
runs-on: ubuntu-22.04
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
timeout-minutes: 90
concurrency:
group: doc-build-html-${{ github.ref }}
cancel-in-progress: true
steps:
- name: Print cloud service information
run: |
echo "ZEPHYR_RUNNER_CLOUD_PROVIDER = ${ZEPHYR_RUNNER_CLOUD_PROVIDER}"
echo "ZEPHYR_RUNNER_CLOUD_NODE = ${ZEPHYR_RUNNER_CLOUD_NODE}"
echo "ZEPHYR_RUNNER_CLOUD_POD = ${ZEPHYR_RUNNER_CLOUD_POD}"
- name: install-pkgs
run: |
sudo apt-get update
@@ -94,7 +101,6 @@ jobs:
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git rebase origin/${BASE_REF}
git clean -f -d
git log --graph --oneline HEAD...${PR_HEAD}
- name: cache-pip
@@ -110,22 +116,11 @@ jobs:
pip3 install west==${WEST_VERSION}
pip3 install cmake==${CMAKE_VERSION}
pip3 install coverxygen
pip3 install mlx.traceability strictdoc
- name: west setup
run: |
west init -l .
- name: prcoess requirements
run: |
west update reqmgmt
pushd ../tools/reqmgmt
strictdoc export . --formats json
popd
cp ../tools/reqmgmt/output/json/index.json doc/requirements/requirements.json
python3 doc/requirements/create_req.py --json doc/requirements/requirements.json --output doc/requirements/requirements.dox
- name: build-docs
shell: bash
run: |
@@ -146,10 +141,17 @@ jobs:
SPHINXOPTS_EXTRA="-q -t publish" \
make -C doc ${DOC_TARGET}
# API documentation coverage
python3 -m coverxygen --xml-dir doc/_build/html/doxygen/xml/ --src-dir include/ --output doc-coverage.info
# deprecated page causing issues
lcov --remove doc-coverage.info \*/deprecated > new.info
genhtml --no-function-coverage --no-branch-coverage new.info -o coverage-report
- name: compress-docs
run: |
tar --use-compress-program="xz -T0" -cf html-output.tar.xz --directory=doc/_build html
tar --use-compress-program="xz -T0" -cf api-output.tar.xz --directory=doc/_build html/doxygen/html
tar cfJ html-output.tar.xz --directory=doc/_build html
tar cfJ api-output.tar.xz --directory=doc/_build html/doxygen/html
tar cfJ api-coverage.tar.xz coverage-report
- name: upload-build
uses: actions/upload-artifact@v4
@@ -157,6 +159,12 @@ jobs:
name: html-output
path: html-output.tar.xz
- name: upload-api-coverage
uses: actions/upload-artifact@v4
with:
name: api-coverage
path: api-coverage.tar.xz
- name: process-pr
if: github.event_name == 'pull_request'
run: |
@@ -184,7 +192,8 @@ jobs:
if: |
github.event_name != 'pull_request' &&
github.repository_owner == 'zephyrproject-rtos'
runs-on: ubuntu-22.04
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container: texlive/texlive:latest
timeout-minutes: 120
concurrency:
@@ -196,6 +205,12 @@ jobs:
run: |
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: Print cloud service information
run: |
echo "ZEPHYR_RUNNER_CLOUD_PROVIDER = ${ZEPHYR_RUNNER_CLOUD_PROVIDER}"
echo "ZEPHYR_RUNNER_CLOUD_NODE = ${ZEPHYR_RUNNER_CLOUD_NODE}"
echo "ZEPHYR_RUNNER_CLOUD_POD = ${ZEPHYR_RUNNER_CLOUD_POD}"
- name: checkout
uses: actions/checkout@v4

View File

@@ -21,7 +21,7 @@ jobs:
steps:
- name: Download artifacts
uses: dawidd6/action-download-artifact@v6
uses: dawidd6/action-download-artifact@v3
with:
workflow: doc-build.yml
run_id: ${{ github.event.workflow_run.id }}

View File

@@ -24,7 +24,7 @@ jobs:
steps:
- name: Download artifacts
uses: dawidd6/action-download-artifact@v6
uses: dawidd6/action-download-artifact@v3
with:
workflow: doc-build.yml
run_id: ${{ github.event.workflow_run.id }}

View File

@@ -26,7 +26,7 @@ jobs:
group: zephyr-runner-v2-linux-x64-4xlarge
if: github.repository_owner == 'zephyrproject-rtos'
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.14.20240823
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false

View File

@@ -26,7 +26,7 @@ jobs:
strategy:
fail-fast: false
matrix:
os: [ubuntu-22.04, ubuntu-24.04, macos-13, macos-14, windows-2022]
os: [ubuntu-22.04, macos-12, macos-14, windows-2022]
runs-on: ${{ matrix.os }}
steps:
- name: Checkout
@@ -46,7 +46,6 @@ jobs:
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git rebase origin/${BASE_REF}
git clean -f -d
git log --graph --oneline HEAD...${PR_HEAD}
- name: Set up Python

View File

@@ -26,13 +26,12 @@ jobs:
west init -l . || true
- name: Manifest
uses: zephyrproject-rtos/action-manifest@v1.3.1
uses: zephyrproject-rtos/action-manifest@v1.2.2
with:
github-token: ${{ secrets.ZB_GITHUB_TOKEN }}
manifest-path: 'west.yml'
checkout-path: 'zephyrproject/zephyr'
use-tree-checkout: 'true'
check-impostor-commits: 'true'
label-prefix: 'manifest-'
verbosity-level: '1'
labels: 'manifest'

View File

@@ -21,7 +21,7 @@ jobs:
echo "TRIMMED_VERSION=${GITHUB_REF#refs/tags/v}" >> $GITHUB_OUTPUT
- name: REUSE Compliance Check
uses: fsfe/reuse-action@v4
uses: fsfe/reuse-action@v1
with:
args: spdx -o zephyr-${{ steps.get_version.outputs.VERSION }}.spdx

View File

@@ -1,61 +0,0 @@
# This workflow uses actions that are not certified by GitHub. They are provided
# by a third-party and are governed by separate terms of service, privacy
# policy, and support documentation.
name: Scorecards supply-chain security
on:
# For Branch-Protection check. Only the default branch is supported. See
# https://github.com/ossf/scorecard/blob/main/docs/checks.md#branch-protection
branch_protection_rule:
# To guarantee Maintained check is occasionally updated. See
# https://github.com/ossf/scorecard/blob/main/docs/checks.md#maintained
schedule:
- cron: '43 7 * * 6'
push:
branches:
- main
permissions: read-all
jobs:
analysis:
name: Scorecard analysis
runs-on: ubuntu-latest
permissions:
# Needed for Code scanning upload
security-events: write
# Needed for GitHub OIDC token if publish_results is true
id-token: write
steps:
- name: "Checkout code"
uses: actions/checkout@692973e3d937129bcbf40652eb9f2f61becf3332 # v4.1.7
with:
persist-credentials: false
- name: "Run analysis"
uses: ossf/scorecard-action@62b2cac7ed8198b15735ed49ab1e5cf35480ba46 # v2.4.0
with:
results_file: results.sarif
results_format: sarif
# Publish results to OpenSSF REST API for easy access by consumers.
# - Allows the repository to include the Scorecard badge.
# - See https://github.com/ossf/scorecard-action#publishing-results.
publish_results: true
# Upload the results as artifacts (optional). Commenting out will disable
# uploads of run results in SARIF format to the repository Actions tab.
# https://docs.github.com/en/actions/advanced-guides/storing-workflow-data-as-artifacts
- name: "Upload artifact"
uses: actions/upload-artifact@89ef406dd8d7e03cfd12d9e0a4a378f454709029 # v4.3.5
with:
name: SARIF file
path: results.sarif
retention-days: 5
# Upload the results to GitHub's code scanning dashboard (optional).
# Commenting out will disable upload of results to your repo's Code Scanning dashboard
- name: "Upload to code-scanning"
uses: github/codeql-action/upload-sarif@afb54ba388a7dca6ecae48f608c4ff05ff4cc77a # v3.25.15
with:
sarif_file: results.sarif

View File

@@ -43,7 +43,6 @@ jobs:
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git rebase origin/${BASE_REF}
git clean -f -d
git log --graph --oneline HEAD...${PR_HEAD}
- name: Set up Python ${{ matrix.python-version }}

View File

@@ -9,7 +9,7 @@ jobs:
runs-on: ubuntu-22.04
if: github.repository == 'zephyrproject-rtos/zephyr'
steps:
- uses: actions/stale@v9
- uses: actions/stale@v8
with:
stale-pr-message: 'This pull request has been marked as stale because it has been open (more
than) 60 days with no activity. Remove the stale label or add a comment saying that you

View File

@@ -25,7 +25,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.14.20240823
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
options: '--entrypoint /bin/bash'
outputs:
subset: ${{ steps.output-services.outputs.subset }}
@@ -77,7 +77,6 @@ jobs:
git config --global user.name "Zephyr Bot"
rm -fr ".git/rebase-apply"
git rebase origin/${BASE_REF}
git clean -f -d
git log --pretty=oneline | head -n 10
west init -l . || true
west config manifest.group-filter -- +ci,+optional
@@ -130,7 +129,7 @@ jobs:
needs: twister-build-prep
if: needs.twister-build-prep.outputs.size != 0
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.14.20240823
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
@@ -186,11 +185,9 @@ jobs:
git config --global user.name "Zephyr Builder"
rm -fr ".git/rebase-apply"
git rebase origin/${BASE_REF}
git clean -f -d
git log --pretty=oneline | head -n 10
fi
echo "$HOME/.local/bin" >> $GITHUB_PATH
echo "$HOME/.cargo/bin" >> $GITHUB_PATH
west init -l . || true
west config manifest.group-filter -- +ci,+optional
@@ -204,8 +201,6 @@ jobs:
run: |
cmake --version
gcc --version
cargo --version
rustup target list --installed
ls -la
echo "github.ref: ${{ github.ref }}"
echo "github.base_ref: ${{ github.base_ref }}"
@@ -315,7 +310,7 @@ jobs:
if: success() || failure()
steps:
# Needed for elasticearch and upload script
# Needed for opensearch and upload script
- if: github.event_name == 'push' || github.event_name == 'schedule'
name: Checkout
uses: actions/checkout@v4
@@ -329,7 +324,7 @@ jobs:
path: artifacts
- if: github.event_name == 'push' || github.event_name == 'schedule'
name: Upload to elasticsearch
name: Upload to opensearch
run: |
pip3 install elasticsearch
# set run date on upload to get consistent and unified data across the matrix.

View File

@@ -43,8 +43,6 @@ jobs:
echo "$HOME/.local/bin" >> $GITHUB_PATH
west init -l . || true
# we do not depend on any hals, tools or bootloader, save some time and space...
west config manifest.group-filter -- -hal,-tools,-bootloader
west config --global update.narrow true
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'

View File

@@ -30,7 +30,12 @@ jobs:
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12']
os: [ubuntu-22.04, macos-14, windows-2022]
os: [ubuntu-22.04, macos-11, windows-2022]
exclude:
- os: macos-11
python-version: 3.6
- os: windows-2022
python-version: 3.6
steps:
- name: checkout
uses: actions/checkout@v4

2
.gitignore vendored
View File

@@ -76,7 +76,6 @@ tags
BinaryFiles.txt
BoardYml.txt
Checkpatch.txt
ClangFormat.txt
DevicetreeBindings.txt
GitDiffCheck.txt
Gitlint.txt
@@ -91,5 +90,4 @@ MaintainersFormat.txt
ModulesMaintainers.txt
Nits.txt
Pylint.txt
SphinxLint.txt
YAMLLint.txt

View File

@@ -61,7 +61,6 @@ Lixin Guo <lixinx.guo@intel.com>
Łukasz Mazur <lukasz.mazur@hidglobal.com>
Manuel Argüelles <manuel.arguelles@nxp.com>
Manuel Argüelles <manuel.arguelles@nxp.com> <manuel.arguelles@coredumplabs.com>
Manuel Argüelles <manuel.arguelles@nxp.com> <marguelles.dev@gmail.com>
Marc Herbert <marc.herbert@intel.com> <46978960+marc-hb@users.noreply.github.com>
Marin Jurjević <marin.jurjevic@hotmail.com>
Mariusz Ryndzionek <mariusz.ryndzionek@firmwave.com>

View File

@@ -152,7 +152,6 @@ zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:$<TARGET_PROPERTY:compiler-cpp,
# Extra warnings options for twister run
if (CONFIG_COMPILER_WARNINGS_AS_ERRORS)
zephyr_compile_options($<$<COMPILE_LANGUAGE:C>:$<TARGET_PROPERTY:compiler,warnings_as_errors>>)
zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:$<TARGET_PROPERTY:compiler,warnings_as_errors>>)
zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:$<TARGET_PROPERTY:asm,warnings_as_errors>>)
zephyr_link_libraries($<TARGET_PROPERTY:linker,warnings_as_errors>)
endif()
@@ -361,21 +360,8 @@ zephyr_compile_options(
$<$<COMPILE_LANGUAGE:ASM>:-D_ASMLANGUAGE>
)
find_package(Deprecated COMPONENTS toolchain_ld_base)
if(DEFINED TOOLCHAIN_LD_FLAGS)
zephyr_ld_options(${TOOLCHAIN_LD_FLAGS})
endif()
zephyr_link_libraries(PROPERTY base)
zephyr_link_libraries_ifndef(CONFIG_LINKER_USE_RELAX PROPERTY no_relax)
zephyr_link_libraries_ifdef(CONFIG_LINKER_USE_RELAX PROPERTY relax)
# Sort the common symbols and each input section by alignment
# in descending order to minimize padding between these symbols.
zephyr_link_libraries_ifdef(CONFIG_LINKER_SORT_BY_ALIGNMENT PROPERTY sort_alignment)
# @Intent: Set fundamental linker specific flags
toolchain_ld_base()
toolchain_ld_force_undefined_symbols(
_OffsetAbsSyms
@@ -383,37 +369,13 @@ toolchain_ld_force_undefined_symbols(
)
if(NOT CONFIG_NATIVE_BUILD)
find_package(Deprecated COMPONENTS toolchain_ld_baremetal)
zephyr_link_libraries(PROPERTY baremetal)
# Note that some architectures will skip this flag if set to error, even
# though the compiler flag check passes (e.g. ARC and Xtensa). So warning
# should be the default for now.
#
# Skip this for native application as Zephyr only provides
# additions to the host toolchain linker script. The relocation
# sections (.rel*) requires us to override those provided
# by host toolchain. As we can't account for all possible
# combination of compiler and linker on all machines used
# for development, it is better to turn this off.
#
# CONFIG_LINKER_ORPHAN_SECTION_PLACE is to place the orphan sections
# without any warnings or errors, which is the default behavior.
# So there is no need to explicitly set a linker flag.
if(CONFIG_LINKER_ORPHAN_SECTION_WARN)
zephyr_link_libraries(PROPERTY orphan_warning)
elseif(CONFIG_LINKER_ORPHAN_SECTION_ERROR)
zephyr_link_libraries(PROPERTY orphan_error)
endif()
# @Intent: Set linker specific flags for bare metal target
toolchain_ld_baremetal()
endif()
if(CONFIG_CPP)
if(NOT CONFIG_MINIMAL_LIBCPP AND NOT CONFIG_NATIVE_LIBRARY)
find_package(Deprecated COMPONENTS toolchain_ld_cpp)
endif()
zephyr_link_libraries(PROPERTY cpp_base)
if(CONFIG_CPP AND NOT CONFIG_MINIMAL_LIBCPP AND NOT CONFIG_NATIVE_LIBRARY)
# @Intent: Set linker specific flags for C++
toolchain_ld_cpp()
endif()
# @Intent: Add the basic toolchain warning flags
@@ -1651,14 +1613,11 @@ endif()
if(CONFIG_BUILD_OUTPUT_ADJUST_LMA)
math(EXPR adjustment "${CONFIG_BUILD_OUTPUT_ADJUST_LMA}" OUTPUT_FORMAT DECIMAL)
set(args_adjustment ${CONFIG_BUILD_OUTPUT_ADJUST_LMA_SECTIONS})
list(TRANSFORM args_adjustment PREPEND $<TARGET_PROPERTY:bintools,elfconvert_flag_lma_adjust>)
list(TRANSFORM args_adjustment APPEND +${adjustment})
list(APPEND
post_build_commands
COMMAND $<TARGET_PROPERTY:bintools,elfconvert_command>
$<TARGET_PROPERTY:bintools,elfconvert_flag_final>
${args_adjustment}
$<TARGET_PROPERTY:bintools,elfconvert_flag_lma_adjust>${adjustment}
$<TARGET_PROPERTY:bintools,elfconvert_flag_infile>${KERNEL_ELF_NAME}
$<TARGET_PROPERTY:bintools,elfconvert_flag_outfile>${KERNEL_ELF_NAME}
)
@@ -1939,6 +1898,7 @@ if (CONFIG_LLEXT AND CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID)
${ZEPHYR_BASE}/scripts/build/llext_prepare_exptab.py
--elf-file ${PROJECT_BINARY_DIR}/${KERNEL_ELF_NAME}
--slid-listing ${PROJECT_BINARY_DIR}/slid_listing.txt
-vvv
)
endif()
@@ -2029,39 +1989,22 @@ elseif(CONFIG_LOG_MIPI_SYST_USE_CATALOG)
endif()
if(LOG_DICT_DB_NAME_ARG)
set(log_dict_gen_command
if (NOT CONFIG_LOG_DICTIONARY_DB_TARGET)
set(LOG_DICT_DB_ALL_TARGET ALL)
endif()
add_custom_command(
OUTPUT ${LOG_DICT_DB_NAME}
COMMAND
${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/logging/dictionary/database_gen.py
${KERNEL_ELF_NAME}
${LOG_DICT_DB_NAME_ARG}=${LOG_DICT_DB_NAME}
--build-header ${PROJECT_BINARY_DIR}/include/generated/zephyr/version.h
WORKING_DIRECTORY ${PROJECT_BINARY_DIR}
COMMENT "Generating logging dictionary database: ${LOG_DICT_DB_NAME}"
DEPENDS ${logical_target_for_zephyr_elf}
)
if (NOT CONFIG_LOG_DICTIONARY_DB_TARGET)
# If not using a separate target for generating logging dictionary
# database, add the generation to post build command to make sure
# the database is actually being generated.
list(APPEND
post_build_commands
COMMAND ${CMAKE_COMMAND} -E echo "Generating logging dictionary database: ${LOG_DICT_DB_NAME}"
COMMAND ${log_dict_gen_command}
)
list(APPEND
post_build_byproducts
${LOG_DICT_DB_NAME}
)
else()
# Seprate build target for generating logging dictionary database.
# This needs to be explicitly called/used to generate the database.
add_custom_command(
OUTPUT ${LOG_DICT_DB_NAME}
COMMAND ${log_dict_gen_command}
WORKING_DIRECTORY ${PROJECT_BINARY_DIR}
COMMENT "Generating logging dictionary database: ${LOG_DICT_DB_NAME}"
DEPENDS ${logical_target_for_zephyr_elf}
)
add_custom_target(log_dict_db_gen DEPENDS ${LOG_DICT_DB_NAME})
endif()
add_custom_target(log_dict_db_gen ${LOG_DICT_DB_ALL_TARGET} DEPENDS ${LOG_DICT_DB_NAME})
endif()
# Add post_build_commands to post-process the final .elf file produced by
@@ -2174,15 +2117,12 @@ endif()
set(llext_edk_file ${PROJECT_BINARY_DIR}/${CONFIG_LLEXT_EDK_NAME}.tar.xz)
# TODO maybe generate flags for C CXX ASM
zephyr_get_compile_definitions_for_lang(C zephyr_defs)
zephyr_get_compile_options_for_lang(C zephyr_flags)
# Filter out non LLEXT and LLEXT_EDK flags - and add required ones
llext_filter_zephyr_flags(LLEXT_REMOVE_FLAGS ${zephyr_flags} llext_filt_flags)
llext_filter_zephyr_flags(LLEXT_EDK_REMOVE_FLAGS ${llext_filt_flags} llext_filt_flags)
llext_filter_zephyr_flags(LLEXT_REMOVE_FLAGS ${zephyr_flags} llext_edk_cflags)
llext_filter_zephyr_flags(LLEXT_EDK_REMOVE_FLAGS ${llext_edk_cflags} llext_edk_cflags)
set(llext_edk_cflags ${zephyr_defs} -DLL_EXTENSION_BUILD)
list(APPEND llext_edk_cflags ${llext_filt_flags})
list(APPEND llext_edk_cflags ${LLEXT_APPEND_FLAGS})
list(APPEND llext_edk_cflags ${LLEXT_EDK_APPEND_FLAGS})
@@ -2206,7 +2146,7 @@ add_custom_command(
-DAPPLICATION_SOURCE_DIR=${APPLICATION_SOURCE_DIR}
-DINTERFACE_INCLUDE_DIRECTORIES="$<TARGET_PROPERTY:zephyr_interface,INTERFACE_INCLUDE_DIRECTORIES>"
-Dllext_edk_file=${llext_edk_file}
-Dllext_edk_cflags="${llext_edk_cflags}"
-Dllext_cflags="${llext_edk_cflags}"
-Dllext_edk_name=${CONFIG_LLEXT_EDK_NAME}
-DWEST_TOPDIR=${WEST_TOPDIR}
-DZEPHYR_BASE=${ZEPHYR_BASE}

View File

@@ -41,7 +41,6 @@
/soc/riscv/riscv-privileged/gd32vf103/ @soburi
/soc/starfive/jh71xx/ @pfarwsi
/soc/riscv/riscv-privileged/niosv/ @sweeaun
/boards/adafruit/feather_nrf52840/ @jacobw
/boards/ene/ @ene-steven
/boards/arm/96b_argonkey/ @avisconti
/boards/arm/96b_avenger96/ @Mani-Sadhasivam
@@ -188,7 +187,6 @@
/drivers/dai/intel/ssp/ @kv2019i @marcinszkudlinski @abonislawski
/drivers/dai/intel/dmic/ @marcinszkudlinski @abonislawski
/drivers/dai/intel/alh/ @abonislawski
/drivers/dma/dma_dw_axi.c @pbalsundar
/drivers/dma/*dw* @tbursztyka
/drivers/dma/*dw_common* @abonislawski
/drivers/dma/*sam0* @Sizurka
@@ -210,8 +208,6 @@
/drivers/ethernet/*adin2111* @GeorgeCGV
/drivers/ethernet/*oa_tc6* @lmajewski
/drivers/ethernet/*lan865x* @lmajewski
/drivers/ethernet/dwc_xgmac @Smale-12048867
/drivers/ethernet/dwc_xgmac/dwc_xgmac @Smale-12048867
/drivers/ethernet/phy/ @rlubos @tbursztyka @arvinf @jukkar
/drivers/ethernet/phy/*adin2111* @GeorgeCGV
/drivers/mdio/*adin2111* @GeorgeCGV
@@ -330,6 +326,7 @@
/drivers/serial/uart_altera.c @gohshunjing
/drivers/serial/*ns16550* @dcpleung @nashif @gdengi
/drivers/serial/*nrfx* @anangl
/drivers/serial/uart_liteuart.c @mateusz-holenko @kgugala @pgielda
/drivers/serial/Kconfig.mcux_iuart @Mani-Sadhasivam
/drivers/serial/uart_mcux_iuart.c @Mani-Sadhasivam
/drivers/serial/Kconfig.rtt @carlescufi @pkral78
@@ -370,6 +367,7 @@
/drivers/timer/*rcar_cmt* @aaillet
/drivers/timer/*esp32_sys* @uLipe
/drivers/timer/*sam0_rtc* @bendiscz
/drivers/timer/*arcv2* @ruuddw
/drivers/timer/*xtensa* @dcpleung
/drivers/timer/*rv32m1_lptmr* @mbolivar
/drivers/timer/*nrf_rtc* @anangl
@@ -397,6 +395,7 @@
/drivers/wifi/eswifi/ @loicpoulain @nandojve
/drivers/wifi/winc1500/ @kludentwo
/drivers/virtualization/ @tbursztyka
/dts/arc/ @abrodkin @ruuddw @iriszzw @evgeniy-paltsev
/dts/arm/acsip/ @NorthernDean
/dts/arm/aspeed/ @aspeeddylan
/dts/arm/atmel/ @galak @nandojve

View File

@@ -1,19 +0,0 @@
# Constant variables to be used across Kconfig options
# Copyright (c) 2024 basalte bv
# SPDX-License-Identifier: Apache-2.0
INT8_MIN := -128
INT16_MIN := -32768
INT32_MIN := -2147483648
INT64_MIN := -9223372036854775808
INT8_MAX := 127
INT16_MAX := 32767
INT32_MAX := 2147483647
INT64_MAX := 9223372036854775807
UINT8_MAX := 255
UINT16_MAX := 65535
UINT32_MAX := 4294967295
UINT64_MAX := 18446744073709551615

View File

@@ -5,8 +5,6 @@
# Copyright (c) 2023 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
source "Kconfig.constants"
osource "${APPLICATION_SOURCE_DIR}/VERSION"
# Include Kconfig.defconfig files first so that they can override defaults and
@@ -260,20 +258,6 @@ config LINKER_USE_PINNED_SECTION
Requires that pinned sections exist in the architecture, SoC,
board or custom linker script.
config LINKER_USE_ONDEMAND_SECTION
bool "Use Evictable Linker Section"
depends on DEMAND_MAPPING
depends on !LINKER_USE_PINNED_SECTION
depends on !ARCH_MAPS_ALL_RAM
help
If enabled, the symbols which may be evicted from memory
will be put into a linker section reserved for on-demand symbols.
During boot, the corresponding memory will be mapped as paged out.
This is conceptually the opposite of CONFIG_LINKER_USE_PINNED_SECTION.
Requires that on-demand sections exist in the architecture, SoC,
board or custom linker script.
config LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT
bool "Generic sections are present at boot" if DEMAND_PAGING && LINKER_USE_PINNED_SECTION
default y
@@ -289,7 +273,7 @@ config LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT
config LINKER_LAST_SECTION_ID
bool "Last section identifier"
default y if !ARM64
default y
depends on ARM || ARM64 || RISCV
help
If enabled, the last section will contain an identifier.
@@ -836,23 +820,6 @@ config BUILD_OUTPUT_ADJUST_LMA
default "$(dt_chosen_reg_addr_hex,$(DT_CHOSEN_IMAGE_M4))-\
$(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))"
config BUILD_OUTPUT_ADJUST_LMA_SECTIONS
def_string "*"
depends on BUILD_OUTPUT_ADJUST_LMA!=""
help
This determines the output sections to which the above LMA adjustment
will be applied.
The value can be the name of a section in the final ELF, like "text".
It can also be a pattern with wildcards, such as "*bss", which could
match more than one section name. Multiple such patterns can be given
as a ";"-separated list. It's possible to supply a 'negative' pattern
starting with "!", to exclude sections matched by a preceding pattern.
By default, all sections will have their LMA adjusted. The following
example excludes one section produced by the code relocation feature:
config BUILD_OUTPUT_ADJUST_LMA_SECTIONS
default "*;!.extflash_text_reloc"
config BUILD_OUTPUT_INFO_HEADER
bool "Create a image information header"
help
@@ -963,8 +930,6 @@ config DEPRECATED
help
Symbol that must be selected by a feature or module if it is
considered to be deprecated.
When adding this to an option, remember to follow the instructions in
https://docs.zephyrproject.org/latest/develop/api/api_lifecycle.html#deprecated
config WARN_DEPRECATED
bool

File diff suppressed because it is too large Load Diff

View File

@@ -10,9 +10,12 @@
</p>
</a>
<a href="https://bestpractices.coreinfrastructure.org/projects/74"><img src="https://bestpractices.coreinfrastructure.org/projects/74/badge"></a>
<a href="https://scorecard.dev/viewer/?uri=github.com/zephyrproject-rtos/zephyr"><img src="https://api.securityscorecards.dev/projects/github.com/zephyrproject-rtos/zephyr/badge"></a>
<a href="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml?query=branch%3Amain"><img src="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml/badge.svg?event=push"></a>
<a href="https://bestpractices.coreinfrastructure.org/projects/74"><img
src="https://bestpractices.coreinfrastructure.org/projects/74/badge"></a>
<a
href="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml?query=branch%3Amain">
<img
src="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml/badge.svg?event=push"></a>
The Zephyr Project is a scalable real-time operating system (RTOS) supporting

View File

@@ -1,5 +1,5 @@
VERSION_MAJOR = 3
VERSION_MINOR = 7
PATCHLEVEL = 99
PATCHLEVEL = 0
VERSION_TWEAK = 0
EXTRAVERSION =
EXTRAVERSION = rc1

View File

@@ -32,7 +32,6 @@ config ARM
bool
select ARCH_IS_SET
select ARCH_SUPPORTS_COREDUMP if CPU_CORTEX_M
select ARCH_SUPPORTS_COREDUMP_THREADS if CPU_CORTEX_M
# FIXME: current state of the code for all ARM requires this, but
# is really only necessary for Cortex-M with ARM MPU!
select GEN_PRIV_STACKS
@@ -53,8 +52,6 @@ config ARM64
select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD
select BARRIER_OPERATIONS_ARCH
select ARCH_HAS_DIRECTED_IPIS
select ARCH_HAS_DEMAND_PAGING
select ARCH_HAS_DEMAND_MAPPING
help
ARM64 (AArch64) architecture
@@ -83,7 +80,6 @@ config X86
select ARCH_IS_SET
select ATOMIC_OPERATIONS_BUILTIN
select ARCH_SUPPORTS_COREDUMP
select ARCH_SUPPORTS_COREDUMP_PRIV_STACKS
select ARCH_SUPPORTS_ROM_START if !X86_64
select CPU_HAS_MMU
select ARCH_MEM_DOMAIN_DATA if USERSPACE && !X86_COMMON_PAGE_TABLE
@@ -92,14 +88,12 @@ config X86
select ARCH_HAS_TIMING_FUNCTIONS
select ARCH_HAS_THREAD_LOCAL_STORAGE
select ARCH_HAS_DEMAND_PAGING if !X86_64
select ARCH_HAS_DEMAND_MAPPING if ARCH_HAS_DEMAND_PAGING
select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD
select NEED_LIBC_MEM_PARTITION if USERSPACE && TIMING_FUNCTIONS \
&& !BOARD_HAS_TIMING_FUNCTIONS \
&& !SOC_HAS_TIMING_FUNCTIONS
select ARCH_HAS_STACK_CANARIES_TLS
select ARCH_SUPPORTS_MEM_MAPPED_STACKS if X86_MMU && !DEMAND_PAGING
select ARCH_HAS_THREAD_PRIV_STACK_SPACE_GET if USERSPACE
help
x86 architecture
@@ -116,18 +110,17 @@ config RISCV
bool
select ARCH_IS_SET
select ARCH_SUPPORTS_COREDUMP
select ARCH_SUPPORTS_COREDUMP_PRIV_STACKS
select ARCH_SUPPORTS_ROM_START if !SOC_FAMILY_ESPRESSIF_ESP32
select ARCH_SUPPORTS_EMPTY_IRQ_SPURIOUS
select ARCH_HAS_CODE_DATA_RELOCATION
select ARCH_HAS_THREAD_LOCAL_STORAGE
select ARCH_HAS_STACKWALK
select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD
select USE_SWITCH_SUPPORTED
select USE_SWITCH
select SCHED_IPI_SUPPORTED if SMP
select ARCH_HAS_DIRECTED_IPIS
select BARRIER_OPERATIONS_BUILTIN
select ARCH_HAS_THREAD_PRIV_STACK_SPACE_GET if USERSPACE
imply XIP
help
RISCV architecture
@@ -142,7 +135,6 @@ config XTENSA
select ARCH_MEM_DOMAIN_DATA if USERSPACE
select ARCH_HAS_DIRECTED_IPIS
select THREAD_STACK_INFO
select ARCH_HAS_THREAD_PRIV_STACK_SPACE_GET if USERSPACE
help
Xtensa architecture
@@ -153,7 +145,6 @@ config ARCH_POSIX
select ARCH_HAS_CUSTOM_SWAP_TO_MAIN
select ARCH_HAS_CUSTOM_BUSY_WAIT
select ARCH_HAS_THREAD_ABORT
select ARCH_HAS_THREAD_NAME_HOOK
select NATIVE_BUILD
select HAS_COVERAGE_SUPPORT
select BARRIER_OPERATIONS_BUILTIN
@@ -189,9 +180,8 @@ config BIG_ENDIAN
Little-endian architecture is the default and should leave this option
unselected. This option is selected by arch/$ARCH/Kconfig,
soc/**/Kconfig, or boards/**/Kconfig and the user should generally avoid
modifying it. The option is used to select linker script OUTPUT_FORMAT,
the toolchain flags (TOOLCHAIN_C_FLAGS, TOOLCHAIN_LD_FLAGS), and command
line option for gen_isr_tables.py.
modifying it. The option is used to select linker script OUTPUT_FORMAT
and command line option for gen_isr_tables.py.
config LITTLE_ENDIAN
# Hidden Kconfig option representing the default little-endian architecture
@@ -423,17 +413,10 @@ config FRAME_POINTER
Select Y here to gain precise stack traces at the expense of slightly
increased size and decreased speed.
config ARCH_STACKWALK
bool "Compile the stack walking function"
default y
depends on ARCH_HAS_STACKWALK
help
Select Y here to compile the `arch_stack_walk()` function
config ARCH_STACKWALK_MAX_FRAMES
int "Max depth for stack walk function"
default 8
depends on ARCH_STACKWALK
depends on ARCH_HAS_STACKWALK
help
Depending on implementation, this can place a hard limit on the depths of the stack
for the stack walk function to examine.
@@ -615,14 +598,6 @@ config SIMPLIFIED_EXCEPTION_CODES
down to the generic K_ERR_CPU_EXCEPTION, which makes testing code
much more portable.
config EMPTY_IRQ_SPURIOUS
bool "Create empty spurious interrupt handler"
depends on ARCH_SUPPORTS_EMPTY_IRQ_SPURIOUS
help
This option changes body of spurious interrupt handler. When enabled,
handler contains only an infinite while loop, when disabled, handler
contains the whole Zephyr fault handling procedure.
endmenu # Interrupt configuration
config INIT_ARCH_HW_AT_BOOT
@@ -679,27 +654,23 @@ config ARCH_HAS_NESTED_EXCEPTION_DETECTION
config ARCH_SUPPORTS_COREDUMP
bool
config ARCH_SUPPORTS_COREDUMP_THREADS
bool
config ARCH_SUPPORTS_COREDUMP_PRIV_STACKS
bool
config ARCH_SUPPORTS_ARCH_HW_INIT
bool
config ARCH_SUPPORTS_ROM_START
bool
config ARCH_SUPPORTS_EMPTY_IRQ_SPURIOUS
bool
config ARCH_HAS_EXTRA_EXCEPTION_INFO
bool
config ARCH_HAS_GDBSTUB
bool
config ARCH_HAS_STACKWALK
bool
help
This is selected when the architecture implemented the arch_stack_walk() API.
config ARCH_HAS_COHERENCE
bool
help
@@ -723,11 +694,6 @@ config ARCH_SUPPORTS_MEM_MAPPED_STACKS
help
Select when the architecture supports memory mapped stacks.
config ARCH_HAS_THREAD_PRIV_STACK_SPACE_GET
bool
help
Select when the architecture implements arch_thread_priv_stack_space_get().
#
# Other architecture related options
#
@@ -793,13 +759,6 @@ config ARCH_HAS_DEMAND_PAGING
This hidden configuration should be selected by the architecture if
demand paging is supported.
config ARCH_HAS_DEMAND_MAPPING
bool
help
This hidden configuration should be selected by the architecture if
demand paging is supported and arch_mem_map() supports
K_MEM_MAP_UNPAGED.
config ARCH_HAS_RESERVED_PAGE_FRAMES
bool
help
@@ -825,7 +784,7 @@ config CPU_CACHE_INCOHERENT
help
This hidden configuration should be selected when the CPU has
incoherent cache. This applies to intra-CPU multiprocessing
incoherence and makes only sense when MP_MAX_NUM_CPUS > 1.
incoherence and makes only sense when MP_NUM_CPUS > 1.
config CPU_HAS_ICACHE
bool
@@ -1031,7 +990,7 @@ config CACHE_DOUBLEMAP
point to the same cached/uncached memory at different locations.
This applies to intra-CPU multiprocessing incoherence and makes only
sense when MP_MAX_NUM_CPUS > 1.
sense when MP_NUM_CPUS > 1.
config CACHE_MANAGEMENT
bool "Cache management features"
@@ -1115,28 +1074,9 @@ config TOOLCHAIN_HAS_BUILTIN_FFS
help
Hidden option to signal that toolchain has __builtin_ffs*().
config ARCH_HAS_CUSTOM_CPU_IDLE
bool
config ARCH_CPU_IDLE_CUSTOM
bool "Custom arch_cpu_idle implementation"
default n
help
This options allows applications to override the default arch idle implementation with
a custom one.
config ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
bool
help
This options allows applications to override the default arch idle implementation with
a custom one.
config ARCH_HAS_CUSTOM_SWAP_TO_MAIN
bool
help
It's possible that an architecture port cannot use _Swap() to swap to
the _main() thread, but instead must do something custom. It must
enable this option in that case.
config ARCH_HAS_CUSTOM_BUSY_WAIT
bool
help
It's possible that an architecture port cannot or does not want to use
the provided k_busy_wait(), but instead must do something custom. It must
enable this option in that case.

View File

@@ -374,9 +374,7 @@ config ARC_EXCEPTION_STACK_SIZE
endmenu
config ARC_EARLY_SOC_INIT
bool "Make early stage SoC-specific initialization [DEPRECATED]"
select SOC_RESET_HOOK
select DEPRECATED
bool "Make early stage SoC-specific initialization"
help
Call SoC per-core setup code on early stage initialization
(before C runtime initialization). Setup code is called in form of

View File

@@ -227,8 +227,4 @@ static int init_dcache(void)
return 0;
}
void arch_cache_init(void)
{
init_dcache();
}
SYS_INIT(init_dcache, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);

View File

@@ -26,7 +26,6 @@ SECTION_VAR(BSS, z_arc_cpu_sleep_mode)
.align 4
.word 0
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
/*
* @brief Put the CPU in low-power mode
*
@@ -49,9 +48,7 @@ SECTION_FUNC(TEXT, arch_cpu_idle)
sleep r1
j_s [blink]
nop
#endif
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
/*
* @brief Put the CPU in low-power mode, entered with IRQs locked
*
@@ -59,7 +56,6 @@ SECTION_FUNC(TEXT, arch_cpu_idle)
*
* void arch_cpu_atomic_idle(unsigned int key)
*/
SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
#ifdef CONFIG_TRACING
@@ -74,4 +70,3 @@ SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
sleep r1
j_s.d [blink]
seti r0
#endif

View File

@@ -54,7 +54,7 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
}
/* need to be executed on every core in the system */
void arch_irq_offload_init(void)
int arc_irq_offload_init(void)
{
IRQ_CONNECT(IRQ_OFFLOAD_LINE, IRQ_OFFLOAD_PRIO, arc_irq_offload_handler, NULL, 0);
@@ -64,4 +64,8 @@ void arch_irq_offload_init(void)
* with generic irq_enable() but via z_arc_v2_irq_unit_int_enable().
*/
z_arc_v2_irq_unit_int_enable(IRQ_OFFLOAD_LINE);
return 0;
}
SYS_INIT(arc_irq_offload_init, POST_KERNEL, 0);

View File

@@ -238,7 +238,7 @@ int arc_core_mpu_buffer_validate(const void *addr, size_t size, int write)
* This function provides the default configuration mechanism for the Memory
* Protection Unit (MPU).
*/
void arc_mpu_init(void)
static int arc_mpu_init(void)
{
uint32_t num_regions = get_num_regions();
@@ -246,6 +246,7 @@ void arc_mpu_init(void)
if (mpu_config.num_regions > num_regions) {
__ASSERT(0, "Request to configure: %u regions (supported: %u)\n",
mpu_config.num_regions, num_regions);
return -EINVAL;
}
/* Disable MPU */
@@ -277,7 +278,10 @@ void arc_mpu_init(void)
/* Enable MPU */
arc_core_mpu_enable();
return 0;
}
SYS_INIT(arc_mpu_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_COMMON_INTERNAL_H_ */

View File

@@ -814,7 +814,7 @@ int arc_core_mpu_buffer_validate(const void *addr, size_t size, int write)
* This function provides the default configuration mechanism for the Memory
* Protection Unit (MPU).
*/
void arc_mpu_init(void)
static int arc_mpu_init(void)
{
uint32_t num_regions;
uint32_t i;
@@ -826,7 +826,7 @@ void arc_mpu_init(void)
__ASSERT(0,
"Request to configure: %u regions (supported: %u)\n",
mpu_config.num_regions, num_regions);
return;
return -EINVAL;
}
static_regions_num = 0U;
@@ -851,7 +851,7 @@ void arc_mpu_init(void)
MPU_DYNAMIC_REGION_AREAS_NUM) {
LOG_ERR("not enough dynamic regions %d",
dynamic_regions_num);
return;
return -EINVAL;
}
dyn_reg_info[dynamic_regions_num].index = i;
@@ -886,8 +886,10 @@ void arc_mpu_init(void)
/* Enable MPU */
arc_core_mpu_enable();
return;
return 0;
}
SYS_INIT(arc_mpu_init, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V4_INTERNAL_H_ */

View File

@@ -23,8 +23,6 @@
#include <zephyr/arch/arc/cluster.h>
#include <zephyr/kernel_structs.h>
#include <kernel_internal.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
/* XXX - keep for future use in full-featured cache APIs */
#if 0
@@ -115,9 +113,6 @@ static void dev_state_zero(void)
#endif
extern FUNC_NORETURN void z_cstart(void);
extern void arc_mpu_init(void);
extern void arc_secureshield_init(void);
/**
* @brief Prepare to and run C code
*
@@ -126,10 +121,6 @@ extern void arc_secureshield_init(void);
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
#ifdef CONFIG_ISA_ARCV3
arc_cluster_scm_enable();
#endif
@@ -139,15 +130,6 @@ void z_prep_c(void)
dev_state_zero();
#endif
z_data_copy();
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
#ifdef CONFIG_ARC_MPU
arc_mpu_init();
#endif
#ifdef CONFIG_ARC_SECURE_FIRMWARE
arc_secureshield_init();
#endif
z_cstart();
CODE_UNREACHABLE;
}

View File

@@ -16,9 +16,8 @@
#include <zephyr/arch/cpu.h>
#include <swap_macros.h>
#include <zephyr/arch/arc/asm-compat/assembler.h>
#if defined(CONFIG_SOC_RESET_HOOK)
GTEXT(soc_reset_hook)
#ifdef CONFIG_ARC_EARLY_SOC_INIT
#include <soc_ctrl.h>
#endif
GDATA(z_interrupt_stacks)
@@ -113,8 +112,8 @@ done_icache_invalidate:
done_dcache_invalidate:
#ifdef CONFIG_SOC_RESET_HOOK
bl soc_reset_hook
#ifdef CONFIG_ARC_EARLY_SOC_INIT
soc_early_asm_init_percpu
#endif
_dsp_extension_probe

View File

@@ -48,7 +48,7 @@ static void sjli_table_init(void)
/*
* @brief initialization of secureshield related functions.
*/
void arc_secureshield_init(void)
static int arc_secureshield_init(void)
{
sjli_table_init();
@@ -60,4 +60,9 @@ void arc_secureshield_init(void)
*
*/
__asm__ volatile("sflag 0x20");
return 0;
}
SYS_INIT(arc_secureshield_init, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);

View File

@@ -9,9 +9,11 @@
#ifdef CONFIG_IRQ_OFFLOAD
int arc_irq_offload_init(const struct device *unused);
static inline void arc_irq_offload_init_smp(void)
{
arch_irq_offload_init();
arc_irq_offload_init(NULL);
}
#else

View File

@@ -1,9 +1,5 @@
# SPDX-License-Identifier: Apache-2.0
if(CONFIG_BIG_ENDIAN)
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-bigarm)
else()
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-littlearm)
endif()
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-littlearm)
add_subdirectory(core)

View File

@@ -166,14 +166,11 @@ config RUNTIME_NMI
needed, enable this option and attach it via z_arm_nmi_set_handler().
config PLATFORM_SPECIFIC_INIT
bool "Platform (SOC) specific startup hook [DEPRECATED]"
select DEPRECATED
bool "Platform (SOC) specific startup hook"
help
The platform specific initialization code (z_arm_platform_init) is
executed at the beginning of the startup code (__start).
This option is deprecated, use SOC_RESET_HOOK instead.
config FAULT_DUMP
int "Fault dump level"
default 2

View File

@@ -26,6 +26,5 @@ extern void __start(void);
#define BOOT_PARAM_UDF_SP_OFFSET 16
#define BOOT_PARAM_SVC_SP_OFFSET 20
#define BOOT_PARAM_SYS_SP_OFFSET 24
#define BOOT_PARAM_VOTING_OFFSET 28
#endif /* _BOOT_H_ */

View File

@@ -217,7 +217,3 @@ int arch_icache_flush_and_invd_range(void *start_addr, size_t size)
}
#endif
void arch_cache_init(void)
{
}

View File

@@ -49,7 +49,6 @@ _skip_\@:
#endif /* CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK */
.endm
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
SECTION_FUNC(TEXT, arch_cpu_idle)
#ifdef CONFIG_TRACING
push {r0, lr}
@@ -69,9 +68,6 @@ SECTION_FUNC(TEXT, arch_cpu_idle)
bx lr
#endif
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
#ifdef CONFIG_TRACING
push {r0, lr}
@@ -97,4 +93,3 @@ SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
_irq_disabled:
bx lr
#endif

View File

@@ -147,9 +147,8 @@ bool z_arm_fault_undef_instruction_fp(void)
* the FP was already enabled then this was an actual undefined
* instruction.
*/
if (__get_FPEXC() & FPEXC_EN) {
if (__get_FPEXC() & FPEXC_EN)
return true;
}
__set_FPEXC(FPEXC_EN);
@@ -163,9 +162,8 @@ bool z_arm_fault_undef_instruction_fp(void)
struct __fpu_sf *spill_esf =
(struct __fpu_sf *)_current_cpu->fp_ctx;
if (spill_esf == NULL) {
if (spill_esf == NULL)
return false;
}
_current_cpu->fp_ctx = NULL;

View File

@@ -339,15 +339,6 @@ z_arm_cortex_ar_irq_done:
str r0, [r2, #___cpu_t_nested_OFFSET]
/* Do not context switch if exiting a nested interrupt */
cmp r0, #0
/* Note that this function is only called from `z_arm_svc`,
* while handling irq_offload, with below modes set:
* ```
* if (cpu interrupts are nested)
* mode=MODE_SYS
* else
* mode=MODE_IRQ
* ```
*/
bhi __EXIT_INT
/* retrieve pointer to the current thread */

View File

@@ -18,27 +18,6 @@
ubfx \rreg0, \rreg0, #0, #24
.endm
/*
* Get CPU logic id by looking up cpu_node_list
* returns
* reg0: MPID
* reg1: logic id (0 ~ CONFIG_MP_MAX_NUM_CPUS - 1)
* clobbers: reg0, reg1, reg2, reg3
*/
.macro get_cpu_logic_id reg0, reg1, reg2, reg3
get_cpu_id \reg0
ldr \reg3, =cpu_node_list
mov \reg1, #0
1: ldr \reg2, [\reg3, \reg1, lsl #2]
cmp \reg2, \reg0
beq 2f
add \reg1, \reg1, #1
cmp \reg1, #CONFIG_MP_MAX_NUM_CPUS
bne 1b
b .
2:
.endm
.macro get_cpu rreg0
/*
* Get CPU pointer.
@@ -54,7 +33,8 @@
*/
srsdb sp!, #MODE_SYS
cps #MODE_SYS
push {r0-r3, r12, lr}
stmdb sp, {r0-r3, r12, lr}^
sub sp, #24
/* TODO: EXTRA_EXCEPTION_INFO */
mov r0, sp

View File

@@ -21,8 +21,6 @@
#include <zephyr/linker/linker-defs.h>
#include <zephyr/sys/barrier.h>
#include <zephyr/arch/arm/cortex_a_r/lib_helpers.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
#if defined(CONFIG_ARMV7_R) || defined(CONFIG_ARMV7_A)
#include <cortex_a_r/stack.h>
@@ -149,9 +147,6 @@ extern FUNC_NORETURN void z_cstart(void);
*/
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
/* Initialize tpidruro with our struct _cpu instance address */
write_tpidruro((uintptr_t)&_kernel.cpus[0]);
@@ -165,9 +160,6 @@ void z_prep_c(void)
z_arm_init_stacks();
#endif
z_arm_interrupt_init();
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
#ifdef CONFIG_ARM_MPU
z_arm_mpu_init();
z_arm_configure_static_mpu_regions();

View File

@@ -30,8 +30,8 @@ GDATA(z_arm_sys_stack)
GDATA(z_arm_fiq_stack)
GDATA(z_arm_abort_stack)
GDATA(z_arm_undef_stack)
#if defined(CONFIG_SOC_RESET_HOOK)
GTEXT(soc_reset_hook)
#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
GTEXT(z_arm_platform_init)
#endif
/**
@@ -200,62 +200,23 @@ EL1_Reset_Handler:
#endif /* CONFIG_DCLS */
ldr r0, =arm_cpu_boot_params
#if CONFIG_MP_MAX_NUM_CPUS > 1
/*
* This code uses voting locks, like arch/arm64/core/reset.S, to determine primary CPU.
*/
get_cpu_id r1
/*
* Get the "logic" id defined by cpu_node_list statically for voting lock self-identify.
* It is worth noting that this is NOT the final logic id (arch_curr_cpu()->id)
*/
get_cpu_logic_id r1, r2, r3, r4 // r1: MPID, r2: logic id
add r4, r0, #BOOT_PARAM_VOTING_OFFSET
/* signal our desire to vote */
mov r5, #1
strb r5, [r4, r2]
ldr r3, [r0, #BOOT_PARAM_MPID_OFFSET]
cmn r3, #1
beq 1f
/* some core already won, release */
mov r7, #0
strb r7, [r4, r2]
b _secondary_core
/* suggest current core then release */
1: str r1, [r0, #BOOT_PARAM_MPID_OFFSET]
strb r7, [r4, r2]
dmb
/* then wait until every core else is done voting */
mov r5, #0
2: ldrb r3, [r4, r5]
tst r3, #255
/* wait */
bne 2b
add r5, r5, #1
cmp r5, #CONFIG_MP_MAX_NUM_CPUS
bne 2b
/* check if current core won */
dmb
ldr r3, [r0, #BOOT_PARAM_MPID_OFFSET]
cmp r3, r1
ldrex r2, [r0, #BOOT_PARAM_MPID_OFFSET]
cmp r2, #-1
bne 1f
strex r3, r1, [r0, #BOOT_PARAM_MPID_OFFSET]
cmp r3, #0
beq _primary_core
/* fallthrough secondary */
/* loop until our turn comes */
_secondary_core:
dmb
1:
dmb ld
ldr r2, [r0, #BOOT_PARAM_MPID_OFFSET]
cmp r1, r2
bne _secondary_core
bne 1b
/* we can now load our stack pointer values and move on */
/* we can now move on */
ldr r4, =arch_secondary_cpu_init
ldr r5, [r0, #BOOT_PARAM_FIQ_SP_OFFSET]
ldr r6, [r0, #BOOT_PARAM_IRQ_SP_OFFSET]
@@ -305,9 +266,9 @@ _primary_core:
msr CPSR_c, #(MODE_SYS | I_BIT | F_BIT)
mov sp, r10
#if defined(CONFIG_SOC_RESET_HOOK)
#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
/* Execute platform-specific initialisation if applicable */
bl soc_reset_hook
bl z_arm_platform_init
#endif
#if defined(CONFIG_WDOG_INIT)

View File

@@ -51,7 +51,6 @@ struct boot_params {
char *udf_sp;
char *svc_sp;
char *sys_sp;
uint8_t voting[CONFIG_MP_MAX_NUM_CPUS];
arch_cpustart_t fn;
void *arg;
int cpu_num;
@@ -65,7 +64,6 @@ BUILD_ASSERT(offsetof(struct boot_params, abt_sp) == BOOT_PARAM_ABT_SP_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, udf_sp) == BOOT_PARAM_UDF_SP_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, svc_sp) == BOOT_PARAM_SVC_SP_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, sys_sp) == BOOT_PARAM_SYS_SP_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, voting) == BOOT_PARAM_VOTING_OFFSET);
volatile struct boot_params arm_cpu_boot_params = {
.mpid = -1,
@@ -77,7 +75,7 @@ volatile struct boot_params arm_cpu_boot_params = {
.sys_sp = (char *)(z_arm_sys_stack + CONFIG_ARMV7_SYS_STACK_SIZE),
};
const uint32_t cpu_node_list[] = {
static const uint32_t cpu_node_list[] = {
DT_FOREACH_CHILD_STATUS_OKAY_SEP(DT_PATH(cpus), DT_REG_ADDR, (,))};
/* cpu_map saves the maping of core id and mpid */

View File

@@ -95,10 +95,6 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
iframe->a4 = (uint32_t)p3;
iframe->xpsr = A_BIT | MODE_SYS;
#if defined(CONFIG_BIG_ENDIAN)
iframe->xpsr |= E_BIT;
#endif /* CONFIG_BIG_ENDIAN */
#if defined(CONFIG_COMPILER_ISA_THUMB2)
iframe->xpsr |= T_BIT;
#endif /* CONFIG_COMPILER_ISA_THUMB2 */

View File

@@ -41,11 +41,6 @@ SECTION_SUBSEC_FUNC(exc_vector_table,_vector_table_section,_vector_table)
GTEXT(z_arm_cortex_ar_exit_exc)
SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_cortex_ar_exit_exc)
/* Note:
* This function is expected to be *always* called with
* processor mode set to MODE_SYS.
*/
/* decrement exception depth */
get_cpu r2
ldrb r1, [r2, #_cpu_offset_to_exc_depth]
@@ -56,6 +51,7 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_cortex_ar_exit_exc)
* Restore r0-r3, r12, lr, lr_und and spsr_und from the exception stack
* and return to the current thread.
*/
pop {r0-r3, r12, lr}
ldmia sp, {r0-r3, r12, lr}^
add sp, #24
rfeia sp!
#endif

View File

@@ -330,7 +330,7 @@ config ZERO_LATENCY_IRQS
config ZERO_LATENCY_LEVELS
int "Number of interrupt priority levels reserved for zero latency"
depends on ZERO_LATENCY_IRQS
range 1 $(UINT8_MAX)
range 1 255
help
The amount of interrupt priority levels reserved for zero latency
interrupts. Increase this value to reserve more than one priority

View File

@@ -110,7 +110,3 @@ int arch_icache_flush_and_invd_range(void *start_addr, size_t size)
{
return -ENOTSUP;
}
void arch_cache_init(void)
{
}

View File

@@ -53,7 +53,6 @@ void z_arm_cpu_idle_init(void)
} while (false)
#endif
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
void arch_cpu_idle(void)
{
#if defined(CONFIG_TRACING)
@@ -97,9 +96,7 @@ void arch_cpu_idle(void)
__enable_irq();
__ISB();
}
#endif
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
void arch_cpu_atomic_idle(unsigned int key)
{
#if defined(CONFIG_TRACING)
@@ -138,4 +135,3 @@ void arch_cpu_atomic_idle(unsigned int key)
__enable_irq();
#endif
}
#endif

View File

@@ -58,7 +58,7 @@ BUILD_ASSERT(!(CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE &
(CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE - 1)),
"the size of the partition must be power of 2");
int z_arm_debug_enable_null_pointer_detection(void)
static int z_arm_debug_enable_null_pointer_detection(void)
{
z_arm_dwt_init();
@@ -118,4 +118,7 @@ int z_arm_debug_enable_null_pointer_detection(void)
return 0;
}
SYS_INIT(z_arm_debug_enable_null_pointer_detection, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT */

View File

@@ -1192,7 +1192,5 @@ void z_arm_fault_init(void)
#endif /* CONFIG_BUILTIN_STACK_GUARD */
#ifdef CONFIG_TRAP_UNALIGNED_ACCESS
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
#else
SCB->CCR &= ~SCB_CCR_UNALIGN_TRP_Msk;
#endif /* CONFIG_TRAP_UNALIGNED_ACCESS */
}

View File

@@ -27,11 +27,6 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
* r0: address of the system_off function
*/
push {r4-r12, lr}
/* Move system_off to protected register. */
mov r4, r0
/* Store CPU context */
ldr r1, =_cpu_context
mrs r2, msp
@@ -76,7 +71,7 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
* Call the system_off function passed as parameter. This should never
* return.
*/
blx r4
blx r0
/*
* The system_off function returns here only when the powering off was
@@ -86,10 +81,9 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
/*
* Reset the marking of suspend to RAM, return is ignored.
*/
push {r0}
bl pm_s2ram_mark_check_and_clear
/* Move system_off back to r0 as return value */
mov r0, r4
pop {r0}
pop {r4-r12, lr}
bx lr
@@ -99,14 +93,11 @@ GTEXT(arch_pm_s2ram_resume)
SECTION_FUNC(TEXT, arch_pm_s2ram_resume)
/*
* Check if reset occurred after suspending to RAM.
* Store LR to ensure we can continue boot when we are not suspended
* to RAM. In addition to LR, R0 is pushed too, to ensure "SP mod 8 = 0",
* as stated by ARM rule 6.2.1.2 for AAPCS32.
*/
push {r0, lr}
push {lr}
bl pm_s2ram_mark_check_and_clear
cmp r0, #0x1
pop {r0, lr}
pop {lr}
beq resume
bx lr

View File

@@ -20,8 +20,6 @@
#include <kernel_internal.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/sys/barrier.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
#if defined(__GNUC__)
/*
@@ -183,10 +181,6 @@ extern FUNC_NORETURN void z_cstart(void);
*/
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
relocate_vector_table();
#if defined(CONFIG_CPU_HAS_FPU)
z_arm_floating_point_init();
@@ -199,13 +193,6 @@ void z_prep_c(void)
#else
z_arm_interrupt_init();
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
#ifdef CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT
z_arm_debug_enable_null_pointer_detection();
#endif
z_cstart();
CODE_UNREACHABLE;
}

View File

@@ -24,8 +24,8 @@ GDATA(z_interrupt_stacks)
#if defined(CONFIG_DEBUG_THREAD_INFO)
GDATA(z_sys_post_kernel)
#endif
#if defined(CONFIG_SOC_RESET_HOOK)
GTEXT(soc_reset_hook)
#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
GTEXT(z_arm_platform_init)
#endif
#if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)
GTEXT(z_arm_init_arch_hw_at_boot)
@@ -93,8 +93,8 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
bl arch_pm_s2ram_resume
#endif /* CONFIG_PM_S2RAM */
#if defined(CONFIG_SOC_RESET_HOOK)
bl soc_reset_hook
#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
bl z_arm_platform_init
#endif
#if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)

View File

@@ -588,7 +588,7 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, char *stack_ptr,
"bx r4\n" /* We dont intend to return, so there is no need to link. */
: "+r" (_main)
: "r" (stack_ptr)
: "r0", "r1", "r2", "r3", "r4", "ip", "lr");
: "r0", "r1", "r2", "r3", "r4");
CODE_UNREACHABLE;
}
@@ -659,7 +659,7 @@ FUNC_NORETURN void z_arm_switch_to_main_no_multithreading(
#ifdef CONFIG_BUILTIN_STACK_GUARD
, [_psplim]"r" (psplim)
#endif
: "r0", "r1", "r2", "ip", "lr"
: "r0", "r1", "r2", "r3"
);
CODE_UNREACHABLE; /* LCOV_EXCL_LINE */

View File

@@ -12,34 +12,6 @@
LOG_MODULE_REGISTER(elf, CONFIG_LLEXT_LOG_LEVEL);
#define R_ARM_NONE 0
#define R_ARM_PC24 1
#define R_ARM_ABS32 2
#define R_ARM_REL32 3
#define R_ARM_COPY 20
#define R_ARM_GLOB_DAT 21
#define R_ARM_JUMP_SLOT 22
#define R_ARM_RELATIVE 23
#define R_ARM_CALL 28
#define R_ARM_JUMP24 29
#define R_ARM_TARGET1 38
#define R_ARM_V4BX 40
#define R_ARM_PREL31 42
#define R_ARM_MOVW_ABS_NC 43
#define R_ARM_MOVT_ABS 44
#define R_ARM_MOVW_PREL_NC 45
#define R_ARM_MOVT_PREL 46
#define R_ARM_ALU_PC_G0_NC 57
#define R_ARM_ALU_PC_G1_NC 59
#define R_ARM_LDR_PC_G2 63
#define R_ARM_THM_CALL 10
#define R_ARM_THM_JUMP24 30
#define R_ARM_THM_MOVW_ABS_NC 47
#define R_ARM_THM_MOVT_ABS 48
#define R_ARM_THM_MOVW_PREL_NC 49
#define R_ARM_THM_MOVT_PREL 50
#define OPCODE2ARMMEM(x) ((uint32_t)(x))
#define OPCODE2THM16MEM(x) ((uint16_t)(x))
#define MEM2ARMOPCODE(x) OPCODE2ARMMEM(x)

View File

@@ -42,7 +42,3 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
offload_routine = NULL;
k_sched_unlock();
}
void arch_irq_offload_init(void)
{
}

View File

@@ -9,7 +9,6 @@ zephyr_library_sources(
irq_init.c
irq_manage.c
prep_c.c
reboot.c
reset.S
reset.c
switch.S
@@ -29,7 +28,6 @@ if(${SRAM_LENGTH} GREATER 11 OR ${KERNEL_VM_LENGTH} GREATER 11)
zephyr_cc_option(-mcmodel=large)
endif()
zephyr_library_sources_ifdef(CONFIG_LLEXT elf.c)
zephyr_library_sources_ifdef(CONFIG_FPU_SHARING fpu.c fpu.S)
zephyr_library_sources_ifdef(CONFIG_ARM_MMU mmu.c mmu.S)
zephyr_library_sources_ifdef(CONFIG_ARM_MPU cortex_r/arm_mpu.c)

View File

@@ -161,14 +161,6 @@ config ARM64_EXCEPTION_STACK_TRACE
help
Internal config to enable runtime stack traces on fatal exceptions.
config ARCH_HAS_STACKWALK
bool
default y
depends on FRAME_POINTER
help
Internal config to indicate that the arch_stack_walk() API is implemented
and it can be enabled.
config ARM64_SAFE_EXCEPTION_STACK_SIZE
int "The stack size of the safe exception stack"
default 4096

View File

@@ -13,7 +13,7 @@
#include <zephyr/arch/cpu.h>
_ASM_FILE_PROLOGUE
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
GTEXT(arch_cpu_idle)
SECTION_FUNC(TEXT, arch_cpu_idle)
#ifdef CONFIG_TRACING
@@ -25,9 +25,7 @@ SECTION_FUNC(TEXT, arch_cpu_idle)
wfi
msr daifclr, #(DAIFCLR_IRQ_BIT)
ret
#endif
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
GTEXT(arch_cpu_atomic_idle)
SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
#ifdef CONFIG_TRACING
@@ -43,5 +41,3 @@ SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
msr daifclr, #(DAIFCLR_IRQ_BIT)
_irq_disabled:
ret
#endif

View File

@@ -1,515 +0,0 @@
/*
* Copyright (c) 2024 BayLibre SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/llext/elf.h>
#include <zephyr/llext/llext.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/util.h>
#include <zephyr/sys/byteorder.h>
LOG_MODULE_REGISTER(elf, CONFIG_LLEXT_LOG_LEVEL);
#define R_ARM_NONE 0
#define R_AARCH64_NONE 256
/* Static data relocations */
#define R_AARCH64_ABS64 257
#define R_AARCH64_ABS32 258
#define R_AARCH64_ABS16 259
#define R_AARCH64_PREL64 260
#define R_AARCH64_PREL32 261
#define R_AARCH64_PREL16 262
/* Static relocations */
#define R_AARCH64_MOVW_UABS_G0 263
#define R_AARCH64_MOVW_UABS_G0_NC 264
#define R_AARCH64_MOVW_UABS_G1 265
#define R_AARCH64_MOVW_UABS_G1_NC 266
#define R_AARCH64_MOVW_UABS_G2 267
#define R_AARCH64_MOVW_UABS_G2_NC 268
#define R_AARCH64_MOVW_UABS_G3 269
#define R_AARCH64_MOVW_SABS_G0 270
#define R_AARCH64_MOVW_SABS_G1 271
#define R_AARCH64_MOVW_SABS_G2 272
#define R_AARCH64_MOVW_PREL_G0 287
#define R_AARCH64_MOVW_PREL_G0_NC 288
#define R_AARCH64_MOVW_PREL_G1 289
#define R_AARCH64_MOVW_PREL_G1_NC 290
#define R_AARCH64_MOVW_PREL_G2 291
#define R_AARCH64_MOVW_PREL_G2_NC 292
#define R_AARCH64_MOVW_PREL_G3 293
#define R_AARCH64_LD_PREL_LO19 273
#define R_AARCH64_ADR_PREL_LO21 274
#define R_AARCH64_ADR_PREL_PG_HI21 275
#define R_AARCH64_ADR_PREL_PG_HI21_NC 276
#define R_AARCH64_ADD_ABS_LO12_NC 277
#define R_AARCH64_LDST8_ABS_LO12_NC 278
#define R_AARCH64_TSTBR14 279
#define R_AARCH64_CONDBR19 280
#define R_AARCH64_JUMP26 282
#define R_AARCH64_CALL26 283
#define R_AARCH64_LDST16_ABS_LO12_NC 284
#define R_AARCH64_LDST32_ABS_LO12_NC 285
#define R_AARCH64_LDST64_ABS_LO12_NC 286
#define R_AARCH64_LDST128_ABS_LO12_NC 299
/* Masks for immediate values */
#define AARCH64_MASK_IMM12 BIT_MASK(12)
#define AARCH64_MASK_IMM14 BIT_MASK(14)
#define AARCH64_MASK_IMM16 BIT_MASK(16)
#define AARCH64_MASK_IMM19 BIT_MASK(19)
#define AARCH64_MASK_IMM26 BIT_MASK(26)
/* MOV instruction helper symbols */
#define AARCH64_MASK_MOV_OPCODE BIT_MASK(8)
#define AARCH64_SHIFT_MOV_OPCODE (23)
#define AARCH64_SHIFT_MOV_IMM16 (5)
#define AARCH64_OPCODE_MOVN (0b00100101)
#define AARCH64_OPCODE_MOVZ (0b10100101)
/* ADR instruction helper symbols */
#define AARCH64_MASK_ADR_IMMLO BIT_MASK(2)
#define AARCH64_MASK_ADR_IMMHI BIT_MASK(19)
#define AARCH64_SHIFT_ADR_IMMLO (29)
#define AARCH64_SHIFT_ADR_IMMHI (5)
#define AARCH64_ADR_IMMLO_BITS (2)
#define AARCH64_PAGE(expr) ((expr) & ~0xFFF)
enum aarch64_reloc_type {
AARCH64_RELOC_TYPE_NONE,
AARCH64_RELOC_TYPE_ABS,
AARCH64_RELOC_TYPE_PREL,
AARCH64_RELOC_TYPE_PAGE,
};
/**
* @brief Function computing a relocation (X in AArch64 ELF).
*
* @param[in] reloc_type Type of relocation operation.
* @param[in] loc Address of an opcode to rewrite (P in AArch64 ELF).
* @param[in] sym_base_addr Address of the symbol referenced by relocation (S in AArch64 ELF).
* @param[in] addend Addend from RELA relocation.
*
* @return Result of the relocation operation (X in AArch64 ELF)
*/
static uint64_t reloc(enum aarch64_reloc_type reloc_type, uintptr_t loc, uintptr_t sym_base_addr,
int64_t addend)
{
switch (reloc_type) {
case AARCH64_RELOC_TYPE_ABS:
return sym_base_addr + addend;
case AARCH64_RELOC_TYPE_PREL:
return sym_base_addr + addend - loc;
case AARCH64_RELOC_TYPE_PAGE:
return AARCH64_PAGE(sym_base_addr + addend) - AARCH64_PAGE(loc);
case AARCH64_RELOC_TYPE_NONE:
return 0;
}
CODE_UNREACHABLE;
}
/**
* @brief Handler for static data relocations.
*
* @param[in] rel Relocation data provided by ELF
* @param[in] reloc_type Type of relocation operation.
* @param[in] loc Address of an opcode to rewrite (P in AArch64 ELF).
* @param[in] sym_base_addr Address of the symbol referenced by relocation (S in AArch64 ELF).
*
* @retval -ERANGE Relocation value overflow
* @retval 0 Successful relocation
*/
static int data_reloc_handler(elf_rela_t *rel, elf_word reloc_type, uintptr_t loc,
uintptr_t sym_base_addr)
{
int64_t x;
switch (reloc_type) {
case R_AARCH64_ABS64:
*(int64_t *)loc = reloc(AARCH64_RELOC_TYPE_ABS, loc, sym_base_addr, rel->r_addend);
break;
case R_AARCH64_ABS32:
x = reloc(AARCH64_RELOC_TYPE_ABS, loc, sym_base_addr, rel->r_addend);
if (x < 0 || x > UINT32_MAX) {
return -ERANGE;
}
*(uint32_t *)loc = (uint32_t)x;
break;
case R_AARCH64_ABS16:
x = reloc(AARCH64_RELOC_TYPE_ABS, loc, sym_base_addr, rel->r_addend);
if (x < 0 || x > UINT16_MAX) {
return -ERANGE;
}
*(uint16_t *)loc = (uint16_t)x;
break;
case R_AARCH64_PREL64:
*(int64_t *)loc = reloc(AARCH64_RELOC_TYPE_PREL, loc, sym_base_addr, rel->r_addend);
break;
case R_AARCH64_PREL32:
x = reloc(AARCH64_RELOC_TYPE_PREL, loc, sym_base_addr, rel->r_addend);
if (x < INT32_MIN || x > INT32_MAX) {
return -ERANGE;
}
*(int32_t *)loc = (int32_t)x;
break;
case R_AARCH64_PREL16:
x = reloc(AARCH64_RELOC_TYPE_PREL, loc, sym_base_addr, rel->r_addend);
if (x < INT16_MIN || x > INT16_MAX) {
return -ERANGE;
}
*(int16_t *)loc = (int16_t)x;
break;
default:
CODE_UNREACHABLE;
}
return 0;
}
/**
* @brief Handler for relocations using MOV* instructions.
*
* @param[in] rel Relocation data provided by ELF
* @param[in] reloc_type Type of relocation operation.
* @param[in] loc Address of an opcode to rewrite (P in AArch64 ELF).
* @param[in] sym_base_addr Address of the symbol referenced by relocation (S in AArch64 ELF).
*
* @retval -ERANGE Relocation value overflow
* @retval 0 Successful relocation
*/
static int movw_reloc_handler(elf_rela_t *rel, elf_word reloc_type, uintptr_t loc,
uintptr_t sym_base_addr)
{
int64_t x;
uint32_t imm;
int lsb = 0; /* LSB of X to be used */
bool is_movnz = false;
enum aarch64_reloc_type type = AARCH64_RELOC_TYPE_ABS;
uint32_t opcode = sys_le32_to_cpu(*(uint32_t *)loc);
switch (reloc_type) {
case R_AARCH64_MOVW_SABS_G0:
is_movnz = true;
case R_AARCH64_MOVW_UABS_G0_NC:
case R_AARCH64_MOVW_UABS_G0:
break;
case R_AARCH64_MOVW_SABS_G1:
is_movnz = true;
case R_AARCH64_MOVW_UABS_G1_NC:
case R_AARCH64_MOVW_UABS_G1:
lsb = 16;
break;
case R_AARCH64_MOVW_SABS_G2:
is_movnz = true;
case R_AARCH64_MOVW_UABS_G2_NC:
case R_AARCH64_MOVW_UABS_G2:
lsb = 32;
break;
case R_AARCH64_MOVW_UABS_G3:
lsb = 48;
break;
case R_AARCH64_MOVW_PREL_G0:
is_movnz = true;
case R_AARCH64_MOVW_PREL_G0_NC:
type = AARCH64_RELOC_TYPE_PREL;
break;
case R_AARCH64_MOVW_PREL_G1:
is_movnz = true;
case R_AARCH64_MOVW_PREL_G1_NC:
type = AARCH64_RELOC_TYPE_PREL;
lsb = 16;
break;
case R_AARCH64_MOVW_PREL_G2:
is_movnz = true;
case R_AARCH64_MOVW_PREL_G2_NC:
type = AARCH64_RELOC_TYPE_PREL;
lsb = 32;
break;
case R_AARCH64_MOVW_PREL_G3:
is_movnz = true;
type = AARCH64_RELOC_TYPE_PREL;
lsb = 48;
break;
default:
CODE_UNREACHABLE;
}
x = reloc(type, loc, sym_base_addr, rel->r_addend);
imm = x >> lsb;
/* Manipulate opcode for signed relocations. Result depends on sign of immediate value. */
if (is_movnz) {
opcode &= ~(AARCH64_MASK_MOV_OPCODE << AARCH64_SHIFT_MOV_OPCODE);
if (x >= 0) {
opcode |= (AARCH64_OPCODE_MOVN << AARCH64_SHIFT_MOV_OPCODE);
} else {
opcode |= (AARCH64_OPCODE_MOVZ << AARCH64_SHIFT_MOV_OPCODE);
/* Need to invert immediate value for MOVZ. */
imm = ~imm;
}
}
opcode &= ~(AARCH64_MASK_IMM16 << AARCH64_SHIFT_MOV_IMM16);
opcode |= (imm & AARCH64_MASK_IMM16) << AARCH64_SHIFT_MOV_IMM16;
*(uint32_t *)loc = sys_cpu_to_le32(opcode);
if (imm > UINT16_MAX) {
return -ERANGE;
}
return 0;
}
/**
* @brief Handler for static relocations except these related to MOV* instructions.
*
* @param[in] rel Relocation data provided by ELF
* @param[in] reloc_type Type of relocation operation.
* @param[in] loc Address of an opcode to rewrite (P in AArch64 ELF).
* @param[in] sym_base_addr Address of the symbol referenced by relocation (S in AArch64 ELF).
*
* @retval -ERANGE Relocation value overflow
* @retval 0 Successful relocation
*/
static int imm_reloc_handler(elf_rela_t *rel, elf_word reloc_type, uintptr_t loc,
uintptr_t sym_base_addr)
{
int lsb = 2; /* LSB of X to be used */
int len; /* bit length of immediate value */
int shift = 10; /* shift of the immediate in instruction encoding */
uint64_t imm;
uint32_t bitmask = AARCH64_MASK_IMM12;
int64_t x;
bool is_adr = false;
enum aarch64_reloc_type type = AARCH64_RELOC_TYPE_ABS;
uint32_t opcode = sys_le32_to_cpu(*(uint32_t *)loc);
switch (reloc_type) {
case R_AARCH64_ADD_ABS_LO12_NC:
case R_AARCH64_LDST8_ABS_LO12_NC:
lsb = 0;
len = 12;
break;
case R_AARCH64_LDST16_ABS_LO12_NC:
lsb = 1;
len = 11;
break;
case R_AARCH64_LDST32_ABS_LO12_NC:
len = 10;
break;
case R_AARCH64_LDST64_ABS_LO12_NC:
lsb = 3;
len = 9;
break;
case R_AARCH64_LDST128_ABS_LO12_NC:
lsb = 4;
len = 8;
break;
case R_AARCH64_LD_PREL_LO19:
case R_AARCH64_CONDBR19:
type = AARCH64_RELOC_TYPE_PREL;
bitmask = AARCH64_MASK_IMM19;
shift = 5;
len = 19;
break;
case R_AARCH64_ADR_PREL_LO21:
type = AARCH64_RELOC_TYPE_PREL;
is_adr = true;
lsb = 0;
len = 21;
break;
case R_AARCH64_TSTBR14:
type = AARCH64_RELOC_TYPE_PREL;
bitmask = AARCH64_MASK_IMM14;
shift = 5;
len = 14;
break;
case R_AARCH64_ADR_PREL_PG_HI21_NC:
case R_AARCH64_ADR_PREL_PG_HI21:
type = AARCH64_RELOC_TYPE_PAGE;
is_adr = true;
lsb = 12;
len = 21;
break;
case R_AARCH64_CALL26:
case R_AARCH64_JUMP26:
type = AARCH64_RELOC_TYPE_PREL;
bitmask = AARCH64_MASK_IMM26;
shift = 0;
len = 26;
break;
default:
CODE_UNREACHABLE;
}
x = reloc(type, loc, sym_base_addr, rel->r_addend);
x >>= lsb;
imm = x & BIT_MASK(len);
/* ADR instruction has immediate value split into two fields. */
if (is_adr) {
uint32_t immlo, immhi;
immlo = (imm & AARCH64_MASK_ADR_IMMLO) << AARCH64_SHIFT_ADR_IMMLO;
imm >>= AARCH64_ADR_IMMLO_BITS;
immhi = (imm & AARCH64_MASK_ADR_IMMHI) << AARCH64_SHIFT_ADR_IMMHI;
imm = immlo | immhi;
shift = 0;
bitmask = ((AARCH64_MASK_ADR_IMMLO << AARCH64_SHIFT_ADR_IMMLO) |
(AARCH64_MASK_ADR_IMMHI << AARCH64_SHIFT_ADR_IMMHI));
}
opcode &= ~(bitmask << shift);
opcode |= (imm & bitmask) << shift;
*(uint32_t *)loc = sys_cpu_to_le32(opcode);
/* Mask X sign bit and upper bits. */
x = (int64_t)(x & ~BIT_MASK(len - 1)) >> (len - 1);
/* Incrementing X will either overflow and set it to 0 or
* set it 1. Any other case indicates that there was an overflow in relocation.
*/
if ((int64_t)x++ > 1) {
return -ERANGE;
}
return 0;
}
/**
* @brief Architecture specific function for relocating partially linked (static) elf
*
* Elf files contain a series of relocations described in a section. These relocation
* instructions are architecture specific and each architecture supporting extensions
* must implement this.
*
* The relocation codes for arm64 are well documented
* https://github.com/ARM-software/abi-aa/blob/main/aaelf64/aaelf64.rst#relocation
*
* @param[in] rel Relocation data provided by ELF
* @param[in] loc Address of an opcode to rewrite (P in AArch64 ELF)
* @param[in] sym_base_addr Address of the symbol referenced by relocation (S in AArch64 ELF)
* @param[in] sym_name Name of symbol referenced by relocation
* @param[in] load_bias `.text` load address
* @retval 0 Success
* @retval -ENOTSUP Unsupported relocation
* @retval -ENOEXEC Invalid relocation
*/
int arch_elf_relocate(elf_rela_t *rel, uintptr_t loc, uintptr_t sym_base_addr, const char *sym_name,
uintptr_t load_bias)
{
int ret = 0;
bool overflow_check = true;
elf_word reloc_type = ELF_R_TYPE(rel->r_info);
switch (reloc_type) {
case R_ARM_NONE:
case R_AARCH64_NONE:
overflow_check = false;
break;
case R_AARCH64_ABS64:
case R_AARCH64_PREL64:
overflow_check = false;
case R_AARCH64_ABS16:
case R_AARCH64_ABS32:
case R_AARCH64_PREL16:
case R_AARCH64_PREL32:
ret = data_reloc_handler(rel, reloc_type, loc, sym_base_addr);
break;
case R_AARCH64_MOVW_UABS_G0_NC:
case R_AARCH64_MOVW_UABS_G1_NC:
case R_AARCH64_MOVW_UABS_G2_NC:
case R_AARCH64_MOVW_UABS_G3:
case R_AARCH64_MOVW_PREL_G0_NC:
case R_AARCH64_MOVW_PREL_G1_NC:
case R_AARCH64_MOVW_PREL_G2_NC:
case R_AARCH64_MOVW_PREL_G3:
overflow_check = false;
case R_AARCH64_MOVW_UABS_G0:
case R_AARCH64_MOVW_UABS_G1:
case R_AARCH64_MOVW_UABS_G2:
case R_AARCH64_MOVW_SABS_G0:
case R_AARCH64_MOVW_SABS_G1:
case R_AARCH64_MOVW_SABS_G2:
case R_AARCH64_MOVW_PREL_G0:
case R_AARCH64_MOVW_PREL_G1:
case R_AARCH64_MOVW_PREL_G2:
ret = movw_reloc_handler(rel, reloc_type, loc, sym_base_addr);
break;
case R_AARCH64_ADD_ABS_LO12_NC:
case R_AARCH64_LDST8_ABS_LO12_NC:
case R_AARCH64_LDST16_ABS_LO12_NC:
case R_AARCH64_LDST32_ABS_LO12_NC:
case R_AARCH64_LDST64_ABS_LO12_NC:
case R_AARCH64_LDST128_ABS_LO12_NC:
overflow_check = false;
case R_AARCH64_LD_PREL_LO19:
case R_AARCH64_ADR_PREL_LO21:
case R_AARCH64_TSTBR14:
case R_AARCH64_CONDBR19:
ret = imm_reloc_handler(rel, reloc_type, loc, sym_base_addr);
break;
case R_AARCH64_ADR_PREL_PG_HI21_NC:
overflow_check = false;
case R_AARCH64_ADR_PREL_PG_HI21:
ret = imm_reloc_handler(rel, reloc_type, loc, sym_base_addr);
break;
case R_AARCH64_CALL26:
case R_AARCH64_JUMP26:
ret = imm_reloc_handler(rel, reloc_type, loc, sym_base_addr);
/* TODO Handle case when address exceeds +/- 128MB */
break;
default:
LOG_ERR("unknown relocation: %llu\n", reloc_type);
return -ENOEXEC;
}
if (overflow_check && ret == -ERANGE) {
LOG_ERR("sym '%s': relocation out of range (%#lx -> %#lx)\n", sym_name, loc,
sym_base_addr);
return -ENOEXEC;
}
return 0;
}

View File

@@ -21,8 +21,6 @@
#include <zephyr/sys/poweroff.h>
#include <kernel_arch_func.h>
#include "paging.h"
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK
@@ -196,13 +194,9 @@ static void esf_dump(const struct arch_esf *esf)
LOG_ERR("x16: 0x%016llx x17: 0x%016llx", esf->x16, esf->x17);
LOG_ERR("x18: 0x%016llx lr: 0x%016llx", esf->x18, esf->lr);
}
#endif /* CONFIG_EXCEPTION_DEBUG */
#ifdef CONFIG_ARCH_STACKWALK
typedef bool (*arm64_stacktrace_cb)(void *cookie, unsigned long addr, void *fp);
static void walk_stackframe(arm64_stacktrace_cb cb, void *cookie, const struct arch_esf *esf,
int max_frames)
#ifdef CONFIG_EXCEPTION_STACK_TRACE
static void esf_unwind(const struct arch_esf *esf)
{
/*
* For GCC:
@@ -224,61 +218,30 @@ static void walk_stackframe(arm64_stacktrace_cb cb, void *cookie, const struct a
* + +-----------------+
*/
uint64_t *fp;
uint64_t *fp = (uint64_t *) esf->fp;
unsigned int count = 0;
uint64_t lr;
if (esf != NULL) {
fp = (uint64_t *) esf->fp;
} else {
return;
}
for (int i = 0; (fp != NULL) && (i < max_frames); i++) {
LOG_ERR("");
for (int i = 0; (fp != NULL) && (i < CONFIG_EXCEPTION_STACK_TRACE_MAX_FRAMES); i++) {
lr = fp[1];
if (!cb(cookie, lr, fp)) {
break;
}
#ifdef CONFIG_SYMTAB
uint32_t offset = 0;
const char *name = symtab_find_symbol_name(lr, &offset);
LOG_ERR("backtrace %2d: fp: 0x%016llx lr: 0x%016llx [%s+0x%x]",
count++, (uint64_t) fp, lr, name, offset);
#else
LOG_ERR("backtrace %2d: fp: 0x%016llx lr: 0x%016llx",
count++, (uint64_t) fp, lr);
#endif
fp = (uint64_t *) fp[0];
}
}
void arch_stack_walk(stack_trace_callback_fn callback_fn, void *cookie,
const struct k_thread *thread, const struct arch_esf *esf)
{
ARG_UNUSED(thread);
walk_stackframe((arm64_stacktrace_cb)callback_fn, cookie, esf,
CONFIG_ARCH_STACKWALK_MAX_FRAMES);
}
#endif /* CONFIG_ARCH_STACKWALK */
#ifdef CONFIG_EXCEPTION_STACK_TRACE
static bool print_trace_address(void *arg, unsigned long lr, void *fp)
{
int *i = arg;
#ifdef CONFIG_SYMTAB
uint32_t offset = 0;
const char *name = symtab_find_symbol_name(lr, &offset);
LOG_ERR(" %d: fp: 0x%016llx lr: 0x%016lx [%s+0x%x]", (*i)++, (uint64_t)fp, lr, name,
offset);
#else
LOG_ERR(" %d: fp: 0x%016llx lr: 0x%016lx", (*i)++, (uint64_t)fp, lr);
#endif /* CONFIG_SYMTAB */
return true;
}
static void esf_unwind(const struct arch_esf *esf)
{
int i = 0;
LOG_ERR("");
LOG_ERR("call trace:");
walk_stackframe(print_trace_address, &i, esf, CONFIG_ARCH_STACKWALK_MAX_FRAMES);
LOG_ERR("");
}
#endif /* CONFIG_EXCEPTION_STACK_TRACE */
#endif
#endif /* CONFIG_EXCEPTION_DEBUG */
#ifdef CONFIG_ARM64_STACK_PROTECTION
static bool z_arm64_stack_corruption_check(struct arch_esf *esf, uint64_t esr, uint64_t far)
@@ -324,9 +287,8 @@ static bool z_arm64_stack_corruption_check(struct arch_esf *esf, uint64_t esr, u
static bool is_recoverable(struct arch_esf *esf, uint64_t esr, uint64_t far,
uint64_t elr)
{
if (!esf) {
if (!esf)
return false;
}
#ifdef CONFIG_USERSPACE
for (int i = 0; i < ARRAY_SIZE(exceptions); i++) {
@@ -375,12 +337,6 @@ void z_arm64_fatal_error(unsigned int reason, struct arch_esf *esf)
}
#endif
if (IS_ENABLED(CONFIG_DEMAND_PAGING) &&
reason != K_ERR_STACK_CHK_FAIL &&
z_arm64_do_demand_paging(esf, esr, far)) {
return;
}
if (GET_EL(el) != MODE_EL0) {
#ifdef CONFIG_EXCEPTION_DEBUG
bool dump_far = false;
@@ -389,9 +345,8 @@ void z_arm64_fatal_error(unsigned int reason, struct arch_esf *esf)
dump_esr(esr, &dump_far);
if (dump_far) {
if (dump_far)
LOG_ERR("FAR_ELn: 0x%016llx", far);
}
LOG_ERR("TPIDRRO: 0x%016llx", read_tpidrro_el0());
#endif /* CONFIG_EXCEPTION_DEBUG */

View File

@@ -23,7 +23,3 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
: [svid] "i" (_SVC_CALL_IRQ_OFFLOAD),
"r" (x0), "r" (x1));
}
void arch_irq_offload_init(void)
{
}

View File

@@ -11,7 +11,6 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <zephyr/kernel/mm/demand_paging.h>
#include <kernel_arch_func.h>
#include <kernel_arch_interface.h>
#include <kernel_internal.h>
@@ -22,10 +21,8 @@
#include <zephyr/linker/linker-defs.h>
#include <zephyr/spinlock.h>
#include <zephyr/sys/util.h>
#include <mmu.h>
#include "mmu.h"
#include "paging.h"
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
@@ -142,12 +139,6 @@ int arm64_mmu_tables_total_usage(void)
static inline bool is_free_desc(uint64_t desc)
{
return desc == 0;
}
static inline bool is_inval_desc(uint64_t desc)
{
/* invalid descriptors aren't necessarily free */
return (desc & PTE_DESC_TYPE_MASK) == PTE_INVALID_DESC;
}
@@ -212,10 +203,8 @@ static void debug_show_pte(uint64_t *pte, unsigned int level)
if (is_block_desc(*pte)) {
MMU_DEBUG("[Block] ");
} else if (!is_inval_desc(*pte)) {
MMU_DEBUG("[Page] ");
} else {
MMU_DEBUG("[paged-out] ");
MMU_DEBUG("[Page] ");
}
uint8_t mem_type = (*pte >> 2) & MT_TYPE_MASK;
@@ -227,7 +216,6 @@ static void debug_show_pte(uint64_t *pte, unsigned int level)
MMU_DEBUG((*pte & PTE_BLOCK_DESC_AP_ELx) ? "-ELx" : "-ELh");
MMU_DEBUG((*pte & PTE_BLOCK_DESC_PXN) ? "-PXN" : "-PX");
MMU_DEBUG((*pte & PTE_BLOCK_DESC_UXN) ? "-UXN" : "-UX");
MMU_DEBUG((*pte & PTE_SW_WRITABLE) ? "-WRITABLE" : "");
MMU_DEBUG("\n");
}
#else
@@ -243,15 +231,8 @@ static void set_pte_table_desc(uint64_t *pte, uint64_t *table, unsigned int leve
static void set_pte_block_desc(uint64_t *pte, uint64_t desc, unsigned int level)
{
if (level != XLAT_LAST_LEVEL) {
desc |= PTE_BLOCK_DESC;
} else if (!IS_ENABLED(CONFIG_DEMAND_PAGING) || (desc & PTE_BLOCK_DESC_AF) != 0) {
desc |= PTE_PAGE_DESC;
} else {
/*
* Demand paging configured and AF unset: leave the descriptor
* type to "invalid" as in arch_mem_page_out().
*/
if (desc) {
desc |= (level == XLAT_LAST_LEVEL) ? PTE_PAGE_DESC : PTE_BLOCK_DESC;
}
*pte = desc;
debug_show_pte(pte, level);
@@ -392,11 +373,6 @@ static void del_mapping(uint64_t *table, uintptr_t virt, size_t size,
continue;
}
if (step != level_size && is_block_desc(*pte)) {
/* need to split this block mapping */
expand_to_table(pte, level);
}
if (is_table_desc(*pte, level)) {
subtable = pte_desc_table(*pte);
del_mapping(subtable, virt, step, level + 1);
@@ -404,6 +380,12 @@ static void del_mapping(uint64_t *table, uintptr_t virt, size_t size,
continue;
}
dec_table_ref(subtable);
} else {
/*
* We assume that block mappings will be unmapped
* as a whole and not partially.
*/
__ASSERT(step == level_size, "");
}
/* free this entry */
@@ -675,8 +657,6 @@ static uint64_t get_region_desc(uint32_t attrs)
/* AP bits for Data access permission */
desc |= (attrs & MT_RW) ? PTE_BLOCK_DESC_AP_RW : PTE_BLOCK_DESC_AP_RO;
desc |= (IS_ENABLED(CONFIG_DEMAND_PAGING) && (attrs & MT_RW)) ?
PTE_SW_WRITABLE : 0;
/* Mirror permissions to EL0 */
desc |= (attrs & MT_RW_AP_ELx) ?
@@ -684,11 +664,6 @@ static uint64_t get_region_desc(uint32_t attrs)
/* the access flag */
desc |= PTE_BLOCK_DESC_AF;
if (IS_ENABLED(CONFIG_DEMAND_PAGING) && (attrs & MT_PAGED_OUT) != 0) {
/* set it up for demand paging like arch_mem_page_out() */
desc &= ~PTE_BLOCK_DESC_AF;
desc |= PTE_BLOCK_DESC_AP_RO;
}
/* memory attribute index field */
mem_type = MT_TYPE(attrs);
@@ -711,20 +686,17 @@ static uint64_t get_region_desc(uint32_t attrs)
case MT_NORMAL_NC:
case MT_NORMAL:
/* Make Normal RW memory as execute never */
if ((attrs & MT_RW) || (attrs & MT_P_EXECUTE_NEVER)) {
if ((attrs & MT_RW) || (attrs & MT_P_EXECUTE_NEVER))
desc |= PTE_BLOCK_DESC_PXN;
}
if (((attrs & MT_RW) && (attrs & MT_RW_AP_ELx)) ||
(attrs & MT_U_EXECUTE_NEVER)) {
(attrs & MT_U_EXECUTE_NEVER))
desc |= PTE_BLOCK_DESC_UXN;
}
if (mem_type == MT_NORMAL) {
if (mem_type == MT_NORMAL)
desc |= PTE_BLOCK_DESC_INNER_SHARE;
} else {
else
desc |= PTE_BLOCK_DESC_OUTER_SHARE;
}
}
/* non-Global bit */
@@ -783,12 +755,6 @@ static void invalidate_tlb_all(void)
: : : "memory");
}
static inline void invalidate_tlb_page(uintptr_t virt)
{
/* to be refined */
invalidate_tlb_all();
}
/* zephyr execution regions with appropriate attributes */
struct arm_mmu_flat_range {
@@ -878,9 +844,8 @@ static void setup_page_tables(struct arm_mmu_ptables *ptables)
uintptr_t max_va = 0, max_pa = 0;
MMU_DEBUG("xlat tables:\n");
for (index = 0U; index < CONFIG_MAX_XLAT_TABLES; index++) {
for (index = 0U; index < CONFIG_MAX_XLAT_TABLES; index++)
MMU_DEBUG("%d: %p\n", index, xlat_tables + index * Ln_XLAT_NUM_ENTRIES);
}
for (index = 0U; index < mmu_config.num_regions; index++) {
region = &mmu_config.mmu_regions[index];
@@ -1102,10 +1067,6 @@ static int __arch_mem_map(void *virt, uintptr_t phys, size_t size, uint32_t flag
entry_flags |= MT_RW_AP_ELx;
}
if (IS_ENABLED(CONFIG_DEMAND_PAGING) && (flags & K_MEM_MAP_UNPAGED) != 0) {
entry_flags |= MT_PAGED_OUT;
}
return add_map(ptables, "generic", phys, (uintptr_t)virt, size, entry_flags);
}
@@ -1368,9 +1329,8 @@ void z_arm64_thread_mem_domains_init(struct k_thread *incoming)
{
struct arm_mmu_ptables *ptables;
if ((incoming->base.user_options & K_USER) == 0) {
if ((incoming->base.user_options & K_USER) == 0)
return;
}
ptables = incoming->arch.ptables;
@@ -1386,311 +1346,3 @@ void z_arm64_swap_mem_domains(struct k_thread *incoming)
}
#endif /* CONFIG_USERSPACE */
#ifdef CONFIG_DEMAND_PAGING
static uint64_t *get_pte_location(struct arm_mmu_ptables *ptables,
uintptr_t virt)
{
uint64_t *pte;
uint64_t *table = ptables->base_xlat_table;
unsigned int level = BASE_XLAT_LEVEL;
for (;;) {
pte = &table[XLAT_TABLE_VA_IDX(virt, level)];
if (level == XLAT_LAST_LEVEL) {
return pte;
}
if (is_table_desc(*pte, level)) {
level++;
table = pte_desc_table(*pte);
continue;
}
/* anything else is unexpected */
return NULL;
}
}
void arch_mem_page_out(void *addr, uintptr_t location)
{
uintptr_t virt = (uintptr_t)addr;
uint64_t *pte = get_pte_location(&kernel_ptables, virt);
uint64_t desc;
__ASSERT(pte != NULL, "");
desc = *pte;
/* mark the entry invalid to the hardware */
desc &= ~PTE_DESC_TYPE_MASK;
desc |= PTE_INVALID_DESC;
/* store the location token in place of the physical address */
__ASSERT((location & ~PTE_PHYSADDR_MASK) == 0, "");
desc &= ~PTE_PHYSADDR_MASK;
desc |= location;
/*
* The location token may be 0. Make sure the whole descriptor
* doesn't end up being zero as this would be seen as a free entry.
*/
desc |= PTE_BLOCK_DESC_AP_RO;
*pte = desc;
MMU_DEBUG("page_out: virt=%#lx location=%#lx\n", virt, location);
debug_show_pte(pte, XLAT_LAST_LEVEL);
sync_domains(virt, CONFIG_MMU_PAGE_SIZE, "page_out");
invalidate_tlb_page(virt);
}
void arch_mem_page_in(void *addr, uintptr_t phys)
{
uintptr_t virt = (uintptr_t)addr;
uint64_t *pte = get_pte_location(&kernel_ptables, virt);
uint64_t desc;
__ASSERT((phys & ~PTE_PHYSADDR_MASK) == 0, "");
__ASSERT(pte != NULL, "");
desc = *pte;
__ASSERT(!is_free_desc(desc), "");
/* mark the entry valid again to the hardware */
desc &= ~PTE_DESC_TYPE_MASK;
desc |= PTE_PAGE_DESC;
/* store the physical address */
desc &= ~PTE_PHYSADDR_MASK;
desc |= phys;
/* mark as clean */
desc |= PTE_BLOCK_DESC_AP_RO;
/* and make it initially unaccessible to track unaccessed pages */
desc &= ~PTE_BLOCK_DESC_AF;
*pte = desc;
MMU_DEBUG("page_in: virt=%#lx phys=%#lx\n", virt, phys);
debug_show_pte(pte, XLAT_LAST_LEVEL);
sync_domains(virt, CONFIG_MMU_PAGE_SIZE, "page_in");
invalidate_tlb_page(virt);
}
enum arch_page_location arch_page_location_get(void *addr, uintptr_t *location)
{
uintptr_t virt = (uintptr_t)addr;
uint64_t *pte = get_pte_location(&kernel_ptables, virt);
uint64_t desc;
enum arch_page_location status;
if (!pte) {
return ARCH_PAGE_LOCATION_BAD;
}
desc = *pte;
if (is_free_desc(desc)) {
return ARCH_PAGE_LOCATION_BAD;
}
switch (desc & PTE_DESC_TYPE_MASK) {
case PTE_PAGE_DESC:
status = ARCH_PAGE_LOCATION_PAGED_IN;
break;
case PTE_INVALID_DESC:
status = ARCH_PAGE_LOCATION_PAGED_OUT;
break;
default:
return ARCH_PAGE_LOCATION_BAD;
}
*location = desc & PTE_PHYSADDR_MASK;
return status;
}
uintptr_t arch_page_info_get(void *addr, uintptr_t *phys, bool clear_accessed)
{
uintptr_t virt = (uintptr_t)addr;
uint64_t *pte = get_pte_location(&kernel_ptables, virt);
uint64_t desc;
uintptr_t status = 0;
if (!pte) {
return ARCH_DATA_PAGE_NOT_MAPPED;
}
desc = *pte;
if (is_free_desc(desc)) {
return ARCH_DATA_PAGE_NOT_MAPPED;
}
switch (desc & PTE_DESC_TYPE_MASK) {
case PTE_PAGE_DESC:
status |= ARCH_DATA_PAGE_LOADED;
break;
case PTE_INVALID_DESC:
/* page not loaded */
break;
default:
return ARCH_DATA_PAGE_NOT_MAPPED;
}
if (phys) {
*phys = desc & PTE_PHYSADDR_MASK;
}
if ((status & ARCH_DATA_PAGE_LOADED) == 0) {
return status;
}
if ((desc & PTE_BLOCK_DESC_AF) != 0) {
status |= ARCH_DATA_PAGE_ACCESSED;
}
if ((desc & PTE_BLOCK_DESC_AP_RO) == 0) {
status |= ARCH_DATA_PAGE_DIRTY;
}
if (clear_accessed) {
desc &= ~PTE_BLOCK_DESC_AF;
*pte = desc;
MMU_DEBUG("page_info: virt=%#lx (clearing AF)\n", virt);
debug_show_pte(pte, XLAT_LAST_LEVEL);
sync_domains(virt, CONFIG_MMU_PAGE_SIZE, "unaccessible");
invalidate_tlb_page(virt);
}
return status;
}
#define MT_SCRATCH (MT_NORMAL | MT_P_RW_U_NA | MT_DEFAULT_SECURE_STATE)
void arch_mem_scratch(uintptr_t phys)
{
uintptr_t virt = (uintptr_t)K_MEM_SCRATCH_PAGE;
size_t size = CONFIG_MMU_PAGE_SIZE;
int ret = add_map(&kernel_ptables, "scratch", phys, virt, size, MT_SCRATCH);
if (ret) {
LOG_ERR("add_map() returned %d", ret);
} else {
sync_domains(virt, size, "scratch");
invalidate_tlb_page(virt);
}
}
static bool do_mem_page_fault(struct arch_esf *esf, uintptr_t virt)
{
/*
* The k_mem_page_fault() code expects to be called with IRQs enabled
* if the fault happened in a context where IRQs were enabled.
*/
if (arch_irq_unlocked(esf->spsr)) {
enable_irq();
}
bool ok = k_mem_page_fault((void *)virt);
disable_irq();
return ok;
}
/* Called from the fault handler. Returns true if the fault is resolved. */
bool z_arm64_do_demand_paging(struct arch_esf *esf, uint64_t esr, uint64_t far)
{
uintptr_t virt = far;
uint64_t *pte, desc;
uintptr_t phys;
/* filter relevant exceptions */
switch (GET_ESR_EC(esr)) {
case 0x21: /* insn abort from current EL */
case 0x25: /* data abort from current EL */
break;
default:
return false;
}
/* make sure the fault happened in the expected range */
if (!IN_RANGE(virt,
(uintptr_t)K_MEM_VIRT_RAM_START,
((uintptr_t)K_MEM_VIRT_RAM_END - 1))) {
return false;
}
virt = ROUND_DOWN(virt, CONFIG_MMU_PAGE_SIZE);
pte = get_pte_location(&kernel_ptables, virt);
if (!pte) {
/* page mapping doesn't exist, let the core code do its thing */
return do_mem_page_fault(esf, virt);
}
desc = *pte;
if ((desc & PTE_DESC_TYPE_MASK) != PTE_PAGE_DESC) {
/* page is not loaded/mapped */
return do_mem_page_fault(esf, virt);
}
/*
* From this point, we expect only 2 cases:
*
* 1) the Access Flag was not set so we set it marking the page
* as accessed;
*
* 2) the page was read-only and a write occurred so we clear the
* RO flag marking the page dirty.
*
* We bail out on anything else.
*
* Fault status codes for Data aborts (DFSC):
* 0b0010LL Access flag fault
* 0b0011LL Permission fault
*/
uint32_t dfsc = GET_ESR_ISS(esr) & GENMASK(5, 0);
bool write = (GET_ESR_ISS(esr) & BIT(6)) != 0; /* WnR */
if (dfsc == (0b001000 | XLAT_LAST_LEVEL) &&
(desc & PTE_BLOCK_DESC_AF) == 0) {
/* page is being accessed: set the access flag */
desc |= PTE_BLOCK_DESC_AF;
if (write) {
if ((desc & PTE_SW_WRITABLE) == 0) {
/* we don't actually have write permission */
return false;
}
/*
* Let's avoid another fault immediately after
* returning by making the page read-write right away
* effectively marking it "dirty" as well.
*/
desc &= ~PTE_BLOCK_DESC_AP_RO;
}
*pte = desc;
sync_domains(virt, CONFIG_MMU_PAGE_SIZE, "accessed");
/* no TLB inval needed after setting AF */
/* tell the eviction algorithm about it */
phys = desc & PTE_PHYSADDR_MASK;
k_mem_paging_eviction_accessed(phys);
return true;
}
if (dfsc == (0b001100 | XLAT_LAST_LEVEL) && write &&
(desc & PTE_BLOCK_DESC_AP_RO) != 0 &&
(desc & PTE_SW_WRITABLE) != 0) {
/* make it "dirty" i.e. read-write */
desc &= ~PTE_BLOCK_DESC_AP_RO;
*pte = desc;
sync_domains(virt, CONFIG_MMU_PAGE_SIZE, "dirtied");
invalidate_tlb_page(virt);
/* this also counts as an access refresh */
phys = desc & PTE_PHYSADDR_MASK;
k_mem_paging_eviction_accessed(phys);
return true;
}
return false;
}
#endif /* CONFIG_DEMAND_PAGING */

View File

@@ -126,14 +126,6 @@
*/
#define PTE_PHYSADDR_MASK GENMASK64(47, PAGE_SIZE_SHIFT)
/*
* Descriptor bits 58 to 55 are defined as "Reserved for Software Use".
*
* When using demand paging, RW memory is marked RO to trap the first write
* for dirty page tracking. Bit 55 indicates if memory is actually writable.
*/
#define PTE_SW_WRITABLE (1ULL << 55)
/*
* TCR definitions.
*/

View File

@@ -1,12 +0,0 @@
/*
* Copyright (c) 2024 BayLibre SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef Z_ARM64_PAGING_H
#define Z_ARM64_PAGING_H
bool z_arm64_do_demand_paging(struct arch_esf *esf, uint64_t esr, uint64_t far);
#endif /* Z_ARM64_PAGING_H */

View File

@@ -16,8 +16,6 @@
#include <kernel_internal.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
extern void z_arm64_mm_init(bool is_primary_core);
@@ -32,10 +30,6 @@ __weak void z_arm64_mm_init(bool is_primary_core) { }
*/
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
/* Initialize tpidrro_el0 with our struct _cpu instance address */
write_tpidrro_el0((uintptr_t)&_kernel.cpus[0]);
@@ -58,9 +52,6 @@ extern FUNC_NORETURN void arch_secondary_cpu_init(void);
void z_arm64_secondary_prep_c(void)
{
arch_secondary_cpu_init();
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
CODE_UNREACHABLE;
}

View File

@@ -1,35 +0,0 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/reboot.h>
#include <zephyr/drivers/pm_cpu_ops.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_PM_CPU_OPS_PSCI
void __weak sys_arch_reboot(int type)
{
unsigned char reset_type;
if (type == SYS_REBOOT_COLD) {
reset_type = SYS_COLD_RESET;
} else if (type == SYS_REBOOT_WARM) {
reset_type = SYS_WARM_RESET;
} else {
LOG_ERR("Invalid reboot type");
return;
}
pm_system_reset(reset_type);
}
#else
void __weak sys_arch_reboot(int type)
{
LOG_WRN("%s is not implemented", __func__);
ARG_UNUSED(type);
}
#endif

View File

@@ -4,5 +4,8 @@
# Needed to separate definitions in common Xen headers
zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:-D__ASSEMBLY__>)
# Xen interface version used in headers for correct definition
zephyr_compile_options(-D__XEN_INTERFACE_VERSION__=0x00040e00)
zephyr_library_sources(hypercall.S)
zephyr_library_sources(enlighten.c)

View File

@@ -25,11 +25,3 @@ config XEN_DOM0LESS
help
Configures Zephyr as DomU, that can be started on Dom0less
setup.
config XEN_INTERFACE_VERSION
hex "Xen interface version"
default 0x00040e00
depends on XEN
help
Xen interface version to use. This is the version of the
interface that Zephyr will use to communicate with the hypervisor.

View File

@@ -42,7 +42,7 @@ static int xen_map_shared_info(const shared_info_t *shared_page)
return HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp);
}
int xen_enlighten_init(void)
static int xen_enlighten_init(void)
{
int ret = 0;
shared_info_t *info = (shared_info_t *) shared_info_buf;
@@ -66,3 +66,5 @@ int xen_enlighten_init(void)
return 0;
}
SYS_INIT(xen_enlighten_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);

View File

@@ -28,13 +28,8 @@ extern "C" {
#ifndef _ASMLANGUAGE
extern void xen_enlighten_init(void);
static ALWAYS_INLINE void arch_kernel_init(void)
{
#ifdef CONFIG_XEN
xen_enlighten_init();
#endif
}
static inline void arch_switch(void *switch_to, void **switched_from)

View File

@@ -17,11 +17,6 @@ if(CONFIG_GEN_ISR_TABLES)
)
endif()
zephyr_library_sources_ifdef(
CONFIG_ISR_TABLE_SHELL
isr_tables_shell.c
)
zephyr_library_sources_ifdef(
CONFIG_MULTI_LEVEL_INTERRUPTS
multilevel_irq.c

View File

@@ -30,10 +30,3 @@ config LEGACY_MULTI_LEVEL_TABLE_GENERATION
help
A make-shift Kconfig to continue generating the multi-level interrupt LUT
with the legacy way using DT macros.
config ISR_TABLE_SHELL
bool "Shell command to dump the ISR tables"
depends on GEN_SW_ISR_TABLE
depends on SHELL
help
This option enables a shell command to dump the ISR tables.

View File

@@ -15,11 +15,11 @@
struct int_list_header {
uint32_t table_size;
uint32_t offset;
#if defined(CONFIG_ISR_TABLES_LOCAL_DECLARATION)
#if IS_ENABLED(CONFIG_ISR_TABLES_LOCAL_DECLARATION)
uint32_t swi_table_entry_size;
uint32_t shared_isr_table_entry_size;
uint32_t shared_isr_client_num_offset;
#endif /* defined(CONFIG_ISR_TABLES_LOCAL_DECLARATION) */
#endif /* IS_ENABLED(CONFIG_ISR_TABLES_LOCAL_DECLARATION) */
};
/* These values are not included in the resulting binary, but instead form the
@@ -29,13 +29,13 @@ struct int_list_header {
Z_GENERIC_SECTION(.irq_info) __used struct int_list_header _iheader = {
.table_size = IRQ_TABLE_SIZE,
.offset = CONFIG_GEN_IRQ_START_VECTOR,
#if defined(CONFIG_ISR_TABLES_LOCAL_DECLARATION)
#if IS_ENABLED(CONFIG_ISR_TABLES_LOCAL_DECLARATION)
.swi_table_entry_size = sizeof(struct _isr_table_entry),
#if defined(CONFIG_SHARED_INTERRUPTS)
#if IS_ENABLED(CONFIG_SHARED_INTERRUPTS)
.shared_isr_table_entry_size = sizeof(struct z_shared_isr_table_entry),
.shared_isr_client_num_offset = offsetof(struct z_shared_isr_table_entry, client_num),
#endif /* defined(CONFIG_SHARED_INTERRUPTS) */
#endif /* defined(CONFIG_ISR_TABLES_LOCAL_DECLARATION) */
#endif /* IS_ENABLED(CONFIG_SHARED_INTERRUPTS) */
#endif /* IS_ENABLED(CONFIG_ISR_TABLES_LOCAL_DECLARATION) */
};
/* These are placeholder tables. They will be replaced by the real tables

View File

@@ -1,67 +0,0 @@
/*
* Copyright (c) 2024 Meta Platforms.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/debug/symtab.h>
#include <zephyr/shell/shell.h>
#include <zephyr/sw_isr_table.h>
static void dump_isr_table_entry(const struct shell *sh, int idx, struct _isr_table_entry *entry)
{
if ((entry->isr == z_irq_spurious) || (entry->isr == NULL)) {
return;
}
#ifdef CONFIG_SYMTAB
const char *name = symtab_find_symbol_name((uintptr_t)entry->isr, NULL);
shell_print(sh, "%4d: %s(%p)", idx, name, entry->arg);
#else
shell_print(sh, "%4d: %p(%p)", idx, entry->isr, entry->arg);
#endif /* CONFIG_SYMTAB */
}
static int cmd_sw_isr_table(const struct shell *sh, size_t argc, char **argv)
{
shell_print(sh, "_sw_isr_table[%d]\n", IRQ_TABLE_SIZE);
for (int idx = 0; idx < IRQ_TABLE_SIZE; idx++) {
dump_isr_table_entry(sh, idx, &_sw_isr_table[idx]);
}
return 0;
}
#ifdef CONFIG_SHARED_INTERRUPTS
static int cmd_shared_sw_isr_table(const struct shell *sh, size_t argc, char **argv)
{
shell_print(sh, "z_shared_sw_isr_table[%d][%d]\n", IRQ_TABLE_SIZE,
CONFIG_SHARED_IRQ_MAX_NUM_CLIENTS);
for (int idx = 0; idx < IRQ_TABLE_SIZE; idx++) {
for (int c = 0; c < z_shared_sw_isr_table[idx].client_num; c++) {
dump_isr_table_entry(sh, idx, &z_shared_sw_isr_table[idx].clients[c]);
}
}
return 0;
}
#endif /* CONFIG_SHARED_INTERRUPTS */
SHELL_STATIC_SUBCMD_SET_CREATE(isr_table_cmds,
SHELL_CMD_ARG(sw_isr_table, NULL,
"Dump _sw_isr_table.\n"
"Usage: isr_table sw_isr_table",
cmd_sw_isr_table, 1, 0),
#ifdef CONFIG_SHARED_INTERRUPTS
SHELL_CMD_ARG(shared_sw_isr_table, NULL,
"Dump z_shared_sw_isr_table.\n"
"Usage: isr_table shared_sw_isr_table",
cmd_shared_sw_isr_table, 1, 0),
#endif /* CONFIG_SHARED_INTERRUPTS */
SHELL_SUBCMD_SET_END);
SHELL_CMD_ARG_REGISTER(isr_table, &isr_table_cmds, "ISR tables shell command",
NULL, 0, 0);

View File

@@ -11,12 +11,9 @@
#include <zephyr/sys/__assert.h>
#include <zephyr/sys/util.h>
BUILD_ASSERT(CONFIG_MAX_IRQ_PER_AGGREGATOR < BIT(CONFIG_2ND_LEVEL_INTERRUPT_BITS),
BUILD_ASSERT((CONFIG_NUM_2ND_LEVEL_AGGREGATORS * CONFIG_MAX_IRQ_PER_AGGREGATOR) <=
BIT(CONFIG_2ND_LEVEL_INTERRUPT_BITS),
"L2 bits not enough to cover the number of L2 IRQs");
#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
BUILD_ASSERT(CONFIG_MAX_IRQ_PER_AGGREGATOR < BIT(CONFIG_3RD_LEVEL_INTERRUPT_BITS),
"L3 bits not enough to cover the number of L3 IRQs");
#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
/**
* @brief Get the aggregator that's responsible for the given irq
@@ -88,8 +85,7 @@ unsigned int z_get_sw_isr_table_idx(unsigned int irq)
table_idx -= CONFIG_GEN_IRQ_START_VECTOR;
__ASSERT(table_idx < IRQ_TABLE_SIZE, "table_idx(%d) < IRQ_TABLE_SIZE(%d)", table_idx,
IRQ_TABLE_SIZE);
__ASSERT_NO_MSG(table_idx < IRQ_TABLE_SIZE);
return table_idx;
}

View File

@@ -7,12 +7,6 @@
/* Copied from linker.ld */
#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_nocache_ram), okay)
#define NOCACHE_REGION LINKER_DT_NODE_REGION_NAME_TOKEN(DT_CHOSEN(zephyr_nocache_ram))
#else
#define NOCACHE_REGION RAMABLE_REGION
#endif
/* Non-cached region of RAM */
SECTION_DATA_PROLOGUE(_NOCACHE_SECTION_NAME,(NOLOAD),)
{
@@ -33,5 +27,5 @@ SECTION_DATA_PROLOGUE(_NOCACHE_SECTION_NAME,(NOLOAD),)
MPU_ALIGN(_nocache_ram_size);
#endif
_nocache_ram_end = .;
} GROUP_DATA_LINK_IN(NOCACHE_REGION, NOCACHE_REGION)
} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
_nocache_ram_size = _nocache_ram_end - _nocache_ram_start;

View File

@@ -92,8 +92,8 @@ void z_isr_install(unsigned int irq, void (*routine)(const void *),
for (i = 0; i < shared_entry->client_num; i++) {
client = &shared_entry->clients[i];
__ASSERT((client->isr == routine && client->arg == param) == false,
"ISR/arg combination is already registered");
__ASSERT(client->isr != routine && client->arg != param,
"trying to register duplicate ISR/arg pair");
}
shared_entry->clients[shared_entry->client_num].isr = routine;

View File

@@ -19,16 +19,12 @@ static ALWAYS_INLINE void mips_idle(unsigned int key)
__asm__ volatile("wait");
}
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
void arch_cpu_idle(void)
{
mips_idle(1);
}
#endif
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
void arch_cpu_atomic_idle(unsigned int key)
{
mips_idle(key);
}
#endif

View File

@@ -48,7 +48,3 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
irq_unlock(key);
}
void arch_irq_offload_init(void)
{
}

View File

@@ -11,8 +11,6 @@
#include <kernel_internal.h>
#include <zephyr/irq.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
static void interrupt_init(void)
{
@@ -46,15 +44,9 @@ static void interrupt_init(void)
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
z_bss_zero();
interrupt_init();
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
z_cstart();
CODE_UNREACHABLE;

View File

@@ -7,7 +7,6 @@
#include <zephyr/kernel.h>
#include <zephyr/kernel_structs.h>
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
void arch_cpu_idle(void)
{
/* Do nothing but unconditionally unlock interrupts and return to the
@@ -15,9 +14,7 @@ void arch_cpu_idle(void)
*/
irq_unlock(NIOS2_STATUS_PIE_MSK);
}
#endif
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
void arch_cpu_atomic_idle(unsigned int key)
{
/* Do nothing but restore IRQ state. This CPU does not have any
@@ -25,4 +22,3 @@ void arch_cpu_atomic_idle(unsigned int key)
*/
irq_unlock(key);
}
#endif

View File

@@ -41,7 +41,3 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
irq_unlock(key);
}
void arch_irq_offload_init(void)
{
}

View File

@@ -21,8 +21,6 @@
#include <zephyr/linker/linker-defs.h>
#include <zephyr/kernel_structs.h>
#include <kernel_internal.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
/**
* @brief Prepare to and run C code
@@ -32,10 +30,6 @@
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
z_bss_zero();
z_data_copy();
/* In most XIP scenarios we copy the exception code into RAM, so need
@@ -50,9 +44,6 @@ void z_prep_c(void)
*/
z_nios2_dcache_flush_all();
#endif
#endif
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
z_cstart();
CODE_UNREACHABLE;

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