Zephyr 1.7.0

Change-Id: I0841f3b768ffdf98c8c4acf2a8f5f85ba0370bb3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>

.checkpatch.conf

@@ -5,13 +5,13 @@
 --show-types
 --max-line-length=80
 --min-conf-desc-length=1
---typedefsfile=scripts/checkpatch/typedefsfile
 
 --ignore BRACES
 --ignore PRINTK_WITHOUT_KERN_LEVEL
 --ignore SPLIT_STRING
 --ignore VOLATILE
 --ignore CONFIG_EXPERIMENTAL
+--ignore PREFER_KERNEL_TYPES
 --ignore AVOID_EXTERNS
 --ignore NETWORKING_BLOCK_COMMENT_STYLE
 --ignore DATE_TIME

.clang-format

@@ -1,151 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# clang-format configuration file. Intended for clang-format >= 4.
-#
-# For more information, see:
-#
-#   Documentation/process/clang-format.rst
-#   https://clang.llvm.org/docs/ClangFormat.html
-#   https://clang.llvm.org/docs/ClangFormatStyleOptions.html
-#
----
-AccessModifierOffset: -4
-AlignAfterOpenBracket: Align
-AlignConsecutiveAssignments: false
-AlignConsecutiveDeclarations: false
-#AlignEscapedNewlines: Left # Unknown to clang-format-4.0
-AlignOperands: true
-AlignTrailingComments: false
-AllowAllParametersOfDeclarationOnNextLine: false
-AllowShortBlocksOnASingleLine: false
-AllowShortCaseLabelsOnASingleLine: false
-AllowShortFunctionsOnASingleLine: None
-AllowShortIfStatementsOnASingleLine: false
-AllowShortLoopsOnASingleLine: false
-AlwaysBreakAfterDefinitionReturnType: None
-AlwaysBreakAfterReturnType: None
-AlwaysBreakBeforeMultilineStrings: false
-AlwaysBreakTemplateDeclarations: false
-BinPackArguments: true
-BinPackParameters: true
-BraceWrapping:
-  AfterClass: false
-  AfterControlStatement: false
-  AfterEnum: false
-  AfterFunction: true
-  AfterNamespace: true
-  AfterObjCDeclaration: false
-  AfterStruct: false
-  AfterUnion: false
-  #AfterExternBlock: false # Unknown to clang-format-5.0
-  BeforeCatch: false
-  BeforeElse: false
-  IndentBraces: false
-  #SplitEmptyFunction: true # Unknown to clang-format-4.0
-  #SplitEmptyRecord: true # Unknown to clang-format-4.0
-  #SplitEmptyNamespace: true # Unknown to clang-format-4.0
-BreakBeforeBinaryOperators: None
-BreakBeforeBraces: Custom
-#BreakBeforeInheritanceComma: false # Unknown to clang-format-4.0
-BreakBeforeTernaryOperators: false
-BreakConstructorInitializersBeforeComma: false
-#BreakConstructorInitializers: BeforeComma # Unknown to clang-format-4.0
-BreakAfterJavaFieldAnnotations: false
-BreakStringLiterals: false
-ColumnLimit: 80
-CommentPragmas: '^ IWYU pragma:'
-#CompactNamespaces: false # Unknown to clang-format-4.0
-ConstructorInitializerAllOnOneLineOrOnePerLine: false
-ConstructorInitializerIndentWidth: 8
-ContinuationIndentWidth: 8
-Cpp11BracedListStyle: false
-DerivePointerAlignment: false
-DisableFormat: false
-ExperimentalAutoDetectBinPacking: false
-#FixNamespaceComments: false # Unknown to clang-format-4.0
-
-# Taken from:
-#   git grep -h '^#define [^[:space:]]*for_each[^[:space:]]*(' include/ \
-#   | sed "s,^#define \([^[:space:]]*for_each[^[:space:]]*\)(.*$,  - '\1'," \
-#   | sort | uniq
-ForEachMacros:
-  - 'FOR_EACH'
-  - 'for_each_linux_bus'
-  - 'for_each_linux_driver'
-  - 'metal_bitmap_for_each_clear_bit'
-  - 'metal_bitmap_for_each_set_bit'
-  - 'metal_for_each_page_size_down'
-  - 'metal_for_each_page_size_up'
-  - 'metal_list_for_each'
-  - 'RB_FOR_EACH'
-  - 'RB_FOR_EACH_CONTAINER'
-  - 'SYS_DLIST_FOR_EACH_CONTAINER'
-  - 'SYS_DLIST_FOR_EACH_CONTAINER_SAFE'
-  - 'SYS_DLIST_FOR_EACH_NODE'
-  - 'SYS_DLIST_FOR_EACH_NODE_SAFE'
-  - 'SYS_SFLIST_FOR_EACH_CONTAINER'
-  - 'SYS_SFLIST_FOR_EACH_CONTAINER_SAFE'
-  - 'SYS_SFLIST_FOR_EACH_NODE'
-  - 'SYS_SFLIST_FOR_EACH_NODE_SAFE'
-  - 'SYS_SLIST_FOR_EACH_CONTAINER'
-  - 'SYS_SLIST_FOR_EACH_CONTAINER_SAFE'
-  - 'SYS_SLIST_FOR_EACH_NODE'
-  - 'SYS_SLIST_FOR_EACH_NODE_SAFE'
-  - '_WAIT_Q_FOR_EACH'
-  - 'Z_GENLIST_FOR_EACH_CONTAINER'
-  - 'Z_GENLIST_FOR_EACH_CONTAINER_SAFE'
-  - 'Z_GENLIST_FOR_EACH_NODE'
-  - 'Z_GENLIST_FOR_EACH_NODE_SAFE'
-
-#IncludeBlocks: Preserve # Unknown to clang-format-5.0
-IncludeCategories:
-  - Regex: '.*'
-    Priority: 1
-IncludeIsMainRegex: '(Test)?$'
-IndentCaseLabels: false
-#IndentPPDirectives: None # Unknown to clang-format-5.0
-IndentWidth: 8
-IndentWrappedFunctionNames: false
-JavaScriptQuotes: Leave
-JavaScriptWrapImports: true
-KeepEmptyLinesAtTheStartOfBlocks: false
-MacroBlockBegin: ''
-MacroBlockEnd: ''
-MaxEmptyLinesToKeep: 1
-NamespaceIndentation: Inner
-#ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0
-ObjCBlockIndentWidth: 8
-ObjCSpaceAfterProperty: true
-ObjCSpaceBeforeProtocolList: true
-
-# Taken from git's rules
-#PenaltyBreakAssignment: 10 # Unknown to clang-format-4.0
-PenaltyBreakBeforeFirstCallParameter: 30
-PenaltyBreakComment: 10
-PenaltyBreakFirstLessLess: 0
-PenaltyBreakString: 10
-PenaltyExcessCharacter: 100
-PenaltyReturnTypeOnItsOwnLine: 60
-
-PointerAlignment: Right
-ReflowComments: false
-SortIncludes: false
-#SortUsingDeclarations: false # Unknown to clang-format-4.0
-SpaceAfterCStyleCast: false
-SpaceAfterTemplateKeyword: true
-SpaceBeforeAssignmentOperators: true
-#SpaceBeforeCtorInitializerColon: true # Unknown to clang-format-5.0
-#SpaceBeforeInheritanceColon: true # Unknown to clang-format-5.0
-SpaceBeforeParens: ControlStatements
-#SpaceBeforeRangeBasedForLoopColon: true # Unknown to clang-format-5.0
-SpaceInEmptyParentheses: false
-SpacesBeforeTrailingComments: 1
-SpacesInAngles: false
-SpacesInContainerLiterals: false
-SpacesInCStyleCastParentheses: false
-SpacesInParentheses: false
-SpacesInSquareBrackets: false
-Standard: Cpp03
-TabWidth: 8
-UseTab: Always
-...

.codecov.yml

@@ -1,31 +0,0 @@
-codecov:
-  notify:
-    require_ci_to_pass: yes
-
-coverage:
-  precision: 2
-  round: down
-  range: "70...100"
-
-  status:
-    project: yes
-    patch: yes
-    changes: no
-
-#ignore:
-#  - "tests/**/*"
-#  - "samples/**/*"
-#  - "ext/hal/**/*"
-
-parsers:
-  gcov:
-    branch_detection:
-      conditional: yes
-      loop: yes
-      method: no
-      macro: no
-
-comment:
-  layout: "reach, diff, flags, files, footer"
-  behavior: default
-  require_changes: no

.editorconfig

@@ -1,56 +0,0 @@
-# EditorConfig: https://editorconfig.org/
-
-# top-most EditorConfig file
-root = true
-
-# All (Defaults)
-[*]
-charset = utf-8
-end_of_line = lf
-insert_final_newline = true
-trim_trailing_whitespace = true
-
-# C
-[*.{c,h}]
-indent_style = tab
-indent_size = 8
-
-# Python
-[*.py]
-indent_style = space
-indent_size = 4
-
-# Perl
-[*.pl]
-indent_style = tab
-indent_size = 8
-
-# YAML
-[*.yml]
-indent_style = space
-indent_size = 2
-
-# Shell Script
-[*.sh]
-indent_style = space
-indent_size = 4
-
-# Windows Command Script
-[*.cmd]
-end_of_line = crlf
-indent_style = tab
-indent_size = 8
-
-# Valgrind Suppression File
-[*.supp]
-indent_style = space
-indent_size = 3
-
-# CMake
-[{CMakeLists.txt,*.cmake}]
-indent_style = space
-indent_size = 2
-
-# Makefile
-[Makefile]
-indent_style = tab

.github/ISSUE_TEMPLATE/bug_report.md

@@ -1,39 +0,0 @@
----
-name: Bug report
-about: Create a report to help us improve Zephyr
-title: ''
-labels: bug
-assignees: ''
-
----
-
-**Describe the bug**
-A clear and concise description of what the bug is.
-What have you tried to diagnose or workaround this issue?
-
-**To Reproduce**
-Steps to reproduce the behavior:
-1. mkdir build; cd build
-2. cmake -DBOARD=board\_xyz
-3. make
-4. See error
-
-**Expected behavior**
-A clear and concise description of what you expected to happen.
-
-**Impact**
-What impact does this issue have on your progress (e.g., annoyance, showstopper)
-
-**Screenshots or console output**
-If applicable, add a screenshot (drag-and-drop an image), or console logs
-(cut-and-paste text and put a code fence (\`\`\`) before and after, to help
-explain the issue.
-
-**Environment (please complete the following information):**
- - OS: (e.g. Linux, MacOS, Windows)
- - Toolchain (e.g Zephyr SDK, ...)
- - Commit SHA or Version used
-
-
-**Additional context**
-Add any other context about the problem here.

.github/ISSUE_TEMPLATE/enhancement.md

@@ -1,20 +0,0 @@
----
-name: Enhancement
-about: Suggest enhancements to existing features
-title: ''
-labels: enhancement
-assignees: ''
-
----
-
-**Is your enhancement proposal related to a problem? Please describe.**
-A clear and concise description of what the problem is.
-
-**Describe the solution you'd like**
-A clear and concise description of what you want to happen.
-
-**Describe alternatives you've considered**
-A clear and concise description of any alternative solutions or features you've considered.
-
-**Additional context**
-Add any other context or graphics (drag-and-drop an image) about the feature request here.

.github/ISSUE_TEMPLATE/feature_request.md

@@ -1,20 +0,0 @@
----
-name: Feature request
-about: Suggest an idea for this project
-title: ''
-labels: feature request
-assignees: ''
-
----
-
-**Is your feature request related to a problem? Please describe.**
-A clear and concise description of what the problem is.
-
-**Describe the solution you'd like**
-A clear and concise description of what you want to happen.
-
-**Describe alternatives you've considered**
-A clear and concise description of any alternative solutions or features you've considered.
-
-**Additional context**
-Add any other context or graphics (drag-and-drop an image) about the feature request here.

.github/ISSUE_TEMPLATE/rfc---proposal.md

@@ -1,51 +0,0 @@
----
-name: RFC / Proposal
-about: Submit an RFC / Proposal
-title: ''
-labels: RFC
-assignees: ''
-
----
-
-## Introduction
-
-This section targets end users, TSC members, maintainers and anyone else that might
-need a quick explanation of your proposed change.
-
-### Problem description
-
-Why do we want this change and what problem are we trying to address?
-
-### Proposed change
-
-A brief summary of the proposed change - the 10,000 ft view on what it will
-change once this change is implemented.
-
-## Detailed RFC
-
-In this section of the document the target audience is the dev team. Upon
-reading this section each engineer should have a rather clear picture of what
-needs to be done in order to implement the described feature.
-
-### Proposed change (Detailed)
-
-This section is freeform - you should describe your change in as much detail
-as possible. Please also ensure to include any context or background info here.
-For example, do we have existing components which can be reused or altered.
-
-By reading this section, each team member should be able to know what exactly
-you're planning to change and how.
-
-### Dependencies
-
-Highlight how the change may affect the rest of the project (new components,
-modifications in other areas), or other teams/projects.
-
-### Concerns and Unresolved Questions
-
-List any concerns, unknowns, and generally unresolved questions etc.
-
-## Alternatives
-
-List any alternatives considered, and the reasons for choosing this option
-over them.

.gitignore

@@ -7,20 +7,18 @@
 *.swp
 *.swo
 *~
-build*/
 cscope.*
 .dir
-
-/*.patch
-
-# The .cache directory will be used to cache toolchain capabilities if
-# no suitable out-of-tree directory is found.
-.cache
-
 outdir
 outdir-*
 scripts/basic/fixdep
 scripts/gen_idt/gen_idt
+scripts/gen_offset_header/gen_offset_header
+scripts/kconfig/conf
+scripts/kconfig/mconf
+scripts/kconfig/zconf.hash.c
+scripts/kconfig/zconf.lex.c
+scripts/kconfig/zconf.tab.c
 doc/_build
 doc/doxygen
 doc/xml
@@ -28,22 +26,11 @@ doc/html
 doc/boards
 doc/samples
 doc/latex
-doc/themes/zephyr-docs-theme
-sanity-out*
-bsim_bt_out
+sanity-out/
 scripts/grub
-doc/reference/kconfig/*.rst
-doc/doc.warnings
+doc/reference/kconfig/CONFIG_*
+doc/reference/kconfig/index.rst
 tags
-.*project
-.settings
-.envrc
-.vscode
-hide-defaults-note
-
-# Tag files
-GPATH
-GRTAGS
-GTAGS
-
-.idea
+.project
+.cproject
+.xxproject

.gitlint

@@ -1,57 +0,0 @@
-# All these sections are optional, edit this file as you like.
-[general]
-ignore=title-trailing-punctuation, T3, title-max-length, T1, body-hard-tab, B3, B1
-# verbosity should be a value between 1 and 3, the commandline -v flags take precedence over this
-verbosity = 3
-# By default gitlint will ignore merge commits. Set to 'false' to disable.
-ignore-merge-commits=true
-# Enable debug mode (prints more output). Disabled by default
-debug = false
-
-# Set the extra-path where gitlint will search for user defined rules
-# See http://jorisroovers.github.io/gitlint/user_defined_rules for details
-extra-path=scripts/gitlint
-
-[title-max-length-no-revert]
-line-length=72
-
-[body-min-line-count]
-min-line-count=1
-
-[body-max-line-count]
-max-line-count=200
-
-[title-starts-with-subsystem]
-regex = ^(?!subsys:)(([^:]+):)(\s([^:]+):)*\s(.+)$
-
-[title-must-not-contain-word]
-# Comma-separated list of words that should not occur in the title. Matching is case
-# insensitive. It's fine if the keyword occurs as part of a larger word (so "WIPING"
-# will not cause a violation, but "WIP: my title" will.
-words=wip
-
-[title-match-regex]
-# python like regex (https://docs.python.org/2/library/re.html) that the
-# commit-msg title must be matched to.
-# Note that the regex can contradict with other rules if not used correctly
-# (e.g. title-must-not-contain-word).
-#regex=^US[0-9]*
-
-[max-line-length-with-exceptions]
-# B1 = body-max-line-length
-line-length=72
-
-[body-min-length]
-min-length=3
-
-[body-is-missing]
-# Whether to ignore this rule on merge commits (which typically only have a title)
-# default = True
-ignore-merge-commits=false
-
-[body-changed-file-mention]
-# List of files that need to be explicitly mentioned in the body when they are changed
-# This is useful for when developers often erroneously edit certain files or git submodules.
-# By specifying this rule, developers can only change the file when they explicitly reference
-# it in the commit message.
-#files=gitlint/rules.py,README.md

.gitreview

@@ -0,0 +1,4 @@
+[gerrit]
+host=gerrit.zephyrproject.org
+port=29418
+project=zephyr.git

.known-issues/doc/bluetooth.conf

@@ -3,7 +3,7 @@
 #
 # FIXME: all these should match the relative filename
 #
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]$
+^(?P<filename>[-._/\w]+/doc/api/bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]$
 ^[ \t]*$
 ^[ \t]*\^$
 ^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]$
@@ -15,7 +15,7 @@
 #
 # bt_gatt_discover_params unnamed struct definition
 #
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^(?P<filename>[-._/\w]+/doc/api/bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
 ^[ \t]*
 ^[ \t]*\^
 ^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
@@ -27,7 +27,7 @@
 #
 # Bluetooth GATT unnamed struct definition
 #
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^(?P<filename>[-._/\w]+/doc/api/bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
 ^[ \t]*
 ^[ \t]*\^
 ^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
@@ -36,15 +36,3 @@
 ^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
 ^.*bt_gatt_read_params.__unnamed__.*
 ^[- \t]*\^
-#
-# Bluetooth mesh unnamed struct definition
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
-^.*bt_mesh_model.__unnamed__.*
-^[- \t]*\^

.known-issues/doc/display.conf

@@ -1,15 +0,0 @@
-#
-# Display
-#
-#
-# include
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]display_api.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
-^.*mb_image.__unnamed__
-^[- \t]*\^

.known-issues/doc/duplicate.conf

@@ -1,6 +0,0 @@
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]file_system[/\\]index.rst):(?P<lineno>[0-9]+): WARNING: Duplicate declaration.
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]peripherals[/\\]dma.rst):(?P<lineno>[0-9]+): WARNING: Duplicate declaration.
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]peripherals[/\\]sensor.rst):(?P<lineno>[0-9]+): WARNING: Duplicate declaration.

.known-issues/doc/header_footer.conf

@@ -0,0 +1,18 @@
+#
+# KERNELVERSION not being defined in local builds, kill that warning,
+# can ignore it
+#
+^.*/Kconfig.zephyr:[0-9]+: warning: The symbol KERNELVERSION references the non-existent environment variable KERNELVERSION.*
+#
+# Documentation generation, early message
+#
+^cd .* && doxygen doc/doxygen.config
+^srctree=.* SRCARCH=\w+ python scripts/genrest/genrest.py .*$
+# This cuts the sphinx build line; has to be separate because in the
+# middle, we have removed the KERNELVERSION one and a full regex won't match
+^sphinx-build -t \w+ -b html .*
+#
+# Documentation generation, footer message
+#
+^[ \t]*
+^Build finished. The HTML pages are in [-._/\w]+

.known-issues/doc/kernel.conf

@@ -0,0 +1,14 @@
+#
+# Kernel unnamed struct definition
+#
+# FIXME: all these should match the relative filename
+#
+^(?P<filename>[-._/\w]+/doc/api/kernel_api.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]$
+^[ \t]*$
+^[ \t]*\^$
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]$
+^[ \t]*$
+^[ \t]*\^$
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]$
+^.*k_msg.extra.*$
+^[- \t]*\^$

.known-issues/doc/misc.conf

@@ -1,15 +0,0 @@
-#
-# Display
-#
-#
-# include
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]misc_api.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
-^.*json_obj_descr.__unnamed__
-^[- \t]*\^

.known-issues/doc/networking.conf

@@ -4,7 +4,7 @@
 #
 # include/net/net_ip.h warnings
 #
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^(?P<filename>[-._/\w]+/doc/api/networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
 ^[ \t]*
 ^[ \t]*\^
 ^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
@@ -17,54 +17,33 @@
 ^.*in[_6]+addr.in[46]_u
 ^[- \t]*\^
 #
-# include/net/net_mgmt.h
+# include/net/net_if.h warnings
 #
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^(?P<filename>[-._/\w]+/doc/api/networking.rst):(?P<lineno>[0-9]+): WARNING: Error when parsing function declaration.
+^\If the function has no return type:
+^[ \t]*Error in declarator or parameters and qualifiers
+^[ \t]*Invalid definition: Expected identifier in nested name, got keyword: struct \[error at [0-9]+]
+^.*struct net_if __aligned\(32\)
+^[- \t]*\^
+^\If the function has a return type:
+^[ \t]*Error in declarator or parameters and qualifiers
+^[ \t]*If pointer to member declarator:
+^[ \t]*Invalid definition: Expected \'::\' in pointer to member \(function\). \[error at [0-9]+]
+^.*struct net_if __aligned\(32\)
+^[- \t]*\^
+^[ \t]*If declarator-id:
+^[ \t]*Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^.*struct net_if __aligned\(32\)
+^[- \t]*\^
+#
+# include/net/dns_client.h
+#
+^(?P<filename>[-._/\w]+/doc/api/networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
 ^[ \t]*
 ^[ \t]*\^
 ^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
 ^[ \t]*
 ^[ \t]*\^
 ^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
-^.*net_mgmt_event_callback.__unnamed__
+^.*dns_context.address
 ^[- \t]*\^
-#
-# include/net/buf.h
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
-^.*net_buf.__unnamed__
-^[- \t]*\^
-#
-# include/net/ieee802154.h
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
-^.*ieee802154_req_params.__unnamed__
-^[- \t]*\^
-#
-# include/net/net_context.h
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking[/\\]net_context.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
-^.*net_context.options
-^[- \t]*\^
-#
-# include/net/net_stats.h
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking[/\\]net_stats.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
-^.*net_stats_tc.[a-z]+
-^[- \t]*\^
-#
-# stray duplicate definition warnings
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking[/\\]net_if.rst):(?P<lineno>[0-9]+): WARNING: Duplicate declaration.

.known-issues/doc/sensor.conf

@@ -0,0 +1,12 @@
+#
+# Sensor value unnamed struct definition
+#
+^(?P<filename>[-._/\w]+/doc/api/io_interfaces.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*sensor_value.__unnamed__.*
+^[- \t]*\^

.known-issues/doc/uart.conf

@@ -1,7 +1,7 @@
 #
 # UART unnamed struct definition
-#doc/api/peripherals/uart.rst
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]peripherals[/\\]uart.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+#
+^(?P<filename>[-._/\w]+/doc/api/io_interfaces.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
 ^[ \t]*
 ^[ \t]*\^
 ^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
@@ -13,19 +13,3 @@
 ^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
 ^.*uart_device_config.__unnamed__.*
 ^[- \t]*\^
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]peripherals[/\\]uart.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
-^.*uart_event.data
-^[- \t]*\^

.mailmap

@@ -19,4 +19,3 @@ Naga Raja Rao Tulasi <tulasi.r@tcs.com> <tulasi.r@tcs.com>
 Felipe Neves <ryukokki.felipe@gmail.com> <ryukokki.felipe@gmail.com>
 Amir Kaplan <amir.kaplan@intel.com> <amir.kaplan@intel.com>
 Anas Nashif <anas.nashif@intel.com> <anas.nashif@intel.com>
-Ruud Derwig <Ruud.Derwig@synopsys.com> <Ruud.Derwig@synopsys.com>

.shippable.yml

@@ -1,74 +0,0 @@
-language: c
-
-compiler: gcc
-
-env:
-    global:
-        - SDK=0.10.0
-        - ZEPHYR_SDK_INSTALL_DIR=/opt/sdk/zephyr-sdk-0.10.0
-        - ZEPHYR_TOOLCHAIN_VARIANT=zephyr
-        - MATRIX_BUILDS="5"
-    matrix:
-        - MATRIX_BUILD="1"
-        - MATRIX_BUILD="2"
-        - MATRIX_BUILD="3"
-        - MATRIX_BUILD="4"
-        - MATRIX_BUILD="5"
-
-build:
-    cache: false
-    cache_dir_list:
-        - ${SHIPPABLE_BUILD_DIR}/ccache
-    pre_ci_boot:
-        image_name: zephyrprojectrtos/ci
-        image_tag: v0.6.4
-        pull: true
-        options: "-e HOME=/home/buildslave --privileged=true --tty --net=bridge --user buildslave"
-
-    ci:
-      - export CCACHE_DIR=${SHIPPABLE_BUILD_DIR}/ccache/.ccache
-      - >
-        if [ "$IS_PULL_REQUEST" = "true" ]; then
-          ./scripts/ci/run_ci.sh -c -b ${PULL_REQUEST_BASE_BRANCH} -r origin -m ${MATRIX_BUILD} -M ${MATRIX_BUILDS} -p ${PULL_REQUEST};
-        else
-          ./scripts/ci/run_ci.sh -c -b ${BRANCH} -r origin -m ${MATRIX_BUILD} -M ${MATRIX_BUILDS};
-        fi;
-      - ccache -s
-    on_failure:
-      - >
-        if [ "$IS_PULL_REQUEST" = "true" ]; then
-          ./scripts/ci/run_ci.sh -f -b ${PULL_REQUEST_BASE_BRANCH} -r origin -m ${MATRIX_BUILD} -M ${MATRIX_BUILDS} -p ${PULL_REQUEST};
-        else
-          ./scripts/ci/run_ci.sh -f -b ${BRANCH} -r origin -m ${MATRIX_BUILD} -M ${MATRIX_BUILDS};
-        fi;
-    on_success:
-      - >
-        if [ "$IS_PULL_REQUEST" = "true" ]; then
-          ./scripts/ci/run_ci.sh -s -b ${PULL_REQUEST_BASE_BRANCH} -r origin -m ${MATRIX_BUILD} -M ${MATRIX_BUILDS} -p ${PULL_REQUEST};
-        else
-          ./scripts/ci/run_ci.sh -s -b ${BRANCH} -r origin -m ${MATRIX_BUILD} -M ${MATRIX_BUILDS};
-        fi;
-
-integrations:
-  notifications:
-    - integrationName: slack_integration
-      type: slack
-      recipients:
-        - "#ci"
-      branches:
-        only:
-          - master
-      on_success: never
-      on_failure: never
-    - integrationName: email
-      type: email
-      recipients:
-        - builds@zephyrproject.org
-      branches:
-        only:
-          - master
-          - net
-          - bluetooth
-          - arm
-      on_success: never
-      on_failure: never

.uncrustify.cfg

@@ -1,80 +0,0 @@
-indent_with_tabs    = 2     # 1=indent to level only, 2=indent with tabs
-input_tab_size      = 8     # original tab size
-output_tab_size     = 8     # new tab size
-indent_columns      = output_tab_size
-indent_label        = 1     # pos: absolute col, neg: relative column
-indent_switch_case  = 0     # number
-
-#
-# inter-symbol newlines
-#
-
-nl_enum_brace       = remove    # "enum {" vs "enum \n {"
-nl_union_brace      = remove    # "union {" vs "union \n {"
-nl_struct_brace     = remove    # "struct {" vs "struct \n {"
-nl_do_brace         = remove    # "do {" vs "do \n {"
-nl_if_brace         = remove    # "if () {" vs "if () \n {"
-nl_for_brace        = remove    # "for () {" vs "for () \n {"
-nl_else_brace       = remove    # "else {" vs "else \n {"
-nl_while_brace      = remove    # "while () {" vs "while () \n {"
-nl_switch_brace     = remove    # "switch () {" vs "switch () \n {"
-nl_brace_while      = remove    # "} while" vs "} \n while" - cuddle while
-nl_brace_else       = remove    # "} \n else" vs "} else"
-nl_func_var_def_blk = 1
-nl_fcall_brace      = remove    # "list_for_each() {" vs "list_for_each()\n{"
-nl_fdef_brace       = add       # "int foo() {" vs "int foo()\n{"
-
-#
-# Source code modifications
-#
-
-mod_paren_on_return = ignore    # "return 1;" vs "return (1);"
-mod_full_brace_if   = add       # "if() { } else { }" vs "if() else"
-
-#
-# inter-character spacing options
-#
-
-sp_sizeof_paren     = remove    # "sizeof (int)" vs "sizeof(int)"
-sp_before_sparen    = force     # "if (" vs "if("
-sp_after_sparen     = force     # "if () {" vs "if (){"
-sp_inside_braces    = add       # "{ 1 }" vs "{1}"
-sp_inside_braces_struct = add   # "{ 1 }" vs "{1}"
-sp_inside_braces_enum   = add   # "{ 1 }" vs "{1}"
-sp_assign           = add
-sp_arith            = add
-sp_bool             = add
-sp_compare          = add
-sp_assign           = add
-sp_after_comma      = add
-sp_func_def_paren   = remove    # "int foo (){" vs "int foo(){"
-sp_func_call_paren  = remove    # "foo (" vs "foo("
-sp_func_proto_paren = remove    # "int foo ();" vs "int foo();"
-sp_inside_fparen    = remove    # "func( arg )" vs "func(arg)"
-sp_else_brace       = add       # ignore/add/remove/force
-sp_before_ptr_star  = add       # ignore/add/remove/force
-sp_after_ptr_star   = remove    # ignore/add/remove/force
-sp_between_ptr_star = remove    # ignore/add/remove/force
-sp_inside_paren     = remove    # remove spaces inside parens
-sp_paren_paren      = remove    # remove spaces between nested parens
-sp_inside_sparen    = remove    # remove spaces inside parens for if, while and the like
-sp_brace_else       = add       # ignore/add/remove/force
-sp_before_nl_cont   = ignore
-sp_cmt_cpp_start    = add
-sp_brace_typedef    = add       # }typedefd_name -> } typedefd_name
-
-cmt_sp_after_star_cont          = 1
-#
-# Aligning stuff
-#
-
-align_with_tabs     = FALSE     # use tabs to align
-align_on_tabstop    = TRUE      # align on tabstops
-align_enum_equ_span = 4         # '=' in enum definition
-align_struct_init_span  = 0     # align stuff in a structure init '= { }'
-align_right_cmt_span    = 3
-align_nl_cont	    = TRUE
-
-
-
-sp_pp_concat                              = ignore      # ignore/add/remove/force

CODEOWNERS

@@ -1,301 +0,0 @@
-# CODEOWNERS for autoreview assigning in github
-
-# Order is important; the last matching pattern takes the most
-# precedence.
-
-# Do not use wildcard on all source yet
-# *                                        @galak @nashif
-
-/.known-issues/                           @inakypg @nashif
-/arch/arc/                                @vonhust @ruuddw
-/arch/arm/                                @MaureenHelm @galak
-/arch/arm/core/cortex_m/cmse/             @ioannisg
-/arch/arm/include/cortex_m/cmse/          @ioannisg
-/soc/arm/                                 @MaureenHelm @galak
-/soc/arm/arm/mps2/                        @fvincenzo
-/soc/arm/atmel_sam/sam4s/                 @fallrisk
-/soc/arm/nxp*/                            @MaureenHelm
-/soc/arm/nordic_nrf/                      @ioannisg
-/soc/arm/st_stm32/                        @erwango
-/soc/arm/st_stm32/stm32f4/                @rsalveti @idlethread
-/soc/arm/ti_simplelink/cc32xx/            @vanti
-/soc/arm/ti_simplelink/msp432p4xx/        @Mani-Sadhasivam
-/soc/xtensa/intel_s1000/                  @sathishkuttan @dcpleung @rgundi
-/arch/nios2/                              @andrewboie @ramakrishnapallala
-/arch/posix/                              @aescolar
-/arch/riscv32/                            @kgugala @pgielda @nategraff-sifive
-/soc/posix/                               @aescolar
-/soc/riscv32/                             @kgugala @pgielda @nategraff-sifive
-/arch/x86/                                @andrewboie @ramakrishnapallala
-/arch/x86/core/                           @andrewboie
-/arch/x86/core/crt0.S                     @ramakrishnapallala @nashif
-/soc/x86/                                 @andrewboie @ramakrishnapallala
-/soc/x86/intel_quark/quark_d2000/         @nashif
-/soc/x86/intel_quark/quark_se/            @nashif
-/soc/x86/intel_quark/quark_x1000/         @nashif
-/arch/xtensa/                             @andrewboie @rgundi @andyross
-/soc/xtensa/                              @andrewboie @rgundi @andyross
-/boards/arc/                              @vonhust @ruuddw
-/boards/arc/arduino_101_sss/              @nashif
-/boards/arc/em_starterkit/                @vonhust
-/boards/arc/quark_se_c1000_ss_devboard/   @nashif
-/boards/arm/                              @MaureenHelm @galak
-/boards/arm/96b_argonkey/                 @avisconti
-/boards/arm/96b_carbon/                   @rsalveti @idlethread
-/boards/arm/96b_nitrogen/                 @idlethread
-/boards/arm/96b_neonkey/                  @Mani-Sadhasivam
-/boards/arm/96b_stm32_sensor_mez/         @Mani-Sadhasivam
-/boards/arm/cc3220sf_launchxl/            @vanti
-/boards/arm/curie_ble/                    @jhedberg
-/boards/arm/disco_l475_iot1/              @erwango
-/boards/arm/frdm*/                        @MaureenHelm
-/boards/arm/frdm*/doc/                    @MaureenHelm @MeganHansen
-/boards/arm/hexiwear*/                    @MaureenHelm
-/boards/arm/hexiwear*/doc/                @MaureenHelm @MeganHansen
-/boards/arm/lpcxpresso*/                  @MaureenHelm
-/boards/arm/lpcxpresso*/doc/              @MaureenHelm @MeganHansen
-/boards/arm/mimxrt*/                      @MaureenHelm
-/boards/arm/mimxrt*/doc/                  @MaureenHelm @MeganHansen
-/boards/arm/mps2_an385/                   @fvincenzo
-/boards/arm/msp_exp432p401r_launchxl/     @Mani-Sadhasivam
-/boards/arm/nrf51_blenano/                @rsalveti
-/boards/arm/nrf51_pca10028/               @carlescufi
-/boards/arm/nrf52_pca10040/               @carlescufi
-/boards/arm/nrf52_pca20020/               @tkln
-/boards/arm/nrf52810_pca10040/            @carlescufi
-/boards/arm/nrf52840_pca10056/            @carlescufi
-/boards/arm/nrf52840_pca10059/            @lemrey
-/boards/arm/nrf9160_pca10090/             @ioannisg
-/boards/arm/nucleo*/                      @erwango
-/boards/arm/nucleo_f401re/                @rsalveti @idlethread
-/boards/arm/sam4s_xplained/               @fallrisk
-/boards/arm/v2m_beetle/                   @fvincenzo
-/boards/arm/olimexino_stm32/              @ydamigos
-/boards/arm/stm32*_disco/                 @erwango
-/boards/arm/stm32f3_disco/                @ydamigos
-/boards/arm/stm32*_eval/                  @erwango
-/boards/nios2/                            @ramakrishnapallala
-/boards/nios2/altera_max10/               @ramakrishnapallala
-/boards/posix/                            @aescolar
-/boards/riscv32/                          @kgugala @pgielda @nategraff-sifive
-/boards/shields/                          @erwango
-/boards/x86/                              @andrewboie @nashif
-/boards/x86/arduino_101/                  @nashif
-/boards/x86/galileo/                      @nashif
-/boards/x86/quark_d2000_crb/              @nashif
-/boards/x86/quark_se_c1000_devboard/      @nashif
-/boards/xtensa/                           @nashif @dcpleung
-/boards/xtensa/intel_s1000_crb/           @sathishkuttan @dcpleung
-# All cmake related files
-/cmake/                                   @SebastianBoe @nashif
-/cmake/compiler/xcc/                      @nashif
-/cmake/toolchain/xcc/                     @nashif
-/CMakeLists.txt                           @SebastianBoe @nashif
-/doc/                                     @dbkinder
-/doc/guides/coccinelle.rst                @himanshujha199640 @JuliaLawall
-/doc/CMakeLists.txt                       @carlescufi
-/doc/scripts/                             @carlescufi
-/doc/guides/bluetooth/                    @sjanc @jhedberg @Vudentz
-/doc/reference/bluetooth/                 @sjanc @jhedberg @Vudentz
-/drivers/*/*mcux*                         @MaureenHelm
-/drivers/*/*qmsi*                         @nashif
-/drivers/*/*stm32*                        @erwango
-/drivers/*/*native_posix*                 @aescolar
-/drivers/adc/                             @anangl
-/drivers/bluetooth/                       @sjanc @jhedberg @Vudentz
-/drivers/can/                             @alexanderwachter
-/drivers/clock_control/*stm32f4*          @rsalveti @idlethread
-/drivers/counter/                         @nordic-krch
-/drivers/display/                         @vanwinkeljan
-/drivers/ethernet/                        @jukkar @tbursztyka @pfalcon
-/drivers/flash/                           @nashif
-/drivers/flash/*stm32*                    @superna9999
-/drivers/gpio/*stm32*                     @rsalveti @idlethread
-/drivers/hwinfo/                          @alexanderwachter
-/drivers/i2s/i2s_ll_stm32*                @avisconti
-/drivers/ieee802154/                      @jukkar @tbursztyka
-/drivers/interrupt_controller/            @andrewboie
-/drivers/led/                             @Mani-Sadhasivam
-/drivers/led_strip/                       @mbolivar
-/drivers/modem/                           @mike-scott
-/drivers/pci/                             @gnuless
-/drivers/pinmux/stm32/                    @rsalveti @idlethread
-/drivers/sensor/                          @bogdan-davidoaia @MaureenHelm
-/drivers/sensor/hts*/                     @avisconti
-/drivers/sensor/lis*/                     @avisconti
-/drivers/sensor/lps*/                     @avisconti
-/drivers/sensor/lsm*/                     @avisconti
-/drivers/serial/uart_altera_jtag_hal.c    @ramakrishnapallala
-/drivers/net/slip.c                       @jukkar @tbursztyka
-/drivers/spi/                             @tbursztyka
-/drivers/spi/spi_ll_stm32.*               @superna9999
-/drivers/timer/cortex_m_systick.c         @ioannisg
-/drivers/timer/altera_avalon_timer_hal.c  @ramakrishnapallala
-/drivers/timer/riscv_machine_timer.c      @nategraff-sifive @kgugala @pgielda
-/drivers/usb/                             @jfischer-phytec-iot @finikorg
-/drivers/usb/device/usb_dc_stm32.c        @ydamigos @loicpoulain
-/drivers/i2c/i2c_ll_stm32*                @ldts @ydamigos
-/drivers/wifi/                            @jukkar @tbursztyka @pfalcon
-/drivers/wifi/eswifi/                     @loicpoulain
-/dts/arm/st/                              @erwango
-/dts/arm/nordic/                          @ioannisg @carlescufi
-/dts/arm/nxp/                             @MaureenHelm
-/dts/bindings/                            @galak
-/dts/bindings/can/                        @alexanderwachter
-/dts/bindings/*/nordic*                   @anangl
-/dts/bindings/*/nxp*                      @MaureenHelm
-/ext/fs/                                  @nashif @ramakrishnapallala
-/ext/hal/cmsis/                           @MaureenHelm @galak
-/ext/hal/libmetal/                        @galak
-/ext/hal/nordic/                          @carlescufi @anangl
-/ext/hal/nxp/                             @MaureenHelm
-/ext/hal/qmsi/                            @nashif
-/ext/hal/st/stm32cube/                    @erwango
-/ext/hal/ti/simplelink/                   @vanti
-/ext/lib/crypto/mbedtls/                  @nashif
-/ext/lib/crypto/tinycrypt/                @ceolin
-/include/adc.h                            @anangl
-/include/app_memory/                      @andrewboie
-/include/arch/arc/                        @vonhust @ruuddw
-/include/arch/arc/arch.h                  @andrewboie
-/include/arch/arc/v2/irq.h                @andrewboie
-/include/arch/arm/                        @MaureenHelm @galak
-/include/arch/arm/cortex_m/irq.h          @andrewboie
-/include/arch/nios2/                      @andrewboie
-/include/arch/nios2/arch.h                @andrewboie
-/include/arch/posix/                      @aescolar
-/include/arch/riscv32/                    @nategraff-sifive @kgugala @pgielda
-/include/arch/x86/                        @andrewboie @ramakrishnapallala
-/include/arch/x86/arch.h                  @andrewboie
-/include/arch/xtensa/                     @andrewboie
-/include/atomic.h                         @andrewboie @andyross
-/include/bluetooth/                       @sjanc @jhedberg @Vudentz
-/include/cache.h                          @andrewboie @andyross
-/include/can.h                            @alexanderwachter
-/include/counter.h                        @nordic-krch
-/include/device.h                         @ramakrishnapallala @nashif
-/include/display.h                        @vanwinkeljan
-/include/display/                         @vanwinkeljan
-/include/drivers/bluetooth/               @sjanc @jhedberg @Vudentz
-/include/drivers/modem/                   @mike-scott
-/include/drivers/ioapic.h                 @andrewboie
-/include/drivers/loapic.h                 @andrewboie
-/include/drivers/mvic.h                   @andrewboie
-/include/fs.h                             @nashif @ramakrishnapallala
-/include/fs/                              @nashif @ramakrishnapallala
-/include/hwinfo.h                         @alexanderwachter
-/include/init.h                           @andrewboie @andyross
-/include/irq.h                            @andrewboie @andyross
-/include/irq_offload.h                    @andrewboie @andyross
-/include/kernel.h                         @andrewboie @andyross
-/include/kernel_version.h                 @andrewboie @andyross
-/include/led.h                            @Mani-Sadhasivam
-/include/led_strip.h                      @mbolivar
-/include/linker/app_smem*.ld              @andrewboie
-/include/linker/linker-defs.h             @andrewboie @andyross
-/include/linker/linker-tool-gcc.h         @andrewboie @andyross
-/include/linker/linker-tool.h             @andrewboie @andyross
-/include/linker/section_tags.h            @andrewboie @andyross
-/include/linker/sections.h                @andrewboie @andyross
-/include/logging/                         @nordic-krch
-/include/misc/                            @andrewboie @andyross
-/include/net/                             @jukkar @tbursztyka @pfalcon
-/include/net/buf.h                        @jukkar @jhedberg @tbursztyka @pfalcon
-/include/posix/                           @pfalcon
-/include/power.h                          @ramakrishnapallala @nashif
-/include/sensor.h                         @bogdan-davidoaia
-/include/shared_irq.h                     @andrewboie @andyross
-/include/shell/                           @jarz-nordic @nordic-krch
-/include/spi.h                            @tbursztyka
-/include/sw_isr_table.h                   @andrewboie @andyross
-/include/sys_clock.h                      @andrewboie @andyross
-/include/sys_io.h                         @andrewboie @andyross
-/include/toolchain.h                      @andrewboie @andyross @nashif
-/include/toolchain/                       @andrewboie @andyross
-/include/zephyr.h                         @andrewboie @andyross
-/kernel/                                  @andrewboie @andyross
-/lib/gui/                                 @vanwinkeljan
-/lib/os/                                  @andrewboie @andyross
-/lib/posix/                               @pfalcon
-/kernel/device.c                          @andrewboie @andyross @nashif
-/kernel/idle.c                            @andrewboie @andyross @nashif
-/samples/basic/servo_motor/*microbit*     @jhe
-/samples/bluetooth/                       @sjanc @jhedberg @Vudentz
-/samples/boards/intel_s1000_crb/          @sathishkuttan @rgundi @nashif
-/samples/display/                         @vanwinkeljan
-/samples/drivers/CAN/                     @alexanderwachter
-/samples/gui/                             @vanwinkeljan
-/samples/net/                             @jukkar @tbursztyka @pfalcon
-/samples/net/dns_resolve/                 @jukkar @tbursztyka @pfalcon
-/samples/net/lwm2m_client/                @mike-scott
-/samples/net/mqtt_publisher/              @jukkar @tbursztyka
-/samples/net/sockets/coap_client/         @rveerama1
-/samples/net/sockets/coap_server/         @rveerama1
-/samples/net/sockets/                     @jukkar @tbursztyka @pfalcon
-/samples/sensor/                          @bogdan-davidoaia
-/samples/subsys/logging/                  @nordic-krch @jarz-nordic
-/samples/subsys/shell/                    @jarz-nordic @nordic-krch
-/samples/subsys/usb/                      @jfischer-phytec-iot @finikorg
-/samples/subsys/power/                    @ramakrishnapallala @pizi-nordic
-/scripts/coccicheck                       @himanshujha199640 @JuliaLawall
-/scripts/coccinelle/                      @himanshujha199640 @JuliaLawall
-/scripts/elf_helper.py                    @andrewboie
-/scripts/sanity_chk/expr_parser.py        @andrewboie @nashif
-/scripts/gen_app_partitions.py            @andrewboie
-/arch/x86/gen_gdt.py                      @andrewboie
-/arch/x86/gen_idt.py                      @andrewboie
-/scripts/gen_kobject_list.py              @andrewboie
-/arch/x86/gen_mmu_x86.py                  @andrewboie
-/scripts/gen_priv_stacks.py               @agross-linaro
-/scripts/gen_syscall_header.py            @andrewboie
-/scripts/gen_syscalls.py                  @andrewboie
-/scripts/process_gperf.py                 @andrewboie
-/scripts/sanity_chk/                      @andrewboie @nashif
-/scripts/sanitycheck                      @andrewboie @nashif
-/scripts/series-push-hook.sh              @erwango
-/scripts/west_commands/                   @mbolivar
-/scripts/west-commands.yml                @mbolivar
-/scripts/zephyr_module.py                 @tejlmand
-/subsys/bluetooth/                        @sjanc @jhedberg @Vudentz
-/subsys/bluetooth/controller/             @carlescufi @cvinayak @thoh-ot
-/subsys/fs/                               @nashif
-/subsys/fs/fcb/                           @nvlsianpu
-/subsys/fs/nvs/                           @Laczen
-/subsys/logging/                          @nordic-krch
-/subsys/net/buf.c                         @jukkar @jhedberg @tbursztyka @pfalcon
-/subsys/net/ip/                           @jukkar @tbursztyka @pfalcon
-/subsys/net/lib/                          @jukkar @tbursztyka @pfalcon
-/subsys/net/lib/dns/                      @jukkar @tbursztyka @pfalcon
-/subsys/net/lib/http/                     @jukkar @tbursztyka
-/subsys/net/lib/lwm2m/                    @mike-scott
-/subsys/net/lib/mqtt/                     @jukkar @tbursztyka
-/subsys/net/lib/coap/                     @rveerama1
-/subsys/net/lib/sockets/                  @jukkar @tbursztyka @pfalcon
-/subsys/power/                            @ramakrishnapallala @pizi-nordic
-/subsys/settings/                         @nvlsianpu
-/subsys/shell/                            @jarz-nordic @nordic-krch
-/subsys/storage/                          @nvlsianpu
-/subsys/usb/                              @jfischer-phytec-iot @finikorg
-/tests/boards/native_posix/               @aescolar
-/tests/boards/intel_s1000_crb/            @rgundi @dcpleung @sathishkuttan
-/tests/bluetooth/                         @sjanc @jhedberg @Vudentz
-/tests/posix/                             @pfalcon
-/tests/crypto/                            @ceolin
-/tests/crypto/mbedtls/                    @nashif @ceolin
-/tests/drivers/can/                       @alexanderwachter
-/tests/drivers/hwinfo/                    @alexanderwachter
-/tests/drivers/spi/                       @tbursztyka
-/tests/drivers/uart/uart_async_api/       @Mierunski
-/tests/kernel/                            @andrewboie @andyross @nashif
-/tests/net/                               @jukkar @tbursztyka @pfalcon
-/tests/net/buf/                           @jukkar @jhedberg @tbursztyka @pfalcon
-/tests/net/lib/                           @jukkar @tbursztyka @pfalcon
-/tests/net/lib/http_header_fields/        @jukkar @tbursztyka
-/tests/net/lib/mqtt_packet/               @jukkar @tbursztyka
-/tests/net/lib/coap/                      @rveerama1
-/tests/net/socket/                        @jukkar @tbursztyka @pfalcon
-/tests/subsys/fs/                         @nashif @ramakrishnapallala
-/tests/subsys/settings/                   @nvlsianpu
-
-# Get all docs reviewed
-*.rst                                     @dbkinder

CODE_OF_CONDUCT.md

@@ -1,78 +0,0 @@
-# Contributor Covenant Code of Conduct
-
-## Our Pledge
-
-In the interest of fostering an open and welcoming environment, we as
-contributors and maintainers pledge to making participation in our project and
-our community a harassment-free experience for everyone, regardless of age, body
-size, disability, ethnicity, sex characteristics, gender identity and expression,
-level of experience, education, socio-economic status, nationality, personal
-appearance, race, religion, or sexual identity and orientation.
-
-## Our Standards
-
-Examples of behavior that contributes to creating a positive environment
-include:
-
-* Using welcoming and inclusive language
-* Being respectful of differing viewpoints and experiences
-* Gracefully accepting constructive criticism
-* Focusing on what is best for the community
-* Showing empathy towards other community members
-
-Examples of unacceptable behavior by participants include:
-
-* The use of sexualized language or imagery and unwelcome sexual attention or
- advances
-* Trolling, insulting/derogatory comments, and personal or political attacks
-* Public or private harassment
-* Publishing others' private information, such as a physical or electronic
- address, without explicit permission
-* Other conduct which could reasonably be considered inappropriate in a
- professional setting
-
-## Our Responsibilities
-
-Project maintainers are responsible for clarifying the standards of acceptable
-behavior and are expected to take appropriate and fair corrective action in
-response to any instances of unacceptable behavior.
-
-Project maintainers have the right and responsibility to remove, edit, or
-reject comments, commits, code, wiki edits, issues, and other contributions
-that are not aligned to this Code of Conduct, or to ban temporarily or
-permanently any contributor for other behaviors that they deem inappropriate,
-threatening, offensive, or harmful.
-
-## Scope
-
-This Code of Conduct applies both within project spaces and in public spaces
-when an individual is representing the project or its community. Examples of
-representing a project or community include using an official project e-mail
-address, posting via an official social media account, or acting as an appointed
-representative at an online or offline event. Representation of a project may be
-further defined and clarified by project maintainers.
-
-## Enforcement
-
-Instances of abusive, harassing, or otherwise unacceptable behavior may be
-reported by contacting the project team at conduct@zephyrproject.org.
-Reports will be received by Kate Stewart (Linux Foundation) and Amy Occhialino
-(Intel). All complaints will be reviewed and investigated, and will result in a
-response that is deemed necessary and appropriate to the circumstances. The
-project team is obligated to maintain confidentiality with regard to the
-reporter of an incident.  Further details of specific enforcement policies may
-be posted separately.
-
-Project maintainers who do not follow or enforce the Code of Conduct in good
-faith may face temporary or permanent repercussions as determined by other
-members of the project's leadership.
-
-## Attribution
-
-This Code of Conduct is adapted from the [Contributor Covenant][homepage], version 1.4,
-available at https://www.contributor-covenant.org/version/1/4/code-of-conduct.html
-
-[homepage]: https://www.contributor-covenant.org
-
-For answers to common questions about this code of conduct, see
-https://www.contributor-covenant.org/faq

CONTRIBUTING.rst

@@ -1,39 +0,0 @@
-Contribution Guidelines
-#######################
-
-As an open-source project, we welcome and encourage the community to submit
-patches directly to the project.  In our collaborative open source environment,
-standards and methods for submitting changes help reduce the chaos that can result
-from an active development community.
-
-This document briefly summarizes the full `Contribution
-Guidelines <http://docs.zephyrproject.org/latest/contribute/index.html>`_
-documentation.
-
-* Zephyr uses the permissive open source `Apache 2.0 license`_
-  that allows you to freely use, modify, distribute and sell your own products
-  that include Apache 2.0 licensed software.
-
-* There are some imported or reused components of the Zephyr project that
-  use other licensing and are clearly identified.
-
-* The Developer Certificate of Origin (DCO) process is followed to
-  ensure developers are following licensing criteria for their
-  contributions, and documented with a ``Signed-off-by`` line in commits.
-
-* Zephyr development workflow is supported on Linux, macOS, and Windows,
-  (with a few exceptions).
-
-* Source code for the project is maintained in the GitHub repo:
-  https://github.com/zephyrproject-rtos/zephyr
-
-* Issue and feature tracking is done using GitHub issues in this repo.
-
-* A Continuous Integration (CI) system runs on every Pull Request (PR)
-  to verify several aspects of the PR including Git commit formatting,
-  Coding Style, sanity checks builds, and documentation builds.
-
-* The `Zephyr devel mailing list`_ is a great place to engage with the
-  community, ask questions, discuss issues, and help each other.
-
-.. _Zephyr devel mailing list: https://lists.zephyrproject.org/g/devel

Kbuild

@@ -0,0 +1,142 @@
+# vim: filetype=make
+
+ifneq ("$(wildcard $(MDEF_FILE))","")
+MDEF_FILE_PATH=$(strip $(MDEF_FILE))
+else
+ifneq ($(MDEF_FILE),)
+MDEF_FILE_PATH=$(strip $(PROJECT_BASE)/$(MDEF_FILE))
+endif
+endif
+
+ifeq (${CONFIG_NUM_COMMAND_PACKETS},)
+CONFIG_NUM_COMMAND_PACKETS=0
+endif
+ifeq (${CONFIG_NUM_TIMER_PACKETS},)
+CONFIG_NUM_TIMER_PACKETS=0
+endif
+ifeq (${CONFIG_NUM_TASK_PRIORITIES},)
+CONFIG_NUM_TASK_PRIORITIES=$(CONFIG_NUM_PREEMPT_PRIORITIES)
+endif
+
+ifeq ($(ARCH),x86)
+TASKGROUP_SSE="  TASKGROUP SSE"
+endif
+
+define filechk_prj.mdef
+	(echo "% WARNING. THIS FILE IS AUTO-GENERATED. DO NOT MODIFY!"; \
+	echo; \
+	echo "% CONFIG NUM_COMMAND_PACKETS NUM_TIMER_PACKETS NUM_TASK_PRIORITIES"; \
+	echo "% ============================================================="; \
+	echo "  CONFIG ${CONFIG_NUM_COMMAND_PACKETS}             ${CONFIG_NUM_TIMER_PACKETS}               ${CONFIG_NUM_TASK_PRIORITIES}"; \
+	echo; \
+	echo "% TASKGROUP NAME";\
+	echo "% ==============";\
+	echo "  TASKGROUP EXE";\
+	echo "  TASKGROUP SYS";\
+	echo "  TASKGROUP FPU_LEGACY";\
+	echo $(TASKGROUP_SSE);\
+	echo; \
+	if test -e "$(MDEF_FILE_PATH)"; then \
+		cat $(MDEF_FILE_PATH); \
+	fi;)
+endef
+
+misc/generated/sysgen/prj.mdef:	$(MDEF_FILE_PATH) \
+				include/config/auto.conf FORCE
+	$(call filechk,prj.mdef)
+
+sysgen_cmd=$(strip \
+	$(PYTHON) $(srctree)/scripts/sysgen \
+	-i $(CURDIR)/misc/generated/sysgen/prj.mdef \
+	-o $(CURDIR)/misc/generated/sysgen/ \
+)
+
+misc/generated/sysgen/kernel_main.c: misc/generated/sysgen/prj.mdef \
+				     $(srctree)/scripts/sysgen
+	$(Q)$(sysgen_cmd)
+
+define filechk_configs.c
+	(echo "/* file is auto-generated, do not modify ! */"; \
+	echo; \
+	echo "#include <toolchain.h>"; \
+	echo; \
+	echo "GEN_ABS_SYM_BEGIN (_ConfigAbsSyms)"; \
+	echo; \
+	cat $(CURDIR)/include/generated/autoconf.h | sed \
+	's/".*"/1/' | awk  \
+	'/#define/{printf "GEN_ABSOLUTE_SYM(%s, %s);\n", $$2, $$3}'; \
+	echo; \
+	echo "GEN_ABS_SYM_END";)
+endef
+
+misc/generated/configs.c: include/config/auto.conf FORCE
+	$(call filechk,configs.c)
+
+targets := misc/generated/configs.c
+targets += include/generated/generated_dts_board.h
+targets += include/generated/offsets.h
+
+
+always := misc/generated/configs.c
+always += include/generated/generated_dts_board.h
+always += include/generated/offsets.h
+
+ifeq ($(CONFIG_MDEF),y)
+targets += misc/generated/sysgen/kernel_main.c
+always += misc/generated/sysgen/kernel_main.c
+endif
+
+define rule_cc_o_c_1
+	$(call echo-cmd,cc_o_c_1) $(cmd_cc_o_c_1);
+endef
+
+cmd_cc_o_c_1 = $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(ZEPHYRINCLUDE) -c -o $@ $<
+
+arch/$(ARCH)/core/offsets/offsets.o: arch/$(ARCH)/core/offsets/offsets.c $(KCONFIG_CONFIG) \
+				include/generated/generated_dts_board.h
+	$(Q)mkdir -p $(dir $@)
+	$(call if_changed,cc_o_c_1)
+
+
+define offsetchk
+	$(Q)set -e;                             \
+	$(kecho) '  CHK     $@';                \
+	mkdir -p $(dir $@);                     \
+	$(GENOFFSET_H) -i $(1) -o $@.tmp;       \
+	if [ -r $@ ] && cmp -s $@ $@.tmp; then  \
+	rm -f $@.tmp;                           \
+	else                                    \
+	$(kecho) '  UPD     $@';                \
+	mv -f $@.tmp $@;                        \
+	fi
+endef
+
+include/generated/offsets.h: arch/$(ARCH)/core/offsets/offsets.o \
+			     include/config/auto.conf FORCE
+	$(call offsetchk,arch/$(ARCH)/core/offsets/offsets.o)
+
+ifeq ($(CONFIG_HAS_DTS),y)
+define filechk_generated_dts_board.h
+	(echo "/* WARNING. THIS FILE IS AUTO-GENERATED. DO NOT MODIFY! */"; \
+		extract_dts_includes.py dts/$(ARCH)/$(BOARD_NAME).dts_compiled $(ZEPHYR_BASE)/dts/$(ARCH)/yaml; \
+		if test -e $(ZEPHYR_BASE)/dts/$(ARCH)/$(BOARD_NAME).fixup; then \
+			echo; echo; \
+			echo "/* Following definitions fixup the generated include */"; \
+			echo; \
+			cat $(ZEPHYR_BASE)/dts/$(ARCH)/$(BOARD_NAME).fixup; \
+		fi; \
+		)
+endef
+else
+define filechk_generated_dts_board.h
+	(echo "/* WARNING. THIS FILE IS AUTO-GENERATED. DO NOT MODIFY! */";)
+endef
+endif
+
+
+include/generated/generated_dts_board.h: include/config/auto.conf FORCE
+ifeq ($(CONFIG_HAS_DTS),y)
+	$(Q)$(MAKE) $(build)=dts/$(ARCH)
+endif
+	$(call filechk,generated_dts_board.h)
+

Kconfig.zephyr

@@ -6,416 +6,34 @@
 #
 # SPDX-License-Identifier: Apache-2.0
 #
-
-source "$(CMAKE_BINARY_DIR)/Kconfig.modules"
-
-# Include these first so that any properties (e.g. defaults) below can be
-# overriden in *.defconfig files (by defining symbols in multiple locations).
-# After merging all the symbol definitions, Kconfig picks the first property
-# (e.g. the first default) with a satisfied condition.
-#
-# Board defaults should be parsed before SoC defaults, because boards usually
-# overrides SoC values.
-#
-# Note: $ARCH and $BOARD_DIR might be glob patterns.
-source "$(BOARD_DIR)/Kconfig.defconfig"
-
-source "$(SOC_DIR)/$(ARCH)/*/Kconfig.defconfig"
-
-source "boards/Kconfig"
-
-source "$(SOC_DIR)/Kconfig"
+config KERNELVERSION
+	string
+	option env="KERNELVERSION"
 
 source "arch/Kconfig"
 
 source "kernel/Kconfig"
 
-source "dts/Kconfig"
-
 source "drivers/Kconfig"
 
+source "net/Kconfig"
+
+source "misc/Kconfig"
+
 source "lib/Kconfig"
 
 source "subsys/Kconfig"
 
 source "ext/Kconfig"
 
-menu "Build and Link Features"
+source "tests/Kconfig"
 
-menu "Linker Options"
-
-choice
-	prompt "Linker Orphan Section Handling"
-	default LINKER_ORPHAN_SECTION_WARN
-
-config LINKER_ORPHAN_SECTION_PLACE
-	bool "Place"
-	help
-	  Linker puts orphan sections in place without warnings
-	  or errors.
-
-config LINKER_ORPHAN_SECTION_WARN
-	bool "Warn"
-	help
-	  Linker places the orphan sections in ouput and issues
-	  warning about those sections.
-
-config LINKER_ORPHAN_SECTION_ERROR
-	bool "Error"
-	help
-	  Linker exits with error when an orphan section is found.
-
-endchoice
-
-config CODE_DATA_RELOCATION
-       bool "Relocate code/data sections"
-       depends on ARM
-       help
-	  When selected this will relocate .text, data and .bss sections from
-	  the specified files and places it in the required memory region. The
-	  files should be specified in the CMakeList.txt file with
-	  a cmake API zephyr_code_relocation().
-
-config HAS_FLASH_LOAD_OFFSET
-	bool
-	help
-	  This option is selected by targets having a FLASH_LOAD_OFFSET
-	  and FLASH_LOAD_SIZE.
-
-config USE_CODE_PARTITION
-	bool "link into code-partition"
-	depends on HAS_FLASH_LOAD_OFFSET
-	help
-	  When selected application will be linked into chosen code-partition.
-
-config FLASH_LOAD_OFFSET
-	hex "Kernel load offset"
-	default $(dt_hex_val,DT_CODE_PARTITION_OFFSET) if USE_CODE_PARTITION
-	default 0
-	depends on HAS_FLASH_LOAD_OFFSET
-	help
-	  This option specifies the byte offset from the beginning of flash that
-	  the kernel should be loaded into. Changing this value from zero will
-	  affect the Zephyr image's link, and will decrease the total amount of
-	  flash available for use by application code.
-
-	  If unsure, leave at the default value 0.
-
-config FLASH_LOAD_SIZE
-	hex "Kernel load size"
-	default $(dt_hex_val,DT_CODE_PARTITION_SIZE) if USE_CODE_PARTITION
-	default 0
-	depends on HAS_FLASH_LOAD_OFFSET
-	help
-	  If non-zero, this option specifies the size, in bytes, of the flash
-	  area that the Zephyr image will be allowed to occupy.  If zero, the
-	  image will be able to occupy from the FLASH_LOAD_OFFSET to the end of
-	  the device.
-
-	  If unsure, leave at the default value 0.
-
-config TEXT_SECTION_OFFSET
-	hex
-	prompt "TEXT section offset" if !BOOTLOADER_MCUBOOT
-	default 0x200 if BOOTLOADER_MCUBOOT
-	default 0
-	help
-	  If the application is built for chain-loading by a bootloader this
-	  variable is required to be set to value that leaves sufficient
-	  space between the beginning of the image and the start of the .text
-	  section to store an image header or any other metadata.
-	  In the particular case of the MCUboot bootloader this reserves enough
-	  space to store the image header, which should also meet vector table
-	  alignment requirements on most ARM targets, although some targets
-	  may require smaller or larger values.
-
-config HAVE_CUSTOM_LINKER_SCRIPT
-	bool "Custom linker scripts provided"
-	help
-	  Set this option if you have a custom linker script which needed to
-	  be define in CUSTOM_LINKER_SCRIPT.
-
-config CUSTOM_LINKER_SCRIPT
-	string "Path to custom linker script"
-	depends on HAVE_CUSTOM_LINKER_SCRIPT
-	help
-	  Path to the linker script to be used instead of the one define by the
-	  board.
-
-	  The linker script must be based on a version provided by Zephyr since
-	  the kernel can expect a certain layout/certain regions.
-
-	  This is useful when an application needs to add sections into the
-	  linker script and avoid having to change the script provided by
-	  Zephyr.
-
-config CUSTOM_RODATA_LD
-	bool "Include custom-rodata.ld"
-	help
-	  Include a customized linker script fragment for inserting additional
-	  data and linker directives into the rodata section.
-
-config CUSTOM_RWDATA_LD
-	bool "Include custom-rwdata.ld"
-	help
-	  Include a customized linker script fragment for inserting additional
-	  data and linker directives into the data section.
-
-config CUSTOM_SECTIONS_LD
-	bool "Include custom-sections.ld"
-	help
-	  Include a customized linker script fragment for inserting additional
-	  arbitrary sections.
-
-config LINK_WHOLE_ARCHIVE
-	bool "Allow linking with --whole-archive"
-	help
-	  This options allows linking external libraries with the
-	  --whole-archive option to keep all symbols.
-
-config KERNEL_ENTRY
-	string "Kernel entry symbol"
-	default "__start"
-	help
-	  Code entry symbol, to be set at linking phase.
-
-config CHECK_LINK_MAP
-	bool "Check linker map"
-	default y
-	help
-	  Run a linker address generation validity checker at the end of the
-	  build.
-
-endmenu
-
-menu "Compiler Options"
-
-config NATIVE_APPLICATION
-	bool "Build as a native host application"
-	help
-	  Build as a native application that can run on the host and using
-	  resources and libraries provided by the host.
-
-choice
-	prompt "Optimization level"
-	default NO_OPTIMIZATIONS    if COVERAGE
-	default DEBUG_OPTIMIZATIONS if DEBUG
-	default SIZE_OPTIMIZATIONS
-	help
-	  Note that these flags shall only control the compiler
-	  optimization level, and that no extra debug code shall be
-	  conditionally compiled based on them.
-
-config SIZE_OPTIMIZATIONS
-	bool "Optimize for size"
-	help
-	  Compiler optimizations will be set to -Os independently of other
-	  options.
-
-config SPEED_OPTIMIZATIONS
-	bool "Optimize for speed"
-	help
-	  Compiler optimizations will be set to -O2 independently of other
-	  options.
-
-config DEBUG_OPTIMIZATIONS
-	bool "Optimize debugging experience"
-	help
-	  Compiler optimizations will be set to -Og independently of other
-	  options.
-
-config NO_OPTIMIZATIONS
-	bool "Optimize nothing"
-	help
-	  Compiler optimizations will be set to -O0 independently of other
-	  options.
-
-endchoice
-
-config COMPILER_OPT
-	string "Custom compiler options"
-	help
-	  This option is a free-form string that is passed to the compiler
-	  when building all parts of a project (i.e. kernel).
-	  The compiler options specified by this string supplement the
-	  predefined set of compiler supplied by the build system,
-	  and can be used to change compiler optimization, warning and error
-	  messages, and so on.
-
-endmenu
-
-menu "Build Options"
-
-config KERNEL_BIN_NAME
-	string "The kernel binary name"
-	default "zephyr"
-	help
-	  This option sets the name of the generated kernel binary.
-
-config OUTPUT_STAT
-	bool "Create a statistics file"
-	default y
-	help
-	  Create a stat file using readelf -e <elf>
-
-config OUTPUT_DISASSEMBLY
-	bool "Create a disassembly file"
-	default y
-	help
-	  Create an .lst file with the assembly listing of the firmware.
-
-config OUTPUT_PRINT_MEMORY_USAGE
-	bool "Print memory usage to stdout"
-	default y
-	help
-	  If the toolchain supports it, this option will pass
-	  --print-memory-region to the linker when it is doing it's first
-	  linker pass. Note that the memory regions are symbolic concepts
-	  defined by the linker scripts and do not necessarily map
-	  directly to the real physical address space. Take also note that
-	  some platforms do two passes of the linker so the results do not
-	  match exactly to the final elf file. See also rom_report,
-	  ram_report and
-	  https://sourceware.org/binutils/docs/ld/MEMORY.html
-
-config BUILD_OUTPUT_HEX
-	bool "Build a binary in HEX format"
-	help
-	  Build a binary in HEX format. This will build a zephyr.hex file need
-	  by some platforms.
-
-config BUILD_OUTPUT_BIN
-	bool "Build a binary in BIN format"
-	default y
-	help
-	  Build a binary in BIN format. This will build a zephyr.bin file need
-	  by some platforms.
-
-config BUILD_OUTPUT_EXE
-	bool "Build a binary in ELF format with .exe extension"
-	help
-	  Build a binary in ELF format that can run in the host system. This
-	  will build a zephyr.exe file.
-
-config BUILD_OUTPUT_S19
-	bool "Build a binary in S19 format"
-	help
-	  Build a binary in S19 format. This will build a zephyr.s19 file need
-	  by some platforms.
-
-config BUILD_NO_GAP_FILL
-	bool "Don't fill gaps in generated hex/bin/s19 files."
-	depends on BUILD_OUTPUT_HEX || BUILD_OUTPUT_BIN || BUILD_OUTPUT_S19
-
-config BUILD_OUTPUT_STRIPPED
-	bool "Build a stripped binary"
-	help
-	  Build a stripped binary. This will build a zephyr.stripped file need
-	  by some platforms.
-
-config APPLICATION_DEFINED_SYSCALL
-	bool "Scan application folder for any syscall definition"
-	help
-	  Scan additional folders inside application source folder
-	  for application defined syscalls.
-
-endmenu
-endmenu
-
-
-menu "Boot Options"
-
-config IS_BOOTLOADER
-	bool "Act as a bootloader"
-	depends on XIP
-	depends on ARM
-	help
-	  This option indicates that Zephyr will act as a bootloader to execute
-	  a separate Zephyr image payload.
-
-config BOOTLOADER_SRAM_SIZE
-	int "SRAM reserved for bootloader"
-	default 16
-	depends on !XIP || IS_BOOTLOADER
-	depends on ARM || XTENSA
-	help
-	  This option specifies the amount of SRAM (measure in kB) reserved for
-	  a bootloader image, when either:
-	  - the Zephyr image itself is to act as the bootloader, or
-	  - Zephyr is a !XIP image, which implicitly assumes existence of a
-	  bootloader that loads the Zephyr !XIP image onto SRAM.
-
-config BOOTLOADER_MCUBOOT
-	bool "MCUboot bootloader support"
-	select USE_CODE_PARTITION
-	help
-	  This option signifies that the target uses MCUboot as a bootloader,
-	  or in other words that the image is to be chain-loaded by MCUboot.
-	  This sets several required build system and Device Tree options in
-	  order for the image generated to be bootable using the MCUboot open
-	  source bootloader. Currently this includes:
-
-	    * Setting TEXT_SECTION_OFFSET to a default value that allows space
-	      for the MCUboot image header
-	    * Activating SW_VECTOR_RELAY on Cortex-M0 (or Armv8-M baseline)
-	      targets with no built-in vector relocation mechanisms
-	    * Including dts/common/mcuboot.overlay when building the Device
-	      Tree in order to place and link the image at the slot0 offset
-
-config BOOTLOADER_ESP_IDF
-	bool "ESP-IDF bootloader support"
-	depends on SOC_ESP32
-	help
-	  This option will trigger the compilation of the ESP-IDF bootloader
-	  inside the build folder.
-	  At flash time, the bootloader will be flashed with the zephyr image
-
-config REALMODE
-	bool "boot from x86 real mode"
-	depends on X86
-	help
-	  This option enabled Zephyr to start in x86 real mode, instead of
-	  protected mode.
-
-config BOOTLOADER_KEXEC
-	bool "Boot using Linux kexec() system call"
-	depends on X86
-	help
-	  This option signifies that Linux boots the kernel using kexec system call
-	  and utility. This method is used to boot the kernel over the network.
-
-config BOOTLOADER_UNKNOWN
-	bool "Generic boot loader support"
-	depends on X86
-	help
-	  This option signifies that the target has a generic bootloader
-	  or that it supports multiple ways of booting and it isn't clear
-	  at build time which method is to be used. When this option is enabled
-	  the board may have to do extra work to ensure a proper startup.
-
-config BOOTLOADER_CONTEXT_RESTORE
-	bool "Boot loader has context restore support"
-	default y
-	depends on SYS_POWER_DEEP_SLEEP_STATES && BOOTLOADER_CONTEXT_RESTORE_SUPPORTED
-	help
-	  This option signifies that the target has a bootloader
-	  that restores CPU context upon resuming from deep sleep
-	  power state.
-
-config REBOOT
-	bool "Reboot functionality"
-	select SYSTEM_CLOCK_DISABLE
-	help
-	  Enable the sys_reboot() API. Enabling this can drag in other subsystems
-	  needed to perform a "safe" reboot (e.g. SYSTEM_CLOCK_DISABLE, to stop the
-	  system clock before issuing a reset).
-
-config MISRA_SANE
-	bool "MISRA standards compliance features"
-	help
-	  Causes the source code to build in "MISRA" mode, which
-	  disallows some otherwise-permitted features of the C
-	  standard for safety reasons.  Specifically variable length
-	  arrays are not permitted (and gcc will enforce this).
-
-endmenu
+#
+# The following are for Kconfig files for default values only.
+# These should be parsed at the end.
+#
+# Board defaults should be parsed after SoC defaults
+# because board usually overrides SoC values.
+#
+source "arch/*/soc/*/Kconfig.defconfig"
+source "boards/*/*/Kconfig.defconfig"

MAINTAINERS

@@ -0,0 +1,510 @@
+Originally from the Linux Kernel.
+# Licensed under the terms of the GNU GPL License version 2
+
+Descriptions of section entries:
+
+	P: Person (obsolete)
+	M: Mail patches to: FullName <address@domain>
+	R: Designated reviewer: FullName <address@domain>
+	   These reviewers should be CCed on patches.
+	L: Mailing list that is relevant to this area
+	W: Web-page with status/info
+	Q: Patchwork web based patch tracking system site
+	T: SCM tree type and location.
+	   Type is one of: git, hg, quilt, stgit, topgit
+	S: Status, one of the following:
+	   Supported:	Someone is actually paid to look after this.
+	   Maintained:	Someone actually looks after it.
+	   Odd Fixes:	It has a maintainer but they don't have time to do
+			much other than throw the odd patch in. See below..
+	   Orphan:	No current maintainer [but maybe you could take the
+			role as you write your new code].
+	   Obsolete:	Old code. Something tagged obsolete generally means
+			it has been replaced by a better system and you
+			should be using that.
+	F: Files and directories with wildcard patterns.
+	   A trailing slash includes all files and subdirectory files.
+	   F:	drivers/net/	all files in and below drivers/net
+	   F:	drivers/net/*	all files in drivers/net, but not below
+	   F:	*/net/*		all files in "any top level directory"/net
+	   One pattern per line.  Multiple F: lines acceptable.
+	N: Files and directories with regex patterns.
+	   N:	[^a-z]tegra	all files whose path contains the word tegra
+	   One pattern per line.  Multiple N: lines acceptable.
+	   scripts/get_maintainer.pl has different behavior for files that
+	   match F: pattern and matches of N: patterns.  By default,
+	   get_maintainer will not look at git log history when an F: pattern
+	   match occurs.  When an N: match occurs, git log history is used
+	   to also notify the people that have git commit signatures.
+	X: Files and directories that are NOT maintained, same rules as F:
+	   Files exclusions are tested before file matches.
+	   Can be useful for excluding a specific subdirectory, for instance:
+	   F:	net/
+	   X:	net/ipv6/
+	   matches all files in and below net excluding net/ipv6/
+	K: Keyword perl extended regex pattern to match content in a
+	   patch or file.  For instance:
+	   K: of_get_profile
+	      matches patches or files that contain "of_get_profile"
+	   K: \b(printk|pr_(info|err))\b
+	      matches patches or files that contain one or more of the words
+	      printk, pr_info or pr_err
+	   One regex pattern per line.  Multiple K: lines acceptable.
+
+Note: For the hard of thinking, this list is meant to remain in alphabetical
+order. If you could add yourselves to it in alphabetical order that would be
+so much easier [Ed]
+
+Maintainers List (try to look for most precise areas first)
+
+		-----------------------------------
+
+ARC ARCHITECTURE
+M:	Ruud Derwig <Ruud.Derwig@synopsys.com>
+M:	Chuck Jordan <cjordan@synopsys.com>
+M:	Benjamin Walsh <benjamin.walsh@windriver.com>
+S:	Supported
+F:	arch/arc/
+F:	include/arch/arc/
+F:	boards/arc/
+
+ARM ARCHITECTURE
+M:	Maureen Helm <maureen.helm@nxp.com>
+M:	Kumar Gala <kumar.gala@linaro.org>
+S:	Supported
+F:	arch/arm/
+F:	include/arch/arm/
+F:	boards/arm/
+
+ARM CORTEX MICROCONTROLLER SOFTWARE INTERFACE STANDARD (CMSIS)
+M:	Maureen Helm <maureen.helm@nxp.com>
+M:	Kumar Gala <kumar.gala@linaro.org>
+S:	Supported
+F:	ext/hal/cmsis/
+
+BOARDS/ARC - ARDUINO 101 SSS
+M:      Anas Nashif <anas.nashif@intel.com>
+S:	Supported
+F:	boards/arc/arduino_101_sss/
+
+BOARDS/ARC - EM Starterkit
+M:	Chuck Jordan <cjordan@synopsys.com>
+S:	Supported
+F:	boards/arc/em_starterkit/
+
+BOARDS/ARC - QUARK SE C1000 SS Devboard
+M:      Anas Nashif <anas.nashif@intel.com>
+S:	Supported
+F:	boards/arc/quark_se_c1000_ss_devboard/
+
+BOARDS/ARM - 96Boards CARBON
+M:	Amit Kucheria <amit.kucheria@linaro.org>
+M:	Ricardo Salveti <ricardo.salveti@linaro.org>
+S:	Supported
+F:	boards/arm/96b_carbon/
+
+BOARDS/ARM - 96Boards NITROGEN
+M:	Amit Kucheria <amit.kucheria@linaro.org>
+S:	Supported
+F:	boards/arm/96b_nitrogen/
+
+BOARDS/ARM - ARDUINO 101 BLE
+M:	Johan Hedberg <johan.hedberg@intel.com>
+S:	Supported
+F:	boards/arm/arduino_101_ble/
+
+BOARDS/ARM - CC3200 LAUNCHXL
+M:      Gil Pitney <gil.pitney@linaro.org>
+S:      Supported
+F:      boards/arm/cc3200_launchxl/
+
+BOARDS/ARM - NXP FRDM-K64F
+M:	Maureen Helm <maureen.helm@nxp.com>
+S:	Supported
+F:	boards/arm/frdm_k64f/
+
+BOARDS/ARM - NXP FRDM-KW41Z
+M:	Maureen Helm <maureen.helm@nxp.com>
+S:	Supported
+F:	boards/arm/frdm_kw41z/
+
+BOARDS/ARM - NXP Hexiwear
+M:	Maureen Helm <maureen.helm@nxp.com>
+S:	Supported
+F:	boards/arm/hexiwear_k64/
+
+BOARDS/ARM - NORDIC NRF51 REDBEAR BLENANO
+M:	Ricardo Salveti <ricardo.salveti@linaro.org>
+S:	Supported
+F:	boards/arm/nrf51_blenano/
+
+BOARDS/ARM - NORDIC NRF52 PCA10040
+M:	Carles Cufi <carles.cufi@nordicsemi.no>
+S:	Supported
+F:	boards/arm/nrf52_pca10040/
+
+BOARDS/ARM - NUCLEO-64 F401RE Devboard
+M:	Amit Kucheria <amit.kucheria@linaro.org>
+M:	Ricardo Salveti <ricardo.salveti@linaro.org>
+S:	Supported
+F:	boards/arm/nucleo_f401re/
+
+BOARDS/ARM - ARM LTD V2M Beetle
+M:	Vincenzo Frascino <vincenzo.frascino@linaro.org>
+S:	Supported
+F:	boards/arm/v2m_beetle/
+
+BOARDS/NIOS2 - ALTERA MAX10
+M:	Andrew Boie <andrew.p.boie@intel.com>
+S:	Supported
+F:	boards/nios2/altera_max10/
+
+BOARDS/X86 - ARDUINO 101
+M:      Anas Nashif <anas.nashif@intel.com>
+S:	Supported
+F:	boards/x86/arduino_101/
+
+BOARDS/X86 - Galileo
+M:      Anas Nashif <anas.nashif@intel.com>
+S:	Supported
+F:	boards/x86/galileo/
+
+BOARDS/X86 - QUARK D2000 Devboard
+M:      Anas Nashif <anas.nashif@intel.com>
+S:	Supported
+F:	boards/x86/quark_d2000/
+
+BOARDS/X86 - QUARK SE C1000 Devboard
+M:      Anas Nashif <anas.nashif@intel.com>
+S:	Supported
+F:	boards/x86/quark_se_c1000/
+
+BLUETOOTH
+M:	Johan Hedberg <johan.hedberg@intel.com>
+M:	Luiz Augusto von Dentz <luiz.dentz@gmail.com>
+M:	Szymon Janc <szymon.janc@gmail.com>
+S:	Supported
+W:	https://www.zephyrproject.org/doc/subsystems/bluetooth/bluetooth.html
+F:	subsys/bluetooth/
+F:	include/bluetooth/
+F:	include/drivers/bluetooth/
+F:	drivers/bluetooth/
+F:	samples/bluetooth/
+F:	tests/bluetooth/
+F:	doc/subsystems/bluetooth/
+
+BLUETOOTH CONTROLLER
+M:	Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
+M:	Carles Cufi <carles.cufi@nordicsemi.no>
+S:	Supported
+F:	subsys/bluetooth/controller/
+
+CC3200 SDK
+M:      Gil Pitney <gil.pitney@linaro.org>
+S:      Supported
+F:      ext/hal/cc3200sdk/
+
+CC32XX SOC - TI SIMPLELINK
+M:      Gil Pitney <gil.pitney@linaro.org>
+S:      Supported
+F:      arch/arm/soc/ti_simplelink/
+
+DOCUMENTATION
+M:	Kinder, David <david.b.kinder@intel.com>
+M:	Perez-Gonzalez, Inaky <inaky.perez-gonzalez@intel.com>
+S:	Supported
+F:	doc/
+F:	*.rst
+F:	*/*.rst
+F:	*/*/*.rst
+F:	*/*/*/*.rst
+F:	*/*/*/*/*.rst
+F:	*/*/*/*/*/*.rst
+F:	*/*/*/*/*/*/*.rst
+F:	*/*/*/*/*/*/*/*.rst
+F:	*/*/*/*/*/*/*/*/*.rst
+
+FILE SYSTEM
+M:	Ramesh Thomas <ramesh.thomas@intel.com>
+M:	Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
+S:	Supported
+F:	ext/fs/
+F:	subsys/fs/
+F:	include/fs/
+F:	include/fs.h
+F:	samples/fs/
+
+FLASH DRIVER
+M:	Baohong Liu <baohong.liu@intel.com>
+M:	Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
+S:	Supported
+F:	drivers/flash/
+
+INTERRUPTS
+M:	Andrew Boie <andrew.p.boie@intel.com>
+S:	Supported
+F:	drivers/interrupt_controller/
+F:	arch/arc/core/
+F:	arch/arm/core/
+F:	arch/nios2/core/
+F:	arch/x86/core/
+F:	include/irq.h
+F:	include/arch/x86/arch.h
+F:	include/arch/arm/cortex_m/irq.h
+F:	include/arch/nios2/arch.h
+F:	include/arch/arc/arch.h
+F:	include/arch/arc/v2/irq.h
+F:	include/drivers/loapic.h
+F:	include/drivers/ioapic.h
+F:	include/drivers/mvic.h
+
+KERNEL CORE
+M:	Benjamin Walsh <benjamin.walsh@windriver.com>
+M:	Andrew Boie <andrew.p.boie@intel.com>
+M:	Andy Ross <andrew.j.ross@intel.com>
+S:	Supported
+F:	kernel/
+F:	include/nanokernel.h
+F:	include/microkernel.h
+F:	include/misc/
+F:	include/toolchain/
+F:	include/atomic.h
+F:	include/cache.h
+F:	include/init.h
+F:	include/irq.h
+F:	include/irq_offload.h
+F:	include/kernel_version.h
+F:	include/linker-defs.h
+F:	include/linker-tool-gcc.h
+F:	include/linker-tool.h
+F:	include/section_tags.h
+F:	include/sections.h
+F:	include/shared_irq.h
+F:	include/sw_isr_table.h
+F:	include/sys_clock.h
+F:	include/sys_io.h
+F:	include/toolchain.h
+F:	include/zephyr.h
+F:	include/kernel.h
+F:	include/legacy.h
+F:	tests/kernel/
+
+KNOWN ISSUES
+M:	Anas Nashif <anas.nashif@intel.com>
+M:	Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
+M:	Genaro Saucedo <genaro.saucedo.tejada@intel.com>
+F:	.known-issues/
+
+
+MAINTAINERS
+M:	Genaro Saucedo <genaro.saucedo.tejada@intel.com>
+M:	Anas Nashif <anas.nashif@intel.com>
+M:	Perez-Gonzalez, Inaky <inaky.perez-gonzalez@intel.com>
+S:	Supported
+F:	MAINTAINERS
+
+MBEDTLS
+M:	Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
+M:	Jithu Joseph <jithu.joseph@intel.com>
+M:	Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
+S:	Supported
+F:	ext/lib/crypto/mbedtls/
+F:	samples/net/mbedtls_sslclient/
+F:	tests/crypto/test_mbedtls/
+
+MCUXPRESSO SOFTWARE DEVELOPMENT KIT (MCUX)
+M:	Maureen Helm <maureen.helm@nxp.com>
+S:	Supported
+F:	ext/hal/nxp/mcux/
+
+MPS2 - ARM LTD CORTEX-M PROTOTYPING SYSTEM
+M:	Vincenzo Frascino <vincenzo.frascino@linaro.org>
+S:	Supported
+F:	arch/arm/soc/arm/mps2/
+F:	boards/arm/mps2/
+
+NETWORKING
+M:	Jukka Rissanen <jukka.rissanen@linux.intel.com>
+M:	Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
+S:	Supported
+W:	https://www.zephyrproject.org/doc/subsystems/networking/networking.html
+F:	subsys/net/ip/
+F:	subsys/net/lib/
+F:	include/net/
+F:	samples/net/
+F:	tests/net/
+F:	tests/net/lib/
+F:	drivers/ethernet/
+F:	drivers/ieee802154/
+F:	drivers/slip/
+
+NETWORK APPLICATIONS
+M:	Flavio Santes <flavio.santes@intel.com>
+S:	Supported
+F:	subsys/net/lib/dns/
+F:	subsys/net/lib/http/
+F:	subsys/net/lib/mqtt/
+F:	samples/net/dns_client/
+F:	samples/net/http_server/
+F:	samples/net/mqtt_publisher/
+F:	tests/net/lib/http_header_fields/
+F:	tests/net/lib/mqtt_packet/
+
+NETWORK BUFFERS
+M:	Johan Hedberg <johan.hedberg@intel.com>
+M:	Jukka Rissanen <jukka.rissanen@linux.intel.com>
+M:	Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
+S:	Supported
+W:	https://www.zephyrproject.org/doc/subsystems/networking/buffers.html
+F:	subsys/net/buf.c
+F:	include/net/buf.h
+F:	tests/net/buf/
+
+NIOS II
+M:	Andrew Boie <andrew.p.boie@intel.com>
+S:	Supported
+F:	arch/nios2/
+F:	include/arch/nios2/
+F:	drivers/serial/uart_altera_jtag.c
+F:	drivers/timer/altera_avalon_timer.c
+F:	tests/kernel/test_intmath/
+F:	boards/nios2/
+
+NORDIC MDK
+M:	Carles Cufi <carles.cufi@nordicsemi.no>
+S:	Supported
+F:	ext/hal/nordic/mdk/
+
+POWER MANAGEMENT
+M:	Ramesh Thomas <ramesh.thomas@intel.com>
+M:	Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
+S:	Supported
+F:	arch/x86/core/crt0.S
+F:	include/device.h
+F:	include/init.h
+F:	include/power.h
+F:	kernel/k_idle.c
+F:	kernel/device.c
+F:	samples/power/
+
+QMSI
+M:	Anas Nashif <anas.nashif@intel.com>
+S:	Supported
+F:	ext/hal/qmsi/
+
+QMSI DRIVERS
+M:	Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
+M:	Baohong Liu <baohong.liu@intel.com>
+M:	Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
+S:	Supported
+F:	drivers/*/*qmsi*
+F:	drivers/*/*/*qmsi*
+
+QUARK D2000 SOC
+M:      Anas Nashif <anas.nashif@intel.com>
+S:	Supported
+F:	arch/x86/soc/intel_quark/quark_d2000/
+
+QUARK SE C1000 SOC
+M:      Anas Nashif <anas.nashif@intel.com>
+S:	Supported
+F:	arch/x86/soc/intel_quark/quark_se_c1000/
+
+QUARK X1000 SOC
+M:      Anas Nashif <anas.nashif@intel.com>
+S:	Supported
+F:	arch/x86/soc/intel_quark/quark_x1000/
+
+SANITYCHECK
+M:	Andrew Boie <andrew.p.boie@intel.com>
+S:	Supported
+F:	scripts/sanitycheck
+F:	scripts/expr_parser.py
+F:	scripts/sanity_chk/
+
+SENSOR DRIVERS
+M:	Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
+M:	Murtaza Alexandru <murtaza.alexandru1995@gmail.com>
+S:	Supported
+W:	https://www.zephyrproject.org/doc/subsystems/sensor.html
+F:	include/sensor.h
+F:	drivers/sensor/
+F:	samples/sensor/
+
+STM32CUBE SDK
+M:	Erwan Gouriou <erwan.gouriou@linaro.org>
+S:	Supported
+F:	ext/hal/st/stm32cube/
+
+STM32F4X SoC FAMILY and DRIVERS
+M:	Amit Kucheria <amit.kucheria@linaro.org>
+M:	Ricardo Salveti <ricardo.salveti@linaro.org>
+S:	Supported
+F:	arch/arm/soc/st_stm32/stm32f4/
+F:	drivers/pinmux/stm32/
+F:	drivers/gpio/*stm32*
+F:	drivers/clock_control/*stm32f4*
+
+TINYCRYPT
+M:	Constanza Heath <constanza.m.heath@intel.com>
+M:	Flavio Santes <flavio.santes@intel.com>
+S:	Supported
+F:	ext/lib/crypto/tinycrypt/
+F:	tests/crypto/
+
+SPI
+M:	Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
+S:	Supported
+F:	drivers/spi/
+F:	include/spi.h
+F:	tests/drivers/spi_test/
+
+USB
+M:	Jithu Joseph <jithu.joseph@intel.com>
+S:	Supported
+F:	subsys/usb
+F:	drivers/usb
+F:	samples/usb
+
+X86 ARCH
+M:	Benjamin Walsh <benjamin.walsh@windriver.com>
+M:	Andrew Boie <andrew.p.boie@intel.com>
+S:	Supported
+F:	arch/x86/
+F:	include/arch/x86/
+F:	boards/x86/
+
+XTENSA ARCH
+M:	Andrew Boie <andrew.p.boie@intel.com>
+S:	Supported
+F:	arch/xtensa
+F:	include/arch/xtensa/
+F:	boards/xtensa/
+
+RISCV32 ARCH
+M:	Jean-Paul Etienne <fractalclone@gmail.com>
+S:	Supported
+F:	arch/riscv32
+F:	include/arch/riscv32
+F:	boards/riscv32
+F:	drivers/serial/uart_riscv_qemu.c
+F:	drivers/timer/pulpino_timer.c
+F:	drivers/timer/riscv_machine_timer.c
+F:	drivers/gpio/gpio_pulpino.c
+
+ZOAP
+M:	Vinicius Costa Gomes <vinicius.gomes@intel.com>
+S:	Supported
+F:	subsys/net/lib/zoap/
+F:	samples/net/zoap_client/
+F:	samples/net/zoap_server/
+F:	tests/net/lib/zoap/
+
+THE REST
+M:	Anas Nashif <anas.nashif@intel.com>
+M:	Kumar Gala <kumar.gala@linaro.org>
+L:	devel@lists.zephyrproject.com
+T:	git https://gerrit.zephyrproject.org/r/a/zephyr
+S:	Buried alive in reporters
+F:	*
+F:	*/

Makefile.inc

@@ -0,0 +1,146 @@
+# vim: filetype=make
+#
+
+UNAME := $(shell uname)
+ifeq (MINGW, $(findstring MINGW, $(UNAME)))
+DQUOTE = '
+# '
+PROJECT_BASE ?= $(shell sh -c "pwd -W")
+else
+DQUOTE = "
+# "
+PROJECT_BASE ?= $(CURDIR)
+endif
+
+ifdef BOARD
+KBUILD_DEFCONFIG_PATH=$(wildcard $(ZEPHYR_BASE)/boards/*/*/$(BOARD)_defconfig)
+ifeq ($(KBUILD_DEFCONFIG_PATH),)
+$(error Board $(BOARD) not found!)
+endif
+else
+$(error BOARD is not defined!)
+endif
+
+# Choose a default output directory if one wasn't supplied.  Note that
+# PRISTINE_O depends on whether this is default or not.  If building
+# in-tree, we want to remove the whole outdir and not just the BOARD
+# specified (thus "pristine").  Out of tree, we can obviously remove
+# only what we were told to build.
+ifndef O
+PRISTINE_O = outdir
+O = $(PROJECT_BASE)/outdir/$(BOARD)
+else
+PRISTINE_O = $(O)
+endif
+
+# Turn O into an absolute path; we call the main Kbuild with $(MAKE) -C
+# which changes the working directory, relative paths don't work right.
+# Need to create the directory first to make realpath happy
+
+ifneq ($(MAKECMDGOALS),help)
+$(shell mkdir -p $(O))
+override O := $(realpath $(O))
+endif
+
+export ARCH MDEF_FILE QEMU_EXTRA_FLAGS PROJECT_BASE
+
+override CONF_FILE := $(strip $(subst $(DQUOTE),,$(CONF_FILE)))
+
+SOURCE_DIR ?= $(PROJECT_BASE)/src/
+override SOURCE_DIR := $(realpath $(SOURCE_DIR))
+override SOURCE_DIR := $(subst \,/,$(SOURCE_DIR))
+override SOURCE_DIR_PARENT := $(patsubst %, %/.., $(SOURCE_DIR))
+override SOURCE_DIR_PARENT := $(abspath $(SOURCE_DIR_PARENT))
+override SOURCE_DIR_PARENT := $(subst \,/,$(SOURCE_DIR_PARENT))
+export SOURCE_DIR SOURCE_DIR_PARENT
+
+ifeq ("$(origin V)", "command line")
+  KBUILD_VERBOSE = $(V)
+endif
+ifndef KBUILD_VERBOSE
+  KBUILD_VERBOSE = 0
+endif
+
+ifeq ($(KBUILD_VERBOSE),1)
+  Q =
+  S =
+else
+  Q = @
+  S = -s
+endif
+
+export CFLAGS
+
+zephyrmake	= +$(MAKE) -C $(ZEPHYR_BASE)  O=$(1) \
+			PROJECT=$(PROJECT_BASE) SOURCE_DIR=$(DQUOTE)$(SOURCE_DIR)$(DQUOTE) $(2)
+
+BOARDCONFIG = $(O)/.board_$(BOARD)
+
+DOTCONFIG = $(O)/.config
+
+all: $(DOTCONFIG)
+	$(Q)$(call zephyrmake,$(O),$@)
+
+debug:	$(DOTCONFIG)
+	$(Q)$(call zephyrmake,$(O),$@)
+
+flash: $(DOTCONFIG)
+	$(Q)$(call zephyrmake,$(O),$@)
+
+qemugdb: debugserver
+
+qemu: $(DOTCONFIG)
+	@echo This target is deprecated, use 'make run' instead
+	$(Q)$(call zephyrmake,$(O),$@)
+
+run: $(DOTCONFIG)
+	$(Q)$(call zephyrmake,$(O),$@)
+
+ifeq ($(MAKECMDGOALS),debugserver)
+ARCH = $(notdir $(subst /$(BOARD),,$(wildcard $(ZEPHYR_BASE)/boards/*/$(BOARD))))
+-include $(ZEPHYR_BASE)/boards/$(ARCH)/$(BOARD)/Makefile.board
+-include $(ZEPHYR_BASE)/scripts/Makefile.toolchain.$(ZEPHYR_GCC_VARIANT)
+BOARD_NAME = $(BOARD)
+export BOARD_NAME
+endif
+
+debugserver: FORCE
+	$(Q)$(CONFIG_SHELL) $(ZEPHYR_BASE)/scripts/support/$(DEBUG_SCRIPT) debugserver
+
+initconfig outputexports: $(DOTCONFIG)
+
+$(BOARDCONFIG):
+	@rm -f $(O)/.board_*
+	@touch $@
+
+ram_report: initconfig
+	$(Q)$(call zephyrmake,$(O),$@)
+
+rom_report: initconfig
+	$(Q)$(call zephyrmake,$(O),$@)
+
+menuconfig: initconfig
+	$(Q)$(call zephyrmake,$(O),$@)
+
+help:
+	$(Q)$(MAKE) -s -C $(ZEPHYR_BASE) $@
+
+# Catch all
+%:
+	$(Q)$(call zephyrmake,$(O),$@)
+
+OVERLAY_CONFIG += $(ZEPHYR_BASE)/kernel/configs/kernel.config
+
+$(DOTCONFIG): $(BOARDCONFIG) $(KBUILD_DEFCONFIG_PATH) $(CONF_FILE)
+	$(Q)$(CONFIG_SHELL) $(ZEPHYR_BASE)/scripts/kconfig/merge_config.sh \
+		-q -m -O $(O) $(KBUILD_DEFCONFIG_PATH) $(OVERLAY_CONFIG) $(CONF_FILE) \
+			      $(wildcard $(O)/*.conf)
+	$(Q)$(MAKE) $(S) -C $(ZEPHYR_BASE) O=$(O) PROJECT=$(PROJECT_BASE) oldnoconfig
+
+pristine:
+	$(Q)rm -rf $(PRISTINE_O)
+
+PHONY += FORCE initconfig
+FORCE:
+
+.PHONY: $(PHONY)

Makefile.test

@@ -0,0 +1,4 @@
+
+OVERLAY_CONFIG += $(ZEPHYR_BASE)/tests/include/test.config
+
+include ${ZEPHYR_BASE}/Makefile.inc

README.rst

@@ -1,133 +0,0 @@
-
-.. raw:: html
-
-   <a href="https://www.zephyrproject.org">
-     <p align="center">
-       <img src="doc/images/Zephyr-Project.png">
-     </p>
-   </a>
-
-   <a href="https://bestpractices.coreinfrastructure.org/projects/74"><img
-   src="https://bestpractices.coreinfrastructure.org/projects/74/badge"></a>
-   <img
-   src="https://api.shippable.com/projects/58ffb2b8baa5e307002e1d79/badge?branch=master">
-
-
-The Zephyr Project is a scalable real-time operating system (RTOS) supporting
-multiple hardware architectures, optimized for resource constrained devices,
-and built with security in mind.
-
-The Zephyr OS is based on a small-footprint kernel designed for use on
-resource-constrained systems: from simple embedded environmental sensors and
-LED wearables to sophisticated smart watches and IoT wireless gateways.
-
-The Zephyr kernel supports multiple architectures, including ARM Cortex-M,
-Intel x86, ARC, Nios II, Tensilica Xtensa, and RISC-V, and a large number of
-`supported boards`_.
-
-.. below included in doc/introduction/introduction.rst
-
-.. start_include_here
-
-Getting Started
-***************
-
-To start developing Zephyr applications refer to the `Getting Started Guide`_
-in the `Zephyr Documentation`_ pages.
-A brief introduction to Zephyr can be found in the  `Zephyr Introduction`_
-page.
-
-Community Support
-*****************
-
-The Zephyr Project Developer Community includes developers from member
-organizations and the general community all joining in the development of
-software within the Zephyr Project. Members contribute and discuss ideas,
-submit bugs and bug fixes, and provide training. They also help those in need
-through the community's forums such as mailing lists and IRC channels. Anyone
-can join the developer community and the community is always willing to help
-its members and the User Community to get the most out of the Zephyr Project.
-
-Welcome to the Zephyr community!
-
-Resources
-*********
-
-Here's a quick summary of resources to find your way around the Zephyr Project
-support systems:
-
-* **Zephyr Project Website**: The https://zephyrproject.org website is the
-  central source of information about the Zephyr Project. On this site, you'll
-  find background and current information about the project as well as all the
-  relevant links to project material.
-
-* **Releases**: Source code for Zephyr kernel releases are available at
-  https://zephyrproject.org/developers/#downloads. On this page,
-  you'll find release information, and links to download or clone source
-  code from our GitHub repository.  You'll also find links for the Zephyr
-  SDK, a moderated collection of tools and libraries used to develop your
-  applications.
-
-* **Source Code in GitHub**: Zephyr Project source code is maintained on a
-  public GitHub repository at https://github.com/zephyrproject-rtos/zephyr.
-  You'll find information about getting access to the repository and how to
-  contribute to the project in this `Contribution Guide`_ document.
-
-* **Samples Code**: In addition to the kernel source code, there are also
-  many documented `Sample and Demo Code Examples`_ that can help show you
-  how to use Zephyr services and subsystems.
-
-* **Documentation**: Extensive Project technical documentation is developed
-  along with the Zephyr kernel itself, and can be found at
-  http://docs.zephyrproject.org.  Additional documentation is maintained in
-  the `Zephyr GitHub wiki`_.
-
-* **Cross-reference**: Source code cross-reference for the Zephyr
-  kernel and samples code is available at
-  https://elixir.bootlin.com/zephyr/latest/source.
-
-* **Issue Reporting and Tracking**: Requirements and Issue tracking is done in
-  the Github issues system: https://github.com/zephyrproject-rtos/zephyr/issues.
-  You can browse through the reported issues and submit issues of your own.
-
-* **Security-related Issue Reporting and Tracking**: For security-related
-  inquiries or reporting suspected security-related bugs in the Zephyr OS,
-  please send email to vulnerabilities@zephyrproject.org.  We will assess and
-  fix flaws according to our security policy outlined in the Zephyr Project
-  `Security Overview`_.
-
-  Security related issue tracking is done in JIRA.  The location of this JIRA
-  is https://zephyrprojectsec.atlassian.net.
-
-* **Mailing List**: The `Zephyr Development mailing list`_ is perhaps the most convenient
-  way to track developer discussions and to ask your own support questions to
-  the Zephyr project community.  There are also specific `Zephyr mailing list
-  subgroups`_ for announcements, builds, marketing, and Technical
-  Steering Committee notes, for example.
-  You can read through the message archives to follow
-  past posts and discussions, a good thing to do to discover more about the
-  Zephyr project.
-
-* **Chatting**: You can chat online with the Zephyr project developer
-  community and other users in two ways:
-
-  * On `Slack`_: Zephyr has dedicated channels on Slack. To register, use the
-    following `Slack Invite`_.
-
-  * IRC channel #zephyrproject on the freenode.net IRC server. You can use the
-    http://webchat.freenode.net web client or use a client-side application such
-    as pidgin (Note that all discussions have moved to Slack, although we still
-    have many developers still available on the IRC channel).
-
-.. _Slack Invite: https://tinyurl.com/yarkuemx
-.. _Slack: https://zephyrproject.slack.com
-.. _supported boards: http://docs.zephyrproject.org/latest/boards
-.. _Zephyr Documentation: http://docs.zephyrproject.org
-.. _Zephyr Introduction: http://docs.zephyrproject.org/latest/introduction/index.html
-.. _Getting Started Guide: http://docs.zephyrproject.org/latest/getting_started/index.html
-.. _Contribution Guide: http://docs.zephyrproject.org/latest/contribute/index.html
-.. _Zephyr GitHub wiki: https://github.com/zephyrproject-rtos/zephyr/wiki
-.. _Zephyr Development mailing list: https://lists.zephyrproject.org/g/devel
-.. _Zephyr mailing list subgroups: https://lists.zephyrproject.org/g/main/subgroups
-.. _Sample and Demo Code Examples: http://docs.zephyrproject.org/latest/samples/index.html
-.. _Security Overview: http://docs.zephyrproject.org/latest/security/index.html

VERSION

@@ -1,5 +0,0 @@
-VERSION_MAJOR = 1
-VERSION_MINOR = 14
-PATCHLEVEL = 0
-VERSION_TWEAK = 0
-EXTRAVERSION =

arch/CMakeLists.txt

@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0
-
-add_definitions(-D__ZEPHYR_SUPERVISOR__)
-
-add_subdirectory(common)
-add_subdirectory(${ARCH_DIR}/${ARCH} arch/${ARCH})

arch/Kconfig

@@ -8,11 +8,6 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
-# Include these first so that any properties (e.g. defaults) below can be
-# overriden (by defining symbols in multiple locations)
-
-# Note: $ARCH might be a glob pattern
-source "$(ARCH_DIR)/$(ARCH)/Kconfig"
 
 choice
 	prompt "Architecture"
@@ -20,447 +15,64 @@ choice
 
 config ARC
 	bool "ARC architecture"
-	select HAS_DTS
 
 config ARM
 	bool "ARM architecture"
-	select ARCH_HAS_THREAD_ABORT
-	select HAS_DTS
 
 config X86
 	bool "x86 architecture"
 	select ATOMIC_OPERATIONS_BUILTIN
-	select HAS_DTS
-
-config X86_64
-	bool "x86_64 architecture"
-	select ATOMIC_OPERATIONS_BUILTIN
-	select SCHED_IPI_SUPPORTED
 
 config NIOS2
 	bool "Nios II Gen 2 architecture"
 	select ATOMIC_OPERATIONS_C
-	select HAS_DTS
 
 config RISCV32
 	bool "RISCV32 architecture"
-	select HAS_DTS
 
 config XTENSA
 	bool "Xtensa architecture"
-	select HAS_DTS
-
-config ARCH_POSIX
-	bool "POSIX (native) architecture"
-	select ATOMIC_OPERATIONS_BUILTIN
-	select ARCH_HAS_CUSTOM_SWAP_TO_MAIN
-	select ARCH_HAS_CUSTOM_BUSY_WAIT
-	select ARCH_HAS_THREAD_ABORT
-	select NATIVE_APPLICATION
-	select HAS_COVERAGE_SUPPORT
 
 endchoice
 
-
-menu "General Architecture Options"
-
-module = ARCH
-module-str = arch
-source "subsys/logging/Kconfig.template.log_config"
-
-module = MPU
-module-str = mpu
-source "subsys/logging/Kconfig.template.log_config"
-
-config BIG_ENDIAN
-       bool
-       help
-         This option tells the build system that the target system is
-         big-endian.  Little-endian architecture is the default and
-         should leave this option unselected.  This option is selected
-         by arch/$ARCH/Kconfig, soc/**/Kconfig, or boards/**/Kconfig
-         and the user should generally avoid modifying it.  The option
-         is used to select linker script OUTPUT_FORMAT and command
-         line option for gen_isr_tables.py.
-
-if ARC || ARM || NIOS2 || X86
-
-config SRAM_SIZE
-	int "SRAM Size in kB"
-	default $(dt_int_val,DT_SRAM_SIZE)
-	help
-	  This option specifies the size of the SRAM in kB.  It is normally set by
-	  the board's defconfig file and the user should generally avoid modifying
-	  it via the menu configuration.
-
-config SRAM_BASE_ADDRESS
-	hex "SRAM Base Address"
-	default $(dt_hex_val,DT_SRAM_BASE_ADDRESS)
-	help
-	  This option specifies the base address of the SRAM on the board.  It is
-	  normally set by the board's defconfig file and the user should generally
-	  avoid modifying it via the menu configuration.
-
-config FLASH_SIZE
-	int "Flash Size in kB"
-	default $(dt_int_val,DT_FLASH_SIZE) if (XIP && ARM) || !ARM
-	help
-	  This option specifies the size of the flash in kB.  It is normally set by
-	  the board's defconfig file and the user should generally avoid modifying
-	  it via the menu configuration.
-
-config FLASH_BASE_ADDRESS
-	hex "Flash Base Address"
-	default $(dt_hex_val,DT_FLASH_BASE_ADDRESS) if (XIP && ARM) || !ARM
-	help
-	  This option specifies the base address of the flash on the board. It is
-	  normally set by the board's defconfig file and the user should generally
-	  avoid modifying it via the menu configuration.
-
-endif # ARM || ARC || NIOS2 || X86
-
-if ARCH_HAS_TRUSTED_EXECUTION
-
-config TRUSTED_EXECUTION_SECURE
-	bool "Trusted Execution: Secure firmware image"
-	help
-	  Select this option to enable building a Secure firmware
-	  image for a platform that supports Trusted Execution. A
-	  Secure firmware image will execute in Secure state. It may
-	  allow the CPU to execute in Non-Secure (Normal) state.
-	  Therefore, a Secure firmware image shall be able to
-	  configure security attributions of CPU resources (memory
-	  areas, peripherals, interrupts, etc.) as well as to handle
-	  faults, related to security violations. It may optionally
-	  allow certain functions to be called from the Non-Secure
-	  (Normal) domain.
-
-config TRUSTED_EXECUTION_NONSECURE
-	depends on !TRUSTED_EXECUTION_SECURE
-	bool "Trusted Execution: Non-Secure firmware image"
-	help
-	  Select this option to enable building a Non-Secure
-	  firmware image for a platform that supports Trusted
-	  Execution. A Non-Secure firmware image will execute
-	  in Non-Secure (Normal) state. Therefore, it shall not
-	  access CPU resources (memory areas, peripherals,
-	  interrupts etc.) belonging to the Secure domain.
-
-endif # ARCH_HAS_TRUSTED_EXECUTION
-
-config HW_STACK_PROTECTION
-	bool "Hardware Stack Protection"
-	depends on ARCH_HAS_STACK_PROTECTION
-	help
-	  Select this option to enable hardware-based platform features to
-	  catch stack overflows when the system is running in privileged
-	  mode. If CONFIG_USERSPACE is not enabled, the system is always
-	  running in privileged mode.
-
-	  Note that this does not necessarily prevent corruption and assertions
-	  about the overall system state when a fault is triggered cannot be
-	  made.
-
-config USERSPACE
-	bool "User mode threads"
-	depends on ARCH_HAS_USERSPACE
-	help
-	  When enabled, threads may be created or dropped down to user mode,
-	  which has significantly restricted permissions and must interact
-	  with the kernel via system calls. See Zephyr documentation for more
-	  details	about this feature.
-
-	  If a user thread overflows its stack, this will be caught and the
-	  kernel itself will be shielded from harm. Enabling this option
-	  may or may not catch stack overflows when the system is in
-	  privileged mode or handling a system call; to ensure these are always
-	  caught, enable CONFIG_HW_STACK_PROTECTION.
-
-config PRIVILEGED_STACK_SIZE
-	int "Size of privileged stack"
-	default 1024
-	depends on ARCH_HAS_USERSPACE
-	help
-	  This option sets the privileged stack region size that will be used
-	  in addition to the user mode thread stack.  During normal execution,
-	  this region will be inaccessible from user mode.  During system calls,
-	  this region will be utilized by the system call.
-
-config PRIVILEGED_STACK_TEXT_AREA
-	int "Privileged stacks text area"
-	default 512 if COVERAGE_GCOV
-	default 256
-	depends on ARCH_HAS_USERSPACE
-	help
-	  Stack text area size for privileged stacks.
-
-config KOBJECT_TEXT_AREA
-	int "Size if kobject text area"
-	default 512 if COVERAGE_GCOV
-	default 512 if NO_OPTIMIZATIONS
-	default 256
-	depends on ARCH_HAS_USERSPACE
-	help
-	  Size of kernel object text area. Used in linker script.
-
-config STACK_GROWS_UP
-	bool "Stack grows towards higher memory addresses"
-	help
-	  Select this option if the architecture has upward growing thread
-	  stacks. This is not common.
-
-config MAX_THREAD_BYTES
-	int "Bytes to use when tracking object thread permissions"
-	default 2
-	depends on USERSPACE
-	help
-	  Every kernel object will have an associated bitfield to store
-	  thread permissions for that object. This controls the size of the
-	  bitfield (in bytes) and imposes a limit on how many threads can
-	  be created in the system.
-
-config DYNAMIC_OBJECTS
-	bool "Allow kernel objects to be allocated at runtime"
-	depends on USERSPACE
-	help
-	Enabling this option allows for kernel objects to be requested from
-	the calling thread's resource pool, at a slight cost in performance
-	due to the supplemental run-time tables required to validate such
-	objects.
-
-	Objects allocated in this way can be freed with a supervisor-only
-	API call, or when the number of references to that object drops to
-	zero.
-
-config SIMPLE_FATAL_ERROR_HANDLER
-	bool "Simple system fatal error handler"
-	default y if !MULTITHREADING
-	help
-	  Provides an implementation of _SysFatalErrorHandler() that hard hangs
-	  instead of aborting the faulting thread, and does not print anything,
-	  for footprint-concerned systems. Only enable this option if you do not
-	  want debug capabilities in case of system fatal error.
-
-if ARCH_HAS_NOCACHE_MEMORY_SUPPORT
-
-config NOCACHE_MEMORY
-	bool "Support for uncached memory"
-	help
-	  Add a "nocache" read-write memory section that is configured to
-	  not be cached. This memory section can be used to perform DMA
-	  transfers when cache coherence issues are not optimal or can not
-	  be solved using cache maintenance operations.
-
-endif # ARCH_HAS_NOCACHE_MEMORY_SUPPORT
-
-menu "Interrupt Configuration"
-#
-# Interrupt related configs
-#
-config DYNAMIC_INTERRUPTS
-	bool "Enable installation of IRQs at runtime"
-	help
-	  Enable installation of interrupts at runtime, which will move some
-	  interrupt-related data structures to RAM instead of ROM, and
-	  on some architectures increase code size.
-
-config GEN_ISR_TABLES
-	bool "Use generated IRQ tables"
-	help
-	  This option controls whether a platform uses the gen_isr_tables
-	  script to generate its interrupt tables. This mechanism will create
-	  an appropriate hardware vector table and/or software IRQ table.
-
-config GEN_IRQ_VECTOR_TABLE
-	bool "Generate an interrupt vector table"
-	default y
-	depends on GEN_ISR_TABLES
-	help
-	  This option controls whether a platform using gen_isr_tables
-	  needs an interrupt vector table created. Only disable this if the
-	  platform does not use a vector table at all, or requires the vector
-	  table to be in a format that is not an array of function pointers
-	  indexed by IRQ line. In the latter case, the vector table must be
-	  supplied by the application or architecture code.
-
-config GEN_SW_ISR_TABLE
-	bool "Generate a software ISR table"
-	default y
-	depends on GEN_ISR_TABLES
-	help
-	  This option controls whether a platform using gen_isr_tables
-	  needs a software ISR table table created. This is an array of struct
-	  _isr_table_entry containing the interrupt service routine and supplied
-	  parameter.
-
-config GEN_IRQ_START_VECTOR
-	int
-	default 0
-	depends on GEN_ISR_TABLES
-	help
-	  On some architectures, part of the vector table may be reserved for
-	  system exceptions and is declared separately from the tables
-	  created by gen_isr_tables.py. When creating these tables, this value
-	  will be subtracted from CONFIG_NUM_IRQS to properly size them.
-	  This is a hidden option which needs to be set per architecture and
-	  left alone.
-
-
-config IRQ_OFFLOAD
-	bool "Enable IRQ offload"
-	help
-	  Enable irq_offload() API which allows functions to be synchronously
-	  run in interrupt context. Mainly useful for test cases.
-
-endmenu # Interrupt configuration
-
-endmenu
-
-#
-# Architecture Capabilities
-#
-config ARCH_HAS_TRUSTED_EXECUTION
-	bool
-
-config ARCH_HAS_STACK_PROTECTION
-	bool
-
-config ARCH_HAS_USERSPACE
-	bool
-
-config ARCH_HAS_EXECUTABLE_PAGE_BIT
-	bool
-
-config ARCH_HAS_NOCACHE_MEMORY_SUPPORT
-	bool
-
-config ARCH_HAS_RAMFUNC_SUPPORT
-	bool
-
-#
-# Other architecture related options
-#
-
-config ARCH_HAS_THREAD_ABORT
-	bool
-
 #
 # Hidden PM feature configs which are to be selected by
 # individual SoC.
 #
-config HAS_SYS_POWER_STATE_SLEEP_1
+config SYS_POWER_LOW_POWER_STATE_SUPPORTED
 	# Hidden
 	bool
+	default n
 	help
-	  This option signifies that the target supports the SYS_POWER_STATE_SLEEP_1
-	  configuration option.
+	This option signifies that the target supports the SYS_POWER_LOW_POWER_STATE
+	configuration option.
 
-config HAS_SYS_POWER_STATE_SLEEP_2
+config SYS_POWER_DEEP_SLEEP_SUPPORTED
 	# Hidden
 	bool
+	default n
 	help
-	  This option signifies that the target supports the SYS_POWER_STATE_SLEEP_2
-	  configuration option.
-
-config HAS_SYS_POWER_STATE_SLEEP_3
-	# Hidden
-	bool
-	help
-	  This option signifies that the target supports the SYS_POWER_STATE_SLEEP_3
-	  configuration option.
-
-config HAS_SYS_POWER_STATE_DEEP_SLEEP_1
-	# Hidden
-	bool
-	help
-	  This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_1
-	  configuration option.
-
-config HAS_SYS_POWER_STATE_DEEP_SLEEP_2
-	# Hidden
-	bool
-	help
-	  This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_2
-	  configuration option.
-
-config HAS_SYS_POWER_STATE_DEEP_SLEEP_3
-	# Hidden
-	bool
-	help
-	  This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_3
-	  configuration option.
+	This option signifies that the target supports the SYS_POWER_DEEP_SLEEP
+	configuration option.
 
 config BOOTLOADER_CONTEXT_RESTORE_SUPPORTED
 	# Hidden
 	bool
+	default n
 	help
-	  This option signifies that the target has options of bootloaders
-	  that support context restore upon resume from deep sleep
+	This option signifies that the target has options of bootloaders
+	that support context restore upon resume from deep sleep
 
-
-# End hidden CPU family configs
-#
-
-config CPU_HAS_TEE
+config SIMPLE_FATAL_ERROR_HANDLER
+	prompt "Simple system fatal error handler"
 	bool
+	default n
+	default y if !MULTITHREADING
 	help
-	  This option is enabled when the CPU has support for Trusted
-	  Execution Environment (e.g. when it has a security attribution
-	  unit).
-
-config CPU_HAS_FPU
-	bool
-	help
-	  This option is enabled when the CPU has hardware floating point
-	  unit.
-
-config CPU_HAS_MPU
-	bool
-	# Omit prompt to signify "hidden" option
-	help
-	  This option is enabled when the CPU has a Memory Protection Unit (MPU).
-
-config MEMORY_PROTECTION
-	bool
-	# Omit prompt to signify "hidden" option
-	help
-	  This option is enabled when Memory Protection features are supported.
-	  Memory protection support is currently available on ARC, ARM, and x86
-	  architectures.
-
-config MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT
-	bool
-	# Omit prompt to signify "hidden" option
-	help
-	  This option is enabled when the MPU requires a power of two alignment
-	  and size for MPU regions.
-
-config MPU_REQUIRES_NON_OVERLAPPING_REGIONS
-	bool
-	# Omit prompt to signify "hidden" option
-	help
-	  This option is enabled when the MPU requires the active (i.e. enabled)
-	  MPU regions to be non-overlapping with each other.
-
-menuconfig FLOAT
-	bool "Floating point"
-	depends on CPU_HAS_FPU
-	help
-	  This option allows threads to use the floating point registers.
-	  By default, only a single thread may use the registers.
-
-	  Disabling this option means that any thread that uses a
-	  floating point register will get a fatal exception.
-
-if FLOAT
-
-config FP_SHARING
-	bool "Floating point register sharing"
-	help
-	  This option allows multiple threads to use the floating point
-	  registers.
-
-endif # FLOAT
+	Provides an implementation of _SysFatalErrorHandler() that hard hangs
+	instead of aborting the faulting thread, and does not print anything,
+	for footprint-concerned systems. Only enable this option if you do not
+	want debug capabilities in case of system fatal error.
 
 #
 # End hidden PM feature configs
@@ -469,34 +81,88 @@ endif # FLOAT
 config ARCH
 	string
 	help
-	  System architecture string.
+	System architecture string.
 
 config SOC
 	string
 	help
-	  SoC name which can be found under soc/<arch>/<soc name>.
-	  This option holds the directory name used by the build system to locate
-	  the correct linker and header files for the SoC.
+	SoC name which can be found under arch/<arch>/soc/<soc name>.
+	This option holds the directory name used by the build system to locate
+	the correct linker and header files for the SoC. This option will go away
+	once all SoCs are using family/series structure.
 
 config SOC_SERIES
 	string
 	help
-	  SoC series name which can be found under soc/<arch>/<family>/<series>.
-	  This option holds the directory name used by the build system to locate
-	  the correct linker and header files.
+	SoC series name which can be found under arch/<arch>/soc/<family>/<series>.
+	This option holds the directory name used by the build system to locate
+	the correct linker and header files.
 
 config SOC_FAMILY
 	string
 	help
-	  SoC family name which can be found under soc/<arch>/<family>.
-	  This option holds the directory name used by the build system to locate
-	  the correct linker and header files.
+	SoC family name which can be found under arch/<arch>/soc/<family>.
+	This option holds the directory name used by the build system to locate
+	the correct linker and header files.
 
 config BOARD
 	string
 	help
-	  This option holds the name of the board and is used to locate the files
-	  related to the board in the source tree (under boards/).
-	  The Board is the first location where we search for a linker.ld file,
-	  if not found we look for the linker file in
-	  soc/<arch>/<family>/<series>
+	This option holds the name of the board and is used to located the files
+	related to the board in the source tree (under boards/).
+	The Board is the first location where we search for a linker.ld file,
+	if not found we look for the linker file in
+	arch/<arch>/soc/<family>/<series>
+
+#
+# Interrupt related configs
+#
+
+config GEN_ISR_TABLES
+	bool
+	prompt "Use generated IRQ tables"
+	default n
+	help
+	This option controls whether a platform uses the gen_isr_tables
+	script to generate its interrupt tables. This mechanism will create
+	an appropriate hardware vector table and/or software IRQ table.
+
+config GEN_IRQ_VECTOR_TABLE
+	bool
+	prompt "Generate an interrupt vector table"
+	default y
+	depends on GEN_ISR_TABLES
+	help
+	This option controls whether a platform using gen_isr_tables
+	needs an interrupt vector table created. Only disable this if the
+	platform does not use a vector table at all, or requires the vector
+	table to be in a format that is not an array of function pointers
+	indexed by IRQ line. In the latter case, the vector table must be
+	supplied by the application or architecture code.
+
+config GEN_SW_ISR_TABLE
+	bool
+	prompt "Generate a software ISR table"
+	default y
+	depends on GEN_ISR_TABLES
+	help
+	This option controls whether a platform using gen_isr_tables
+	needs a software ISR table table created. This is an array of struct
+	_isr_table_entry containing the interrupt service routine and supplied
+	parameter.
+
+config GEN_IRQ_START_VECTOR
+	int
+	default 0
+	depends on GEN_ISR_TABLES
+	help
+	On some architectures, part of the vector table may be reserved for
+	system exceptions and is declared separately from the tables
+	created by gen_isr_tables.py. When creating these tables, this value
+	will be subtracted from CONFIG_NUM_IRQS to properly size them.
+	This is a hidden option which needs to be set-per architecture and
+	left alone.
+
+source "arch/*/Kconfig"
+
+source "boards/Kconfig"

arch/Makefile

@@ -0,0 +1 @@
+obj-y += common/ $(ARCH)/

arch/arc/CMakeLists.txt

@@ -1,13 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0
-
-# Enable debug support in mdb
-# Dwarf version 2 can be recognized by mdb
-# The default dwarf version in gdb is not recognized by mdb
-zephyr_cc_option(-g3 -gdwarf-2)
-
-# Without this (poorly named) option, compiler may generate undefined
-# references to abort().
-# See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63691
-zephyr_cc_option(-fno-delete-null-pointer-checks)
-
-add_subdirectory(core)

arch/arc/Kbuild

@@ -0,0 +1,6 @@
+subdir-ccflags-y +=-I$(srctree)/include/drivers
+subdir-ccflags-y +=-I$(srctree)/drivers
+subdir-asflags-y += $(subdir-ccflags-y)
+
+obj-y += soc/$(SOC_PATH)/
+obj-y += core/

arch/arc/Kconfig

@@ -6,12 +6,24 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
+choice
+	prompt "ARC SoC Selection"
+	depends on ARC
+
+	source "arch/arc/soc/*/Kconfig.soc"
+endchoice
+
+
 menu "ARC Options"
 	depends on ARC
 
 config ARCH
 	default "arc"
 
+config ARCH_DEFCONFIG
+	string
+	default "arch/arc/defconfig"
+
 menu "ARC EM4 processor options"
 
 config	CPU_ARCEM4
@@ -20,7 +32,7 @@ config	CPU_ARCEM4
 	select CPU_ARCV2
 	select ATOMIC_OPERATIONS_C
 	help
-	  This option signifies the use of an ARC EM4 CPU
+	This option signifies the use of an ARC EM4 CPU
 
 endmenu
 
@@ -28,12 +40,21 @@ menu "ARCv2 Family Options"
 
 config	CPU_ARCV2
 	bool
-	select ARCH_HAS_STACK_PROTECTION if ARC_HAS_STACK_CHECKING || ARC_MPU
-	select ARCH_HAS_USERSPACE if ARC_MPU
 	default y
 	help
 	  This option signifies the use of a CPU of the ARCv2 family.
 
+config NSIM
+	prompt "Running on the MetaWare nSIM simulator"
+	bool
+	default n
+	help
+	  For running on nSIM simulator.
+
+	  a) Uses non-XIP to run in RAM.
+	  b) Linked at address 0x4000 with 0x4000 of RAM so that it works with
+	     a pc_size of 16 (default).
+
 config	DATA_ENDIANNESS_LITTLE
 	bool
 	default y
@@ -43,7 +64,8 @@ config	DATA_ENDIANNESS_LITTLE
 	  implemented as big endian.
 
 config	NUM_IRQ_PRIO_LEVELS
-	int "Number of supported interrupt priority levels"
+	int
+	prompt "Number of supported interrupt priority levels"
 	range 1 16
 	help
 	  Interrupt priorities available will be 0 to NUM_IRQ_PRIO_LEVELS-1.
@@ -52,7 +74,8 @@ config	NUM_IRQ_PRIO_LEVELS
 	  The BSP must provide a valid default for proper operation.
 
 config	NUM_IRQS
-	int "Upper limit of interrupt numbers/IDs used"
+	int
+	prompt "Upper limit of interrupt numbers/IDs used"
 	range 17 256
 	help
 	  Interrupts available will be 0 to NUM_IRQS-1.
@@ -63,74 +86,63 @@ config	NUM_IRQS
 	  vector table.
 
 config	RGF_NUM_BANKS
-	int "Number of General Purpose Register Banks"
+	int
+	prompt "Number of General Purpose Register Banks"
 	depends on CPU_ARCV2
 	range 1 2
 	default 2
 	help
-	  The ARC CPU can be configured to have more than one register
-	  bank. If fast interrupts are supported (FIRQ), the 2nd
-	  register bank, in the set, will be used by FIRQ interrupts.
-	  If fast interrupts are supported but there is only 1
-	  register bank, the fast interrupt handler must save
-	  and restore general purpose registers.
+	The ARC CPU can be configured to have more than one register
+	bank. If fast interrupts are supported (FIRQ), the 2nd
+	register bank, in the set, will be used by FIRQ interrupts.
+	If fast interrupts are supported but there is only 1
+	register bank, the fast interrupt handler must save
+	and restore general purpose regsiters.
 
-config ARC_FIRQ
-	bool "FIRQ enable"
-	default y
+config	FIRQ_STACK_SIZE
+	int
+	prompt "Size of stack for FIRQs (in bytes)"
+	depends on CPU_ARCV2
+	default 1024
 	help
-	  Fast interrupts are supported (FIRQ). If FIRQ enabled, for interrupts
-	  with highest priority, status32 and pc will be saved in aux regs,
-	  other regs will be saved according to the number of register bank;
-	  If FIRQ is disabled, the handle of interrupts with highest priority
-	  will be same with other interrupts.
+	  FIRQs and regular IRQs have different stacks so that a FIRQ can start
+	  running without doing stack switching in software.
 
-config 	ARC_HAS_STACK_CHECKING
-	bool "ARC has STACK_CHECKING"
-	default y
+config	ARC_STACK_CHECKING
+	bool "Enable Stack Checking"
+	depends on CPU_ARCV2
+	default n
 	help
-	  ARC is configured with STACK_CHECKING which is a mechanism for
-	  checking stack accesses and raising an exception when a stack
-	  overflow or underflow is detected.
-
-config  ARC_STACK_CHECKING
-	bool
-	help
-	  Use ARC STACK_CHECKING to do stack protection
-
-config	ARC_STACK_PROTECTION
-	bool
-	default y if HW_STACK_PROTECTION
-	select ARC_STACK_CHECKING if ARC_HAS_STACK_CHECKING
-	select MPU_STACK_GUARD if (!ARC_STACK_CHECKING && ARC_MPU)
-	select THREAD_STACK_INFO
-	help
-	  This option enables either:
-	  - The ARC stack checking, or
-	  - the MPU-based stack guard
-	  to cause a system fatal error
-	  if the bounds of the current process stack are overflowed.
-	  The two stack guard options are mutually exclusive. The
-	  selection of the ARC stack checking is
-	  prioritized over the MPU-based stack guard.
+	  ARCV2 has a special feature allowing to check stack overflows. This
+	  enables code that allows using this debug feature
 
 config	FAULT_DUMP
-	int "Fault dump level"
+	int
+	prompt "Fault dump level"
 	default 2
 	range 0 2
 	help
-	  Different levels for display information when a fault occurs.
+	Different levels for display information when a fault occurs.
 
-	  2: The default. Display specific and verbose information. Consumes
+	2: The default. Display specific and verbose information. Consumes
 		the most memory (long strings).
 
-	  1: Display general and short information. Consumes less memory
+	1: Display general and short information. Consumes less memory
 		(short strings).
 
-	  0: Off.
+	0: Off.
+
+config IRQ_OFFLOAD
+	bool "Enable IRQ offload"
+	default n
+	help
+	Enable irq_offload() API which allows functions to be synchronously
+	run in interrupt context. Uses one entry in the	IDT.  Mainly useful
+	for test cases.
 
 config	XIP
-	default y if !UART_NSIM
+	default n if NSIM
+	default y
 
 config GEN_ISR_TABLES
 	default y
@@ -139,64 +151,106 @@ config GEN_IRQ_START_VECTOR
 	default 16
 
 config HARVARD
-	bool "Harvard Architecture"
+	prompt "Harvard Architecture"
+	bool
+	default n
 	help
 	  The ARC CPU can be configured to have two busses;
 	  one for instruction fetching and another that serves as a data bus.
 
-config CODE_DENSITY
-	bool "Code Density Option"
+config ICCM_SIZE
+	int "ICCM Size in kB"
 	help
-	  Enable code density option to get better code density
+	This option specifies the size of the ICCM in kB.  It is normally set by
+	the board's defconfig file and the user should generally avoid modifying
+	it via the menu configuration.
 
-config ARC_HAS_SECURE
-	bool
-	#  a hidden option
+config ICCM_BASE_ADDRESS
+	hex "ICCM Base Address"
 	help
-	  This option is enabled when ARC core supports secure mode
+	This option specifies the base address of the ICCM on the board.  It is
+	normally set by the board's defconfig file and the user should generally
+	avoid modifying it via the menu configuration.
 
-menu "ARC MPU Options"
-depends on CPU_HAS_MPU
-
-config ARC_MPU_ENABLE
-	bool "Enable MPU"
-	select ARC_MPU
+config DCCM_SIZE
+	int "DCCM Size in kB"
 	help
-	  Enable MPU
+	This option specifies the size of the DCCM in kB.  It is normally set by
+	the board's defconfig file and the user should generally avoid modifying
+	it via the menu configuration.
 
-source "arch/arc/core/mpu/Kconfig"
+config DCCM_BASE_ADDRESS
+	hex "DCCM Base Address"
+	help
+	This option specifies the base address of the DCCM on the board.  It is
+	normally set by the board's defconfig file and the user should generally
+	avoid modifying it via the menu configuration.
 
-endmenu
+config SRAM_SIZE
+	int "SRAM Size in kB"
+	help
+	This option specifies the size of the SRAM in kB.  It is normally set by
+	the board's defconfig file and the user should generally avoid modifying
+	it via the menu configuration.
+
+config SRAM_BASE_ADDRESS
+	hex "SRAM Base Address"
+	help
+	This option specifies the base address of the SRAM on the board.  It is
+	normally set by the board's defconfig file and the user should generally
+	avoid modifying it via the menu configuration.
+
+config FLASH_SIZE
+	int "Flash Size in kB"
+	help
+	This option specifies the size of the flash in kB.  It is normally set by
+	the board's defconfig file and the user should generally avoid modifying
+	it via the menu configuration.
+
+config FLASH_BASE_ADDRESS
+	hex "Flash Base Address"
+	help
+	This option specifies the base address of the flash on the board.  It is
+	normally set by the board's defconfig file and the user should generally
+	avoid modifying it via the menu configuration.
 
 config CACHE_LINE_SIZE_DETECT
-	bool "Detect d-cache line size at runtime"
+	bool
+	prompt "Detect d-cache line size at runtime"
+	default n
 	help
-	  This option enables querying the d-cache build register for finding
-	  the d-cache line size at the expense of taking more memory and code
-	  and a slightly increased boot time.
+	This option enables querying the d-cache build register for finding
+	the d-cache line size at the expense of taking more memory and code
+	and a slightly increased boot time.
 
-	  If the CPU's d-cache line size is known in advance, disable this
-	  option and manually enter the value for CACHE_LINE_SIZE.
+	If the CPU's d-cache line size is known in advance, disable this
+	option and manually enter the value for CACHE_LINE_SIZE.
 
 config CACHE_LINE_SIZE
-	int "Cache line size" if !CACHE_LINE_SIZE_DETECT
+	int
+	prompt "Cache line size" if !CACHE_LINE_SIZE_DETECT
 	default 32
 	help
-	  Size in bytes of a CPU d-cache line.
+	Size in bytes of a CPU d-cache line.
 
-	  Detect automatically at runtime by selecting CACHE_LINE_SIZE_DETECT.
+	Detect automatically at runtime by selecting CACHE_LINE_SIZE_DETECT.
 
 config ARCH_CACHE_FLUSH_DETECT
 	bool
+	default n
 
 config CACHE_FLUSHING
-	bool "Enable d-cache flushing mechanism"
+	bool
+	default n
+	prompt "Enable d-cache flushing mechanism"
 	help
-	  This links in the sys_cache_flush() function, which provides a
-	  way to flush multiple lines of the d-cache.
-	  If the d-cache is present, set this to y.
-	  If the d-cache is NOT present, set this to n.
+	This links in the sys_cache_flush() function, which provides a
+	way to flush multiple lines of the d-cache.
+	If the d-cache is present, set this to y.
+	If the d-cache is NOT present, set this to n.
 
 endmenu
 
+source "arch/arc/soc/*/Kconfig"
+
 endmenu

arch/arc/Makefile

@@ -0,0 +1,21 @@
+cflags-y += $(call cc-option,-ffunction-sections,) $(call cc-option,-fdata-sections,)
+
+# Without this (poorly named) option, compiler may generate undefined
+# references to abort().
+# See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63691
+cflags-y += $(call cc-option,-fno-delete-null-pointer-checks)
+
+cflags-$(CONFIG_ARC_STACK_CHECKING) = $(call cc-option,-fomit-frame-pointer)
+cflags-$(CONFIG_LTO) = $(call cc-option,-flto,)
+
+include $(srctree)/arch/$(ARCH)/soc/$(SOC_PATH)/Makefile
+
+KBUILD_CFLAGS += $(cflags-y)
+KBUILD_CXXFLAGS += $(cflags-y)
+
+soc-cxxflags ?= $(soc-cflags)
+soc-aflags ?= $(soc-cflags)
+KBUILD_CFLAGS += $(soc-cflags)
+KBUILD_CXXFLAGS += $(soc-cxxflags)
+KBUILD_AFLAGS += $(soc-aflags)
+

arch/arc/core/CMakeLists.txt

@@ -1,29 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0
-
-zephyr_library()
-
-zephyr_library_sources(
-	thread.c
-	thread_entry_wrapper.S
-	cpu_idle.S
-	fatal.c
-	fault.c
-	fault_s.S
-	irq_manage.c
-	cache.c
-	timestamp.c
-	isr_wrapper.S
-	regular_irq.S
-	swap.S
-	sys_fatal_error_handler.c
-	prep_c.c
-	reset.S
-	vector_table.c
-	)
-
-zephyr_library_sources_ifdef(CONFIG_ARC_FIRQ fast_irq.S)
-
-zephyr_library_sources_if_kconfig(irq_offload.c)
-zephyr_library_sources_ifdef(CONFIG_ATOMIC_OPERATIONS_CUSTOM atomic.c)
-add_subdirectory_ifdef(CONFIG_ARC_CORE_MPU mpu)
-zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)

arch/arc/core/Makefile

@@ -0,0 +1,18 @@
+ccflags-y += -I$(srctree)/kernel/include
+ccflags-y +=-I$(srctree)/arch/$(ARCH)/include
+
+obj-y += thread.o thread_entry_wrapper.o \
+	cpu_idle.o  fast_irq.o  fatal.o  fault.o  \
+	fault_s.o  irq_manage.o cache.o timestamp.o  \
+	isr_wrapper.o  regular_irq.o  swap.o \
+	sys_fatal_error_handler.o
+
+obj-y += prep_c.o \
+         reset.o \
+         vector_table.o
+
+obj-$(CONFIG_IRQ_OFFLOAD) += irq_offload.o
+
+# Some ARC cores like the EM4 lack the atomic LLOCK/SCOND and
+# can't use these.
+obj-$(CONFIG_ATOMIC_OPERATIONS_CUSTOM) += atomic.o

arch/arc/core/atomic.S

@@ -17,7 +17,7 @@
  */
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 
 /* exports */
 

arch/arc/core/cache.c

@@ -18,12 +18,11 @@
 #include <misc/util.h>
 #include <toolchain.h>
 #include <cache.h>
-#include <linker/linker-defs.h>
+#include <linker-defs.h>
 #include <arch/arc/v2/aux_regs.h>
-#include <kernel_internal.h>
+#include <nano_internal.h>
 #include <misc/__assert.h>
 #include <init.h>
-#include <stdbool.h>
 
 #if defined(CONFIG_CACHE_FLUSHING)
 
@@ -49,19 +48,19 @@
 #define DC_CTRL_OP_SUCCEEDED         0x4  /* d-cache operation succeeded */
 
 
-static bool dcache_available(void)
+static int dcache_available(void)
 {
-	unsigned long val = z_arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
+	unsigned long val = _arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
 
 	val &= 0xff; /* extract version */
-	return (val == 0) ? false : true;
+	return (val == 0)?0:1;
 }
 
-static void dcache_dc_ctrl(u32_t dcache_en_mask)
+static void dcache_dc_ctrl(uint32_t dcache_en_mask)
 {
-	if (dcache_available()) {
-		z_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, dcache_en_mask);
-	}
+	if (!dcache_available())
+		return;
+	_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, dcache_en_mask);
 }
 
 static void dcache_enable(void)
@@ -86,31 +85,30 @@ static void dcache_enable(void)
  *
  * @return N/A
  */
-static void dcache_flush_mlines(u32_t start_addr, u32_t size)
+static void dcache_flush_mlines(uint32_t start_addr, uint32_t size)
 {
-	u32_t end_addr;
+	uint32_t end_addr;
 	unsigned int key;
 
-	if (!dcache_available() || (size == 0U)) {
+	if (!dcache_available() || (size == 0)) {
 		return;
 	}
 
 	end_addr = start_addr + size - 1;
-	start_addr &= (u32_t)(~(DCACHE_LINE_SIZE - 1));
+	start_addr &= (uint32_t)(~(DCACHE_LINE_SIZE - 1));
 
 	key = irq_lock(); /* --enter critical section-- */
 
 	do {
-		z_arc_v2_aux_reg_write(_ARC_V2_DC_FLDL, start_addr);
+		_arc_v2_aux_reg_write(_ARC_V2_DC_FLDL, start_addr);
 		__asm__ volatile("nop_s");
 		__asm__ volatile("nop_s");
 		__asm__ volatile("nop_s");
 		/* wait for flush completion */
 		do {
-			if ((z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL) &
-			     DC_CTRL_FLUSH_STATUS) == 0) {
+			if ((_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL) &
+				DC_CTRL_FLUSH_STATUS) == 0)
 				break;
-			}
 		} while (1);
 		start_addr += DCACHE_LINE_SIZE;
 	} while (start_addr <= end_addr);
@@ -139,7 +137,7 @@ static void dcache_flush_mlines(u32_t start_addr, u32_t size)
 
 void sys_cache_flush(vaddr_t start_addr, size_t size)
 {
-	dcache_flush_mlines((u32_t)start_addr, (u32_t)size);
+	dcache_flush_mlines((uint32_t)start_addr, (uint32_t)size);
 }
 
 
@@ -147,12 +145,12 @@ void sys_cache_flush(vaddr_t start_addr, size_t size)
 size_t sys_cache_line_size;
 static void init_dcache_line_size(void)
 {
-	u32_t val;
+	uint32_t val;
 
-	val = z_arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
-	__ASSERT((val&0xff) != 0U, "d-cache is not present");
+	val = _arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
+	__ASSERT((val&0xff) != 0, "d-cache is not present");
 	val = ((val>>16) & 0xf) + 1;
-	val *= 16U;
+	val *= 16;
 	sys_cache_line_size = (size_t) val;
 }
 #endif

arch/arc/core/cpu_idle.S

@@ -14,15 +14,15 @@
 #include <kernel_structs.h>
 #include <offsets_short.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <arch/cpu.h>
 
 GTEXT(k_cpu_idle)
 GTEXT(k_cpu_atomic_idle)
 GDATA(k_cpu_sleep_mode)
 
-SECTION_VAR(BSS, k_cpu_sleep_mode)
 	.balign 4
+SECTION_VAR(BSS, k_cpu_sleep_mode)
 	.word 0
 
 /*
@@ -35,9 +35,9 @@ SECTION_VAR(BSS, k_cpu_sleep_mode)
 
 SECTION_FUNC(TEXT, k_cpu_idle)
 
-#ifdef CONFIG_TRACING
+#ifdef CONFIG_KERNEL_EVENT_LOGGER_SLEEP
 	push_s blink
-	jl    z_sys_trace_idle
+	jl    _sys_k_event_logger_enter_sleep
 	pop_s blink
 #endif
 
@@ -56,9 +56,9 @@ SECTION_FUNC(TEXT, k_cpu_idle)
  */
 SECTION_FUNC(TEXT, k_cpu_atomic_idle)
 
-#ifdef CONFIG_TRACING
+#ifdef CONFIG_KERNEL_EVENT_LOGGER_SLEEP
 	push_s blink
-	jl    z_sys_trace_idle
+	jl    _sys_k_event_logger_enter_sleep
 	pop_s blink
 #endif
 

arch/arc/core/fast_irq.S

@@ -21,14 +21,28 @@
 
 GTEXT(_firq_enter)
 GTEXT(_firq_exit)
+GTEXT(_firq_stack_setup)
+GTEXT(_firq_stack_suspend)
+GTEXT(_firq_stack_resume)
 
-GDATA(exc_nest_count)
-#if CONFIG_RGF_NUM_BANKS == 1
-GDATA(saved_r0)
+#if CONFIG_RGF_NUM_BANKS != 1
+GDATA(_firq_stack)
+GDATA(_saved_firq_stack)
+
+SECTION_VAR(NOINIT, _firq_stack)
+	.space CONFIG_FIRQ_STACK_SIZE
 #else
-GDATA(saved_sp)
+GDATA(saved_r0)
 #endif
 
+.macro _firq_return
+#if CONFIG_RGF_NUM_BANKS == 1
+	b _firq_no_reschedule
+#else
+	rtie
+#endif
+.endm
+
 /**
  *
  * @brief Work to be done before handing control to a FIRQ ISR
@@ -52,6 +66,7 @@ GDATA(saved_sp)
  */
 
 SECTION_FUNC(TEXT, _firq_enter)
+
 /*
  * ATTENTION:
  * If CONFIG_RGF_NUM_BANKS>1, firq uses a 2nd register bank so GPRs do
@@ -59,22 +74,16 @@ SECTION_FUNC(TEXT, _firq_enter)
  * If CONFIG_RGF_NUM_BANKS==1, firq must use the stack to save registers.
  * This has already been done by _isr_wrapper.
  */
+
 #ifdef CONFIG_ARC_STACK_CHECKING
-#ifdef CONFIG_ARC_HAS_SECURE
-	lr r2, [_ARC_V2_SEC_STAT]
-	bclr r2, r2, _ARC_V2_SEC_STAT_SSC_BIT
-	/* sflag r2 */
-	/* sflag instruction is not supported in current ARC GNU */
-	.long 0x00bf302f
-#else
 	/* disable stack checking */
 	lr r2, [_ARC_V2_STATUS32]
 	bclr r2, r2, _ARC_V2_STATUS32_SC_BIT
 	kflag r2
 #endif
-#endif
 
 #if CONFIG_RGF_NUM_BANKS != 1
+#ifndef CONFIG_FIRQ_NO_LPCC
 	/*
 	 * Save LP_START/LP_COUNT/LP_END because called handler might use.
 	 * Save these in callee saved registers to avoid using memory.
@@ -84,42 +93,10 @@ SECTION_FUNC(TEXT, _firq_enter)
 	lr r24, [_ARC_V2_LP_START]
 	lr r25, [_ARC_V2_LP_END]
 #endif
-
-	ld r1, [exc_nest_count]
-	add r0, r1, 1
-	st r0, [exc_nest_count]
-	cmp r1, 0
-
-	bgt.d  firq_nest
-	mov r0, sp
-
-	mov r1, _kernel
-	ld sp, [r1, _kernel_offset_to_irq_stack]
-#if CONFIG_RGF_NUM_BANKS != 1
-	b firq_nest_1
-firq_nest:
-	mov r1, ilink
-	lr r0, [_ARC_V2_STATUS32]
-	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
-	kflag r0
-
-	st sp, [saved_sp]
-
-	lr ilink, [_ARC_V2_STATUS32]
-	or ilink, ilink, _ARC_V2_STATUS32_RB(1)
-	kflag ilink
-	mov r0, sp
-	ld sp, [saved_sp]
-	mov ilink, r1
-firq_nest_1:
-#else
-firq_nest:
 #endif
-	push_s r0
+
 	j @_isr_demux
 
-
-
 /**
  *
  * @brief Work to be done exiting a FIRQ
@@ -130,34 +107,43 @@ firq_nest:
 SECTION_FUNC(TEXT, _firq_exit)
 
 #if CONFIG_RGF_NUM_BANKS != 1
+#ifndef CONFIG_FIRQ_NO_LPCC
 	/* restore lp_count, lp_start, lp_end from r23-r25 */
 	mov lp_count,r23
 	sr r24, [_ARC_V2_LP_START]
 	sr r25, [_ARC_V2_LP_END]
 #endif
-	/* check if we're a nested interrupt: if so, let the interrupted
-	 * interrupt handle the reschedule */
-	mov	r1, exc_nest_count
-	ld	r0, [r1]
-	sub	r0, r0, 1
-	st	r0, [r1]
-/* see comments in _rirq_exit */
-	lr 	r0, [_ARC_V2_AUX_IRQ_ACT]
-	and 	r0, r0, 0xffff
-	ffs	r1, r0
-	fls	r2, r0
-	cmp 	r1, r2
-	jne	_firq_no_reschedule
-
-#ifdef CONFIG_STACK_SENTINEL
-	bl z_check_stack_sentinel
 #endif
 
 #ifdef CONFIG_PREEMPT_ENABLED
-
 	mov_s r1, _kernel
 	ld_s r2, [r1, _kernel_offset_to_current]
 
+#if CONFIG_NUM_IRQ_PRIO_LEVELS > 1
+	/* check if we're a nested interrupt: if so, let the interrupted
+	 * interrupt handle the reschedule */
+
+	lr r3, [_ARC_V2_AUX_IRQ_ACT]
+
+	/* the OS on ARCv2 always runs in kernel mode, so assume bit31 [U] in
+	 * AUX_IRQ_ACT is always 0: if the contents of AUX_IRQ_ACT is not 1, it
+	 * means that another bit is set so an interrupt was interrupted.
+	 */
+
+	breq r3, 1, _firq_check_for_swap
+
+	_firq_return
+#endif
+
+.balign 4
+_firq_check_for_swap:
+	/*
+	 * Non-preemptible thread ? Do not schedule (see explanation of
+	 * preempt field in kernel_struct.h).
+	 */
+	ldh_s r0, [r2, _thread_offset_to_preempt]
+	brhs r0, _NON_PREEMPT_THRESHOLD, _firq_no_reschedule
+
 	/* Check if the current thread (in r2) is the cached thread */
 	ld_s r0, [r1, _kernel_offset_to_ready_q_cache]
 	brne r0, r2, _firq_reschedule
@@ -168,8 +154,6 @@ SECTION_FUNC(TEXT, _firq_exit)
 
 .balign 4
 _firq_no_reschedule:
-	pop sp
-
 	/*
 	 * Keeping this code block close to those that use it allows using brxx
 	 * instruction instead of a pair of cmp and bxx
@@ -196,14 +180,6 @@ _firq_no_reschedule:
 	sr r0, [_ARC_V2_LP_START]
 	pop_s r0
 	mov lp_count,r0
-#ifdef CONFIG_CODE_DENSITY
-	pop_s r0
-	sr r0, [_ARC_V2_EI_BASE]
-	pop_s r0
-	sr r0, [_ARC_V2_LDI_BASE]
-	pop_s r0
-	sr r0, [_ARC_V2_JLI_BASE]
-#endif
 	ld r0,[saved_r0]
 	add sp,sp,8 /* don't need ilink & status32_po from stack */
 #endif
@@ -213,7 +189,6 @@ _firq_no_reschedule:
 
 .balign 4
 _firq_reschedule:
-	pop sp
 
 #if CONFIG_RGF_NUM_BANKS != 1
 	/*
@@ -252,7 +227,11 @@ _firq_reschedule:
 	st_s r2, [r1, _kernel_offset_to_current]
 
 #ifdef CONFIG_ARC_STACK_CHECKING
-	_load_stack_check_regs
+	/* Use stack top and down registers from restored context */
+	add r3, r2, _K_THREAD_NO_FLOAT_SIZEOF
+	sr r3, [_ARC_V2_KSTACK_TOP]
+	ld_s r3, [r2, _thread_offset_to_stack_top]
+	sr r3, [_ARC_V2_KSTACK_BASE]
 #endif
 	/*
 	 * _load_callee_saved_regs expects incoming thread in r2.
@@ -260,13 +239,6 @@ _firq_reschedule:
 	 */
 	_load_callee_saved_regs
 
-#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
-	push_s r2
-	mov r0, r2
-	bl configure_mpu_thread
-	pop_s r2
-#endif
-
 	ld_s r3, [r2, _thread_offset_to_relinquish_cause]
 
 	breq r3, _CAUSE_RIRQ, _firq_return_from_rirq
@@ -289,7 +261,7 @@ _firq_return_from_coop:
 	pop_s r0 /* status32 into r0 */
 	/*
 	 * There are only two interrupt lock states: locked and unlocked. When
-	 * entering z_swap(), they are always locked, so the IE bit is unset in
+	 * entering _Swap(), they are always locked, so the IE bit is unset in
 	 * status32. If the incoming thread had them locked recursively, it
 	 * means that the IE bit should stay unset. The only time the bit
 	 * has to change is if they were not locked recursively.
@@ -315,3 +287,84 @@ _firq_return_from_firq:
 	rtie
 
 #endif /* CONFIG_PREEMPT_ENABLED */
+
+/**
+ *
+ * @brief Install the FIRQ stack in register bank 1 if CONFIG_RGF_NUM_BANK!=1
+ *
+ * @return N/A
+ */
+
+SECTION_FUNC(TEXT, _firq_stack_setup)
+
+#if CONFIG_RGF_NUM_BANKS != 1
+	lr r0, [_ARC_V2_STATUS32]
+	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
+	or r0, r0, _ARC_V2_STATUS32_RB(1)
+	kflag r0
+
+	mov sp, _firq_stack
+	add sp, sp, CONFIG_FIRQ_STACK_SIZE
+
+	/*
+	 * We have to reload r0 here, because it is bank1 r0 which contains
+	 * garbage, not bank0 r0 containing the previous value of status32.
+	 */
+	lr r0, [_ARC_V2_STATUS32]
+	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
+	kflag r0
+#endif
+
+	j_s [blink]
+
+/**
+ *
+ * @brief Save the FIRQ context if CONFIG_RGF_NUM_BANK!=1
+ *
+ * @return N/A
+ */
+
+SECTION_FUNC(TEXT, _firq_stack_suspend)
+
+#if CONFIG_RGF_NUM_BANKS != 1
+	/* Switch to bank 1 */
+	lr r0, [_ARC_V2_STATUS32]
+	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
+	or r0, r0, _ARC_V2_STATUS32_RB(1)
+	kflag r0
+
+	st sp, [_saved_firq_stack]
+
+	/* Switch back to bank 0 */
+	lr r0, [_ARC_V2_STATUS32]
+	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
+	kflag r0
+#endif
+
+	j_s [blink]
+
+/**
+ *
+ * @brief Restore the FIRQ context if CONFIG_RGF_NUM_BANK!=1
+ *
+ * @return N/A
+ */
+
+SECTION_FUNC(TEXT, _firq_stack_resume)
+
+#if CONFIG_RGF_NUM_BANKS != 1
+	/* Switch to bank 1 */
+	lr r0, [_ARC_V2_STATUS32]
+	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
+	or r0, r0, _ARC_V2_STATUS32_RB(1)
+	kflag r0
+
+	ld sp, [_saved_firq_stack]
+
+	/* Switch back to bank 0 */
+	lr r0, [_ARC_V2_STATUS32]
+	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
+	kflag r0
+#endif
+
+	j_s [blink]

arch/arc/core/fatal.c

@@ -16,8 +16,17 @@
 #include <offsets_short.h>
 #include <toolchain.h>
 #include <arch/cpu.h>
+
+#ifdef CONFIG_PRINTK
 #include <misc/printk.h>
-#include <logging/log_ctrl.h>
+#define PR_EXC(...) printk(__VA_ARGS__)
+#else
+#define PR_EXC(...)
+#endif /* CONFIG_PRINTK */
+
+const NANO_ESF _default_esf = {
+	0xdeaddead, /* placeholder */
+};
 
 /**
  *
@@ -25,7 +34,7 @@
  *
  * This routine is called when fatal error conditions are detected by software
  * and is responsible only for reporting the error. Once reported, it then
- * invokes the user provided routine z_SysFatalErrorHandler() which is
+ * invokes the user provided routine _SysFatalErrorHandler() which is
  * responsible for implementing the error handling policy.
  *
  * The caller is expected to always provide a usable ESF. In the event that the
@@ -34,44 +43,32 @@
  *
  * @return This function does not return.
  */
-void z_NanoFatalErrorHandler(unsigned int reason, const NANO_ESF *pEsf)
+FUNC_NORETURN void _NanoFatalErrorHandler(unsigned int reason,
+							const NANO_ESF *pEsf)
 {
-	LOG_PANIC();
-
 	switch (reason) {
-	case _NANO_ERR_HW_EXCEPTION:
+	case _NANO_ERR_INVALID_TASK_EXIT:
+		PR_EXC("***** Invalid Exit Software Error! *****\n");
 		break;
 
-#if defined(CONFIG_STACK_CANARIES) || defined(CONFIG_ARC_STACK_CHECKING) \
-	|| defined(CONFIG_STACK_SENTINEL) || defined(CONFIG_MPU_STACK_GUARD)
+#if defined(CONFIG_STACK_CANARIES)
 	case _NANO_ERR_STACK_CHK_FAIL:
-		printk("***** Stack Check Fail! *****\n");
+		PR_EXC("***** Stack Check Fail! *****\n");
 		break;
 #endif
 
 	case _NANO_ERR_ALLOCATION_FAIL:
-		printk("**** Kernel Allocation Failure! ****\n");
-		break;
-
-	case _NANO_ERR_KERNEL_OOPS:
-		printk("***** Kernel OOPS! *****\n");
-		break;
-
-	case _NANO_ERR_KERNEL_PANIC:
-		printk("***** Kernel Panic! *****\n");
+		PR_EXC("**** Kernel Allocation Failure! ****\n");
 		break;
 
 	default:
-		printk("**** Unknown Fatal Error %d! ****\n", reason);
+		PR_EXC("**** Unknown Fatal Error %d! ****\n", reason);
 		break;
 	}
-
-	printk("Current thread ID = %p\n",  k_current_get());
-
-	if (reason == _NANO_ERR_HW_EXCEPTION) {
-		printk("Faulting instruction address = 0x%lx\n",
-		z_arc_v2_aux_reg_read(_ARC_V2_ERET));
-	}
+	PR_EXC("Current thread ID = %p\n"
+	       "Faulting instruction address = 0x%lx\n",
+	       k_current_get(),
+	       _arc_v2_aux_reg_read(_ARC_V2_ERET));
 
 	/*
 	 * Now that the error has been reported, call the user implemented
@@ -81,12 +78,8 @@ void z_NanoFatalErrorHandler(unsigned int reason, const NANO_ESF *pEsf)
 	 * decide.
 	 */
 
-	z_SysFatalErrorHandler(reason, pEsf);
-}
+	_SysFatalErrorHandler(reason, pEsf);
 
-FUNC_NORETURN void z_arch_syscall_oops(void *ssf_ptr)
-{
-	LOG_PANIC();
-	z_SysFatalErrorHandler(_NANO_ERR_KERNEL_OOPS, ssf_ptr);
-	CODE_UNREACHABLE;
+	for (;;)
+		;
 }

arch/arc/core/fault.c

@@ -12,178 +12,72 @@
  */
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <inttypes.h>
 
 #include <kernel.h>
 #include <kernel_structs.h>
+
+#ifdef CONFIG_PRINTK
 #include <misc/printk.h>
-#include <exc_handle.h>
-#include <logging/log_ctrl.h>
-
-u32_t arc_exc_saved_sp;
-
-#ifdef CONFIG_USERSPACE
-Z_EXC_DECLARE(z_arch_user_string_nlen);
-
-static const struct z_exc_handle exceptions[] = {
-	Z_EXC_HANDLE(z_arch_user_string_nlen)
-};
-#endif
-
-#if defined(CONFIG_MPU_STACK_GUARD)
-
-#define IS_MPU_GUARD_VIOLATION(guard_start, fault_addr, stack_ptr) \
-	((fault_addr >= guard_start) && \
-	(fault_addr < (guard_start + STACK_GUARD_SIZE)) && \
-	(stack_ptr <= (guard_start + STACK_GUARD_SIZE)))
-
-/**
- * @brief Assess occurrence of current thread's stack corruption
- *
- * This function performs an assessment whether a memory fault (on a
- * given memory address) is the result of stack memory corruption of
- * the current thread.
- *
- * Thread stack corruption for supervisor threads or user threads in
- * privilege mode (when User Space is supported) is reported upon an
- * attempt to access the stack guard area (if MPU Stack Guard feature
- * is supported). Additionally the current thread stack pointer
- * must be pointing inside or below the guard area.
- *
- * Thread stack corruption for user threads in user mode is reported,
- * if the current stack pointer is pointing below the start of the current
- * thread's stack.
- *
- * Notes:
- * - we assume a fully descending stack,
- * - we assume a stacking error has occurred,
- * - the function shall be called when handling MPU privilege violation
- *
- * If stack corruption is detected, the function returns the lowest
- * allowed address where the Stack Pointer can safely point to, to
- * prevent from errors when un-stacking the corrupted stack frame
- * upon exception return.
- *
- * @param fault_addr memory address on which memory access violation
- *                   has been reported.
- * @param sp stack pointer when exception comes out
- *
- * @return The lowest allowed stack frame pointer, if error is a
- *         thread stack corruption, otherwise return 0.
- */
-static u32_t z_check_thread_stack_fail(const u32_t fault_addr, u32_t sp)
-{
-	const struct k_thread *thread = _current;
-
-	if (!thread) {
-		return 0;
-	}
-#if defined(CONFIG_USERSPACE)
-	if (thread->arch.priv_stack_start) {
-		/* User thread */
-		if (z_arc_v2_aux_reg_read(_ARC_V2_ERSTATUS)
-			& _ARC_V2_STATUS32_U) {
-			/* Thread's user stack corruption */
-#ifdef CONFIG_ARC_HAS_SECURE
-			sp = z_arc_v2_aux_reg_read(_ARC_V2_SEC_U_SP);
+#define PR_EXC(...) printk(__VA_ARGS__)
 #else
-			sp = z_arc_v2_aux_reg_read(_ARC_V2_USER_SP);
-#endif
-			if (sp <= (u32_t)thread->stack_obj) {
-				return (u32_t)thread->stack_obj;
-			}
-		} else {
-			/* User thread in privilege mode */
-			if (IS_MPU_GUARD_VIOLATION(
-			thread->arch.priv_stack_start - STACK_GUARD_SIZE,
-			fault_addr, sp)) {
-				/* Thread's privilege stack corruption */
-				return thread->arch.priv_stack_start;
-			}
-		}
-	} else {
-		/* Supervisor thread */
-		if (IS_MPU_GUARD_VIOLATION((u32_t)thread->stack_obj,
-			fault_addr, sp)) {
-			/* Supervisor thread stack corruption */
-			return (u32_t)thread->stack_obj + STACK_GUARD_SIZE;
-		}
-	}
-#else /* CONFIG_USERSPACE */
-	if (IS_MPU_GUARD_VIOLATION(thread->stack_info.start,
-			fault_addr, sp)) {
-		/* Thread stack corruption */
-		return thread->stack_info.start + STACK_GUARD_SIZE;
-	}
-#endif /* CONFIG_USERSPACE */
+#define PR_EXC(...)
+#endif /* CONFIG_PRINTK */
 
-	return 0;
+#if (CONFIG_FAULT_DUMP > 0)
+#define FAULT_DUMP(esf, fault) _FaultDump(esf, fault)
+#else
+#define FAULT_DUMP(esf, fault) \
+	do {                   \
+		(void) esf;    \
+		(void) fault;  \
+	} while ((0))
+#endif
+
+#if (CONFIG_FAULT_DUMP > 0)
+/*
+ * @brief Dump information regarding fault (FAULT_DUMP > 0)
+ *
+ * Dump information regarding the fault when CONFIG_FAULT_DUMP is set to 1
+ * (short form).
+ *
+ * @return N/A
+ */
+void _FaultDump(const NANO_ESF *esf, int fault)
+{
+	ARG_UNUSED(esf);
+	ARG_UNUSED(fault);
+
+#ifdef CONFIG_PRINTK
+	uint32_t exc_addr = _arc_v2_aux_reg_read(_ARC_V2_EFA);
+	uint32_t ecr = _arc_v2_aux_reg_read(_ARC_V2_ECR);
+
+	PR_EXC("Exception vector: 0x%" PRIx32 ", cause code: 0x%" PRIx32
+	       ", parameter 0x%" PRIx32 "\n",
+	       _ARC_V2_ECR_VECTOR(ecr),
+	       _ARC_V2_ECR_CODE(ecr),
+	       _ARC_V2_ECR_PARAMETER(ecr));
+	PR_EXC("Address 0x%" PRIx32 "\n", exc_addr);
+#endif
 }
-
-#endif
+#endif /* CONFIG_FAULT_DUMP */
 
 /*
  * @brief Fault handler
  *
  * This routine is called when fatal error conditions are detected by hardware
  * and is responsible only for reporting the error. Once reported, it then
- * invokes the user provided routine z_SysFatalErrorHandler() which is
+ * invokes the user provided routine _SysFatalErrorHandler() which is
  * responsible for implementing the error handling policy.
+ *
+ * @return This function does not return.
  */
-void _Fault(NANO_ESF *esf)
+void _Fault(void)
 {
-	u32_t vector, code, parameter;
-	u32_t exc_addr = z_arc_v2_aux_reg_read(_ARC_V2_EFA);
-	u32_t ecr = z_arc_v2_aux_reg_read(_ARC_V2_ECR);
+	uint32_t ecr = _arc_v2_aux_reg_read(_ARC_V2_ECR);
 
-	LOG_PANIC();
+	FAULT_DUMP(&_default_esf, ecr);
 
-#ifdef CONFIG_USERSPACE
-	for (int i = 0; i < ARRAY_SIZE(exceptions); i++) {
-		u32_t start = (u32_t)exceptions[i].start;
-		u32_t end = (u32_t)exceptions[i].end;
-
-		if (esf->pc >= start && esf->pc < end) {
-			esf->pc = (u32_t)(exceptions[i].fixup);
-			return;
-		}
-	}
-#endif
-
-	vector = Z_ARC_V2_ECR_VECTOR(ecr);
-	code =  Z_ARC_V2_ECR_CODE(ecr);
-	parameter = Z_ARC_V2_ECR_PARAMETER(ecr);
-
-
-	/* exception raised by kernel */
-	if (vector == 0x9 && parameter == _TRAP_S_CALL_RUNTIME_EXCEPT) {
-		z_NanoFatalErrorHandler(esf->r0, esf);
-		return;
-	}
-
-	printk("Exception vector: 0x%x, cause code: 0x%x, parameter 0x%x\n",
-	       vector, code, parameter);
-	printk("Address 0x%x\n", exc_addr);
-#ifdef CONFIG_ARC_STACK_CHECKING
-	/* Vector 6 = EV_ProV. Regardless of code, parameter 2 means stack
-	 * check violation
-	 * stack check and mpu violation can come out together, then
-	 * parameter = 0x2 | [0x4 | 0x8 | 0x1]
-	 */
-	if (vector == 6U && parameter & 0x2) {
-		z_NanoFatalErrorHandler(_NANO_ERR_STACK_CHK_FAIL, esf);
-		return;
-	}
-#endif
-
-#ifdef CONFIG_MPU_STACK_GUARD
-	if (vector == 0x6 && ((parameter == 0x4) || (parameter == 0x24))) {
-		if (z_check_thread_stack_fail(exc_addr, arc_exc_saved_sp)) {
-			z_NanoFatalErrorHandler(_NANO_ERR_STACK_CHK_FAIL, esf);
-			return;
-		}
-	}
-#endif
-	z_NanoFatalErrorHandler(_NANO_ERR_HW_EXCEPTION, esf);
+	_SysFatalErrorHandler(_NANO_ERR_HW_EXCEPTION, &_default_esf);
 }

arch/arc/core/fault_s.S

@@ -1,6 +1,5 @@
 /*
  * Copyright (c) 2014 Wind River Systems, Inc.
- * Copyright (c) 2018 Synopsys.
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -13,13 +12,12 @@
  */
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <arch/cpu.h>
 #include <swap_macros.h>
-#include <syscall.h>
 
 GTEXT(_Fault)
-GTEXT(z_do_kernel_oops)
+
 GTEXT(__reset)
 GTEXT(__memory_error)
 GTEXT(__instruction_error)
@@ -34,16 +32,20 @@ GTEXT(__ev_extension)
 GTEXT(__ev_div_zero)
 GTEXT(__ev_dc_error)
 GTEXT(__ev_maligned)
-#ifdef CONFIG_IRQ_OFFLOAD
-GTEXT(z_irq_do_offload);
+
+	.balign 4
+SECTION_VAR(BSS, saved_stack_pointer)
+	.word 0
+
+#if CONFIG_RGF_NUM_BANKS == 1
+GDATA(_exception_stack)
+SECTION_VAR(NOINIT, _exception_stack)
+	.space 512
+/* note: QUARK_SE_C1000_SS can't afford 512B */
+#else
+GDATA(_firq_stack)
 #endif
 
-GDATA(exc_nest_count)
-GDATA(arc_exc_saved_sWWp)
-
-/* the necessary stack size for exception handling */
-#define EXCEPTION_STACK_SIZE 384
-
 /*
  * @brief Fault handler installed in the fault and reserved vectors
  */
@@ -56,183 +58,114 @@ SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_tlb_miss_d)
 SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_prot_v)
 SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_privilege_v)
 SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_swi)
+#ifndef CONFIG_IRQ_OFFLOAD
+SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_trap)
+#endif
 SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_extension)
 SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_div_zero)
 SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_dc_error)
 SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_maligned)
 
-_exc_entry:
-	st sp, [arc_exc_saved_sp]
 	/*
-	 * re-use the top part of interrupt stack as exception
-	 * stack. If this top part is used by interrupt handling,
-	 * and exception is raised, then here it's guaranteed that
-	 * exception handling has necessary stack to use
+	 * Before invoking exception handler, the kernel switches to an exception
+	 * stack, to save the faulting thread's registers.
+	 * The exception is fatal and all the kernel can do is just print
+	 * a diagnostic message and halt.
 	 */
-	mov_s sp, _interrupt_stack
-	add sp, sp, EXCEPTION_STACK_SIZE
 
-	/*
-	 * save caller saved registers
-	 * this stack frame is set up in exception stack,
-	 * not in the original sp (thread stack or interrupt stack).
-	 * Because the exception may be raised by stack checking or
-	 * mpu protect violation related to stack. If this stack frame
-	 * is setup in original sp, double exception may be raised during
-	 * _create_irq_stack_frame, which is unrecoverable.
-	 */
-	_create_irq_stack_frame
-
-#ifdef CONFIG_ARC_HAS_SECURE
-	lr r0,[_ARC_V2_ERSEC_STAT]
-	st_s r0, [sp, ___isf_t_sec_stat_OFFSET]
-#endif
-	lr r0,[_ARC_V2_ERSTATUS]
-	st_s r0, [sp, ___isf_t_status32_OFFSET]
-	lr r0,[_ARC_V2_ERET]
-	st_s r0, [sp, ___isf_t_pc_OFFSET] /* eret into pc */
-
-	/* sp is parameter of _Fault */
-	mov r0, sp
-	jl _Fault
-
-_exc_return:
-
-#ifdef CONFIG_PREEMPT_ENABLED
-	mov_s r1, _kernel
-	ld_s r2, [r1, _kernel_offset_to_current]
-
-	/* check if the current thread needs to be rescheduled */
-	ld_s r0, [r1, _kernel_offset_to_ready_q_cache]
-	breq r0, r2, _exc_return_from_exc
-
-	ld_s r2, [r1, _kernel_offset_to_ready_q_cache]
-	st_s r2, [r1, _kernel_offset_to_current]
-
-#ifdef CONFIG_ARC_HAS_SECURE
-	/*
-	 * sync up the ERSEC_STAT.ERM and SEC_STAT.IRM.
-	 * use a fake interrupt return to simulate an exception turn.
-	 * ERM and IRM record which mode the cpu should return, 1: secure
-	 * 0: normal
-	 */
-	lr r3,[_ARC_V2_ERSEC_STAT]
-	btst r3, 31
-	bset.nz r3, r3, 3
-	bclr.z r3, r3, 3
-	/* sflag r3 */
-	/* sflag instruction is not supported in current ARC GNU */
-	.long 0x00ff302f
-#endif
-	/* clear AE bit to forget this was an exception */
-	lr r3, [_ARC_V2_STATUS32]
-	and r3,r3,(~_ARC_V2_STATUS32_AE)
-	kflag r3
-	/* pretend lowest priority interrupt happened to use common handler */
-	lr r3, [_ARC_V2_AUX_IRQ_ACT]
-	or r3,r3,(1<<(CONFIG_NUM_IRQ_PRIO_LEVELS-1)) /* use lowest */
-	sr r3, [_ARC_V2_AUX_IRQ_ACT]
-
-	/* Assumption: r2 has current thread */
-	b _rirq_common_interrupt_swap
+#ifdef CONFIG_ARC_STACK_CHECKING
+	push_s r2
+	/* disable stack checking */
+	lr r2, [_ARC_V2_STATUS32]
+	bclr r2, r2, _ARC_V2_STATUS32_SC_BIT
+	kflag r2
+	pop_s r2
 #endif
 
-_exc_return_from_exc:
-	ld_s r0, [sp, ___isf_t_pc_OFFSET]
-	sr r0, [_ARC_V2_ERET]
-
-	_pop_irq_stack_frame
-	ld sp, [arc_exc_saved_sp]
-	rtie
-
-
-SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_trap)
-	/* get the id of trap_s */
-	lr ilink, [_ARC_V2_ECR]
-	and ilink, ilink, 0x3f
-#ifdef CONFIG_USERSPACE
-	cmp ilink, _TRAP_S_CALL_SYSTEM_CALL
-	bne _do_non_syscall_trap
-/* do sys_call */
-	mov ilink, K_SYSCALL_LIMIT
-	cmp r6, ilink
-	blt valid_syscall_id
-
-	mov r0, r6
-	mov r6, K_SYSCALL_BAD
-
-valid_syscall_id:
-#ifdef CONFIG_ARC_HAS_SECURE
-	lr ilink, [_ARC_V2_ERSEC_STAT]
-	push ilink
+	st sp, [saved_stack_pointer]
+#if CONFIG_RGF_NUM_BANKS == 1
+	mov_s sp, _exception_stack
+	add sp, sp, 512
+#else
+	mov_s sp, _firq_stack
+	add sp, sp, CONFIG_FIRQ_STACK_SIZE
 #endif
-	lr ilink, [_ARC_V2_ERET]
-	push ilink
-	lr ilink, [_ARC_V2_ERSTATUS]
-	push ilink
 
-
-	bclr ilink, ilink, _ARC_V2_STATUS32_U_BIT
-	sr ilink, [_ARC_V2_ERSTATUS]
-
-	mov ilink, _arc_do_syscall
-	sr ilink, [_ARC_V2_ERET]
-
-	rtie
-
-_do_non_syscall_trap:
-#endif /* CONFIG_USERSPACE */
-#ifdef CONFIG_IRQ_OFFLOAD
-	/*
-	 * IRQ_OFFLOAD is to simulate interrupt handling through exception,
-	 * so its entry is different with normal exception handling, it is
-	 * handled in isr stack
-	 */
-	cmp ilink, _TRAP_S_SCALL_IRQ_OFFLOAD
-	bne _exc_entry
 	/* save caller saved registers */
 	_create_irq_stack_frame
 
-#ifdef CONFIG_ARC_HAS_SECURE
-	lr r0,[_ARC_V2_ERSEC_STAT]
-	st_s r0, [sp, ___isf_t_sec_stat_OFFSET]
-#endif
 	lr r0,[_ARC_V2_ERSTATUS]
 	st_s r0, [sp, ___isf_t_status32_OFFSET]
 	lr r0,[_ARC_V2_ERET]
 	st_s r0, [sp, ___isf_t_pc_OFFSET] /* eret into pc */
 
-	ld r1, [exc_nest_count]
-	add r0, r1, 1
-	st r0, [exc_nest_count]
-	cmp r1, 0
+	jl _Fault
 
-	bgt.d  exc_nest_handle
-	mov r0, sp
+	/* if _Fault returns, restore the registers */
+	_pop_irq_stack_frame
 
-	mov r1, _kernel
-	ld sp, [r1, _kernel_offset_to_irq_stack]
-exc_nest_handle:
-	push_s r0
+	/* now restore the stack */
+	ld sp,[saved_stack_pointer]
+	rtie
 
-	jl z_irq_do_offload
+#ifdef CONFIG_IRQ_OFFLOAD
+GTEXT(_irq_do_offload);
 
-	pop sp
+SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_trap)
+	/*
+	 * Before invoking exception handler, the kernel switches to an exception
+	 * stack to save the faulting thread's registers.
+	 * The exception is fatal and all the kernel can do is just print
+	 * a diagnostic message and halt.
+	 */
 
-	mov	r1, exc_nest_count
-	ld	r0, [r1]
-	sub	r0, r0, 1
-	cmp	r0, 0
-	bne.d	_exc_return_from_exc
-	st 	r0, [r1]
+#ifdef CONFIG_ARC_STACK_CHECKING
+	push_s r2
+	/* disable stack checking */
+	lr r2, [_ARC_V2_STATUS32]
+	bclr r2, r2, _ARC_V2_STATUS32_SC_BIT
+	kflag r2
+	pop_s r2
+#endif
+
+	/* save caller saved registers */
+	_create_irq_stack_frame
+
+	lr r0,[_ARC_V2_ERSTATUS]
+	st_s r0, [sp, ___isf_t_status32_OFFSET]
+	lr r0,[_ARC_V2_ERET]
+	st_s r0, [sp, ___isf_t_pc_OFFSET] /* eret into pc */
+
+	jl _irq_do_offload
 
-#ifdef CONFIG_PREEMPT_ENABLED
 	mov_s r1, _kernel
 	ld_s r2, [r1, _kernel_offset_to_current]
+	/* check if we're a nested interrupt: if so, let the
+	 * interrupted interrupt handle the reschedule
+	 */
+	lr r3, [_ARC_V2_AUX_IRQ_ACT]
+	/* the OS on ARCv2 always runs in kernel mode, so assume bit31 [U] in
+	 * AUX_IRQ_ACT is always 0: if the contents of AUX_IRQ_ACT is 0, it
+	 * means trap was taken from outside an interrupt handler.
+	 * But if it was inside, let that handler do the swap.
+	 */
+	breq r3, 0, _trap_check_for_swap
+_trap_return:
+	_pop_irq_stack_frame
+	rtie
+
+.balign 4
+_trap_check_for_swap:
+	/*
+	 * Non-preemptible thread ? Do not schedule (see explanation of
+	 * preempt field in kernel_struct.h).
+	 */
+	ldh_s r0, [r2, _thread_offset_to_preempt]
+	brhs r0, _NON_PREEMPT_THRESHOLD, _trap_return
 
 	/* check if the current thread needs to be rescheduled */
 	ld_s r0, [r1, _kernel_offset_to_ready_q_cache]
-	breq r0, r2, _exc_return_from_irqoffload_trap
+	breq r0, r2, _trap_return
 
 	_save_callee_saved_regs
 
@@ -242,21 +175,6 @@ exc_nest_handle:
 	ld_s r2, [r1, _kernel_offset_to_ready_q_cache]
 	st_s r2, [r1, _kernel_offset_to_current]
 
-#ifdef CONFIG_ARC_HAS_SECURE
-	/*
-	 * sync up the ERSEC_STAT.ERM and SEC_STAT.IRM.
-	 * use a fake interrupt return to simulate an exception turn.
-	 * ERM and IRM record which mode the cpu should return, 1: secure
-	 * 0: normal
-	 */
-	lr r3,[_ARC_V2_ERSEC_STAT]
-	btst r3, 31
-	bset.nz r3, r3, 3
-	bclr.z r3, r3, 3
-	/* sflag r3 */
-	/* sflag instruction is not supported in current ARC GNU */
-	.long 0x00ff302f
-#endif
 	/* clear AE bit to forget this was an exception */
 	lr r3, [_ARC_V2_STATUS32]
 	and r3,r3,(~_ARC_V2_STATUS32_AE)
@@ -268,10 +186,5 @@ exc_nest_handle:
 
 	/* Assumption: r2 has current thread */
 	b _rirq_common_interrupt_swap
-#endif
 
-_exc_return_from_irqoffload_trap:
-	_pop_irq_stack_frame
-	rtie
 #endif /* CONFIG_IRQ_OFFLOAD */
-	b _exc_entry

arch/arc/core/irq_manage.c

@@ -21,10 +21,9 @@
 #include <arch/cpu.h>
 #include <misc/__assert.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <sw_isr_table.h>
 #include <irq.h>
-#include <misc/printk.h>
 
 /*
  * @brief Enable an interrupt line
@@ -36,11 +35,11 @@
  * @return N/A
  */
 
-void z_arch_irq_enable(unsigned int irq)
+void _arch_irq_enable(unsigned int irq)
 {
-	unsigned int key = irq_lock();
+	int key = irq_lock();
 
-	z_arc_v2_irq_unit_int_enable(irq);
+	_arc_v2_irq_unit_int_enable(irq);
 	irq_unlock(key);
 }
 
@@ -53,11 +52,11 @@ void z_arch_irq_enable(unsigned int irq)
  * @return N/A
  */
 
-void z_arch_irq_disable(unsigned int irq)
+void _arch_irq_disable(unsigned int irq)
 {
-	unsigned int key = irq_lock();
+	int key = irq_lock();
 
-	z_arc_v2_irq_unit_int_disable(irq);
+	_arc_v2_irq_unit_int_disable(irq);
 	irq_unlock(key);
 }
 
@@ -75,15 +74,15 @@ void z_arch_irq_disable(unsigned int irq)
  * @return N/A
  */
 
-void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags)
+void _irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
 {
 	ARG_UNUSED(flags);
 
-	unsigned int key = irq_lock();
+	int key = irq_lock();
 
 	__ASSERT(prio < CONFIG_NUM_IRQ_PRIO_LEVELS,
 		 "invalid priority %d for irq %d", prio, irq);
-	z_arc_v2_irq_unit_prio_set(irq, prio);
+	_arc_v2_irq_unit_prio_set(irq, prio);
 	irq_unlock(key);
 }
 
@@ -96,22 +95,12 @@ void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags)
  * @return N/A
  */
 
-void z_irq_spurious(void *unused)
+#include <misc/printk.h>
+void _irq_spurious(void *unused)
 {
 	ARG_UNUSED(unused);
-	printk("z_irq_spurious(). Spinning...\n");
-	for (;;) {
+	printk("_irq_spurious(). Spinning...\n");
+	for (;;)
 		;
-	}
 }
 
-#ifdef CONFIG_DYNAMIC_INTERRUPTS
-int z_arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
-			      void (*routine)(void *parameter), void *parameter,
-			      u32_t flags)
-{
-	z_isr_install(irq, routine, parameter);
-	z_irq_priority_set(irq, priority, flags);
-	return irq;
-}
-#endif /* CONFIG_DYNAMIC_INTERRUPTS */

arch/arc/core/irq_offload.c

@@ -15,22 +15,20 @@ static irq_offload_routine_t offload_routine;
 static void *offload_param;
 
 /* Called by trap_s exception handler */
-void z_irq_do_offload(void)
+void _irq_do_offload(void)
 {
 	offload_routine(offload_param);
 }
 
 void irq_offload(irq_offload_routine_t routine, void *parameter)
 {
-	unsigned int key;
+	int key;
 
 	key = irq_lock();
 	offload_routine = routine;
 	offload_param = parameter;
 
-	__asm__ volatile ("trap_s %[id]"
-		:
-		: [id] "i"(_TRAP_S_SCALL_IRQ_OFFLOAD) : );
+	__asm__ volatile ("trap_s 0");
 
 	irq_unlock(key);
 }

arch/arc/core/isr_wrapper.S

@@ -15,37 +15,24 @@
 
 #include <offsets_short.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <sw_isr_table.h>
 #include <kernel_structs.h>
 #include <arch/cpu.h>
-#include <swap_macros.h>
 
 GTEXT(_isr_wrapper)
 GTEXT(_isr_demux)
 
-GDATA(exc_nest_count)
-SECTION_VAR(BSS, exc_nest_count)
-	.balign 4
-	.word 0
-
-
 #if CONFIG_RGF_NUM_BANKS == 1
 GDATA(saved_r0)
 
+	.balign 4
 SECTION_VAR(BSS, saved_r0)
-	.balign 4
-	.word 0
-#else
-GDATA(saved_sp)
-
-SECTION_VAR(BSS, saved_sp)
-	.balign 4
-	.word 0
+        .word 0
 #endif
 
 #if defined(CONFIG_SYS_POWER_MANAGEMENT)
-GTEXT(z_sys_power_save_idle_exit)
+GTEXT(_sys_power_save_idle_exit)
 #endif
 
 /*
@@ -95,7 +82,7 @@ The context switch code adopts this standard so that it is easier to follow:
     transition from outgoing thread to incoming thread
 
 Not loading _kernel into r0 allows loading _kernel without stomping on
-the parameter in r0 in z_swap().
+the parameter in r0 in _Swap().
 
 
 ARCv2 processors have two kinds of interrupts: fast (FIRQ) and regular. The
@@ -121,8 +108,8 @@ registers (to avoid stack accesses). It is possible to register a FIRQ
 handler that operates outside of the kernel, but care must be taken to only
 use instructions that only use the banked registers.
 
-The kernel is able to handle transitions to and from FIRQ, RIRQ and threads.
-The contexts are saved 'lazily': the minimum amount of work is
+The kernel is able to handle transitions to and from FIRQ, RIRQ and threads
+(fibers/task). The contexts are saved 'lazily': the minimum amount of work is
 done upfront, and the rest is done when needed:
 
 o RIRQ
@@ -130,7 +117,7 @@ o RIRQ
   All needed regisers to run C code in the ISR are saved automatically
   on the outgoing thread's stack: loop, status32, pc, and the caller-
   saved GPRs. That stack frame layout is pre-determined. If returning
-  to a thread, the stack is popped and no registers have to be saved by
+  to a fiber, the stack is popped and no registers have to be saved by
   the kernel. If a context switch is required, the callee-saved GPRs
   are then saved in the thread control structure (TCS).
 
@@ -152,7 +139,7 @@ o FIRQ
   During early initialization, the sp in the 2nd register bank is made to
   refer to _firq_stack. This allows for the FIRQ handler to use its own stack.
   GPRs are banked, loop registers are saved in unused callee saved regs upon
-  interrupt entry. If returning to a thread, loop registers are restored and the
+  interrupt entry. If returning to a fiber, loop registers are restored and the
   CPU switches back to bank 0 for the GPRs. If a context switch is
   needed, at this point only are all the registers saved. First, a
   stack frame with the same layout as the automatic RIRQ one is created
@@ -195,7 +182,7 @@ From FIRQ:
 
   o to coop
 
-    The address of the returning instruction from z_swap() is loaded in ilink and
+    The address of the returning instruction from _Swap() is loaded in ilink and
     the saved status32 in status32_p0, taking care to adjust the interrupt lock
     state desired in status32_p0. The return value is put in r0.
 
@@ -230,7 +217,6 @@ From RIRQ:
  */
 
 SECTION_FUNC(TEXT, _isr_wrapper)
-#if CONFIG_ARC_FIRQ
 #if CONFIG_RGF_NUM_BANKS == 1
 	st r0,[saved_r0]
 #endif
@@ -244,14 +230,6 @@ SECTION_FUNC(TEXT, _isr_wrapper)
 	push_s r0
 	mov r0,ilink
 	push_s r0
-#ifdef CONFIG_CODE_DENSITY
-	lr r0, [_ARC_V2_JLI_BASE]
-	push_s r0
-	lr r0, [_ARC_V2_LDI_BASE]
-	push_s r0
-	lr r0, [_ARC_V2_EI_BASE]
-	push_s r0
-#endif
 	mov r0,lp_count
 	push_s r0
 	lr r0, [_ARC_V2_LP_START]
@@ -288,20 +266,30 @@ rirq_path:
 	mov.nz r2, _rirq_enter
 	j_s [r2]
 #endif
-#else
-	mov r3, _rirq_exit
-	mov r2, _rirq_enter
-	j_s [r2]
-#endif
 
-#if defined(CONFIG_TRACING)
-GTEXT(z_sys_trace_isr_enter)
+#ifdef CONFIG_KERNEL_EVENT_LOGGER_SLEEP
+GTEXT(_sys_k_event_logger_exit_sleep)
+
+.macro log_sleep_k_event
+	clri r0 /* do not interrupt event logger operations */
+	push_s r0
+	push_s blink
+	jl _sys_k_event_logger_exit_sleep
+	pop_s blink
+	pop_s r0
+	seti r0
+.endm
+#else
+	#define log_sleep_k_event
+#endif
+#if defined(CONFIG_KERNEL_EVENT_LOGGER_INTERRUPT)
+GTEXT(_sys_k_event_logger_interrupt)
 
 .macro log_interrupt_k_event
 	clri r0 /* do not interrupt event logger operations */
 	push_s r0
 	push_s blink
-	jl z_sys_trace_isr_enter
+	jl _sys_k_event_logger_interrupt
 	pop_s blink
 	pop_s r0
 	seti r0
@@ -321,7 +309,7 @@ GTEXT(z_sys_trace_isr_enter)
 
 	st 0, [r1, _kernel_offset_to_idle] /* zero idle duration */
 	push_s blink
-	jl z_sys_power_save_idle_exit
+	jl _sys_power_save_idle_exit
 	pop_s blink
 
 _skip_sys_power_save_idle_exit:
@@ -337,34 +325,19 @@ _skip_sys_power_save_idle_exit:
 SECTION_FUNC(TEXT, _isr_demux)
 	push_s r3
 
-#ifdef CONFIG_EXECUTION_BENCHMARKING
-	bl read_timer_start_of_isr
-#endif
 	/* cannot be done before this point because we must be able to run C */
 	/* r0 is available to be stomped here, and exit_tickless_idle uses it */
 	exit_tickless_idle
 	log_interrupt_k_event
+	log_sleep_k_event
 
 	lr r0, [_ARC_V2_ICAUSE]
-	/* handle software triggered interrupt */
-	lr r3, [_ARC_V2_AUX_IRQ_HINT]
-	brne r3, r0, irq_hint_handled
-	sr 0, [_ARC_V2_AUX_IRQ_HINT]
-irq_hint_handled:
-
 	sub r0, r0, 16
 
 	mov r1, _sw_isr_table
 	add3 r0, r1, r0   /* table entries are 8-bytes wide */
 
 	ld_s r1, [r0, 4] /* ISR into r1 */
-#ifdef CONFIG_EXECUTION_BENCHMARKING
-	push_s r0
-	push_s r1
-	bl read_timer_end_of_isr
-	pop_s r1
-	pop_s r0
-#endif
 	jl_s.d [r1]
 	ld_s r0, [r0] /* delay slot: ISR parameter into r0  */
 

arch/arc/core/mpu/CMakeLists.txt

@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0
-
-zephyr_library()
-
-zephyr_library_sources_if_kconfig(arc_core_mpu.c)
-zephyr_library_sources_if_kconfig(arc_mpu.c)

arch/arc/core/mpu/Kconfig

@@ -1,35 +0,0 @@
-# Kconfig - Memory Protection Unit (MPU) configuration options
-
-#
-# Copyright (c) 2017 Synopsys
-#
-# SPDX-License-Identifier: Apache-2.0
-#
-config ARC_MPU_VER
-	int "ARC MPU version"
-	range 2 4
-	default 2
-	help
-	  ARC MPU has several versions. For MPU v2, the minimum region is 2048 bytes;
-	  For MPU v3, the minimum region is 32 bytes
-
-config ARC_CORE_MPU
-	bool "ARC Core MPU functionalities"
-	help
-	  ARC core MPU functionalities
-
-config MPU_STACK_GUARD
-	bool "Thread Stack Guards"
-	depends on ARC_CORE_MPU
-	help
-	  Enable thread stack guards via MPU. ARC supports built-in stack protection.
-	  If your core supports that, it is preferred over MPU stack guard
-
-config ARC_MPU
-	bool "ARC MPU Support"
-	select ARC_CORE_MPU
-	select THREAD_STACK_INFO
-	select MEMORY_PROTECTION
-	select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if ARC_MPU_VER = 2
-	help
-	  Target has ARC MPU (currently only works for EMSK 2.2/2.3 ARCEM7D)

arch/arc/core/mpu/arc_core_mpu.c

@@ -1,79 +0,0 @@
-/*
- * Copyright (c) 2017 Synopsys.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <device.h>
-#include <init.h>
-#include <kernel.h>
-#include <soc.h>
-#include <arch/arc/v2/mpu/arc_core_mpu.h>
-
-/*
- * @brief Configure MPU for the thread
- *
- * This function configures per thread memory map reprogramming the MPU.
- *
- * @param thread thread info data structure.
- */
-void configure_mpu_thread(struct k_thread *thread)
-{
-	arc_core_mpu_disable();
-	arc_core_mpu_configure_thread(thread);
-	arc_core_mpu_enable();
-}
-
-#if defined(CONFIG_USERSPACE)
-
-int z_arch_mem_domain_max_partitions_get(void)
-{
-	return arc_core_mpu_get_max_domain_partition_regions();
-}
-
-/*
- * Reset MPU region for a single memory partition
- */
-void z_arch_mem_domain_partition_remove(struct k_mem_domain *domain,
-				       u32_t partition_id)
-{
-	arc_core_mpu_disable();
-	arc_core_mpu_remove_mem_partition(domain, partition_id);
-	arc_core_mpu_enable();
-}
-
-/*
- * Configure MPU memory domain
- */
-void z_arch_mem_domain_configure(struct k_thread *thread)
-{
-	arc_core_mpu_disable();
-	arc_core_mpu_configure_mem_domain(thread);
-	arc_core_mpu_enable();
-}
-
-/*
- * Destroy MPU regions for the mem domain
- */
-void z_arch_mem_domain_destroy(struct k_mem_domain *domain)
-{
-	arc_core_mpu_disable();
-	arc_core_mpu_remove_mem_domain(domain);
-	arc_core_mpu_enable();
-}
-
-void _arch_mem_domain_partition_add(struct k_mem_domain *domain,
-				    u32_t partition_id)
-{
-	/* No-op on this architecture */
-}
-
-/*
- * Validate the given buffer is user accessible or not
- */
-int z_arch_buffer_validate(void *addr, size_t size, int write)
-{
-	return arc_core_mpu_buffer_validate(addr, size, write);
-}
-
-#endif

arch/arc/core/mpu/arc_mpu.c

@@ -1,59 +0,0 @@
-/*
- * Copyright (c) 2019 Synopsys.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <device.h>
-#include <init.h>
-#include <kernel.h>
-#include <soc.h>
-#include <arch/arc/v2/aux_regs.h>
-#include <arch/arc/v2/mpu/arc_mpu.h>
-#include <arch/arc/v2/mpu/arc_core_mpu.h>
-#include <linker/linker-defs.h>
-
-#define LOG_LEVEL CONFIG_MPU_LOG_LEVEL
-#include <logging/log.h>
-LOG_MODULE_REGISTER(mpu);
-
-/**
- * @brief Get the number of supported MPU regions
- *
- */
-static inline u8_t get_num_regions(void)
-{
-	u32_t num = z_arc_v2_aux_reg_read(_ARC_V2_MPU_BUILD);
-
-	num = (num & 0xFF00U) >> 8U;
-
-	return (u8_t)num;
-}
-
-/**
- * This internal function is utilized by the MPU driver to parse the intent
- * type (i.e. THREAD_STACK_REGION) and return the correct parameter set.
- */
-static inline u32_t get_region_attr_by_type(u32_t type)
-{
-	switch (type) {
-	case THREAD_STACK_USER_REGION:
-		return REGION_RAM_ATTR;
-	case THREAD_STACK_REGION:
-		return AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR;
-	case THREAD_APP_DATA_REGION:
-		return REGION_RAM_ATTR;
-	case THREAD_STACK_GUARD_REGION:
-		/* no Write and Execute to guard region */
-		return AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR;
-	default:
-		/* unknown type */
-		return 0;
-	}
-}
-
-#if CONFIG_ARC_MPU_VER == 2
-#include "arc_mpu_v2_internal.h"
-#elif CONFIG_ARC_MPU_VER == 3
-#include "arc_mpu_v3_internal.h"
-#endif

arch/arc/core/mpu/arc_mpu_v2_internal.h

@@ -1,479 +0,0 @@
-/*
- * Copyright (c) 2019 Synopsys.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#ifndef ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V2_INTERNAL_H_
-#define ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V2_INTERNAL_H_
-
-#define AUX_MPU_RDB_VALID_MASK (0x1)
-#define AUX_MPU_EN_ENABLE   (0x40000000)
-#define AUX_MPU_EN_DISABLE  (0xBFFFFFFF)
-
-#define AUX_MPU_RDP_REGION_SIZE(bits) \
-	(((bits - 1) & 0x3) | (((bits - 1) & 0x1C) << 7))
-
-#define AUX_MPU_RDP_ATTR_MASK (0x1FC)
-#define AUX_MPU_RDP_SIZE_MASK (0xE03)
-
-#define _ARC_V2_MPU_EN   (0x409)
-#define _ARC_V2_MPU_RDB0 (0x422)
-#define _ARC_V2_MPU_RDP0 (0x423)
-
-/* For MPU version 2, the minimum protection region size is 2048 bytes */
-#define ARC_FEATURE_MPU_ALIGNMENT_BITS 11
-
-/**
- * This internal function initializes a MPU region
- */
-static inline void _region_init(u32_t index, u32_t region_addr, u32_t size,
-				u32_t region_attr)
-{
-	u8_t bits = find_msb_set(size) - 1;
-
-	index = index * 2U;
-
-	if (bits < ARC_FEATURE_MPU_ALIGNMENT_BITS) {
-		bits = ARC_FEATURE_MPU_ALIGNMENT_BITS;
-	}
-
-	if ((1 << bits) < size) {
-		bits++;
-	}
-
-	if (size > 0) {
-		region_attr &= ~(AUX_MPU_RDP_SIZE_MASK);
-		region_attr |= AUX_MPU_RDP_REGION_SIZE(bits);
-		region_addr |= AUX_MPU_RDB_VALID_MASK;
-	} else {
-		region_addr = 0U;
-	}
-
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDP0 + index, region_attr);
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDB0 + index, region_addr);
-}
-
-/**
- * This internal function is utilized by the MPU driver to parse the intent
- * type (i.e. THREAD_STACK_REGION) and return the correct region index.
- */
-static inline int get_region_index_by_type(u32_t type)
-{
-	/*
-	 * The new MPU regions are allocated per type after the statically
-	 * configured regions. The type is one-indexed rather than
-	 * zero-indexed.
-	 *
-	 * For ARC MPU v2, the smaller index has higher priority, so the
-	 * index is allocated in reverse order. Static regions start from
-	 * the biggest index, then thread related regions.
-	 *
-	 */
-	switch (type) {
-	case THREAD_STACK_USER_REGION:
-		return get_num_regions() - mpu_config.num_regions
-		       - THREAD_STACK_REGION;
-	case THREAD_STACK_REGION:
-	case THREAD_APP_DATA_REGION:
-	case THREAD_STACK_GUARD_REGION:
-		return get_num_regions() - mpu_config.num_regions - type;
-	case THREAD_DOMAIN_PARTITION_REGION:
-#if defined(CONFIG_MPU_STACK_GUARD)
-		return get_num_regions() - mpu_config.num_regions - type;
-#else
-		/*
-		 * Start domain partition region from stack guard region
-		 * since stack guard is not enabled.
-		 */
-		return get_num_regions() - mpu_config.num_regions - type + 1;
-#endif
-	default:
-		__ASSERT(0, "Unsupported type");
-		return -EINVAL;
-	}
-}
-
-/**
- * This internal function checks if region is enabled or not
- */
-static inline bool _is_enabled_region(u32_t r_index)
-{
-	return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDB0 + r_index * 2U)
-		 & AUX_MPU_RDB_VALID_MASK) == AUX_MPU_RDB_VALID_MASK);
-}
-
-/**
- * This internal function check if the given buffer in in the region
- */
-static inline bool _is_in_region(u32_t r_index, u32_t start, u32_t size)
-{
-	u32_t r_addr_start;
-	u32_t r_addr_end;
-	u32_t r_size_lshift;
-
-	r_addr_start = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDB0 + r_index * 2U)
-		       & (~AUX_MPU_RDB_VALID_MASK);
-	r_size_lshift = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDP0 + r_index * 2U)
-			& AUX_MPU_RDP_SIZE_MASK;
-	r_size_lshift = (r_size_lshift & 0x3) | ((r_size_lshift >> 7) & 0x1C);
-	r_addr_end = r_addr_start  + (1 << (r_size_lshift + 1));
-
-	if (start >= r_addr_start && (start + size) <= r_addr_end) {
-		return 1;
-	}
-
-	return 0;
-}
-
-/**
- * This internal function check if the region is user accessible or not
- */
-static inline bool _is_user_accessible_region(u32_t r_index, int write)
-{
-	u32_t r_ap;
-
-	r_ap = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDP0 + r_index * 2U);
-
-	r_ap &= AUX_MPU_RDP_ATTR_MASK;
-
-	if (write) {
-		return ((r_ap & (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW)) ==
-			(AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW));
-	}
-
-	return ((r_ap & (AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR)) ==
-		(AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR));
-}
-
-/**
- * @brief configure the base address and size for an MPU region
- *
- * @param type MPU region type
- * @param base base address in RAM
- * @param size size of the region
- */
-static inline int _mpu_configure(u8_t type, u32_t base, u32_t size)
-{
-	s32_t region_index =  get_region_index_by_type(type);
-	u32_t region_attr = get_region_attr_by_type(type);
-
-	LOG_DBG("Region info: 0x%x 0x%x", base, size);
-
-	if (region_attr == 0U || region_index < 0) {
-		return -EINVAL;
-	}
-
-	/*
-	 * For ARC MPU v2, MPU regions can be overlapped, smaller
-	 * region index has higher priority.
-	 */
-	_region_init(region_index, base, size, region_attr);
-
-	return 0;
-}
-
-/* ARC Core MPU Driver API Implementation for ARC MPUv2 */
-
-/**
- * @brief enable the MPU
- */
-void arc_core_mpu_enable(void)
-{
-	/* Enable MPU */
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN,
-		z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) | AUX_MPU_EN_ENABLE);
-}
-
-/**
- * @brief disable the MPU
- */
-void arc_core_mpu_disable(void)
-{
-	/* Disable MPU */
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN,
-		z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) & AUX_MPU_EN_DISABLE);
-}
-
-/**
- * @brief configure the thread's MPU regions
- *
- * @param thread the target thread
- */
-void arc_core_mpu_configure_thread(struct k_thread *thread)
-{
-
-#if defined(CONFIG_MPU_STACK_GUARD)
-#if defined(CONFIG_USERSPACE)
-	if ((thread->base.user_options & K_USER) != 0) {
-		/* the areas before and after the user stack of thread is
-		 * kernel only. These area can be used as stack guard.
-		 * -----------------------
-		 * |  kernel only area   |
-		 * |---------------------|
-		 * |  user stack         |
-		 * |---------------------|
-		 * |privilege stack guard|
-		 * |---------------------|
-		 * |  privilege stack    |
-		 * -----------------------
-		 */
-		if (_mpu_configure(THREAD_STACK_GUARD_REGION,
-			thread->arch.priv_stack_start - STACK_GUARD_SIZE,
-			STACK_GUARD_SIZE) < 0) {
-			LOG_ERR("thread %p's stack guard failed", thread);
-			return;
-		}
-	} else {
-		if (_mpu_configure(THREAD_STACK_GUARD_REGION,
-			thread->stack_info.start - STACK_GUARD_SIZE,
-			STACK_GUARD_SIZE) < 0) {
-			LOG_ERR("thread %p's stack guard failed", thread);
-			return;
-		}
-	}
-#else
-	if (_mpu_configure(THREAD_STACK_GUARD_REGION,
-		thread->stack_info.start - STACK_GUARD_SIZE,
-		STACK_GUARD_SIZE) < 0) {
-		LOG_ERR("thread %p's stack guard failed", thread);
-		return;
-	}
-#endif
-#endif
-
-#if defined(CONFIG_USERSPACE)
-	/* configure stack region of user thread */
-	if (thread->base.user_options & K_USER) {
-		LOG_DBG("configure user thread %p's stack", thread);
-		if (_mpu_configure(THREAD_STACK_USER_REGION,
-		(u32_t)thread->stack_obj, thread->stack_info.size) < 0) {
-			LOG_ERR("user thread %p's stack failed", thread);
-			return;
-		}
-	}
-
-	LOG_DBG("configure thread %p's domain", thread);
-	arc_core_mpu_configure_mem_domain(thread);
-#endif
-}
-
-
-/**
- * @brief configure the default region
- *
- * @param region_attr region attribute of default region
- */
-void arc_core_mpu_default(u32_t region_attr)
-{
-	u32_t val =  z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) &
-		    (~AUX_MPU_RDP_ATTR_MASK);
-
-	region_attr &= AUX_MPU_RDP_ATTR_MASK;
-
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, region_attr | val);
-}
-
-/**
- * @brief configure the MPU region
- *
- * @param index   MPU region index
- * @param base    base address
- * @param region_attr region attribute
- */
-int arc_core_mpu_region(u32_t index, u32_t base, u32_t size,
-			 u32_t region_attr)
-{
-	if (index >= get_num_regions()) {
-		return -EINVAL;
-	}
-
-	region_attr &= AUX_MPU_RDP_ATTR_MASK;
-
-	_region_init(index, base, size, region_attr);
-
-	return 0;
-}
-
-#if defined(CONFIG_USERSPACE)
-
-/**
- * @brief configure MPU regions for the memory partitions of the memory domain
- *
- * @param thread the thread which has memory domain
- */
-void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
-{
-	int region_index =
-		get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
-	u32_t num_partitions;
-	struct k_mem_partition *pparts;
-	struct k_mem_domain *mem_domain = NULL;
-
-	if (thread) {
-		mem_domain = thread->mem_domain_info.mem_domain;
-	}
-
-	if (mem_domain) {
-		LOG_DBG("configure domain: %p", mem_domain);
-		num_partitions = mem_domain->num_partitions;
-		pparts = mem_domain->partitions;
-	} else {
-		LOG_DBG("disable domain partition regions");
-		num_partitions = 0U;
-		pparts = NULL;
-	}
-
-	for (; region_index >= 0; region_index--) {
-		if (num_partitions) {
-			LOG_DBG("set region 0x%x 0x%x 0x%x",
-				region_index, pparts->start, pparts->size);
-			_region_init(region_index, pparts->start,
-			 pparts->size, pparts->attr);
-			num_partitions--;
-		} else {
-			/* clear the left mpu entries */
-			_region_init(region_index, 0, 0, 0);
-		}
-		pparts++;
-	}
-}
-
-/**
- * @brief remove MPU regions for the memory partitions of the memory domain
- *
- * @param mem_domain the target memory domain
- */
-void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain)
-{
-	ARG_UNUSED(mem_domain);
-
-	int region_index =
-		get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
-
-	for (; region_index >= 0; region_index--) {
-		_region_init(region_index, 0, 0, 0);
-	}
-}
-
-/**
- * @brief reset MPU region for a single memory partition
- *
- * @param domain  the target memory domain
- * @param partition_id  memory partition id
- */
-void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain,
-			u32_t part_id)
-{
-	ARG_UNUSED(domain);
-
-	int region_index =
-		get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
-
-	LOG_DBG("disable region 0x%x", region_index + part_id);
-	/* Disable region */
-	_region_init(region_index + part_id, 0, 0, 0);
-}
-
-/**
- * @brief get the maximum number of free regions for memory domain partitions
- */
-int arc_core_mpu_get_max_domain_partition_regions(void)
-{
-	return get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION) + 1;
-}
-
-/**
- * @brief validate the given buffer is user accessible or not
- */
-int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
-{
-	int r_index;
-
-	/*
-	 * For ARC MPU v2, smaller region number takes priority.
-	 * we can stop the iteration immediately once we find the
-	 * matched region that grants permission or denies access.
-	 *
-	 */
-	for (r_index = 0; r_index < get_num_regions(); r_index++) {
-		if (!_is_enabled_region(r_index) ||
-		    !_is_in_region(r_index, (u32_t)addr, size)) {
-			continue;
-		}
-
-		if (_is_user_accessible_region(r_index, write)) {
-			return 0;
-		} else {
-			return -EPERM;
-		}
-	}
-
-	return -EPERM;
-}
-#endif /* CONFIG_USERSPACE */
-
-/* ARC MPU Driver Initial Setup */
-/*
- * @brief MPU default initialization and configuration
- *
- * This function provides the default configuration mechanism for the Memory
- * Protection Unit (MPU).
- */
-static int arc_mpu_init(struct device *arg)
-{
-	ARG_UNUSED(arg);
-
-	u32_t num_regions;
-	u32_t i;
-
-	num_regions = get_num_regions();
-
-	/* ARC MPU supports up to 16 Regions */
-	if (mpu_config.num_regions > num_regions) {
-		__ASSERT(0,
-		"Request to configure: %u regions (supported: %u)\n",
-		mpu_config.num_regions, num_regions);
-		return -EINVAL;
-	}
-
-	/* Disable MPU */
-	arc_core_mpu_disable();
-
-	int r_index;
-	/*
-	 * the MPU regions are filled in the reverse order.
-	 * According to ARCv2 ISA, the MPU region with smaller
-	 * index has higher priority. The static background MPU
-	 * regions in mpu_config will be in the bottom. Then
-	 * the special type regions will be above.
-	 *
-	 */
-	r_index = num_regions - mpu_config.num_regions;
-
-	/* clear all the regions first */
-	for (i = 0U; i < r_index; i++) {
-		_region_init(i, 0, 0, 0);
-	}
-
-	/* configure the static regions */
-	for (i = 0U; i < mpu_config.num_regions; i++) {
-		_region_init(r_index,
-			     mpu_config.mpu_regions[i].base,
-			     mpu_config.mpu_regions[i].size,
-			     mpu_config.mpu_regions[i].attr);
-		r_index++;
-	}
-
-	/* default region: no read, write and execute */
-	arc_core_mpu_default(0);
-
-	/* Enable MPU */
-	arc_core_mpu_enable();
-
-	return 0;
-}
-
-SYS_INIT(arc_mpu_init, PRE_KERNEL_1,
-	 CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
-
-#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V2_INTERNAL_H_ */

arch/arc/core/mpu/arc_mpu_v3_internal.h

@@ -1,677 +0,0 @@
-/*
- * Copyright (c) 2019 Synopsys.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#ifndef ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V3_INTERNAL_H_
-#define ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V3_INTERNAL_H_
-
-#define AUX_MPU_RPER_SID1       0x10000
-/* valid mask: SID1+secure+valid */
-#define AUX_MPU_RPER_VALID_MASK ((0x1) | AUX_MPU_RPER_SID1 | AUX_MPU_ATTR_S)
-
-#define AUX_MPU_RPER_ATTR_MASK (0x1FF)
-
-#define _ARC_V2_MPU_EN   (0x409)
-
-/* aux regs added in MPU version 3 */
-#define _ARC_V2_MPU_INDEX       (0x448) /* MPU index */
-#define _ARC_V2_MPU_RSTART      (0x449) /* MPU region start address */
-#define _ARC_V2_MPU_REND        (0x44A) /* MPU region end address */
-#define _ARC_V2_MPU_RPER        (0x44B) /* MPU region permission register */
-#define _ARC_V2_MPU_PROBE       (0x44C) /* MPU probe register */
-
-
-/* For MPU version 3, the minimum protection region size is 32 bytes */
-#define ARC_FEATURE_MPU_ALIGNMENT_BITS 5
-
-#define CALC_REGION_END_ADDR(start, size) \
-	(start + size - (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS))
-
-#if defined(CONFIG_USERSPACE) && defined(CONFIG_MPU_STACK_GUARD)
-/* 1 for stack guard , 1 for user thread, 1 for split */
-#define MPU_REGION_NUM_FOR_THREAD 3
-#elif defined(CONFIG_USERSPACE) || defined(CONFIG_MPU_STACK_GUARD)
-/* 1 for stack guard or user thread stack , 1 for split */
-#define MPU_REGION_NUM_FOR_THREAD 2
-#else
-#define MPU_REGION_NUM_FOR_THREAD 0
-#endif
-
-/**
- * @brief internal structure holding information of
- * memory areas where dynamic MPU programming is allowed.
- */
-struct dynamic_region_info {
-	u8_t index;
-	u32_t base;
-	u32_t size;
-	u32_t attr;
-};
-
-#define MPU_DYNAMIC_REGION_AREAS_NUM 2
-
-static u8_t static_regions_num;
-static u8_t dynamic_regions_num;
-static u8_t dynamic_region_index;
-
-/**
- * Global array, holding the MPU region index of
- * the memory region inside which dynamic memory
- * regions may be configured.
- */
-static struct dynamic_region_info dyn_reg_info[MPU_DYNAMIC_REGION_AREAS_NUM];
-
-static inline void _region_init(u32_t index, u32_t region_addr, u32_t size,
-				u32_t region_attr)
-{
-	if (size < (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS)) {
-		size = (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS);
-	}
-
-	if (region_attr) {
-		region_attr &= AUX_MPU_RPER_ATTR_MASK;
-		region_attr |=  AUX_MPU_RPER_VALID_MASK;
-	}
-
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_RSTART, region_addr);
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_REND,
-			      CALC_REGION_END_ADDR(region_addr, size));
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, region_attr);
-}
-
-static inline void _region_set_attr(u32_t index, u32_t attr)
-{
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, attr |
-				 AUX_MPU_RPER_VALID_MASK);
-}
-
-static inline u32_t _region_get_attr(u32_t index)
-{
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
-
-	return z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER);
-}
-
-static inline u32_t _region_get_start(u32_t index)
-{
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
-
-	return z_arc_v2_aux_reg_read(_ARC_V2_MPU_RSTART);
-}
-
-static inline void _region_set_start(u32_t index, u32_t start)
-{
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_RSTART, start);
-}
-
-static inline u32_t _region_get_end(u32_t index)
-{
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
-
-	return z_arc_v2_aux_reg_read(_ARC_V2_MPU_REND) +
-		(1 << ARC_FEATURE_MPU_ALIGNMENT_BITS);
-}
-
-static inline void _region_set_end(u32_t index, u32_t end)
-{
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_REND, end -
-		(1 << ARC_FEATURE_MPU_ALIGNMENT_BITS));
-}
-
-/**
- * This internal function probes the given addr's MPU index.if not
- * in MPU, returns error
- */
-static inline int _mpu_probe(u32_t addr)
-{
-	u32_t val;
-
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_PROBE, addr);
-	val = z_arc_v2_aux_reg_read(_ARC_V2_MPU_INDEX);
-
-	/* if no match or multiple regions match, return error */
-	if (val & 0xC0000000) {
-		return -EINVAL;
-	} else {
-		return val;
-	}
-}
-
-/**
- * This internal function allocates a dynamic MPU region and returns
- * the index or error
- */
-static inline int _dynamic_region_allocate_index(void)
-{
-	if (dynamic_region_index >= get_num_regions()) {
-		LOG_ERR("no enough mpu entries %d", dynamic_region_index);
-		return -EINVAL;
-	}
-
-	return dynamic_region_index++;
-}
-
-/**
- * This internal function checks if MPU region is enabled or not
- */
-static inline bool _is_enabled_region(u32_t r_index)
-{
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index);
-	return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER) &
-		 AUX_MPU_RPER_VALID_MASK) == AUX_MPU_RPER_VALID_MASK);
-}
-
-/**
- * This internal function checks the area given by (start, size)
- * and returns the index if the area match one MPU entry
- */
-static inline int _get_region_index(u32_t start, u32_t size)
-{
-	int index = _mpu_probe(start);
-
-	if (index > 0 && index == _mpu_probe(start + size - 1)) {
-		return index;
-	}
-
-	return -EINVAL;
-}
-
-/**
- * This internal function check if the region is user accessible or not
- */
-static inline bool _is_user_accessible_region(u32_t r_index, int write)
-{
-	u32_t r_ap;
-
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index);
-	r_ap = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER);
-	r_ap &= AUX_MPU_RPER_ATTR_MASK;
-
-	if (write) {
-		return ((r_ap & (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW)) ==
-			(AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW));
-	}
-
-	return ((r_ap & (AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR)) ==
-		(AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR));
-}
-
-/* @brief allocate and init a dynamic MPU region
- *
- * This internal function performs the allocation and initialization of
- * a dynamic MPU region
- *
- * @param base region base
- * @param size region size
- * @param attr region attribute
- * @return  <0 failure, >0  allocated dynamic region index
- */
-static int _dynamic_region_allocate_and_init(u32_t base, u32_t size,
-	 u32_t attr)
-{
-	int u_region_index = _get_region_index(base, size);
-	int region_index;
-
-	LOG_DBG("Region info: base 0x%x size 0x%x attr 0x%x", base, size, attr);
-
-	if (u_region_index == -EINVAL) {
-		/* no underlying region */
-
-		region_index = _dynamic_region_allocate_index();
-
-		if (region_index > 0) {
-		/* a new region */
-			_region_init(region_index, base, size, attr);
-		}
-
-		return region_index;
-	}
-
-	/*
-	 * The new memory region is to be placed inside the underlying
-	 * region, possibly splitting the underlying region into two.
-	 */
-
-	u32_t u_region_start = _region_get_start(u_region_index);
-	u32_t u_region_end = _region_get_end(u_region_index);
-	u32_t u_region_attr = _region_get_attr(u_region_index);
-	u32_t end = base + size;
-
-
-	if ((base == u_region_start) && (end == u_region_end)) {
-		/* The new region overlaps entirely with the
-		 * underlying region. In this case we simply
-		 * update the partition attributes of the
-		 * underlying region with those of the new
-		 * region.
-		 */
-		_region_init(u_region_index, base, size, attr);
-		region_index = u_region_index;
-	} else if (base == u_region_start) {
-		/* The new region starts exactly at the start of the
-		 * underlying region; the start of the underlying
-		 * region needs to be set to the end of the new region.
-		 */
-		_region_set_start(u_region_index, base + size);
-		_region_set_attr(u_region_index, u_region_attr);
-
-		region_index = _dynamic_region_allocate_index();
-
-		if (region_index > 0) {
-			_region_init(region_index, base, size, attr);
-		}
-
-	} else if (end == u_region_end) {
-		/* The new region ends exactly at the end of the
-		 * underlying region; the end of the underlying
-		 * region needs to be set to the start of the
-		 * new region.
-		 */
-		_region_set_end(u_region_index, base);
-		_region_set_attr(u_region_index, u_region_attr);
-
-		region_index = _dynamic_region_allocate_index();
-
-		if (region_index > 0) {
-			_region_init(region_index, base, size, attr);
-		}
-
-	} else {
-		/* The new region lies strictly inside the
-		 * underlying region, which needs to split
-		 * into two regions.
-		 */
-
-		_region_set_end(u_region_index, base);
-		_region_set_attr(u_region_index, u_region_attr);
-
-		region_index = _dynamic_region_allocate_index();
-
-		if (region_index > 0) {
-			_region_init(region_index, base, size, attr);
-
-			region_index = _dynamic_region_allocate_index();
-
-			if (region_index > 0) {
-				_region_init(region_index, base + size,
-				 u_region_end - end, u_region_attr);
-			}
-		}
-	}
-
-	return region_index;
-}
-
-/* @brief reset the dynamic MPU regions
- *
- * This internal function performs the reset of dynamic MPU regions
- */
-static void _mpu_reset_dynamic_regions(void)
-{
-	u32_t i;
-	u32_t num_regions = get_num_regions();
-
-	for (i = static_regions_num; i < num_regions; i++) {
-		_region_init(i, 0, 0, 0);
-	}
-
-	for (i = 0U; i < dynamic_regions_num; i++) {
-		_region_init(
-			dyn_reg_info[i].index,
-			dyn_reg_info[i].base,
-			dyn_reg_info[i].size,
-			dyn_reg_info[i].attr);
-	}
-
-	/* dynamic regions are after static regions */
-	dynamic_region_index = static_regions_num;
-}
-
-/**
- * @brief configure the base address and size for an MPU region
- *
- * @param   type    MPU region type
- * @param   base    base address in RAM
- * @param   size    size of the region
- */
-static inline int _mpu_configure(u8_t type, u32_t base, u32_t size)
-{
-	u32_t region_attr = get_region_attr_by_type(type);
-
-	return _dynamic_region_allocate_and_init(base, size, region_attr);
-}
-
-/* ARC Core MPU Driver API Implementation for ARC MPUv3 */
-
-/**
- * @brief enable the MPU
- */
-void arc_core_mpu_enable(void)
-{
-#define MPU_ENABLE_ATTR   0
-	arc_core_mpu_default(MPU_ENABLE_ATTR);
-}
-
-/**
- * @brief disable the MPU
- */
-void arc_core_mpu_disable(void)
-{
-	/* MPU is always enabled, use default region to
-	 * simulate MPU disable
-	 */
-	arc_core_mpu_default(REGION_ALL_ATTR);
-}
-
-/**
- * @brief configure the thread's mpu regions
- *
- * @param thread the target thread
- */
-void arc_core_mpu_configure_thread(struct k_thread *thread)
-{
-/* the mpu entries of ARC MPUv3 are divided into 2 parts:
- * static entries: global mpu entries, not changed in context switch
- * dynamic entries: MPU entries changed in context switch and
- * memory domain configure, including:
- *    MPU entries for user thread stack
- *    MPU entries for stack guard
- *    MPU entries for mem domain
- *    MPU entries for other thread specific regions
- * before configuring thread specific mpu entries, need to reset dynamic
- * entries
- */
-	_mpu_reset_dynamic_regions();
-#if defined(CONFIG_MPU_STACK_GUARD)
-#if defined(CONFIG_USERSPACE)
-	if ((thread->base.user_options & K_USER) != 0U) {
-		/* the areas before and after the user stack of thread is
-		 * kernel only. These area can be used as stack guard.
-		 * -----------------------
-		 * |  kernel only area   |
-		 * |---------------------|
-		 * |  user stack         |
-		 * |---------------------|
-		 * |privilege stack guard|
-		 * |---------------------|
-		 * |  privilege stack    |
-		 * -----------------------
-		 */
-		if (_mpu_configure(THREAD_STACK_GUARD_REGION,
-			thread->arch.priv_stack_start - STACK_GUARD_SIZE,
-			STACK_GUARD_SIZE) < 0) {
-			LOG_ERR("thread %p's stack guard failed", thread);
-			return;
-		}
-	} else {
-		if (_mpu_configure(THREAD_STACK_GUARD_REGION,
-			thread->stack_info.start - STACK_GUARD_SIZE,
-			STACK_GUARD_SIZE) < 0) {
-			LOG_ERR("thread %p's stack guard failed", thread);
-			return;
-		}
-	}
-#else
-	if (_mpu_configure(THREAD_STACK_GUARD_REGION,
-		thread->stack_info.start - STACK_GUARD_SIZE,
-		STACK_GUARD_SIZE) < 0) {
-		LOG_ERR("thread %p's stack guard failed", thread);
-		return;
-	}
-#endif
-#endif
-
-#if defined(CONFIG_USERSPACE)
-	u32_t num_partitions;
-	struct k_mem_partition *pparts;
-	struct k_mem_domain *mem_domain = thread->mem_domain_info.mem_domain;
-
-	/* configure stack region of user thread */
-	if (thread->base.user_options & K_USER) {
-		LOG_DBG("configure user thread %p's stack", thread);
-		if (_mpu_configure(THREAD_STACK_USER_REGION,
-		(u32_t)thread->stack_obj, thread->stack_info.size) < 0) {
-			LOG_ERR("thread %p's stack failed", thread);
-			return;
-		}
-	}
-
-	/* configure thread's memory domain */
-	if (mem_domain) {
-		LOG_DBG("configure thread %p's domain: %p",
-		 thread, mem_domain);
-		num_partitions = mem_domain->num_partitions;
-		pparts = mem_domain->partitions;
-	} else {
-		num_partitions = 0U;
-		pparts = NULL;
-	}
-
-	for (u32_t i = 0; i < num_partitions; i++) {
-		if (pparts->size) {
-			if (_dynamic_region_allocate_and_init(pparts->start,
-				pparts->size, pparts->attr) < 0) {
-				LOG_ERR(
-				"thread %p's mem region: %p failed",
-				 thread, pparts);
-				return;
-			}
-		}
-		pparts++;
-	}
-#endif
-}
-
-/**
- * @brief configure the default region
- *
- * @param region_attr region attribute of default region
- */
-void arc_core_mpu_default(u32_t region_attr)
-{
-	u32_t val =  z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) &
-		    (~AUX_MPU_RPER_ATTR_MASK);
-
-	region_attr &= AUX_MPU_RPER_ATTR_MASK;
-
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, region_attr | val);
-}
-
-/**
- * @brief configure the MPU region
- *
- * @param index MPU region index
- * @param base  base address
- * @param size  region size
- * @param region_attr region attribute
- */
-int arc_core_mpu_region(u32_t index, u32_t base, u32_t size,
-			 u32_t region_attr)
-{
-	if (index >= get_num_regions()) {
-		return -EINVAL;
-	}
-
-	region_attr &= AUX_MPU_RPER_ATTR_MASK;
-
-	_region_init(index, base, size, region_attr);
-
-	return 0;
-}
-
-#if defined(CONFIG_USERSPACE)
-/**
- * @brief configure MPU regions for the memory partitions of the memory domain
- *
- * @param thread the thread which has memory domain
- */
-void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
-{
-	arc_core_mpu_configure_thread(thread);
-}
-
-/**
- * @brief remove MPU regions for the memory partitions of the memory domain
- *
- * @param mem_domain the target memory domain
- */
-void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain)
-{
-	u32_t num_partitions;
-	struct k_mem_partition *pparts;
-	int index;
-
-	if (mem_domain) {
-		LOG_DBG("configure domain: %p", mem_domain);
-		num_partitions = mem_domain->num_partitions;
-		pparts = mem_domain->partitions;
-	} else {
-		LOG_DBG("disable domain partition regions");
-		num_partitions = 0U;
-		pparts = NULL;
-	}
-
-	for (u32_t i = 0; i < num_partitions; i++) {
-		if (pparts->size) {
-			index = _get_region_index(pparts->start,
-			 pparts->size);
-			if (index > 0) {
-				_region_set_attr(index,
-				 REGION_KERNEL_RAM_ATTR);
-			}
-		}
-		pparts++;
-	}
-}
-
-/**
- * @brief reset MPU region for a single memory partition
- *
- * @param partition_id  memory partition id
- */
-void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain,
-			u32_t partition_id)
-{
-	struct k_mem_partition *partition = &domain->partitions[partition_id];
-
-	int region_index = _get_region_index(partition->start,
-			 partition->size);
-
-	if (region_index < 0) {
-		return;
-	}
-
-	LOG_DBG("remove region 0x%x", region_index);
-	_region_set_attr(region_index, REGION_KERNEL_RAM_ATTR);
-}
-
-/**
- * @brief get the maximum number of free regions for memory domain partitions
- */
-int arc_core_mpu_get_max_domain_partition_regions(void)
-{
-	/* consider the worst case: each partition requires split */
-	return (get_num_regions() - MPU_REGION_NUM_FOR_THREAD) / 2;
-}
-
-/**
- * @brief validate the given buffer is user accessible or not
- */
-int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
-{
-	int r_index;
-
-
-	/*
-	 * For ARC MPU v3, overlapping is not supported.
-	 * we can stop the iteration immediately once we find the
-	 * matched region that grants permission or denies access.
-	 */
-	r_index = _mpu_probe((u32_t)addr);
-	/*  match and the area is in one region */
-	if (r_index >= 0 && r_index == _mpu_probe((u32_t)addr + (size - 1))) {
-		if (_is_user_accessible_region(r_index, write)) {
-			return 0;
-		} else {
-			return -EPERM;
-		}
-	}
-
-	return -EPERM;
-}
-#endif /* CONFIG_USERSPACE */
-
-/* ARC MPU Driver Initial Setup */
-/*
- * @brief MPU default initialization and configuration
- *
- * This function provides the default configuration mechanism for the Memory
- * Protection Unit (MPU).
- */
-static int arc_mpu_init(struct device *arg)
-{
-	ARG_UNUSED(arg);
-	u32_t num_regions;
-	u32_t i;
-
-	num_regions = get_num_regions();
-
-	/* ARC MPU supports up to 16 Regions */
-	if (mpu_config.num_regions > num_regions) {
-		__ASSERT(0,
-		"Request to configure: %u regions (supported: %u)\n",
-		mpu_config.num_regions, num_regions);
-		return -EINVAL;
-	}
-
-	/* Disable MPU */
-	arc_core_mpu_disable();
-
-	for (i = 0U; i < mpu_config.num_regions; i++) {
-		_region_init(i,
-			     mpu_config.mpu_regions[i].base,
-			     mpu_config.mpu_regions[i].size,
-			     mpu_config.mpu_regions[i].attr);
-
-		/* record the static region which can be split */
-		if (mpu_config.mpu_regions[i].attr & REGION_DYNAMIC) {
-			if (dynamic_regions_num >
-			MPU_DYNAMIC_REGION_AREAS_NUM) {
-				LOG_ERR("no enough dynamic regions %d",
-				 dynamic_regions_num);
-				return -EINVAL;
-			}
-
-			dyn_reg_info[dynamic_regions_num].index = i;
-			dyn_reg_info[dynamic_regions_num].base =
-				mpu_config.mpu_regions[i].base;
-			dyn_reg_info[dynamic_regions_num].size =
-				mpu_config.mpu_regions[i].size;
-			dyn_reg_info[dynamic_regions_num].attr =
-				mpu_config.mpu_regions[i].attr;
-
-			dynamic_regions_num++;
-		}
-	}
-
-	static_regions_num = mpu_config.num_regions;
-
-	for (; i < num_regions; i++) {
-		_region_init(i, 0, 0, 0);
-	}
-
-	/* Enable MPU */
-	arc_core_mpu_enable();
-
-	return 0;
-}
-
-SYS_INIT(arc_mpu_init, PRE_KERNEL_1,
-	 CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
-
-#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V3_INTERNAL_H_ */

arch/arc/core/offsets/offsets.c

@@ -30,12 +30,7 @@ GEN_OFFSET_SYM(_thread_arch_t, intlock_key);
 GEN_OFFSET_SYM(_thread_arch_t, relinquish_cause);
 GEN_OFFSET_SYM(_thread_arch_t, return_value);
 #ifdef CONFIG_ARC_STACK_CHECKING
-GEN_OFFSET_SYM(_thread_arch_t, k_stack_base);
-GEN_OFFSET_SYM(_thread_arch_t, k_stack_top);
-#ifdef CONFIG_USERSPACE
-GEN_OFFSET_SYM(_thread_arch_t, u_stack_base);
-GEN_OFFSET_SYM(_thread_arch_t, u_stack_top);
-#endif
+GEN_OFFSET_SYM(_thread_arch_t, stack_top);
 #endif
 
 /* ARCv2-specific IRQ stack frame structure member offsets */
@@ -57,15 +52,7 @@ GEN_OFFSET_SYM(_isf_t, blink);
 GEN_OFFSET_SYM(_isf_t, lp_end);
 GEN_OFFSET_SYM(_isf_t, lp_start);
 GEN_OFFSET_SYM(_isf_t, lp_count);
-#ifdef CONFIG_CODE_DENSITY
-GEN_OFFSET_SYM(_isf_t, ei_base);
-GEN_OFFSET_SYM(_isf_t, ldi_base);
-GEN_OFFSET_SYM(_isf_t, jli_base);
-#endif
 GEN_OFFSET_SYM(_isf_t, pc);
-#ifdef CONFIG_ARC_HAS_SECURE
-GEN_OFFSET_SYM(_isf_t, sec_stat);
-#endif
 GEN_OFFSET_SYM(_isf_t, status32);
 GEN_ABSOLUTE_SYM(___isf_t_SIZEOF, sizeof(_isf_t));
 
@@ -87,28 +74,7 @@ GEN_OFFSET_SYM(_callee_saved_stack_t, r24);
 GEN_OFFSET_SYM(_callee_saved_stack_t, r25);
 GEN_OFFSET_SYM(_callee_saved_stack_t, r26);
 GEN_OFFSET_SYM(_callee_saved_stack_t, fp);
-#ifdef CONFIG_USERSPACE
-#ifdef CONFIG_ARC_HAS_SECURE
-GEN_OFFSET_SYM(_callee_saved_stack_t, kernel_sp);
-GEN_OFFSET_SYM(_callee_saved_stack_t, user_sp);
-#else
-GEN_OFFSET_SYM(_callee_saved_stack_t, user_sp);
-#endif
-#endif
 GEN_OFFSET_SYM(_callee_saved_stack_t, r30);
-#ifdef CONFIG_FP_SHARING
-GEN_OFFSET_SYM(_callee_saved_stack_t, r58);
-GEN_OFFSET_SYM(_callee_saved_stack_t, r59);
-GEN_OFFSET_SYM(_callee_saved_stack_t, fpu_status);
-GEN_OFFSET_SYM(_callee_saved_stack_t, fpu_ctrl);
-#ifdef CONFIG_FP_FPU_DA
-GEN_OFFSET_SYM(_callee_saved_stack_t, dpfp2h);
-GEN_OFFSET_SYM(_callee_saved_stack_t, dpfp2l);
-GEN_OFFSET_SYM(_callee_saved_stack_t, dpfp1h);
-GEN_OFFSET_SYM(_callee_saved_stack_t, dpfp1l);
-#endif
-
-#endif
 GEN_ABSOLUTE_SYM(___callee_saved_stack_t_SIZEOF, sizeof(_callee_saved_stack_t));
 
 GEN_ABSOLUTE_SYM(_K_THREAD_NO_FLOAT_SIZEOF, sizeof(struct k_thread));

arch/arc/core/prep_c.c

@@ -10,18 +10,18 @@
  *
  *
  * Initialization of full C support: zero the .bss, copy the .data if XIP,
- * call z_cstart().
+ * call _Cstart().
  *
  * Stack is available in this module, but not the global data/bss until their
  * initialization is performed.
  */
 
-#include <zephyr/types.h>
+#include <stdint.h>
 #include <toolchain.h>
-#include <linker/linker-defs.h>
+#include <linker-defs.h>
 #include <arch/arc/v2/aux_regs.h>
 #include <kernel_structs.h>
-#include <kernel_internal.h>
+#include <nano_internal.h>
 
 
 /* XXX - keep for future use in full-featured cache APIs */
@@ -40,14 +40,14 @@ static void disable_icache(void)
 {
 	unsigned int val;
 
-	val = z_arc_v2_aux_reg_read(_ARC_V2_I_CACHE_BUILD);
+	val = _arc_v2_aux_reg_read(_ARC_V2_I_CACHE_BUILD);
 	val &= 0xff; /* version field */
 	if (val == 0) {
 		return; /* skip if i-cache is not present */
 	}
-	z_arc_v2_aux_reg_write(_ARC_V2_IC_IVIC, 0);
+	_arc_v2_aux_reg_write(_ARC_V2_IC_IVIC, 0);
 	__asm__ __volatile__ ("nop");
-	z_arc_v2_aux_reg_write(_ARC_V2_IC_CTRL, 1);
+	_arc_v2_aux_reg_write(_ARC_V2_IC_CTRL, 1);
 }
 
 /**
@@ -64,12 +64,12 @@ static void invalidate_dcache(void)
 {
 	unsigned int val;
 
-	val = z_arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
+	val = _arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
 	val &= 0xff; /* version field */
 	if (val == 0) {
 		return; /* skip if d-cache is not present */
 	}
-	z_arc_v2_aux_reg_write(_ARC_V2_DC_IVDC, 1);
+	_arc_v2_aux_reg_write(_ARC_V2_DC_IVDC, 1);
 }
 #endif
 
@@ -87,25 +87,21 @@ static void invalidate_dcache(void)
 
 static void adjust_vector_table_base(void)
 {
-#ifdef CONFIG_ARC_HAS_SECURE
-#undef _ARC_V2_IRQ_VECT_BASE
-#define _ARC_V2_IRQ_VECT_BASE _ARC_V2_IRQ_VECT_BASE_S
-#endif
 	extern struct vector_table _VectorTable;
 	unsigned int vbr;
 	/* if the compiled-in vector table is different
 	 * from the base address known by the ARC CPU,
 	 * set the vector base to the compiled-in address.
 	 */
-	vbr = z_arc_v2_aux_reg_read(_ARC_V2_IRQ_VECT_BASE);
+	vbr = _arc_v2_aux_reg_read(_ARC_V2_IRQ_VECT_BASE);
 	vbr &= 0xfffffc00;
 	if (vbr != (unsigned int)&_VectorTable) {
-		z_arc_v2_aux_reg_write(_ARC_V2_IRQ_VECT_BASE,
+		_arc_v2_aux_reg_write(_ARC_V2_IRQ_VECT_BASE,
 					(unsigned int)&_VectorTable);
 	}
 }
 
-extern FUNC_NORETURN void z_cstart(void);
+extern FUNC_NORETURN void _Cstart(void);
 /**
  *
  * @brief Prepare to and run C code
@@ -117,10 +113,10 @@ extern FUNC_NORETURN void z_cstart(void);
 
 void _PrepC(void)
 {
-	z_icache_setup();
+	_icache_setup();
 	adjust_vector_table_base();
-	z_bss_zero();
-	z_data_copy();
-	z_cstart();
+	_bss_zero();
+	_data_copy();
+	_Cstart();
 	CODE_UNREACHABLE;
 }

arch/arc/core/regular_irq.S

@@ -23,7 +23,6 @@
 GTEXT(_rirq_enter)
 GTEXT(_rirq_exit)
 GTEXT(_rirq_common_interrupt_swap)
-GDATA(exc_nest_count)
 
 #if 0 /* TODO: when FIRQ is not present, all would be regular */
 #define NUM_REGULAR_IRQ_PRIO_LEVELS CONFIG_NUM_IRQ_PRIO_LEVELS
@@ -35,6 +34,14 @@ GDATA(exc_nest_count)
  * TODO: Revist this if FIRQ becomes configurable.
  */
 
+#if NUM_REGULAR_IRQ_PRIO_LEVELS > 1
+#error "nested regular interrupts are not supported."
+/*
+ * Nesting of Regularing interrupts is not yet supported.
+ * Set CONFIG_NUM_IRQ_PRIO_LEVELS to 2 even if SOC supports more.
+ */
+#endif
+
 
 /**
  *
@@ -51,36 +58,20 @@ GDATA(exc_nest_count)
 
 SECTION_FUNC(TEXT, _rirq_enter)
 
-
+	mov r1, _kernel
 #ifdef CONFIG_ARC_STACK_CHECKING
-#ifdef CONFIG_ARC_HAS_SECURE
-	lr r2, [_ARC_V2_SEC_STAT]
-	bclr r2, r2, _ARC_V2_SEC_STAT_SSC_BIT
-	/* sflag r2 */
-	/* sflag instruction is not supported in current ARC GNU */
-	.long 0x00bf302f
-#else
 	/* disable stack checking */
 	lr r2, [_ARC_V2_STATUS32]
 	bclr r2, r2, _ARC_V2_STATUS32_SC_BIT
 	kflag r2
 #endif
-#endif
-	clri
-	ld r1, [exc_nest_count]
-	add r0, r1, 1
-	st r0, [exc_nest_count]
-	cmp r1, 0
-
-	bgt.d  rirq_nest
-	mov r0, sp
-
-	mov r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
+#if NUM_REGULAR_IRQ_PRIO_LEVELS == 1
+	st sp, [r2, _thread_offset_to_sp]
 	ld sp, [r1, _kernel_offset_to_irq_stack]
-rirq_nest:
-	push_s r0
-
-	seti
+#else
+#error regular irq nesting is not implemented
+#endif
 	j _isr_demux
 
 
@@ -92,35 +83,6 @@ rirq_nest:
  */
 
 SECTION_FUNC(TEXT, _rirq_exit)
-	clri
-
-	pop sp
-
-	mov	r1, exc_nest_count
-	ld	r0, [r1]
-	sub	r0, r0, 1
-	st	r0, [r1]
-	/*
-	 * using exc_nest_count to decide whether is nest int is not reliable.
-	 * a better option is to use IRQ_ACT
-	 * A case is:  a high priority int preempts a low priority int before
-	 * rirq_enter/firq_enter, then in _rirq_exit/_firq_exit, it will see
-	 * exc_nest_cout is 0, this will lead to possible thread switch, but
-	 * a low priority int is still pending.
-	 *
-	 * If multi bits in IRQ_ACT are set, i.e. last bit != fist bit, it's
-	 * in nest interrupt
-	 */
-	lr 	r0, [_ARC_V2_AUX_IRQ_ACT]
-	and 	r0, r0, 0xffff
-	ffs	r1, r0
-	fls	r2, r0
-	cmp	r1, r2
-	jne	_rirq_return_from_rirq
-
-#ifdef CONFIG_STACK_SENTINEL
-	bl z_check_stack_sentinel
-#endif
 
 #ifdef CONFIG_PREEMPT_ENABLED
 
@@ -132,6 +94,35 @@ SECTION_FUNC(TEXT, _rirq_exit)
 	 * point on until return from interrupt.
 	 */
 
+	clri
+
+#if NUM_REGULAR_IRQ_PRIO_LEVELS > 1
+	/* check if we're a nested interrupt: if so, let the interrupted interrupt
+	 * handle the reschedule */
+
+	lr r3, [_ARC_V2_AUX_IRQ_ACT]
+	ffs r0, r3
+
+	asl r0, 1, r0
+
+	/* the OS on ARCv2 always runs in kernel mode, so assume bit31 [U] in
+	 * AUX_IRQ_ACT is always 0: if the contents of AUX_IRQ_ACT is greater
+	 * than FFS(AUX_IRQ_ACT), it means that another bit is set so an
+	 * interrupt was interrupted.
+	 */
+
+	cmp r0, r3
+	brgt _rirq_return_from_rirq
+#endif
+
+	/*
+	 * Non-preemptible thread ? Do not schedule (see explanation of
+	 * preempt field in kernel_struct.h).
+	 */
+	ldh_s r0, [r2, _thread_offset_to_preempt]
+	mov r3, _NON_PREEMPT_THRESHOLD
+	brhs.d r0, r3, _rirq_no_reschedule
+
 	/*
 	 * Both (a)reschedule and (b)non-reschedule cases need to load the
 	 * current thread's stack, but don't have to use it until the decision
@@ -142,10 +133,11 @@ SECTION_FUNC(TEXT, _rirq_exit)
 	 * b) needs to load it to restore the interrupted context.
 	 */
 
+	ld sp, [r2, _thread_offset_to_sp]
+
 	/* check if the current thread needs to be rescheduled */
 	ld_s r0, [r1, _kernel_offset_to_ready_q_cache]
-	cmp_s r0, r2
-	beq _rirq_no_reschedule
+	breq r0, r2, _rirq_no_reschedule
 
 	/* cached thread to run is in r0, fall through */
 
@@ -166,7 +158,11 @@ _rirq_common_interrupt_swap:
 	/* r2 contains pointer to new thread */
 
 #ifdef CONFIG_ARC_STACK_CHECKING
-	_load_stack_check_regs
+	/* Use stack top and down registers from restored context */
+	add r3, r2, _K_THREAD_NO_FLOAT_SIZEOF
+	sr r3, [_ARC_V2_KSTACK_TOP]
+	ld_s r3, [r2, _thread_offset_to_stack_top]
+	sr r3, [_ARC_V2_KSTACK_BASE]
 #endif
 	/*
 	 * _load_callee_saved_regs expects incoming thread in r2.
@@ -174,13 +170,6 @@ _rirq_common_interrupt_swap:
 	 */
 	_load_callee_saved_regs
 
-#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
-	push_s r2
-	mov r0, r2
-	bl configure_mpu_thread
-	pop_s r2
-#endif
-
 	ld_s r3, [r2, _thread_offset_to_relinquish_cause]
 
 	breq r3, _CAUSE_RIRQ, _rirq_return_from_rirq
@@ -193,30 +182,27 @@ _rirq_common_interrupt_swap:
 .balign 4
 _rirq_return_from_coop:
 
-	/*
-	 * status32, sec_stat (when CONFIG_ARC_HAS_SECURE is enabled) and pc
-	 * (blink) are already on the stack in the right order
-	 */
-	ld_s r0, [sp, ___isf_t_status32_OFFSET - ___isf_t_pc_OFFSET]
+	/* status32 and pc (blink) are already on the stack in the right order */
 
 	/* update status32.ie (explanation in firq_exit:_firq_return_from_coop) */
-
+	ld_s r0, [sp, 4]
 	ld_s r3, [r2, _thread_offset_to_intlock_key]
 	st  0, [r2, _thread_offset_to_intlock_key]
 	cmp r3, 0
 	or.ne r0, r0, _ARC_V2_STATUS32_IE
-
-	st_s r0, [sp, ___isf_t_status32_OFFSET - ___isf_t_pc_OFFSET]
+	st_s r0, [sp, 4]
 
 	/* carve fake stack */
-	sub sp, sp, ___isf_t_pc_OFFSET
 
-	/* update return value on stack */
+	/*
+	 * a) status32/pc are already on the stack
+	 * b) a real value will be pushed in r0
+	 */
+	sub sp, sp, (___isf_t_SIZEOF - 12)
+
+	/* push return value on stack */
 	ld_s r0, [r2, _thread_offset_to_return_value]
-	st_s r0, [sp, ___isf_t_r0_OFFSET]
-
-	/* reset zero-overhead loops */
-	st 0, [sp, ___isf_t_lp_end_OFFSET]
+	push_s r0
 
 	/*
 	 * r13 is part of both the callee and caller-saved register sets because
@@ -230,6 +216,10 @@ _rirq_return_from_coop:
 
 	/* fall through to rtie instruction */
 
+.balign 4
+_rirq_return_from_firq:
+_rirq_return_from_rirq:
+
 	/* rtie will pop the rest from the stack */
 
 	/* fall through to rtie instruction */
@@ -237,8 +227,6 @@ _rirq_return_from_coop:
 #endif /* CONFIG_PREEMPT_ENABLED */
 
 .balign 4
-_rirq_return_from_firq:
-_rirq_return_from_rirq:
 _rirq_no_reschedule:
 
 	rtie

arch/arc/core/reset.S

@@ -11,18 +11,32 @@
  * Reset handler that prepares the system for running C code.
  */
 
+// #include <board.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <arch/cpu.h>
 
 GDATA(_interrupt_stack)
+GDATA(_firq_stack)
 GDATA(_main_stack)
 
 /* use one of the available interrupt stacks during init */
 
+/* FIRQ only ? */
+#if CONFIG_NUM_IRQ_PRIO_LEVELS == 1
 
-#define INIT_STACK _interrupt_stack
-#define INIT_STACK_SIZE CONFIG_ISR_STACK_SIZE
+	/* FIRQ, but uses _interrupt_stack ? */
+	#if CONFIG_RGF_NUM_BANKS == 1
+		#define INIT_STACK _interrupt_stack
+		#define INIT_STACK_SIZE CONFIG_ISR_STACK_SIZE
+	#else
+		#define INIT_STACK _firq_stack
+		#define INIT_STACK_SIZE CONFIG_FIRQ_STACK_SIZE
+	#endif
+#else
+	#define INIT_STACK _interrupt_stack
+	#define INIT_STACK_SIZE CONFIG_ISR_STACK_SIZE
+#endif
 
 GTEXT(__reset)
 GTEXT(__start)
@@ -44,33 +58,9 @@ GTEXT(__start)
 SECTION_FUNC(TEXT,__reset)
 SECTION_FUNC(TEXT,__start)
 
-	/* lock interrupts: will get unlocked when switch to main task
-	 * also make sure the processor in the correct status
-	 */
-	mov r0, 0
-	kflag r0
-#if defined(CONFIG_BOOT_TIME_MEASUREMENT) && defined(CONFIG_ARCV2_TIMER)
-	/*
-	 * ARCV2 timer (timer0) is a free run timer, let it start to count
-	 * here.
-	 */
-	mov r0, 0xffffffff
-	sr r0, [_ARC_V2_TMR0_LIMIT]
-	mov r0, 0
-	sr r0, [_ARC_V2_TMR0_COUNT]
-#endif
-	/* interrupt related init */
-	sr r0, [_ARC_V2_AUX_IRQ_ACT]
-	sr r0, [_ARC_V2_AUX_IRQ_CTRL]
-	sr r0, [_ARC_V2_AUX_IRQ_HINT]
+	/* lock interrupts: will get unlocked when switch to main task */
+	clri
 
-	/* \todo: MPU init, gp for small data? */
-
-#if CONFIG_USERSPACE
-	lr r0, [_ARC_V2_STATUS32]
-	bset r0, r0, _ARC_V2_STATUS32_US_BIT
-	kflag r0
-#endif
 	mov r1, 1
 
 invalidate_and_disable_icache:
@@ -97,9 +87,9 @@ invalidate_dcache:
 
 done_cache_invalidate:
 
-#if defined(CONFIG_SYS_POWER_DEEP_SLEEP_STATES) && \
+#if defined(CONFIG_SYS_POWER_DEEP_SLEEP) && \
 	!defined(CONFIG_BOOTLOADER_CONTEXT_RESTORE)
-        jl @_sys_resume_from_deep_sleep
+        jl @_sys_soc_resume_from_deep_sleep
 #endif
 
 #ifdef CONFIG_INIT_STACKS
@@ -116,6 +106,13 @@ done_cache_invalidate:
 	mov_s r2, CONFIG_ISR_STACK_SIZE
 	jl memset
 
+#if CONFIG_RGF_NUM_BANKS != 1
+	mov_s r0, _firq_stack
+	mov_s r1, 0xaa
+	mov_s r2, CONFIG_FIRQ_STACK_SIZE
+	jl memset
+#endif
+
 #endif /* CONFIG_INIT_STACKS */
 
 	mov sp, INIT_STACK

arch/arc/core/swap.S

@@ -21,7 +21,7 @@
 #include <v2/irq.h>
 #include <swap_macros.h>
 
-GTEXT(__swap)
+GTEXT(_Swap)
 GDATA(_k_neg_eagain)
 GDATA(_kernel)
 
@@ -29,52 +29,37 @@ GDATA(_kernel)
  *
  * @brief Initiate a cooperative context switch
  *
- * The __swap() routine is invoked by various kernel services to effect
- * a cooperative context switch.  Prior to invoking __swap(), the caller
+ * The _Swap() routine is invoked by various kernel services to effect
+ * a cooperative context switch.  Prior to invoking _Swap(), the caller
  * disables interrupts via irq_lock() and the return 'key' is passed as a
- * parameter to __swap(). The key is in fact the value stored in the register
+ * parameter to _Swap(). The key is in fact the value stored in the register
  * operand of a CLRI instruction.
  *
  * It stores the intlock key parameter into current->intlock_key.
 
- * Given that __swap() is called to effect a cooperative context switch,
+ * Given that _Swap() is called to effect a cooperative context switch,
  * the caller-saved integer registers are saved on the stack by the function
- * call preamble to __swap(). This creates a custom stack frame that will be
- * popped when returning from __swap(), but is not suitable for handling a
- * return from an exception. Thus, the fact that the thread is pending because
- * of a cooperative call to __swap() has to be recorded via the _CAUSE_COOP code
- * in the relinquish_cause of the thread's k_thread structure. The
+ * call preamble to _Swap(). This creates a custom stack frame that will be
+ * popped when returning from _Swap(), but is not suitable for handling a return
+ * from an exception. Thus, the fact that the thread is pending because of a
+ * cooperative call to _Swap() has to be recorded via the _CAUSE_COOP code in
+ * the relinquish_cause of the thread's k_thread structure. The
  * _IrqExit()/_FirqExit() code will take care of doing the right thing to
  * restore the thread status.
  *
- * When __swap() is invoked, we know the decision to perform a context switch or
+ * When _Swap() is invoked, we know the decision to perform a context switch or
  * not has already been taken and a context switch must happen.
  *
  * @return may contain a return value setup by a call to
- * z_set_thread_return_value()
+ * _set_thread_return_value()
  *
  * C function prototype:
  *
- * unsigned int __swap (unsigned int key);
+ * unsigned int _Swap (unsigned int key);
  *
  */
 
-SECTION_FUNC(TEXT, __swap)
-
-#ifdef CONFIG_EXECUTION_BENCHMARKING
-	mov r1, _kernel
-	ld_s r2, [r1, _kernel_offset_to_current]
-	_save_callee_saved_regs
-	push_s r31
-
-	bl read_timer_start_of_swap
-
-	pop_s r31
-	mov r1, _kernel
-	ld_s r2, [r1, _kernel_offset_to_current]
-	_load_callee_saved_regs
-	st sp, [r2, _thread_offset_to_sp]
-#endif
+SECTION_FUNC(TEXT, _Swap)
 
 	/* interrupts are locked, interrupt key is in r0 */
 
@@ -86,10 +71,10 @@ SECTION_FUNC(TEXT, __swap)
 	st _CAUSE_COOP, [r2, _thread_offset_to_relinquish_cause]
 
 	/*
-         * Carve space for the return value. Setting it to a default of
+         * Carve space for the return value. Setting it to a defafult of
          * -EAGAIN eliminates the need for the timeout code to set it.
          * If another value is ever needed, it can be modified with
-         * z_set_thread_return_value().
+         * _set_thread_return_value().
          */
 	ld r3, [_k_neg_eagain]
 	st_s r3, [r2, _thread_offset_to_return_value]
@@ -100,25 +85,11 @@ SECTION_FUNC(TEXT, __swap)
 	 */
 	lr r3, [_ARC_V2_STATUS32]
 	push_s r3
-
-#ifdef CONFIG_ARC_HAS_SECURE
-	lr r3, [_ARC_V2_SEC_STAT]
-	push_s r3
-#endif
-
 #ifdef CONFIG_ARC_STACK_CHECKING
-#ifdef CONFIG_ARC_HAS_SECURE
-	bclr r3, r3, _ARC_V2_SEC_STAT_SSC_BIT
-	/* sflag r3 */
-	/* sflag instruction is not supported in current ARC GNU */
-	.long 0x00ff302f
-#else
 	/* disable stack checking during swap */
 	bclr r3, r3, _ARC_V2_STATUS32_SC_BIT
 	kflag r3
 #endif
-#endif
-
 	push_s blink
 
 	_save_callee_saved_regs
@@ -128,20 +99,17 @@ SECTION_FUNC(TEXT, __swap)
 
 	/* entering here, r2 contains the new current thread */
 #ifdef CONFIG_ARC_STACK_CHECKING
-	_load_stack_check_regs
+	/* Use stack top and down registers from restored context */
+	add r3, r2, _K_THREAD_NO_FLOAT_SIZEOF
+	sr r3, [_ARC_V2_KSTACK_TOP]
+	ld_s r3, [r2, _thread_offset_to_stack_top]
+	sr r3, [_ARC_V2_KSTACK_BASE]
 #endif
 	/* XXX - can be moved to delay slot of _CAUSE_RIRQ ? */
 	st_s r2, [r1, _kernel_offset_to_current]
 
 	_load_callee_saved_regs
 
-#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
-	push_s r2
-	mov r0, r2
-	bl configure_mpu_thread
-	pop_s r2
-#endif
-
 	ld_s r3, [r2, _thread_offset_to_relinquish_cause]
 
 	breq r3, _CAUSE_RIRQ, _swap_return_from_rirq
@@ -162,17 +130,6 @@ _swap_return_from_coop:
 	bbit1 ilink, _ARC_V2_STATUS32_AE_BIT, _return_from_exc
 
 	pop_s blink /* pc into blink */
-#ifdef CONFIG_ARC_HAS_SECURE
-	pop_s r3    /* pop SEC_STAT */
-	/* sflag r3 */
-	/* sflag instruction is not supported in current ARC GNU */
-	.long 0x00ff302f
-#endif
-#ifdef CONFIG_EXECUTION_BENCHMARKING
-	b _capture_value_for_benchmarking
-#endif
-return_loc:
-
 	pop_s r3    /* status32 into r3 */
 	kflag r3    /* write status32 */
 
@@ -188,21 +145,10 @@ _swap_return_from_firq:
 	bbit1 r3, _ARC_V2_STATUS32_AE_BIT, _return_from_exc_irq
 
 	/* pretend interrupt happened to use rtie instruction */
-
-#ifdef CONFIG_ARC_HAS_SECURE
-	lr r3, [_ARC_V2_SEC_STAT]
-	/* set SEC_STAT.IRM = SECURE for interrupt return */
-	bset r3, r3, 3
-	/* sflag r3 */
-	/* sflag instruction is not supported in current ARC GNU */
-	.long 0x00ff302f
-#endif
-
 	lr r3, [_ARC_V2_AUX_IRQ_ACT]
-	brne r3, 0, _swap_already_in_irq
+	brne r3,0,_swap_already_in_irq
 
-	/* use lowest interrupt priority */
-	or r3, r3, (1<<(CONFIG_NUM_IRQ_PRIO_LEVELS-1))
+	or r3,r3,(1<<(CONFIG_NUM_IRQ_PRIO_LEVELS-1)) /* use lowest */
 	sr r3, [_ARC_V2_AUX_IRQ_ACT]
 
 _swap_already_in_irq:
@@ -211,7 +157,7 @@ _swap_already_in_irq:
 .balign 4
 _return_from_exc_irq:
 	_pop_irq_stack_frame
-	sub_s sp, sp, ___isf_t_status32_OFFSET - ___isf_t_pc_OFFSET + 4
+	sub_s sp, sp, 8
 
 _return_from_exc:
 
@@ -219,30 +165,8 @@ _return_from_exc:
 	ld ilink, [sp] /* pc into ilink */
 	sr ilink, [_ARC_V2_ERET]
 
-	/* SEC_STAT is bypassed when CONFIG_ARC_HAS_SECURE */
-
 	/* put status32 into estatus */
-	ld ilink, [sp, ___isf_t_status32_OFFSET - ___isf_t_pc_OFFSET]
+	ld ilink, [sp, 4] /* status32 into ilink */
 	sr ilink, [_ARC_V2_ERSTATUS]
-	add_s sp, sp, ___isf_t_status32_OFFSET - ___isf_t_pc_OFFSET + 4
-
+	add_s sp, sp, 8
 	rtie
-
-
-#ifdef CONFIG_EXECUTION_BENCHMARKING
-	.balign 4
-_capture_value_for_benchmarking:
-	mov r1, _kernel
-	ld_s r2, [r1, _kernel_offset_to_current]
-	_save_callee_saved_regs
-	push_s blink
-
-	bl read_timer_end_of_swap
-
-	pop_s blink
-	mov r1, _kernel
-	ld_s r2, [r1, _kernel_offset_to_current]
-	_load_callee_saved_regs
-	st sp, [r2, _thread_offset_to_sp]
-	b return_loc
-#endif /* CONFIG_EXECUTION_BENCHMARKING */

arch/arc/core/sys_fatal_error_handler.c

@@ -8,12 +8,12 @@
  * @file
  * @brief ARCv2 system fatal error handler
  *
- * This module provides the z_SysFatalErrorHandler() routine for ARCv2 BSPs.
+ * This module provides the _SysFatalErrorHandler() routine for ARCv2 BSPs.
  */
 
 #include <kernel.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <kernel_structs.h>
 #include <misc/printk.h>
 
@@ -37,38 +37,26 @@
  *
  * @return N/A
  */
-__weak void z_SysFatalErrorHandler(unsigned int reason,
-						const NANO_ESF *pEsf)
+FUNC_NORETURN void _SysFatalErrorHandler(unsigned int reason,
+					 const NANO_ESF *pEsf)
 {
+	ARG_UNUSED(reason);
 	ARG_UNUSED(pEsf);
 
 #if !defined(CONFIG_SIMPLE_FATAL_ERROR_HANDLER)
-#if defined(CONFIG_STACK_SENTINEL)
-	if (reason == _NANO_ERR_STACK_CHK_FAIL) {
-		goto hang_system;
+	if (k_is_in_isr() || _is_thread_essential()) {
+		printk("Fatal fault in %s! Spinning...\n",
+		       k_is_in_isr() ? "ISR" : "essential thread");
+		for (;;)
+			; /* spin forever */
 	}
-#endif
-	if (reason == _NANO_ERR_KERNEL_PANIC) {
-		goto hang_system;
-	}
-
-	if (z_is_thread_essential()) {
-		printk("Fatal fault in essential thread! Spinning...\n");
-		goto hang_system;
-	}
-
 	printk("Fatal fault in thread %p! Aborting.\n", _current);
-
 	k_thread_abort(_current);
-
-	return;
-
-hang_system:
 #else
-	ARG_UNUSED(reason);
-#endif
-
 	for (;;) {
 		k_cpu_idle();
 	}
+#endif
+
+	CODE_UNREACHABLE;
 }

arch/arc/core/thread.c

@@ -19,24 +19,35 @@
 #ifdef CONFIG_INIT_STACKS
 #include <string.h>
 #endif /* CONFIG_INIT_STACKS */
-
-#ifdef CONFIG_USERSPACE
-#include <arch/arc/v2/mpu/arc_core_mpu.h>
-#endif
-
 /*  initial stack frame */
 struct init_stack_frame {
-	u32_t pc;
-#ifdef CONFIG_ARC_HAS_SECURE
-	u32_t sec_stat;
-#endif
-	u32_t status32;
-	u32_t r3;
-	u32_t r2;
-	u32_t r1;
-	u32_t r0;
+	uint32_t pc;
+	uint32_t status32;
+	uint32_t r3;
+	uint32_t r2;
+	uint32_t r1;
+	uint32_t r0;
 };
 
+#if defined(CONFIG_THREAD_MONITOR)
+/*
+ * Add a thread to the kernel's list of active threads.
+ */
+static ALWAYS_INLINE void thread_monitor_init(struct k_thread *thread)
+{
+	unsigned int key;
+
+	key = irq_lock();
+	thread->next_thread = _kernel.threads;
+	_kernel.threads = thread;
+	irq_unlock(key);
+}
+#else
+#define thread_monitor_init(thread) \
+	do {/* do nothing */     \
+	} while ((0))
+#endif /* CONFIG_THREAD_MONITOR */
+
 /*
  * @brief Initialize a new thread from its stack space
  *
@@ -46,7 +57,7 @@ struct init_stack_frame {
  * needed anymore.
  *
  * The initial context is a basic stack frame that contains arguments for
- * z_thread_entry() return address, that points at z_thread_entry()
+ * _thread_entry() return address, that points at _thread_entry()
  * and status register.
  *
  * <options> is currently unused.
@@ -62,218 +73,78 @@ struct init_stack_frame {
  *
  * @return N/A
  */
-void z_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
-		 size_t stackSize, k_thread_entry_t pEntry,
+void _new_thread(char *pStackMem, size_t stackSize,
+		 _thread_entry_t pEntry,
 		 void *parameter1, void *parameter2, void *parameter3,
-		 int priority, unsigned int options)
+		 int priority, unsigned options)
 {
-	char *pStackMem = Z_THREAD_STACK_BUFFER(stack);
-	Z_ASSERT_VALID_PRIO(priority, pEntry);
+	_ASSERT_VALID_PRIO(priority, pEntry);
 
-	char *stackEnd;
-	char *stackAdjEnd;
+	char *stackEnd = pStackMem + stackSize;
 	struct init_stack_frame *pInitCtx;
 
-#if CONFIG_USERSPACE
+	struct k_thread *thread = (struct k_thread *) pStackMem;
 
-	size_t stackAdjSize;
-	size_t offset = 0;
-
-/* adjust stack and stack size */
-#if CONFIG_ARC_MPU_VER == 2
-	stackAdjSize = Z_ARC_MPUV2_SIZE_ALIGN(stackSize);
-#elif CONFIG_ARC_MPU_VER == 3
-	stackAdjSize = STACK_SIZE_ALIGN(stackSize);
-#endif
-	stackEnd = pStackMem + stackAdjSize;
-
-#if CONFIG_STACK_POINTER_RANDOM
-	offset = stackAdjSize - stackSize;
+#ifdef CONFIG_INIT_STACKS
+	memset(pStackMem, 0xaa, stackSize);
 #endif
 
-	if (options & K_USER) {
-		thread->arch.priv_stack_start =
-			(u32_t)(stackEnd + STACK_GUARD_SIZE);
+	/* carve the thread entry struct from the "base" of the stack */
 
-		stackAdjEnd = (char *)STACK_ROUND_DOWN(stackEnd +
-				Z_ARCH_THREAD_STACK_RESERVED);
-
-		/* reserve 4 bytes for the start of user sp */
-		stackAdjEnd -= 4;
-		(*(u32_t *)stackAdjEnd) = STACK_ROUND_DOWN(
-			(u32_t)stackEnd - offset);
-
-#ifdef CONFIG_THREAD_USERSPACE_LOCAL_DATA
-		/* reserve stack space for the userspace local data struct */
-		thread->userspace_local_data =
-			(struct _thread_userspace_local_data *)
-			STACK_ROUND_DOWN(stackEnd -
-			sizeof(*thread->userspace_local_data) - offset);
-		/* update the start of user sp */
-		(*(u32_t *)stackAdjEnd) = (u32_t) thread->userspace_local_data;
-#endif
-
-	} else {
-	/* for kernel thread, the privilege stack is merged into thread stack */
-	/* if MPU_STACK_GUARD is enabled, reserve the the stack area
-	 * |---------------------|    |----------------|
-	 * |  user stack         |    | stack guard    |
-	 * |---------------------| to |----------------|
-	 * |  stack guard        |    | kernel thread  |
-	 * |---------------------|    | stack          |
-	 * |  privilege stack    |    |                |
-	 * ---------------------------------------------
-	 */
-		pStackMem += STACK_GUARD_SIZE;
-		stackAdjSize = stackAdjSize + CONFIG_PRIVILEGED_STACK_SIZE;
-		stackEnd += Z_ARCH_THREAD_STACK_RESERVED;
-
-		thread->arch.priv_stack_start = 0;
-
-#ifdef CONFIG_THREAD_USERSPACE_LOCAL_DATA
-		/* reserve stack space for the userspace local data struct */
-		stackAdjEnd = (char *)STACK_ROUND_DOWN(stackEnd
-			- sizeof(*thread->userspace_local_data) - offset);
-		thread->userspace_local_data =
-			(struct _thread_userspace_local_data *)stackAdjEnd;
-#else
-		stackAdjEnd = (char *)STACK_ROUND_DOWN(stackEnd - offset);
-#endif
-	}
-
-	z_new_thread_init(thread, pStackMem, stackAdjSize, priority, options);
-
-	/* carve the thread entry struct from the "base" of
-		the privileged stack */
-	pInitCtx = (struct init_stack_frame *)(
-		stackAdjEnd - sizeof(struct init_stack_frame));
-
-	/* fill init context */
-	pInitCtx->status32 = 0U;
-	if (options & K_USER) {
-		pInitCtx->pc = ((u32_t)z_user_thread_entry_wrapper);
-	} else {
-		pInitCtx->pc = ((u32_t)z_thread_entry_wrapper);
-	}
+	pInitCtx = (struct init_stack_frame *)(STACK_ROUND_DOWN(stackEnd) -
+				       sizeof(struct init_stack_frame));
 
+	pInitCtx->pc = ((uint32_t)_thread_entry_wrapper);
+	pInitCtx->r0 = (uint32_t)pEntry;
+	pInitCtx->r1 = (uint32_t)parameter1;
+	pInitCtx->r2 = (uint32_t)parameter2;
+	pInitCtx->r3 = (uint32_t)parameter3;
 	/*
-	 * enable US bit, US is read as zero in user mode. This will allow use
-	 * mode sleep instructions, and it enables a form of denial-of-service
-	 * attack by putting the processor in sleep mode, but since interrupt
-	 * level/mask can't be set from user space that's not worse than
-	 * executing a loop without yielding.
-	 */
-	pInitCtx->status32 |= _ARC_V2_STATUS32_US;
-#else /* For no USERSPACE feature */
-	pStackMem += Z_ARCH_THREAD_STACK_RESERVED;
-	stackEnd = pStackMem + stackSize;
-
-	z_new_thread_init(thread, pStackMem, stackSize, priority, options);
-
-	stackAdjEnd = stackEnd;
-
-	pInitCtx = (struct init_stack_frame *)(
-		STACK_ROUND_DOWN(stackAdjEnd) -
-		sizeof(struct init_stack_frame));
-
-	pInitCtx->status32 = 0U;
-	pInitCtx->pc = ((u32_t)z_thread_entry_wrapper);
-#endif
-
-#ifdef CONFIG_ARC_HAS_SECURE
-	pInitCtx->sec_stat = z_arc_v2_aux_reg_read(_ARC_V2_SEC_STAT);
-#endif
-
-	pInitCtx->r0 = (u32_t)pEntry;
-	pInitCtx->r1 = (u32_t)parameter1;
-	pInitCtx->r2 = (u32_t)parameter2;
-	pInitCtx->r3 = (u32_t)parameter3;
-
-/* stack check configuration */
-#ifdef CONFIG_ARC_STACK_CHECKING
-#ifdef CONFIG_ARC_HAS_SECURE
-	pInitCtx->sec_stat |= _ARC_V2_SEC_STAT_SSC;
-#else
-	pInitCtx->status32 |= _ARC_V2_STATUS32_SC;
-#endif
-#ifdef CONFIG_USERSPACE
-	if (options & K_USER) {
-		thread->arch.u_stack_top = (u32_t)pStackMem;
-		thread->arch.u_stack_base = (u32_t)stackEnd;
-		thread->arch.k_stack_top =
-			 (u32_t)(stackEnd + STACK_GUARD_SIZE);
-		thread->arch.k_stack_base = (u32_t)
-		(stackEnd + Z_ARCH_THREAD_STACK_RESERVED);
-	} else {
-		thread->arch.k_stack_top = (u32_t)pStackMem;
-		thread->arch.k_stack_base = (u32_t)stackEnd;
-		thread->arch.u_stack_top = 0;
-		thread->arch.u_stack_base = 0;
-	}
-#else
-	thread->arch.k_stack_top = (u32_t) pStackMem;
-	thread->arch.k_stack_base = (u32_t) stackEnd;
-#endif
-#endif
-	/*
-	 * seti instruction in the end of the z_swap() will
+	 * For now set the interrupt priority to 15
+	 * we can leave interrupt enable flag set to 0 as
+	 * seti instruction in the end of the _Swap() will
 	 * enable the interrupts based on intlock_key
 	 * value.
-	 *
+	 */
+#ifdef CONFIG_ARC_STACK_CHECKING
+	pInitCtx->status32 = _ARC_V2_STATUS32_SC | _ARC_V2_STATUS32_E(_ARC_V2_DEF_IRQ_LEVEL);
+	thread->arch.stack_top = (uint32_t) stackEnd;
+#else
+	pInitCtx->status32 = _ARC_V2_STATUS32_E(_ARC_V2_DEF_IRQ_LEVEL);
+#endif
+
+	_init_thread_base(&thread->base, priority, _THREAD_PRESTART, options);
+
+	/* static threads overwrite them afterwards with real values */
+	thread->init_data = NULL;
+	thread->fn_abort = NULL;
+
+#ifdef CONFIG_THREAD_CUSTOM_DATA
+	/* Initialize custom data field (value is opaque to kernel) */
+
+	thread->custom_data = NULL;
+#endif
+
+#ifdef CONFIG_THREAD_MONITOR
+	/*
+	 * In debug mode thread->entry give direct access to the thread entry
+	 * and the corresponding parameters.
+	 */
+	thread->entry = (struct __thread_entry *)(pInitCtx);
+#endif
+
+	/*
 	 * intlock_key is constructed based on ARCv2 ISA Programmer's
 	 * Reference Manual CLRI instruction description:
 	 * dst[31:6] dst[5] dst[4]       dst[3:0]
 	 *    26'd0    1    STATUS32.IE  STATUS32.E[3:0]
 	 */
-	thread->arch.intlock_key = 0x30 | (_ARC_V2_DEF_IRQ_LEVEL & 0xf);
+	thread->arch.intlock_key = 0x3F;
 	thread->arch.relinquish_cause = _CAUSE_COOP;
 	thread->callee_saved.sp =
-		(u32_t)pInitCtx - ___callee_saved_stack_t_SIZEOF;
+		(uint32_t)pInitCtx - ___callee_saved_stack_t_SIZEOF;
 
 	/* initial values in all other regs/k_thread entries are irrelevant */
+
+	thread_monitor_init(thread);
 }
-
-
-#ifdef CONFIG_USERSPACE
-
-FUNC_NORETURN void z_arch_user_mode_enter(k_thread_entry_t user_entry,
-	void *p1, void *p2, void *p3)
-{
-
-	/*
-	 * adjust the thread stack layout
-	 * |----------------|    |---------------------|
-	 * | stack guard    |    |  user stack         |
-	 * |----------------| to |---------------------|
-	 * | kernel thread  |    |  stack guard        |
-	 * | stack          |    |---------------------|
-	 * |                |    |  privilege stack    |
-	 * ---------------------------------------------
-	 */
-	_current->stack_info.start = (u32_t)_current->stack_obj;
-	_current->stack_info.size -= CONFIG_PRIVILEGED_STACK_SIZE;
-
-	_current->arch.priv_stack_start =
-			(u32_t)(_current->stack_info.start +
-				_current->stack_info.size + STACK_GUARD_SIZE);
-
-#ifdef CONFIG_ARC_STACK_CHECKING
-	_current->arch.k_stack_top = _current->arch.priv_stack_start;
-	_current->arch.k_stack_base = _current->arch.priv_stack_start +
-				CONFIG_PRIVILEGED_STACK_SIZE;
-	_current->arch.u_stack_top = _current->stack_info.start;
-	_current->arch.u_stack_base = _current->stack_info.start +
-				_current->stack_info.size;
-#endif
-
-	/* possible optimizaiton: no need to load mem domain anymore */
-	/* need to lock cpu here ? */
-	configure_mpu_thread(_current);
-
-	z_arc_userspace_enter(user_entry, p1, p2, p3,
-			     (u32_t)_current->stack_obj,
-			     _current->stack_info.size);
-	CODE_UNREACHABLE;
-}
-
-#endif

arch/arc/core/thread_entry_wrapper.S

@@ -6,30 +6,31 @@
 
 /**
  * @file
- * @brief Wrapper for z_thread_entry
+ * @brief Wrapper for _thread_entry
  *
- * Wrapper for z_thread_entry routine when called from the initial context.
+ * Wrapper for _thread_entry routine when called from the initial context.
  */
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 
-GTEXT(z_thread_entry_wrapper)
+GTEXT(_thread_entry_wrapper)
+GTEXT(_thread_entry)
 
 /*
- * @brief Wrapper for z_thread_entry
+ * @brief Wrapper for _thread_entry
  *
- * The routine pops parameters for the z_thread_entry from stack frame, prepared
- * by the z_new_thread() routine.
+ * The routine pops parameters for the _thread_entry from stack frame, prepared
+ * by the _new_thread() routine.
  *
  * @return N/A
  */
 
-SECTION_FUNC(TEXT, z_thread_entry_wrapper)
+SECTION_FUNC(TEXT, _thread_entry_wrapper)
 
 	pop_s r3
 	pop_s r2
 	pop_s r1
 	pop_s r0
-	j z_thread_entry
+	j _thread_entry
 	nop

arch/arc/core/timestamp.c

@@ -15,6 +15,9 @@
 #include <toolchain.h>
 #include <kernel_structs.h>
 
+extern int64_t _sys_clock_tick_count;
+extern int sys_clock_hw_cycles_per_tick;
+
 /*
  * @brief Read 64-bit timestamp value
  *
@@ -23,17 +26,17 @@
  *
  * @return 64-bit time stamp value
  */
-u64_t z_tsc_read(void)
+uint64_t _tsc_read(void)
 {
 	unsigned int key;
-	u64_t t;
-	u32_t count;
+	uint64_t t;
+	uint32_t count;
 
 	key = irq_lock();
-	t = (u64_t)z_tick_get();
-	count = z_arc_v2_aux_reg_read(_ARC_V2_TMR0_COUNT);
+	t = (uint64_t)_sys_clock_tick_count;
+	count = _arc_v2_aux_reg_read(_ARC_V2_TMR0_COUNT);
 	irq_unlock(key);
-	t *= (u64_t)sys_clock_hw_cycles_per_tick();
-	t += (u64_t)count;
+	t *= (uint64_t)sys_clock_hw_cycles_per_tick;
+	t += (uint64_t)count;
 	return t;
 }

arch/arc/core/userspace.S

@@ -1,310 +0,0 @@
-/*
- * Copyright (c) 2018 Synopsys.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <offsets_short.h>
-#include <toolchain.h>
-#include <linker/sections.h>
-#include <kernel_structs.h>
-#include <arch/cpu.h>
-#include <syscall.h>
-#include <swap_macros.h>
-
-.macro clear_scratch_regs
-	mov r1, 0
-	mov r2, 0
-	mov r3, 0
-	mov r4, 0
-	mov r5, 0
-	mov r6, 0
-	mov r7, 0
-	mov r8, 0
-	mov r9, 0
-	mov r10, 0
-	mov r11, 0
-	mov r12, 0
-.endm
-
-.macro clear_callee_regs
-	mov r25, 0
-	mov r24, 0
-	mov r23, 0
-	mov r22, 0
-	mov r21, 0
-	mov r20, 0
-	mov r19, 0
-	mov r18, 0
-	mov r17, 0
-	mov r16, 0
-
-	mov r15, 0
-	mov r14, 0
-	mov r13, 0
-.endm
-
-GTEXT(z_arc_userspace_enter)
-GTEXT(_arc_do_syscall)
-GTEXT(z_user_thread_entry_wrapper)
-GTEXT(z_arch_user_string_nlen)
-GTEXT(z_arch_user_string_nlen_fault_start)
-GTEXT(z_arch_user_string_nlen_fault_end)
-GTEXT(z_arch_user_string_nlen_fixup)
-/*
- * @brief Wrapper for z_thread_entry in the case of user thread
- * The init parameters are in privileged stack
- *
- * @return N/A
- */
-SECTION_FUNC(TEXT, z_user_thread_entry_wrapper)
-	pop_s r3
-	pop_s r2
-	pop_s r1
-	pop_s r0
-/* the start of user sp is in r5 */
-	pop r5
-/* start of privilege stack in blink */
-	mov blink, sp
-
-	st.aw r0, [r5, -4]
-	st.aw r1, [r5, -4]
-	st.aw r2, [r5, -4]
-	st.aw r3, [r5, -4]
-
-/*
- * when CONFIG_INIT_STACKS is enable, stack will be initialized
- * in z_new_thread_init.
- */
-	j _arc_go_to_user_space
-
-/**
- *
- * User space entry function
- *
- * This function is the entry point to user mode from privileged execution.
- * The conversion is one way, and threads which transition to user mode do
- * not transition back later, unless they are doing system calls.
- *
- */
-SECTION_FUNC(TEXT, z_arc_userspace_enter)
-	/*
-	 * In ARCv2, the U bit can only be set through exception return
-	 */
-#ifdef CONFIG_ARC_STACK_CHECKING
-	/* disable stack checking as the stack should be initialized */
-#ifdef CONFIG_ARC_HAS_SECURE
-	lr blink, [_ARC_V2_SEC_STAT]
-	bclr blink, blink, _ARC_V2_SEC_STAT_SSC_BIT
-	/* sflag blink */
-	/* sflag instruction is not supported in current ARC GNU */
-	.long 0x07ff302f
-#else
-	lr blink, [_ARC_V2_STATUS32]
-	bclr blink, blink, _ARC_V2_STATUS32_SC_BIT
-	kflag blink
-#endif
-#endif
-	/* the end of user stack in r5 */
-	add r5, r4, r5
-	/* start of privilege stack */
-	add blink, r5, CONFIG_PRIVILEGED_STACK_SIZE+STACK_GUARD_SIZE
-	mov sp, r5
-
-	push_s r0
-	push_s r1
-	push_s r2
-	push_s r3
-
-	mov r5, sp /* skip r0, r1, r2, r3 */
-
-#ifdef CONFIG_INIT_STACKS
-	mov r0, 0xaaaaaaaa
-#else
-	mov r0, 0x0
-#endif
-_clear_user_stack:
-	st.ab r0, [r4, 4]
-	cmp r4, r5
-	jlt _clear_user_stack
-
-#ifdef CONFIG_ARC_STACK_CHECKING
-	mov r1, _kernel
-	ld_s r2, [r1, _kernel_offset_to_current]
-
-	_load_stack_check_regs
-
-#ifdef CONFIG_ARC_HAS_SECURE
-	lr r0, [_ARC_V2_SEC_STAT]
-	bset r0, r0, _ARC_V2_SEC_STAT_SSC_BIT
-	/* sflag r0 */
-	/* sflag instruction is not supported in current ARC GNU */
-	.long 0x003f302f
-#else
-	lr r0, [_ARC_V2_STATUS32]
-	bset r0, r0, _ARC_V2_STATUS32_SC_BIT
-	kflag r0
-#endif
-#endif
-
-_arc_go_to_user_space:
-	lr r0, [_ARC_V2_STATUS32]
-	bset r0, r0, _ARC_V2_STATUS32_U_BIT
-
-	mov r1, z_thread_entry_wrapper
-
-	/* fake exception return */
-	kflag _ARC_V2_STATUS32_AE
-
-	sr r0, [_ARC_V2_ERSTATUS]
-	sr r1, [_ARC_V2_ERET]
-
-#ifdef CONFIG_ARC_HAS_SECURE
-	lr r0, [_ARC_V2_SEC_STAT]
-	/* the mode returns from exception return is secure mode */
-	bset r0, r0, 31
-	sr r0, [_ARC_V2_ERSEC_STAT]
-	sr r5, [_ARC_V2_SEC_U_SP]
-#else
-	/* when exception returns from kernel to user, sp and _ARC_V2_USER_SP
-	 * will be switched
-	 */
-	sr r5, [_ARC_V2_USER_SP]
-#endif
-	mov sp, blink
-
-	mov r0, 0
-
-	clear_callee_regs
-
-	clear_scratch_regs
-
-	mov fp, 0
-	mov r29, 0
-	mov r30, 0
-	mov blink, 0
-
-#ifdef CONFIG_EXECUTION_BENCHMARKING
-	b _capture_value_for_benchmarking_userspace
-return_loc_userspace_enter:
-#endif /* CONFIG_EXECUTION_BENCHMARKING */
-
-	rtie
-
-/**
- *
- * Userspace system call function
- *
- * This function is used to do system calls from unprivileged code.  This
- * function is responsible for the following:
- * 1) Dispatching the system call
- * 2) Restoring stack and calling back to the caller of the system call
- *
- */
-SECTION_FUNC(TEXT, _arc_do_syscall)
-	/* r0-r5: arg1-arg6, r6 is call id */
-	/* the call id is already checked in trap_s handler */
-	push_s blink
-
-	mov blink, _k_syscall_table
-	ld.as r6, [blink, r6]
-
-	jl [r6]
-
-	/*
-	 * no need to clear callee regs, as they will be saved and restored
-	 * automatically
-	 */
-	clear_scratch_regs
-
-	mov r29, 0
-	mov r30, 0
-
-	pop_s blink
-
-	/* through fake exception return, go back to the caller */
-	kflag _ARC_V2_STATUS32_AE
-
-	/* the status and return address are saved in trap_s handler */
-	pop r6
-	sr r6, [_ARC_V2_ERSTATUS]
-	pop r6
-	sr r6, [_ARC_V2_ERET]
-#ifdef CONFIG_ARC_HAS_SECURE
-	pop r6
-	sr r6, [_ARC_V2_ERSEC_STAT]
-#endif
-
-	mov r6, 0
-
-	rtie
-
-
-/*
- * size_t z_arch_user_string_nlen(const char *s, size_t maxsize, int *err_arg)
- */
-SECTION_FUNC(TEXT, z_arch_user_string_nlen)
-	/* int err; */
-	sub_s sp,sp,0x4
-
-	/* Initial error value (-1 failure), store at [sp,0] */
-	mov_s r3, -1
-	st_s r3, [sp, 0]
-
-	/* Loop setup.
-	 * r12 (position locator) = s - 1
-	 * r0 (length counter return value)) = 0
-	 * lp_count = maxsize + 1
-	 * */
-	sub r12, r0, 0x1
-	mov_s r0, 0
-	add_s r1, r1, 1
-	mov lp_count, r1
-
-strlen_loop:
-z_arch_user_string_nlen_fault_start:
-	/* is the byte at ++r12 a NULL? if so, we're done. Might fault! */
-	ldb.aw r1, [r12, 1]
-
-z_arch_user_string_nlen_fault_end:
-	brne_s r1, 0, not_null
-
-strlen_done:
-	/* Success, set err to 0 */
-	mov_s r1, 0
-	st_s r1, [sp, 0]
-
-z_arch_user_string_nlen_fixup:
-	/* *err_arg = err; Pop stack and return */
-	ld_s r1, [sp, 0]
-	add_s sp, sp, 4
-	j_s.d [blink]
-	st_s r1, [r2, 0]
-
-not_null:
-	/* check if we've hit the maximum, if so we're done. */
-	brne.d.nt lp_count, 0x1, inc_len
-	sub lp_count, lp_count, 0x1
-	b_s strlen_done
-
-inc_len:
-	/* increment length measurement, loop again */
-	add_s r0, r0, 1
-	b_s strlen_loop
-
-#ifdef CONFIG_EXECUTION_BENCHMARKING
-	.balign 4
-_capture_value_for_benchmarking_userspace:
-	mov r1, _kernel
-	ld_s r2, [r1, _kernel_offset_to_current]
-	_save_callee_saved_regs
-	push_s blink
-
-	bl read_timer_end_of_userspace_enter
-
-	pop_s blink
-	mov r1, _kernel
-	ld_s r2, [r1, _kernel_offset_to_current]
-	_load_callee_saved_regs
-	b return_loc_userspace_enter
-#endif

arch/arc/core/vector_table.c

@@ -23,44 +23,44 @@
  * swapped.
  */
 
-#include <zephyr/types.h>
+#include <stdint.h>
 #include <toolchain.h>
 #include "vector_table.h"
 
 struct vector_table {
-	u32_t reset;
-	u32_t memory_error;
-	u32_t instruction_error;
-	u32_t ev_machine_check;
-	u32_t ev_tlb_miss_i;
-	u32_t ev_tlb_miss_d;
-	u32_t ev_prot_v;
-	u32_t ev_privilege_v;
-	u32_t ev_swi;
-	u32_t ev_trap;
-	u32_t ev_extension;
-	u32_t ev_div_zero;
-	u32_t ev_dc_error;
-	u32_t ev_maligned;
-	u32_t unused_1;
-	u32_t unused_2;
+	uint32_t reset;
+	uint32_t memory_error;
+	uint32_t instruction_error;
+	uint32_t ev_machine_check;
+	uint32_t ev_tlb_miss_i;
+	uint32_t ev_tlb_miss_d;
+	uint32_t ev_prot_v;
+	uint32_t ev_privilege_v;
+	uint32_t ev_swi;
+	uint32_t ev_trap;
+	uint32_t ev_extension;
+	uint32_t ev_div_zero;
+	uint32_t ev_dc_error;
+	uint32_t ev_maligned;
+	uint32_t unused_1;
+	uint32_t unused_2;
 };
 
-struct vector_table _VectorTable Z_GENERIC_SECTION(.exc_vector_table) = {
-	(u32_t)__reset,
-	(u32_t)__memory_error,
-	(u32_t)__instruction_error,
-	(u32_t)__ev_machine_check,
-	(u32_t)__ev_tlb_miss_i,
-	(u32_t)__ev_tlb_miss_d,
-	(u32_t)__ev_prot_v,
-	(u32_t)__ev_privilege_v,
-	(u32_t)__ev_swi,
-	(u32_t)__ev_trap,
-	(u32_t)__ev_extension,
-	(u32_t)__ev_div_zero,
-	(u32_t)__ev_dc_error,
-	(u32_t)__ev_maligned,
+struct vector_table _VectorTable _GENERIC_SECTION(.exc_vector_table) = {
+	(uint32_t)__reset,
+	(uint32_t)__memory_error,
+	(uint32_t)__instruction_error,
+	(uint32_t)__ev_machine_check,
+	(uint32_t)__ev_tlb_miss_i,
+	(uint32_t)__ev_tlb_miss_d,
+	(uint32_t)__ev_prot_v,
+	(uint32_t)__ev_privilege_v,
+	(uint32_t)__ev_swi,
+	(uint32_t)__ev_trap,
+	(uint32_t)__ev_extension,
+	(uint32_t)__ev_div_zero,
+	(uint32_t)__ev_dc_error,
+	(uint32_t)__ev_maligned,
 	0,
 	0
 };

arch/arc/defconfig

@@ -0,0 +1,6 @@
+CONFIG_ARC=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
+CONFIG_CPU_ARCEM4=y
+CONFIG_CPU_ARCV2=y
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y

arch/arc/include/kernel_arch_data.h

@@ -17,143 +17,97 @@
  * symbols" in the offsets.o module.
  */
 
-#ifndef ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_DATA_H_
-#define ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_DATA_H_
+#ifndef _kernel_arch_data__h_
+#define _kernel_arch_data__h_
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <arch/cpu.h>
 #include <vector_table.h>
-#include <kernel_arch_thread.h>
 
 #ifndef _ASMLANGUAGE
 #include <kernel.h>
-#include <kernel_internal.h>
-#include <zephyr/types.h>
+#include <nano_internal.h>
+#include <stdint.h>
 #include <misc/util.h>
 #include <misc/dlist.h>
 #endif
 
 #ifndef _ASMLANGUAGE
-#ifdef CONFIG_ARC_HAS_SECURE
+
+struct _caller_saved {
+	/*
+	 * Saved on the stack as part of handling a regular IRQ or by the
+	 * kernel when calling the FIRQ return code.
+	 */
+};
+
+typedef struct _caller_saved _caller_saved_t;
+
 struct _irq_stack_frame {
-	u32_t lp_end;
-	u32_t lp_start;
-	u32_t lp_count;
+	uint32_t r0;
+	uint32_t r1;
+	uint32_t r2;
+	uint32_t r3;
+	uint32_t r4;
+	uint32_t r5;
+	uint32_t r6;
+	uint32_t r7;
+	uint32_t r8;
+	uint32_t r9;
+	uint32_t r10;
+	uint32_t r11;
+	uint32_t r12;
+	uint32_t r13;
+	uint32_t blink;
+	uint32_t lp_end;
+	uint32_t lp_start;
+	uint32_t lp_count;
 #ifdef CONFIG_CODE_DENSITY
 	/*
 	 * Currently unsupported. This is where those registers are
 	 * automatically pushed on the stack by the CPU when taking a regular
 	 * IRQ.
 	 */
-	u32_t ei_base;
-	u32_t ldi_base;
-	u32_t jli_base;
+	uint32_t ei_base;
+	uint32_t ldi_base;
+	uint32_t jli_base;
 #endif
-	u32_t r0;
-	u32_t r1;
-	u32_t r2;
-	u32_t r3;
-	u32_t r4;
-	u32_t r5;
-	u32_t r6;
-	u32_t r7;
-	u32_t r8;
-	u32_t r9;
-	u32_t r10;
-	u32_t r11;
-	u32_t r12;
-	u32_t r13;
-	u32_t blink;
-	u32_t pc;
-	u32_t sec_stat;
-	u32_t status32;
+	uint32_t pc;
+	uint32_t status32;
 };
-#else
-struct _irq_stack_frame {
-	u32_t r0;
-	u32_t r1;
-	u32_t r2;
-	u32_t r3;
-	u32_t r4;
-	u32_t r5;
-	u32_t r6;
-	u32_t r7;
-	u32_t r8;
-	u32_t r9;
-	u32_t r10;
-	u32_t r11;
-	u32_t r12;
-	u32_t r13;
-	u32_t blink;
-	u32_t lp_end;
-	u32_t lp_start;
-	u32_t lp_count;
-#ifdef CONFIG_CODE_DENSITY
-	/*
-	 * Currently unsupported. This is where those registers are
-	 * automatically pushed on the stack by the CPU when taking a regular
-	 * IRQ.
-	 */
-	u32_t ei_base;
-	u32_t ldi_base;
-	u32_t jli_base;
-#endif
-	u32_t pc;
-	u32_t status32;
-};
-#endif
 
 typedef struct _irq_stack_frame _isf_t;
 
-
+struct _callee_saved {
+	uint32_t sp; /* r28 */
+};
+typedef struct _callee_saved _callee_saved_t;
 
 /* callee-saved registers pushed on the stack, not in k_thread */
 struct _callee_saved_stack {
-	u32_t r13;
-	u32_t r14;
-	u32_t r15;
-	u32_t r16;
-	u32_t r17;
-	u32_t r18;
-	u32_t r19;
-	u32_t r20;
-	u32_t r21;
-	u32_t r22;
-	u32_t r23;
-	u32_t r24;
-	u32_t r25;
-	u32_t r26;
-	u32_t fp; /* r27 */
-
-#ifdef CONFIG_USERSPACE
-#ifdef CONFIG_ARC_HAS_SECURE
-	u32_t user_sp;
-	u32_t kernel_sp;
-#else
-	u32_t user_sp;
-#endif
-#endif
+	uint32_t r13;
+	uint32_t r14;
+	uint32_t r15;
+	uint32_t r16;
+	uint32_t r17;
+	uint32_t r18;
+	uint32_t r19;
+	uint32_t r20;
+	uint32_t r21;
+	uint32_t r22;
+	uint32_t r23;
+	uint32_t r24;
+	uint32_t r25;
+	uint32_t r26;
+	uint32_t fp; /* r27 */
 	/* r28 is the stack pointer and saved separately */
 	/* r29 is ILINK and does not need to be saved */
-	u32_t r30;
-#ifdef CONFIG_FP_SHARING
-	u32_t r58;
-	u32_t r59;
-	u32_t fpu_status;
-	u32_t fpu_ctrl;
-#ifdef CONFIG_FP_FPU_DA
-	u32_t dpfp2h;
-	u32_t dpfp2l;
-	u32_t dpfp1h;
-	u32_t dpfp1l;
-#endif
-
-#endif
+	uint32_t r30;
 	/*
 	 * No need to save r31 (blink), it's either alread pushed as the pc or
 	 * blink on an irq stack frame.
@@ -162,6 +116,45 @@ struct _callee_saved_stack {
 
 typedef struct _callee_saved_stack _callee_saved_stack_t;
 
+#endif /* _ASMLANGUAGE */
+
+/* stacks */
+
+#define STACK_ALIGN_SIZE 4
+
+#define STACK_ROUND_UP(x) ROUND_UP(x, STACK_ALIGN_SIZE)
+#define STACK_ROUND_DOWN(x) ROUND_DOWN(x, STACK_ALIGN_SIZE)
+
+/*
+ * Reason a thread has relinquished control: fibers can only be in the NONE
+ * or COOP state, tasks can be one in the four.
+ */
+#define _CAUSE_NONE 0
+#define _CAUSE_COOP 1
+#define _CAUSE_RIRQ 2
+#define _CAUSE_FIRQ 3
+
+#ifndef _ASMLANGUAGE
+
+struct _thread_arch {
+
+	/* interrupt key when relinquishing control */
+	uint32_t intlock_key;
+
+	/* one of the _CAUSE_xxxx definitions above */
+	int relinquish_cause;
+
+	/* return value from _Swap */
+	unsigned int return_value;
+
+#ifdef CONFIG_ARC_STACK_CHECKING
+	/* top of stack for hardware stack checking */
+	uint32_t stack_top;
+#endif
+};
+
+typedef struct _thread_arch _thread_arch_t;
+
 struct _kernel_arch {
 
 	char *rirq_sp; /* regular IRQ stack pointer base */
@@ -177,15 +170,8 @@ typedef struct _kernel_arch _kernel_arch_t;
 
 #endif /* _ASMLANGUAGE */
 
-/* stacks */
-
-#define STACK_ALIGN_SIZE 4
-
-#define STACK_ROUND_UP(x) ROUND_UP(x, STACK_ALIGN_SIZE)
-#define STACK_ROUND_DOWN(x) ROUND_DOWN(x, STACK_ALIGN_SIZE)
-
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_DATA_H_ */
+#endif /* _kernel_arch_data__h_ */

arch/arc/include/kernel_arch_func.h

@@ -17,8 +17,8 @@
  * symbols" in the offsets.o module.
  */
 
-#ifndef ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_FUNC_H_
-#define ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_FUNC_H_
+#ifndef _kernel_arch_func__h_
+#define _kernel_arch_func__h_
 
 #ifdef __cplusplus
 extern "C" {
@@ -31,38 +31,52 @@ extern "C" {
 #include <v2/irq.h>
 #endif
 
-static ALWAYS_INLINE void kernel_arch_init(void)
+static ALWAYS_INLINE void nanoArchInit(void)
 {
-	z_irq_setup();
+	_irq_setup();
 }
 
 static ALWAYS_INLINE void
-z_set_thread_return_value(struct k_thread *thread, unsigned int value)
+_set_thread_return_value(struct k_thread *thread, unsigned int value)
 {
 	thread->arch.return_value = value;
 }
 
+static ALWAYS_INLINE int _is_in_isr(void)
+{
+	uint32_t act = _arc_v2_aux_reg_read(_ARC_V2_AUX_IRQ_ACT);
+#if CONFIG_IRQ_OFFLOAD
+	/* Check if we're in a TRAP_S exception as well */
+	if (_arc_v2_aux_reg_read(_ARC_V2_STATUS32) & _ARC_V2_STATUS32_AE &&
+	    _ARC_V2_ECR_VECTOR(_arc_v2_aux_reg_read(_ARC_V2_ECR)) == EXC_EV_TRAP
+	   ) {
+		return 1;
+	}
+#endif
+	return ((act & 0xffff) != 0);
+}
+
 /**
  *
- * @brief Indicates the interrupt number of the highest priority
+ * @bried Indicates the interrupt number of the highest priority
  * active interrupt
  *
  * @return IRQ number
  */
-static ALWAYS_INLINE int Z_INTERRUPT_CAUSE(void)
+static ALWAYS_INLINE int _INTERRUPT_CAUSE(void)
 {
-	u32_t irq_num = z_arc_v2_aux_reg_read(_ARC_V2_ICAUSE);
+	uint32_t irq_num = _arc_v2_aux_reg_read(_ARC_V2_ICAUSE);
 
 	return irq_num;
 }
 
-#define z_is_in_isr	z_arc_v2_irq_unit_is_in_isr
 
-extern void z_thread_entry_wrapper(void);
-extern void z_user_thread_entry_wrapper(void);
+extern void _thread_entry_wrapper(void);
 
-extern void z_arc_userspace_enter(k_thread_entry_t user_entry, void *p1,
-		 void *p2, void *p3, u32_t stack, u32_t size);
+static inline void _IntLibInit(void)
+{
+	/* nothing needed, here because the kernel requires it */
+}
 
 #endif /* _ASMLANGUAGE */
 
@@ -70,4 +84,4 @@ extern void z_arc_userspace_enter(k_thread_entry_t user_entry, void *p1,
 }
 #endif
 
-#endif /* ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_FUNC_H_ */
+#endif /* _kernel_arch_func__h_ */

arch/arc/include/kernel_arch_thread.h

@@ -1,81 +0,0 @@
-/*
- * Copyright (c) 2017 Intel Corporation
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/**
- * @file
- * @brief Per-arch thread definition
- *
- * This file contains definitions for
- *
- *  struct _thread_arch
- *  struct _callee_saved
- *  struct _caller_saved
- *
- * necessary to instantiate instances of struct k_thread.
- */
-
-#ifndef ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_THREAD_H_
-#define ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_THREAD_H_
-
-/*
- * Reason a thread has relinquished control: threads can only be in the NONE
- * or COOP state, threads can be one in the four.
- */
-#define _CAUSE_NONE 0
-#define _CAUSE_COOP 1
-#define _CAUSE_RIRQ 2
-#define _CAUSE_FIRQ 3
-
-#ifndef _ASMLANGUAGE
-#include <zephyr/types.h>
-
-struct _caller_saved {
-	/*
-	 * Saved on the stack as part of handling a regular IRQ or by the
-	 * kernel when calling the FIRQ return code.
-	 */
-};
-
-typedef struct _caller_saved _caller_saved_t;
-
-struct _callee_saved {
-	u32_t sp; /* r28 */
-};
-typedef struct _callee_saved _callee_saved_t;
-
-struct _thread_arch {
-
-	/* interrupt key when relinquishing control */
-	u32_t intlock_key;
-
-	/* one of the _CAUSE_xxxx definitions above */
-	int relinquish_cause;
-
-	/* return value from z_swap */
-	unsigned int return_value;
-
-#ifdef CONFIG_ARC_STACK_CHECKING
-	/* High address of stack region, stack grows downward from this
-	 * location. Usesd for hardware stack checking
-	 */
-	u32_t k_stack_base;
-	u32_t k_stack_top;
-#ifdef CONFIG_USERSPACE
-	u32_t u_stack_base;
-	u32_t u_stack_top;
-#endif
-#endif
-
-#ifdef CONFIG_USERSPACE
-	u32_t priv_stack_start;
-#endif
-};
-
-typedef struct _thread_arch _thread_arch_t;
-
-#endif /* _ASMLANGUAGE */
-
-#endif /* ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_THREAD_H_ */

arch/arc/include/kernel_event_logger_arch.h

@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2016 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief Kernel event logger support for ARM
+ */
+
+#ifndef __KERNEL_EVENT_LOGGER_ARCH_H__
+#define __KERNEL_EVENT_LOGGER_ARCH_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Get the identification of the current interrupt.
+ *
+ * This routine obtain the key of the interrupt that is currently processed
+ * if it is called from a ISR context.
+ *
+ * @return The key of the interrupt that is currently being processed.
+ */
+int _sys_current_irq_key_get(void)
+{
+	return _INTERRUPT_CAUSE();
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __KERNEL_EVENT_LOGGER_ARCH_H__ */

arch/arc/include/offsets_short_arch.h

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#ifndef ZEPHYR_ARCH_ARC_INCLUDE_OFFSETS_SHORT_ARCH_H_
-#define ZEPHYR_ARCH_ARC_INCLUDE_OFFSETS_SHORT_ARCH_H_
+#ifndef _offsets_short_arch__h_
+#define _offsets_short_arch__h_
 
 #include <offsets.h>
 
@@ -26,21 +26,13 @@
 #define _thread_offset_to_return_value \
 	(___thread_t_arch_OFFSET + ___thread_arch_t_return_value_OFFSET)
 
-#define _thread_offset_to_k_stack_base \
-	(___thread_t_arch_OFFSET + ___thread_arch_t_k_stack_base_OFFSET)
-
-#define _thread_offset_to_k_stack_top \
-	(___thread_t_arch_OFFSET + ___thread_arch_t_k_stack_top_OFFSET)
-
-#define _thread_offset_to_u_stack_base \
-	(___thread_t_arch_OFFSET + ___thread_arch_t_u_stack_base_OFFSET)
-
-#define _thread_offset_to_u_stack_top \
-	(___thread_t_arch_OFFSET + ___thread_arch_t_u_stack_top_OFFSET)
+#define _thread_offset_to_stack_top \
+	(___thread_t_arch_OFFSET + ___thread_arch_t_stack_top_OFFSET)
 
 #define _thread_offset_to_sp \
 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_sp_OFFSET)
 
+
 /* end - threads */
 
-#endif /* ZEPHYR_ARCH_ARC_INCLUDE_OFFSETS_SHORT_ARCH_H_ */
+#endif /* _offsets_short_arch__h_ */

arch/arc/include/swap_macros.h

@@ -6,8 +6,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#ifndef ZEPHYR_ARCH_ARC_INCLUDE_SWAP_MACROS_H_
-#define ZEPHYR_ARCH_ARC_INCLUDE_SWAP_MACROS_H_
+#ifndef _SWAP_MACROS__H_
+#define _SWAP_MACROS__H_
 
 #include <kernel_structs.h>
 #include <offsets_short.h>
@@ -41,84 +41,17 @@ extern "C" {
 	st r25, [sp, ___callee_saved_stack_t_r25_OFFSET]
 	st r26, [sp, ___callee_saved_stack_t_r26_OFFSET]
 	st fp,  [sp, ___callee_saved_stack_t_fp_OFFSET]
-
-#ifdef CONFIG_USERSPACE
-#ifdef CONFIG_ARC_HAS_SECURE
-	lr r13, [_ARC_V2_SEC_U_SP]
-	st r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
-	lr r13, [_ARC_V2_SEC_K_SP]
-	st r13, [sp, ___callee_saved_stack_t_kernel_sp_OFFSET]
-#else
-	lr r13, [_ARC_V2_USER_SP]
-	st r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
-#endif
-#endif
 	st r30, [sp, ___callee_saved_stack_t_r30_OFFSET]
 
-#ifdef CONFIG_FP_SHARING
-	st r58, [sp, ___callee_saved_stack_t_r58_OFFSET]
-	st r59, [sp, ___callee_saved_stack_t_r59_OFFSET]
-	lr r13, [_ARC_V2_FPU_STATUS]
-	st_s r13, [sp, ___callee_saved_stack_t_fpu_status_OFFSET]
-	lr r13, [_ARC_V2_FPU_CTRL]
-	st_s r13, [sp, ___callee_saved_stack_t_fpu_ctrl_OFFSET]
-
-#ifdef CONFIG_FP_FPU_DA
-	lr r13, [_ARC_V2_FPU_DPFP1L]
-	st_s r13, [sp, ___callee_saved_stack_t_dpfp1l_OFFSET]
-	lr r13, [_ARC_V2_FPU_DPFP1H]
-	st_s r13, [sp, ___callee_saved_stack_t_dpfp1h_OFFSET]
-	lr r13, [_ARC_V2_FPU_DPFP2L]
-	st_s r13, [sp, ___callee_saved_stack_t_dpfp2l_OFFSET]
-	lr r13, [_ARC_V2_FPU_DPFP2H]
-	st_s r13, [sp, ___callee_saved_stack_t_dpfp2h_OFFSET]
-#endif
-
-#endif
-
-	/* save stack pointer in struct k_thread */
+	/* save stack pointer in struct tcs */
 	st sp, [r2, _thread_offset_to_sp]
 .endm
 
 /* entering this macro, current is in r2 */
 .macro _load_callee_saved_regs
-	/* restore stack pointer from struct k_thread */
+	/* restore stack pointer from struct tcs */
 	ld sp, [r2, _thread_offset_to_sp]
 
-#ifdef CONFIG_FP_SHARING
-	ld r58, [sp, ___callee_saved_stack_t_r58_OFFSET]
-	ld r59, [sp, ___callee_saved_stack_t_r59_OFFSET]
-
-	ld_s r13, [sp, ___callee_saved_stack_t_fpu_status_OFFSET]
-	sr r13, [_ARC_V2_FPU_STATUS]
-	ld_s r13, [sp, ___callee_saved_stack_t_fpu_ctrl_OFFSET]
-	sr r13, [_ARC_V2_FPU_CTRL]
-
-#ifdef CONFIG_FP_FPU_DA
-	ld_s r13, [sp, ___callee_saved_stack_t_dpfp1l_OFFSET]
-	sr r13, [_ARC_V2_FPU_DPFP1L]
-	ld_s r13, [sp, ___callee_saved_stack_t_dpfp1h_OFFSET]
-	sr r13, [_ARC_V2_FPU_DPFP1H]
-	ld_s r13, [sp, ___callee_saved_stack_t_dpfp2l_OFFSET]
-	sr r13, [_ARC_V2_FPU_DPFP2L]
-	ld_s r13, [sp, ___callee_saved_stack_t_dpfp2h_OFFSET]
-	sr r13, [_ARC_V2_FPU_DPFP2H]
-#endif
-
-#endif
-
-#ifdef CONFIG_USERSPACE
-#ifdef CONFIG_ARC_HAS_SECURE
-	ld r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
-	sr r13, [_ARC_V2_SEC_U_SP]
-	ld r13, [sp, ___callee_saved_stack_t_kernel_sp_OFFSET]
-	sr r13, [_ARC_V2_SEC_K_SP]
-#else
-	ld_s r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
-	sr r13, [_ARC_V2_USER_SP]
-#endif
-#endif
-
 	ld_s r13, [sp, ___callee_saved_stack_t_r13_OFFSET]
 	ld_s r14, [sp, ___callee_saved_stack_t_r14_OFFSET]
 	ld_s r15, [sp, ___callee_saved_stack_t_r15_OFFSET]
@@ -178,15 +111,6 @@ extern "C" {
 	st_s r1, [sp, ___isf_t_lp_start_OFFSET]
 	st_s r0, [sp, ___isf_t_lp_end_OFFSET]
 
-#ifdef CONFIG_CODE_DENSITY
-	lr r1, [_ARC_V2_JLI_BASE]
-	lr r0, [_ARC_V2_LDI_BASE]
-	lr r2, [_ARC_V2_EI_BASE]
-	st_s r1, [sp, ___isf_t_jli_base_OFFSET]
-	st_s r0, [sp, ___isf_t_ldi_base_OFFSET]
-	st_s r2, [sp, ___isf_t_ei_base_OFFSET]
-#endif
-
 .endm
 
 /*
@@ -197,15 +121,6 @@ extern "C" {
 
 	ld blink, [sp, ___isf_t_blink_OFFSET]
 
-#ifdef CONFIG_CODE_DENSITY
-	ld_s r1, [sp, ___isf_t_jli_base_OFFSET]
-	ld_s r0, [sp, ___isf_t_ldi_base_OFFSET]
-	ld_s r2, [sp, ___isf_t_ei_base_OFFSET]
-	sr r1, [_ARC_V2_JLI_BASE]
-	sr r0, [_ARC_V2_LDI_BASE]
-	sr r2, [_ARC_V2_EI_BASE]
-#endif
-
 	ld_s r0, [sp, ___isf_t_lp_count_OFFSET]
 	mov lp_count, r0
 	ld_s r1, [sp, ___isf_t_lp_start_OFFSET]
@@ -228,7 +143,6 @@ extern "C" {
 	ld_s r1,  [sp, ___isf_t_r1_OFFSET]
 	ld_s r0,  [sp, ___isf_t_r0_OFFSET]
 
-
 	/*
 	 * All gprs have been reloaded, the only one that is still usable is
 	 * ilink.
@@ -236,46 +150,16 @@ extern "C" {
 	 * The pc and status32 values will still be on the stack. We cannot
 	 * pop them yet because the callers of _pop_irq_stack_frame must reload
 	 * status32 differently depending on the execution context they are
-	 * running in (z_swap(), firq or exception).
+	 * running in (_Swap(), firq or exception).
 	 */
 	add_s sp, sp, ___isf_t_SIZEOF
 
 .endm
 
-/*
- * To use this macor, r2 should have the value of thread struct pointer to
- * _kernel.current. r3 is a scratch reg.
- */
-.macro _load_stack_check_regs
-#ifdef CONFIG_ARC_HAS_SECURE
-	ld r3, [r2, _thread_offset_to_k_stack_base]
-	sr r3, [_ARC_V2_S_KSTACK_BASE]
-	ld r3, [r2, _thread_offset_to_k_stack_top]
-	sr r3, [_ARC_V2_S_KSTACK_TOP]
-#ifdef CONFIG_USERSPACE
-	ld r3, [r2, _thread_offset_to_u_stack_base]
-	sr r3, [_ARC_V2_S_USTACK_BASE]
-	ld r3, [r2, _thread_offset_to_u_stack_top]
-	sr r3, [_ARC_V2_S_USTACK_TOP]
-#endif
-#else /* CONFIG_ARC_HAS_SECURE */
-	ld r3, [r2, _thread_offset_to_k_stack_base]
-	sr r3, [_ARC_V2_KSTACK_BASE]
-	ld r3, [r2, _thread_offset_to_k_stack_top]
-	sr r3, [_ARC_V2_KSTACK_TOP]
-#ifdef CONFIG_USERSPACE
-	ld r3, [r2, _thread_offset_to_u_stack_base]
-	sr r3, [_ARC_V2_USTACK_BASE]
-	ld r3, [r2, _thread_offset_to_u_stack_top]
-	sr r3, [_ARC_V2_USTACK_TOP]
-#endif
-#endif /* CONFIG_ARC_HAS_SECURE */
-.endm
-
 #endif /* _ASMLANGUAGE */
 
 #ifdef __cplusplus
 }
 #endif
 
-#endif /*  ZEPHYR_ARCH_ARC_INCLUDE_SWAP_MACROS_H_ */
+#endif /*  _SWAP_MACROS__H_ */

arch/arc/include/tracing_arch.h

@@ -1,36 +0,0 @@
-/*
- * Copyright (c) 2016 Intel Corporation
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/**
- * @file
- * @brief Kernel event logger support for ARM
- */
-
-#ifndef ZEPHYR_ARCH_ARC_INCLUDE_TRACING_ARCH_H_
-#define ZEPHYR_ARCH_ARC_INCLUDE_TRACING_ARCH_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @brief Get the identification of the current interrupt.
- *
- * This routine obtain the key of the interrupt that is currently processed
- * if it is called from a ISR context.
- *
- * @return The key of the interrupt that is currently being processed.
- */
-int z_sys_current_irq_key_get(void)
-{
-	return Z_INTERRUPT_CAUSE();
-}
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ZEPHYR_ARCH_ARC_INCLUDE_TRACING_ARCH_H_ */

arch/arc/include/v2/cache.h

@@ -12,8 +12,8 @@
  * ARCv2 processor architecture.
  */
 
-#ifndef ZEPHYR_ARCH_ARC_INCLUDE_V2_CACHE_H_
-#define ZEPHYR_ARCH_ARC_INCLUDE_V2_CACHE_H_
+#ifndef _ARCV2_CACHE__H_
+#define _ARCV2_CACHE__H_
 
 #include <arch/cpu.h>
 
@@ -34,19 +34,19 @@ extern "C" {
  *
  * Enables the i-cache and sets it to direct access mode.
  */
-static ALWAYS_INLINE void z_icache_setup(void)
+static ALWAYS_INLINE void _icache_setup(void)
 {
-	u32_t icache_config = (
+	uint32_t icache_config = (
 		IC_CACHE_DIRECT | /* direct mapping (one-way assoc.) */
 		IC_CACHE_ENABLE   /* i-cache enabled */
 	);
-	u32_t val;
+	uint32_t val;
 
-	val = z_arc_v2_aux_reg_read(_ARC_V2_I_CACHE_BUILD);
+	val = _arc_v2_aux_reg_read(_ARC_V2_I_CACHE_BUILD);
 	val &= 0xff;
-	if (val != 0U) { /* is i-cache present? */
+	if (val != 0) { /* is i-cache present? */
 		/* configure i-cache */
-		z_arc_v2_aux_reg_write(_ARC_V2_IC_CTRL, icache_config);
+		_arc_v2_aux_reg_write(_ARC_V2_IC_CTRL, icache_config);
 	}
 }
 
@@ -56,4 +56,4 @@ static ALWAYS_INLINE void z_icache_setup(void)
 }
 #endif
 
-#endif /* ZEPHYR_ARCH_ARC_INCLUDE_V2_CACHE_H_ */
+#endif /* _ARCV2_CACHE__H_ */

arch/arc/include/v2/irq.h

@@ -12,8 +12,8 @@
  * other definitions for the ARCv2 processor architecture.
  */
 
-#ifndef ZEPHYR_ARCH_ARC_INCLUDE_V2_IRQ_H_
-#define ZEPHYR_ARCH_ARC_INCLUDE_V2_IRQ_H_
+#ifndef _ARCV2_IRQ__H_
+#define _ARCV2_IRQ__H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -21,41 +21,37 @@ extern "C" {
 
 #define _ARC_V2_AUX_IRQ_CTRL_BLINK (1 << 9)
 #define _ARC_V2_AUX_IRQ_CTRL_LOOP_REGS (1 << 10)
-#define _ARC_V2_AUX_IRQ_CTRL_U (1 << 11)
 #define _ARC_V2_AUX_IRQ_CTRL_LP (1 << 13)
 #define _ARC_V2_AUX_IRQ_CTRL_14_REGS 7
 #define _ARC_V2_AUX_IRQ_CTRL_16_REGS 8
 #define _ARC_V2_AUX_IRQ_CTRL_32_REGS 16
 
-
 #define _ARC_V2_DEF_IRQ_LEVEL (CONFIG_NUM_IRQ_PRIO_LEVELS-1)
 #define _ARC_V2_WAKE_IRQ_LEVEL _ARC_V2_DEF_IRQ_LEVEL
 
 #ifndef _ASMLANGUAGE
 
-extern K_THREAD_STACK_DEFINE(_interrupt_stack, CONFIG_ISR_STACK_SIZE);
+extern void _firq_stack_setup(void);
+extern char _interrupt_stack[];
 
 /*
- * z_irq_setup
+ * _irq_setup
  *
  * Configures interrupt handling parameters
  */
-static ALWAYS_INLINE void z_irq_setup(void)
+static ALWAYS_INLINE void _irq_setup(void)
 {
-	u32_t aux_irq_ctrl_value = (
+	uint32_t aux_irq_ctrl_value = (
 		_ARC_V2_AUX_IRQ_CTRL_LOOP_REGS | /* save lp_xxx registers */
-#ifdef CONFIG_CODE_DENSITY
-		_ARC_V2_AUX_IRQ_CTRL_LP | /* save code density registers */
-#endif
 		_ARC_V2_AUX_IRQ_CTRL_BLINK     | /* save blink */
 		_ARC_V2_AUX_IRQ_CTRL_14_REGS     /* save r0 -> r13 (caller-saved) */
 	);
 
 	k_cpu_sleep_mode = _ARC_V2_WAKE_IRQ_LEVEL;
-	z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_CTRL, aux_irq_ctrl_value);
+	_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_CTRL, aux_irq_ctrl_value);
 
-	_kernel.irq_stack =
-		Z_THREAD_STACK_BUFFER(_interrupt_stack) + CONFIG_ISR_STACK_SIZE;
+	_kernel.irq_stack = _interrupt_stack + CONFIG_ISR_STACK_SIZE;
+	_firq_stack_setup();
 }
 
 #endif /* _ASMLANGUAGE */
@@ -64,4 +60,4 @@ static ALWAYS_INLINE void z_irq_setup(void)
 }
 #endif
 
-#endif /* ZEPHYR_ARCH_ARC_INCLUDE_V2_IRQ_H_ */
+#endif /* _ARCV2_IRQ__H_ */

arch/arc/include/vector_table.h

@@ -18,8 +18,8 @@
  * Refer to the ARCv2 manual for an explanation of the exceptions.
  */
 
-#ifndef ZEPHYR_ARCH_ARC_INCLUDE_VECTOR_TABLE_H_
-#define ZEPHYR_ARCH_ARC_INCLUDE_VECTOR_TABLE_H_
+#ifndef _VECTOR_TABLE__H_
+#define _VECTOR_TABLE__H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -29,8 +29,9 @@ extern "C" {
 
 #ifdef _ASMLANGUAGE
 
+#include <board.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 
 GTEXT(__start)
 GTEXT(_VectorTable)
@@ -76,4 +77,4 @@ extern void __ev_maligned(void);
 }
 #endif
 
-#endif /* ZEPHYR_ARCH_ARC_INCLUDE_VECTOR_TABLE_H_ */
+#endif /* _VECTOR_TABLE__H_ */

arch/arc/soc/em11d/Kbuild

@@ -0,0 +1,8 @@
+ccflags-y +=-I$(srctree)/arch/arc/soc/
+ccflags-y +=-I$(srctree)/include
+ccflags-y +=-I$(srctree)/include/drivers
+ccflags-y +=-I$(srctree)/drivers
+
+asflags-y := ${ccflags-y}
+
+obj-y = soc.o soc_config.o

arch/arc/soc/em11d/Kconfig.defconfig

@@ -0,0 +1,249 @@
+#
+# Copyright (c) 2014 Wind River Systems, Inc.
+# Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if SOC_EM11D
+
+config SOC
+	default em11d
+
+config NUM_IRQ_PRIO_LEVELS
+	# This processor supports 4 priority levels:
+	# 0 for Fast Interrupts (FIRQs) and 1-3 for Regular Interrupts (IRQs).
+	# TODO: But regular irq nesting is not implemented --
+	# so this must be 2 for now.
+	default 2
+
+config NUM_IRQS
+	# must be > the highest interrupt number used
+	default 36
+
+config RGF_NUM_BANKS
+	default 2
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default 20000000
+
+config HARVARD
+	def_bool n
+
+config FLASH_BASE_ADDRESS
+	default 0x00000000
+
+config FLASH_SIZE
+	default 0
+	# em11d has no FLASH so size is 0.
+
+config SRAM_BASE_ADDRESS
+	default 0x10000000
+
+config SRAM_SIZE
+	default 131072
+
+config ICCM_BASE_ADDRESS
+	default 0x00000000
+
+config ICCM_SIZE
+	default 64
+
+config DCCM_BASE_ADDRESS
+	default 0x80000000
+
+config DCCM_SIZE
+	default 64
+
+config CACHE_FLUSHING
+	def_bool y
+
+if GPIO
+
+config GPIO_DW
+	def_bool y
+
+if GPIO_DW
+
+config GPIO_DW_0
+	def_bool y
+
+if GPIO_DW_0
+
+config GPIO_DW_0_NAME
+	default "GPIO_PORTA"
+
+config GPIO_DW_0_IRQ_PRI
+	default 1
+
+endif # GPIO_DW_0
+
+config GPIO_DW_1
+	def_bool y
+
+if GPIO_DW_1
+
+config GPIO_DW_1_NAME
+	default "GPIO_PORTB"
+
+config GPIO_DW_1_IRQ_PRI
+	default 1
+
+endif # GPIO_DW_1
+
+config GPIO_DW_2
+	def_bool y
+
+if GPIO_DW_2
+
+config GPIO_DW_2_IRQ_PRI
+	default 1
+
+config GPIO_DW_2_NAME
+	default "GPIO_PORTC"
+
+endif # GPIO_DW_2
+
+config GPIO_DW_3
+	def_bool y
+
+if GPIO_DW_3
+
+config GPIO_DW_3_IRQ_PRI
+	default 1
+
+config GPIO_DW_3_NAME
+	default "GPIO_PORTD"
+
+endif # GPIO_DW_3
+
+endif # GPIO_DW
+
+endif # GPIO
+
+if I2C
+
+config I2C_CLOCK_SPEED
+	default 100
+
+config I2C_DW
+	def_bool y
+
+if I2C_DW
+
+config I2C_0
+	def_bool y
+
+if I2C_0
+
+config I2C_0_NAME
+	default "I2C_0"
+config I2C_0_DEFAULT_CFG
+	default 0x3
+config I2C_0_IRQ_PRI
+	default 1
+
+endif # I2C_0
+
+config I2C_1
+	def_bool y
+
+if I2C_1
+
+config I2C_1_NAME
+	default "I2C_1"
+config I2C_1_DEFAULT_CFG
+	default 0x3
+config I2C_1_IRQ_PRI
+	default 1
+
+endif # I2C_1
+
+endif # I2C_DW
+
+endif # I2C
+
+if UART_NS16550
+
+config UART_NS16550_PORT_0
+	def_bool n
+
+if UART_NS16550_PORT_0
+
+config UART_NS16550_PORT_0_NAME
+	default "UART_0"
+config UART_NS16550_PORT_0_IRQ_PRI
+	default 1
+config UART_NS16550_PORT_0_BAUD_RATE
+	default 115200
+config UART_NS16550_PORT_0_OPTIONS
+	default 0
+
+endif # UART_NS16550_PORT_0
+
+config UART_NS16550_PORT_1
+	def_bool y
+
+if UART_NS16550_PORT_1
+
+config UART_NS16550_PORT_1_NAME
+	default "UART_1"
+config UART_NS16550_PORT_1_IRQ_PRI
+	default 1
+config UART_NS16550_PORT_1_BAUD_RATE
+	default 115200
+config UART_NS16550_PORT_1_OPTIONS
+	default 0
+
+endif # UART_NS16550_PORT_1
+
+endif # UART_NS16550
+
+if UART_CONSOLE
+
+config UART_CONSOLE_ON_DEV_NAME
+	default "UART_1"
+
+endif
+
+if SPI
+
+config SPI_DW
+	def_bool y
+
+if SPI_DW
+
+config SPI_DW_CLOCK_GATE
+	def_bool n
+
+config SPI_DW_FIFO_DEPTH
+	default 32
+
+config SPI_DW_ARC_AUX_REGS
+	def_bool n
+
+config SPI_0
+	def_bool y
+
+if SPI_0
+
+config SPI_0_IRQ_PRI
+	default 0
+
+endif # SPI_0
+
+config SPI_1
+	def_bool y
+
+if SPI_1
+
+config SPI_1_IRQ_PRI
+	default 0
+
+endif # SPI_1
+
+endif # SPI_DW
+
+endif # SPI
+
+endif #SOC_EM11D

arch/arc/soc/em11d/Kconfig.soc

@@ -0,0 +1,3 @@
+
+config SOC_EM11D
+	bool "Synopsys ARC EM11D"

arch/arc/soc/em11d/Makefile

@@ -0,0 +1,2 @@
+soc-cflags = $(call cc-option,-mcpu=arcem) \
+                   $(call cc-option,-mno-sdata)

arch/arc/soc/em11d/linker.ld

@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @brief Linker script for the Synopsys EM Starterkit v2.2 EM11D platform.
+ */
+
+/*
+ * DRAM base address and size
+ *
+ * DRAM includes the exception vector table at reset, which is at
+ * the beginning of the region.
+ */
+#define SRAM_START		CONFIG_SRAM_BASE_ADDRESS
+#define SRAM_SIZE		CONFIG_SRAM_SIZE
+/* TODO: Using SRAM config for now, even though this is really DRAM. */
+
+/* Instruction Closely Coupled Memory (ICCM) base address and size */
+#define ICCM_START		CONFIG_ICCM_BASE_ADDRESS
+#define ICCM_SIZE		CONFIG_ICCM_SIZE
+
+/*
+ * DCCM base address and size. DCCM is the data memory.
+ */
+/* Data Closely Coupled Memory (DCCM) base address and size */
+#define DCCM_START		CONFIG_DCCM_BASE_ADDRESS
+#define DCCM_SIZE		CONFIG_DCCM_SIZE
+
+#include <arch/arc/v2/linker.ld>

arch/arc/soc/em11d/soc.h

@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @brief Board configuration macros for EM Starter kit board
+ *
+ * This header file is used to specify and describe board-level
+ * aspects for the target.
+ */
+
+#ifndef _BOARD__H_
+#define _BOARD__H_
+
+#include <misc/util.h>
+
+/* default system clock */
+
+#define SYSCLK_DEFAULT_IOSC_HZ MHZ(50)
+/* On the EM Starter Kit board, the peripheral bus clock frequency is 50Mhz */
+
+
+/* IRQs */
+
+#define IRQ_TIMER0 16
+#define IRQ_TIMER1 17
+
+#ifndef _ASMLANGUAGE
+
+#include <misc/util.h>
+#include <drivers/rand32.h>
+
+#define CONFIG_ARCV2_TIMER0_INT_LVL IRQ_TIMER0
+#define CONFIG_ARCV2_TIMER0_INT_PRI 0
+
+#define CONFIG_ARCV2_TIMER1_INT_LVL IRQ_TIMER1
+#define CONFIG_ARCV2_TIMER1_INT_PRI 1
+
+#define INT_ENABLE_ARC					~(0x00000001 << 8)
+#define INT_ENABLE_ARC_BIT_POS				(8)
+
+/* I2C */
+
+/* I2C_0 is on Pmod2 connector */
+#define I2C_DW_0_BASE_ADDR                      0xF0004000
+#define I2C_DW_0_IRQ                            23
+
+
+/* I2C_1 is on Pmod4 connector */
+#define I2C_DW_1_BASE_ADDR                      0xF0005000
+#define I2C_DW_1_IRQ                            24
+
+#define I2C_DW_IRQ_FLAGS			0
+
+/* GPIO */
+#define GPIO_DW_0_BASE_ADDR                     0xF0002000 /* GPIO 0 : PORTA */
+#define GPIO_DW_0_IRQ                           22
+#define GPIO_DW_0_BITS                          32
+#define GPIO_DW_PORT_0_INT_MASK                 0 /* n/a */
+#define GPIO_DW_0_IRQ_FLAGS			0 /* Defaults */
+
+#define GPIO_DW_1_BASE_ADDR                     0xF000200C /* GPIO 1 : PORTB */
+#define GPIO_DW_1_IRQ                           0          /* can't interrupt */
+#define GPIO_DW_1_BITS                          9          /* 9 LEDs on board */
+#define GPIO_DW_PORT_1_INT_MASK                 0 /* n/a */
+
+#define GPIO_DW_2_BASE_ADDR                     0xF0002018 /* GPIO 2 : PORTC */
+#define GPIO_DW_2_IRQ                           0          /* can't interrupt */
+#define GPIO_DW_2_BITS                          32
+#define GPIO_DW_PORT_2_INT_MASK                 0 /* n/a */
+
+#define GPIO_DW_3_BASE_ADDR                     0xF0002024 /* GPIO 3 : PORTD */
+#define GPIO_DW_3_IRQ                           0          /* can't interrupt */
+#define GPIO_DW_3_BITS                          12
+#define GPIO_DW_PORT_3_INT_MASK                 0 /* n/a */
+
+/* undef GPIO_DW_IO_ACCESS .. because memory mapped */
+/* undef CONFIG_GPIO_DW_0_IRQ_SHARED */
+/* undef CONFIG_GPIO_DW_CLOCK_GATE */
+/* undef CONFIG_SOC_QUARK_SE_C1000_SS */
+
+/* SPI */
+
+#define SPI_DW_SPI_CLOCK     SYSCLK_DEFAULT_IOSC_HZ
+
+#define SPI_DW_PORT_0_REGS   0xF0006000
+#define SPI_DW_PORT_1_REGS   0xF0007000
+
+#define SPI_DW_PORT_0_IRQ    25
+#define SPI_DW_PORT_1_IRQ    26
+
+#define SPI_DW_IRQ_FLAGS     0
+
+/*
+ * SPI Chip Select Assignments on EM Starter Kit
+ *
+ *  CS0   Pmod6 - pin 1 - J6
+ *  CS1   Pmod5 - pin 1 - J5 & Pmod 6 - pin 7 - J6
+ *  CS2   Pmod6 - pin 8 - J6
+ *  CS3   SDCard (onboard)
+ *  CS4   Internal SPI Slave - loopback
+ *  CS5   SPI-Flash (onboard)
+ */
+
+/*
+ * UART
+     UART0 vector 27 0xF0008000
+     UART1 vector 28 0xF0009000
+     UART2 vector 29 0xF000A000
+ */
+#define UART_NS16550_PORT_0_BASE_ADDR			0xF0008000
+#define UART_NS16550_PORT_0_IRQ				27
+#define UART_NS16550_PORT_0_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
+
+#define UART_NS16550_PORT_1_BASE_ADDR			0xF0009000
+#define UART_NS16550_PORT_1_IRQ				28
+#define UART_NS16550_PORT_1_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
+
+#define UART_IRQ_FLAGS					0 /* Default */
+#endif /* !_ASMLANGUAGE */
+
+#endif /* _BOARD__H_ */

arch/arc/soc/em11d/soc_config.c

@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <device.h>
+#include <init.h>
+#include "soc.h"
+
+
+#ifdef CONFIG_UART_NS16550
+
+static int uart_ns16550_init(struct device *dev)
+{
+	ARG_UNUSED(dev);
+
+	/* On ARC EM Starter kit board,
+	 * send the UART the command to clear the interrupt
+	 */
+#ifdef CONFIG_UART_NS16550_PORT_0
+	sys_write32(0, UART_NS16550_PORT_0_BASE_ADDR+0x4);
+	sys_write32(0, UART_NS16550_PORT_0_BASE_ADDR+0x10);
+#endif /* CONFIG_UART_NS16550_PORT_0 */
+#ifdef CONFIG_UART_NS16550_PORT_1
+	sys_write32(0, UART_NS16550_PORT_1_BASE_ADDR+0x4);
+	sys_write32(0, UART_NS16550_PORT_1_BASE_ADDR+0x10);
+#endif /* CONFIG_UART_NS16550_PORT_1 */
+
+	return 0;
+}
+
+SYS_INIT(uart_ns16550_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
+
+#endif /* CONFIG_UART_NS16550 */

arch/arc/soc/em7d/Kbuild

@@ -0,0 +1,8 @@
+ccflags-y +=-I$(srctree)/arch/arc/soc/
+ccflags-y +=-I$(srctree)/include
+ccflags-y +=-I$(srctree)/include/drivers
+ccflags-y +=-I$(srctree)/drivers
+
+asflags-y := ${ccflags-y}
+
+obj-y = soc.o soc_config.o

arch/arc/soc/em7d/Kconfig.defconfig

@@ -0,0 +1,249 @@
+#
+# Copyright (c) 2014 Wind River Systems, Inc.
+# Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if SOC_EM7D
+
+config SOC
+	default em7d
+
+config NUM_IRQ_PRIO_LEVELS
+	# This processor supports 4 priority levels:
+	# 0 for Fast Interrupts (FIRQs) and 1-3 for Regular Interrupts (IRQs).
+	# TODO: But regular irq nesting is not implemented --
+	# so this must be 2 for now.
+	default 2
+
+config NUM_IRQS
+	# must be > the highest interrupt number used
+	default 36
+
+config RGF_NUM_BANKS
+	default 1
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default 30000000
+
+config HARVARD
+	def_bool n
+
+config FLASH_BASE_ADDRESS
+	default 0x00000000
+
+config FLASH_SIZE
+	default 0
+	# em7d has no FLASH so size is 0.
+
+config SRAM_BASE_ADDRESS
+	default 0x10000000
+
+config SRAM_SIZE
+	default 131072
+
+config ICCM_BASE_ADDRESS
+	default 0x00000000
+
+config ICCM_SIZE
+	default 256
+
+config DCCM_BASE_ADDRESS
+	default 0x80000000
+
+config DCCM_SIZE
+	default 128
+
+config CACHE_FLUSHING
+	def_bool y
+
+if GPIO
+
+config GPIO_DW
+	def_bool y
+
+if GPIO_DW
+
+config GPIO_DW_0
+	def_bool y
+
+if GPIO_DW_0
+
+config GPIO_DW_0_NAME
+	default "GPIO_PORTA"
+
+config GPIO_DW_0_IRQ_PRI
+	default 1
+
+endif # GPIO_DW_0
+
+config GPIO_DW_1
+	def_bool y
+
+if GPIO_DW_1
+
+config GPIO_DW_1_NAME
+	default "GPIO_PORTB"
+
+config GPIO_DW_1_IRQ_PRI
+	default 1
+
+endif # GPIO_DW_1
+
+config GPIO_DW_2
+	def_bool y
+
+if GPIO_DW_2
+
+config GPIO_DW_2_IRQ_PRI
+	default 1
+
+config GPIO_DW_2_NAME
+	default "GPIO_PORTC"
+
+endif # GPIO_DW_2
+
+config GPIO_DW_3
+	def_bool y
+
+if GPIO_DW_3
+
+config GPIO_DW_3_IRQ_PRI
+	default 1
+
+config GPIO_DW_3_NAME
+	default "GPIO_PORTD"
+
+endif # GPIO_DW_3
+
+endif # GPIO_DW
+
+endif # GPIO
+
+if I2C
+
+config I2C_CLOCK_SPEED
+	default 100
+
+config I2C_DW
+	def_bool y
+
+if I2C_DW
+
+config I2C_0
+	def_bool y
+
+if I2C_0
+
+config I2C_0_NAME
+	default "I2C_0"
+config I2C_0_DEFAULT_CFG
+	default 0x3
+config I2C_0_IRQ_PRI
+	default 1
+
+endif # I2C_0
+
+config I2C_1
+	def_bool y
+
+if I2C_1
+
+config I2C_1_NAME
+	default "I2C_1"
+config I2C_1_DEFAULT_CFG
+	default 0x3
+config I2C_1_IRQ_PRI
+	default 1
+
+endif # I2C_1
+
+endif # I2C_DW
+
+endif # I2C
+
+if UART_NS16550
+
+config UART_NS16550_PORT_0
+	def_bool n
+
+if UART_NS16550_PORT_0
+
+config UART_NS16550_PORT_0_NAME
+	default "UART_0"
+config UART_NS16550_PORT_0_IRQ_PRI
+	default 1
+config UART_NS16550_PORT_0_BAUD_RATE
+	default 115200
+config UART_NS16550_PORT_0_OPTIONS
+	default 0
+
+endif # UART_NS16550_PORT_0
+
+config UART_NS16550_PORT_1
+	def_bool y
+
+if UART_NS16550_PORT_1
+
+config UART_NS16550_PORT_1_NAME
+	default "UART_1"
+config UART_NS16550_PORT_1_IRQ_PRI
+	default 1
+config UART_NS16550_PORT_1_BAUD_RATE
+	default 115200
+config UART_NS16550_PORT_1_OPTIONS
+	default 0
+
+endif # UART_NS16550_PORT_1
+
+endif # UART_NS16550
+
+if UART_CONSOLE
+
+config UART_CONSOLE_ON_DEV_NAME
+	default "UART_1"
+
+endif
+
+if SPI
+
+config SPI_DW
+	def_bool y
+
+if SPI_DW
+
+config SPI_DW_CLOCK_GATE
+	def_bool n
+
+config SPI_DW_FIFO_DEPTH
+	default 32
+
+config SPI_DW_ARC_AUX_REGS
+	def_bool n
+
+config SPI_0
+	def_bool y
+
+if SPI_0
+
+config SPI_0_IRQ_PRI
+	default 0
+
+endif # SPI_0
+
+config SPI_1
+	def_bool y
+
+if SPI_1
+
+config SPI_1_IRQ_PRI
+	default 0
+
+endif # SPI_1
+
+endif # SPI_DW
+
+endif # SPI
+
+endif #SOC_EM7D

arch/arc/soc/em7d/Kconfig.soc

@@ -0,0 +1,3 @@
+
+config SOC_EM7D
+	bool "Synopsys ARC EM7D"

arch/arc/soc/em7d/Makefile

@@ -0,0 +1,2 @@
+soc-cflags = $(call cc-option,-mcpu=arcem) \
+                   $(call cc-option,-mno-sdata)

arch/arc/soc/em7d/linker.ld

@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @brief Linker script for the Synopsys EM Starterkit v2.2 EM7D platform.
+ */
+
+/*
+ * DRAM base address and size
+ *
+ * DRAM includes the exception vector table at reset, which is at
+ * the beginning of the region.
+ */
+#define SRAM_START		CONFIG_SRAM_BASE_ADDRESS
+#define SRAM_SIZE		CONFIG_SRAM_SIZE
+/* TODO: Using SRAM config for now, even though this is really DRAM. */
+
+/* Instruction Closely Coupled Memory (ICCM) base address and size */
+#define ICCM_START		CONFIG_ICCM_BASE_ADDRESS
+#define ICCM_SIZE		CONFIG_ICCM_SIZE
+
+/*
+ * DCCM base address and size. DCCM is the data memory.
+ */
+/* Data Closely Coupled Memory (DCCM) base address and size */
+#define DCCM_START		CONFIG_DCCM_BASE_ADDRESS
+#define DCCM_SIZE		CONFIG_DCCM_SIZE
+
+#include <arch/arc/v2/linker.ld>

arch/arc/soc/em7d/soc.c

@@ -0,0 +1,14 @@
+/* soc.c - system/hardware module for em_starterkit BSP */
+
+/*
+ * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * This module provides routines to initialize and support board-level hardware
+ * for the ARC EM Starter kit board.
+ *
+ * Nothing to be done for now.
+ */

arch/arc/soc/em7d/soc.h

@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @brief Board configuration macros for EM Starter kit board
+ *
+ * This header file is used to specify and describe board-level
+ * aspects for the target.
+ */
+
+#ifndef _BOARD__H_
+#define _BOARD__H_
+
+#include <misc/util.h>
+
+/* default system clock */
+
+#define SYSCLK_DEFAULT_IOSC_HZ MHZ(50)
+/* On the EM Starter Kit board, the peripheral bus clock frequency is 50Mhz */
+
+
+/* IRQs */
+
+#define IRQ_TIMER0 16
+#define IRQ_TIMER1 17
+
+#ifndef _ASMLANGUAGE
+
+#include <misc/util.h>
+#include <drivers/rand32.h>
+
+#define CONFIG_ARCV2_TIMER0_INT_LVL IRQ_TIMER0
+#define CONFIG_ARCV2_TIMER0_INT_PRI 0
+
+#define CONFIG_ARCV2_TIMER1_INT_LVL IRQ_TIMER1
+#define CONFIG_ARCV2_TIMER1_INT_PRI 1
+
+#define INT_ENABLE_ARC					~(0x00000001 << 8)
+#define INT_ENABLE_ARC_BIT_POS				(8)
+
+/* I2C */
+
+/* I2C_0 is on Pmod2 connector */
+#define I2C_DW_0_BASE_ADDR                      0xF0004000
+#define I2C_DW_0_IRQ                            23
+
+
+/* I2C_1 is on Pmod4 connector */
+#define I2C_DW_1_BASE_ADDR                      0xF0005000
+#define I2C_DW_1_IRQ                            24
+
+#define I2C_DW_IRQ_FLAGS			0
+
+/* GPIO */
+#define GPIO_DW_0_BASE_ADDR                     0xF0002000 /* GPIO 0 : PORTA */
+#define GPIO_DW_0_IRQ                           22
+#define GPIO_DW_0_BITS                          32
+#define GPIO_DW_PORT_0_INT_MASK                 0 /* n/a */
+#define GPIO_DW_0_IRQ_FLAGS			0 /* Defaults */
+
+#define GPIO_DW_1_BASE_ADDR                     0xF000200C /* GPIO 1 : PORTB */
+#define GPIO_DW_1_IRQ                           0          /* can't interrupt */
+#define GPIO_DW_1_BITS                          9          /* 9 LEDs on board */
+#define GPIO_DW_PORT_1_INT_MASK                 0 /* n/a */
+
+#define GPIO_DW_2_BASE_ADDR                     0xF0002018 /* GPIO 2 : PORTC */
+#define GPIO_DW_2_IRQ                           0          /* can't interrupt */
+#define GPIO_DW_2_BITS                          32
+#define GPIO_DW_PORT_2_INT_MASK                 0 /* n/a */
+
+#define GPIO_DW_3_BASE_ADDR                     0xF0002024 /* GPIO 3 : PORTD */
+#define GPIO_DW_3_IRQ                           0          /* can't interrupt */
+#define GPIO_DW_3_BITS                          12
+#define GPIO_DW_PORT_3_INT_MASK                 0 /* n/a */
+
+/* undef GPIO_DW_IO_ACCESS .. because memory mapped */
+/* undef CONFIG_GPIO_DW_0_IRQ_SHARED */
+/* undef CONFIG_GPIO_DW_CLOCK_GATE */
+/* undef CONFIG_SOC_QUARK_SE_C1000_SS */
+
+/* SPI */
+
+#define SPI_DW_SPI_CLOCK     SYSCLK_DEFAULT_IOSC_HZ
+
+#define SPI_DW_PORT_0_REGS   0xF0006000
+#define SPI_DW_PORT_1_REGS   0xF0007000
+
+#define SPI_DW_PORT_0_IRQ    25
+#define SPI_DW_PORT_1_IRQ    26
+
+#define SPI_DW_IRQ_FLAGS     0
+
+/*
+ * SPI Chip Select Assignments on EM Starter Kit
+ *
+ *  CS0   Pmod6 - pin 1 - J6
+ *  CS1   Pmod5 - pin 1 - J5 & Pmod 6 - pin 7 - J6
+ *  CS2   Pmod6 - pin 8 - J6
+ *  CS3   SDCard (onboard)
+ *  CS4   Internal SPI Slave - loopback
+ *  CS5   SPI-Flash (onboard)
+ */
+
+/*
+ * UART
+     UART0 vector 27 0xF0008000
+     UART1 vector 28 0xF0009000
+     UART2 vector 29 0xF000A000
+ */
+#define UART_NS16550_PORT_0_BASE_ADDR			0xF0008000
+#define UART_NS16550_PORT_0_IRQ				27
+#define UART_NS16550_PORT_0_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
+
+#define UART_NS16550_PORT_1_BASE_ADDR			0xF0009000
+#define UART_NS16550_PORT_1_IRQ				28
+#define UART_NS16550_PORT_1_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
+
+#define UART_IRQ_FLAGS					0 /* Default */
+#endif /* !_ASMLANGUAGE */
+
+#endif /* _BOARD__H_ */

arch/arc/soc/em7d/soc_config.c

@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <device.h>
+#include <init.h>
+#include "soc.h"
+
+
+#ifdef CONFIG_UART_NS16550
+
+static int uart_ns16550_init(struct device *dev)
+{
+	ARG_UNUSED(dev);
+
+	/* On ARC EM Starter kit board,
+	 * send the UART the command to clear the interrupt
+	 */
+#ifdef CONFIG_UART_NS16550_PORT_0
+	sys_write32(0, UART_NS16550_PORT_0_BASE_ADDR+0x4);
+	sys_write32(0, UART_NS16550_PORT_0_BASE_ADDR+0x10);
+#endif /* CONFIG_UART_NS16550_PORT_0 */
+#ifdef CONFIG_UART_NS16550_PORT_1
+	sys_write32(0, UART_NS16550_PORT_1_BASE_ADDR+0x4);
+	sys_write32(0, UART_NS16550_PORT_1_BASE_ADDR+0x10);
+#endif /* CONFIG_UART_NS16550_PORT_1 */
+
+	return 0;
+}
+
+SYS_INIT(uart_ns16550_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
+
+#endif /* CONFIG_UART_NS16550 */

arch/arc/soc/em9d/Kbuild

@@ -0,0 +1,8 @@
+ccflags-y +=-I$(srctree)/arch/arc/soc/
+ccflags-y +=-I$(srctree)/include
+ccflags-y +=-I$(srctree)/include/drivers
+ccflags-y +=-I$(srctree)/drivers
+
+asflags-y := ${ccflags-y}
+
+obj-y = soc.o soc_config.o

arch/arc/soc/em9d/Kconfig.defconfig

@@ -0,0 +1,247 @@
+#
+# Copyright (c) 2014 Wind River Systems, Inc.
+# Copyright (c) 2016 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if SOC_EM9D
+
+config SOC
+	default em9d
+
+config NUM_IRQ_PRIO_LEVELS
+	# This processor supports 4 priority levels:
+	# 0 for Fast Interrupts (FIRQs) and 1-3 for Regular Interrupts (IRQs).
+	# TODO: But regular irq nesting is not implemented --
+	# so this must be 2 for now.
+	default 2
+
+config NUM_IRQS
+	# must be > the highest interrupt number used
+	default 36
+
+config RGF_NUM_BANKS
+	default 2
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default 20000000
+
+config HARVARD
+	def_bool y
+
+config FLASH_BASE_ADDRESS
+	default 0x00000000
+
+config FLASH_SIZE
+	default 0
+	# em9d has no FLASH so size is 0.
+
+config SRAM_BASE_ADDRESS
+	default 0x00000000
+
+config SRAM_SIZE
+	default 0
+	# em9d has no SRAM so size is 0.
+
+config ICCM_BASE_ADDRESS
+	default 0x00000000
+
+config ICCM_SIZE
+	default 256
+
+config DCCM_BASE_ADDRESS
+	default 0x80000000
+
+config DCCM_SIZE
+	default 128
+
+if GPIO
+
+config GPIO_DW
+	def_bool y
+
+if GPIO_DW
+
+config GPIO_DW_0
+	def_bool y
+
+if GPIO_DW_0
+
+config GPIO_DW_0_NAME
+	default "GPIO_PORTA"
+
+config GPIO_DW_0_IRQ_PRI
+	default 1
+
+endif # GPIO_DW_0
+
+config GPIO_DW_1
+	def_bool y
+
+if GPIO_DW_1
+
+config GPIO_DW_1_NAME
+	default "GPIO_PORTB"
+
+config GPIO_DW_1_IRQ_PRI
+	default 1
+
+endif # GPIO_DW_1
+
+config GPIO_DW_2
+	def_bool y
+
+if GPIO_DW_2
+
+config GPIO_DW_2_IRQ_PRI
+	default 1
+
+config GPIO_DW_2_NAME
+	default "GPIO_PORTC"
+
+endif # GPIO_DW_2
+
+config GPIO_DW_3
+	def_bool y
+
+if GPIO_DW_3
+
+config GPIO_DW_3_IRQ_PRI
+	default 1
+
+config GPIO_DW_3_NAME
+	default "GPIO_PORTD"
+
+endif # GPIO_DW_3
+
+endif # GPIO_DW
+
+endif # GPIO
+
+if I2C
+
+config I2C_CLOCK_SPEED
+	default 100
+
+config I2C_DW
+	def_bool y
+
+if I2C_DW
+
+config I2C_0
+	def_bool y
+
+if I2C_0
+
+config I2C_0_NAME
+	default "I2C_0"
+config I2C_0_DEFAULT_CFG
+	default 0x3
+config I2C_0_IRQ_PRI
+	default 1
+
+endif # I2C_0
+
+config I2C_1
+	def_bool y
+
+if I2C_1
+
+config I2C_1_NAME
+	default "I2C_1"
+config I2C_1_DEFAULT_CFG
+	default 0x3
+config I2C_1_IRQ_PRI
+	default 1
+
+endif # I2C_1
+
+endif # I2C_DW
+
+endif # I2C
+
+if UART_NS16550
+
+config UART_NS16550_PORT_0
+	def_bool n
+
+if UART_NS16550_PORT_0
+
+config UART_NS16550_PORT_0_NAME
+	default "UART_0"
+config UART_NS16550_PORT_0_IRQ_PRI
+	default 1
+config UART_NS16550_PORT_0_BAUD_RATE
+	default 115200
+config UART_NS16550_PORT_0_OPTIONS
+	default 0
+
+endif # UART_NS16550_PORT_0
+
+config UART_NS16550_PORT_1
+	def_bool y
+
+if UART_NS16550_PORT_1
+
+config UART_NS16550_PORT_1_NAME
+	default "UART_1"
+config UART_NS16550_PORT_1_IRQ_PRI
+	default 1
+config UART_NS16550_PORT_1_BAUD_RATE
+	default 115200
+config UART_NS16550_PORT_1_OPTIONS
+	default 0
+
+endif # UART_NS16550_PORT_1
+
+endif # UART_NS16550
+
+if UART_CONSOLE
+
+config UART_CONSOLE_ON_DEV_NAME
+	default "UART_1"
+
+endif
+
+if SPI
+
+config SPI_DW
+	def_bool y
+
+if SPI_DW
+
+config SPI_DW_CLOCK_GATE
+	def_bool n
+
+config SPI_DW_FIFO_DEPTH
+	default 32
+
+config SPI_DW_ARC_AUX_REGS
+	def_bool n
+
+config SPI_0
+	def_bool y
+
+if SPI_0
+
+config SPI_0_IRQ_PRI
+	default 0
+
+endif # SPI_0
+
+config SPI_1
+	def_bool y
+
+if SPI_1
+
+config SPI_1_IRQ_PRI
+	default 0
+
+endif # SPI_1
+
+endif # SPI_DW
+
+endif # SPI
+
+endif #SOC_EM9D