coding guidelines: comply with MISRA C:2012 Rule 12.2

- explicit with a cast the destination bitwidth of left shift
  ensuring to not break DTS

Signed-off-by: Abramo Bagnara <abramo.bagnara@bugseng.com>

.buildkite/daily.yml

@@ -1,35 +0,0 @@
-steps:
-  - command:
-    - .buildkite/run.sh
-    env:
-      ZEPHYR_TOOLCHAIN_VARIANT: "zephyr"
-      ZEPHYR_SDK_INSTALL_DIR: "/opt/toolchains/zephyr-sdk-0.13.1"
-    parallelism: 475
-    timeout_in_minutes: 210
-    retry:
-      manual: true
-    plugins:
-      - docker#v3.5.0:
-          image: "zephyrprojectrtos/ci:v0.18.4"
-          propagate-environment: true
-          volumes:
-            - "/var/lib/buildkite-agent/git-mirrors:/var/lib/buildkite-agent/git-mirrors"
-            - "/var/lib/buildkite-agent/zephyr-module-cache:/var/lib/buildkite-agent/zephyr-module-cache"
-            - "/var/lib/buildkite-agent/zephyr-ccache:/root/.ccache"
-          workdir: "/workdir/zephyr"
-    agents:
-    - "queue=default"
-
-  - wait: ~
-    continue_on_failure: true
-
-  - plugins:
-      - junit-annotate#v1.7.0:
-          artifacts: twister-*.xml
-
-  - command:
-    - .buildkite/mergejunit.sh
-
-notify:
-  - email: "builds+int+399+7809482394022958124@lists.zephyrproject.org"
-    if: build.state != "passed"

.buildkite/hooks/post-command

@@ -1,8 +0,0 @@
-#!/bin/bash
-# Copyright (c) 2020 Linaro Limited
-#
-# SPDX-License-Identifier: Apache-2.0
-
-# report disk usage:
-echo "--- $0 disk usage"
-df -h

.buildkite/hooks/pre-command

@@ -1,44 +0,0 @@
-#!/bin/bash
-# Copyright (c) 2020 Linaro Limited
-#
-# SPDX-License-Identifier: Apache-2.0
-
-# Save off where we started so we can go back there
-WORKDIR=${PWD}
-
-echo "--- $0 disk usage"
-df -h
-du -hs /var/lib/buildkite-agent/*
-docker images -a
-docker system df -v
-
-if [ -n "${BUILDKITE_PULL_REQUEST_BASE_BRANCH}" ]; then
-   git fetch -v origin ${BUILDKITE_PULL_REQUEST_BASE_BRANCH}
-   git checkout FETCH_HEAD
-   git config --local user.email "builds@zephyrproject.org"
-   git config --local user.name "Zephyr CI"
-   git merge --no-edit "${BUILDKITE_COMMIT}" || {
-       local merge_result=$?
-       echo "Merge failed: ${merge_result}"
-       git merge --abort
-       exit $merge_result
-   }
-fi
-
-mkdir -p /var/lib/buildkite-agent/zephyr-ccache/
-
-# create cache dirs, no-op if they already exist
-mkdir -p /var/lib/buildkite-agent/zephyr-module-cache/modules
-mkdir -p /var/lib/buildkite-agent/zephyr-module-cache/tools
-mkdir -p /var/lib/buildkite-agent/zephyr-module-cache/bootloader
-
-# Clean cache - if it already exists
-cd /var/lib/buildkite-agent/zephyr-module-cache
-find -type f -not -path "*/.git/*" -not -name ".git" -delete
-
-# Remove any stale locks
-find -name index.lock -delete
-
-# return from where we started so we can find pipeline files from
-# git repo
-cd ${WORKDIR}

.buildkite/mergejunit.sh

@@ -1,19 +0,0 @@
-#!/bin/bash
-# Copyright (c) 2021 Linaro Limited
-#
-# SPDX-License-Identifier: Apache-2.0
-set -eE
-
-buildkite-agent artifact download twister-*.xml .
-
-xmls=""
-
-for f in twister-*xml; do [ -s ${f} ] && xmls+="${f} "; done
-
-if [ "${xmls}" ]; then
-   junitparser merge ${xmls} junit.xml
-   buildkite-agent artifact upload junit.xml
-   junit2html junit.xml
-   buildkite-agent artifact upload junit.xml.html
-   buildkite-agent annotate --style "info" "Read the <a href=\"artifact://junit.xml.html\">JUnit test report</a>"
-fi

.buildkite/pipeline.yml

@@ -1,31 +0,0 @@
-steps:
-  - command:
-    - .buildkite/run.sh
-    env:
-      ZEPHYR_TOOLCHAIN_VARIANT: "zephyr"
-      ZEPHYR_SDK_INSTALL_DIR: "/opt/toolchains/zephyr-sdk-0.13.1"
-    parallelism: 20
-    timeout_in_minutes: 180
-    retry:
-      manual: true
-    plugins:
-      - docker#v3.5.0:
-          image: "zephyrprojectrtos/ci:v0.18.4"
-          propagate-environment: true
-          volumes:
-            - "/var/lib/buildkite-agent/git-mirrors:/var/lib/buildkite-agent/git-mirrors"
-            - "/var/lib/buildkite-agent/zephyr-module-cache:/var/lib/buildkite-agent/zephyr-module-cache"
-            - "/var/lib/buildkite-agent/zephyr-ccache:/root/.ccache"
-          workdir: "/workdir/zephyr"
-    agents:
-    - "queue=default"
-
-  - wait: ~
-    continue_on_failure: true
-
-  - plugins:
-      - junit-annotate#v1.7.0:
-          artifacts: twister-*.xml
-
-  - command:
-    - .buildkite/mergejunit.sh

.buildkite/run.sh

@@ -1,78 +0,0 @@
-#!/bin/bash
-# Copyright (c) 2020 Linaro Limited
-#
-# SPDX-License-Identifier: Apache-2.0
-set -eE
-
-function cleanup()
-{
-	# Rename twister junit xml for use with junit-annotate-buildkite-plugin
-	# create dummy file if twister did nothing
-	if [ ! -f twister-out/twister.xml ]; then
-	   touch twister-out/twister.xml
-	fi
-	mv twister-out/twister.xml twister-${BUILDKITE_JOB_ID}.xml
-	buildkite-agent artifact upload twister-${BUILDKITE_JOB_ID}.xml
-
-
-	# Upload test_file to get list of tests that are build/run
-	if [ -f test_file.txt ]; then
-		buildkite-agent artifact upload test_file.txt
-	fi
-
-	# ccache stats
-	echo "--- ccache stats at finish"
-	ccache -s
-
-	# Cleanup on exit
-	rm -fr *
-
-	# disk usage
-	echo "--- disk usage at finish"
-	df -h
-}
-
-trap cleanup ERR
-
-echo "--- run $0"
-
-git log -n 5 --oneline --decorate --abbrev=12
-
-# Setup module cache
-cd /workdir
-ln -s /var/lib/buildkite-agent/zephyr-module-cache/modules
-ln -s /var/lib/buildkite-agent/zephyr-module-cache/tools
-ln -s /var/lib/buildkite-agent/zephyr-module-cache/bootloader
-cd /workdir/zephyr
-
-export JOB_NUM=$((${BUILDKITE_PARALLEL_JOB}+1))
-
-# ccache stats
-echo ""
-echo "--- ccache stats at start"
-ccache -s
-
-
-if [ -n "${DAILY_BUILD}" ]; then
-   TWISTER_OPTIONS=" --inline-logs -M -N --build-only --all --retry-failed 3 -v "
-   echo "--- DAILY BUILD"
-   west init -l .
-   west update 1> west.update.log || west update 1> west.update-2.log
-   west forall -c 'git reset --hard HEAD'
-   source zephyr-env.sh
-   ./scripts/twister --subset ${JOB_NUM}/${BUILDKITE_PARALLEL_JOB_COUNT} ${TWISTER_OPTIONS}
-else
-   if [ -n "${BUILDKITE_PULL_REQUEST_BASE_BRANCH}" ]; then
-      ./scripts/ci/run_ci.sh  -c -b ${BUILDKITE_PULL_REQUEST_BASE_BRANCH} -r origin \
-	   -m ${JOB_NUM} -M ${BUILDKITE_PARALLEL_JOB_COUNT} -p ${BUILDKITE_PULL_REQUEST}
-   else
-       ./scripts/ci/run_ci.sh -c -b ${BUILDKITE_BRANCH} -r origin \
-	   -m ${JOB_NUM} -M ${BUILDKITE_PARALLEL_JOB_COUNT};
-   fi
-fi
-
-TWISTER_EXIT_STATUS=$?
-
-cleanup
-
-exit ${TWISTER_EXIT_STATUS}

.github/workflows/bluetooth-tests-publish.yaml

@@ -0,0 +1,29 @@
+name: Publish Bluetooth Tests Results
+
+on:
+  workflow_run:
+    workflows: ["Bluetooth Tests"]
+    types:
+      - completed
+jobs:
+  bluetooth-test-results:
+    name: "Publish Bluetooth Test Results"
+    runs-on: ubuntu-latest
+    if: github.event.workflow_run.conclusion != 'skipped'
+
+    steps:
+      - name: Download artifacts
+        uses: dawidd6/action-download-artifact@v2
+        with:
+          workflow: bluetooth-tests.yaml
+          run_id: ${{ github.event.workflow_run.id }}
+
+      - name: Publish Bluetooth Test Results
+        uses: EnricoMi/publish-unit-test-result-action@v1
+        with:
+          check_name: Bluetooth Test Results
+          comment_mode: off
+          commit: ${{ github.event.workflow_run.head_sha }}
+          event_file: event/event.json
+          event_name: ${{ github.event.workflow_run.event }}
+          files: "bluetooth-test-results/**/bsim_results.xml"

.github/workflows/bluetooth-tests.yaml

@@ -1,7 +1,7 @@
 name: Bluetooth Tests
 
 on:
-  pull_request_target:
+  pull_request:
     paths:
       - "west.yml"
       - "subsys/bluetooth/**"
@@ -11,16 +11,16 @@ on:
       - "arch/posix/**"
 
 jobs:
-  bsim-build-cancel:
+  bluetooth-test-prep:
     runs-on: ubuntu-latest
     steps:
       - name: Cancel Previous Runs
         uses: styfle/cancel-workflow-action@0.6.0
         with:
           access_token: ${{ github.token }}
-  bsim-build:
+  bluetooth-test-build:
     runs-on: ubuntu-latest
-    needs: bsim-build-cancel
+    needs: bluetooth-test-prep
     container:
       image: zephyrprojectrtos/ci:v0.18.4
       options: '--entrypoint /bin/bash'
@@ -39,18 +39,15 @@ jobs:
 
       - name: checkout
         uses: actions/checkout@v2
-        with:
-          ref: ${{ github.event.pull_request.head.sha }}
-          fetch-depth: 0
 
       - name: west setup
         run: |
           west init -l . || true
-          west update
+          west config --global update.narrow true
+          west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
 
       - name: Run Bluetooth Tests with BSIM
         run: |
-          #source zephyr-env.sh
           export ZEPHYR_BASE=${PWD}
           WORK_DIR=${ZEPHYR_BASE}/bsim_bt_out tests/bluetooth/bsim_bt/compile.sh
           RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bt_test_results_file} \
@@ -60,26 +57,15 @@ jobs:
         if: always()
         uses: actions/upload-artifact@v2
         with:
-          name: Bluetooth Test Results
-          path: ./bsim_bt_out/bsim_results.xml
+          name: bluetooth-test-results
+          path: |
+            ./bsim_bt_out/bsim_results.xml
+            ${{ github.event_path }}
 
-  publish-test-results:
-    name: "Publish Unit Tests Results"
-    needs: bsim-build
-    runs-on: ubuntu-20.04
-      # the build-and-test job might be skipped, we don't need to run this job then
-    if: success() || failure()
-
-    steps:
-      - name: Download Artifacts
-        uses: actions/download-artifact@v2
+      - name: Upload Event Details
+        if: always()
+        uses: actions/upload-artifact@v2
         with:
-          path: artifacts
-
-      - name: Publish Unit Test Results
-        uses: EnricoMi/publish-unit-test-result-action@v1.12
-        with:
-          check_name: Bluetooth Test Results
-          github_token: ${{ secrets.GITHUB_TOKEN }}
-          files: "**/bsim_results.xml"
-          comment_on_pr: false
+          name: event
+          path: |
+            ${{ github.event_path }}

.github/workflows/clang.yaml

@@ -3,7 +3,7 @@ name: Build with Clang/LLVM
 on: pull_request_target
 
 jobs:
-  clang-build-cancel:
+  clang-build-prep:
     runs-on: ubuntu-latest
     steps:
       - name: Cancel Previous Runs
@@ -11,19 +11,21 @@ jobs:
         with:
           access_token: ${{ github.token }}
   clang-build:
-    runs-on: ubuntu-latest
-    needs: clang-build-cancel
+    runs-on: zephyr_runner
+    needs: clang-build-prep
     container:
       image: zephyrprojectrtos/ci:v0.18.4
       options: '--entrypoint /bin/bash'
     strategy:
       fail-fast: false
       matrix:
-        subset: [1, 2, 3, 4, 5]
+        platform: ["native_posix"]
     env:
       ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.1
       CLANG_ROOT_DIR: /usr/lib/llvm-12
-      MATRIX_SIZE: 5
+      COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
+    outputs:
+      report_needed: ${{ steps.twister.outputs.report_needed }}
     steps:
       - name: Cancel Previous Runs
         uses: styfle/cancel-workflow-action@0.6.0
@@ -38,11 +40,17 @@ jobs:
         with:
           ref: ${{ github.event.pull_request.head.sha }}
           fetch-depth: 0
+          persist-credentials: false
 
       - name: west setup
         run: |
           west init -l . || true
-          west update
+          # In some cases modules are left in a state where they can't be
+          # updated (i.e. when we cancel a job and the builder is killed),
+          # So first retry to update, if that does not work, remove all modules
+          # and start over. (Workaround until we implement more robust module
+          # west caching).
+          west update 2>&1 1> west.log || west update 2>&1 1> west2.log || ( rm -rf ../modules && west update)
 
       - name: Check Environment
         run: |
@@ -50,41 +58,86 @@ jobs:
           ${CLANG_ROOT_DIR}/bin/clang --version
           gcc --version
           ls -la
+      - name: Prepare ccache timestamp/data
+        id: ccache_cache_timestamp
+        shell: cmake -P {0}
+        run: |
+          string(TIMESTAMP current_date "%Y-%m-%d-%H;%M;%S" UTC)
+          string(REPLACE "/" "_" repo ${{github.repository}})
+          string(REPLACE "-" "_" repo2 ${repo})
+          message("::set-output name=repo::${repo2}")
+      - name: use cache
+        id: cache-ccache
+        uses: nashif/action-s3-cache@master
+        with:
+          key: ${{ steps.ccache_cache_timestamp.outputs.repo }}-${{ github.ref_name }}-clang-${{ matrix.platform }}-ccache
+          path: /github/home/.ccache
+          aws-s3-bucket: ccache.zephyrproject.org
+          aws-access-key-id: ${{ secrets.CCACHE_S3_ACCESS_KEY_ID }}
+          aws-secret-access-key: ${{ secrets.CCACHE_S3_SECRET_ACCESS_KEY }}
+          aws-region: us-east-2
+
+      - name: ccache stats initial
+        run: |
+          test -d github/home/.ccache && mv github/home/.ccache /github/home/.ccache
+          ccache -M 10G -s
 
       - name: Run Tests with Twister
+        id: twister
         run: |
-          #source zephyr-env.sh
+          git config --global user.email "bot@zephyrproject.org"
+          git config --global user.name "Zephyr Builder"
           export ZEPHYR_BASE=${PWD}
           export ZEPHYR_TOOLCHAIN_VARIANT=llvm
-          ./scripts/twister --inline-logs -M -N -v -p native_posix --subset ${{matrix.subset}}/${MATRIX_SIZE} --retry-failed 3
+          # check if we need to run a full twister or not based on files changed
+          SC=$(./scripts/ci/what_changed.py --commits ${COMMIT_RANGE})
+          # Get twister arguments based on the files changed
+          ./scripts/ci/get_twister_opt.py --commits ${COMMIT_RANGE}
+          if [ "$SC" = "full" ]; then
+            # Full twister
+            echo "::set-output name=report_needed::1";
+            ./scripts/twister --inline-logs -M -N -v -p ${{ matrix.platform }} --retry-failed 2
+          else
+            # We can limit scope to just what has changed
+            if [ -s modified_tests.args ]; then
+              # we are working with one platform at a time
+              sed -i '/--all/d' modified_tests.args
+              echo "::set-output name=report_needed::1";
+              # Full twister but with options based on changes
+              ./scripts/twister --inline-logs -M -N -v -p ${{ matrix.platform }} +modified_tests.args --retry-failed 2
+            else
+              # if nothing is run, skip reporting step
+              echo "::set-output name=report_needed::0";
+            fi
+          fi
+
+      - name: ccache stats post
+        run: |
+          ccache -s
 
       - name: Upload Unit Test Results
-        if: always()
+        if: always() && steps.twister.outputs.report_needed != 0
         uses: actions/upload-artifact@v2
         with:
-          name: Unit Test Results (Subset ${{ matrix.subset }})
+          name: Unit Test Results (Subset ${{ matrix.platform }})
           path: twister-out/twister.xml
 
-  publish-test-results:
+  clang-build-results:
     name: "Publish Unit Tests Results"
     needs: clang-build
     runs-on: ubuntu-20.04
-      # the build-and-test job might be skipped, we don't need to run this job then
-    if: success() || failure()
-
+    if: (success() || failure() ) && needs.clang-build.outputs.report_needed != 0
     steps:
       - name: Download Artifacts
         uses: actions/download-artifact@v2
         with:
           path: artifacts
 
-      - name: Display structure of downloaded files
-        run: ls -R
-
       - name: Publish Unit Test Results
-        uses: EnricoMi/publish-unit-test-result-action@v1.12
+        uses: EnricoMi/publish-unit-test-result-action@v1
+        if: always()
         with:
           check_name: Unit Test Results
           github_token: ${{ secrets.GITHUB_TOKEN }}
           files: "**/twister.xml"
-          comment_on_pr: false
+          comment_mode: off

.github/workflows/codecov.yaml

@@ -0,0 +1,164 @@
+name: Code Coverage with codecov
+
+on:
+  schedule:
+    - cron: '25 */3 * * 1-5'
+
+jobs:
+  codecov-prep:
+    runs-on: ubuntu-latest
+    if: github.repository == 'zephyrproject-rtos/zephyr'
+    steps:
+      - name: Cancel Previous Runs
+        uses: styfle/cancel-workflow-action@0.6.0
+        with:
+          access_token: ${{ github.token }}
+
+  codecov:
+    runs-on: zephyr_runner
+    needs: codecov-prep
+    container:
+      image: zephyrprojectrtos/ci:v0.18.4
+      options: '--entrypoint /bin/bash'
+    strategy:
+      fail-fast: false
+      matrix:
+        platform: ["native_posix", "qemu_x86", "unit_testing"]
+    env:
+      ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.1
+      CLANG_ROOT_DIR: /usr/lib/llvm-12
+    steps:
+      - name: Update PATH for west
+        run: |
+          echo "$HOME/.local/bin" >> $GITHUB_PATH
+
+      - name: checkout
+        uses: actions/checkout@v2
+        with:
+          fetch-depth: 0
+
+      - name: west setup
+        run: |
+          west init -l . || true
+          west update 1> west.update.log || west update 1> west.update-2.log
+
+      - name: Check Environment
+        run: |
+          cmake --version
+          ${CLANG_ROOT_DIR}/bin/clang --version
+          gcc --version
+          ls -la
+      - name: Prepare ccache keys
+        id: ccache_cache_prop
+        shell: cmake -P {0}
+        run: |
+          string(REPLACE "/" "_" repo ${{github.repository}})
+          string(REPLACE "-" "_" repo2 ${repo})
+          message("::set-output name=repo::${repo2}")
+
+      - name: use cache
+        id: cache-ccache
+        uses: nashif/action-s3-cache@master
+        with:
+          key: ${{ steps.ccache_cache_prop.outputs.repo }}-${{github.event_name}}-${{matrix.platform}}-codecov-ccache
+          path: /github/home/.ccache
+          aws-s3-bucket: ccache.zephyrproject.org
+          aws-access-key-id: ${{ secrets.CCACHE_S3_ACCESS_KEY_ID }}
+          aws-secret-access-key: ${{ secrets.CCACHE_S3_SECRET_ACCESS_KEY }}
+          aws-region: us-east-2
+
+      - name: ccache stats initial
+        run: |
+          test -d github/home/.ccache && mv github/home/.ccache /github/home/.ccache
+          ccache -M 10G -s
+
+      - name: Run Tests with Twister (Push)
+        continue-on-error: true
+        run: |
+          export ZEPHYR_BASE=${PWD}
+          export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
+          mkdir -p coverage/reports
+          ./scripts/twister -N -v --filter runnable -p ${{ matrix.platform }} --coverage -T tests
+
+      - name: Generate Coverage Report
+        run: |
+          mv twister-out/coverage.info lcov.pre.info
+          lcov -q --remove lcov.pre.info mylib.c --remove lcov.pre.info tests/\* \
+            --remove lcov.pre.info samples/\* --remove lcov.pre.info ext/\* \
+            --remove lcov.pre.info *generated*  \
+            -o coverage/reports/${{ matrix.platform }}.info --rc lcov_branch_coverage=1
+
+      - name: ccache stats post
+        run: |
+          ccache -s
+
+      - name: Upload Coverage Results
+        if: always()
+        uses: actions/upload-artifact@v2
+        with:
+          name: Coverage Data (Subset ${{ matrix.platform }})
+          path: coverage/reports/${{ matrix.platform }}.info
+
+  codecov-results:
+    name: "Publish Coverage Results"
+    needs: codecov
+    runs-on: ubuntu-latest
+      # the codecov job might be skipped, we don't need to run this job then
+    if: success() || failure()
+
+    steps:
+      - name: checkout
+        uses: actions/checkout@v2
+        with:
+          fetch-depth: 0
+      - name: Download Artifacts
+        uses: actions/download-artifact@v2
+        with:
+          path: coverage/reports
+
+      - name: Move coverage files
+        run: |
+          mv ./coverage/reports/*/*.info ./coverage/reports
+          ls -la ./coverage/reports
+
+      - name: Generate list of coverage files
+        id: get-coverage-files
+        shell: cmake -P {0}
+        run: |
+          file(GLOB INPUT_FILES_LIST  "coverage/reports/*.info")
+          set(MERGELIST "")
+          set(FILELIST "")
+          foreach(ITEM ${INPUT_FILES_LIST})
+            get_filename_component(f ${ITEM} NAME)
+            if(FILELIST STREQUAL "")
+              set(FILELIST "${f}")
+            else()
+              set(FILELIST "${FILELIST},${f}")
+            endif()
+          endforeach()
+          foreach(ITEM ${INPUT_FILES_LIST})
+            get_filename_component(f ${ITEM} NAME)
+            if(MERGELIST STREQUAL "")
+              set(MERGELIST "-a ${f}")
+            else()
+              set(MERGELIST "${MERGELIST} -a ${f}")
+            endif()
+          endforeach()
+          message("::set-output name=mergefiles::${MERGELIST}")
+          message("::set-output name=covfiles::${FILELIST}")
+
+      - name: Merge coverage files
+        run: |
+          sudo apt-get install -y lcov
+          cd ./coverage/reports
+          lcov ${{ steps.get-coverage-files.outputs.mergefiles }} -o merged.info --rc lcov_branch_coverage=1
+
+      - name: Upload coverage to Codecov
+        if: always()
+        uses: codecov/codecov-action@v2
+        with:
+          directory: ./coverage/reports
+          env_vars: OS,PYTHON
+          fail_ci_if_error: false
+          verbose: true
+          files: merged.info

.github/workflows/compliance.yml

@@ -1,4 +1,4 @@
-name: Compliance
+name: Compliance Checks
 
 on: pull_request
 
@@ -19,7 +19,7 @@ jobs:
       run: |
         python3 ./scripts/get_maintainer.py path CMakeLists.txt
 
-  compliance_job:
+  check_compliance:
     runs-on: ubuntu-latest
     name: Run compliance checks on patch series (PR)
     steps:
@@ -57,7 +57,7 @@ jobs:
         # debug
         git log  --pretty=oneline | head -n 10
         west init -l . || true
-        west update
+        west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
 
     - name: Run Compliance Tests
       continue-on-error: true

.github/workflows/conflict.yml

@@ -1,14 +0,0 @@
-name: Conflict Finder
-
-on:
-  push:
-    branches-ignore:
-      - '**'
-jobs:
-  conflict:
-    runs-on: ubuntu-latest
-    steps:
-      - uses: mschilde/auto-label-merge-conflicts@master
-        with:
-          CONFLICT_LABEL_NAME: "has conflicts"
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

.github/workflows/daily_test_version.yml

@@ -1,38 +0,0 @@
-# Copyright (c) 2020 Intel Corp.
-# SPDX-License-Identifier: Apache-2.0
-
-name: Publish commit for daily testing
-
-on:
-  schedule:
-    - cron:  '50 22 * * *'
-  push:
-    branches:
-      - refs/tags/*
-
-jobs:
-  get_version:
-    runs-on: ubuntu-latest
-    if: github.repository == 'zephyrproject-rtos/zephyr'
-
-    steps:
-    - name: Configure AWS Credentials
-      uses: aws-actions/configure-aws-credentials@v1
-      with:
-        aws-access-key-id: ${{ secrets.AWS_ACCESS_KEY_ID_TESTING }}
-        aws-secret-access-key: ${{ secrets.AWS_SECRET_ACCESS_KEY_TESTING }}
-        aws-region: us-east-1
-
-    - name: install-pip
-      run: |
-        pip3 install gitpython
-
-    - name: checkout
-      uses: actions/checkout@v2
-      with:
-        fetch-depth: 0
-
-    - name: Upload to AWS S3
-      run: |
-        python3 scripts/ci/version_mgr.py --update .
-        aws s3 cp versions.json s3://testing.zephyrproject.org/daily_tests/versions.json

.github/workflows/footprint-tracking.yml

@@ -52,7 +52,8 @@ jobs:
       - name: west setup
         run: |
           west init -l . || true
-          west update
+          west config --global update.narrow true
+          west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
 
       - name: Configure AWS Credentials
         uses: aws-actions/configure-aws-credentials@v1

.github/workflows/footprint.yml

@@ -42,7 +42,8 @@ jobs:
       - name: west setup
         run: |
           west init -l . || true
-          west update
+          west config --global update.narrow true
+          west update 2>&1 1> west.update.log || west update 2>&1 1> west.update.log
 
       - name: Detect Changes in Footprint
         env:

.github/workflows/issue_count.yml

@@ -1,53 +0,0 @@
-name: Issue Tracker
-
-on:
-  schedule:
-    - cron:  '*/10 * * * *'
-
-env:
-  OUTPUT_FILE_NAME: IssuesReport.md
-  COMMITTER_EMAIL: actions@github.com
-  COMMITTER_NAME: github-actions
-  COMMITTER_USERNAME: github-actions
-
-
-jobs:
-  track-issues:
-    name: "Collect Issue Stats"
-    runs-on: ubuntu-latest
-    if: github.repository == 'zephyrproject-rtos/zephyr'
-
-    steps:
-    - name: Download configuration file
-      run: |
-        wget -q https://raw.githubusercontent.com/$GITHUB_REPOSITORY/master/.github/workflows/issues-report-config.json
-
-    - name: install-packages
-      run: |
-        sudo apt-get install discount
-
-    - uses: brcrista/summarize-issues@v3
-      with:
-        title: 'Issues Report for ${{ github.repository }}'
-        configPath: 'issues-report-config.json'
-        outputPath: ${{ env.OUTPUT_FILE_NAME }}
-        token: ${{ secrets.GITHUB_TOKEN }}
-
-    - name: upload-stats
-      uses: actions/upload-artifact@master
-      continue-on-error: True
-      with:
-        name: ${{ env.OUTPUT_FILE_NAME }}
-        path: ${{ env.OUTPUT_FILE_NAME }}
-
-    - name: Configure AWS Credentials
-      uses: aws-actions/configure-aws-credentials@v1
-      with:
-        aws-access-key-id: ${{ secrets.AWS_ACCESS_KEY_ID_TESTING }}
-        aws-secret-access-key: ${{ secrets.AWS_SECRET_ACCESS_KEY_TESTING }}
-        aws-region: us-east-1
-
-    - name: Post Results
-      run: |
-        mkd2html IssuesReport.md IssuesReport.html
-        aws s3 cp --quiet IssuesReport.html s3://testing.zephyrproject.org/issues/$GITHUB_REPOSITORY/index.html

.github/workflows/issues-report-config.json

@@ -1,37 +0,0 @@
-[
-  {
-    "section": "High Priority Bugs",
-    "labels": ["bug", "priority: high"],
-    "threshold": 0
-  },
-  {
-    "section": "Medium Priority Bugs",
-    "labels": ["bug", "priority: medium"],
-    "threshold": 20
-  },
-  {
-    "section": "Low Priority Bugs",
-    "labels": ["bug", "priority: low"],
-    "threshold": 100
-  },
-  {
-    "section": "Enhancements",
-    "labels": ["Enhancement"],
-    "threshold": 500
-  },
-  {
-    "section": "Features",
-    "labels": ["Feature"],
-    "threshold": 100
-  },
-  {
-    "section": "Questions",
-    "labels": ["question"],
-    "threshold": 100
-  },
-  {
-    "section": "Static Analysis",
-    "labels": ["Coverity"],
-    "threshold": 100
-  }
-]

.github/workflows/manifest.yml

@@ -15,6 +15,7 @@ jobs:
           path: zephyrproject/zephyr
           ref: ${{ github.event.pull_request.head.sha }}
           fetch-depth: 0
+          persist-credentials: false
 
       - name: Manifest
         uses: zephyrproject-rtos/action-manifest@2f1ad2908599d4fe747f886f9d733dd7eebae4ef

.github/workflows/stale_issue.yml

@@ -1,23 +0,0 @@
-name: "Close stale pull requests/issues"
-on:
-  schedule:
-  - cron: "16 00 * * *"
-
-jobs:
-  stale:
-    name: Find Stale issues and PRs
-    runs-on: ubuntu-latest
-    if: github.repository == 'zephyrproject-rtos/zephyr'
-    steps:
-    - uses: actions/stale@v3
-      with:
-        repo-token: ${{ secrets.GITHUB_TOKEN }}
-        stale-pr-message: 'This pull request has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this pull request will automatically be closed in 14 days. Note, that you can always re-open a closed pull request at any time.'
-        stale-issue-message: 'This issue has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this issue will automatically be closed in 14 days. Note, that you can always re-open a closed issue at any time.'
-        days-before-stale: 60
-        days-before-close: 14
-        stale-issue-label: 'Stale'
-        stale-pr-label: 'Stale'
-        exempt-pr-labels: 'Blocked,In progress'
-        exempt-issue-labels: 'In progress,Enhancement,Feature,Feature Request,RFC,Meta'
-        operations-per-run: 400

.github/workflows/twister.yaml

@@ -0,0 +1,231 @@
+name: Run tests with twister
+
+on:
+  push:
+    branches:
+      - v2.7-auditable-branch
+  pull_request_target:
+    branches:
+      - v2.7-auditable-branch
+  schedule:
+    # Run at 00:00 on Saturday
+    - cron: '0 8 * * 6'
+
+jobs:
+  twister-build-prep:
+    runs-on: zephyr_runner
+    container:
+      image: zephyrprojectrtos/ci:v0.18.4
+      options: '--entrypoint /bin/bash'
+    outputs:
+      subset: ${{ steps.output-services.outputs.subset }}
+      size: ${{ steps.output-services.outputs.size }}
+    env:
+      MATRIX_SIZE: 10
+      DAILY_MATRIX_SIZE: 120
+      ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.1
+      CLANG_ROOT_DIR: /usr/lib/llvm-12
+      TESTS_PER_BUILDER: 700
+      COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
+    steps:
+      - name: Cancel Previous Runs
+        uses: styfle/cancel-workflow-action@0.6.0
+        with:
+          access_token: ${{ github.token }}
+
+      - name: checkout
+        if: github.event_name == 'pull_request_target'
+        uses: actions/checkout@v2
+        with:
+          ref: ${{ github.event.pull_request.head.sha }}
+          fetch-depth: 0
+          persist-credentials: false
+
+      - name: west setup
+        if: github.event_name == 'pull_request_target'
+        run: |
+          west init -l . || true
+          west config --global update.narrow true
+          west update 2>&1 1> west.update.log || west update 2>&1 1> west.update.log
+          west forall -c 'git reset --hard HEAD'
+
+      - name: Generate Test Plan with Twister
+        if: github.event_name == 'pull_request_target'
+        id: test-plan
+        run: |
+          sudo apt-get install -y bc
+          git config --global user.email "bot@zephyrproject.org"
+          git config --global user.name "Zephyr Bot"
+          export ZEPHYR_BASE=${PWD}
+          export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
+          git log -n 500 --oneline | grep -q "run twister using github action" || (
+            echo "Your branch is not up to date, you need to rebase on top of latest HEAD of main branch"
+            exit 1
+          )
+          ./scripts/ci/run_ci.sh -S -c -b ${{github.base_ref}} -r origin \
+                  -p ${{github.event.pull_request.number}} -R ${COMMIT_RANGE}
+          # remove all tests to be skipped
+          grep -v skipped test_file.txt > no_skipped.txt
+          # get number of tests
+          lines=$(wc -l < no_skipped.txt)
+          if [ "$lines" = 1 ]; then
+            # no tests, so we need 0 nodes
+            nodes=0
+          else
+            nodes=$(echo "${lines} / ${TESTS_PER_BUILDER}" | bc)
+            if [ "${nodes}" = 0 ]; then
+              # for less than TESTS_PER_BUILDER, we take at least 1 node
+              nodes=1
+            fi
+          fi
+          echo "::set-output name=calculated_matrix_size::${nodes}";
+          rm test_file.txt no_skipped.txt
+
+      - name: Determine matrix size
+        id: output-services
+        run: |
+          if [ "${{github.event_name}}" = "pull_request_target" ]; then
+            if [ -n "${{steps.test-plan.outputs.calculated_matrix_size}}" ]; then
+              subset="[$(seq -s',' 1 ${{steps.test-plan.outputs.calculated_matrix_size}})]"
+            else
+              subset="[$(seq -s',' 1 ${MATRIX_SIZE})]"
+            fi
+            size=${{ steps.test-plan.outputs.calculated_matrix_size }}
+          elif [ "${{github.event_name}}" = "push" ]; then
+            subset="[$(seq -s',' 1 ${MATRIX_SIZE})]"
+            size=${MATRIX_SIZE}
+          else
+            subset="[$(seq -s',' 1 ${DAILY_MATRIX_SIZE})]"
+            size=${DAILY_MATRIX_SIZE}
+          fi
+          echo "::set-output name=subset::${subset}";
+          echo "::set-output name=size::${size}";
+
+
+  twister-build:
+    runs-on: zephyr_runner
+    needs: twister-build-prep
+    if: needs.twister-build-prep.outputs.size != 0
+    container:
+      image: zephyrprojectrtos/ci:v0.18.4
+      options: '--entrypoint /bin/bash'
+    strategy:
+      fail-fast: false
+      matrix:
+        subset: ${{fromJSON(needs.twister-build-prep.outputs.subset)}}
+    env:
+      ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.1
+      CLANG_ROOT_DIR: /usr/lib/llvm-12
+      DAILY_OPTIONS: ' --inline-logs -M -N --build-only --all --retry-failed 3 -v '
+      COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
+    steps:
+      - name: Update PATH for west
+        run: |
+          echo "$HOME/.local/bin" >> $GITHUB_PATH
+
+      - name: checkout
+        uses: actions/checkout@v2
+        with:
+          ref: ${{ github.event.pull_request.head.sha }}
+          fetch-depth: 0
+          persist-credentials: false
+
+      - name: west setup
+        run: |
+          west init -l . || true
+          west config --global update.narrow true
+          west update 2>&1 1> west.update.log || west update 2>&1 1> west.update.log
+          west forall -c 'git reset --hard HEAD'
+
+      - name: Check Environment
+        run: |
+          cmake --version
+          ${CLANG_ROOT_DIR}/bin/clang --version
+          gcc --version
+          ls -la
+          echo "github.ref: ${{ github.ref }}"
+          echo "github.base_ref: ${{ github.base_ref }}"
+          echo "github.ref_name: ${{ github.ref_name }}"
+
+      - name: Prepare ccache timestamp/data
+        id: ccache_cache_timestamp
+        shell: cmake -P {0}
+        run: |
+          string(TIMESTAMP current_date "%Y-%m-%d-%H;%M;%S" UTC)
+          string(REPLACE "/" "_" repo ${{github.repository}})
+          string(REPLACE "-" "_" repo2 ${repo})
+          message("::set-output name=repo::${repo2}")
+
+      - name: use cache
+        id: cache-ccache
+        uses: nashif/action-s3-cache@master
+        with:
+          key: ${{ steps.ccache_cache_timestamp.outputs.repo }}-${{ github.ref_name }}-${{github.event_name}}-${{ matrix.subset }}-ccache
+          path: /github/home/.ccache
+          aws-s3-bucket: ccache.zephyrproject.org
+          aws-access-key-id: ${{ secrets.CCACHE_S3_ACCESS_KEY_ID }}
+          aws-secret-access-key: ${{ secrets.CCACHE_S3_SECRET_ACCESS_KEY }}
+          aws-region: us-east-2
+
+      - name: ccache stats initial
+        run: |
+          test -d github/home/.ccache && mv github/home/.ccache /github/home/.ccache
+          ccache -M 10G -s
+
+      - if: github.event_name == 'push'
+        name: Run Tests with Twister (Push)
+        run: |
+          export ZEPHYR_BASE=${PWD}
+          export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
+          ./scripts/ci/run_ci.sh -c -b main -r origin -m ${{matrix.subset}} \
+                    -M ${{ strategy.job-total }}
+
+      - if: github.event_name == 'pull_request_target'
+        name: Run Tests with Twister (Pull Request)
+        run: |
+          git config --global user.email "bot@zephyrproject.org"
+          git config --global user.name "Zephyr Builder"
+          export ZEPHYR_BASE=${PWD}
+          export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
+          ./scripts/ci/run_ci.sh -c -b ${{github.base_ref}} -r origin \
+                     -m ${{matrix.subset}} -M  ${{ strategy.job-total }} \
+                     -p ${{github.event.pull_request.number}} -R ${COMMIT_RANGE}
+
+      - if: github.event_name == 'schedule'
+        name: Run Tests with Twister (Daily)
+        run: |
+          export ZEPHYR_BASE=${PWD}
+          export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
+          ./scripts/twister --subset ${{matrix.subset}}/${{ strategy.job-total }} ${DAILY_OPTIONS}
+
+      - name: ccache stats post
+        run: |
+          ccache -s
+
+      - name: Upload Unit Test Results
+        if: always()
+        uses: actions/upload-artifact@v2
+        with:
+          name: Unit Test Results (Subset ${{ matrix.subset }})
+          path: twister-out/twister.xml
+
+  twister-test-results:
+    name: "Publish Unit Tests Results"
+    needs: twister-build
+    runs-on: ubuntu-latest
+      # the build-and-test job might be skipped, we don't need to run this job then
+    if: success() || failure()
+
+    steps:
+      - name: Download Artifacts
+        uses: actions/download-artifact@v2
+        with:
+          path: artifacts
+
+      - name: Publish Unit Test Results
+        uses: EnricoMi/publish-unit-test-result-action@v1
+        with:
+          check_name: Unit Test Results
+          github_token: ${{ secrets.GITHUB_TOKEN }}
+          files: "**/twister.xml"
+          comment_mode: off

CODEOWNERS

@@ -15,7 +15,6 @@
 
 /.github/				  @nashif
 /.github/workflows/                       @galak @nashif
-/.buildkite/				  @galak
 /MAINTAINERS.yml                          @ioannisg @MaureenHelm
 /arch/arc/                                @abrodkin @ruuddw @evgeniy-paltsev
 /arch/arm/                                @MaureenHelm @galak @ioannisg

MAINTAINERS.yml

@@ -1632,7 +1632,6 @@ CI:
         - galak
     files:
         - .github/
-        - .buildkite/
         - scripts/ci/
         - .checkpatch.conf
         - scripts/gitlint/

arch/arc/core/mpu/arc_core_mpu.c

@@ -35,7 +35,7 @@ int arch_mem_domain_max_partitions_get(void)
 /*
  * Validate the given buffer is user accessible or not
  */
-int arch_buffer_validate(void *addr, size_t size, int write)
+int arch_buffer_validate(const void *addr, size_t size, bool write)
 {
 	return arc_core_mpu_buffer_validate(addr, size, write);
 }

arch/arc/core/mpu/arc_mpu_common_internal.h

@@ -207,7 +207,7 @@ int arc_core_mpu_get_max_domain_partition_regions(void)
 /**
  * @brief validate the given buffer is user accessible or not
  */
-int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
+int arc_core_mpu_buffer_validate(const void *addr, size_t size, bool write)
 {
 	/*
 	 * For ARC MPU, smaller region number takes priority.

arch/arc/core/mpu/arc_mpu_v4_internal.h

@@ -779,7 +779,7 @@ int arc_core_mpu_get_max_domain_partition_regions(void)
 /**
  * @brief validate the given buffer is user accessible or not
  */
-int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
+int arc_core_mpu_buffer_validate(const void *addr, size_t size, bool write)
 {
 	int r_index;
 	int key = arch_irq_lock();

arch/arm/core/aarch32/irq_manage.c

@@ -88,7 +88,7 @@ void z_arm_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
 	__ASSERT(prio <= (BIT(NUM_IRQ_PRIO_BITS) - 1),
 		 "invalid priority %d for %d irq! values must be less than %lu\n",
 		 prio - _IRQ_PRIO_OFFSET, irq,
-		 BIT(NUM_IRQ_PRIO_BITS) - (_IRQ_PRIO_OFFSET));
+		 (unsigned long)BIT(NUM_IRQ_PRIO_BITS) - (_IRQ_PRIO_OFFSET));
 	NVIC_SetPriority((IRQn_Type)irq, prio);
 }
 

arch/arm/core/aarch32/mpu/arm_core_mpu.c

@@ -324,7 +324,7 @@ int arch_mem_domain_max_partitions_get(void)
 	return ARM_CORE_MPU_MAX_DOMAIN_PARTITIONS_GET(available_regions);
 }
 
-int arch_buffer_validate(void *addr, size_t size, int write)
+int arch_buffer_validate(const void *addr, size_t size, bool write)
 {
 	return arm_core_mpu_buffer_validate(addr, size, write);
 }

arch/arm/core/aarch32/mpu/arm_core_mpu_dev.h

@@ -261,7 +261,7 @@ int arm_core_mpu_get_max_available_dyn_regions(void);
  *       spans multiple enabled MPU regions (even if these regions all
  *       permit user access).
  */
-int arm_core_mpu_buffer_validate(void *addr, size_t size, int write);
+int arm_core_mpu_buffer_validate(const void *addr, size_t size, bool write);
 
 #endif /* CONFIG_ARM_MPU */
 

arch/arm/core/aarch32/mpu/arm_mpu.c

@@ -253,7 +253,7 @@ int arm_core_mpu_get_max_available_dyn_regions(void)
  *
  * Presumes the background mapping is NOT user accessible.
  */
-int arm_core_mpu_buffer_validate(void *addr, size_t size, int write)
+int arm_core_mpu_buffer_validate(const void *addr, size_t size, bool write)
 {
 	return mpu_buffer_validate(addr, size, write);
 }

arch/arm/core/aarch32/mpu/arm_mpu_v7_internal.h

@@ -169,7 +169,7 @@ static inline int is_user_accessible_region(uint32_t r_index, int write)
  * This internal function validates whether a given memory buffer
  * is user accessible or not.
  */
-static inline int mpu_buffer_validate(void *addr, size_t size, int write)
+static inline int mpu_buffer_validate(const void *addr, size_t size, bool write)
 {
 	int32_t r_index;
 	int rc = -EPERM;

arch/arm/core/aarch32/mpu/arm_mpu_v8_internal.h

@@ -270,7 +270,7 @@ static inline int is_enabled_region(uint32_t index)
  * in case the fast address range check fails.
  *
  */
-static inline int mpu_buffer_validate(void *addr, size_t size, int write)
+static inline int mpu_buffer_validate(const void *addr, size_t size, bool write)
 {
 	uint32_t _addr = (uint32_t)addr;
 	uint32_t _size = (uint32_t)size;

arch/arm/core/aarch32/mpu/nxp_mpu.c

@@ -536,7 +536,7 @@ static inline int is_user_accessible_region(uint32_t r_index, int write)
 /**
  * @brief validate the given buffer is user accessible or not
  */
-int arm_core_mpu_buffer_validate(void *addr, size_t size, int write)
+int arm_core_mpu_buffer_validate(const void *addr, size_t size, bool write)
 {
 	uint8_t r_index;
 

arch/arm/include/aarch32/cortex_m/tz_ns.h

@@ -65,7 +65,7 @@
 			"pop {r0-r3}\n\t" \
 			load_lr "\n\t" \
 			::); \
-	} while (0)
+	} while (false)
 
 /**
  * @brief Macro for "sandwiching" a function call (@p name) in two other calls

arch/arm64/core/userspace.S

@@ -50,7 +50,7 @@ strlen_done:
 	ret
 
 /*
- * int arch_buffer_validate(void *addr, size_t size, int write)
+ * int arch_buffer_validate(const void *addr, size_t size, bool write)
  */
 
 GTEXT(arch_buffer_validate)

arch/nios2/include/kernel_arch_func.h

@@ -53,15 +53,15 @@ void z_irq_do_offload(void);
 #if ALT_CPU_ICACHE_SIZE > 0
 void z_nios2_icache_flush_all(void);
 #else
-#define z_nios2_icache_flush_all() do { } while (0)
+#define z_nios2_icache_flush_all() do { } while (false)
 #endif
 
 #if ALT_CPU_DCACHE_SIZE > 0
 void z_nios2_dcache_flush_all(void);
 void z_nios2_dcache_flush_no_writeback(void *start, uint32_t len);
 #else
-#define z_nios2_dcache_flush_all() do { } while (0)
-#define z_nios2_dcache_flush_no_writeback(x, y) do { } while (0)
+#define z_nios2_dcache_flush_all() do { } while (false)
+#define z_nios2_dcache_flush_no_writeback(x, y) do { } while (false)
 #endif
 
 #endif /* _ASMLANGUAGE */

arch/riscv/core/pmp/core_pmp.c

@@ -328,7 +328,7 @@ void z_riscv_pmp_add_dynamic(struct k_thread *thread,
 	}
 }
 
-int arch_buffer_validate(void *addr, size_t size, int write)
+int arch_buffer_validate(const void *addr, size_t size, bool write)
 {
 	uint32_t index, i;
 	ulong_t pmp_type, pmp_addr_start, pmp_addr_stop;

arch/x86/core/acpi.c

@@ -15,7 +15,7 @@ static bool check_sum(struct acpi_sdt *t)
 {
 	uint8_t sum = 0U, *p = (uint8_t *)t;
 
-	for (int i = 0; i < t->length; i++) {
+	for (uint32_t i = 0; i < t->length; i++) {
 		sum += p[i];
 	}
 
@@ -26,7 +26,7 @@ static void find_rsdp(void)
 {
 	uint8_t *bda_seg, *zero_page_base;
 	uint64_t *search;
-	uintptr_t search_phys, rsdp_phys = 0U;
+	uintptr_t search_phys, rsdp_phys;
 	size_t search_length, rsdp_length;
 
 	if (is_rsdp_searched) {
@@ -49,7 +49,7 @@ static void find_rsdp(void)
 	 * first megabyte and are directly accessible.
 	 */
 	bda_seg = 0x040e + zero_page_base;
-	search_phys = (long)(((int)*(uint16_t *)bda_seg) << 4);
+	search_phys = ((uintptr_t)*(uint16_t *)bda_seg) << 4;
 
 	/* Unmap after use */
 	z_phys_unmap(zero_page_base, 4096);
@@ -57,14 +57,14 @@ static void find_rsdp(void)
 	/* Might be nothing there, check before we inspect.
 	 * Note that EBDA usually is in 0x80000 to 0x100000.
 	 */
-	if ((POINTER_TO_UINT(search_phys) >= 0x80000UL) &&
-	    (POINTER_TO_UINT(search_phys) < 0x100000UL)) {
+	if ((search_phys >= 0x80000UL) &&
+	    (search_phys < 0x100000UL)) {
 		search_length = 1024;
 		z_phys_map((uint8_t **)&search, search_phys, search_length, 0);
 
-		for (int i = 0; i < 1024/8; i++) {
+		for (size_t i = 0; i < (1024/8); i++) {
 			if (search[i] == ACPI_RSDP_SIGNATURE) {
-				rsdp_phys = search_phys + i * 8;
+				rsdp_phys = search_phys + (i * 8);
 				rsdp = (void *)&search[i];
 				goto found;
 			}
@@ -80,10 +80,9 @@ static void find_rsdp(void)
 	search_length = 128 * 1024;
 	z_phys_map((uint8_t **)&search, search_phys, search_length, 0);
 
-	rsdp_phys = 0U;
-	for (int i = 0; i < 128*1024/8; i++) {
+	for (size_t i = 0; i < ((128*1024)/8); i++) {
 		if (search[i] == ACPI_RSDP_SIGNATURE) {
-			rsdp_phys = search_phys + i * 8;
+			rsdp_phys = search_phys + (i * 8);
 			rsdp = (void *)&search[i];
 			goto found;
 		}
@@ -133,11 +132,11 @@ void *z_acpi_find_table(uint32_t signature)
 
 	find_rsdp();
 
-	if (!rsdp) {
+	if (rsdp == NULL) {
 		return NULL;
 	}
 
-	if (rsdp->rsdt_ptr) {
+	if (rsdp->rsdt_ptr != 0U) {
 		z_phys_map((uint8_t **)&rsdt, rsdp->rsdt_ptr, sizeof(*rsdt), 0);
 		tbl_found = false;
 
@@ -150,11 +149,11 @@ void *z_acpi_find_table(uint32_t signature)
 			uint32_t *end = (uint32_t *)((char *)rsdt + rsdt->sdt.length);
 
 			for (uint32_t *tp = &rsdt->table_ptrs[0]; tp < end; tp++) {
-				t_phys = (long)*tp;
+				t_phys = (uintptr_t)*tp;
 				z_phys_map(&mapped_tbl, t_phys, sizeof(*t), 0);
 				t = (void *)mapped_tbl;
 
-				if (t->signature == signature && check_sum(t)) {
+				if ((t->signature == signature) && check_sum(t)) {
 					tbl_found = true;
 					break;
 				}
@@ -174,7 +173,7 @@ void *z_acpi_find_table(uint32_t signature)
 		return NULL;
 	}
 
-	if (rsdp->xsdt_ptr) {
+	if (rsdp->xsdt_ptr != 0ULL) {
 		z_phys_map((uint8_t **)&xsdt, rsdp->xsdt_ptr, sizeof(*xsdt), 0);
 
 		tbl_found = false;
@@ -187,11 +186,11 @@ void *z_acpi_find_table(uint32_t signature)
 			uint64_t *end = (uint64_t *)((char *)xsdt + xsdt->sdt.length);
 
 			for (uint64_t *tp = &xsdt->table_ptrs[0]; tp < end; tp++) {
-				t_phys = (long)*tp;
+				t_phys = (uintptr_t)*tp;
 				z_phys_map(&mapped_tbl, t_phys, sizeof(*t), 0);
 				t = (void *)mapped_tbl;
 
-				if (t->signature == signature && check_sum(t)) {
+				if ((t->signature == signature) && check_sum(t)) {
 					tbl_found = true;
 					break;
 				}
@@ -229,7 +228,7 @@ struct acpi_cpu *z_acpi_get_cpu(int n)
 	uintptr_t base = POINTER_TO_UINT(madt);
 	uintptr_t offset;
 
-	if (!madt) {
+	if (madt == NULL) {
 		return NULL;
 	}
 

arch/x86/core/early_serial.c

@@ -21,8 +21,8 @@
  * together.
  */
 static mm_reg_t mmio;
-#define IN(reg)       (sys_read32(mmio + reg * 4) & 0xff)
-#define OUT(reg, val) sys_write32((val) & 0xff, mmio + reg * 4)
+#define IN(reg)       (sys_read32(mmio + ((reg) * 4U)) & 0xffU)
+#define OUT(reg, val) sys_write32((uint32_t)(val) & 0xffU, mmio + ((reg) * 4U))
 #elif defined(X86_SOC_EARLY_SERIAL_MMIO8_ADDR)
 /* Still other devices use a MMIO region containing packed byte
  * registers
@@ -49,21 +49,21 @@ static mm_reg_t mmio;
 #define REG_BRDH 0x01  /* Baud rate divisor (MSB)  */
 
 #define IER_DISABLE     0x00
-#define LCR_8N1         (BIT(0) | BIT(1))
-#define LCR_DLAB_SELECT BIT(7)
-#define MCR_DTR         BIT(0)
-#define MCR_RTS         BIT(1)
-#define LSR_THRE        BIT(5)
+#define LCR_8N1         (BIT32(0) | BIT32(1))
+#define LCR_DLAB_SELECT BIT32(7)
+#define MCR_DTR         BIT32(0)
+#define MCR_RTS         BIT32(1)
+#define LSR_THRE        BIT32(5)
 
 #define FCR_FIFO    BIT(0)  /* enable XMIT and RCVR FIFO */
 #define FCR_RCVRCLR BIT(1)  /* clear RCVR FIFO           */
 #define FCR_XMITCLR BIT(2)  /* clear XMIT FIFO           */
-#define FCR_FIFO_1  0       /* 1 byte in RCVR FIFO       */
+#define FCR_FIFO_1  0x00U   /* 1 byte in RCVR FIFO       */
 
 static bool early_serial_init_done;
 static uint32_t suppressed_chars;
 
-static void serout(int c)
+static void serout(uint8_t c)
 {
 	while ((IN(REG_LSR) & LSR_THRE) == 0) {
 	}
@@ -77,10 +77,10 @@ int arch_printk_char_out(int c)
 		return c;
 	}
 
-	if (c == '\n') {
-		serout('\r');
+	if (c == (int)'\n') {
+		serout((uint8_t)'\r');
 	}
-	serout(c);
+	serout((uint8_t)c);
 	return c;
 }
 
@@ -100,8 +100,8 @@ void z_x86_early_serial_init(void)
 
 	OUT(REG_IER, IER_DISABLE);     /* Disable interrupts */
 	OUT(REG_LCR, LCR_DLAB_SELECT); /* DLAB select */
-	OUT(REG_BRDL, 1);              /* Baud divisor = 1 */
-	OUT(REG_BRDH, 0);
+	OUT(REG_BRDL, 1U);              /* Baud divisor = 1 */
+	OUT(REG_BRDH, 0U);
 	OUT(REG_LCR, LCR_8N1);         /* LCR = 8n1 + DLAB off */
 	OUT(REG_MCR, MCR_DTR | MCR_RTS);
 

arch/x86/core/fatal.c

@@ -57,10 +57,10 @@ bool z_x86_check_stack_bounds(uintptr_t addr, size_t size, uint16_t cs)
 {
 	uintptr_t start, end;
 
-	if (_current == NULL || arch_is_in_isr()) {
+	if ((_current == NULL) || arch_is_in_isr()) {
 		/* We were servicing an interrupt or in early boot environment
 		 * and are supposed to be on the interrupt stack */
-		int cpu_id;
+		uint8_t cpu_id;
 
 #ifdef CONFIG_SMP
 		cpu_id = arch_curr_cpu()->id;
@@ -71,8 +71,8 @@ bool z_x86_check_stack_bounds(uintptr_t addr, size_t size, uint16_t cs)
 		    z_interrupt_stacks[cpu_id]);
 		end = start + CONFIG_ISR_STACK_SIZE;
 #ifdef CONFIG_USERSPACE
-	} else if ((cs & 0x3U) == 0U &&
-		   (_current->base.user_options & K_USER) != 0) {
+	} else if (((cs & 0x3U) == 0U) &&
+		   ((_current->base.user_options & K_USER) != 0)) {
 		/* The low two bits of the CS register is the privilege
 		 * level. It will be 0 in supervisor mode and 3 in user mode
 		 * corresponding to ring 0 / ring 3.
@@ -90,7 +90,7 @@ bool z_x86_check_stack_bounds(uintptr_t addr, size_t size, uint16_t cs)
 					_current->stack_info.size);
 	}
 
-	return (addr <= start) || (addr + size > end);
+	return (addr <= start) || ((addr + size) > end);
 }
 #endif
 
@@ -158,7 +158,7 @@ static inline uintptr_t get_cr3(const z_arch_esf_t *esf)
 	/* If the interrupted thread was in user mode, we did a page table
 	 * switch when we took the exception via z_x86_trampoline_to_kernel
 	 */
-	if ((esf->cs & 0x3) != 0) {
+	if ((esf->cs & 0x3U) != 0) {
 		return _current->arch.ptables;
 	}
 #else
@@ -307,8 +307,8 @@ static void dump_page_fault(z_arch_esf_t *esf)
 			LOG_ERR("Linear address not present in page tables");
 		}
 		LOG_ERR("Access violation: %s thread not allowed to %s",
-			(err & PF_US) != 0U ? "user" : "supervisor",
-			(err & PF_ID) != 0U ? "execute" : ((err & PF_WR) != 0U ?
+			((err & PF_US) != 0U) ? "user" : "supervisor",
+			((err & PF_ID) != 0U) ? "execute" : (((err & PF_WR) != 0U) ?
 							   "write" :
 							   "read"));
 		if ((err & PF_PK) != 0) {
@@ -356,7 +356,7 @@ FUNC_NORETURN void z_x86_unhandled_cpu_exception(uintptr_t vector,
 #else
 	ARG_UNUSED(vector);
 #endif
-	z_x86_fatal_error(K_ERR_CPU_EXCEPTION, esf);
+	z_x86_fatal_error((unsigned int)K_ERR_CPU_EXCEPTION, esf);
 }
 
 #ifdef CONFIG_USERSPACE
@@ -413,18 +413,16 @@ void z_x86_page_fault_handler(z_arch_esf_t *esf)
 #endif
 
 #ifdef CONFIG_USERSPACE
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(exceptions); i++) {
+	for (size_t i = 0; i < ARRAY_SIZE(exceptions); i++) {
 #ifdef CONFIG_X86_64
-		if ((void *)esf->rip >= exceptions[i].start &&
-		    (void *)esf->rip < exceptions[i].end) {
+		if (((void *)esf->rip >= exceptions[i].start) &&
+		    ((void *)esf->rip < exceptions[i].end)) {
 			esf->rip = (uint64_t)(exceptions[i].fixup);
 			return;
 		}
 #else
-		if ((void *)esf->eip >= exceptions[i].start &&
-		    (void *)esf->eip < exceptions[i].end) {
+		if (((void *)esf->eip >= exceptions[i].start) &&
+		    ((void *)esf->eip < exceptions[i].end)) {
 			esf->eip = (unsigned int)(exceptions[i].fixup);
 			return;
 		}
@@ -435,21 +433,21 @@ void z_x86_page_fault_handler(z_arch_esf_t *esf)
 	dump_page_fault(esf);
 #endif
 #ifdef CONFIG_THREAD_STACK_INFO
-	if (z_x86_check_stack_bounds(esf_get_sp(esf), 0, esf->cs)) {
-		z_x86_fatal_error(K_ERR_STACK_CHK_FAIL, esf);
+	if (z_x86_check_stack_bounds(esf_get_sp(esf), 0, (uint16_t)esf->cs)) {
+		z_x86_fatal_error((unsigned int)K_ERR_STACK_CHK_FAIL, esf);
 	}
 #endif
-	z_x86_fatal_error(K_ERR_CPU_EXCEPTION, esf);
+	z_x86_fatal_error((unsigned int)K_ERR_CPU_EXCEPTION, esf);
 	CODE_UNREACHABLE;
 }
 
 __pinned_func
 void z_x86_do_kernel_oops(const z_arch_esf_t *esf)
 {
-	uintptr_t reason;
+	unsigned int reason;
 
 #ifdef CONFIG_X86_64
-	reason = esf->rax;
+	reason = (unsigned int)esf->rax;
 #else
 	uintptr_t *stack_ptr = (uintptr_t *)esf->esp;
 
@@ -460,9 +458,9 @@ void z_x86_do_kernel_oops(const z_arch_esf_t *esf)
 	/* User mode is only allowed to induce oopses and stack check
 	 * failures via this software interrupt
 	 */
-	if ((esf->cs & 0x3) != 0 && !(reason == K_ERR_KERNEL_OOPS ||
-				      reason == K_ERR_STACK_CHK_FAIL)) {
-		reason = K_ERR_KERNEL_OOPS;
+	if (((esf->cs & 0x3U) != 0) && !((reason == (unsigned int)K_ERR_KERNEL_OOPS) ||
+				      (reason == (unsigned int)K_ERR_STACK_CHK_FAIL))) {
+		reason = (unsigned int)K_ERR_KERNEL_OOPS;
 	}
 #endif
 

arch/x86/core/ia32/fatal.c

@@ -42,18 +42,18 @@ void z_x86_spurious_irq(const z_arch_esf_t *esf)
 }
 
 __pinned_func
-void arch_syscall_oops(void *ssf)
+void arch_syscall_oops(void *ssf_ptr)
 {
-	struct _x86_syscall_stack_frame *ssf_ptr =
-		(struct _x86_syscall_stack_frame *)ssf;
+	struct _x86_syscall_stack_frame *ssf =
+		(struct _x86_syscall_stack_frame *)ssf_ptr;
 	z_arch_esf_t oops = {
-		.eip = ssf_ptr->eip,
-		.cs = ssf_ptr->cs,
-		.eflags = ssf_ptr->eflags
+		.eip = ssf->eip,
+		.cs = ssf->cs,
+		.eflags = ssf->eflags
 	};
 
 	if (oops.cs == USER_CODE_SEG) {
-		oops.esp = ssf_ptr->esp;
+		oops.esp = ssf->esp;
 	}
 
 	z_x86_fatal_error(K_ERR_KERNEL_OOPS, &oops);

arch/x86/core/ia32/thread.c

@@ -79,7 +79,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
 	void *swap_entry;
 	struct _x86_initial_frame *initial_frame;
 
-#if CONFIG_X86_STACK_PROTECTION
+#ifdef CONFIG_X86_STACK_PROTECTION
 	z_x86_set_stack_guard(stack);
 #endif
 

arch/x86/core/intel64/cpu.c

@@ -128,7 +128,7 @@ struct x86_cpuboot x86_cpuboot[] = {
 void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
 		    arch_cpustart_t fn, void *arg)
 {
-	uint8_t vector = ((unsigned long) x86_ap_start) >> 12;
+	uint8_t vector = (uint8_t)(((uintptr_t)x86_ap_start) >> 12);
 	uint8_t apic_id;
 
 	if (IS_ENABLED(CONFIG_ACPI)) {
@@ -143,8 +143,8 @@ void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
 
 	apic_id = x86_cpu_loapics[cpu_num];
 
-	x86_cpuboot[cpu_num].sp = (uint64_t) Z_KERNEL_STACK_BUFFER(stack) + sz;
-	x86_cpuboot[cpu_num].stack_size = sz;
+	x86_cpuboot[cpu_num].sp = (uint64_t) Z_KERNEL_STACK_BUFFER(stack) + (size_t)sz;
+	x86_cpuboot[cpu_num].stack_size = (size_t)sz;
 	x86_cpuboot[cpu_num].fn = fn;
 	x86_cpuboot[cpu_num].arg = arg;
 
@@ -188,6 +188,6 @@ FUNC_NORETURN void z_x86_cpu_init(struct x86_cpuboot *cpuboot)
 #endif
 
 	/* Enter kernel, never return */
-	cpuboot->ready++;
+	cpuboot->ready += 1;
 	cpuboot->fn(cpuboot->arg);
 }

arch/x86/core/intel64/fatal.c

@@ -15,6 +15,8 @@ LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
  */
 __weak bool z_x86_do_kernel_nmi(const z_arch_esf_t *esf)
 {
+	ARG_UNUSED(esf);
+
 	return false;
 }
 
@@ -46,6 +48,6 @@ void arch_syscall_oops(void *ssf_ptr)
 
 	LOG_ERR("Bad system call from RIP 0x%lx", ssf->rip);
 
-	z_x86_fatal_error(K_ERR_KERNEL_OOPS, NULL);
+	z_x86_fatal_error((unsigned int)K_ERR_KERNEL_OOPS, NULL);
 }
 #endif /* CONFIG_USERSPACE */

arch/x86/core/intel64/irq.c

@@ -16,7 +16,7 @@
 
 LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
 
-unsigned char _irq_to_interrupt_vector[CONFIG_MAX_IRQ_LINES];
+uint8_t _irq_to_interrupt_vector[CONFIG_MAX_IRQ_LINES];
 
 /*
  * The low-level interrupt code consults these arrays to dispatch IRQs, so
@@ -26,40 +26,43 @@ unsigned char _irq_to_interrupt_vector[CONFIG_MAX_IRQ_LINES];
 
 #define NR_IRQ_VECTORS (IV_NR_VECTORS - IV_IRQS)  /* # vectors free for IRQs */
 
-void (*x86_irq_funcs[NR_IRQ_VECTORS])(const void *);
+void (*x86_irq_funcs[NR_IRQ_VECTORS])(const void *arg);
 const void *x86_irq_args[NR_IRQ_VECTORS];
 
 static void irq_spurious(const void *arg)
 {
 	LOG_ERR("Spurious interrupt, vector %d\n", (uint32_t)(uint64_t)arg);
-	z_fatal_error(K_ERR_SPURIOUS_IRQ, NULL);
+	z_fatal_error((unsigned int)K_ERR_SPURIOUS_IRQ, NULL);
 }
 
 void x86_64_irq_init(void)
 {
-	for (int i = 0; i < NR_IRQ_VECTORS; i++) {
+	for (unsigned int i = 0; i < NR_IRQ_VECTORS; i++) {
 		x86_irq_funcs[i] = irq_spurious;
-		x86_irq_args[i] = (const void *)(long)(i + IV_IRQS);
+		x86_irq_args[i] = (const void *)((uintptr_t)i + IV_IRQS);
 	}
 }
 
 int z_x86_allocate_vector(unsigned int priority, int prev_vector)
 {
-	const int VECTORS_PER_PRIORITY = 16;
-	const int MAX_PRIORITY = 13;
+	const unsigned int VECTORS_PER_PRIORITY = 16;
+	const unsigned int MAX_PRIORITY = 13;
 	int vector = prev_vector;
-	int i;
 
 	if (priority >= MAX_PRIORITY) {
 		priority = MAX_PRIORITY;
 	}
 
 	if (vector == -1) {
-		vector = (priority * VECTORS_PER_PRIORITY) + IV_IRQS;
+		const unsigned int uvector = (priority * VECTORS_PER_PRIORITY) + IV_IRQS;
+
+		vector = (int)uvector;
 	}
 
-	for (i = 0; i < VECTORS_PER_PRIORITY; ++i, ++vector) {
-		if (prev_vector != 1 && vector == prev_vector) {
+	const int end_vector = vector + (int) VECTORS_PER_PRIORITY;
+
+	for (; vector < end_vector; ++vector) {
+		if ((prev_vector != 1) && (vector == prev_vector)) {
 			continue;
 		}
 
@@ -72,7 +75,7 @@ int z_x86_allocate_vector(unsigned int priority, int prev_vector)
 			continue;
 		}
 
-		if (x86_irq_funcs[vector - IV_IRQS] == irq_spurious) {
+		if (x86_irq_funcs[(unsigned int)vector - IV_IRQS] == irq_spurious) {
 			return vector;
 		}
 	}
@@ -98,8 +101,8 @@ void z_x86_irq_connect_on_vector(unsigned int irq,
  */
 
 int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
-			     void (*func)(const void *arg),
-			     const void *arg, uint32_t flags)
+			     void (*routine)(const void *parameter),
+			     const void *parameter, uint32_t flags)
 {
 	uint32_t key;
 	int vector;
@@ -110,7 +113,7 @@ int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
 
 	vector = z_x86_allocate_vector(priority, -1);
 	if (vector >= 0) {
-		z_x86_irq_connect_on_vector(irq, vector, func, arg, flags);
+		z_x86_irq_connect_on_vector(irq, (uint8_t)vector, routine, parameter, flags);
 	}
 
 	irq_unlock(key);

arch/x86/core/intel64/thread.c

@@ -10,7 +10,7 @@
 #include <offsets_short.h>
 #include <x86_mmu.h>
 
-extern void x86_sse_init(struct k_thread *); /* in locore.S */
+extern void x86_sse_init(struct k_thread *thread); /* in locore.S */
 
 /* FIXME: This exists to make space for a "return address" at the top
  * of the stack.  Obviously this is unused at runtime, but is required
@@ -32,8 +32,10 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
 	void *switch_entry;
 	struct x86_initial_frame *iframe;
 
-#if CONFIG_X86_STACK_PROTECTION
+#ifdef CONFIG_X86_STACK_PROTECTION
 	z_x86_set_stack_guard(stack);
+#else
+	ARG_UNUSED(stack);
 #endif
 #ifdef CONFIG_USERSPACE
 	switch_entry = z_x86_userspace_prepare_thread(thread);
@@ -44,17 +46,17 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
 #endif
 	iframe = Z_STACK_PTR_TO_FRAME(struct x86_initial_frame, stack_ptr);
 	iframe->rip = 0U;
-	thread->callee_saved.rsp = (long) iframe;
-	thread->callee_saved.rip = (long) switch_entry;
+	thread->callee_saved.rsp = (uint64_t) iframe;
+	thread->callee_saved.rip = (uint64_t) switch_entry;
 	thread->callee_saved.rflags = EFLAGS_INITIAL;
 
 	/* Parameters to entry point, which is populated in
 	 * thread->callee_saved.rip
 	 */
-	thread->arch.rdi = (long) entry;
-	thread->arch.rsi = (long) p1;
-	thread->arch.rdx = (long) p2;
-	thread->arch.rcx = (long) p3;
+	thread->arch.rdi = (uint64_t) entry;
+	thread->arch.rsi = (uint64_t) p1;
+	thread->arch.rdx = (uint64_t) p2;
+	thread->arch.rcx = (uint64_t) p3;
 
 	x86_sse_init(thread);
 
@@ -65,11 +67,16 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
 int arch_float_disable(struct k_thread *thread)
 {
 	/* x86-64 always has FP/SSE enabled so cannot be disabled */
+	ARG_UNUSED(thread);
+
 	return -ENOTSUP;
 }
 
 int arch_float_enable(struct k_thread *thread, unsigned int options)
 {
 	/* x86-64 always has FP/SSE enabled so nothing to do here */
+	ARG_UNUSED(thread);
+	ARG_UNUSED(options);
+
 	return 0;
 }

arch/x86/core/pcie.c

@@ -37,19 +37,20 @@ static void pcie_mm_init(void)
 	struct acpi_mcfg *m = z_acpi_find_table(ACPI_MCFG_SIGNATURE);
 
 	if (m != NULL) {
-		int n = (m->sdt.length - sizeof(*m)) / sizeof(m->pci_segs[0]);
+		size_t n = (m->sdt.length - sizeof(*m)) / sizeof(m->pci_segs[0]);
 
-		for (int i = 0; i < n && i < MAX_PCI_BUS_SEGMENTS; i++) {
+		for (size_t i = 0; (i < n) && (i < MAX_PCI_BUS_SEGMENTS); i++) {
 			size_t size;
 			uintptr_t phys_addr;
 
 			bus_segs[i].start_bus = m->pci_segs[i].start_bus;
-			bus_segs[i].n_buses = 1 + m->pci_segs[i].end_bus
+			bus_segs[i].n_buses = (uint32_t)1 + m->pci_segs[i].end_bus
 				- m->pci_segs[i].start_bus;
 
 			phys_addr = m->pci_segs[i].base_addr;
 			/* 32 devices & 8 functions per bus, 4k per device */
-			size = bus_segs[i].n_buses * (32 * 8 * 4096);
+			size = bus_segs[i].n_buses;
+			size *= 32 * 8 * 4096;
 
 			device_map((mm_reg_t *)&bus_segs[i].mmio, phys_addr,
 				   size, K_MEM_CACHE_NONE);
@@ -63,10 +64,11 @@ static void pcie_mm_init(void)
 static inline void pcie_mm_conf(pcie_bdf_t bdf, unsigned int reg,
 				bool write, uint32_t *data)
 {
-	for (int i = 0; i < ARRAY_SIZE(bus_segs); i++) {
-		int off = PCIE_BDF_TO_BUS(bdf) - bus_segs[i].start_bus;
+	for (size_t i = 0; i < ARRAY_SIZE(bus_segs); i++) {
+		/* Wrapping is deliberate and will be filtered by conditional below */
+		uint32_t off = PCIE_BDF_TO_BUS(bdf) - bus_segs[i].start_bus;
 
-		if (off >= 0 && off < bus_segs[i].n_buses) {
+		if (off < bus_segs[i].n_buses) {
 			bdf = PCIE_BDF(off,
 				       PCIE_BDF_TO_DEV(bdf),
 				       PCIE_BDF_TO_FUNC(bdf));
@@ -187,6 +189,8 @@ uint32_t pcie_msi_map(unsigned int irq,
 	ARG_UNUSED(irq);
 #if defined(CONFIG_INTEL_VTD_ICTL)
 #if !defined(CONFIG_PCIE_MSI_X)
+	ARG_UNUSED(vector);
+
 	if (vector != NULL) {
 		map = vtd_remap_msi(vtd, vector);
 	} else
@@ -195,6 +199,8 @@ uint32_t pcie_msi_map(unsigned int irq,
 		map = vtd_remap_msi(vtd, vector);
 	} else
 #endif
+#else
+	ARG_UNUSED(vector);
 #endif
 	{
 		map = 0xFEE00000U; /* standard delivery to BSP local APIC */

arch/x86/core/prep_c.c

@@ -45,7 +45,7 @@ FUNC_NORETURN void z_x86_prep_c(void *arg)
 	ARG_UNUSED(info);
 #endif
 
-#if CONFIG_X86_STACK_PROTECTION
+#ifdef CONFIG_X86_STACK_PROTECTION
 	for (int i = 0; i < CONFIG_MP_NUM_CPUS; i++) {
 		z_x86_set_stack_guard(z_interrupt_stacks[i]);
 	}

arch/x86/core/x86_mmu.c

@@ -177,7 +177,7 @@ static const struct paging_level paging_levels[] = {
 	}
 };
 
-#define NUM_LEVELS	ARRAY_SIZE(paging_levels)
+#define NUM_LEVELS	((unsigned int)ARRAY_SIZE(paging_levels))
 #define PTE_LEVEL	(NUM_LEVELS - 1)
 #define PDE_LEVEL	(NUM_LEVELS - 2)
 
@@ -203,14 +203,14 @@ static const struct paging_level paging_levels[] = {
 #endif /* !CONFIG_X86_64 && !CONFIG_X86_PAE */
 
 /* Memory range covered by an instance of various table types */
-#define PT_AREA		((uintptr_t)(CONFIG_MMU_PAGE_SIZE * NUM_PT_ENTRIES))
+#define PT_AREA		((uintptr_t)CONFIG_MMU_PAGE_SIZE * NUM_PT_ENTRIES)
 #define PD_AREA 	(PT_AREA * NUM_PD_ENTRIES)
 #ifdef CONFIG_X86_64
 #define PDPT_AREA	(PD_AREA * NUM_PDPT_ENTRIES)
 #endif
 
-#define VM_ADDR		CONFIG_KERNEL_VM_BASE
-#define VM_SIZE		CONFIG_KERNEL_VM_SIZE
+#define VM_ADDR		((uintptr_t)CONFIG_KERNEL_VM_BASE)
+#define VM_SIZE		((uintptr_t)CONFIG_KERNEL_VM_SIZE)
 
 /* Define a range [PT_START, PT_END) which is the memory range
  * covered by all the page tables needed for the address space
@@ -257,7 +257,7 @@ static const struct paging_level paging_levels[] = {
 #endif /* CONFIG_X86_64 */
 
 #define INITIAL_PTABLE_PAGES \
-	(NUM_TABLE_PAGES + CONFIG_X86_EXTRA_PAGE_TABLE_PAGES)
+	(NUM_TABLE_PAGES + (uintptr_t)CONFIG_X86_EXTRA_PAGE_TABLE_PAGES)
 
 #ifdef CONFIG_X86_PAE
 /* Toplevel PDPT wasn't included as it is not a page in size */
@@ -265,7 +265,7 @@ static const struct paging_level paging_levels[] = {
 	((INITIAL_PTABLE_PAGES * CONFIG_MMU_PAGE_SIZE) + 0x20)
 #else
 #define INITIAL_PTABLE_SIZE \
-	(INITIAL_PTABLE_PAGES * CONFIG_MMU_PAGE_SIZE)
+	(INITIAL_PTABLE_PAGES * (uintptr_t)CONFIG_MMU_PAGE_SIZE)
 #endif
 
 /* "dummy" pagetables for the first-phase build. The real page tables
@@ -283,48 +283,48 @@ static __used char dummy_pagetables[INITIAL_PTABLE_SIZE];
  * the provided virtual address
  */
 __pinned_func
-static inline int get_index(void *virt, int level)
+static inline uintptr_t get_index(void *virt, unsigned int level)
 {
 	return (((uintptr_t)virt >> paging_levels[level].shift) %
 		paging_levels[level].entries);
 }
 
 __pinned_func
-static inline pentry_t *get_entry_ptr(pentry_t *ptables, void *virt, int level)
+static inline pentry_t *get_entry_ptr(pentry_t *ptables, void *virt, unsigned int level)
 {
 	return &ptables[get_index(virt, level)];
 }
 
 __pinned_func
-static inline pentry_t get_entry(pentry_t *ptables, void *virt, int level)
+static inline pentry_t get_entry(pentry_t *ptables, void *virt, unsigned int level)
 {
 	return ptables[get_index(virt, level)];
 }
 
 /* Get the physical memory address associated with this table entry */
 __pinned_func
-static inline uintptr_t get_entry_phys(pentry_t entry, int level)
+static inline uintptr_t get_entry_phys(pentry_t entry, unsigned int level)
 {
 	return entry & paging_levels[level].mask;
 }
 
 /* Return the virtual address of a linked table stored in the provided entry */
 __pinned_func
-static inline pentry_t *next_table(pentry_t entry, int level)
+static inline pentry_t *next_table(pentry_t entry, unsigned int level)
 {
 	return z_mem_virt_addr(get_entry_phys(entry, level));
 }
 
 /* Number of table entries at this level */
 __pinned_func
-static inline size_t get_num_entries(int level)
+static inline size_t get_num_entries(unsigned int level)
 {
 	return paging_levels[level].entries;
 }
 
 /* 4K for everything except PAE PDPTs */
 __pinned_func
-static inline size_t table_size(int level)
+static inline size_t table_size(unsigned int level)
 {
 	return get_num_entries(level) * sizeof(pentry_t);
 }
@@ -333,7 +333,7 @@ static inline size_t table_size(int level)
  * that an entry within the table covers
  */
 __pinned_func
-static inline size_t get_entry_scope(int level)
+static inline size_t get_entry_scope(unsigned int level)
 {
 	return (1UL << paging_levels[level].shift);
 }
@@ -342,7 +342,7 @@ static inline size_t get_entry_scope(int level)
  * that this entire table covers
  */
 __pinned_func
-static inline size_t get_table_scope(int level)
+static inline size_t get_table_scope(unsigned int level)
 {
 	return get_entry_scope(level) * get_num_entries(level);
 }
@@ -351,7 +351,7 @@ static inline size_t get_table_scope(int level)
  * stored in any other bits
  */
 __pinned_func
-static inline bool is_leaf(int level, pentry_t entry)
+static inline bool is_leaf(unsigned int level, pentry_t entry)
 {
 	if (level == PTE_LEVEL) {
 		/* Always true for PTE */
@@ -363,15 +363,15 @@ static inline bool is_leaf(int level, pentry_t entry)
 
 /* This does NOT (by design) un-flip KPTI PTEs, it's just the raw PTE value */
 __pinned_func
-static inline void pentry_get(int *paging_level, pentry_t *val,
+static inline void pentry_get(unsigned int *paging_level, pentry_t *val,
 			      pentry_t *ptables, void *virt)
 {
 	pentry_t *table = ptables;
 
-	for (int level = 0; level < NUM_LEVELS; level++) {
+	for (unsigned int level = 0; level < NUM_LEVELS; level++) {
 		pentry_t entry = get_entry(table, virt, level);
 
-		if ((entry & MMU_P) == 0 || is_leaf(level, entry)) {
+		if (((entry & MMU_P) == 0) || is_leaf(level, entry)) {
 			*val = entry;
 			if (paging_level != NULL) {
 				*paging_level = level;
@@ -398,7 +398,7 @@ static inline void tlb_flush_page(void *addr)
 __pinned_func
 static inline bool is_flipped_pte(pentry_t pte)
 {
-	return (pte & MMU_P) == 0 && (pte & PTE_ZERO) != 0;
+	return ((pte & MMU_P) == 0) && ((pte & PTE_ZERO) != 0);
 }
 #endif
 
@@ -449,6 +449,8 @@ static inline void assert_addr_aligned(uintptr_t addr)
 #if __ASSERT_ON
 	__ASSERT((addr & (CONFIG_MMU_PAGE_SIZE - 1)) == 0U,
 		 "unaligned address 0x%" PRIxPTR, addr);
+#else
+	ARG_UNUSED(addr);
 #endif
 }
 
@@ -465,6 +467,8 @@ static inline void assert_region_page_aligned(void *addr, size_t size)
 #if __ASSERT_ON
 	__ASSERT((size & (CONFIG_MMU_PAGE_SIZE - 1)) == 0U,
 		 "unaligned size %zu", size);
+#else
+	ARG_UNUSED(size);
 #endif
 }
 
@@ -477,18 +481,18 @@ static inline void assert_region_page_aligned(void *addr, size_t size)
 #define COLOR_PAGE_TABLES	1
 
 #if COLOR_PAGE_TABLES
-#define ANSI_DEFAULT "\x1B[0m"
-#define ANSI_RED     "\x1B[1;31m"
-#define ANSI_GREEN   "\x1B[1;32m"
-#define ANSI_YELLOW  "\x1B[1;33m"
-#define ANSI_BLUE    "\x1B[1;34m"
-#define ANSI_MAGENTA "\x1B[1;35m"
-#define ANSI_CYAN    "\x1B[1;36m"
-#define ANSI_GREY    "\x1B[1;90m"
+#define ANSI_DEFAULT "\x1B" "[0m"
+#define ANSI_RED     "\x1B" "[1;31m"
+#define ANSI_GREEN   "\x1B" "[1;32m"
+#define ANSI_YELLOW  "\x1B" "[1;33m"
+#define ANSI_BLUE    "\x1B" "[1;34m"
+#define ANSI_MAGENTA "\x1B" "[1;35m"
+#define ANSI_CYAN    "\x1B" "[1;36m"
+#define ANSI_GREY    "\x1B" "[1;90m"
 
 #define COLOR(x)	printk(_CONCAT(ANSI_, x))
 #else
-#define COLOR(x)	do { } while (0)
+#define COLOR(x)	do { } while (false)
 #endif
 
 __pinned_func
@@ -521,7 +525,7 @@ static char get_entry_code(pentry_t value)
 
 		if ((value & MMU_US) != 0U) {
 			/* Uppercase indicates user mode access */
-			ret = toupper(ret);
+			ret = (char)toupper((int)(unsigned char)ret);
 		}
 	}
 
@@ -529,12 +533,12 @@ static char get_entry_code(pentry_t value)
 }
 
 __pinned_func
-static void print_entries(pentry_t entries_array[], uint8_t *base, int level,
+static void print_entries(pentry_t entries_array[], uint8_t *base, unsigned int level,
 			  size_t count)
 {
 	int column = 0;
 
-	for (int i = 0; i < count; i++) {
+	for (size_t i = 0; i < count; i++) {
 		pentry_t entry = entries_array[i];
 
 		uintptr_t phys = get_entry_phys(entry, level);
@@ -546,7 +550,7 @@ static void print_entries(pentry_t entries_array[], uint8_t *base, int level,
 				if (phys == virt) {
 					/* Identity mappings */
 					COLOR(YELLOW);
-				} else if (phys + Z_MEM_VM_OFFSET == virt) {
+				} else if ((phys + Z_MEM_VM_OFFSET) == virt) {
 					/* Permanent RAM mappings */
 					COLOR(GREEN);
 				} else {
@@ -602,7 +606,7 @@ static void print_entries(pentry_t entries_array[], uint8_t *base, int level,
 }
 
 __pinned_func
-static void dump_ptables(pentry_t *table, uint8_t *base, int level)
+static void dump_ptables(pentry_t *table, uint8_t *base, unsigned int level)
 {
 	const struct paging_level *info = &paging_levels[level];
 
@@ -630,12 +634,12 @@ static void dump_ptables(pentry_t *table, uint8_t *base, int level)
 	}
 
 	/* Dump all linked child tables */
-	for (int j = 0; j < info->entries; j++) {
+	for (size_t j = 0; j < info->entries; j++) {
 		pentry_t entry = table[j];
 		pentry_t *next;
 
-		if ((entry & MMU_P) == 0U ||
-			(entry & MMU_PS) != 0U) {
+		if (((entry & MMU_P) == 0U) ||
+			((entry & MMU_PS) != 0U)) {
 			/* Not present or big page, skip */
 			continue;
 		}
@@ -672,7 +676,10 @@ SYS_INIT(dump_kernel_tables, APPLICATION, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
 __pinned_func
 static void str_append(char **buf, size_t *size, const char *str)
 {
-	int ret = snprintk(*buf, *size, "%s", str);
+	/*? snprintk has int return type, but negative values are not tested
+	 *	and not currently returned from implementation
+	 */
+	size_t ret = (size_t)snprintk(*buf, *size, "%s", str);
 
 	if (ret >= *size) {
 		/* Truncated */
@@ -685,7 +692,7 @@ static void str_append(char **buf, size_t *size, const char *str)
 }
 
 __pinned_func
-static void dump_entry(int level, void *virt, pentry_t entry)
+static void dump_entry(unsigned int level, void *virt, pentry_t entry)
 {
 	const struct paging_level *info = &paging_levels[level];
 	char buf[24] = { 0 };
@@ -697,7 +704,7 @@ static void dump_entry(int level, void *virt, pentry_t entry)
 			if ((entry & MMU_##bit) != 0U) { \
 				str_append(&pos, &sz, #bit " "); \
 			} \
-		} while (0)
+		} while (false)
 
 	DUMP_BIT(RW);
 	DUMP_BIT(US);
@@ -715,7 +722,7 @@ static void dump_entry(int level, void *virt, pentry_t entry)
 }
 
 __pinned_func
-void z_x86_pentry_get(int *paging_level, pentry_t *val, pentry_t *ptables,
+void z_x86_pentry_get(unsigned int *paging_level, pentry_t *val, pentry_t *ptables,
 		      void *virt)
 {
 	pentry_get(paging_level, val, ptables, virt);
@@ -729,7 +736,7 @@ __pinned_func
 void z_x86_dump_mmu_flags(pentry_t *ptables, void *virt)
 {
 	pentry_t entry = 0;
-	int level = 0;
+	unsigned int level = 0;
 
 	pentry_get(&level, &entry, ptables, virt);
 
@@ -775,16 +782,19 @@ static inline pentry_t reset_pte(pentry_t old_val)
  */
 __pinned_func
 static inline pentry_t pte_finalize_value(pentry_t val, bool user_table,
-					  int level)
+					  unsigned int level)
 {
 #ifdef CONFIG_X86_KPTI
 	static const uintptr_t shared_phys_addr =
 		Z_MEM_PHYS_ADDR(POINTER_TO_UINT(&z_shared_kernel_page_start));
 
-	if (user_table && (val & MMU_US) == 0 && (val & MMU_P) != 0 &&
-	    get_entry_phys(val, level) != shared_phys_addr) {
+	if (user_table && ((val & MMU_US) == 0) && ((val & MMU_P) != 0) &&
+	    (get_entry_phys(val, level) != shared_phys_addr)) {
 		val = ~val;
 	}
+#else
+	ARG_UNUSED(user_table);
+	ARG_UNUSED(level);
 #endif
 	return val;
 }
@@ -798,7 +808,7 @@ static inline pentry_t pte_finalize_value(pentry_t val, bool user_table,
 __pinned_func
 static inline pentry_t atomic_pte_get(const pentry_t *target)
 {
-	return (pentry_t)atomic_ptr_get((atomic_ptr_t *)target);
+	return (pentry_t)atomic_ptr_get((const atomic_ptr_t *)target);
 }
 
 __pinned_func
@@ -843,23 +853,23 @@ static inline bool atomic_pte_cas(pentry_t *target, pentry_t old_value,
  * page tables need nearly all pages that don't have the US bit to also
  * not be Present.
  */
-#define OPTION_USER		BIT(0)
+#define OPTION_USER		BIT32(0)
 
 /* Indicates that the operation requires TLBs to be flushed as we are altering
  * existing mappings. Not needed for establishing new mappings
  */
-#define OPTION_FLUSH		BIT(1)
+#define OPTION_FLUSH		BIT32(1)
 
 /* Indicates that each PTE's permission bits should be restored to their
  * original state when the memory was mapped. All other bits in the PTE are
  * preserved.
  */
-#define OPTION_RESET		BIT(2)
+#define OPTION_RESET		BIT32(2)
 
 /* Indicates that the mapping will need to be cleared entirely. This is
  * mainly used for unmapping the memory region.
  */
-#define OPTION_CLEAR		BIT(3)
+#define OPTION_CLEAR		BIT32(3)
 
 /**
  * Atomically update bits in a page table entry
@@ -954,12 +964,8 @@ static void page_map_set(pentry_t *ptables, void *virt, pentry_t entry_val,
 	pentry_t *table = ptables;
 	bool flush = (options & OPTION_FLUSH) != 0U;
 
-	for (int level = 0; level < NUM_LEVELS; level++) {
-		int index;
-		pentry_t *entryp;
-
-		index = get_index(virt, level);
-		entryp = &table[index];
+	for (unsigned int level = 0; level < NUM_LEVELS; level++) {
+		pentry_t *entryp = &table[get_index(virt, level)];
 
 		/* Check if we're a PTE */
 		if (level == PTE_LEVEL) {
@@ -1072,8 +1078,8 @@ __pinned_func
 static void range_map(void *virt, uintptr_t phys, size_t size,
 		      pentry_t entry_flags, pentry_t mask, uint32_t options)
 {
-	LOG_DBG("%s: %p -> %p (%zu) flags " PRI_ENTRY " mask "
-		PRI_ENTRY " opt 0x%x", __func__, (void *)phys, virt, size,
+	LOG_DBG("%s: 0x%" PRIxPTR " -> %p (%zu) flags " PRI_ENTRY " mask "
+		PRI_ENTRY " opt 0x%x", __func__, phys, virt, size,
 		entry_flags, mask, options);
 
 #ifdef CONFIG_X86_64
@@ -1178,7 +1184,7 @@ void arch_mem_map(void *virt, uintptr_t phys, size_t size, uint32_t flags)
 /* unmap region addr..addr+size, reset entries and flush TLB */
 void arch_mem_unmap(void *addr, size_t size)
 {
-	range_map_unlocked((void *)addr, 0, size, 0, 0,
+	range_map_unlocked(addr, 0, size, 0, 0,
 			   OPTION_FLUSH | OPTION_CLEAR);
 }
 
@@ -1237,7 +1243,7 @@ void z_x86_mmu_init(void)
 #endif
 }
 
-#if CONFIG_X86_STACK_PROTECTION
+#ifdef CONFIG_X86_STACK_PROTECTION
 __pinned_func
 void z_x86_set_stack_guard(k_thread_stack_t *stack)
 {
@@ -1258,9 +1264,9 @@ void z_x86_set_stack_guard(k_thread_stack_t *stack)
 __pinned_func
 static bool page_validate(pentry_t *ptables, uint8_t *addr, bool write)
 {
-	pentry_t *table = (pentry_t *)ptables;
+	pentry_t *table = ptables;
 
-	for (int level = 0; level < NUM_LEVELS; level++) {
+	for (unsigned int level = 0; level < NUM_LEVELS; level++) {
 		pentry_t entry = get_entry(table, addr, level);
 
 		if (is_leaf(level, entry)) {
@@ -1303,7 +1309,7 @@ static inline void bcb_fence(void)
 }
 
 __pinned_func
-int arch_buffer_validate(void *addr, size_t size, int write)
+int arch_buffer_validate(const void *addr, size_t size, bool write)
 {
 	pentry_t *ptables = z_x86_thread_page_tables_get(_current);
 	uint8_t *virt;
@@ -1311,7 +1317,7 @@ int arch_buffer_validate(void *addr, size_t size, int write)
 	int ret = 0;
 
 	/* addr/size arbitrary, fix this up into an aligned region */
-	k_mem_region_align((uintptr_t *)&virt, &aligned_size,
+	(void)k_mem_region_align((uintptr_t *)&virt, &aligned_size,
 			   (uintptr_t)addr, size, CONFIG_MMU_PAGE_SIZE);
 
 	for (size_t offset = 0; offset < aligned_size;
@@ -1526,9 +1532,9 @@ static void *page_pool_get(void)
 
 /* Debugging function to show how many pages are free in the pool */
 __pinned_func
-static inline unsigned int pages_free(void)
+static inline size_t pages_free(void)
 {
-	return (page_pos - page_pool) / CONFIG_MMU_PAGE_SIZE;
+	return (size_t)(page_pos - page_pool) / CONFIG_MMU_PAGE_SIZE;
 }
 
 /**
@@ -1548,11 +1554,11 @@ static inline unsigned int pages_free(void)
  * @retval -ENOMEM Insufficient page pool memory
  */
 __pinned_func
-static int copy_page_table(pentry_t *dst, pentry_t *src, int level)
+static int copy_page_table(pentry_t *dst, pentry_t *src, unsigned int level)
 {
 	if (level == PTE_LEVEL) {
 		/* Base case: leaf page table */
-		for (int i = 0; i < get_num_entries(level); i++) {
+		for (size_t i = 0; i < get_num_entries(level); i++) {
 			dst[i] = pte_finalize_value(reset_pte(src[i]), true,
 						    PTE_LEVEL);
 		}
@@ -1560,7 +1566,7 @@ static int copy_page_table(pentry_t *dst, pentry_t *src, int level)
 		/* Recursive case: allocate sub-structures as needed and
 		 * make recursive calls on them
 		 */
-		for (int i = 0; i < get_num_entries(level); i++) {
+		for (size_t i = 0; i < get_num_entries(level); i++) {
 			pentry_t *child_dst;
 			int ret;
 
@@ -1647,8 +1653,8 @@ static inline void apply_region(pentry_t *ptables, void *start,
 __pinned_func
 static void set_stack_perms(struct k_thread *thread, pentry_t *ptables)
 {
-	LOG_DBG("update stack for thread %p's ptables at %p: %p (size %zu)",
-		thread, ptables, (void *)thread->stack_info.start,
+	LOG_DBG("update stack for thread %p's ptables at %p: 0x%" PRIxPTR " (size %zu)",
+		thread, ptables, thread->stack_info.start,
 		thread->stack_info.size);
 	apply_region(ptables, (void *)thread->stack_info.start,
 		     thread->stack_info.size,
@@ -1792,8 +1798,8 @@ void arch_mem_domain_thread_add(struct k_thread *thread)
 	}
 
 	thread->arch.ptables = z_mem_phys_addr(domain->arch.ptables);
-	LOG_DBG("set thread %p page tables to %p", thread,
-		(void *)thread->arch.ptables);
+	LOG_DBG("set thread %p page tables to 0x%" PRIxPTR, thread,
+		thread->arch.ptables);
 
 	/* Check if we're doing a migration from a different memory domain
 	 * and have to remove permissions from its old domain.
@@ -1921,7 +1927,8 @@ void arch_reserved_pages_update(void)
 int arch_page_phys_get(void *virt, uintptr_t *phys)
 {
 	pentry_t pte = 0;
-	int level, ret;
+	unsigned int level;
+	int ret;
 
 	__ASSERT(POINTER_TO_UINT(virt) % CONFIG_MMU_PAGE_SIZE == 0U,
 		 "unaligned address %p to %s", virt, __func__);
@@ -1930,7 +1937,7 @@ int arch_page_phys_get(void *virt, uintptr_t *phys)
 
 	if ((pte & MMU_P) != 0) {
 		if (phys != NULL) {
-			*phys = (uintptr_t)get_entry_phys(pte, PTE_LEVEL);
+			*phys = get_entry_phys(pte, PTE_LEVEL);
 		}
 		ret = 0;
 	} else {
@@ -2053,7 +2060,7 @@ __pinned_func
 enum arch_page_location arch_page_location_get(void *addr, uintptr_t *location)
 {
 	pentry_t pte;
-	int level;
+	unsigned int level;
 
 	/* TODO: since we only have to query the current set of page tables,
 	 * could optimize this with recursive page table mapping
@@ -2080,7 +2087,7 @@ __pinned_func
 bool z_x86_kpti_is_access_ok(void *addr, pentry_t *ptables)
 {
 	pentry_t pte;
-	int level;
+	unsigned int level;
 
 	pentry_get(&level, &pte, ptables, addr);
 

arch/x86/include/x86_mmu.h

@@ -89,7 +89,7 @@ void z_x86_dump_mmu_flags(pentry_t *ptables, void *virt);
  * @param ptables Toplevel pointer to page tables
  * @param virt Virtual address to lookup
  */
-void z_x86_pentry_get(int *paging_level, pentry_t *val, pentry_t *ptables,
+void z_x86_pentry_get(unsigned int *paging_level, pentry_t *val, pentry_t *ptables,
 		      void *virt);
 
 /**
@@ -209,14 +209,16 @@ extern pentry_t z_x86_kernel_ptables[];
 static inline pentry_t *z_x86_thread_page_tables_get(struct k_thread *thread)
 {
 #if defined(CONFIG_USERSPACE) && !defined(CONFIG_X86_COMMON_PAGE_TABLE)
-	if (!IS_ENABLED(CONFIG_X86_KPTI) ||
-	    (thread->base.user_options & K_USER) != 0U) {
+	if (!(IS_ENABLED(CONFIG_X86_KPTI)) ||
+	    ((thread->base.user_options & K_USER) != 0U)) {
 		/* If KPTI is enabled, supervisor threads always use
 		 * the kernel's page tables and not the page tables associated
 		 * with their memory domain.
 		 */
 		return z_mem_virt_addr(thread->arch.ptables);
 	}
+#else
+	ARG_UNUSED(thread);
 #endif
 	return z_x86_kernel_ptables;
 }

arch/x86/zefi/efi.h

@@ -10,10 +10,10 @@
 
 #define __abi __attribute__((ms_abi))
 
-typedef uintptr_t __abi (*efi_fn1_t)(void *);
-typedef uintptr_t __abi (*efi_fn2_t)(void *, void *);
-typedef uintptr_t __abi (*efi_fn3_t)(void *, void *, void *);
-typedef uintptr_t __abi (*efi_fn4_t)(void *, void *, void *, void *);
+typedef uintptr_t __abi (*efi_fn1_t)(void *arg1);
+typedef uintptr_t __abi (*efi_fn2_t)(void *arg1, void *arg2);
+typedef uintptr_t __abi (*efi_fn3_t)(void *arg1, void *arg2, void *arg3);
+typedef uintptr_t __abi (*efi_fn4_t)(void *arg1, void *arg2, void *arg3, void *arg4);
 
 struct efi_simple_text_output {
 	efi_fn2_t Reset;

arch/x86/zefi/printf.h

@@ -5,6 +5,8 @@
  */
 #include <stdarg.h>
 #include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
 
 /* Tiny, but not-as-primitive-as-it-looks implementation of something
  * like s/n/printf().  Handles %d, %x, %p, %c and %s only, allows a
@@ -15,21 +17,21 @@
 
 struct _pfr {
 	char *buf;
-	int len;
-	int idx;
+	size_t len;
+	size_t idx;
 };
 
 /* Set this function pointer to something that generates output */
 static void (*z_putchar)(int c);
 
-static void pc(struct _pfr *r, int c)
+static void pc(struct _pfr *r, char c)
 {
-	if (r->buf) {
+	if (r->buf != NULL) {
 		if (r->idx <= r->len) {
 			r->buf[r->idx] = c;
 		}
 	} else {
-		z_putchar(c);
+		z_putchar((int)c);
 	}
 	r->idx++;
 }
@@ -41,30 +43,34 @@ static void prdec(struct _pfr *r, long v)
 		v = -v;
 	}
 
-	char digs[11 * sizeof(long)/4];
-	int i = sizeof(digs) - 1;
+	char digs[11U * sizeof(long) / 4];
+	size_t i = sizeof(digs) - 1;
 
-	digs[i--] = 0;
-	while (v || i == 9) {
-		digs[i--] = '0' + (v % 10);
+	digs[i] = '\0';
+	--i;
+	while ((v != 0) || (i == 9)) {
+		digs[i] = '0' + (v % 10);
+		--i;
 		v /= 10;
 	}
 
-	while (digs[++i]) {
+	++i;
+	while (digs[i] != '\0') {
 		pc(r, digs[i]);
+		++i;
 	}
 }
 
 static void endrec(struct _pfr *r)
 {
-	if (r->buf && r->idx < r->len) {
-		r->buf[r->idx] = 0;
+	if ((r->buf != NULL) && (r->idx < r->len)) {
+		r->buf[r->idx] = '\0';
 	}
 }
 
-static int vpf(struct _pfr *r, const char *f, va_list ap)
+static size_t vpf(struct _pfr *r, const char *f, va_list ap)
 {
-	for (/**/; *f; f++) {
+	for (/**/; *f != '\0'; f++) {
 		bool islong = false;
 
 		if (*f != '%') {
@@ -78,30 +84,32 @@ static int vpf(struct _pfr *r, const char *f, va_list ap)
 		}
 
 		/* Ignore (but accept) field width and precision values */
-		while (f[1] >= '0' && f[1] <= '9') {
+		while ((f[1] >= '0') && (f[1] <= '9')) {
 			f++;
 		}
 		if (f[1] == '.') {
 			f++;
 		}
-		while (f[1] >= '0' && f[1] <= '9') {
+		while ((f[1] >= '0') && (f[1] <= '9')) {
 			f++;
 		}
 
 		switch (*(++f)) {
-		case 0:
+		case '\0':
 			return r->idx;
 		case '%':
 			pc(r, '%');
 			break;
 		case 'c':
-			pc(r, va_arg(ap, int));
+			pc(r, (char)va_arg(ap, int));
 			break;
 		case 's': {
 			char *s = va_arg(ap, char *);
 
-			while (*s)
-				pc(r, *s++);
+			while (*s != '\0') {
+				pc(r, *s);
+				++s;
+			}
 			break;
 		}
 		case 'p':
@@ -109,15 +117,21 @@ static int vpf(struct _pfr *r, const char *f, va_list ap)
 			pc(r, 'x'); /* fall through... */
 			islong = sizeof(long) > 4;
 		case 'x': {
-			int sig = 0;
+			bool sig = false;
 			unsigned long v = islong ? va_arg(ap, unsigned long)
 				: va_arg(ap, unsigned int);
-			for (int i = 2*sizeof(long) - 1; i >= 0; i--) {
-				int d = (v >> (i*4)) & 0xf;
+			size_t i = 2 * sizeof(v);
 
-				sig += !!d;
-				if (sig || i == 0)
+			while (i > 0) {
+				--i;
+				uint8_t d = (uint8_t)((v >> (i * 4)) & 0x0f);
+
+				if (d != 0) {
+					sig = true;
+				}
+				if (sig || (i == 0)) {
 					pc(r, "0123456789abcdef"[d]);
+				}
 			}
 			break;
 		}
@@ -136,12 +150,12 @@ static int vpf(struct _pfr *r, const char *f, va_list ap)
 #define CALL_VPF(rec)				\
 	va_list ap;				\
 	va_start(ap, f);			\
-	ret = vpf(&r, f, ap);			\
+	ret = (int)vpf(&r, f, ap);			\
 	va_end(ap);
 
-static inline int snprintf(char *buf, unsigned long len, const char *f, ...)
+static inline int snprintf(char *buf, size_t len, const char *f, ...)
 {
-	int ret = 0;
+	int ret;
 	struct _pfr r = { .buf = buf, .len = len };
 
 	CALL_VPF(&r);
@@ -150,7 +164,7 @@ static inline int snprintf(char *buf, unsigned long len, const char *f, ...)
 
 static inline int sprintf(char *buf, const char *f, ...)
 {
-	int ret = 0;
+	int ret;
 	struct _pfr r = { .buf = buf, .len = 0x7fffffff };
 
 	CALL_VPF(&r);
@@ -159,7 +173,7 @@ static inline int sprintf(char *buf, const char *f, ...)
 
 static inline int printf(const char *f, ...)
 {
-	int ret = 0;
+	int ret;
 	struct _pfr r = {0};
 
 	CALL_VPF(&r);

arch/x86/zefi/zefi.c

@@ -18,7 +18,7 @@
  * stuff after.
  */
 static __attribute__((section(".runtime_data_end")))
-uint64_t runtime_data_end[1] = { 0x1111aa8888aa1111L };
+uint64_t runtime_data_end[1] = { 0x1111aa8888aa1111ULL };
 
 #define EXT_DATA_START ((void *) &runtime_data_end[1])
 
@@ -29,13 +29,14 @@ static void efi_putchar(int c)
 	static uint16_t efibuf[PUTCHAR_BUFSZ + 1];
 	static int n;
 
-	if (c == '\n') {
-		efi_putchar('\r');
+	if (c == (int)'\n') {
+		efi_putchar((int)'\r');
 	}
 
-	efibuf[n++] = c;
+	efibuf[n] = (uint16_t)c;
+	++n;
 
-	if (c == '\n' || n == PUTCHAR_BUFSZ) {
+	if ((c == (int)'\n') || (n == PUTCHAR_BUFSZ)) {
 		efibuf[n] = 0U;
 		efi->ConOut->OutputString(efi->ConOut, efibuf);
 		n = 0;
@@ -57,7 +58,7 @@ static void disable_hpet(void)
 {
 	uint64_t *hpet = (uint64_t *)0xfed00000L;
 
-	hpet[32] &= ~4;
+	hpet[32] &= ~4ULL;
 }
 
 /* FIXME: if you check the generated code, "ms_abi" calls like this
@@ -67,29 +68,31 @@ static void disable_hpet(void)
  */
 uintptr_t __abi efi_entry(void *img_handle, struct efi_system_table *sys_tab)
 {
+	(void)img_handle;
+
 	efi = sys_tab;
 	z_putchar = efi_putchar;
 	printf("*** Zephyr EFI Loader ***\n");
 
-	for (int i = 0; i < sizeof(zefi_zsegs)/sizeof(zefi_zsegs[0]); i++) {
-		int bytes = zefi_zsegs[i].sz;
+	for (size_t i = 0; i < (sizeof(zefi_zsegs)/sizeof(zefi_zsegs[0])); i++) {
+		uint32_t bytes = zefi_zsegs[i].sz;
 		uint8_t *dst = (uint8_t *)zefi_zsegs[i].addr;
 
-		printf("Zeroing %d bytes of memory at %p\n", bytes, dst);
-		for (int j = 0; j < bytes; j++) {
+		printf("Zeroing %u bytes of memory at %p\n", bytes, dst);
+		for (uint32_t j = 0; j < bytes; j++) {
 			dst[j] = 0U;
 		}
 	}
 
-	for (int i = 0; i < sizeof(zefi_dsegs)/sizeof(zefi_dsegs[0]); i++) {
-		int bytes = zefi_dsegs[i].sz;
-		int off = zefi_dsegs[i].off;
+	for (size_t i = 0; i < (sizeof(zefi_dsegs)/sizeof(zefi_dsegs[0])); i++) {
+		uint32_t bytes = zefi_dsegs[i].sz;
+		uint32_t off = zefi_dsegs[i].off;
 		uint8_t *dst = (uint8_t *)zefi_dsegs[i].addr;
 		uint8_t *src = &((uint8_t *)EXT_DATA_START)[off];
 
-		printf("Copying %d data bytes to %p from image offset %d\n",
+		printf("Copying %u data bytes to %p from image offset %u\n",
 		       bytes, dst, zefi_dsegs[i].off);
-		for (int j = 0; j < bytes; j++) {
+		for (uint32_t j = 0; j < bytes; j++) {
 			dst[j] = src[j];
 		}
 
@@ -101,7 +104,7 @@ uintptr_t __abi efi_entry(void *img_handle, struct efi_system_table *sys_tab)
 		 * starts, because the very first thing it does is
 		 * install its own page table that disallows writes.
 		 */
-		if (((long)dst & 0xfff) == 0 && dst < (uint8_t *)0x100000L) {
+		if ((((uintptr_t)dst & 0xfff) == 0) && ((uintptr_t)dst < 0x100000ULL)) {
 			for (int i = 0; i < 8; i++) {
 				dst[i] = 0x90; /* 0x90 == 1-byte NOP */
 			}
@@ -120,7 +123,7 @@ uintptr_t __abi efi_entry(void *img_handle, struct efi_system_table *sys_tab)
 	 * to drain before we start banging on the same UART from the
 	 * OS.
 	 */
-	for (volatile int i = 0; i < 50000000; i++) {
+	for (volatile int i = 0; i < 50000000; i += 1) {
 	}
 
 	__asm__ volatile("cli; jmp *%0" :: "r"(code));

boards/posix/native_posix/board_irq.h

@@ -70,14 +70,14 @@ void posix_irq_priority_set(unsigned int irq, unsigned int prio,
 	} \
 	static inline int name##_body(void)
 
-#define ARCH_ISR_DIRECT_HEADER()   do { } while (0)
-#define ARCH_ISR_DIRECT_FOOTER(a)  do { } while (0)
+#define ARCH_ISR_DIRECT_HEADER()   do { } while (false)
+#define ARCH_ISR_DIRECT_FOOTER(a)  do { } while (false)
 
 #ifdef CONFIG_PM
 extern void posix_irq_check_idle_exit(void);
 #define ARCH_ISR_DIRECT_PM() posix_irq_check_idle_exit()
 #else
-#define ARCH_ISR_DIRECT_PM() do { } while (0)
+#define ARCH_ISR_DIRECT_PM() do { } while (false)
 #endif
 
 #ifdef __cplusplus

boards/posix/nrf52_bsim/board_irq.h

@@ -70,14 +70,14 @@ void posix_irq_priority_set(unsigned int irq, unsigned int prio,
 	} \
 	static inline int name##_body(void)
 
-#define ARCH_ISR_DIRECT_HEADER()   do { } while (0)
-#define ARCH_ISR_DIRECT_FOOTER(a)  do { } while (0)
+#define ARCH_ISR_DIRECT_HEADER()   do { } while (false)
+#define ARCH_ISR_DIRECT_FOOTER(a)  do { } while (false)
 
 #ifdef CONFIG_PM
 extern void posix_irq_check_idle_exit(void);
 #define ARCH_ISR_DIRECT_PM() posix_irq_check_idle_exit()
 #else
-#define ARCH_ISR_DIRECT_PM() do { } while (0)
+#define ARCH_ISR_DIRECT_PM() do { } while (false)
 #endif
 
 #ifdef __cplusplus

doc/_static/css/custom.css

@@ -124,64 +124,27 @@ hr,
     border-color: var(--admonition-attention-title-background-color) !important;
     color: var(--admonition-attention-color) !important;
 }
-.rst-content dl:not(.docutils).class dt,
-.rst-content dl:not(.docutils).function dt,
-.rst-content dl:not(.docutils).method dt,
-.rst-content dl:not(.docutils).attribute dt {
-    width: 100% !important;
-}
-.rst-content dl:not(.docutils).class > dt,
-.rst-content dl:not(.docutils).function > dt,
-.rst-content dl:not(.docutils).method > dt,
-.rst-content dl:not(.docutils).attribute > dt {
-    font-size: 100% !important;
-    font-weight: normal !important;
-    margin-bottom: 16px !important;
-    padding: 6px 8px !important;
-}
-.rst-content dl:not(.docutils) tt.descclassname,
-.rst-content dl:not(.docutils) code.descclassname {
-    color: var(--highlight-type2-color) !important;
-    font-weight: normal !important;
-}
-.rst-content dl:not(.docutils) tt.descname,
-.rst-content dl:not(.docutils) code.descname {
-    color: var(--highlight-function-color) !important;
-    font-weight: normal !important;
-}
-.rst-content dl:not(.docutils) .sig-paren,
-.rst-content dl:not(.docutils) .optional {
-    color: var(--highlight-operator-color) !important;
-    font-weight: normal !important;
-    padding: 0 2px !important;
-}
-.rst-content dl:not(.docutils) .optional {
-    font-style: italic !important;
-}
-.rst-content dl:not(.docutils) .sig-param,
-.rst-content dl:not(.docutils).class dt > em,
-.rst-content dl:not(.docutils).function dt > em,
-.rst-content dl:not(.docutils).method dt > em {
-    color: var(--code-literal-color) !important;
+
+.rst-content dt.sig .k {
+    color: var(--highlight-keyword2-color) !important;
     font-style: normal !important;
-    padding: 0 4px !important;
 }
-.rst-content dl:not(.docutils) .sig-param,
-.rst-content dl:not(.docutils).class dt > code,
-.rst-content dl:not(.docutils).function dt > code,
-.rst-content dl:not(.docutils).method dt > code {
-    padding: 0 4px !important;
-}
-.rst-content dl:not(.docutils) .sig-param,
-.rst-content dl:not(.docutils).class dt > .optional ~ em,
-.rst-content dl:not(.docutils).function dt > .optional ~ em,
-.rst-content dl:not(.docutils).method dt > .optional ~ em {
-    color: var(--highlight-number-color) !important;
-    font-style: italic !important;
-}
-.rst-content dl:not(.docutils).class dt > em.property {
+
+.rst-content dt.sig .kt {
     color: var(--highlight-keyword-color) !important;
+    font-style: normal !important;
 }
+
+.rst-content dt.sig .sig-name .n {
+    color: var(--highlight-function-color) !important;
+}
+
+.rst-content dt.sig .k,
+.rst-content dt.sig .kt,
+.rst-content dt.sig .n {
+    font-weight: normal !important;
+}
+
 .rst-content dl:not(.docutils) dt a.headerlink {
     color: var(--link-color) !important;
 }
@@ -878,16 +841,8 @@ kbd, .kbd {
 
 /* Breathe tweaks */
 
-.rst-content dl.group>dt, .rst-content dl.group>dd>p {
-    display:none !important;
-}
-
-.rst-content dl.group {
-    margin: 0 0 1rem 0;
-}
-
-.rst-content dl.group>dd {
-    margin-left: 0 !important;
+.rst-content .section > dl > dd {
+    margin-left: 0;
 }
 
 .rst-content p.breathe-sectiondef-title {
@@ -895,24 +850,12 @@ kbd, .kbd {
     color: var(--link-color);
 }
 
-.rst-content div.breathe-sectiondef {
-    padding-left: 0 !important;
-}
-
 .rst-content dl:not(.docutils) dl:not(.rst-other-versions) dt {
     background: var(--admonition-note-background-color) !important;
     border-top: none !important;
     border-left: none !important;
 }
 
-.rst-content dl:not(.docutils).c.var .pre {
-  padding-right: 4px;
-}
-
-.rst-content dl:not(.docutils).c.struct .property {
-  padding-right: 4px !important;
-}
-
 /* Misc tweaks */
 
 .rst-columns {

drivers/adc/adc_cc32xx.c

@@ -294,7 +294,7 @@ static const struct adc_driver_api cc32xx_driver_api = {
 			    adc_cc32xx_isr_ch##chan,		       \
 			    DEVICE_DT_INST_GET(index), 0);	       \
 		irq_enable(DT_INST_IRQ_BY_IDX(index, chan, irq));      \
-	} while (0)
+	} while (false)
 
 #define cc32xx_ADC_INIT(index)							 \
 										 \

drivers/adc/adc_sam0.c

@@ -557,7 +557,7 @@ do {									\
 	adc->CALIB.reg = ADC_CALIB_BIASCOMP(comp) |			\
 			 ADC_CALIB_BIASR2R(r2r) |			\
 			 ADC_CALIB_BIASREFBUF(rbuf);			\
-} while (0)
+} while (false)
 
 #else
 
@@ -582,7 +582,7 @@ do {									\
 		      ADC_FUSES_BIASCAL_Msk) >> ADC_FUSES_BIASCAL_Pos;	\
 	adc->CALIB.reg = ADC_CALIB_BIAS_CAL(bias) |			\
 			 ADC_CALIB_LINEARITY_CAL(lin);			\
-} while (0)
+} while (false)
 
 #endif
 

drivers/can/can_handlers.c

@@ -38,14 +38,12 @@ static inline int z_vrfy_can_send(const struct device *dev,
 {
 	Z_OOPS(Z_SYSCALL_DRIVER_CAN(dev, send));
 
-	Z_OOPS(Z_SYSCALL_MEMORY_READ((const struct zcan_frame *)msg,
-				      sizeof(struct zcan_frame)));
-	Z_OOPS(Z_SYSCALL_MEMORY_READ(((struct zcan_frame *)msg)->data,
-				     sizeof((struct zcan_frame *)msg)->data));
+	Z_OOPS(Z_SYSCALL_MEMORY_READ(msg, sizeof(struct zcan_frame)));
+	Z_OOPS(Z_SYSCALL_MEMORY_READ(msg->data, sizeof(msg->data)));
 	Z_OOPS(Z_SYSCALL_VERIFY_MSG(callback_isr == 0,
 				    "callbacks may not be set from user mode"));
 
-	Z_OOPS(Z_SYSCALL_MEMORY_READ((void *)callback_arg, sizeof(void *)));
+	Z_OOPS(Z_SYSCALL_MEMORY_READ(callback_arg, sizeof(void *)));
 
 	return z_impl_can_send((const struct device *)dev,
 			       (const struct zcan_frame *)msg,
@@ -61,8 +59,7 @@ static inline int z_vrfy_can_attach_msgq(const struct device *dev,
 {
 	Z_OOPS(Z_SYSCALL_OBJ(dev, K_OBJ_DRIVER_CAN));
 
-	Z_OOPS(Z_SYSCALL_MEMORY_READ((struct zcan_filter *)filter,
-				     sizeof(struct zcan_filter)));
+	Z_OOPS(Z_SYSCALL_MEMORY_READ(filter, sizeof(struct zcan_filter)));
 	Z_OOPS(Z_SYSCALL_OBJ(msgq, K_OBJ_MSGQ));
 
 	return z_impl_can_attach_msgq((const struct device *)dev,

drivers/can/can_mcux_flexcan.c

@@ -779,7 +779,7 @@ static const struct can_driver_api mcux_flexcan_driver_api = {
 		mcux_flexcan_isr,					\
 		DEVICE_DT_INST_GET(id), 0);				\
 		irq_enable(DT_INST_IRQ_BY_NAME(id, name, irq));		\
-	} while (0)
+	} while (false)
 
 #define FLEXCAN_IRQ(id, name) \
 	COND_CODE_1(DT_INST_IRQ_HAS_NAME(id, name), \

drivers/clock_control/clock_control_lpc11u6x.c

@@ -114,7 +114,7 @@ static void pinmux_enable_sysosc(void)
 	pinmux_pin_set(pinmux_dev, pin, func);
 }
 #else
-#define pinmux_enable_sysosc() do { } while (0)
+#define pinmux_enable_sysosc() do { } while (false)
 #endif
 
 static void syscon_peripheral_reset(struct lpc11u6x_syscon_regs *syscon,

drivers/console/uart_console.c

@@ -85,10 +85,10 @@ static int console_out(int c)
 
 #endif  /* CONFIG_UART_CONSOLE_DEBUG_SERVER_HOOKS */
 
-	if ('\n' == c) {
-		uart_poll_out(uart_console_dev, '\r');
+	if ((int)'\n' == c) {
+		uart_poll_out(uart_console_dev, (unsigned char)'\r');
 	}
-	uart_poll_out(uart_console_dev, c);
+	uart_poll_out(uart_console_dev, (unsigned char)c);
 
 	return c;
 }
@@ -96,7 +96,7 @@ static int console_out(int c)
 #endif
 
 #if defined(CONFIG_STDOUT_CONSOLE)
-extern void __stdout_hook_install(int (*hook)(int));
+extern void __stdout_hook_install(int (*hook)(int c));
 #else
 #define __stdout_hook_install(x) \
 	do {    /* nothing */	 \
@@ -104,7 +104,7 @@ extern void __stdout_hook_install(int (*hook)(int));
 #endif
 
 #if defined(CONFIG_PRINTK)
-extern void __printk_hook_install(int (*fn)(int));
+extern void __printk_hook_install(int (*fn)(int c));
 #else
 #define __printk_hook_install(x) \
 	do {    /* nothing */	 \

drivers/dma/dma_sam0.c

@@ -402,7 +402,7 @@ static int dma_sam0_get_status(const struct device *dev, uint32_t channel,
 			    DT_INST_IRQ_BY_IDX(0, n, priority),		 \
 			    dma_sam0_isr, DEVICE_DT_INST_GET(0), 0);	 \
 		irq_enable(DT_INST_IRQ_BY_IDX(0, n, irq));		 \
-	} while (0)
+	} while (false)
 
 static int dma_sam0_init(const struct device *dev)
 {

drivers/dma/dma_stm32.c

@@ -696,7 +696,7 @@ DEVICE_DT_INST_DEFINE(index,						\
 			    dma_stm32_shared_irq_handler,		\
 			    DEVICE_DT_INST_GET(dma), 0);		\
 		irq_enable(DT_INST_IRQ_BY_IDX(dma, chan, irq));		\
-	} while (0)
+	} while (false)
 
 
 #else /* CONFIG_DMA_STM32_SHARED_IRQS */
@@ -715,7 +715,7 @@ static void dma_stm32_irq_##dma##_##chan(const struct device *dev)	\
 			    dma_stm32_irq_##dma##_##chan,		\
 			    DEVICE_DT_INST_GET(dma), 0);		\
 		irq_enable(DT_INST_IRQ_BY_IDX(dma, chan, irq));		\
-	} while (0)
+	} while (false)
 
 #endif /* CONFIG_DMA_STM32_SHARED_IRQS */
 

drivers/ethernet/eth_e1000_priv.h

@@ -98,7 +98,7 @@ static const char *e1000_reg_to_string(enum e1000_reg_t r)
 #define iow32(_dev, _reg, _val) do {					\
 	LOG_DBG("iow32 %s 0x%08x", e1000_reg_to_string(_reg), (_val)); 	\
 	sys_write32(_val, (_dev)->address + (_reg));			\
-} while (0)
+} while (false)
 
 #define ior32(_dev, _reg)						\
 ({									\

drivers/ethernet/eth_mcux.c

@@ -1234,7 +1234,7 @@ static void eth_mcux_err_isr(const struct device *dev)
 			    DEVICE_DT_INST_GET(n),			\
 			    0);						\
 		irq_enable(DT_INST_IRQ_BY_NAME(n, name, irq));		\
-	} while (0)
+	} while (false)
 
 #define ETH_MCUX_IRQ(n, name)						\
 	COND_CODE_1(DT_INST_IRQ_HAS_NAME(n, name),			\
@@ -1252,7 +1252,7 @@ static void eth_mcux_err_isr(const struct device *dev)
 			    DEVICE_DT_INST_GET(n),					\
 			    0);								\
 		irq_enable(DT_IRQ_BY_NAME(PTP_INST_NODEID(n), ieee1588_tmr, irq));	\
-	} while (0)
+	} while (false)
 
 #define ETH_MCUX_IRQ_PTP(n)						\
 	COND_CODE_1(DT_NODE_HAS_STATUS(PTP_INST_NODEID(n), okay),	\

drivers/flash/flash_simulator.c

@@ -69,7 +69,7 @@
 		if (U < STATS_PAGE_COUNT_THRESHOLD) {			     \
 			(*(&flash_sim_stats.erase_cycles_unit0 + (U)) += 1); \
 		}							     \
-	} while (0)
+	} while (false)
 
 #if (CONFIG_FLASH_SIMULATOR_STAT_PAGE_COUNT > STATS_PAGE_COUNT_THRESHOLD)
        /* Limitation above is caused by used UTIL_REPEAT                    */
@@ -135,7 +135,7 @@ STATS_NAME_END(flash_sim_thresholds);
 
 #else
 
-#define ERASE_CYCLES_INC(U) do {} while (0)
+#define ERASE_CYCLES_INC(U) do {} while (false)
 #define FLASH_SIM_STATS_INC(group__, var__)
 #define FLASH_SIM_STATS_INCN(group__, var__, n__)
 #define FLASH_SIM_STATS_INIT_AND_REG(group__, size__, name__)

drivers/gpio/gpio_litex.c

@@ -284,7 +284,7 @@ static const struct gpio_driver_api gpio_litex_driver_api = {
 			    DEVICE_DT_INST_GET(n), 0); \
 \
 		irq_enable(DT_INST_IRQN(n)); \
-	} while (0)
+	} while (false)
 
 #define GPIO_LITEX_INIT(n) \
 	static int gpio_litex_port_init_##n(const struct device *dev); \

drivers/gpio/gpio_lpc11u6x.c

@@ -511,7 +511,7 @@ do {							                \
 		    DT_INST_IRQ_BY_IDX(0, n, priority),			\
 		    gpio_lpc11u6x_isr, &gpio_lpc11u6x_shared, 0);	\
 	irq_enable(DT_INST_IRQ_BY_IDX(0, n, irq));			\
-} while (0)
+} while (false)
 
 static int gpio_lpc11u6x_init(const struct device *dev)
 {

drivers/gpio/gpio_mcux.c

@@ -264,7 +264,7 @@ static const struct gpio_driver_api gpio_mcux_driver_api = {
 			    DEVICE_DT_INST_GET(n), 0);			\
 									\
 		irq_enable(DT_INST_IRQN(n));				\
-	} while (0)
+	} while (false)
 
 #define GPIO_PORT_BASE_ADDR(n) DT_REG_ADDR(DT_INST_PHANDLE(n, nxp_kinetis_port))
 

drivers/gpio/gpio_mcux_igpio.c

@@ -209,7 +209,7 @@ static const struct gpio_driver_api mcux_igpio_driver_api = {
 			    DEVICE_DT_INST_GET(n), 0);			\
 									\
 		irq_enable(DT_INST_IRQ_BY_IDX(n, i, irq));		\
-	} while (0)
+	} while (false)
 
 #define MCUX_IGPIO_INIT(n)						\
 	static int mcux_igpio_##n##_init(const struct device *dev);	\

drivers/gpio/gpio_mcux_lpc.c

@@ -370,7 +370,7 @@ static const clock_ip_name_t gpio_clock_names[] = GPIO_CLOCKS;
 			    gpio_mcux_lpc_port_isr, DEVICE_DT_INST_GET(n), 0);		\
 		irq_enable(DT_INST_IRQ_BY_IDX(n, m, irq));				\
 		data->isr_list[data->isr_list_idx++] = DT_INST_IRQ_BY_IDX(n, m, irq);	\
-	} while (0)
+	} while (false)
 
 #define GPIO_MCUX_LPC_IRQ(n, m)								\
 	COND_CODE_1(DT_INST_IRQ_HAS_IDX(n, m), (GPIO_MCUX_LPC_IRQ_CONNECT(n, m)), ())

drivers/gpio/gpio_sam4l.c

@@ -248,7 +248,7 @@ int gpio_sam_init(const struct device *dev)
 			    gpio_sam_isr,				\
 			    DEVICE_DT_INST_GET(n), 0);			\
 		irq_enable(DT_INST_IRQ_BY_IDX(n, m, irq));		\
-	} while (0)
+	} while (false)
 
 #define GPIO_SAM_INIT(n)						\
 	static void port_##n##_sam_config_func(const struct device *dev);\

drivers/i2c/i2c_ll_stm32.c

@@ -276,7 +276,7 @@ static int i2c_stm32_init(const struct device *dev)
 			    stm32_i2c_combined_isr,			\
 			    DEVICE_DT_GET(DT_NODELABEL(name)), 0);	\
 		irq_enable(DT_IRQN(DT_NODELABEL(name)));		\
-	} while (0)
+	} while (false)
 #else
 #define STM32_I2C_IRQ_CONNECT_AND_ENABLE(name)				\
 	do {								\
@@ -293,7 +293,7 @@ static int i2c_stm32_init(const struct device *dev)
 			    stm32_i2c_error_isr,			\
 			    DEVICE_DT_GET(DT_NODELABEL(name)), 0);	\
 		irq_enable(DT_IRQ_BY_NAME(DT_NODELABEL(name), error, irq));\
-	} while (0)
+	} while (false)
 #endif /* CONFIG_I2C_STM32_COMBINED_INTERRUPT */
 
 #define STM32_I2C_IRQ_HANDLER_DECL(name)				\

drivers/i2c/i2c_sam0.c

@@ -761,7 +761,7 @@ static const struct i2c_driver_api i2c_sam0_driver_api = {
 			    i2c_sam0_isr,				\
 			    DEVICE_DT_INST_GET(n), 0);			\
 		irq_enable(DT_INST_IRQ_BY_IDX(n, m, irq));		\
-	} while (0)
+	} while (false)
 
 #if DT_INST_IRQ_HAS_IDX(0, 3)
 #define I2C_SAM0_IRQ_HANDLER(n)						\

drivers/i2c/i2c_shell.c

@@ -32,7 +32,8 @@ LOG_MODULE_REGISTER(i2c_shell, CONFIG_LOG_DEFAULT_LEVEL);
  *
  * https://manpages.debian.org/buster/i2c-tools/i2cdetect.8.en.html
  */
-static int cmd_i2c_scan(const struct shell *shell,
+/* i2c scan <device> */
+static int cmd_i2c_scan(const struct shell *shell_ctx,
 			size_t argc, char **argv)
 {
 	const struct device *dev;
@@ -41,18 +42,18 @@ static int cmd_i2c_scan(const struct shell *shell,
 	dev = device_get_binding(argv[1]);
 
 	if (!dev) {
-		shell_error(shell, "I2C: Device driver %s not found.",
+		shell_error(shell_ctx, "I2C: Device driver %s not found.",
 			    argv[1]);
 		return -ENODEV;
 	}
 
-	shell_print(shell,
+	shell_print(shell_ctx,
 		    "     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f");
 	for (uint8_t i = 0; i <= last; i += 16) {
-		shell_fprintf(shell, SHELL_NORMAL, "%02x: ", i);
+		shell_fprintf(shell_ctx, SHELL_NORMAL, "%02x: ", i);
 		for (uint8_t j = 0; j < 16; j++) {
 			if (i + j < first || i + j > last) {
-				shell_fprintf(shell, SHELL_NORMAL, "   ");
+				shell_fprintf(shell_ctx, SHELL_NORMAL, "   ");
 				continue;
 			}
 
@@ -64,23 +65,24 @@ static int cmd_i2c_scan(const struct shell *shell,
 			msgs[0].len = 0U;
 			msgs[0].flags = I2C_MSG_WRITE | I2C_MSG_STOP;
 			if (i2c_transfer(dev, &msgs[0], 1, i + j) == 0) {
-				shell_fprintf(shell, SHELL_NORMAL,
+				shell_fprintf(shell_ctx, SHELL_NORMAL,
 					      "%02x ", i + j);
 				++cnt;
 			} else {
-				shell_fprintf(shell, SHELL_NORMAL, "-- ");
+				shell_fprintf(shell_ctx, SHELL_NORMAL, "-- ");
 			}
 		}
-		shell_print(shell, "");
+		shell_print(shell_ctx, "");
 	}
 
-	shell_print(shell, "%u devices found on %s",
+	shell_print(shell_ctx, "%u devices found on %s",
 		    cnt, argv[1]);
 
 	return 0;
 }
 
-static int cmd_i2c_recover(const struct shell *shell,
+/* i2c recover <device> */
+static int cmd_i2c_recover(const struct shell *shell_ctx,
 			   size_t argc, char **argv)
 {
 	const struct device *dev;
@@ -88,21 +90,22 @@ static int cmd_i2c_recover(const struct shell *shell,
 
 	dev = device_get_binding(argv[1]);
 	if (!dev) {
-		shell_error(shell, "I2C: Device driver %s not found.", argv[1]);
+		shell_error(shell_ctx, "I2C: Device driver %s not found.", argv[1]);
 		return -ENODEV;
 	}
 
 	err = i2c_recover_bus(dev);
 	if (err) {
-		shell_error(shell, "I2C: Bus recovery failed (err %d)", err);
+		shell_error(shell_ctx, "I2C: Bus recovery failed (err %d)", err);
 		return err;
 	}
 
 	return 0;
 }
 
-/* i2c write <device> <dev_addr> [<byte1>, ...] */
-static int cmd_i2c_write(const struct shell *shell, size_t argc, char **argv)
+/* i2c write <device> <dev_addr> <reg_addr> [<byte1>, ...] */
+static int cmd_i2c_write(const struct shell *shell_ctx,
+			 size_t argc, char **argv)
 {
 	uint8_t buf[MAX_I2C_BYTES];
 	const struct device *dev;
@@ -113,7 +116,7 @@ static int cmd_i2c_write(const struct shell *shell, size_t argc, char **argv)
 
 	dev = device_get_binding(argv[1]);
 	if (!dev) {
-		shell_error(shell, "I2C: Device driver %s not found.", argv[1]);
+		shell_error(shell_ctx, "I2C: Device driver %s not found.", argv[1]);
 		return -ENODEV;
 	}
 
@@ -131,14 +134,15 @@ static int cmd_i2c_write(const struct shell *shell, size_t argc, char **argv)
 	}
 
 	if (i2c_burst_write(dev, dev_addr, reg_addr, buf, num_bytes) < 0) {
-		shell_error(shell, "Failed to write to device: %s", argv[1]);
+		shell_error(shell_ctx, "Failed to write to device: %s", argv[1]);
 		return -EIO;
 	}
 
 	return 0;
 }
 
-static int cmd_i2c_write_byte(const struct shell *shell,
+/* i2c write_byte <device> <dev_addr> <reg_addr> <value> */
+static int cmd_i2c_write_byte(const struct shell *shell_ctx,
 			      size_t argc, char **argv)
 {
 	const struct device *dev;
@@ -148,7 +152,7 @@ static int cmd_i2c_write_byte(const struct shell *shell,
 
 	dev = device_get_binding(argv[1]);
 	if (!dev) {
-		shell_error(shell, "I2C: Device driver %s not found.",
+		shell_error(shell_ctx, "I2C: Device driver %s not found.",
 			    argv[1]);
 		return -ENODEV;
 	}
@@ -158,14 +162,16 @@ static int cmd_i2c_write_byte(const struct shell *shell,
 	out_byte = strtol(argv[4], NULL, 16);
 
 	if (i2c_reg_write_byte(dev, dev_addr, reg_addr, out_byte) < 0) {
-		shell_error(shell, "Failed to write to device: %s", argv[1]);
+		shell_error(shell_ctx, "Failed to write to device: %s",
+			    argv[1]);
 		return -EIO;
 	}
 
 	return 0;
 }
 
-static int cmd_i2c_read_byte(const struct shell *shell,
+/* i2c read_byte <device> <dev_addr> <reg_addr> */
+static int cmd_i2c_read_byte(const struct shell *shell_ctx,
 			     size_t argc, char **argv)
 {
 	const struct device *dev;
@@ -175,7 +181,7 @@ static int cmd_i2c_read_byte(const struct shell *shell,
 
 	dev = device_get_binding(argv[1]);
 	if (!dev) {
-		shell_error(shell, "I2C: Device driver %s not found.",
+		shell_error(shell_ctx, "I2C: Device driver %s not found.",
 			    argv[1]);
 		return -ENODEV;
 	}
@@ -184,17 +190,19 @@ static int cmd_i2c_read_byte(const struct shell *shell,
 	reg_addr = strtol(argv[3], NULL, 16);
 
 	if (i2c_reg_read_byte(dev, dev_addr, reg_addr, &out) < 0) {
-		shell_error(shell, "Failed to read from device: %s", argv[1]);
+		shell_error(shell_ctx, "Failed to read from device: %s",
+			    argv[1]);
 		return -EIO;
 	}
 
-	shell_print(shell, "Output: 0x%x", out);
+	shell_print(shell_ctx, "Output: 0x%x", out);
 
 	return 0;
 }
 
-/* i2c read <device> <dev_addr> [<numbytes>] */
-static int cmd_i2c_read(const struct shell *shell, size_t argc, char **argv)
+/* i2c read <device> <dev_addr> <reg_addr> [<numbytes>] */
+static int cmd_i2c_read(const struct shell *shell_ctx,
+			size_t argc, char **argv)
 {
 	uint8_t buf[MAX_I2C_BYTES];
 	const struct device *dev;
@@ -204,7 +212,8 @@ static int cmd_i2c_read(const struct shell *shell, size_t argc, char **argv)
 
 	dev = device_get_binding(argv[1]);
 	if (!dev) {
-		shell_error(shell, "I2C: Device driver %s not found.", argv[1]);
+		shell_error(shell_ctx, "I2C: Device driver %s not found.",
+			    argv[1]);
 		return -ENODEV;
 	}
 
@@ -219,11 +228,12 @@ static int cmd_i2c_read(const struct shell *shell, size_t argc, char **argv)
 	}
 
 	if (i2c_burst_read(dev, dev_addr, reg_addr, buf, num_bytes) < 0) {
-		shell_error(shell, "Failed to read from device: %s", argv[1]);
+		shell_error(shell_ctx, "Failed to read from device: %s",
+			    argv[1]);
 		return -EIO;
 	}
 
-	shell_hexdump(shell, buf, num_bytes);
+	shell_hexdump(shell_ctx, buf, num_bytes);
 
 	return 0;
 }

drivers/ieee802154/ieee802154_kw41z.c

@@ -68,7 +68,7 @@ int kw41_dbg_idx;
 		if (++kw41_dbg_idx == KW41_DBG_TRACE_SIZE) { \
 			kw41_dbg_idx = 0; \
 		} \
-	} while (0)
+	} while (false)
 
 #else
 

drivers/interrupt_controller/intc_esp32.c

@@ -41,7 +41,7 @@ LOG_MODULE_REGISTER(esp32_intc, CONFIG_LOG_DEFAULT_LEVEL);
 #ifdef CONFIG_INTC_ESP32_DECISIONS_LOG
 # define INTC_LOG(...) LOG_INF(__VA_ARGS__)
 #else
-# define INTC_LOG(...) do {} while (0)
+# define INTC_LOG(...) do {} while (false)
 #endif
 
 /* Typedef for C-callable interrupt handler function */

drivers/interrupt_controller/intc_ioapic.c

@@ -83,7 +83,7 @@ DEVICE_MMIO_TOPLEVEL_STATIC(ioapic_regs, DT_DRV_INST(0));
  * In either case, regardless how many CPUs in the system, 0xff implies that
  * it's intended to deliver to all possible 8 local APICs.
  */
-#define DEFAULT_RTE_DEST	(0xFF << 24)
+#define DEFAULT_RTE_DEST	(0xFFUL << 24)
 
 static __pinned_bss uint32_t ioapic_rtes;
 
@@ -107,8 +107,8 @@ __pinned_bss
 uint32_t ioapic_suspend_buf[SUSPEND_BITS_REQD / 32] = {0};
 #endif
 
-static uint32_t __IoApicGet(int32_t offset);
-static void __IoApicSet(int32_t offset, uint32_t value);
+static uint32_t __IoApicGet(uint32_t offset);
+static void __IoApicSet(uint32_t offset, uint32_t value);
 static void ioApicRedSetHi(unsigned int irq, uint32_t upper32);
 static void ioApicRedSetLo(unsigned int irq, uint32_t lower32);
 static uint32_t ioApicRedGetLo(unsigned int irq);
@@ -141,7 +141,7 @@ int ioapic_init(const struct device *unused)
 			IOAPIC_MRE_MASK) >> IOAPIC_MRE_POS) + 1;
 
 #ifdef CONFIG_IOAPIC_MASK_RTE
-	int32_t ix;	/* redirection table index */
+	uint32_t ix;	/* redirection table index */
 	uint32_t rteValue; /* value to copy into redirection table entry */
 
 	rteValue = IOAPIC_EDGE | IOAPIC_HIGH | IOAPIC_FIXED | IOAPIC_INT_MASK |
@@ -380,7 +380,7 @@ void z_ioapic_int_vec_set(unsigned int irq, unsigned int vector)
  * @return register value
  */
 __pinned_func
-static uint32_t __IoApicGet(int32_t offset)
+static uint32_t __IoApicGet(uint32_t offset)
 {
 	uint32_t value; /* value */
 	unsigned int key;	/* interrupt lock level */
@@ -389,7 +389,7 @@ static uint32_t __IoApicGet(int32_t offset)
 
 	key = irq_lock();
 
-	*((volatile uint32_t *) (IOAPIC_REG + IOAPIC_IND)) = (char)offset;
+	*((volatile uint32_t *) (IOAPIC_REG + IOAPIC_IND)) = (uint8_t)offset;
 	value = *((volatile uint32_t *)(IOAPIC_REG + IOAPIC_DATA));
 
 	irq_unlock(key);
@@ -408,7 +408,7 @@ static uint32_t __IoApicGet(int32_t offset)
  * @return N/A
  */
 __pinned_func
-static void __IoApicSet(int32_t offset, uint32_t value)
+static void __IoApicSet(uint32_t offset, uint32_t value)
 {
 	unsigned int key; /* interrupt lock level */
 
@@ -416,7 +416,7 @@ static void __IoApicSet(int32_t offset, uint32_t value)
 
 	key = irq_lock();
 
-	*(volatile uint32_t *)(IOAPIC_REG + IOAPIC_IND) = (char)offset;
+	*(volatile uint32_t *)(IOAPIC_REG + IOAPIC_IND) = (uint8_t)offset;
 	*((volatile uint32_t *)(IOAPIC_REG + IOAPIC_DATA)) = value;
 
 	irq_unlock(key);
@@ -434,7 +434,7 @@ static void __IoApicSet(int32_t offset, uint32_t value)
 __pinned_func
 static uint32_t ioApicRedGetLo(unsigned int irq)
 {
-	int32_t offset = IOAPIC_REDTBL + (irq << 1); /* register offset */
+	uint32_t offset = IOAPIC_REDTBL + (irq << 1); /* register offset */
 
 	return __IoApicGet(offset);
 }
@@ -452,7 +452,7 @@ static uint32_t ioApicRedGetLo(unsigned int irq)
 __pinned_func
 static void ioApicRedSetLo(unsigned int irq, uint32_t lower32)
 {
-	int32_t offset = IOAPIC_REDTBL + (irq << 1); /* register offset */
+	uint32_t offset = IOAPIC_REDTBL + (irq << 1); /* register offset */
 
 	__IoApicSet(offset, lower32);
 }
@@ -470,7 +470,7 @@ static void ioApicRedSetLo(unsigned int irq, uint32_t lower32)
 __pinned_func
 static void ioApicRedSetHi(unsigned int irq, uint32_t upper32)
 {
-	int32_t offset = IOAPIC_REDTBL + (irq << 1) + 1; /* register offset */
+	uint32_t offset = IOAPIC_REDTBL + (irq << 1) + 1; /* register offset */
 
 	__IoApicSet(offset, upper32);
 }

drivers/interrupt_controller/intc_ioapic_priv.h

@@ -12,10 +12,10 @@
 
 /* IO APIC direct register offsets */
 
-#define IOAPIC_IND 0x00   /* Index Register */
-#define IOAPIC_DATA 0x10  /* IO window (data) - pc.h */
-#define IOAPIC_IRQPA 0x20 /* IRQ Pin Assertion Register */
-#define IOAPIC_EOI 0x40   /* EOI Register */
+#define IOAPIC_IND 0x00U   /* Index Register */
+#define IOAPIC_DATA 0x10U  /* IO window (data) - pc.h */
+#define IOAPIC_IRQPA 0x20U /* IRQ Pin Assertion Register */
+#define IOAPIC_EOI 0x40U   /* EOI Register */
 
 /* IO APIC indirect register offset */
 
@@ -32,17 +32,17 @@
 
 /* Version register bits */
 
-#define IOAPIC_MRE_MASK 0x00ff0000 /* Max Red. entry mask */
+#define IOAPIC_MRE_MASK 0x00ff0000U /* Max Red. entry mask */
 #define IOAPIC_MRE_POS 16
-#define IOAPIC_PRQ 0x00008000      /* this has IRQ reg */
-#define IOAPIC_VERSION 0x000000ff  /* version number */
+#define IOAPIC_PRQ 0x00008000U      /* this has IRQ reg */
+#define IOAPIC_VERSION 0x000000ffU  /* version number */
 
 /* Redirection table entry bits: upper 32 bit */
 
-#define IOAPIC_DESTINATION 0xff000000
+#define IOAPIC_DESTINATION 0xff000000U
 
 /* Redirection table entry bits: lower 32 bit */
 
-#define IOAPIC_VEC_MASK 0x000000ff
+#define IOAPIC_VEC_MASK 0x000000ffU
 
 #endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_IOAPIC_PRIV_H_ */

drivers/interrupt_controller/intc_loapic.c

@@ -24,8 +24,8 @@
 
 /* Local APIC Version Register Bits */
 
-#define LOAPIC_VERSION_MASK 0x000000ff /* LO APIC Version mask */
-#define LOAPIC_MAXLVT_MASK 0x00ff0000  /* LO APIC Max LVT mask */
+#define LOAPIC_VERSION_MASK 0x000000ffU /* LO APIC Version mask */
+#define LOAPIC_MAXLVT_MASK 0x00ff0000U  /* LO APIC Max LVT mask */
 #define LOAPIC_PENTIUM4 0x00000014     /* LO APIC in Pentium4 */
 #define LOAPIC_LVT_PENTIUM4 5	  /* LO APIC LVT - Pentium4 */
 #define LOAPIC_LVT_P6 4		       /* LO APIC LVT - P6 */
@@ -33,24 +33,24 @@
 
 /* Local APIC Vector Table Bits */
 
-#define LOAPIC_VECTOR 0x000000ff /* vectorNo */
-#define LOAPIC_MODE 0x00000700   /* delivery mode */
-#define LOAPIC_FIXED 0x00000000  /* delivery mode: FIXED */
-#define LOAPIC_SMI 0x00000200    /* delivery mode: SMI */
-#define LOAPIC_NMI 0x00000400    /* delivery mode: NMI */
-#define LOAPIC_EXT 0x00000700    /* delivery mode: ExtINT */
-#define LOAPIC_IDLE 0x00000000   /* delivery status: Idle */
-#define LOAPIC_PEND 0x00001000   /* delivery status: Pend */
-#define LOAPIC_HIGH 0x00000000   /* polarity: High */
-#define LOAPIC_LOW 0x00002000    /* polarity: Low */
-#define LOAPIC_REMOTE 0x00004000 /* remote IRR */
-#define LOAPIC_EDGE 0x00000000   /* trigger mode: Edge */
-#define LOAPIC_LEVEL 0x00008000  /* trigger mode: Level */
+#define LOAPIC_VECTOR 0x000000ffU /* vectorNo */
+#define LOAPIC_MODE 0x00000700U   /* delivery mode */
+#define LOAPIC_FIXED 0x00000000U  /* delivery mode: FIXED */
+#define LOAPIC_SMI 0x00000200U    /* delivery mode: SMI */
+#define LOAPIC_NMI 0x00000400U    /* delivery mode: NMI */
+#define LOAPIC_EXT 0x00000700U    /* delivery mode: ExtINT */
+#define LOAPIC_IDLE 0x00000000U   /* delivery status: Idle */
+#define LOAPIC_PEND 0x00001000U   /* delivery status: Pend */
+#define LOAPIC_HIGH 0x00000000U   /* polarity: High */
+#define LOAPIC_LOW 0x00002000U    /* polarity: Low */
+#define LOAPIC_REMOTE 0x00004000U /* remote IRR */
+#define LOAPIC_EDGE 0x00000000U   /* trigger mode: Edge */
+#define LOAPIC_LEVEL 0x00008000U  /* trigger mode: Level */
 
 /* Local APIC Spurious-Interrupt Register Bits */
 
-#define LOAPIC_ENABLE 0x100	/* APIC Enabled */
-#define LOAPIC_FOCUS_DISABLE 0x200 /* Focus Processor Checking */
+#define LOAPIC_ENABLE 0x100U	/* APIC Enabled */
+#define LOAPIC_FOCUS_DISABLE 0x200U /* Focus Processor Checking */
 
 #if CONFIG_LOAPIC_SPURIOUS_VECTOR_ID == -1
 #define LOAPIC_SPURIOUS_VECTOR_ID (CONFIG_IDT_NUM_VECTORS - 1)
@@ -85,7 +85,7 @@ void send_eoi(void)
 __pinned_func
 void z_loapic_enable(unsigned char cpu_number)
 {
-	int32_t loApicMaxLvt; /* local APIC Max LVT */
+	uint32_t loApicMaxLvt; /* local APIC Max LVT */
 
 #ifdef DEVICE_MMIO_IS_IN_RAM
 	device_map(&z_loapic_regs, CONFIG_LOAPIC_BASE_ADDRESS, 0x1000,
@@ -328,15 +328,17 @@ void z_loapic_irq_disable(unsigned int irq)
 __pinned_func
 int z_irq_controller_isr_vector_get(void)
 {
-	int pReg, block;
+	uint32_t pReg;
 
 	/* Block 0 bits never lit up as these are all exception or reserved
 	 * vectors
 	 */
-	for (block = 7; likely(block > 0); block--) {
-		pReg = x86_read_loapic(LOAPIC_ISR + (block * 0x10));
-		if (pReg) {
-			return (block * 32) + (find_msb_set(pReg) - 1);
+	for (unsigned int block = 7; likely(block > 0); block--) {
+		pReg = x86_read_loapic(LOAPIC_ISR + (block * 0x10U));
+		if (pReg != 0) {
+			const unsigned int uvector = (block * 32) + (find_msb_set(pReg) - 1);
+
+			return (int)uvector;
 		}
 
 	}

drivers/interrupt_controller/intc_sam0_eic.c

@@ -332,7 +332,7 @@ uint32_t sam0_eic_interrupt_pending(int port)
 			    DT_INST_IRQ_BY_IDX(0, n, priority),		\
 			    sam0_eic_isr, DEVICE_DT_INST_GET(0), 0);	\
 		irq_enable(DT_INST_IRQ_BY_IDX(0, n, irq));		\
-	} while (0)
+	} while (false)
 
 static int sam0_eic_init(const struct device *dev)
 {

drivers/interrupt_controller/intc_system_apic.c

@@ -19,7 +19,7 @@
 #include <irq.h>
 #include <linker/sections.h>
 
-#define IS_IOAPIC_IRQ(irq)  (irq < z_loapic_irq_base())
+#define IS_IOAPIC_IRQ(irq)  ((irq) < z_loapic_irq_base())
 #define HARDWARE_IRQ_LIMIT ((z_loapic_irq_base() + LOAPIC_IRQ_COUNT) - 1)
 
 /**

drivers/led_strip/ws2812_gpio.c

@@ -89,7 +89,7 @@ static const struct ws2812_gpio_cfg *dev_cfg(const struct device *dev)
 			DELAY_TxL			\
 			::				\
 			[r] "l" (base),		\
-			[p] "l" (pin)); } while (0)
+			[p] "l" (pin)); } while (false)
 
 /* Send out a 0 bit's pulse */
 #define ZERO_BIT(base, pin) do {			\
@@ -99,7 +99,7 @@ static const struct ws2812_gpio_cfg *dev_cfg(const struct device *dev)
 			DELAY_TxL			\
 			::				\
 			[r] "l" (base),		\
-			[p] "l" (pin)); } while (0)
+			[p] "l" (pin)); } while (false)
 
 static int send_buf(const struct device *dev, uint8_t *buf, size_t len)
 {

drivers/modem/hl7800.c

@@ -360,7 +360,7 @@ static const char TIME_STRING_FORMAT[] = "\"yy/MM/dd,hh:mm:ss?zz\"";
 			LOG_ERR("%s result:%d", (c), ret);                     \
 			goto error;                                            \
 		}                                                              \
-	} while (0)
+	} while (false)
 
 #define SEND_AT_CMD_IGNORE_ERROR(c)                                            \
 	do {                                                                   \
@@ -368,7 +368,7 @@ static const char TIME_STRING_FORMAT[] = "\"yy/MM/dd,hh:mm:ss?zz\"";
 		if (ret < 0) {                                                 \
 			LOG_ERR("%s result:%d", (c), ret);                     \
 		}                                                              \
-	} while (0)
+	} while (false)
 
 #define SEND_AT_CMD_EXPECT_OK(c)                                               \
 	do {                                                                   \
@@ -378,7 +378,7 @@ static const char TIME_STRING_FORMAT[] = "\"yy/MM/dd,hh:mm:ss?zz\"";
 			LOG_ERR("%s result:%d", (c), ret);                     \
 			goto error;                                            \
 		}                                                              \
-	} while (0)
+	} while (false)
 
 /* Complex has "no_id_resp" set to true because the sending command
  * is the command used to process the respone
@@ -391,7 +391,7 @@ static const char TIME_STRING_FORMAT[] = "\"yy/MM/dd,hh:mm:ss?zz\"";
 			LOG_ERR("%s result:%d", (c), ret);                     \
 			goto error;                                            \
 		}                                                              \
-	} while (0)
+	} while (false)
 
 NET_BUF_POOL_DEFINE(mdm_recv_pool, CONFIG_MODEM_HL7800_RECV_BUF_CNT,
 		    CONFIG_MODEM_HL7800_RECV_BUF_SIZE, 0, NULL);
@@ -2784,7 +2784,7 @@ static bool on_cmd_polte_registration(struct net_buf **buf, uint16_t len)
 			break;
 		}
 		parsed = true;
-	} while (0);
+	} while (false);
 
 	if (parsed && data.user && data.password) {
 		data.status = 0;
@@ -2829,7 +2829,7 @@ static bool on_cmd_polte_locate_cmd_rsp(struct net_buf **buf, uint16_t len)
 		rsp[out_len] = 0;
 
 		data.status = (uint32_t)strtoul(rsp, NULL, 10);
-	} while (0);
+	} while (false);
 
 	event_handler(HL7800_EVENT_POLTE_LOCATE_STATUS, &data);
 
@@ -2926,7 +2926,7 @@ static bool on_cmd_polte_location(struct net_buf **buf, uint16_t len)
 		}
 
 		parsed = true;
-	} while (0);
+	} while (false);
 
 	if (!parsed) {
 		LOG_HEXDUMP_ERR(rsp, out_len, "Unable to parse PoLTE location");

drivers/pcie/host/msi.c

@@ -240,7 +240,7 @@ static void enable_msi(pcie_bdf_t bdf,
 
 	mdr = pcie_msi_mdr(irq, vectors);
 	mcr = pcie_conf_read(bdf, base + PCIE_MSI_MCR);
-	if (mcr & PCIE_MSI_MCR_64) {
+	if ((mcr & PCIE_MSI_MCR_64) != 0U) {
 		pcie_conf_write(bdf, base + PCIE_MSI_MAP1_64, 0U);
 		pcie_conf_write(bdf, base + PCIE_MSI_MDR_64, mdr);
 	} else {
@@ -285,7 +285,7 @@ bool pcie_msi_enable(pcie_bdf_t bdf,
 		return false;
 	}
 
-	if (!msi && IS_ENABLED(CONFIG_PCIE_MSI_X)) {
+	if (!msi && (IS_ENABLED(CONFIG_PCIE_MSI_X))) {
 		enable_msix(bdf, vectors, n_vector, base, irq);
 	} else {
 		enable_msi(bdf, vectors, n_vector, base, irq);

drivers/pcie/host/pcie.c

@@ -53,12 +53,12 @@ uint32_t pcie_get_cap(pcie_bdf_t bdf, uint32_t cap_id)
 	uint32_t data;
 
 	data = pcie_conf_read(bdf, PCIE_CONF_CMDSTAT);
-	if (data & PCIE_CONF_CMDSTAT_CAPS) {
+	if ((data & PCIE_CONF_CMDSTAT_CAPS) != 0U) {
 		data = pcie_conf_read(bdf, PCIE_CONF_CAPPTR);
 		reg = PCIE_CONF_CAPPTR_FIRST(data);
 	}
 
-	while (reg) {
+	while (reg != 0U) {
 		data = pcie_conf_read(bdf, reg);
 
 		if (PCIE_CONF_CAP_ID(data) == cap_id) {
@@ -76,9 +76,9 @@ uint32_t pcie_get_ext_cap(pcie_bdf_t bdf, uint32_t cap_id)
 	unsigned int reg = PCIE_CONF_EXT_CAPPTR; /* Start at end of the PCI configuration space */
 	uint32_t data;
 
-	while (reg) {
+	while (reg != 0U) {
 		data = pcie_conf_read(bdf, reg);
-		if (!data || data == 0xffffffff) {
+		if ((data == 0U) || (data == 0xffffffffU)) {
 			return 0;
 		}
 
@@ -119,25 +119,25 @@ bool pcie_get_mbar(pcie_bdf_t bdf,
 		return false;
 	}
 
-	pcie_conf_write(bdf, reg, 0xFFFFFFFF);
+	pcie_conf_write(bdf, reg, 0xFFFFFFFFU);
 	size = pcie_conf_read(bdf, reg);
 	pcie_conf_write(bdf, reg, (uint32_t)phys_addr);
 
-	if (IS_ENABLED(CONFIG_64BIT) && PCIE_CONF_BAR_64(phys_addr)) {
+	if ((IS_ENABLED(CONFIG_64BIT)) && PCIE_CONF_BAR_64(phys_addr)) {
 		reg++;
 		phys_addr |= ((uint64_t)pcie_conf_read(bdf, reg)) << 32;
 
-		if (PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_INVAL64 ||
-		    PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_NONE) {
+		if ((PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_INVAL64) ||
+		    (PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_NONE)) {
 			/* Discard on invalid address */
 			return false;
 		}
 
-		pcie_conf_write(bdf, reg, 0xFFFFFFFF);
+		pcie_conf_write(bdf, reg, 0xFFFFFFFFU);
 		size |= ((uint64_t)pcie_conf_read(bdf, reg)) << 32;
 		pcie_conf_write(bdf, reg, (uint32_t)((uint64_t)phys_addr >> 32));
-	} else if (PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_INVAL ||
-		   PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_NONE) {
+	} else if ((PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_INVAL) ||
+		   (PCIE_CONF_BAR_ADDR(phys_addr) == PCIE_CONF_BAR_NONE)) {
 		/* Discard on invalid address */
 		return false;
 	}
@@ -161,7 +161,7 @@ bool pcie_probe_mbar(pcie_bdf_t bdf,
 	uint32_t reg;
 
 	for (reg = PCIE_CONF_BAR0;
-	     index > 0 && reg <= PCIE_CONF_BAR5; reg++, index--) {
+	     (index > 0) && (reg <= PCIE_CONF_BAR5); reg++, index--) {
 		uintptr_t addr = pcie_conf_read(bdf, reg);
 
 		if (PCIE_CONF_BAR_MEM(addr) && PCIE_CONF_BAR_64(addr)) {
@@ -182,18 +182,16 @@ bool pcie_probe_mbar(pcie_bdf_t bdf,
  */
 #define IRQ_LIST_INITIALIZED 0
 
-static ATOMIC_DEFINE(irq_reserved, CONFIG_MAX_IRQ_LINES);
+static ATOMIC_DEFINE(irq_reserved, (unsigned int)CONFIG_MAX_IRQ_LINES);
 
 static unsigned int irq_alloc(void)
 {
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(irq_reserved); i++) {
+	for (unsigned int i = 0; i < ARRAY_SIZE(irq_reserved); i++) {
 		unsigned int fz, irq;
 
-		while ((fz = find_lsb_set(~atomic_get(&irq_reserved[i])))) {
-			irq = (fz - 1) + (i * sizeof(atomic_val_t) * 8);
-			if (irq >= CONFIG_MAX_IRQ_LINES) {
+		while ((fz = find_lsb_set(~(uint32_t)atomic_get(&irq_reserved[i]))) != 0U) {
+			irq = (fz - 1U) + (i * (unsigned int)sizeof(atomic_val_t) * 8U);
+			if (irq >= (unsigned int)CONFIG_MAX_IRQ_LINES) {
 				break;
 			}
 
@@ -235,7 +233,7 @@ unsigned int pcie_alloc_irq(pcie_bdf_t bdf)
 	data = pcie_conf_read(bdf, PCIE_CONF_INTR);
 	irq = PCIE_CONF_INTR_IRQ(data);
 
-	if (irq == PCIE_CONF_INTR_IRQ_NONE || irq >= CONFIG_MAX_IRQ_LINES ||
+	if ((irq == PCIE_CONF_INTR_IRQ_NONE) || (irq >= (unsigned int)CONFIG_MAX_IRQ_LINES) ||
 	    irq_is_reserved(irq)) {
 
 		irq = irq_alloc();
@@ -272,7 +270,7 @@ void pcie_irq_enable(pcie_bdf_t bdf, unsigned int irq)
 
 pcie_bdf_t pcie_bdf_lookup(pcie_id_t id)
 {
-	int bus, dev, func;
+	unsigned int bus, dev, func;
 
 	for (bus = 0; bus <= PCIE_MAX_BUS; bus++) {
 		for (dev = 0; dev <= PCIE_MAX_DEV; dev++) {

drivers/serial/uart_cc13xx_cc26xx.c

@@ -477,7 +477,7 @@ static const struct uart_driver_api uart_cc13xx_cc26xx_driver_api = {
 		Power_registerNotify(&get_dev_data(dev)->postNotify,	\
 			PowerCC26XX_AWAKE_STANDBY,			\
 			postNotifyFxn, (uintptr_t)dev);			\
-	} while (0)
+	} while (false)
 #else
 #define UART_CC13XX_CC26XX_POWER_UART(n)				\
 	do {								\
@@ -508,7 +508,7 @@ static const struct uart_driver_api uart_cc13xx_cc26xx_driver_api = {
 			PRCM_DOMAIN_POWER_ON) {				     \
 			continue;					     \
 		}							     \
-	} while (0)
+	} while (false)
 #endif
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
@@ -524,7 +524,7 @@ static const struct uart_driver_api uart_cc13xx_cc26xx_driver_api = {
 		irq_enable(DT_INST_IRQN(n));				\
 		/* Causes an initial TX ready INT when TX INT enabled */\
 		UARTCharPutNonBlocking(get_dev_conf(dev)->regs, '\0');  \
-	} while (0)
+	} while (false)
 
 #define UART_CC13XX_CC26XX_INT_FIELDS					\
 	.callback = NULL,						\

drivers/serial/uart_mcux_iuart.c

@@ -276,7 +276,7 @@ static const struct uart_driver_api mcux_iuart_driver_api = {
 			    mcux_iuart_isr, DEVICE_DT_INST_GET(n), 0);	\
 									\
 		irq_enable(DT_INST_IRQ_BY_IDX(n, i, irq));		\
-	} while (0)
+	} while (false)
 #define IUART_MCUX_CONFIG_FUNC(n)					\
 	static void mcux_iuart_config_func_##n(const struct device *dev) \
 	{								\

drivers/serial/uart_mcux_lpuart.c

@@ -405,7 +405,7 @@ static const struct uart_driver_api mcux_lpuart_driver_api = {
 			    mcux_lpuart_isr, DEVICE_DT_INST_GET(n), 0);	\
 									\
 		irq_enable(DT_INST_IRQ_BY_IDX(n, i, irq));		\
-	} while (0)
+	} while (false)
 #define LPUART_MCUX_CONFIG_FUNC(n)					\
 	static void mcux_lpuart_config_func_##n(const struct device *dev) \
 	{								\

drivers/serial/uart_nrfx_uarte.c

@@ -538,7 +538,7 @@ static void tx_start(const struct device *dev, const uint8_t *buf, size_t len)
 {
 	NRF_UARTE_Type *uarte = get_uarte_instance(dev);
 
-#if CONFIG_PM_DEVICE
+#ifdef CONFIG_PM_DEVICE
 	enum pm_device_state state;
 
 	(void)pm_device_state_get(dev, &state);
@@ -1931,7 +1931,7 @@ static int uarte_nrfx_pm_control(const struct device *dev,
 		IRQ_CONNECT(DT_IRQN(UARTE(idx)), DT_IRQ(UARTE(idx), priority), \
 			    isr_handler, DEVICE_DT_GET(UARTE(idx)), 0); \
 		irq_enable(DT_IRQN(UARTE(idx)));			       \
-	} while (0)
+	} while (false)
 
 #define HWFC_CONFIG_CHECK(idx) \
 	BUILD_ASSERT( \

drivers/serial/uart_ns16550.c

@@ -38,10 +38,10 @@
 
 #include "uart_ns16550.h"
 
-#define INST_HAS_PCP_HELPER(inst) DT_INST_NODE_HAS_PROP(inst, pcp) ||
-#define INST_HAS_DLF_HELPER(inst) DT_INST_NODE_HAS_PROP(inst, dlf) ||
+#define INST_HAS_PCP_HELPER(inst) (DT_INST_NODE_HAS_PROP(inst, pcp)) ||
+#define INST_HAS_DLF_HELPER(inst) (DT_INST_NODE_HAS_PROP(inst, dlf)) ||
 #define INST_HAS_REG_SHIFT_HELPER(inst) \
-	DT_INST_NODE_HAS_PROP(inst, reg_shift) ||
+	(DT_INST_NODE_HAS_PROP(inst, reg_shift)) ||
 
 #define UART_NS16550_PCP_ENABLED \
 	(DT_INST_FOREACH_STATUS_OKAY(INST_HAS_PCP_HELPER) 0)
@@ -50,7 +50,7 @@
 #define UART_NS16550_REG_INTERVAL_ENABLED \
 	(DT_INST_FOREACH_STATUS_OKAY(INST_HAS_REG_SHIFT_HELPER) 0)
 
-#if DT_ANY_INST_ON_BUS_STATUS_OKAY(pcie)
+#if (DT_ANY_INST_ON_BUS_STATUS_OKAY(pcie))
 BUILD_ASSERT(IS_ENABLED(CONFIG_PCIE), "NS16550(s) in DT need CONFIG_PCIE");
 #include <drivers/pcie/pcie.h>
 #endif
@@ -90,14 +90,14 @@ BUILD_ASSERT(IS_ENABLED(CONFIG_PCIE), "NS16550(s) in DT need CONFIG_PCIE");
 
 /* equates for FIFO control register */
 
-#define FCR_FIFO 0x01    /* enable XMIT and RCVR FIFO */
-#define FCR_RCVRCLR 0x02 /* clear RCVR FIFO */
-#define FCR_XMITCLR 0x04 /* clear XMIT FIFO */
+#define FCR_FIFO 0x01U    /* enable XMIT and RCVR FIFO */
+#define FCR_RCVRCLR 0x02U /* clear RCVR FIFO */
+#define FCR_XMITCLR 0x04U /* clear XMIT FIFO */
 
 /* equates for Apollo Lake clock control register (PRV_CLOCK_PARAMS) */
 
-#define PCP_UPDATE 0x80000000 /* update clock */
-#define PCP_EN 0x00000001     /* enable clock output */
+#define PCP_UPDATE 0x80000000U /* update clock */
+#define PCP_EN 0x00000001U     /* enable clock output */
 
 /*
  * Per PC16550D (Literature Number: SNLS378B):
@@ -127,66 +127,66 @@ BUILD_ASSERT(IS_ENABLED(CONFIG_PCIE), "NS16550(s) in DT need CONFIG_PCIE");
  * TXRDY pin will go low active. This pin will become inactive
  * when the XMIT FIFO is completely full.
  */
-#define FCR_MODE0 0x00 /* set receiver in mode 0 */
-#define FCR_MODE1 0x08 /* set receiver in mode 1 */
+#define FCR_MODE0 0x00U /* set receiver in mode 0 */
+#define FCR_MODE1 0x08U /* set receiver in mode 1 */
 
 /* RCVR FIFO interrupt levels: trigger interrupt with this bytes in FIFO */
-#define FCR_FIFO_1 0x00  /* 1 byte in RCVR FIFO */
-#define FCR_FIFO_4 0x40  /* 4 bytes in RCVR FIFO */
-#define FCR_FIFO_8 0x80  /* 8 bytes in RCVR FIFO */
-#define FCR_FIFO_14 0xC0 /* 14 bytes in RCVR FIFO */
+#define FCR_FIFO_1 0x00U  /* 1 byte in RCVR FIFO */
+#define FCR_FIFO_4 0x40U  /* 4 bytes in RCVR FIFO */
+#define FCR_FIFO_8 0x80U  /* 8 bytes in RCVR FIFO */
+#define FCR_FIFO_14 0xC0U /* 14 bytes in RCVR FIFO */
 
 /*
  * UART NS16750 supports 64 bytes FIFO, which can be enabled
  * via the FCR register
  */
-#define FCR_FIFO_64 0x20 /* Enable 64 bytes FIFO */
+#define FCR_FIFO_64 0x20U /* Enable 64 bytes FIFO */
 
 /* constants for line control register */
 
-#define LCR_CS5 0x00   /* 5 bits data size */
-#define LCR_CS6 0x01   /* 6 bits data size */
-#define LCR_CS7 0x02   /* 7 bits data size */
-#define LCR_CS8 0x03   /* 8 bits data size */
-#define LCR_2_STB 0x04 /* 2 stop bits */
-#define LCR_1_STB 0x00 /* 1 stop bit */
-#define LCR_PEN 0x08   /* parity enable */
-#define LCR_PDIS 0x00  /* parity disable */
-#define LCR_EPS 0x10   /* even parity select */
-#define LCR_SP 0x20    /* stick parity select */
-#define LCR_SBRK 0x40  /* break control bit */
-#define LCR_DLAB 0x80  /* divisor latch access enable */
+#define LCR_CS5 0x00U   /* 5 bits data size */
+#define LCR_CS6 0x01U   /* 6 bits data size */
+#define LCR_CS7 0x02U   /* 7 bits data size */
+#define LCR_CS8 0x03U   /* 8 bits data size */
+#define LCR_2_STB 0x04U /* 2 stop bits */
+#define LCR_1_STB 0x00U /* 1 stop bit */
+#define LCR_PEN 0x08U   /* parity enable */
+#define LCR_PDIS 0x00U  /* parity disable */
+#define LCR_EPS 0x10U   /* even parity select */
+#define LCR_SP 0x20U    /* stick parity select */
+#define LCR_SBRK 0x40U  /* break control bit */
+#define LCR_DLAB 0x80U  /* divisor latch access enable */
 
 /* constants for the modem control register */
 
-#define MCR_DTR 0x01  /* dtr output */
-#define MCR_RTS 0x02  /* rts output */
-#define MCR_OUT1 0x04 /* output #1 */
-#define MCR_OUT2 0x08 /* output #2 */
-#define MCR_LOOP 0x10 /* loop back */
-#define MCR_AFCE 0x20 /* auto flow control enable */
+#define MCR_DTR 0x01U  /* dtr output */
+#define MCR_RTS 0x02U  /* rts output */
+#define MCR_OUT1 0x04U /* output #1 */
+#define MCR_OUT2 0x08U /* output #2 */
+#define MCR_LOOP 0x10U /* loop back */
+#define MCR_AFCE 0x20U /* auto flow control enable */
 
 /* constants for line status register */
 
-#define LSR_RXRDY 0x01 /* receiver data available */
-#define LSR_OE 0x02    /* overrun error */
-#define LSR_PE 0x04    /* parity error */
-#define LSR_FE 0x08    /* framing error */
-#define LSR_BI 0x10    /* break interrupt */
-#define LSR_EOB_MASK 0x1E /* Error or Break mask */
-#define LSR_THRE 0x20  /* transmit holding register empty */
-#define LSR_TEMT 0x40  /* transmitter empty */
+#define LSR_RXRDY 0x01U /* receiver data available */
+#define LSR_OE 0x02U    /* overrun error */
+#define LSR_PE 0x04U    /* parity error */
+#define LSR_FE 0x08U    /* framing error */
+#define LSR_BI 0x10U    /* break interrupt */
+#define LSR_EOB_MASK 0x1EU /* Error or Break mask */
+#define LSR_THRE 0x20U  /* transmit holding register empty */
+#define LSR_TEMT 0x40U  /* transmitter empty */
 
 /* constants for modem status register */
 
-#define MSR_DCTS 0x01 /* cts change */
-#define MSR_DDSR 0x02 /* dsr change */
-#define MSR_DRI 0x04  /* ring change */
-#define MSR_DDCD 0x08 /* data carrier change */
-#define MSR_CTS 0x10  /* complement of cts */
-#define MSR_DSR 0x20  /* complement of dsr */
-#define MSR_RI 0x40   /* complement of ring signal */
-#define MSR_DCD 0x80  /* complement of dcd */
+#define MSR_DCTS 0x01U /* cts change */
+#define MSR_DDSR 0x02U /* dsr change */
+#define MSR_DRI 0x04U  /* ring change */
+#define MSR_DDCD 0x08U /* data carrier change */
+#define MSR_CTS 0x10U  /* complement of cts */
+#define MSR_DSR 0x20U  /* complement of dsr */
+#define MSR_RI 0x40U   /* complement of ring signal */
+#define MSR_DCD 0x80U  /* complement of dcd */
 
 /* convenience defines */
 
@@ -196,17 +196,17 @@ BUILD_ASSERT(IS_ENABLED(CONFIG_PCIE), "NS16550(s) in DT need CONFIG_PCIE");
 #define DEV_DATA(dev) \
 	((struct uart_ns16550_dev_data *)(dev)->data)
 
-#define THR(dev) (get_port(dev) + REG_THR * reg_interval(dev))
-#define RDR(dev) (get_port(dev) + REG_RDR * reg_interval(dev))
-#define BRDL(dev) (get_port(dev) + REG_BRDL * reg_interval(dev))
-#define BRDH(dev) (get_port(dev) + REG_BRDH * reg_interval(dev))
-#define IER(dev) (get_port(dev) + REG_IER * reg_interval(dev))
-#define IIR(dev) (get_port(dev) + REG_IIR * reg_interval(dev))
-#define FCR(dev) (get_port(dev) + REG_FCR * reg_interval(dev))
-#define LCR(dev) (get_port(dev) + REG_LCR * reg_interval(dev))
-#define MDC(dev) (get_port(dev) + REG_MDC * reg_interval(dev))
-#define LSR(dev) (get_port(dev) + REG_LSR * reg_interval(dev))
-#define MSR(dev) (get_port(dev) + REG_MSR * reg_interval(dev))
+#define THR(dev) (get_port(dev) + (REG_THR * reg_interval(dev)))
+#define RDR(dev) (get_port(dev) + (REG_RDR * reg_interval(dev)))
+#define BRDL(dev) (get_port(dev) + (REG_BRDL * reg_interval(dev)))
+#define BRDH(dev) (get_port(dev) + (REG_BRDH * reg_interval(dev)))
+#define IER(dev) (get_port(dev) + (REG_IER * reg_interval(dev)))
+#define IIR(dev) (get_port(dev) + (REG_IIR * reg_interval(dev)))
+#define FCR(dev) (get_port(dev) + (REG_FCR * reg_interval(dev)))
+#define LCR(dev) (get_port(dev) + (REG_LCR * reg_interval(dev)))
+#define MDC(dev) (get_port(dev) + (REG_MDC * reg_interval(dev)))
+#define LSR(dev) (get_port(dev) + (REG_LSR * reg_interval(dev)))
+#define MSR(dev) (get_port(dev) + (REG_MSR * reg_interval(dev)))
 #define DLF(dev) (get_port(dev) + REG_DLF)
 #define PCP(dev) (get_port(dev) + REG_PCP)
 
@@ -220,8 +220,8 @@ BUILD_ASSERT(IS_ENABLED(CONFIG_PCIE), "NS16550(s) in DT need CONFIG_PCIE");
 #else
 #define INBYTE(x) sys_read8(x)
 #define INWORD(x) sys_read32(x)
-#define OUTBYTE(x, d) sys_write8(d, x)
-#define OUTWORD(x, d) sys_write32(d, x)
+#define OUTBYTE(x, d) sys_write8((d), (x))
+#define OUTWORD(x, d) sys_write32((d), (x))
 #endif /* UART_NS16550_ACCESS_IOPORT */
 
 #ifdef CONFIG_UART_NS16550_ACCESS_WORD_ONLY
@@ -248,7 +248,7 @@ struct uart_ns16550_device_config {
 #if UART_NS16550_REG_INTERVAL_ENABLED
 	uint8_t reg_interval;
 #endif
-#if DT_ANY_INST_ON_BUS_STATUS_OKAY(pcie)
+#if (DT_ANY_INST_ON_BUS_STATUS_OKAY(pcie))
 	bool pcie;
 	pcie_bdf_t pcie_bdf;
 	pcie_id_t pcie_id;
@@ -277,9 +277,9 @@ struct uart_ns16550_dev_data {
 #if defined(UART_REG_ADDR_INTERVAL)
 #define DEFAULT_REG_INTERVAL UART_REG_ADDR_INTERVAL
 #elif defined(UART_NS16550_ACCESS_IOPORT)
-#define DEFAULT_REG_INTERVAL 1
+#define DEFAULT_REG_INTERVAL 1U
 #else
-#define DEFAULT_REG_INTERVAL 4
+#define DEFAULT_REG_INTERVAL 4U
 #endif
 
 #if UART_NS16550_REG_INTERVAL_ENABLED
@@ -324,8 +324,8 @@ static void set_baud_rate(const struct device *dev, uint32_t baud_rate)
 		/* set the DLAB to access the baud rate divisor registers */
 		lcr_cache = INBYTE(LCR(dev));
 		OUTBYTE(LCR(dev), LCR_DLAB | lcr_cache);
-		OUTBYTE(BRDL(dev), (unsigned char)(divisor & 0xff));
-		OUTBYTE(BRDH(dev), (unsigned char)((divisor >> 8) & 0xff));
+		OUTBYTE(BRDL(dev), (uint8_t)(divisor & 0xff));
+		OUTBYTE(BRDH(dev), (uint8_t)((divisor >> 8) & 0xff));
 
 		/* restore the DLAB to access the baud rate divisor registers */
 		OUTBYTE(LCR(dev), lcr_cache);
@@ -350,7 +350,7 @@ static int uart_ns16550_configure(const struct device *dev,
 	ARG_UNUSED(dev_cfg);
 
 #ifndef UART_NS16550_ACCESS_IOPORT
-#if DT_ANY_INST_ON_BUS_STATUS_OKAY(pcie)
+#if (DT_ANY_INST_ON_BUS_STATUS_OKAY(pcie))
 	if (dev_cfg->pcie) {
 		struct pcie_mbar mbar;
 
@@ -396,16 +396,16 @@ static int uart_ns16550_configure(const struct device *dev,
 	struct uart_config uart_cfg;
 
 	switch (cfg->data_bits) {
-	case UART_CFG_DATA_BITS_5:
+	case (uint8_t)UART_CFG_DATA_BITS_5:
 		uart_cfg.data_bits = LCR_CS5;
 		break;
-	case UART_CFG_DATA_BITS_6:
+	case (uint8_t)UART_CFG_DATA_BITS_6:
 		uart_cfg.data_bits = LCR_CS6;
 		break;
-	case UART_CFG_DATA_BITS_7:
+	case (uint8_t)UART_CFG_DATA_BITS_7:
 		uart_cfg.data_bits = LCR_CS7;
 		break;
-	case UART_CFG_DATA_BITS_8:
+	case (uint8_t)UART_CFG_DATA_BITS_8:
 		uart_cfg.data_bits = LCR_CS8;
 		break;
 	default:
@@ -414,10 +414,10 @@ static int uart_ns16550_configure(const struct device *dev,
 	}
 
 	switch (cfg->stop_bits) {
-	case UART_CFG_STOP_BITS_1:
+	case (uint8_t)UART_CFG_STOP_BITS_1:
 		uart_cfg.stop_bits = LCR_1_STB;
 		break;
-	case UART_CFG_STOP_BITS_2:
+	case (uint8_t)UART_CFG_STOP_BITS_2:
 		uart_cfg.stop_bits = LCR_2_STB;
 		break;
 	default:
@@ -426,10 +426,10 @@ static int uart_ns16550_configure(const struct device *dev,
 	}
 
 	switch (cfg->parity) {
-	case UART_CFG_PARITY_NONE:
+	case (uint8_t)UART_CFG_PARITY_NONE:
 		uart_cfg.parity = LCR_PDIS;
 		break;
-	case UART_CFG_PARITY_EVEN:
+	case (uint8_t)UART_CFG_PARITY_EVEN:
 		uart_cfg.parity = LCR_EPS;
 		break;
 	default:
@@ -576,11 +576,11 @@ static void uart_ns16550_poll_out(const struct device *dev,
 static int uart_ns16550_err_check(const struct device *dev)
 {
 	k_spinlock_key_t key = k_spin_lock(&DEV_DATA(dev)->lock);
-	int check = (INBYTE(LSR(dev)) & LSR_EOB_MASK);
+	uint8_t check = (INBYTE(LSR(dev)) & LSR_EOB_MASK);
 
 	k_spin_unlock(&DEV_DATA(dev)->lock, key);
-
-	return check >> 1;
+	check >>= 1;
+	return (int)check;
 }
 
 #if CONFIG_UART_INTERRUPT_DRIVEN
@@ -1054,8 +1054,8 @@ static const struct uart_driver_api uart_ns16550_driver_api = {
 #define DEV_CONFIG_PCIE0(n)
 #define DEV_CONFIG_PCIE1(n)              \
 	.pcie = true,                    \
-	.pcie_bdf = DT_INST_REG_ADDR(n), \
-	.pcie_id = DT_INST_REG_SIZE(n),
+	.pcie_bdf = (uint32_t)DT_INST_REG_ADDR(n), \
+	.pcie_id = (uint32_t)DT_INST_REG_SIZE(n),
 #define DEV_CONFIG_PCIE_INIT(n) \
 	_CONCAT(DEV_CONFIG_PCIE, DT_INST_ON_BUS(n, pcie))(n)
 
@@ -1074,18 +1074,18 @@ static const struct uart_driver_api uart_ns16550_driver_api = {
 	UART_NS16550_IRQ_FUNC_DECLARE(n);                                            \
 	static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_##n = {  \
 		DEV_CONFIG_REG_INIT(n)                                               \
-		.sys_clk_freq = DT_INST_PROP(n, clock_frequency),                    \
+		.sys_clk_freq = (uint32_t)DT_INST_PROP(n, clock_frequency),          \
 		DEV_CONFIG_IRQ_FUNC_INIT(n)                                          \
 		DEV_CONFIG_PCP_INIT(n)                                               \
 		DEV_CONFIG_REG_INT_INIT(n)                                           \
 		DEV_CONFIG_PCIE_INIT(n)                                              \
 	};                                                                           \
 	static struct uart_ns16550_dev_data uart_ns16550_dev_data_##n = {            \
-		.uart_config.baudrate = DT_INST_PROP_OR(n, current_speed, 0),        \
-		.uart_config.parity = UART_CFG_PARITY_NONE,                          \
-		.uart_config.stop_bits = UART_CFG_STOP_BITS_1,                       \
-		.uart_config.data_bits = UART_CFG_DATA_BITS_8,                       \
-		.uart_config.flow_ctrl = DEV_DATA_FLOW_CTRL(n),                      \
+		.uart_config.baudrate = (uint32_t)DT_INST_PROP_OR(n, current_speed, 0),  \
+		.uart_config.parity = (uint8_t)UART_CFG_PARITY_NONE,                          \
+		.uart_config.stop_bits = (uint8_t)UART_CFG_STOP_BITS_1,                       \
+		.uart_config.data_bits = (uint8_t)UART_CFG_DATA_BITS_8,                       \
+		.uart_config.flow_ctrl = (uint8_t)DEV_DATA_FLOW_CTRL(n),                      \
 		DEV_DATA_DLF_INIT(n)                                                 \
 	};                                                                           \
 	DEVICE_DT_INST_DEFINE(n, &uart_ns16550_init, NULL,                           \

drivers/serial/uart_sam0.c

@@ -1171,7 +1171,7 @@ static const struct uart_driver_api uart_sam0_driver_api = {
 			    uart_sam0_isr,				\
 			    DEVICE_DT_INST_GET(n), 0);			\
 		irq_enable(DT_INST_IRQ_BY_IDX(n, m, irq));		\
-	} while (0)
+	} while (false)
 
 #define UART_SAM0_IRQ_HANDLER_DECL(n)					\
 	static void uart_sam0_irq_config_##n(const struct device *dev)

drivers/serial/uart_xlnx_uartlite.c

@@ -343,7 +343,7 @@ static const struct uart_driver_api xlnx_uartlite_driver_api = {
 			    DEVICE_DT_INST_GET(n), 0);			\
 									\
 		irq_enable(DT_INST_IRQ_BY_IDX(n, i, irq));		\
-	} while (0)
+	} while (false)
 #define XLNX_UARTLITE_CONFIG_FUNC(n)					\
 	static void xlnx_uartlite_config_func_##n(const struct device *dev) \
 	{								\

drivers/spi/spi_cc13xx_cc26xx.c

@@ -253,7 +253,7 @@ static const struct spi_driver_api spi_cc13xx_cc26xx_driver_api = {
 		} else {						  \
 			Power_setDependency(PowerCC26XX_PERIPH_SSI1);	  \
 		}							  \
-	} while (0)
+	} while (false)
 #else
 #define SPI_CC13XX_CC26XX_POWER_SPI(n)					  \
 	do {								  \
@@ -286,7 +286,7 @@ static const struct spi_driver_api spi_cc13xx_cc26xx_driver_api = {
 			PRCM_DOMAIN_POWER_ON) {				  \
 			continue;					  \
 		}							  \
-	} while (0)
+	} while (false)
 #endif
 
 #define SPI_CC13XX_CC26XX_DEVICE_INIT(n)				    \

drivers/timer/apic_tsc.c

@@ -10,8 +10,8 @@
 #define IA32_TSC_DEADLINE_MSR 0x6e0
 #define IA32_TSC_ADJUST_MSR   0x03b
 
-#define CYC_PER_TICK (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC \
-		      / (uint64_t) CONFIG_SYS_CLOCK_TICKS_PER_SEC)
+#define CYC_PER_TICK ((uint64_t)CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC \
+		      / (uint64_t)CONFIG_SYS_CLOCK_TICKS_PER_SEC)
 
 struct apic_timer_lvt {
 	uint8_t vector   : 8;
@@ -37,13 +37,13 @@ static void isr(const void *arg)
 {
 	ARG_UNUSED(arg);
 	k_spinlock_key_t key = k_spin_lock(&lock);
-	uint32_t ticks = (rdtsc() - last_announce) / CYC_PER_TICK;
+	uint32_t ticks = (uint32_t)((rdtsc() - last_announce) / CYC_PER_TICK);
 
 	last_announce += ticks * CYC_PER_TICK;
 	k_spin_unlock(&lock, key);
-	sys_clock_announce(ticks);
+	sys_clock_announce((int32_t)ticks);
 
-	if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
+	if (!(IS_ENABLED(CONFIG_TICKLESS_KERNEL))) {
 		sys_clock_set_timeout(1, false);
 	}
 }
@@ -62,9 +62,10 @@ void sys_clock_set_timeout(int32_t ticks, bool idle)
 
 	uint64_t now = rdtsc();
 	k_spinlock_key_t key = k_spin_lock(&lock);
-	uint64_t expires = now + MAX(ticks - 1, 0) * CYC_PER_TICK;
+	const int32_t ticks0 = MAX(ticks - 1, 0);
+	uint64_t expires = now + ((uint64_t)ticks0 * CYC_PER_TICK);
 
-	expires = last_announce + (((expires - last_announce + CYC_PER_TICK - 1)
+	expires = last_announce + (((expires - last_announce + CYC_PER_TICK - 1U)
 				    / CYC_PER_TICK) * CYC_PER_TICK);
 
 	/* The second condition is to catch the wraparound.
@@ -75,7 +76,7 @@ void sys_clock_set_timeout(int32_t ticks, bool idle)
 	 * real hardware it requires more than a century of uptime,
 	 * but this is cheap and safe.
 	 */
-	if (ticks == K_TICKS_FOREVER || expires < last_announce) {
+	if ((ticks == K_TICKS_FOREVER) || (expires < last_announce)) {
 		expires = UINT64_MAX;
 	}
 
@@ -86,7 +87,7 @@ void sys_clock_set_timeout(int32_t ticks, bool idle)
 uint32_t sys_clock_elapsed(void)
 {
 	k_spinlock_key_t key = k_spin_lock(&lock);
-	uint32_t ret = (rdtsc() - last_announce) / CYC_PER_TICK;
+	uint32_t ret = (uint32_t)((rdtsc() - last_announce) / CYC_PER_TICK);
 
 	k_spin_unlock(&lock, key);
 	return ret;
@@ -172,7 +173,7 @@ int sys_clock_driver_init(const struct device *dev)
 	/* Timer interrupt number is runtime-fetched, so can't use
 	 * static IRQ_CONNECT()
 	 */
-	irq_connect_dynamic(timer_irq(), CONFIG_APIC_TIMER_IRQ_PRIORITY, isr, 0, 0);
+	irq_connect_dynamic(timer_irq(), CONFIG_APIC_TIMER_IRQ_PRIORITY, isr, NULL, 0U);
 
 	lvt_reg.val = x86_read_loapic(LOAPIC_TIMER);
 	lvt_reg.lvt.mode = TSC_DEADLINE;
@@ -189,7 +190,7 @@ int sys_clock_driver_init(const struct device *dev)
 	last_announce = rdtsc();
 	irq_enable(timer_irq());
 
-	if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
+	if (!(IS_ENABLED(CONFIG_TICKLESS_KERNEL))) {
 		sys_clock_set_timeout(1, false);
 	}
 

drivers/usb/device/usb_dc_sam0.c

@@ -207,7 +207,7 @@ static void usb_sam0_load_padcal(void)
 		    DT_INST_IRQ_BY_IDX(0, n, priority),		\
 		    usb_sam0_isr, 0, 0);			\
 	irq_enable(DT_INST_IRQ_BY_IDX(0, n, irq));		\
-	} while (0)
+	} while (false)
 
 /* Attach by initializing the device */
 int usb_dc_attach(void)

include/app_memory/app_memdomain.h

@@ -121,16 +121,16 @@ struct z_app_region {
 	extern char Z_APP_START(name)[]; \
 	extern char Z_APP_SIZE(name)[]; \
 	struct k_mem_partition name = { \
-		.start = (uintptr_t) &Z_APP_START(name), \
-		.size = (size_t) &Z_APP_SIZE(name), \
+		.start = (uintptr_t) &Z_APP_START(name)[0], \
+		.size = (size_t) &Z_APP_SIZE(name)[0], \
 		.attr = K_MEM_PARTITION_P_RW_U_RW \
 	}; \
 	extern char Z_APP_BSS_START(name)[]; \
 	extern char Z_APP_BSS_SIZE(name)[]; \
 	Z_GENERIC_SECTION(.app_regions.name) \
 	const struct z_app_region name##_region = { \
-		.bss_start = &Z_APP_BSS_START(name), \
-		.bss_size = (size_t) &Z_APP_BSS_SIZE(name) \
+		.bss_start = &Z_APP_BSS_START(name)[0], \
+		.bss_size = (size_t) &Z_APP_BSS_SIZE(name)[0] \
 	}; \
 	Z_APPMEM_PLACEHOLDER(name)
 #else

include/arch/arc/v2/mpu/arc_core_mpu.h

@@ -88,7 +88,7 @@ void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain);
 void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain,
 			uint32_t partition_id);
 int arc_core_mpu_get_max_domain_partition_regions(void);
-int arc_core_mpu_buffer_validate(void *addr, size_t size, int write);
+int arc_core_mpu_buffer_validate(const void *addr, size_t size, bool write);
 
 #endif
 

include/arch/common/ffs.h

@@ -34,7 +34,7 @@ static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
 		return 0;
 	}
 
-	return 32 - __builtin_clz(op);
+	return 32 - (unsigned int)__builtin_clz(op);
 }
 
 
@@ -53,7 +53,7 @@ static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
 static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
 {
 #ifdef CONFIG_TOOLCHAIN_HAS_BUILTIN_FFS
-	return __builtin_ffs(op);
+	return (unsigned int)__builtin_ffs((int)op);
 
 #else
 	/*

include/arch/x86/acpi.h

@@ -8,7 +8,7 @@
 
 #ifndef _ASMLANGUAGE
 
-#define ACPI_RSDP_SIGNATURE 0x2052545020445352 /* == "RSD PTR " */
+#define ACPI_RSDP_SIGNATURE 0x2052545020445352ULL /* == "RSD PTR " */
 
 /* Root System Description Pointer */
 struct acpi_rsdp {
@@ -90,7 +90,7 @@ struct acpi_cpu {
 	uint8_t flags;   /* see ACPI_CPU_FLAGS_* below */
 } __packed;
 
-#define ACPI_CPU_FLAGS_ENABLED 0x01
+#define ACPI_CPU_FLAGS_ENABLED 0x01U
 
 /* Generic DMA Remapping entry structure part */
 struct acpi_dmar_entry {