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Author SHA1 Message Date
Daniel DeGrasse
64e98eb527 release: Zephyr v4.2.1
Set the version to v4.2.1

Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
Signed-off-by: Dan Kalowsky <dkalowsky@amperecomputing.com>
2025-10-07 17:42:43 -05:00
Daniel DeGrasse
4d44e3280b doc: release_notes: add 4.2.1 release notes
Add 4.2.1 release notes, summarizing the issues addressed since 4.2 was
released.

Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
2025-10-07 17:31:48 -05:00
Julien Racki
6da1cbcb06 drivers: ethernet: stm32: Move the Ethernet API V1 init
Move the Ethernet API v1 Initialization in eth_init_api_v1()
helper function to match the V2 implementation.

Signed-off-by: Julien Racki <julien.racki-ext@st.com>
2025-10-07 16:29:52 -05:00
Julien Racki
1e5f5af4eb drivers: ethernet: stm32: Fix the init call order
Fix the init call order for V2 API to be able to configure PTP
as PTP initialization happens before iface initialization.

Signed-off-by: Julien Racki <julien.racki-ext@st.com>
2025-10-07 16:29:52 -05:00
Khaoula Bidani
ee29ea2a20 drivers: gpio: stm32: Fix gpio_pin_get_config
This commit updates the function to only set output-related flags
(GPIO_OUTPUT_INIT_HIGH, GPIO_OUTPUT_INIT_LOW) when the pin
is actually configured as output. For input pins, only GPIO_INPUT and
other relevant flags are set.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
(cherry picked from commit e803a10b91)
2025-10-06 14:38:58 -05:00
Detlev Zundel
3d4204036a samples: modules: lvgl: demos: Increase memory pool on native
Due to the added overhead on 64 bit native, we also need to increase
the memory pool size to fix crashes as described in here:

https://github.com/lvgl/lvgl/issues/7648

Signed-off-by: Detlev Zundel <dzu@member.fsf.org>
(cherry picked from commit abd0919bc9)
2025-10-06 14:38:25 -05:00
Detlev Zundel
c60a870b1c samples: modules: lvgl: demos: Increase main stack to fix crash
The increased complexity of the LVGL code now overruns the 4 KiB stack
of the main thread. Increase it to 6 KiB to fix the error.

Fixes: #94473

Signed-off-by: Detlev Zundel <dzu@member.fsf.org>
(cherry picked from commit e05a272817)
2025-10-06 14:38:25 -05:00
Pieter De Gendt
d26b221f53 arch: common: nocache.ld: One nocache MPU region
Combine the load and noload cache regions for a single MPU aligned block.
This is required to have an MPU region with a size that is a power of 2.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
(cherry picked from commit 8f7908694a)
2025-10-06 13:00:31 -05:00
Pieter De Gendt
9cb7b9e4ec linker: Split nocache memory sections into loadable and non-loadable
Commit f9168ae464 made all non-cached memory
loadable by default.

However as nocache memory is typically used for reserving larger buffers to
be shared between peripherals, this comes at fairly large cost towards ROM
usage.

This commit creates two distinct sections for both loadable and
non-loadable nocache memory sections.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
(cherry picked from commit 294f7e52c5)
2025-10-06 13:00:31 -05:00
Benjamin Cabé
e395a9a649 doc: _scripts: ensure twister.yaml file is considered in board catalog
Boards may use twister.yaml file to define Twister platforms, so
board catalog should also parse them.

Fixes: zephyrproject-rtos/zephyr#95721.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
(cherry picked from commit 9f181b6711)
2025-10-06 09:57:10 -07:00
Alen Karnil
9526404c65 dts: arm: st: stm32f303: fix I2C3 address in nodename
Correct stm32f303 I2C3 address in nodename.

Signed-off-by: Alen Karnil <alankarnil@gmail.com>
(cherry picked from commit 4363d14bef)
2025-10-02 16:40:18 -05:00
Samuel Tsai
116c4a9e40 Bluetooth: host: adv: revert 39cb574 to fix spurious error log
Commit 39cb574 changed the log level from LOG_DBG to LOG_ERR in
bt_le_adv_resume(). This causes the error log
"No valid legacy adv to resume" to appear during normal connection
establishment when using bt_le_ext_adv_start(), even though the
system is functioning correctly.

Revert the change to restore the original LOG_DBG level.

Fixes: #94954

Signed-off-by: Samuel Tsai <stsai@atmosic.com>
(cherry picked from commit 07dc0ad40d)
2025-09-30 15:05:15 -07:00
Robert Lubos
46292d748d net: tcp: Fix ACK processing when FIN packet is received
In case FIN packed also acknowledged most recently sent data, not all
ack-related TCP context variables were updated, resulting in invalid SEQ
number values sent in consecutive packets.

Fix this by refactoring the FIN handling in TCP_ESTABLISHED state.
Instead of having a separate block strictly for FIN packet processing,
let the packet be processed by common code responsible for regular
data/ack processing. This should be less error-prone for any future
modifications or not-yet-discovered issues. Only after the common
processing of data/ack is done, we check whether FIN flag was present in
the packet, and mark the connection for closing.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
(cherry picked from commit 178150590c)
2025-09-30 15:04:27 -07:00
Robert Lubos
51e1f38026 tests: net: tcp: Add test for FIN,ACK received after final data
Add a test case for a scenario where the final data sent by one peer is
acknowledged in the FIN,ACK response from the other peer. Verify that
the acknowledgment is handled correctly, and a consecutive sequence
number sent by the TCP stack in such case is set correctly.

This complements the other existing test for FIN packet handling, which
verified that data received in a FIN packet is handled correctly. With
those tests in place it should be safer to update any logic related to
FIN packet handling.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
(cherry picked from commit 99b435788e)
2025-09-30 15:04:27 -07:00
Robert Lubos
87b06394e6 net: tcp: Preallocate TX packet for TCP context
TCP context cannot operate w/o a TX packet for buffering transmitted
data. So far this net_pkt was allocated at runtime from the common
packet pool, but this created some not-obvious memory requirement on TCP
and could lead to TX packet starvation in case many TCP connections are
open in parallel. Therefore, allocate this packet structure statically,
as a part of the TCP context instead.

This increases the memory requirement of the TCP context by ~64 bytes,
however if that's a concern for the application, the maximum number of
TX packets can be lowered instead. In return, we get a clear separation
between the number of TCP connections opened, and the amount of packets
that can be transmitted.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
(cherry picked from commit eda76ad21b)
2025-09-30 15:02:50 -07:00
Robert Lubos
9800d46c69 net: pkt: Add helper function to initialize TX packet
Add helper function to initialize externally allocated TX packet. It's
especially important to configure net_buf slab for the packet so that
net buffers are allocated from a correct pool for the packet.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
(cherry picked from commit b8c7984099)
2025-09-30 15:02:50 -07:00
Robert Lubos
ac91402f71 net: tcp: Use net_buf pointer directly for out-of-order recv queue
Using net_pkt for TCP out-of-order recv queue was an overshot, as the
mechanism mostly used net_buf operations directly anyway. It can be
easily replaced with a direct net_buf pointer, so that it's not longer
needed to hog one net_pkt per TCP context anymore.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
(cherry picked from commit aca511c91f)
2025-09-30 15:02:50 -07:00
Sudan Landge
e58bca83de arch: arm: switch to privilege stack in SVC handler
Initialize the privilege stack and switch PSP to it early in the SVC
handler to ensure `z_arm_do_syscall` does not start on a user-accessible
stack frame.

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
(cherry picked from commit 319c697286)
2025-09-30 15:01:53 -07:00
Sudan Landge
91d1416460 boards: arm: mps2: Add dependency to empty_cpu0 for an521/cpu1's app
`west build` does not build the `empty_cpu0` application making
`west build -b mps2/an521/cpu1 -t run` fail because of the missing
empty_cpu0's binary.

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
(cherry picked from commit 52151d0b23)
2025-09-30 15:01:53 -07:00
Sudan Landge
cbb43bee3d tests: overwrite return address of stack frame
Introduce a test to overwrite the return address in the exception
stack frame of a lower-priority thread performing an SVC call.

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
(cherry picked from commit f80bef31ef)
2025-09-30 15:01:53 -07:00
Jukka Rissanen
989499c8f4 net: context: Make sure TCP allocation is not leaked
If we have allocated a TCP connection, and if after that
we get an error like EADDRINUSE, then we must de-allocate
the TCP connection otherwise there is a buffer leak.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
(cherry picked from commit 909710b598)
2025-09-30 15:01:25 -07:00
Jamie McCrae
6eebe0acf0 cmake: mcuboot: Add dependency to keys
Adds a dependency that causes CMake to re-configure if the input
key files for MCUboot signing/encryption have changed

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
(cherry picked from commit 271dbb4015)
2025-09-21 20:29:28 -07:00
Mickael Bosch
1ea8bb2e0f drivers: i2c: stm32: fix compilation with DMA
fixes:
- implicit declaration of function 'stm32_buf_in_nocache'
- undefined reference to 'stm32_buf_in_nocache'

Signed-off-by: Mickael Bosch <mickael.bosch@linux.com>
(cherry picked from commit 6e018bbf04)
2025-09-12 14:23:09 -04:00
Etienne Carriere
4217df505a drivers: i2c: stm32: exclude stm32f7 family for PM in RTIO driver
Exclude STM32F7 SoC series from PM support since that SoC doees not
yet manage power management in Zephyr and HAL API functions
LL_I2C_EnableWakeUpFromStop() and LL_I2C_DisableWakeUpFromStop()
are not implemented in the H7 HAL/LL drivers.

This change ports into the STM32 RTIO driver the change made in the
non-RTIO driver through commit 1804eb7bc3 ("drivers: i2c: stm32:
exclude stm32f7 family for PM").

Back ported from commit 5ff3dbeeee ("drivers: i2c: stm32: exclude
stm32f7 family for PM in RTIO driver").

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-09-08 14:43:41 -07:00
Etienne Carriere
d1a9ef6b0b drivers: i2c: stm32: sync stm32_v2 RTIO on PM runtime state
Always call pm_device_runtime_get() when registering a target
even if the device is not wakeup capable to prevent I2C target not being
function if the device goes into a SoC Stop mode.

This change ports into the STM32 v2 RTIO driver the change made in the
non-RTIO driver through commit 67f80e35b8 ("i2c: stm32: always call
runtime_get when registering targets").

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
(cherry picked from commit 181e544550)
2025-09-08 14:43:41 -07:00
Stephanos Ioannidis
bf9345a1ec SDK_VERSION: Use Zephyr SDK 0.17.4
This commit updates ZEPHYR_SDK to point to the Zephyr SDK 0.17.4 release.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
(cherry picked from commit 59a5909abb)
2025-09-07 15:41:24 -07:00
Stephanos Ioannidis
7f89472f14 ci: Switch to CI image v0.28.4
This commit updates the CI workflows to use the CI image v0.28.4, which
includes Zephyr SDK 0.17.4.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
(cherry picked from commit 13ba04fd1f)
2025-09-07 15:41:24 -07:00
Andreas Schmidt
e3a55c96ef dts: arm: st: u5: fix wkup-pin@8 referencing non-existent port gpiof
With commit d280d89 the gpiof port got moved from file stm32u5.dtsi to
file stm32u5_extra.dtsi. stm32u5_extra.dtsi is not included for
STM32U535/545. In same file stm32u5.dtsi still node wkup-pin@8 references
non-existent port gpiof.

Fixes #93445

Signed-off-by: Andreas Schmidt <andreas.schmidt@dormakaba.com>
(cherry picked from commit 528ab9d9c2)
2025-09-07 15:39:28 -07:00
Johann Fischer
663da2302b doc: update pyOCD repository links
The repository has been moved to a new organization, see
https://pyocd.io/. Update links to the pyOCD repository.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
(cherry picked from commit 617b71bc17)
2025-09-02 22:15:47 -07:00
Robin Kastberg
4670cb27c7 iar: ltorg directive not supported
Currently this directive is not supported in EWARM 9.70.1,
it will be in future versions, but we want Zephyr 4.2
to work with IAR EWARM 9.70.1.

Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
(cherry picked from commit fa165da667)
2025-08-22 18:50:36 -05:00
Tim Pambor
a55b5444c6 twister: Fix race condition in try_making_symlink
Replaces the check-then-create pattern for symlinks with
opportunistic creation. Instead of checking for existence
before creating the symlink, the code now attempts to
create it directly and gracefully handles the case
where it already exists.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
(cherry picked from commit dff24c8c00)
2025-08-22 16:49:22 -07:00
Keith Packard
c1adc507d7 west: Update picolibc to version being proposed for SDK 0.17.4
We're trying to re-synchronize picolibc bits across Zephyr and the Zephyr
SDK. At this point, SDK 0.17.3 is missing some minor updates found in the
module and the module is missing a commit from the SDK.

Signed-off-by: Keith Packard <keithp@keithp.com>
2025-08-21 13:33:13 -07:00
Bas van Loon
e918bdac38 fs/ext2: Fix NULL dereference when fs_stat queries root.
When fs_stat() queries the root / mountpoint it should return its root
i_node but instead it tries to return the parent i_node which does not
exist. Fix this by checking if parent is set otherwise return the root
i_node.

Fixes https://github.com/zephyrproject-rtos/zephyr/issues/94000.

Signed-off-by: Bas van Loon <bas@arch-embedded.com>
(cherry picked from commit 1dcf123e2d)
2025-08-21 13:32:22 -07:00
Pieter De Gendt
8b5e0388cf drivers: ethernet: nxp_imx_netc: Fix LAA bit location
The Locally Administered Address (LAA) bit should be set on the first
octet of the MAC address.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
(cherry picked from commit f1b4c7c992)
2025-08-20 18:11:35 -07:00
Pieter De Gendt
3b7610ec5f drivers: ethernet: stm32: Set LAA bit on MAC address based on device ID
The MAC addressed derived from the device ID is not assigned by the
manufacturer and therefor the Locally Administered Address (LAA) bit should
be set.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
(cherry picked from commit 300016c801)
2025-08-20 18:09:50 -07:00
Daniel Flodin
2b0f179079 cmake: assembler optimization options
Commit f499ea0 made it so that the compiler optimization flags are also
passed to the assembler. However, this breaks for the IAR toolchain
since it uses the GNU assembler which does not have the same
optimization flags as the IAR compiler.

This commit separates the compiler and assembler optimizations to make
it possible to specify appropriate flags in a toolchains corresponding
`compiler_flags.cmake`

Signed-off-by: Daniel Flodin <daniel.flodin@iar.com>
(cherry picked from commit a4b66f9214)
2025-08-20 18:03:03 -07:00
Ofir Shemesh
ff9fb454c6 misc: flexram: allow RAM type node to be disabled in DT
Use DT_NODE_HAS_COMPAT_STATUS to skip disabled child nodes. This
avoids build errors when setting a RAM type to 0 banks.

Signed-off-by: Ofir Shemesh <ofirshemesh777@gmail.com>
(cherry picked from commit 169b47ce38)
2025-08-19 13:28:40 -05:00
Marc Lasch
5282c9fdc8 drivers: net: ppp: Fix link-layer address configuration
Restore setting the ppp link-local address either to CONFIG_PPP_MAC_ADDR or
to a random value 00:00:5e:00:53:XX instead of leaving it uninitialized.

Recently the memory handling for the link-layer addresses was changed from
an approach of copying pointers to managing the memory as a member of the
`net_linkaddr` struct (ref ac3cb9dac0).

The piece of code this patch touches however, relied on the use of the
pointers to function properly.

With the recent change, the MAC address was copied to the new member
location before it was even set (either from Kconfig or selected randomly).
As a result, the link-layer address was kept initialized to zero, which
resulted in a IPv6 address of fe80::ff:fe00:0 which is exactly the
link-local EUI-64 representation of the MAC address 00:00:00:00:00:00
(without flipping the "universal/local" bit).

Signed-off-by: Marc Lasch <marc.lasch@husqvarnagroup.com>
(cherry picked from commit 15048337c4)
2025-08-18 11:09:20 -05:00
Fabrice DJIATSA
ee0aecc953 boards: st: nucleo_u385rg_q: update clock domain source for rng
Several tests failed due to a low clock frequency for
the RNG peripheral.
Increase the RNG clock frequency by providing MSIK with
96 MHz as the domain source.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
(cherry picked from commit ac733b1ae9)
2025-08-18 11:08:56 -05:00
Pieter De Gendt
21c942f18c drivers: regulator: shell: Fix regulator parent name completion
Shell functions targeting regulator parents used the auto-completion of
regulator devices instead.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
(cherry picked from commit 576b3daffa)
2025-08-11 10:56:54 -05:00
Maureen Helm
f017af445e drivers: udc: Fix max32 driver high speed support
High speed support has been broken for the max32 driver since commit
faeabc63c9.

Signed-off-by: Maureen Helm <maureen.helm@analog.com>
(cherry picked from commit a4c757adc2)
2025-08-11 10:56:19 -05:00
Tahsin Mutlugun
01949d478d tests: drivers: spi: spi_loopback: Update slow rates for MAX32 boards
The requested SPI clock rate and the actual rate that is set can be
different depending on the peripheral clock and divisors available to
the SPI peripheral. For some MAX32 SoCs, actual rate ended up being
higher than the devicetree setting. This would then cause latency tests
to fail as transfers finish earlier than minimum expected duration.

Update the test frequency values in several MAX32 board overlays to pass
latency tests.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
(cherry picked from commit 3de5883fc1)
2025-08-11 10:55:53 -05:00
Tahsin Mutlugun
0dbc00a63b drivers: spi: spi_max32: Return proper error codes in spi_configure
spi_configure was returning HAL error codes that are incompatible with
Zephyr error definitions straight back to the caller. Replace these with
error codes that Zephyr can correctly interpret.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
(cherry picked from commit edc9ff951d)
2025-08-11 10:55:53 -05:00
Tahsin Mutlugun
94b74dbd89 drivers: spi: spi_max32: Fix word size support
Driver was not handling SPI word sizes other than 8 bits. Apply DFS
shift wherever necessary to support non 8-bit transfers.

DMA mode cannot support word sizes that are less than 8 bits so return
-ENOTSUP if word size less than 8-bits is required.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
(cherry picked from commit f47449e7e9)
2025-08-11 10:55:53 -05:00
Robert Lubos
4c362f1aec tests: net: socket: tcp: Add test for keepalive connection upkeep
Add test verifying that if keep-alive messages are exchanged, the
connection remains alive.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
(cherry picked from commit dcbd1ed5fc)
2025-08-11 10:54:29 -05:00
Robert Lubos
bafc9f2a66 net: tcp: Fix handling of keep-alive probes
Keep-alive probes have seq number set to SND.NXT - 1 and may or may not
contain an octet of data. The latter case was not handled properly
therefore add a special case when validating seq number to response to
keep-alive probes.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
(cherry picked from commit d93c5d6072)
2025-08-11 10:54:29 -05:00
Henrik Brix Andersen
30de5e8a2c drivers: console: posix_arch_console: remove build warning
Remove build warning when building the posix_arch_console driver with
CONFIG_PRINTK=n and CONFIG_STDOUT_CONSOLE=n.

Fixes: #93790

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
(cherry picked from commit 3eedebe031)
2025-08-04 12:05:41 -05:00
Anas Nashif
ff6295f930 tests: llext: disable debug logging
disable debug in general as it is too verbose and hides test output.
However, this now fixes an issue in the test itself after 4.2 release.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
(cherry picked from commit 94e0e5ae85)
2025-08-04 10:32:43 -05:00
Armando Visconti
738e159ede drivers/sensor/: lis2dux12: fix ODR setting
In lis2dux12_freq_to_odr_val, the loop through the array of possible ODR
frequencies can break sooner than expected if power-mode is
set to High Performance mode and the requested ODR is less than or
equal to 25Hz.

Moreover, move the "odr |= 0x10" statement used for HP mode in the
chip_api set_odr_raw() API, so that we enter the HP mode even when the
ODR is set from DT only.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
(cherry picked from commit 0d38a88666)
2025-07-30 11:05:12 -05:00
IBEN EL HADJ MESSAOUD Marwa
183444eed4 drivers: usb: udc: prevent USB clock disable in sleep mode
Prevent disabling OTG HS and USBPHY clocks
during sleep on STM32U5 series

Disabling these clocks during sleep mode
was causing USB device initialization issues

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
(cherry picked from commit 8b355e9306)
2025-07-29 12:23:36 -07:00
IBEN EL HADJ MESSAOUD Marwa
e2efcf7cb6 drivers: usb: device: prevent USB clock disable in sleep mode
Prevent disabling OTG HS and USBPHY clocks
during sleep on STM32U5 series

Disabling these clocks during sleep mode
was causing USB device initialization issues

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
(cherry picked from commit d4b2808b68)
2025-07-29 12:23:36 -07:00
Luis Ubieda
a494c09fcb i3c: stm32: Prevent mutex deadlock on DAA failure
Make sure this function always unlocks bus_mutex.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
(cherry picked from commit ef41627f81)
2025-07-29 12:23:20 -07:00
Martin Stumpf
fb8687a492 spi_nxp_lpspi: Fix underflow in lpspi sck calculation
If `desired_delay_ns` is `0`, it is much saner to set the delay to `0x00`
than to underflow and set it to `0xff`, which is the current behavior.

Signed-off-by: Martin Stumpf <finomnis@gmail.com>
(cherry picked from commit 860f9c8ef5)
2025-07-29 12:51:34 -05:00
Tomislav Milkovic
7abcf05115 doc: connectivity: networking: api: tftp: Fix Kconfig option
Instead of CONFIG_MQTT_SN_LIB, correct Kconfig option to
enable TFTP client library is CONFIG_TFTP_LIB

Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
(cherry picked from commit 5410f74664)
2025-07-29 12:50:31 -05:00
Bjarki Arge Andreasen
2ff7f15e5f drivers: can: nrf: fix invalid pointer leading to undef behavior
The can_nrf device driver incorrectly passes its own device
driver pointer to a call to clock_control_get_rate() to get the
rate of the auxpll. The actual device driver which should be passed
to clock_control_get_rate() is the auxpll.

Without this fix, the call jumps to the can_nrf_api and returns
garbage (unfortunately it does not hardfault, which is why this
issue has not been discovered yet).

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
(cherry picked from commit f5ee52ecf3)
2025-07-29 12:43:56 -05:00
Axel Utech
d1f998909d dts: arm: st: u0: fix lpuart1/2 interrupts
Interrupt vectors for lpuart1 and lpuart2 are swapped according to the
reference manual RM0503 table 54.
Fixes the usage of the interrupt-driven uart API.

Signed-off-by: Axel Utech <utech@sofiha.de>
(cherry picked from commit 4664f600d6)
2025-07-27 12:09:37 -07:00
Benjamin Cabé
a9f222b9a7 boards: arduino: nicla_vision: fix VL53L1X I2C address
Nicla Vision datasheet is referring to the 8-bit wire address (0x52) for
the VL53L1X sensor, so that's likely what ended up being used in the
board's devicetree. However, it's the 7-bit I2C address that should be
used so fix that by changing the I2C address to 0x29. Successfully
tested on actual hardware.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
(cherry picked from commit a663b2b374)
2025-07-27 10:58:16 -07:00
Florian La Roche
58be950216 net: sockets: add missing break
Add a missing break to socket handling.

Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
(cherry picked from commit d933e0301e)
2025-07-27 10:56:20 -07:00
Pieter De Gendt
02f511bb93 doc: release: 4.2: Fix entry in new APIs
Add a missing newline to fix the formatting of the LoRaWAN entry.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
(cherry picked from commit 4867d45647)
2025-07-27 10:56:05 -07:00
16647 changed files with 180232 additions and 634524 deletions

View File

@@ -29,4 +29,3 @@
--ignore ENOSYS
--ignore IS_ENABLED_CONFIG
--ignore EXPORT_SYMBOL
--ignore COMPARISON_TO_NULL

View File

@@ -86,10 +86,6 @@ indent_size = 8
[COMMIT_EDITMSG]
max_line_length = 75
# Patches
[{*.patch,*.diff}]
trim_trailing_whitespace = false
# Kconfig
[Kconfig*]
indent_style = tab

View File

@@ -1,4 +1,4 @@
name: Pull Request/Issue Assigner
name: Pull Request Assigner
on:
pull_request_target:
@@ -20,38 +20,27 @@ permissions:
jobs:
assignment:
name: Pull Request/Issue Assignment
name: Pull Request Assignment
if: github.event.pull_request.draft == false
runs-on: ubuntu-24.04
permissions:
pull-requests: write # to add assignees to pull requests
issues: write # to add assignees to issues
steps:
- name: Check out source code
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
with:
fetch-depth: 0
persist-credentials: false
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- name: Set up Python
uses: zephyrproject-rtos/action-python-env@ace91a63fd503cd618ff1eb83fbcf302dabd7d44 # main
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
cache-dependency-path: scripts/requirements-actions.txt
- name: Fetch west.yml from pull request
if: >
github.event_name == 'pull_request_target'
- name: Install Python packages
run: |
git fetch origin pull/${{ github.event.pull_request.number }}/merge
git show FETCH_HEAD:west.yml > pr_west.yml
- name: west setup
if: >
github.event_name == 'pull_request_target'
run: |
git config --global user.email "you@example.com"
git config --global user.name "Your Name"
west init -l . || true
pip install -r scripts/requirements-actions.txt --require-hashes
- name: Run assignment script
env:
@@ -62,13 +51,14 @@ jobs:
FLAGS+=" -r ${{ github.event.repository.name }}"
FLAGS+=" -M MAINTAINERS.yml"
if [ "${{ github.event_name }}" = "pull_request_target" ]; then
FLAGS+=" -P ${{ github.event.pull_request.number }} --updated-manifest pr_west.yml"
FLAGS+=" -P ${{ github.event.pull_request.number }}"
elif [ "${{ github.event_name }}" = "issues" ]; then
FLAGS+=" -I ${{ github.event.issue.number }}"
FLAGS+=" -I ${{ github.event.issue.number }}"
elif [ "${{ github.event_name }}" = "schedule" ]; then
FLAGS+=" --modules"
FLAGS+=" --modules"
else
echo "Unknown event: ${{ github.event_name }}"
exit 1
fi
python3 scripts/set_assignees.py $FLAGS

View File

@@ -26,10 +26,10 @@ jobs:
steps:
- name: Check out source code
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip

View File

@@ -42,7 +42,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.4.20250818
options: '--entrypoint /bin/bash'
env:
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
@@ -74,7 +74,7 @@ jobs:
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
fetch-depth: 0
@@ -97,12 +97,8 @@ jobs:
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Install Python packages
run: |
pip install -r scripts/requirements-actions.txt --require-hashes
- name: Check common triggering files
uses: tj-actions/changed-files@24d32ffd492484c1d75e0c0b894501ddb9d30d62 # v47.0.0
uses: tj-actions/changed-files@ed68ef82c095e0d48ec87eccea555d944a631a4c # v46.0.5
id: check-common-files
with:
files: |
@@ -121,7 +117,7 @@ jobs:
modules/hal_nordic/**
- name: Check if Bluethooth files changed
uses: tj-actions/changed-files@24d32ffd492484c1d75e0c0b894501ddb9d30d62 # v47.0.0
uses: tj-actions/changed-files@ed68ef82c095e0d48ec87eccea555d944a631a4c # v46.0.5
id: check-bluetooth-files
with:
files: |
@@ -131,7 +127,7 @@ jobs:
tests/bsim/bluetooth/
- name: Check if Networking files changed
uses: tj-actions/changed-files@24d32ffd492484c1d75e0c0b894501ddb9d30d62 # v47.0.0
uses: tj-actions/changed-files@ed68ef82c095e0d48ec87eccea555d944a631a4c # v46.0.5
id: check-networking-files
with:
files: |
@@ -144,7 +140,7 @@ jobs:
include/zephyr/net/ieee802154*
- name: Check if UART files changed
uses: tj-actions/changed-files@24d32ffd492484c1d75e0c0b894501ddb9d30d62 # v47.0.0
uses: tj-actions/changed-files@ed68ef82c095e0d48ec87eccea555d944a631a4c # v46.0.5
id: check-uart-files
with:
files: |

View File

@@ -8,6 +8,7 @@ name: Bug Snapshot
on:
workflow_dispatch:
branches: [main]
schedule:
# Run daily at 00:05
- cron: '5 00 * * *'
@@ -19,14 +20,14 @@ jobs:
make_bugs_pickle:
name: Make bugs pickle
runs-on: ubuntu-24.04
if: github.repository_owner == 'zephyrproject-rtos' && github.ref == 'refs/heads/main'
if: github.repository_owner == 'zephyrproject-rtos'
steps:
- name: Checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
@@ -51,7 +52,7 @@ jobs:
echo "BUGS_PICKLE_PATH=${BUGS_PICKLE_PATH}" >> ${GITHUB_ENV}
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
uses: aws-actions/configure-aws-credentials@b47578312673ae6fa5b5096b330d9fbac3d116df # v4.2.1
with:
aws-access-key-id: ${{ vars.AWS_BUILDS_ZEPHYR_BUG_SNAPSHOT_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_BUILDS_ZEPHYR_BUG_SNAPSHOT_SECRET_ACCESS_KEY }}

View File

@@ -18,7 +18,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.4.20250818
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
@@ -53,7 +53,7 @@ jobs:
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
fetch-depth: 0
persist-credentials: false
@@ -86,10 +86,6 @@ jobs:
gcc --version
ls -la
- name: Install Python packages
run: |
pip install -r scripts/requirements-actions.txt --require-hashes
- name: Set up ccache
run: |
mkdir -p ${CCACHE_DIR}
@@ -113,7 +109,7 @@ jobs:
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=llvm
./scripts/twister -p native_sim --force-color --inline-logs -M -N -v --retry-failed 2 \
./scripts/twister -p native_sim --no-detailed-test-id --force-color --inline-logs -M -N -v --retry-failed 2 \
-T tests --subset ${{matrix.subset}}/2 -j 16
- name: Print ccache stats
@@ -140,18 +136,18 @@ jobs:
if: (success() || failure())
steps:
- name: Checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
fetch-depth: 0
persist-credentials: false
- name: Download Artifacts
uses: actions/download-artifact@634f93cb2916e3fdff6788551b99b062d0335ce0 # v5.0.0
uses: actions/download-artifact@d3f86a106a0bac45b974a628896c90dbdf5c8093 # v4.3.0
with:
path: artifacts
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
@@ -163,7 +159,7 @@ jobs:
- name: Merge Test Results
run: |
junitparser merge --glob 'artifacts/*/twister.xml' 'artifacts/*/*/twister.xml' junit.xml
junitparser merge artifacts/*/twister.xml junit.xml
junit2html junit.xml junit-clang.html
- name: Upload Unit Test Results in HTML

View File

@@ -1,11 +1,8 @@
name: Code Coverage with codecov
on:
push:
branches:
- main
- v*-branch
- collab-*
schedule:
- cron: '25 06,18 * * *'
permissions:
contents: read
@@ -20,7 +17,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.4.20250818
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
@@ -67,12 +64,12 @@ jobs:
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
fetch-depth: 0
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
@@ -115,24 +112,6 @@ jobs:
-T tests --coverage-tool gcovr -xCONFIG_TEST_EXTRA_STACK_SIZE=4096 -e nano \
--timeout-multiplier 2
- name: Build Doxygen Coverage
if: matrix.platform == 'unit_testing'
run: |
pip install -r doc/requirements.txt --require-hashes
sudo apt-get update
sudo apt-get install -y graphviz # dot is needed but currently missing from the Docker image
cmake -B doc/_build -S doc
cmake --build doc/_build --target doxygen-coverage
- name: Upload Doxygen Coverage Results
if: matrix.platform == 'unit_testing'
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
with:
name: doxygen-coverage-results
path: |
doc/_build/new.info
doc/_build/coverage-report
- name: Print ccache stats
if: always()
run: |
@@ -161,12 +140,12 @@ jobs:
steps:
- name: checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
fetch-depth: 0
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
@@ -177,7 +156,7 @@ jobs:
pip install -r scripts/requirements-actions.txt --require-hashes
- name: Download Artifacts
uses: actions/download-artifact@634f93cb2916e3fdff6788551b99b062d0335ce0 # v5.0.0
uses: actions/download-artifact@d3f86a106a0bac45b974a628896c90dbdf5c8093 # v4.3.0
with:
path: coverage/reports
@@ -251,25 +230,12 @@ jobs:
coverage/reports/coverage-report-${{ steps.run_date.outputs.run_date_short }}.json
coverage/reports/coverage-report-${{ steps.run_date.outputs.run_date_short }}.xlsx
- name: Upload test coverage to Codecov
- name: Upload coverage to Codecov
if: always()
uses: codecov/codecov-action@5a1091511ad55cbe89839c7260b706298ca349f7 # v5.5.1
uses: codecov/codecov-action@18283e04ce6e62d37312384ff67231eb8fd56d24 # v5.4.3
with:
env_vars: OS,PYTHON
fail_ci_if_error: false
verbose: true
token: ${{ secrets.CODECOV_TOKEN }}
files: coverage/reports/merged.xml
flags: unittests-coverage
- name: Upload Doxygen coverage to Codecov
if: always()
uses: codecov/codecov-action@5a1091511ad55cbe89839c7260b706298ca349f7 # v5.5.1
with:
env_vars: OS,PYTHON
fail_ci_if_error: false
verbose: true
token: ${{ secrets.CODECOV_TOKEN }}
files: coverage/reports/doxygen-coverage-results/new.info
disable_search: true
flags: doxygen-coverage

View File

@@ -36,10 +36,10 @@ jobs:
config: ./.github/codeql/codeql-js-config.yml
steps:
- name: Checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- name: Initialize CodeQL
uses: github/codeql-action/init@64d10c13136e1c5bce3e5fbde8d4906eeaafc885 # v3.30.6
uses: github/codeql-action/init@181d5eefc20863364f96762470ba6f862bdef56b # v3.29.2
with:
languages: ${{ matrix.language }}
build-mode: ${{ matrix.build-mode }}
@@ -53,6 +53,6 @@ jobs:
exit 0
- name: Perform CodeQL Analysis
uses: github/codeql-action/analyze@64d10c13136e1c5bce3e5fbde8d4906eeaafc885 # v3.30.6
uses: github/codeql-action/analyze@181d5eefc20863364f96762470ba6f862bdef56b # v3.29.2
with:
category: "/language:${{matrix.language}}"

View File

@@ -11,13 +11,13 @@ jobs:
name: Run coding guidelines checks on patch series (PR)
steps:
- name: Checkout the code
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip

View File

@@ -21,7 +21,7 @@ jobs:
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: Checkout the code
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
@@ -44,7 +44,7 @@ jobs:
git log --pretty=oneline | head -n 10
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
@@ -60,17 +60,6 @@ jobs:
west config manifest.group-filter -- +ci,-optional
west update -o=--depth=1 -n 2>&1 1> west.update.log || west update -o=--depth=1 -n 2>&1 1> west.update2.log
- name: Setup Node.js
uses: actions/setup-node@2028fbc5c25fe9cf00d9f06a71cc4710d4507903 # v6.0.0
with:
node-version: "lts/*"
cache: npm
check-latest: true
cache-dependency-path: ./scripts/ci/package-lock.json
- name: Install Node dependencies
run: npm --prefix ./scripts/ci ci
- name: Run Compliance Tests
continue-on-error: true
id: compliance
@@ -97,21 +86,13 @@ jobs:
name: compliance.xml
path: compliance.xml
- name: Upload dts linter patch
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
continue-on-error: true
if: hashFiles('dts_linter.patch') != ''
with:
name: dts_linter.patch
path: dts_linter.patch
- name: check-warns
run: |
if [[ ! -s "compliance.xml" ]]; then
exit 1;
fi
warns=("ClangFormat" "LicenseAndCopyrightCheck")
warns=("ClangFormat")
files=($(./scripts/ci/check_compliance.py -l))
for file in "${files[@]}"; do
@@ -136,3 +117,8 @@ jobs:
echo "You can run this step locally with the ./scripts/ci/check_compliance.py script."
exit 1;
fi
if [ "${{ steps.pr_description.outcome }}" == "failure" ]; then
echo "PR description cannot be empty"
exit 1;
fi

View File

@@ -20,19 +20,19 @@ jobs:
steps:
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
uses: aws-actions/configure-aws-credentials@b47578312673ae6fa5b5096b330d9fbac3d116df # v4.2.1
with:
aws-access-key-id: ${{ vars.AWS_TESTING_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_TESTING_SECRET_ACCESS_KEY }}
aws-region: us-east-1
- name: checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
fetch-depth: 0
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip

View File

@@ -33,10 +33,10 @@ jobs:
os: [ubuntu-22.04, macos-14, windows-2022]
steps:
- name: checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: ${{ matrix.python-version }}
cache: pip

View File

@@ -4,9 +4,9 @@
name: Documentation Build
on:
schedule:
- cron: '0 */3 * * *'
push:
branches:
- main
tags:
- v*
pull_request:
@@ -17,7 +17,7 @@ permissions:
env:
DOXYGEN_VERSION: 1.14.0
DOXYGEN_MD5SUM: e761a5097ae20ecccfd02041925f102a
JOB_COUNT: 8
JOB_COUNT: 4
jobs:
doc-file-check:
@@ -27,12 +27,12 @@ jobs:
file_check: ${{ steps.check-doc-files.outputs.any_modified }}
steps:
- name: checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Check if Documentation related files changed
uses: tj-actions/changed-files@24d32ffd492484c1d75e0c0b894501ddb9d30d62 # v47.0.0
uses: tj-actions/changed-files@ed68ef82c095e0d48ec87eccea555d944a631a4c # v46.0.5
id: check-doc-files
with:
files: |
@@ -56,75 +56,71 @@ jobs:
needs: [doc-file-check]
if: >
needs.doc-file-check.outputs.file_check == 'true' || github.event_name != 'pull_request'
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
options: '--entrypoint /bin/bash'
timeout-minutes: 60
runs-on: ubuntu-24.04
timeout-minutes: 90
concurrency:
group: doc-build-html-${{ github.ref }}
cancel-in-progress: true
env:
BASE_REF: ${{ github.base_ref }}
steps:
- name: Print cloud service information
- name: install-pkgs
run: |
echo "ZEPHYR_RUNNER_CLOUD_PROVIDER = ${ZEPHYR_RUNNER_CLOUD_PROVIDER}"
echo "ZEPHYR_RUNNER_CLOUD_NODE = ${ZEPHYR_RUNNER_CLOUD_NODE}"
echo "ZEPHYR_RUNNER_CLOUD_POD = ${ZEPHYR_RUNNER_CLOUD_POD}"
sudo apt-get update
sudo apt-get install -y wget python3-pip git ninja-build graphviz lcov
wget --no-verbose "https://github.com/doxygen/doxygen/releases/download/Release_${DOXYGEN_VERSION//./_}/doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz"
echo "${DOXYGEN_MD5SUM} doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz" | md5sum -c
if [ $? -ne 0 ]; then
echo "Failed to verify doxygen tarball"
exit 1
fi
sudo tar xf doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz -C /opt
echo "/opt/doxygen-${DOXYGEN_VERSION}/bin" >> $GITHUB_PATH
echo "${HOME}/.local/bin" >> $GITHUB_PATH
- name: Apply container owner mismatch workaround
run: |
# FIXME: The owner UID of the GITHUB_WORKSPACE directory may not
# match the container user UID because of the way GitHub
# Actions runner is implemented. Remove this workaround when
# GitHub comes up with a fundamental fix for this problem.
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: Clone cached Zephyr repository
continue-on-error: true
run: |
git clone --shared /repo-cache/zephyrproject/zephyr .
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
- name: checkout
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
path: zephyr
- name: Environment Setup
- name: Rebase
if: github.event_name == 'pull_request'
continue-on-error: true
env:
BASE_REF: ${{ github.base_ref }}
PR_HEAD: ${{ github.event.pull_request.head.sha }}
working-directory: zephyr
run: |
if [ "${{github.event_name}}" = "pull_request" ]; then
git config --global user.email "bot@zephyrproject.org"
git config --global user.name "Zephyr Builder"
rm -fr ".git/rebase-apply"
rm -fr ".git/rebase-merge"
git rebase origin/${BASE_REF}
git clean -f -d
git log --pretty=oneline | head -n 10
fi
echo "$HOME/.local/bin" >> $GITHUB_PATH
echo "$HOME/.cargo/bin" >> $GITHUB_PATH
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
rm -fr ".git/rebase-apply"
rm -fr ".git/rebase-merge"
git rebase origin/${BASE_REF}
git clean -f -d
git log --graph --oneline HEAD...${PR_HEAD}
west init -l . || true
west config --global update.narrow true
west update --path-cache /repo-cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /repo-cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /repo-cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
- name: Set up Python
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
cache-dependency-path: doc/requirements.txt
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Setup Zephyr project
uses: zephyrproject-rtos/action-zephyr-setup@b2453c72966ee67b1433be22b250348d48283286 # v1.0.7
with:
app-path: zephyr
toolchains: 'all'
- name: Install Python packages required for documentation build
- name: install-pip
working-directory: zephyr
run: |
pip install -r scripts/requirements-actions.txt --require-hashes
pip install -r doc/requirements.txt --require-hashes
- name: Build HTML documentation
- name: build-docs
shell: bash
working-directory: zephyr
run: |
if [[ "$GITHUB_REF" =~ "refs/tags/v" ]]; then
DOC_TAG="release"
@@ -149,26 +145,26 @@ jobs:
lcov --remove doc-coverage.info \*/deprecated > new.info
genhtml --no-function-coverage --no-branch-coverage new.info -o coverage-report
- name: Compress documentation build artifacts
- name: compress-docs
working-directory: zephyr
run: |
tar --use-compress-program="xz -T0" -cf html-output.tar.xz --exclude html/_sources --exclude html/doxygen/xml --directory=doc/_build html
tar --use-compress-program="xz -T0" -cf api-output.tar.xz --directory=doc/_build html/doxygen/html
tar --use-compress-program="xz -T0" -cf api-coverage.tar.xz coverage-report
- name: Upload HTML output
- name: upload-build
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
with:
name: html-output
path: html-output.tar.xz
path: zephyr/html-output.tar.xz
- name: Upload Doxygen coverage artifacts
- name: upload-api-coverage
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
with:
name: api-coverage
path: api-coverage.tar.xz
path: zephyr/api-coverage.tar.xz
- name: Summarize PR documentation URLs
- name: process-pr
if: github.event_name == 'pull_request'
run: |
REPO_NAME="${{ github.event.repository.name }}"
@@ -182,7 +178,7 @@ jobs:
echo "API Documentation will be available shortly at: ${API_DOC_URL}" >> $GITHUB_STEP_SUMMARY
echo "API Coverage Report will be available shortly at: ${API_COVERAGE_URL}" >> $GITHUB_STEP_SUMMARY
- name: Upload PR number
- name: upload-pr-number
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
if: github.event_name == 'pull_request'
with:
@@ -202,12 +198,12 @@ jobs:
steps:
- name: checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
path: zephyr
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
@@ -230,11 +226,10 @@ jobs:
echo "/opt/doxygen-${DOXYGEN_VERSION}/bin" >> $GITHUB_PATH
- name: Setup Zephyr project
uses: zephyrproject-rtos/action-zephyr-setup@c125c5ebeeadbd727fa740b407f862734af1e52a # v1.0.9
uses: zephyrproject-rtos/action-zephyr-setup@b2453c72966ee67b1433be22b250348d48283286 # v1.0.7
with:
app-path: zephyr
toolchains: 'arm-zephyr-eabi'
enable-ccache: false
- name: install-pip-pkgs
working-directory: zephyr

View File

@@ -33,7 +33,7 @@ jobs:
- name: Load PR number
if: steps.download-artifacts.outputs.found_artifact == 'true'
uses: actions/github-script@ed597411d8f924073f98dfc5c65a23a2325f34cd # v8.0.0
uses: actions/github-script@60a0d83039c74a4aee543508d2ffcb1c3799cdea # v7.0.1
with:
script: |
let fs = require("fs");
@@ -66,7 +66,7 @@ jobs:
- name: Configure AWS Credentials
if: steps.download-artifacts.outputs.found_artifact == 'true'
uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
uses: aws-actions/configure-aws-credentials@b47578312673ae6fa5b5096b330d9fbac3d116df # v4.2.1
with:
aws-access-key-id: ${{ vars.AWS_BUILDS_ZEPHYR_PR_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_BUILDS_ZEPHYR_PR_SECRET_ACCESS_KEY }}

View File

@@ -40,7 +40,7 @@ jobs:
fi
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
uses: aws-actions/configure-aws-credentials@b47578312673ae6fa5b5096b330d9fbac3d116df # v4.2.1
with:
aws-access-key-id: ${{ vars.AWS_DOCS_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_DOCS_SECRET_ACCESS_KEY }}

View File

@@ -5,7 +5,6 @@ on:
- '.github/workflows/errno.yml'
- 'lib/libc/minimal/include/errno.h'
- 'scripts/ci/errno.py'
- 'SDK_VERSION'
permissions:
contents: read
@@ -13,24 +12,26 @@ permissions:
jobs:
check-errno:
runs-on: ubuntu-24.04
steps:
- name: checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
with:
path: zephyr
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.28.4
- name: Setup Zephyr project
uses: zephyrproject-rtos/action-zephyr-setup@c125c5ebeeadbd727fa740b407f862734af1e52a # v1.0.9
with:
app-path: zephyr
toolchains: 'arm-zephyr-eabi'
west-group-filter: -hal,-tools,-bootloader,-babblesim
west-project-filter: -nrf_hw_models
enable-ccache: false
steps:
- name: Apply container owner mismatch workaround
run: |
# FIXME: The owner UID of the GITHUB_WORKSPACE directory may not
# match the container user UID because of the way GitHub
# Actions runner is implemented. Remove this workaround when
# GitHub comes up with a fundamental fix for this problem.
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: checkout
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- name: Environment Setup
run: |
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Run errno.py
working-directory: zephyr
run: |
export ZEPHYR_SDK_INSTALL_DIR=${{ github.workspace }}/zephyr-sdk
export ZEPHYR_BASE=${PWD}
./scripts/ci/errno.py

View File

@@ -28,7 +28,7 @@ jobs:
group: zephyr-runner-v2-linux-x64-4xlarge
if: github.repository_owner == 'zephyrproject-rtos'
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.4.20250818
options: '--entrypoint /bin/bash'
defaults:
run:
@@ -62,13 +62,13 @@ jobs:
sudo apt-get install -y python3-venv
- name: checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
@@ -89,7 +89,7 @@ jobs:
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
uses: aws-actions/configure-aws-credentials@b47578312673ae6fa5b5096b330d9fbac3d116df # v4.2.1
with:
aws-access-key-id: ${{ vars.AWS_TESTING_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_TESTING_SECRET_ACCESS_KEY }}

View File

@@ -18,7 +18,7 @@ jobs:
issues: write # to comment on issues
steps:
- uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
- uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- uses: zephyrproject-rtos/action-first-interaction@58853996b1ac504b8e0f6964301f369d2bb22e5c # v1.1.1+zephyr.6
with:
repo-token: ${{ secrets.GITHUB_TOKEN }}
@@ -45,7 +45,7 @@ jobs:
and update (by amending and force-pushing the commits) your pull request if necessary.
If you are stuck or need help please join us on [Discord](https://chat.zephyrproject.org/)
and ask your question there. Additionally, you can [escalate the review](https://docs.zephyrproject.org/latest/contribute/contributor_expectations.html#pr-technical-escalation)
and ask your question there. Additionally, you can [escalate the review](https://docs.zephyrproject.org/latest/contribute/contributor_expectations.html#pr-review-escalation)
when applicable. 😊
pr-merged-message: >

View File

@@ -28,11 +28,11 @@ jobs:
strategy:
fail-fast: false
matrix:
os: [ubuntu-22.04, ubuntu-24.04, ubuntu-24.04-arm, macos-14, windows-2022]
os: [ubuntu-22.04, ubuntu-24.04, macos-13, macos-14, windows-2022]
runs-on: ${{ matrix.os }}
steps:
- name: Checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
path: zephyr
fetch-depth: 0
@@ -54,16 +54,15 @@ jobs:
git log --graph --oneline HEAD...${PR_HEAD}
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
- name: Setup Zephyr project
uses: zephyrproject-rtos/action-zephyr-setup@c125c5ebeeadbd727fa740b407f862734af1e52a # v1.0.9
uses: zephyrproject-rtos/action-zephyr-setup@b2453c72966ee67b1433be22b250348d48283286 # v1.0.7
with:
app-path: zephyr
toolchains: aarch64-zephyr-elf:arc-zephyr-elf:arc64-zephyr-elf:arm-zephyr-eabi:mips-zephyr-elf:riscv64-zephyr-elf:sparc-zephyr-elf:x86_64-zephyr-elf:xtensa-dc233c_zephyr-elf:xtensa-sample_controller32_zephyr-elf:rx-zephyr-elf
ccache-cache-key: hw-${{ matrix.os }}
- name: Build firmware
working-directory: zephyr
@@ -73,10 +72,8 @@ jobs:
EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
elif [ "${{ runner.os }}" = "Windows" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O/tmp/twister-out"
elif [ "${{ runner.os }}-${{ runner.arch }}" == "Linux-ARM64" ]; then
EXTRA_TWISTER_FLAGS="--exclude-platform native_sim/native"
fi
west twister --runtime-artifact-cleanup --force-color --inline-logs -T samples/hello_world -T samples/cpp/hello_world -v $EXTRA_TWISTER_FLAGS
./scripts/twister --runtime-artifact-cleanup --force-color --inline-logs -T samples/hello_world -T samples/cpp/hello_world -v $EXTRA_TWISTER_FLAGS
- name: Upload artifacts
if: failure()

View File

@@ -45,7 +45,7 @@ jobs:
path: ${{ env.OUTPUT_FILE_NAME }}
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
uses: aws-actions/configure-aws-credentials@b47578312673ae6fa5b5096b330d9fbac3d116df # v4.2.1
with:
aws-access-key-id: ${{ vars.AWS_TESTING_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_TESTING_SECRET_ACCESS_KEY }}

View File

@@ -11,7 +11,7 @@ jobs:
name: Scan code for licenses
steps:
- name: Checkout the code
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
fetch-depth: 0
- name: Scan the code

View File

@@ -17,10 +17,10 @@ jobs:
steps:
- name: Check out source code
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
@@ -30,14 +30,14 @@ jobs:
run: |
pip install -r scripts/requirements-actions.txt --require-hashes
- name: Fetch MAINTAINERS.yml from pull request
- name: Fetch MAINTAINERS.yml from mainline
run: |
git fetch origin pull/${{ github.event.pull_request.number }}/merge
git show FETCH_HEAD:MAINTAINERS.yml > pr_MAINTAINERS.yml
git fetch origin main
git show origin/main:MAINTAINERS.yml > mainline_MAINTAINERS.yml
- name: Check maintainer file changes
env:
GITHUB_TOKEN: ${{ secrets.ZB_PR_ASSIGNER_GITHUB_TOKEN }}
run: |
python ./scripts/ci/check_maintainer_changes.py \
--repo zephyrproject-rtos/zephyr MAINTAINERS.yml pr_MAINTAINERS.yml
--repo zephyrproject-rtos/zephyr mainline_MAINTAINERS.yml MAINTAINERS.yml

View File

@@ -13,24 +13,36 @@ jobs:
name: Manifest
steps:
- name: Checkout the code
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
path: zephyrproject/zephyr
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
persist-credentials: false
- name: Set up Python
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
cache-dependency-path: scripts/requirements-actions.txt
- name: Install Python packages
run: |
cd zephyrproject/zephyr
pip install -r scripts/requirements-actions.txt --require-hashes
- name: west setup
env:
BASE_REF: ${{ github.base_ref }}
working-directory: zephyrproject/zephyr
run: |
pip install -r scripts/requirements-west.txt --require-hashes
git config --global user.email "you@example.com"
git config --global user.name "Your Name"
west init -l . || true
- name: Manifest
uses: zephyrproject-rtos/action-manifest@09983f53d3d878791aa37a7755ae44d695f4c1e5 # v2.0.0
uses: zephyrproject-rtos/action-manifest@1729cded3fc798cf0de4a789c596dcb9c40eb14c # v1.9.1
with:
github-token: ${{ secrets.GITHUB_TOKEN }}
manifest-path: 'west.yml'

View File

@@ -14,6 +14,6 @@ jobs:
runs-on: ubuntu-latest
steps:
- name: Checkout code
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- name: Ensure SHA pinned actions
uses: zgosalvez/github-actions-ensure-sha-pinned-actions@9e9574ef04ea69da568d6249bd69539ccc704e74 # v4.0.0
uses: zgosalvez/github-actions-ensure-sha-pinned-actions@fc87bb5b5a97953d987372e74478de634726b3e5 # v3.0.25

View File

@@ -19,10 +19,10 @@ jobs:
runs-on: ubuntu-24.04
steps:
- name: Checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
@@ -36,7 +36,4 @@ jobs:
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
run: |
python -u scripts/ci/do_not_merge.py \
-p "${{ github.event.pull_request.number }}" \
-o "${{ github.event.repository.owner.login }}" \
-r "${{ github.event.repository.name }}"
python -u scripts/ci/do_not_merge.py -p "${{ github.event.pull_request.number }}"

View File

@@ -32,10 +32,10 @@ jobs:
os: [ubuntu-24.04]
steps:
- name: checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: ${{ matrix.python-version }}
cache: pip

View File

@@ -15,7 +15,7 @@ jobs:
permissions:
contents: write # to create GitHub release entry
steps:
- uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
- uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
fetch-depth: 0
@@ -26,7 +26,7 @@ jobs:
echo "TRIMMED_VERSION=${GITHUB_REF#refs/tags/v}" >> $GITHUB_OUTPUT
- name: REUSE Compliance Check
uses: fsfe/reuse-action@676e2d560c9a403aa252096d99fcab3e1132b0f5 # v6.0.0
uses: fsfe/reuse-action@bb774aa972c2a89ff34781233d275075cbddf542 # v5.0.0
with:
args: spdx -o zephyr-${{ steps.get_version.outputs.VERSION }}.spdx

View File

@@ -29,12 +29,12 @@ jobs:
steps:
- name: "Checkout code"
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
persist-credentials: false
- name: "Run analysis"
uses: ossf/scorecard-action@4eaacf0543bb3f2c246792bd56e8cdeffafb205a # v2.4.3
uses: ossf/scorecard-action@05b42c624433fc40578a4040d5cf5e36ddca8cde # v2.4.2
with:
results_file: results.sarif
results_format: sarif
@@ -56,6 +56,6 @@ jobs:
# Upload the results to GitHub's code scanning dashboard (optional).
# Commenting out will disable upload of results to your repo's Code Scanning dashboard
- name: "Upload to code-scanning"
uses: github/codeql-action/upload-sarif@64d10c13136e1c5bce3e5fbde8d4906eeaafc885 # v3.30.6
uses: github/codeql-action/upload-sarif@181d5eefc20863364f96762470ba6f862bdef56b # v3.29.2
with:
sarif_file: results.sarif

View File

@@ -32,7 +32,7 @@ jobs:
os: [ubuntu-24.04]
steps:
- name: checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
@@ -52,7 +52,7 @@ jobs:
git log --graph --oneline HEAD...${PR_HEAD}
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: ${{ matrix.python-version }}
cache: pip

View File

@@ -2,6 +2,7 @@ name: Stale Workflow Queue Cleanup
on:
workflow_dispatch:
branches: [main]
schedule:
# everyday at 15:00
- cron: '0 15 * * *'
@@ -17,7 +18,6 @@ jobs:
cleanup:
name: Cleanup
runs-on: ubuntu-24.04
if: github.ref == 'refs/heads/main'
permissions:
actions: write # to delete stale workflow runs

View File

@@ -16,7 +16,7 @@ jobs:
issues: write # to comment on stale issues
steps:
- uses: actions/stale@5f858e3efba33a5ca4407a664cc011ad407f2008 # v10.1.0
- uses: actions/stale@5bef64f19d7facfb25b37b414482c7164d639639 # v9.1.0
with:
stale-pr-message: 'This pull request has been marked as stale because it has been open (more
than) 60 days with no activity. Remove the stale label or add a comment saying that you

View File

@@ -16,10 +16,10 @@ jobs:
runs-on: ubuntu-24.04
steps:
- name: checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip

View File

@@ -23,12 +23,12 @@ jobs:
steps:
# Needed for elasticearch and upload script
- name: Checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
fetch-depth: 0
persist-credentials: false
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip

View File

@@ -42,7 +42,7 @@ jobs:
steps:
- name: Checkout
if: github.event_name == 'pull_request'
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
@@ -51,7 +51,7 @@ jobs:
- name: Set up Python
if: github.event_name == 'pull_request'
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
@@ -65,10 +65,10 @@ jobs:
- name: Setup Zephyr project
if: github.event_name == 'pull_request'
uses: zephyrproject-rtos/action-zephyr-setup@c125c5ebeeadbd727fa740b407f862734af1e52a # v1.0.9
uses: zephyrproject-rtos/action-zephyr-setup@b2453c72966ee67b1433be22b250348d48283286 # v1.0.7
with:
app-path: zephyr
enable-ccache: false
toolchains: all
- name: Environment Setup
working-directory: zephyr
@@ -89,7 +89,7 @@ jobs:
run: |
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
python3 ./scripts/ci/test_plan.py -c origin/${BASE_REF}.. --pull-request -t $TESTS_PER_BUILDER
python3 ./scripts/ci/test_plan.py -c origin/${BASE_REF}.. --no-detailed-test-id --pull-request -t $TESTS_PER_BUILDER
if [ -s .testplan ]; then
cat .testplan >> $GITHUB_ENV
else
@@ -127,7 +127,7 @@ jobs:
needs: twister-build-prep
if: needs.twister-build-prep.outputs.size != 0
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.4.20250818
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
@@ -142,7 +142,7 @@ jobs:
CCACHE_IGNOREOPTIONS: '-specs=* --specs=*'
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
TWISTER_COMMON: ' --test-config tests/test_config_ci.yaml --force-color --inline-logs -v -N -M --retry-failed 3 --timeout-multiplier 2 '
TWISTER_COMMON: ' --test-config tests/test_config_ci.yaml --no-detailed-test-id --force-color --inline-logs -v -N -M --retry-failed 3 --timeout-multiplier 2 '
WEEKLY_OPTIONS: ' -M --build-only --all --show-footprint --report-filtered -j 32'
PR_OPTIONS: ' --clobber-output --integration -j 16'
PUSH_OPTIONS: ' --clobber-output -M --show-footprint --report-filtered -j 16'
@@ -171,7 +171,7 @@ jobs:
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
@@ -213,7 +213,6 @@ jobs:
- name: Install Python packages
run: |
pip install -r scripts/requirements-actions.txt --require-hashes
west packages pip --install
- name: Set up ccache
run: |
@@ -253,7 +252,7 @@ jobs:
rm -f testplan.json
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
python3 ./scripts/ci/test_plan.py -c origin/${BASE_REF}.. --pull-request
python3 ./scripts/ci/test_plan.py -c origin/${BASE_REF}.. --pull-request --no-detailed-test-id
./scripts/twister --subset ${{matrix.subset}}/${{ strategy.job-total }} --load-tests testplan.json ${TWISTER_COMMON} ${PR_OPTIONS}
if [ "${{matrix.subset}}" = "1" -a ${{needs.twister-build-prep.outputs.fullrun}} = 'True' ]; then
./scripts/zephyr_module.py --twister-out module_tests.args
@@ -323,14 +322,14 @@ jobs:
steps:
- name: Check out source code
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
persist-credentials: false
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: 3.12
cache: pip
@@ -341,13 +340,13 @@ jobs:
pip install -r scripts/requirements-actions.txt --require-hashes
- name: Download Artifacts
uses: actions/download-artifact@634f93cb2916e3fdff6788551b99b062d0335ce0 # v5.0.0
uses: actions/download-artifact@d3f86a106a0bac45b974a628896c90dbdf5c8093 # v4.3.0
with:
path: artifacts
- name: Merge Test Results
run: |
junitparser merge --glob 'artifacts/*/twister.xml' 'artifacts/*/*/twister.xml' junit.xml
junitparser merge artifacts/*/*/twister.xml junit.xml
junit2html junit.xml junit.html
- name: Upload Unit Test Results
@@ -360,12 +359,6 @@ jobs:
junit.html
junit.xml
- name: Upload test results to Codecov
if: ${{ !cancelled() && (github.event_name == 'push') }}
uses: codecov/test-results-action@47f89e9acb64b76debcd5ea40642d25a4adced9f # v1.1.1
with:
token: ${{ secrets.CODECOV_TOKEN }}
- name: Publish Unit Test Results
uses: EnricoMi/publish-unit-test-result-action@3a74b2957438d0b6e2e61d67b05318aa25c9e6c6 # v2.20.0
with:

View File

@@ -39,10 +39,10 @@ jobs:
os: [ubuntu-24.04]
steps:
- name: checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: ${{ matrix.python-version }}
cache: pip

View File

@@ -32,27 +32,26 @@ jobs:
runs-on: ${{ matrix.os }}
steps:
- name: Checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
with:
path: zephyr
fetch-depth: 0
- name: Set Up Python ${{ matrix.python-version }}
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: ${{ matrix.python-version }}
cache: pip
cache-dependency-path: scripts/requirements-actions.txt
- name: Setup Zephyr project
uses: zephyrproject-rtos/action-zephyr-setup@c125c5ebeeadbd727fa740b407f862734af1e52a # v1.0.9
uses: zephyrproject-rtos/action-zephyr-setup@b2453c72966ee67b1433be22b250348d48283286 # v1.0.7
with:
app-path: zephyr
toolchains: all
enable-ccache: false
- name: Run Pytest For Twister Black Box Tests
if: ${{ runner.os == 'Linux' }}
if: ${{ startsWith(runner.os, 'ubuntu') }}
working-directory: zephyr
shell: bash
env:
@@ -60,7 +59,6 @@ jobs:
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
run: |
export ZEPHYR_SDK_INSTALL_DIR=${{ github.workspace }}/zephyr-sdk
sudo apt-get install -y lcov
echo "Run twister tests"
source zephyr-env.sh
PYTHONPATH="./scripts/tests" pytest ./scripts/tests/twister_blackbox/
@@ -136,7 +134,7 @@ jobs:
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --platform qemu_x86 --create-rom-ram-report --footprint-report ROM --enable-size-report --footprint-from-buildlog $BASIC_FLAGS --detailed-test-id
./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --platform qemu_x86 --create-rom-ram-report --footprint-report ROM --enable-size-report --footprint-from-buildlog $BASIC_FLAGS
- name: Build firmware No. 7 - list tags
working-directory: zephyr
@@ -148,7 +146,7 @@ jobs:
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --list-tags $BASIC_FLAGS --detailed-test-id
./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --list-tags $BASIC_FLAGS
- name: Build firmware No. 8 - list tests
working-directory: zephyr
@@ -172,7 +170,7 @@ jobs:
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --platform qemu_x86 --report-dir . --report-name test_name --report-suffix suffix --report-summary 0 --report-all-options --report-filtered $BASIC_FLAGS --detailed-test-id
./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --platform qemu_x86 --report-dir . --report-name test_name --report-suffix suffix --report-summary 0 --report-all-options --report-filtered $BASIC_FLAGS
- name: Build firmware No. 10 - force platform and toolchain, log level, timestamps, logfile
working-directory: zephyr
@@ -184,5 +182,5 @@ jobs:
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --force-platform --platform qemu_x86 --force-toolchain --log-level WARNING --log-file log.file $BASIC_FLAGS --detailed-test-id
./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --force-platform --platform qemu_x86 --force-toolchain --log-level WARNING --log-file log.file $BASIC_FLAGS
rm log.file

View File

@@ -36,10 +36,10 @@ jobs:
os: [ubuntu-22.04, macos-14, windows-2022]
steps:
- name: checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
uses: actions/checkout@11bd71901bbe5b1630ceea73d27597364c9af683 # v4.2.2
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
uses: actions/setup-python@a26af69be951a213d495a4c3e4e4022e16d87065 # v5.6.0
with:
python-version: ${{ matrix.python-version }}
cache: pip

13
.gitignore vendored
View File

@@ -1,6 +1,3 @@
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright The Zephyr Project Contributors
*.o
*.a
*.d
@@ -58,7 +55,6 @@ doc/doc.warnings
hide-defaults-note
venv
.venv
.envrc
.DS_Store
.clangd
new.info
@@ -76,7 +72,6 @@ target/
# CI output
compliance.xml
dts_linter.patch
_error.types
# Tag files
@@ -89,13 +84,11 @@ tags
.idea
# from check_compliance.py
# zephyr-keep-sorted-start
BinaryFiles.txt
BoardYml.txt
Checkpatch.txt
ClangFormat.txt
DevicetreeBindings.txt
DevicetreeLinting.txt
GitDiffCheck.txt
Gitlint.txt
Identity.txt
@@ -105,7 +98,6 @@ KconfigBasic.txt
KconfigBasicNoModules.txt
KconfigHWMv2.txt
KeepSorted.txt
LicenseAndCopyrightCheck.txt
MaintainersFormat.txt
ModulesMaintainers.txt
Nits.txt
@@ -118,8 +110,3 @@ SysbuildKconfigBasic.txt
SysbuildKconfigBasicNoModules.txt
TextEncoding.txt
YAMLLint.txt
ZephyrModuleFile.txt
# zephyr-keep-sorted-stop
# Node dependecies
node_modules

View File

@@ -1,7 +1,6 @@
# All these sections are optional, edit this file as you like.
# Zephyr-specific defaults are located in scripts/gitlint/zephyr_commit_rules.py
[general]
regex-style-search=true
ignore=title-trailing-punctuation, T3, title-max-length, T1, body-hard-tab, B3, B1
# verbosity should be a value between 1 and 3, the commandline -v flags take precedence over this
verbosity = 3

View File

@@ -1,5 +1,4 @@
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright The Zephyr Project Contributors
# This list is generated, it contains all python scripts that existed before ruff was introduced,
# remove entries for files that pass CI compliance testing.
@@ -26,9 +25,27 @@
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
]
"./arch/xtensa/core/gen_vectors.py" = [
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
]
"./arch/xtensa/core/gen_zsr.py" = [
"SIM401", # https://docs.astral.sh/ruff/rules/if-else-block-instead-of-dict-get
]
"./arch/xtensa/core/xtensa_intgen.py" = [
"E713", # https://docs.astral.sh/ruff/rules/not-in-test
"E741", # https://docs.astral.sh/ruff/rules/ambiguous-variable-name
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
]
"./boards/microchip/mec172xevb_assy6906/support/mec172x_remote_flasher.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
]
"./doc/_scripts/gen_devicetree_rest.py" = [
"SIM905", # https://docs.astral.sh/ruff/rules/split-static-string
]
"./doc/_scripts/redirects.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
]
@@ -138,11 +155,13 @@
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"F401", # https://docs.astral.sh/ruff/rules/unused-import
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
"UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
]
"./scripts/build/check_init_priorities_test.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/build/elf_parser.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
@@ -213,6 +232,7 @@
]
"./scripts/build/gen_offset_header.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
]
"./scripts/build/gen_relocate_app.py" = [
@@ -293,6 +313,7 @@
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"E741", # https://docs.astral.sh/ruff/rules/ambiguous-variable-name
"F401", # https://docs.astral.sh/ruff/rules/unused-import
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM112", # https://docs.astral.sh/ruff/rules/uncapitalized-environment-variables
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
]
@@ -395,8 +416,8 @@
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM102", # https://docs.astral.sh/ruff/rules/collapsible-if
"UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-union
"UP035", # https://docs.astral.sh/ruff/rules/deprecated-import
"UP045", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-optional
]
"./scripts/dts/gen_driver_kconfig_dts.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
@@ -410,12 +431,10 @@
]
"./scripts/dts/python-devicetree/src/devicetree/dtlib.py" = [
"UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-union
"UP045", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-optional
]
"./scripts/dts/python-devicetree/src/devicetree/edtlib.py" = [
"SIM905", # https://docs.astral.sh/ruff/rules/split-static-string
"UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-union
"UP045", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-optional
]
"./scripts/dts/python-devicetree/src/devicetree/grutils.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
@@ -429,7 +448,7 @@
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP045", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-optional
"UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-union
]
"./scripts/dts/python-devicetree/tests/test_edtlib.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
@@ -479,6 +498,7 @@
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM103", # https://docs.astral.sh/ruff/rules/needless-bool
"UP038", # https://docs.astral.sh/ruff/rules/non-pep604-isinstance
]
"./scripts/get_maintainer.py" = [
"B904", # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except
@@ -507,6 +527,11 @@
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP024", # https://docs.astral.sh/ruff/rules/os-error-alias
"UP032", # https://docs.astral.sh/ruff/rules/f-string
"UP038", # https://docs.astral.sh/ruff/rules/non-pep604-isinstance
]
"./scripts/kconfig/hardenconfig.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/kconfig/kconfigfunctions.py" = [
"B011", # https://docs.astral.sh/ruff/rules/assert-false
@@ -541,6 +566,7 @@
"UP024", # https://docs.astral.sh/ruff/rules/os-error-alias
"UP032", # https://docs.astral.sh/ruff/rules/f-string
"UP036", # https://docs.astral.sh/ruff/rules/outdated-version-block
"UP038", # https://docs.astral.sh/ruff/rules/non-pep604-isinstance
]
"./scripts/make_bugs_pickle.py" = [
"UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation
@@ -692,7 +718,14 @@
"UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation
"UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-union
"UP035", # https://docs.astral.sh/ruff/rules/deprecated-import
"UP045", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-optional
]
"./scripts/set_assignees.py" = [
"E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"E741", # https://docs.astral.sh/ruff/rules/ambiguous-variable-name
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM113", # https://docs.astral.sh/ruff/rules/enumerate-for-loop
]
"./scripts/snippets.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
@@ -700,83 +733,141 @@
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
"UP035", # https://docs.astral.sh/ruff/rules/deprecated-import
]
"./scripts/tests/twister/conftest.py" = [
"E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
]
"./scripts/tests/twister/pytest_integration/test_harness_pytest.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
]
"./scripts/tests/twister/test_cmakecache.py" = [
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister/test_config_parser.py" = [
"B017", # https://docs.astral.sh/ruff/rules/assert-raises-exception
"B033", # https://docs.astral.sh/ruff/rules/duplicate-value
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM117", # https://docs.astral.sh/ruff/rules/multiple-with-statements
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister/test_data/mixins/test_to_ignore.py" = [
"B011", # https://docs.astral.sh/ruff/rules/assert-false
]
"./scripts/tests/twister/test_environment.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM117", # https://docs.astral.sh/ruff/rules/multiple-with-statements
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister/test_errors.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
]
"./scripts/tests/twister/test_handlers.py" = [
"B011", # https://docs.astral.sh/ruff/rules/assert-false
"E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP012", # https://docs.astral.sh/ruff/rules/unnecessary-encode-utf8
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister/test_hardwaremap.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
]
"./scripts/tests/twister/test_harness.py" = [
"B017", # https://docs.astral.sh/ruff/rules/assert-raises-exception
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"E713", # https://docs.astral.sh/ruff/rules/not-in-test
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister/test_jobserver.py" = [
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister/test_log_helper.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister/test_platform.py" = [
"B011", # https://docs.astral.sh/ruff/rules/assert-false
"E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister/test_quarantine.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister/test_runner.py" = [
"E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
"UP035", # https://docs.astral.sh/ruff/rules/deprecated-import
]
"./scripts/tests/twister/test_scl.py" = [
"E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM117", # https://docs.astral.sh/ruff/rules/multiple-with-statements
"UP025", # https://docs.astral.sh/ruff/rules/unicode-kind-prefix
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister/test_testinstance.py" = [
"E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister/test_testplan.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"E101", # https://docs.astral.sh/ruff/rules/mixed-spaces-and-tabs
"E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM118", # https://docs.astral.sh/ruff/rules/in-dict-keys
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
"W191", # https://docs.astral.sh/ruff/rules/tab-indentation
]
"./scripts/tests/twister/test_testsuite.py" = [
"B011", # https://docs.astral.sh/ruff/rules/assert-false
"E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister/test_twister.py" = [
"E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/conftest.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_addon.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_config.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_coverage.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_data/tests/pytest/pytest/test_sample.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
@@ -786,56 +877,67 @@
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/tests/twister_blackbox/test_disable.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_error.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"E721", # https://docs.astral.sh/ruff/rules/type-comparison
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_filter.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_footprint.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_hardwaremap.py" = [
"B007", # https://docs.astral.sh/ruff/rules/unused-loop-control-variable
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_outfile.py" = [
"B011", # https://docs.astral.sh/ruff/rules/assert-false
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_output.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_platform.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_printouts.py" = [
"B011", # https://docs.astral.sh/ruff/rules/assert-false
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_quarantine.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_report.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
@@ -845,28 +947,35 @@
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_runner.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_shuffle.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_testlist.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_testplan.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"E721", # https://docs.astral.sh/ruff/rules/type-comparison
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tests/twister_blackbox/test_tooling.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import
]
"./scripts/tracing/parse_ctf.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
@@ -896,6 +1005,7 @@
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
]
"./scripts/utils/migrate_mcumgr_kconfigs.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
]
"./scripts/utils/ntc_thermistor_table.py" = [
@@ -907,8 +1017,8 @@
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP004", # https://docs.astral.sh/ruff/rules/useless-object-inheritance
"UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation
"UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-union
"UP035", # https://docs.astral.sh/ruff/rules/deprecated-import
"UP045", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-optional
]
"./scripts/west_commands/fetchers/__init__.py" = [
"UP032", # https://docs.astral.sh/ruff/rules/f-string
@@ -920,6 +1030,7 @@
]
"./scripts/west_commands/fetchers/http.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
]
"./scripts/west_commands/run_common.py" = [
"B904", # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except
@@ -941,7 +1052,6 @@
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"SIM300", # https://docs.astral.sh/ruff/rules/yoda-conditions
"UP008", # https://docs.astral.sh/ruff/rules/super-call-with-parameters
]
"./scripts/west_commands/sign.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
@@ -985,7 +1095,7 @@
]
"./scripts/west_commands/tests/test_nrf.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP045", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-optional
"UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-union
]
"./scripts/west_commands/tests/test_nxp_s32dbg.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
@@ -1080,6 +1190,17 @@
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
]
"./tests/drivers/can/host/pytest/can_shell.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM401", # https://docs.astral.sh/ruff/rules/if-else-block-instead-of-dict-get
"UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation
"UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation-union
"UP035", # https://docs.astral.sh/ruff/rules/deprecated-import
]
"./tests/drivers/can/host/pytest/test_can.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
]
"./tests/kernel/timer/timer_behavior/pytest/saleae_logic2.py" = [
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
@@ -1146,7 +1267,23 @@ exclude = [
"./arch/x86/gen_idt.py",
"./arch/x86/gen_mmu.py",
"./arch/x86/zefi/zefi.py",
"./arch/xtensa/core/gen_vectors.py",
"./arch/xtensa/core/gen_zsr.py",
"./arch/xtensa/core/xtensa_intgen.py",
"./boards/microchip/mec172xevb_assy6906/support/mec172x_remote_flasher.py",
"./doc/_extensions/zephyr/api_overview.py",
"./doc/_extensions/zephyr/application.py",
"./doc/_extensions/zephyr/domain/__init__.py",
"./doc/_extensions/zephyr/doxybridge.py",
"./doc/_extensions/zephyr/doxyrunner.py",
"./doc/_extensions/zephyr/doxytooltip/__init__.py",
"./doc/_extensions/zephyr/dtcompatible-role.py",
"./doc/_extensions/zephyr/external_content.py",
"./doc/_extensions/zephyr/gh_utils.py",
"./doc/_extensions/zephyr/html_redirects.py",
"./doc/_extensions/zephyr/kconfig/__init__.py",
"./doc/_extensions/zephyr/link-roles.py",
"./doc/_scripts/gen_boards_catalog.py",
"./doc/_scripts/gen_devicetree_rest.py",
"./doc/_scripts/redirects.py",
"./doc/conf.py",
@@ -1242,6 +1379,7 @@ exclude = [
"./scripts/github_helpers.py",
"./scripts/gitlint/zephyr_commit_rules.py",
"./scripts/kconfig/guiconfig.py",
"./scripts/kconfig/hardenconfig.py",
"./scripts/kconfig/kconfig.py",
"./scripts/kconfig/kconfigfunctions.py",
"./scripts/kconfig/kconfiglib.py",
@@ -1305,6 +1443,7 @@ exclude = [
"./scripts/release/bug_bash.py",
"./scripts/release/list_backports.py",
"./scripts/release/list_devicetree_bindings_changes.py",
"./scripts/set_assignees.py",
"./scripts/snippets.py",
"./scripts/tests/twister/conftest.py",
"./scripts/tests/twister/pytest_integration/test_harness_pytest.py",
@@ -1455,11 +1594,13 @@ exclude = [
"./soc/nuvoton/npcx/common/ecst/ecst.py",
"./soc/nuvoton/npcx/common/ecst/ecst_args.py",
"./soc/silabs/silabs_sim3/sim3u/gen_crossbar_config.py",
"./tests/bluetooth/classic/gap_s/pytest/test_gap_s.py",
"./tests/bluetooth/classic/sdp_s/pytest/test_sdp.py",
"./tests/boot/with_mcumgr/pytest/test_downgrade_prevention.py",
"./tests/boot/with_mcumgr/pytest/test_upgrade.py",
"./tests/boot/with_mcumgr/pytest/west_sign_wrapper.py",
"./tests/drivers/can/host/pytest/can_shell.py",
"./tests/drivers/can/host/pytest/conftest.py",
"./tests/drivers/can/host/pytest/test_can.py",
"./tests/kernel/timer/timer_behavior/pytest/saleae_logic2.py",
"./tests/kernel/timer/timer_behavior/pytest/test_timer.py",
"./tests/lib/devicetree/memory_region_flags/pytest/test_memory_region_flags.py",

View File

@@ -226,12 +226,6 @@ get_property(ASM_OPTIMIZE_FOR_SPEED_FLAG TARGET asm PROPERTY optimization_speed)
get_property(ASM_OPTIMIZE_FOR_SIZE_FLAG TARGET asm PROPERTY optimization_size)
get_property(ASM_OPTIMIZE_FOR_SIZE_AGGRESSIVE_FLAG TARGET asm PROPERTY optimization_size_aggressive)
get_property(LINKER_OPTIMIZE_FOR_NO_OPTIMIZATIONS_FLAG TARGET linker PROPERTY no_optimization)
get_property(LINKER_OPTIMIZE_FOR_DEBUG_FLAG TARGET linker PROPERTY optimization_debug)
get_property(LINKER_OPTIMIZE_FOR_SPEED_FLAG TARGET linker PROPERTY optimization_speed)
get_property(LINKER_OPTIMIZE_FOR_SIZE_FLAG TARGET linker PROPERTY optimization_size)
get_property(LINKER_OPTIMIZE_FOR_SIZE_AGGRESSIVE_FLAG TARGET linker PROPERTY optimization_size_aggressive)
# Let the assembler inherit the optimization flags of the compiler if it is
# not set explicitly.
if(NOT ASM_OPTIMIZE_FOR_NO_OPTIMIZATIONS_FLAG)
@@ -250,46 +244,23 @@ if(NOT ASM_OPTIMIZE_FOR_SIZE_AGGRESSIVE_FLAG)
set(ASM_OPTIMIZE_FOR_SIZE_AGGRESSIVE_FLAG ${COMPILER_OPTIMIZE_FOR_SIZE_AGGRESSIVE_FLAG})
endif()
# Let the linker inherit the optimization flags of the compiler if it is
# not set explicitly.
if(NOT LINKER_OPTIMIZE_FOR_NO_OPTIMIZATIONS_FLAG)
set(LINKER_OPTIMIZE_FOR_NO_OPTIMIZATIONS_FLAG ${COMPILER_OPTIMIZE_FOR_NO_OPTIMIZATIONS_FLAG})
endif()
if(NOT LINKER_OPTIMIZE_FOR_DEBUG_FLAG)
set(LINKER_OPTIMIZE_FOR_DEBUG_FLAG ${COMPILER_OPTIMIZE_FOR_DEBUG_FLAG})
endif()
if(NOT LINKER_OPTIMIZE_FOR_SPEED_FLAG)
set(LINKER_OPTIMIZE_FOR_SPEED_FLAG ${COMPILER_OPTIMIZE_FOR_SPEED_FLAG})
endif()
if(NOT LINKER_OPTIMIZE_FOR_SIZE_FLAG)
set(LINKER_OPTIMIZE_FOR_SIZE_FLAG ${COMPILER_OPTIMIZE_FOR_SIZE_FLAG})
endif()
if(NOT LINKER_OPTIMIZE_FOR_SIZE_AGGRESSIVE_FLAG)
set(LINKER_OPTIMIZE_FOR_SIZE_AGGRESSIVE_FLAG ${COMPILER_OPTIMIZE_FOR_SIZE_AGGRESSIVE_FLAG})
endif()
# From kconfig choice, pick the actual OPTIMIZATION_FLAG to use.
# Kconfig choice ensures only one of these CONFIG_*_OPTIMIZATIONS is set.
if(CONFIG_NO_OPTIMIZATIONS)
set(COMPILER_OPTIMIZATION_FLAG ${COMPILER_OPTIMIZE_FOR_NO_OPTIMIZATIONS_FLAG})
set(ASM_OPTIMIZATION_FLAG ${ASM_OPTIMIZE_FOR_NO_OPTIMIZATIONS_FLAG})
set(LINKER_OPTIMIZATION_FLAG ${LINKER_OPTIMIZE_FOR_NO_OPTIMIZATIONS_FLAG})
elseif(CONFIG_DEBUG_OPTIMIZATIONS)
set(COMPILER_OPTIMIZATION_FLAG ${COMPILER_OPTIMIZE_FOR_DEBUG_FLAG})
set(ASM_OPTIMIZATION_FLAG ${ASM_OPTIMIZE_FOR_DEBUG_FLAG})
set(LINKER_OPTIMIZATION_FLAG ${LINKER_OPTIMIZE_FOR_DEBUG_FLAG})
elseif(CONFIG_SPEED_OPTIMIZATIONS)
set(COMPILER_OPTIMIZATION_FLAG ${COMPILER_OPTIMIZE_FOR_SPEED_FLAG})
set(ASM_OPTIMIZATION_FLAG ${ASM_OPTIMIZE_FOR_SPEED_FLAG})
set(LINKER_OPTIMIZATION_FLAG ${LINKER_OPTIMIZE_FOR_SPEED_FLAG})
elseif(CONFIG_SIZE_OPTIMIZATIONS)
set(COMPILER_OPTIMIZATION_FLAG ${COMPILER_OPTIMIZE_FOR_SIZE_FLAG}) # Default in kconfig
set(ASM_OPTIMIZATION_FLAG ${ASM_OPTIMIZE_FOR_SIZE_FLAG})
set(LINKER_OPTIMIZATION_FLAG ${LINKER_OPTIMIZE_FOR_SIZE_FLAG})
elseif(CONFIG_SIZE_OPTIMIZATIONS_AGGRESSIVE)
set(COMPILER_OPTIMIZATION_FLAG ${COMPILER_OPTIMIZE_FOR_SIZE_AGGRESSIVE_FLAG})
set(ASM_OPTIMIZATION_FLAG ${ASM_OPTIMIZE_FOR_SIZE_AGGRESSIVE_FLAG})
set(LINKER_OPTIMIZATION_FLAG ${LINKER_OPTIMIZE_FOR_SIZE_AGGRESSIVE_FLAG})
else()
message(FATAL_ERROR
"Unreachable code. Expected optimization level to have been chosen. See Kconfig.zephyr")
@@ -306,9 +277,6 @@ endif()
zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:${ASM_OPTIMIZATION_FLAG}>)
zephyr_compile_options($<$<COMPILE_LANGUAGE:C>:${COMPILER_OPTIMIZATION_FLAG}>)
zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:${COMPILER_OPTIMIZATION_FLAG}>)
add_link_options(${LINKER_OPTIMIZATION_FLAG})
compiler_simple_options(simple_options)
toolchain_linker_add_compiler_options(${simple_options})
if(CONFIG_LTO)
zephyr_compile_options($<TARGET_PROPERTY:compiler,optimization_lto>)
@@ -363,9 +331,6 @@ if(CONFIG_CPP)
elseif(CONFIG_STD_CPP2B)
set(STD_CPP_DIALECT_FLAGS $<TARGET_PROPERTY:compiler-cpp,dialect_cpp2b>)
list(APPEND CMAKE_CXX_COMPILE_FEATURES ${compile_features_cpp20})
elseif(CONFIG_STD_CPP23)
set(STD_CPP_DIALECT_FLAGS $<TARGET_PROPERTY:compiler-cpp,dialect_cpp23>)
list(APPEND CMAKE_CXX_COMPILE_FEATURES ${compile_features_cpp23})
else()
message(FATAL_ERROR
"Unreachable code. Expected C++ standard to have been chosen. See Kconfig.zephyr.")
@@ -409,7 +374,7 @@ if(CONFIG_COMPILER_FREESTANDING)
zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:$<TARGET_PROPERTY:compiler,freestanding>>)
endif()
if(CONFIG_PICOLIBC AND NOT CONFIG_PICOLIBC_IO_FLOAT)
if (CONFIG_PICOLIBC AND NOT CONFIG_PICOLIBC_IO_FLOAT)
# @Intent: Set compiler specific flag to disable printf-related optimizations
zephyr_compile_options($<$<COMPILE_LANGUAGE:C>:$<TARGET_PROPERTY:compiler,no_printf_return_value>>)
endif()
@@ -474,16 +439,6 @@ if(DEFINED TOOLCHAIN_LD_FLAGS)
zephyr_ld_options(${TOOLCHAIN_LD_FLAGS})
endif()
foreach(GROUPED_FLAGS IN LISTS TOOLCHAIN_GROUPED_LD_FLAGS)
if(DEFINED ${GROUPED_FLAGS})
zephyr_ld_options(NO_SPLIT ${${GROUPED_FLAGS}})
else()
message(FATAL_ERROR "Variable '${GROUPED_FLAGS}' is not defined, "
"please ensure the variable is defined and points to valid linker flags. "
"If '${GROUPED_FLAGS}' is a linker flags itself, then it must be placed in a list")
endif()
endforeach()
zephyr_link_libraries(PROPERTY base)
zephyr_link_libraries_ifndef(CONFIG_LINKER_USE_RELAX PROPERTY no_relax)
@@ -578,24 +533,6 @@ zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:$<TARGET_PROPERTY:compiler,no_p
zephyr_link_libraries_ifndef(CONFIG_NATIVE_LIBRARY
$<TARGET_PROPERTY:linker,no_position_independent>)
if(CONFIG_INSTRUMENTATION)
# @Intent: Enable function instrumentation injection at compile time
zephyr_compile_options($<$<COMPILE_LANGUAGE:C>:$<TARGET_PROPERTY:compiler,func_instrumentation>>)
zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:$<TARGET_PROPERTY:compiler,func_instrumentation>>)
# @Intent: Enable function blocklist for the instrumentation subsystem
if(CONFIG_INSTRUMENTATION_EXCLUDE_FUNCTION_LIST)
zephyr_compile_options($<$<COMPILE_LANGUAGE:C>:$<TARGET_PROPERTY:compiler,func_instrumentation_exclude_function_list>>)
zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:$<TARGET_PROPERTY:compiler,func_instrumentation_exclude_function_list>>)
endif()
# @Intent: Enable file blocklist for the instrumentation subsystem
if(CONFIG_INSTRUMENTATION_EXCLUDE_FILE_LIST)
zephyr_compile_options($<$<COMPILE_LANGUAGE:C>:$<TARGET_PROPERTY:compiler,func_instrumentation_exclude_file_list>>)
zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:$<TARGET_PROPERTY:compiler,func_instrumentation_exclude_file_list>>)
endif()
endif()
# Allow the user to inject options when calling cmake, e.g.
# 'cmake -DEXTRA_CFLAGS="-Werror -Wno-deprecated-declarations" ..'
include(cmake/extra_flags.cmake)
@@ -737,10 +674,6 @@ zephyr_get(KERNEL_VERSION_CUSTOMIZATION SYSBUILD LOCAL)
set_property(TARGET version_h PROPERTY KERNEL_VERSION_CUSTOMIZATION ${KERNEL_VERSION_CUSTOMIZATION})
if(EXISTS ${APPLICATION_SOURCE_DIR}/VERSION)
# A generator expression is used to allow applications to add their own dependencies for the
# file version, this might typically be the git index file if the application is in a git
# repository. To add a dependency to the application version file, this can be used:
# set_property(TARGET app_version_h PROPERTY APP_VERSION_DEPENDS <FILE>)
add_custom_command(
OUTPUT ${PROJECT_BINARY_DIR}/include/generated/zephyr/app_version.h
COMMAND ${CMAKE_COMMAND} -DZEPHYR_BASE=${ZEPHYR_BASE}
@@ -751,7 +684,6 @@ if(EXISTS ${APPLICATION_SOURCE_DIR}/VERSION)
${build_version_argument}
-P ${ZEPHYR_BASE}/cmake/gen_version_h.cmake
DEPENDS ${APPLICATION_SOURCE_DIR}/VERSION ${git_dependency}
$<TARGET_PROPERTY:app_version_h,APP_VERSION_DEPENDS>
COMMAND_EXPAND_LISTS
)
add_custom_target(
@@ -1049,14 +981,10 @@ add_custom_target(${DEVICE_API_LD_TARGET}
zephyr_linker_include_generated(CMAKE ${DEVICE_API_LINKER_SECTIONS_CMAKE})
# Create an interface library which collects the dependencies to Zephyr
# generated headers. Libraries containing files that include these headers can
# use add_dependencies or target_link_libraries against this target to ensure
# that generated headers are up-to-date before the libraries are built. This
# ordering dependency can be propagated to these libraries' dependenents via
# the PUBLIC or INTERFACE option of target_link_libraries.
# Add a pseudo-target that is up-to-date when all generated headers
# are up-to-date.
add_library(zephyr_generated_headers INTERFACE)
add_custom_target(zephyr_generated_headers)
add_dependencies(zephyr_generated_headers
offsets_h version_h
)
@@ -1153,16 +1081,14 @@ if(CONFIG_LLEXT)
# Weak definitions for these must be added at the end of the link order
# to avoid shadowing actual implementations.
add_library(syscall_weakdefs syscall_weakdefs_llext.c)
target_link_libraries(syscall_weakdefs
zephyr_generated_headers
zephyr_interface
)
add_dependencies(syscall_weakdefs zephyr_generated_headers)
target_link_libraries(syscall_weakdefs zephyr_interface)
list(APPEND NO_WHOLE_ARCHIVE_LIBS syscall_weakdefs)
endif()
get_property(OUTPUT_FORMAT GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT)
if(CONFIG_CODE_DATA_RELOCATION)
if (CONFIG_CODE_DATA_RELOCATION)
set(CODE_RELOCATION_DEP code_relocation_source_lib)
endif() # CONFIG_CODE_DATA_RELOCATION
@@ -1905,39 +1831,26 @@ endif()
if(CONFIG_BUILD_OUTPUT_BIN AND CONFIG_BUILD_OUTPUT_UF2)
if(CONFIG_BUILD_OUTPUT_UF2_USE_FLASH_BASE)
set(code_address "${CONFIG_FLASH_BASE_ADDRESS}")
set(flash_addr "${CONFIG_FLASH_BASE_ADDRESS}")
else()
set(code_address "${CONFIG_FLASH_LOAD_OFFSET}")
set(flash_addr "${CONFIG_FLASH_LOAD_OFFSET}")
endif()
if(CONFIG_BUILD_OUTPUT_UF2_USE_FLASH_OFFSET)
# Note, the `+ 0` in formula below avoids errors in cases where a Kconfig
# variable is undefined and thus expands to nothing.
math(EXPR code_address
"${code_address} + ${CONFIG_FLASH_LOAD_OFFSET} + 0"
math(EXPR flash_addr
"${flash_addr} + ${CONFIG_FLASH_LOAD_OFFSET} + 0"
OUTPUT_FORMAT HEXADECIMAL
)
endif()
# No-XIP images (such as ones for RP2350 with CONFIG_XIP=n)
# are typically loaded to RAM
if(NOT CONFIG_XIP)
if(CONFIG_BUILD_OUTPUT_ADJUST_LMA)
math(EXPR code_address
"${CONFIG_SRAM_BASE_ADDRESS} + ${CONFIG_BUILD_OUTPUT_ADJUST_LMA} + 0"
OUTPUT_FORMAT HEXADECIMAL
)
else()
set(code_address "${CONFIG_SRAM_BASE_ADDRESS}")
endif()
endif()
list(APPEND
post_build_commands
COMMAND ${PYTHON_EXECUTABLE} ${ZEPHYR_BASE}/scripts/build/uf2conv.py
-c
-f ${CONFIG_BUILD_OUTPUT_UF2_FAMILY_ID}
-b ${code_address}
-b ${flash_addr}
-o ${KERNEL_UF2_NAME}
${KERNEL_BIN_NAME}
)
@@ -2108,20 +2021,32 @@ if(CONFIG_BUILD_OUTPUT_COMPRESS_DEBUG_SECTIONS)
endif()
if(CONFIG_BUILD_OUTPUT_EXE)
if(CMAKE_GENERATOR STREQUAL "Unix Makefiles")
set(MAKE "${CMAKE_MAKE_PROGRAM}" CACHE FILEPATH "cmake defined make")
if (NOT CONFIG_NATIVE_LIBRARY)
list(APPEND
post_build_commands
COMMAND
${CMAKE_COMMAND} -E copy ${KERNEL_ELF_NAME} ${KERNEL_EXE_NAME}
)
list(APPEND
post_build_byproducts
${KERNEL_EXE_NAME}
)
else()
if(CMAKE_GENERATOR STREQUAL "Unix Makefiles")
set(MAKE "${CMAKE_MAKE_PROGRAM}" CACHE FILEPATH "cmake defined make")
endif()
find_program(MAKE make REQUIRED)
add_custom_target(native_runner_executable
ALL
COMMENT "Building native simulator runner, and linking final executable"
COMMAND
${MAKE} -f ${ZEPHYR_BASE}/scripts/native_simulator/Makefile all --warn-undefined-variables
-r NSI_CONFIG_FILE=${APPLICATION_BINARY_DIR}/zephyr/NSI/nsi_config
# nsi_config is created by the board cmake file
DEPENDS ${logical_target_for_zephyr_elf}
BYPRODUCTS ${KERNEL_EXE_NAME}
)
endif()
find_program(MAKE make REQUIRED)
add_custom_target(native_runner_executable
ALL
COMMENT "Building native simulator runner, and linking final executable"
COMMAND
${MAKE} -f ${ZEPHYR_BASE}/scripts/native_simulator/Makefile all --warn-undefined-variables
-r NSI_CONFIG_FILE=${APPLICATION_BINARY_DIR}/zephyr/NSI/nsi_config
# nsi_config is created by the board cmake file
DEPENDS ${logical_target_for_zephyr_elf}
BYPRODUCTS ${KERNEL_EXE_NAME}
)
set(BYPRODUCT_KERNEL_EXE_NAME "${PROJECT_BINARY_DIR}/${KERNEL_EXE_NAME}" CACHE FILEPATH "Kernel exe file" FORCE)
endif()
@@ -2139,7 +2064,7 @@ if(CONFIG_BUILD_OUTPUT_INFO_HEADER)
)
endif()
if(CONFIG_LLEXT AND CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID)
if (CONFIG_LLEXT AND CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID)
#slidgen must be the first post-build command to be executed
#on the Zephyr ELF to ensure that all other commands, such as
#binary file generation, are operating on a preparated ELF.
@@ -2205,20 +2130,10 @@ if(signing_script)
endif()
# Generate USB-C VIF policies in XML format
if(CONFIG_BUILD_OUTPUT_VIF)
if (CONFIG_BUILD_OUTPUT_VIF)
include(${CMAKE_CURRENT_LIST_DIR}/cmake/vif.cmake)
endif()
get_property(post_build_patch_elf_commands
GLOBAL PROPERTY
post_build_patch_elf_commands
)
list(PREPEND
post_build_commands
${post_build_patch_elf_commands}
)
get_property(extra_post_build_commands
GLOBAL PROPERTY
extra_post_build_commands
@@ -2256,7 +2171,7 @@ if(LOG_DICT_DB_NAME_ARG)
--build-header ${PROJECT_BINARY_DIR}/include/generated/zephyr/version.h
)
if(NOT CONFIG_LOG_DICTIONARY_DB_TARGET)
if (NOT CONFIG_LOG_DICTIONARY_DB_TARGET)
# If not using a separate target for generating logging dictionary
# database, add the generation to post build command to make sure
# the database is actually being generated.
@@ -2459,9 +2374,6 @@ add_subdirectory_ifdef(
cmake/makefile_exports
)
# Ask the compiler to set the lib_include_dir and rt_library properties
compiler_set_linker_properties()
toolchain_linker_finalize()
# export build information

View File

@@ -7,7 +7,7 @@
source "Kconfig.constants"
osource "$(APPLICATION_SOURCE_DIR)/VERSION"
osource "${APPLICATION_SOURCE_DIR}/VERSION"
# Include Kconfig.defconfig files first so that they can override defaults and
# other symbol/choice properties by adding extra symbol/choice definitions.
@@ -460,6 +460,17 @@ config NATIVE_BUILD
Zephyr will be built targeting the host system for debug and
development purposes.
config NATIVE_APPLICATION
bool
default y if ARCH_POSIX
depends on !NATIVE_LIBRARY
select NATIVE_BUILD
select DEPRECATED
help
Build as a native application that can run on the host and using
resources and libraries provided by the host. This option is deprecated
and will be removed in Zephyr v4.3
config NATIVE_LIBRARY
bool
select NATIVE_BUILD
@@ -963,7 +974,7 @@ config BUILD_OUTPUT_STRIP_PATHS
bool "Strip absolute paths from binaries"
default y
help
If the compiler supports it, strip the $(ZEPHYR_BASE) prefix from the
If the compiler supports it, strip the ${ZEPHYR_BASE} prefix from the
__FILE__ macro used in __ASSERT*, in the
.noinit."/home/joe/zephyr/fu/bar.c" section names and in any
application code.
@@ -1029,7 +1040,7 @@ config WARN_EXPERIMENTAL
config NOT_SECURE
bool
help
Symbol to be selected by a feature to indicate that feature is
Symbol to be selected by a feature to inidicate that feature is
not secure.
config TAINT

View File

@@ -1,202 +0,0 @@
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http://www.apache.org/licenses/
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outstanding shares, or (iii) beneficial ownership of such entity.
"You" (or "Your") shall mean an individual or Legal Entity
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defend, and hold each Contributor harmless for any liability
incurred by, or claims asserted against, such Contributor by reason
of your accepting any such warranty or additional liability.
END OF TERMS AND CONDITIONS
APPENDIX: How to apply the Apache License to your work.
To apply the Apache License to your work, attach the following
boilerplate notice, with the fields enclosed by brackets "[]"
replaced with your own identifying information. (Don't include
the brackets!) The text should be enclosed in the appropriate
comment syntax for the file format. We also recommend that a
file or class name and description of purpose be included on the
same "printed page" as the copyright notice for easier
identification within third-party archives.
Copyright [yyyy] [name of copyright owner]
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.

View File

@@ -1,10 +0,0 @@
> [!IMPORTANT]
> The license files in this directory are maintained as per the recommendation
> of the REUSE specification (https://reuse.software/spec-3.3).
> These are licenses that may apply to some components hosted in the source tree
> but that do not end up in built binaries
> (see https://docs.zephyrproject.org/latest/LICENSING.html#zephyr-licensing).
>
> These files do _not_ define the license of the Zephyr project itself.
> Zephyr is licensed under the Apache 2.0 license, as specified in
> the [LICENSE](/LICENSE) file at the root of the repository.

File diff suppressed because it is too large Load Diff

View File

@@ -1,25 +0,0 @@
version = 1
# Declare default license and copyright text for files that typically do not include them.
[[annotations]]
path = [
# zephyr-keep-sorted-start
"**/*.cfg",
"**/*.cmake",
"**/*.conf",
"**/*.ecl",
"**/*.html",
"**/*.rst",
"**/*.yaml",
"**/*.yml",
"**/*_defconfig",
"**/CMakeLists.txt",
"**/Kconfig*",
"doc/requirements.in",
"doc/requirements.txt",
"scripts/requirements-*.in",
"scripts/requirements-*.txt",
# zephyr-keep-sorted-stop
]
SPDX-License-Identifier = "Apache-2.0"
SPDX-FileCopyrightText = "Copyright The Zephyr Project Contributors"

View File

@@ -1,5 +1,5 @@
VERSION_MAJOR = 4
VERSION_MINOR = 3
PATCHLEVEL = 0
VERSION_MINOR = 2
PATCHLEVEL = 1
VERSION_TWEAK = 0
EXTRAVERSION =

View File

@@ -57,7 +57,6 @@ config ARM64
select ARCH_HAS_DEMAND_MAPPING
select ARCH_SUPPORTS_EVICTION_TRACKING
select EVICTION_TRACKING if DEMAND_PAGING
select MEM_DOMAIN_HAS_THREAD_LIST if ARM_MPU
help
ARM64 (AArch64) architecture
@@ -136,7 +135,6 @@ config XTENSA
select ARCH_HAS_DIRECTED_IPIS
select THREAD_STACK_INFO
select ARCH_HAS_THREAD_PRIV_STACK_SPACE_GET if USERSPACE
select ARCH_SUPPORTS_COREDUMP_STACK_PTR if !SMP
help
Xtensa architecture
@@ -232,17 +230,7 @@ config SRAM_BASE_ADDRESS
/chosen/zephyr,sram in devicetree. The user should generally avoid
changing it via menuconfig or in configuration files.
config XIP
bool "Execute in place"
help
This option allows zephyr to operate with its text and read-only
sections residing in ROM (or similar read-only memory). Not all boards
support this option so it must be used with care; you must also
supply a linker command file when building your image. Enabling this
option increases both the code and data footprint of the image.
if ARC || ARM || ARM64 || X86 || RISCV || RX || ARCH_POSIX
if ARC || ARM || ARM64 || X86 || RISCV || RX
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
@@ -265,7 +253,7 @@ config FLASH_BASE_ADDRESS
normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration.
endif # ARM || ARM64 || ARC || X86 || RISCV || RX || ARCH_POSIX
endif # ARM || ARM64 || ARC || X86 || RISCV || RX
if ARCH_HAS_TRUSTED_EXECUTION
@@ -328,16 +316,6 @@ config USERSPACE
privileged mode or handling a system call; to ensure these are always
caught, enable CONFIG_HW_STACK_PROTECTION.
config NOINIT_SNIPPET_FIRST
bool "Place the no-init linker script snippet first"
help
By default the include/zephyr/linker/common-noinit.ld file inserts the
snippets-noinit.ld file at the end of the section. There are times when
the directives in the snippets-noinit.ld file apply to the other directives
in this file. And in that case the include statement for the snippets-noinit.ld
file needs to come at the start of the section. This configuration option
allows that to happen.
config PRIVILEGED_STACK_SIZE
int "Size of privileged stack"
default 2048 if EMUL
@@ -494,7 +472,6 @@ config ISR_TABLES_LOCAL_DECLARATION
config DYNAMIC_INTERRUPTS
bool "Installation of IRQs at runtime"
select SRAM_SW_ISR_TABLE
help
Enable installation of interrupts at runtime, which will move some
interrupt-related data structures to RAM instead of ROM, and
@@ -621,12 +598,6 @@ config SRAM_VECTOR_TABLE
When XiP is enabled, this option will result in the vector table being
relocated from Flash to SRAM.
config SRAM_SW_ISR_TABLE
bool "Place the software ISR table in SRAM instead of flash"
help
The option specifies that the software interrupts vector table will be
placed inside SRAM instead of the flash.
config IRQ_OFFLOAD_NESTED
bool "irq_offload() supports nested IRQs"
depends on IRQ_OFFLOAD
@@ -792,9 +763,6 @@ config ARCH_HAS_THREAD_PRIV_STACK_SPACE_GET
help
Select when the architecture implements arch_thread_priv_stack_space_get().
config ARCH_HAS_HW_SHADOW_STACK
bool
#
# Other architecture related options
#
@@ -1107,12 +1075,9 @@ config CACHE_MANAGEMENT
This option enables the cache management functions backed by arch or
driver code.
if CACHE_MANAGEMENT
if DCACHE
config DCACHE_LINE_SIZE_DETECT
bool "Detect d-cache line size at runtime"
depends on CACHE_MANAGEMENT && DCACHE
help
This option enables querying some architecture-specific hardware for
finding the d-cache line size at the expense of taking more memory and
@@ -1124,21 +1089,18 @@ config DCACHE_LINE_SIZE_DETECT
config DCACHE_LINE_SIZE
int "d-cache line size"
depends on !DCACHE_LINE_SIZE_DETECT
default $(dt_node_int_prop_int,/cpus/cpu@0,d-cache-line-size) \
if $(dt_node_has_prop,/cpus/cpu@0,d-cache-line-size)
depends on CACHE_MANAGEMENT && DCACHE && !DCACHE_LINE_SIZE_DETECT
default 0
help
Size in bytes of a CPU d-cache line.
Size in bytes of a CPU d-cache line. If this is set to 0 the value is
obtained from the 'd-cache-line-size' DT property instead if present.
Detect automatically at runtime by selecting DCACHE_LINE_SIZE_DETECT.
endif # DCACHE
if ICACHE
config ICACHE_LINE_SIZE_DETECT
bool "Detect i-cache line size at runtime"
depends on CACHE_MANAGEMENT && ICACHE
help
This option enables querying some architecture-specific hardware for
finding the i-cache line size at the expense of taking more memory and
@@ -1150,19 +1112,17 @@ config ICACHE_LINE_SIZE_DETECT
config ICACHE_LINE_SIZE
int "i-cache line size"
depends on !ICACHE_LINE_SIZE_DETECT
default $(dt_node_int_prop_int,/cpus/cpu@0,i-cache-line-size) \
if $(dt_node_has_prop,/cpus/cpu@0,i-cache-line-size)
depends on CACHE_MANAGEMENT && ICACHE && !ICACHE_LINE_SIZE_DETECT
default 0
help
Size in bytes of a CPU i-cache line.
Size in bytes of a CPU i-cache line. If this is set to 0 the value is
obtained from the 'i-cache-line-size' DT property instead if present.
Detect automatically at runtime by selecting ICACHE_LINE_SIZE_DETECT.
endif # ICACHE
choice CACHE_TYPE
prompt "Cache type"
depends on CACHE_MANAGEMENT
default ARCH_CACHE
config ARCH_CACHE
@@ -1177,8 +1137,6 @@ config EXTERNAL_CACHE
endchoice
endif # CACHE_MANAGEMENT
endmenu
config ARCH
@@ -1223,9 +1181,3 @@ config ARCH_HAS_CUSTOM_CURRENT_IMPL
help
Select when architecture implements arch_current_thread() &
arch_current_thread_set().
config ARCH_IPI_LAZY_COPROCESSORS_SAVE
bool
help
Select when the architecture has multi-CPU lazy context switching
of coprocessor registers.

View File

@@ -370,28 +370,6 @@ endmenu
config DCACHE_LINE_SIZE
default 32
config ARC_DCACHE_REGION_OPERATIONS
bool "DCACHE region operations"
depends on CACHE_MANAGEMENT && DCACHE
default n
help
Perform L1 data cache management operations by regions rather than line by line in a loop,
improves performance of cache management operations.
config ARC_SLC
bool "System level cache"
depends on CACHE_MANAGEMENT && DCACHE && (CPU_HS4X || CPU_HS3X)
default n
help
This option enables System Level Cache, and adds SLC support to the data cache management operations.
config ARC_SLC_LINE_SIZE
int "SLC line size"
depends on ARC_SLC
default 128
help
Size in bytes of a CPU system level cache line.
config ARC_EXCEPTION_STACK_SIZE
int "ARC exception handling stack size"
default 768 if !64BIT
@@ -411,11 +389,6 @@ config ARC_EARLY_SOC_INIT
(before C runtime initialization). Setup code is called in form of
soc_early_asm_init_percpu assembler macro.
# ARC vector table must be aligned to 1KiB boundary, and will be at the
# start of the ROM region.
config ROM_START_OFFSET
default 0x400 if BOOTLOADER_MCUBOOT
config MAIN_STACK_SIZE
default 4096 if 64BIT

View File

@@ -2,7 +2,6 @@
/*
* Copyright (c) 2016 Synopsys, Inc. All rights reserved.
* Copyright (c) 2025 GSI Technology, All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -30,34 +29,16 @@
size_t sys_cache_line_size;
#endif
#define DC_CTRL_DC_ENABLE 0x0 /* enable d-cache */
#define DC_CTRL_DC_DISABLE 0x1 /* disable d-cache */
#define DC_CTRL_INVALID_ONLY 0x0 /* invalid d-cache only */
#define DC_CTRL_INVALID_FLUSH 0x40 /* invalid and flush d-cache */
#define DC_CTRL_ENABLE_FLUSH_LOCKED 0x80 /* locked d-cache can be flushed */
#define DC_CTRL_DISABLE_FLUSH_LOCKED 0x0 /* locked d-cache cannot be flushed */
#define DC_CTRL_FLUSH_STATUS 0x100 /* flush status */
#define DC_CTRL_DIRECT_ACCESS 0x0 /* direct access mode */
#define DC_CTRL_INDIRECT_ACCESS 0x20 /* indirect access mode */
#define DC_CTRL_OP_SUCCEEDED 0x4 /* d-cache operation succeeded */
#define DC_CTRL_INVALIDATE_MODE 0x40 /* d-cache invalidate mode bit */
#define DC_CTRL_REGION_OP 0xe00 /* d-cache region operation */
#define MMU_BUILD_PHYSICAL_ADDR_EXTENSION 0x1000 /* physical address extension enable mask */
#define SLC_CTRL_DISABLE 0x1 /* SLC disable */
#define SLC_CTRL_INVALIDATE_MODE 0x40 /* SLC invalidate mode */
#define SLC_CTRL_BUSY_STATUS 0x100 /* SLC busy status */
#define SLC_CTRL_REGION_OP 0xe00 /* SLC region operation */
#if defined(CONFIG_ARC_SLC)
/*
* spinlock is used for SLC access because depending on HW configuration, the SLC might be shared
* between the cores, and in this case, only one core is allowed to access the SLC register
* interface at a time.
*/
static struct k_spinlock slc_lock;
#endif
#define DC_CTRL_DC_ENABLE 0x0 /* enable d-cache */
#define DC_CTRL_DC_DISABLE 0x1 /* disable d-cache */
#define DC_CTRL_INVALID_ONLY 0x0 /* invalid d-cache only */
#define DC_CTRL_INVALID_FLUSH 0x40 /* invalid and flush d-cache */
#define DC_CTRL_ENABLE_FLUSH_LOCKED 0x80 /* locked d-cache can be flushed */
#define DC_CTRL_DISABLE_FLUSH_LOCKED 0x0 /* locked d-cache cannot be flushed */
#define DC_CTRL_FLUSH_STATUS 0x100/* flush status */
#define DC_CTRL_DIRECT_ACCESS 0x0 /* direct access mode */
#define DC_CTRL_INDIRECT_ACCESS 0x20 /* indirect access mode */
#define DC_CTRL_OP_SUCCEEDED 0x4 /* d-cache operation succeeded */
static bool dcache_available(void)
{
@@ -74,189 +55,9 @@ static void dcache_dc_ctrl(uint32_t dcache_en_mask)
}
}
static bool pae_exists(void)
{
uint32_t bcr = z_arc_v2_aux_reg_read(_ARC_V2_MMU_BUILD);
return 1 == FIELD_GET(MMU_BUILD_PHYSICAL_ADDR_EXTENSION, bcr);
}
#if defined(CONFIG_ARC_SLC)
static void slc_enable(void)
{
uint32_t val = z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL);
val &= ~SLC_CTRL_DISABLE;
z_arc_v2_aux_reg_write(_ARC_V2_SLC_CTRL, val);
}
static void slc_high_addr_init(void)
{
z_arc_v2_aux_reg_write(_ARC_V2_SLC_RGN_END1, 0);
z_arc_v2_aux_reg_write(_ARC_V2_SLC_RGN_START1, 0);
}
static void slc_flush_region(void *start_addr_ptr, size_t size)
{
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
uint32_t ctrl;
K_SPINLOCK(&slc_lock) {
ctrl = z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL);
ctrl &= ~SLC_CTRL_REGION_OP;
z_arc_v2_aux_reg_write(_ARC_V2_SLC_CTRL, ctrl);
/*
* END needs to be setup before START (latter triggers the operation)
* END can't be same as START, so add (l2_line_sz - 1) to sz
*/
end_addr = start_addr + size + CONFIG_ARC_SLC_LINE_SIZE - 1;
z_arc_v2_aux_reg_write(_ARC_V2_SLC_RGN_END, end_addr);
/* Align start address to cache line size, see STAR 5103816 */
z_arc_v2_aux_reg_write(_ARC_V2_SLC_RGN_START,
start_addr & ~(CONFIG_ARC_SLC_LINE_SIZE - 1));
/* Make sure "busy" bit reports correct status, see STAR 9001165532 */
z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL);
while (z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL) & SLC_CTRL_BUSY_STATUS) {
/* Do Nothing */
}
}
}
static void slc_invalidate_region(void *start_addr_ptr, size_t size)
{
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
uint32_t ctrl;
K_SPINLOCK(&slc_lock) {
ctrl = z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL);
ctrl &= ~SLC_CTRL_INVALIDATE_MODE;
ctrl &= ~SLC_CTRL_REGION_OP;
ctrl |= FIELD_PREP(SLC_CTRL_REGION_OP, 0x1);
z_arc_v2_aux_reg_write(_ARC_V2_SLC_CTRL, ctrl);
/*
* END needs to be setup before START (latter triggers the operation)
* END can't be same as START, so add (l2_line_sz - 1) to sz
*/
end_addr = start_addr + size + CONFIG_ARC_SLC_LINE_SIZE - 1;
z_arc_v2_aux_reg_write(_ARC_V2_SLC_RGN_END, end_addr);
/* Align start address to cache line size, see STAR 5103816 */
z_arc_v2_aux_reg_write(_ARC_V2_SLC_RGN_START,
start_addr & ~(CONFIG_ARC_SLC_LINE_SIZE - 1));
/* Make sure "busy" bit reports correct status, see STAR 9001165532 */
z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL);
while (z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL) & SLC_CTRL_BUSY_STATUS) {
/* Do Nothing */
}
}
}
static void slc_flush_and_invalidate_region(void *start_addr_ptr, size_t size)
{
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
uint32_t ctrl;
K_SPINLOCK(&slc_lock) {
ctrl = z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL);
ctrl |= SLC_CTRL_INVALIDATE_MODE;
ctrl &= ~SLC_CTRL_REGION_OP;
ctrl |= FIELD_PREP(SLC_CTRL_REGION_OP, 0x1);
z_arc_v2_aux_reg_write(_ARC_V2_SLC_CTRL, ctrl);
/*
* END needs to be setup before START (latter triggers the operation)
* END can't be same as START, so add (l2_line_sz - 1) to sz
*/
end_addr = start_addr + size + CONFIG_ARC_SLC_LINE_SIZE - 1;
z_arc_v2_aux_reg_write(_ARC_V2_SLC_RGN_END, end_addr);
/* Align start address to cache line size, see STAR 5103816 */
z_arc_v2_aux_reg_write(_ARC_V2_SLC_RGN_START,
start_addr & ~(CONFIG_ARC_SLC_LINE_SIZE - 1));
/* Make sure "busy" bit reports correct status, see STAR 9001165532 */
z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL);
while (z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL) & SLC_CTRL_BUSY_STATUS) {
/* Do Nothing */
}
}
}
static void slc_flush_all(void)
{
K_SPINLOCK(&slc_lock) {
z_arc_v2_aux_reg_write(_ARC_V2_SLC_FLUSH, 0x1);
/* Make sure "busy" bit reports correct status, see STAR 9001165532 */
z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL);
while (z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL) & SLC_CTRL_BUSY_STATUS) {
/* Do Nothing */
}
}
}
static void slc_invalidate_all(void)
{
uint32_t ctrl;
K_SPINLOCK(&slc_lock) {
ctrl = z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL);
ctrl &= ~SLC_CTRL_INVALIDATE_MODE;
z_arc_v2_aux_reg_write(_ARC_V2_SLC_CTRL, ctrl);
z_arc_v2_aux_reg_write(_ARC_V2_SLC_INVALIDATE, 0x1);
/* Make sure "busy" bit reports correct status, see STAR 9001165532 */
z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL);
while (z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL) & SLC_CTRL_BUSY_STATUS) {
/* Do Nothing */
}
}
}
static void slc_flush_and_invalidate_all(void)
{
uint32_t ctrl;
K_SPINLOCK(&slc_lock) {
ctrl = z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL);
ctrl |= SLC_CTRL_INVALIDATE_MODE;
z_arc_v2_aux_reg_write(_ARC_V2_SLC_CTRL, ctrl);
z_arc_v2_aux_reg_write(_ARC_V2_SLC_INVALIDATE, 0x1);
/* Make sure "busy" bit reports correct status, see STAR 9001165532 */
z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL);
while (z_arc_v2_aux_reg_read(_ARC_V2_SLC_CTRL) & SLC_CTRL_BUSY_STATUS) {
/* Do Nothing */
}
}
}
#endif /* CONFIG_ARC_SLC */
void arch_dcache_enable(void)
{
dcache_dc_ctrl(DC_CTRL_DC_ENABLE);
#if defined(CONFIG_ARC_SLC)
slc_enable();
#endif
}
void arch_dcache_disable(void)
@@ -264,107 +65,17 @@ void arch_dcache_disable(void)
/* nothing */
}
#if defined(CONFIG_ARC_DCACHE_REGION_OPERATIONS)
static void dcache_high_addr_init(void)
{
z_arc_v2_aux_reg_write(_ARC_V2_DC_PTAG_HI, 0);
}
static void dcache_flush_region(void *start_addr_ptr, size_t size)
int arch_dcache_flush_range(void *start_addr_ptr, size_t size)
{
size_t line_size = sys_cache_data_line_size_get();
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
uint32_t ctrl;
unsigned int key;
key = arch_irq_lock(); /* --enter critical section-- */
ctrl = z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL);
ctrl &= ~DC_CTRL_REGION_OP;
z_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, ctrl);
end_addr = start_addr + size + line_size - 1;
z_arc_v2_aux_reg_write(_ARC_V2_DC_ENDR, end_addr);
z_arc_v2_aux_reg_write(_ARC_V2_DC_STARTR, start_addr);
while (z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL) & DC_CTRL_FLUSH_STATUS) {
/* Do nothing */
if (!dcache_available() || (size == 0U) || line_size == 0U) {
return -ENOTSUP;
}
arch_irq_unlock(key); /* --exit critical section-- */
}
static void dcache_invalidate_region(void *start_addr_ptr, size_t size)
{
size_t line_size = sys_cache_data_line_size_get();
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
uint32_t ctrl;
unsigned int key;
key = arch_irq_lock(); /* --enter critical section-- */
ctrl = z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL);
ctrl &= ~DC_CTRL_INVALIDATE_MODE;
ctrl &= ~DC_CTRL_REGION_OP;
ctrl |= FIELD_PREP(DC_CTRL_REGION_OP, 0x1);
z_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, ctrl);
end_addr = start_addr + size + line_size - 1;
z_arc_v2_aux_reg_write(_ARC_V2_DC_ENDR, end_addr);
z_arc_v2_aux_reg_write(_ARC_V2_DC_STARTR, start_addr);
arch_irq_unlock(key); /* --exit critical section-- */
}
static void dcache_flush_and_invalidate_region(void *start_addr_ptr, size_t size)
{
size_t line_size = sys_cache_data_line_size_get();
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
uint32_t ctrl;
unsigned int key;
key = arch_irq_lock(); /* --enter critical section-- */
ctrl = z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL);
ctrl |= DC_CTRL_INVALIDATE_MODE;
ctrl &= ~DC_CTRL_REGION_OP;
ctrl |= FIELD_PREP(DC_CTRL_REGION_OP, 0x1);
z_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, ctrl);
end_addr = start_addr + size + line_size - 1;
z_arc_v2_aux_reg_write(_ARC_V2_DC_ENDR, end_addr);
z_arc_v2_aux_reg_write(_ARC_V2_DC_STARTR, start_addr);
while (z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL) & DC_CTRL_FLUSH_STATUS) {
/* Do nothing */
}
arch_irq_unlock(key); /* --exit critical section-- */
}
#else /* CONFIG_ARC_DCACHE_REGION_OPERATIONS */
static void dcache_flush_lines(void *start_addr_ptr, size_t size)
{
size_t line_size = sys_cache_data_line_size_get();
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
unsigned int key;
end_addr = start_addr + size;
start_addr = ROUND_DOWN(start_addr, line_size);
@@ -387,81 +98,6 @@ static void dcache_flush_lines(void *start_addr_ptr, size_t size)
} while (start_addr < end_addr);
arch_irq_unlock(key); /* --exit critical section-- */
}
static void dcache_invalidate_lines(void *start_addr_ptr, size_t size)
{
size_t line_size = sys_cache_data_line_size_get();
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
unsigned int key;
uint32_t ctrl;
end_addr = start_addr + size;
start_addr = ROUND_DOWN(start_addr, line_size);
key = arch_irq_lock(); /* -enter critical section- */
ctrl = z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL);
ctrl &= ~DC_CTRL_INVALIDATE_MODE;
z_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, ctrl);
do {
z_arc_v2_aux_reg_write(_ARC_V2_DC_IVDL, start_addr);
__builtin_arc_nop();
__builtin_arc_nop();
__builtin_arc_nop();
start_addr += line_size;
} while (start_addr < end_addr);
irq_unlock(key); /* -exit critical section- */
}
static void dcache_flush_and_invalidate_lines(void *start_addr_ptr, size_t size)
{
size_t line_size = sys_cache_data_line_size_get();
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
unsigned int key;
uint32_t ctrl;
end_addr = start_addr + size;
start_addr = ROUND_DOWN(start_addr, line_size);
key = arch_irq_lock(); /* -enter critical section- */
ctrl = z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL);
ctrl |= DC_CTRL_INVALIDATE_MODE;
z_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, ctrl);
do {
z_arc_v2_aux_reg_write(_ARC_V2_DC_IVDL, start_addr);
__builtin_arc_nop();
__builtin_arc_nop();
__builtin_arc_nop();
start_addr += line_size;
} while (start_addr < end_addr);
irq_unlock(key); /* -exit critical section- */
}
#endif /* CONFIG_ARC_DCACHE_REGION_OPERATIONS */
int arch_dcache_flush_range(void *start_addr_ptr, size_t size)
{
size_t line_size = sys_cache_data_line_size_get();
if (!dcache_available() || (size == 0U) || line_size == 0U) {
return -ENOTSUP;
}
#if defined(CONFIG_ARC_DCACHE_REGION_OPERATIONS)
dcache_flush_region(start_addr_ptr, size);
#else
dcache_flush_lines(start_addr_ptr, size);
#endif
#if defined(CONFIG_ARC_SLC)
slc_flush_region(start_addr_ptr, size);
#endif
return 0;
}
@@ -469,127 +105,48 @@ int arch_dcache_flush_range(void *start_addr_ptr, size_t size)
int arch_dcache_invd_range(void *start_addr_ptr, size_t size)
{
size_t line_size = sys_cache_data_line_size_get();
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
unsigned int key;
if (!dcache_available() || (size == 0U) || line_size == 0U) {
return -ENOTSUP;
}
end_addr = start_addr + size;
start_addr = ROUND_DOWN(start_addr, line_size);
#if defined(CONFIG_ARC_DCACHE_REGION_OPERATIONS)
dcache_invalidate_region(start_addr_ptr, size);
#else
dcache_invalidate_lines(start_addr_ptr, size);
#endif
key = arch_irq_lock(); /* -enter critical section- */
#if defined(CONFIG_ARC_SLC)
slc_invalidate_region(start_addr_ptr, size);
#endif
do {
z_arc_v2_aux_reg_write(_ARC_V2_DC_IVDL, start_addr);
__builtin_arc_nop();
__builtin_arc_nop();
__builtin_arc_nop();
start_addr += line_size;
} while (start_addr < end_addr);
irq_unlock(key); /* -exit critical section- */
return 0;
}
int arch_dcache_flush_and_invd_range(void *start_addr_ptr, size_t size)
{
size_t line_size = sys_cache_data_line_size_get();
if (!dcache_available() || (size == 0U) || line_size == 0U) {
return -ENOTSUP;
}
#if defined(CONFIG_ARC_DCACHE_REGION_OPERATIONS)
dcache_flush_and_invalidate_region(start_addr_ptr, size);
#else
dcache_flush_and_invalidate_lines(start_addr_ptr, size);
#endif
#if defined(CONFIG_ARC_SLC)
slc_flush_and_invalidate_region(start_addr_ptr, size);
#endif
return 0;
return -ENOTSUP;
}
int arch_dcache_flush_all(void)
{
size_t line_size = sys_cache_data_line_size_get();
unsigned int key;
if (!dcache_available() || line_size == 0U) {
return -ENOTSUP;
}
key = irq_lock();
z_arc_v2_aux_reg_write(_ARC_V2_DC_FLSH, 0x1);
while (z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL) & DC_CTRL_FLUSH_STATUS) {
/* Do nothing */
}
irq_unlock(key);
#if defined(CONFIG_ARC_SLC)
slc_flush_all();
#endif
return 0;
return -ENOTSUP;
}
int arch_dcache_invd_all(void)
{
size_t line_size = sys_cache_data_line_size_get();
unsigned int key;
uint32_t ctrl;
if (!dcache_available() || line_size == 0U) {
return -ENOTSUP;
}
key = irq_lock();
ctrl = z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL);
ctrl &= ~DC_CTRL_INVALIDATE_MODE;
z_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, ctrl);
z_arc_v2_aux_reg_write(_ARC_V2_DC_IVDC, 0x1);
irq_unlock(key);
#if defined(CONFIG_ARC_SLC)
slc_invalidate_all();
#endif
return 0;
return -ENOTSUP;
}
int arch_dcache_flush_and_invd_all(void)
{
size_t line_size = sys_cache_data_line_size_get();
unsigned int key;
uint32_t ctrl;
if (!dcache_available() || line_size == 0U) {
return -ENOTSUP;
}
key = irq_lock();
ctrl = z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL);
ctrl |= DC_CTRL_INVALIDATE_MODE;
z_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, ctrl);
z_arc_v2_aux_reg_write(_ARC_V2_DC_IVDC, 0x1);
while (z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL) & DC_CTRL_FLUSH_STATUS) {
/* Do nothing */
}
irq_unlock(key);
#if defined(CONFIG_ARC_SLC)
slc_flush_and_invalidate_all();
#endif
return 0;
return -ENOTSUP;
}
#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
@@ -667,19 +224,6 @@ static int init_dcache(void)
init_dcache_line_size();
#endif
/*
* Init high address registers to 0 if PAE exists, cache operations for 40 bit addresses not
* implemented
*/
if (pae_exists()) {
#if defined(CONFIG_ARC_DCACHE_REGION_OPERATIONS)
dcache_high_addr_init();
#endif
#if defined(CONFIG_ARC_SLC)
slc_high_addr_init();
#endif
}
return 0;
}

View File

@@ -15,7 +15,6 @@ LOG_MODULE_REGISTER(elf, CONFIG_LLEXT_LOG_LEVEL);
#define R_ARC_32 4
#define R_ARC_B26 5 /* AKA R_ARC_64 */
#define R_ARC_S25H_PCREL 16
#define R_ARC_S25W_PCREL 17
#define R_ARC_32_ME 27
@@ -69,28 +68,12 @@ int arch_elf_relocate(struct llext_loader *ldr, struct llext *ext, elf_rela_t *r
case R_ARC_B26:
UNALIGNED_PUT(sym_base_addr, (uint32_t *)loc);
break;
case R_ARC_S25H_PCREL:
/* ((S + A) - P) >> 1
case R_ARC_S25W_PCREL:
/* ((S + A) - P) >> 2
* S = symbol address
* A = addend
* P = relative offset to PCL
*/
value = (sym_base_addr + rel->r_addend - (loc & ~0x3)) >> 1;
insn = ME(insn);
/* disp25h */
insn = insn & ~0x7feffcf;
insn |= ((value >> 0) & 0x03ff) << 17;
insn |= ((value >> 10) & 0x03ff) << 6;
insn |= ((value >> 20) & 0x000f) << 0;
insn = ME(insn);
UNALIGNED_PUT(insn, (uint32_t *)loc);
break;
case R_ARC_S25W_PCREL:
/* ((S + A) - P) >> 2 */
value = (sym_base_addr + rel->r_addend - (loc & ~0x3)) >> 2;
insn = ME(insn);

View File

@@ -17,25 +17,26 @@
#include <zephyr/arch/cpu.h>
#include <zephyr/logging/log.h>
#include <kernel_arch_data.h>
#include <zephyr/arch/exception.h>
#include <zephyr/arch/arc/v2/exception.h>
#include <err_dump_handling.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_EXCEPTION_DEBUG
static void dump_arc_esf(const struct arch_esf *esf)
{
EXCEPTION_DUMP(" r0: 0x%" PRIxPTR " r1: 0x%" PRIxPTR " r2: 0x%" PRIxPTR
ARC_EXCEPTION_DUMP(" r0: 0x%" PRIxPTR " r1: 0x%" PRIxPTR " r2: 0x%" PRIxPTR
" r3: 0x%" PRIxPTR "", esf->r0, esf->r1, esf->r2, esf->r3);
EXCEPTION_DUMP(" r4: 0x%" PRIxPTR " r5: 0x%" PRIxPTR " r6: 0x%" PRIxPTR
ARC_EXCEPTION_DUMP(" r4: 0x%" PRIxPTR " r5: 0x%" PRIxPTR " r6: 0x%" PRIxPTR
" r7: 0x%" PRIxPTR "", esf->r4, esf->r5, esf->r6, esf->r7);
EXCEPTION_DUMP(" r8: 0x%" PRIxPTR " r9: 0x%" PRIxPTR " r10: 0x%" PRIxPTR
ARC_EXCEPTION_DUMP(" r8: 0x%" PRIxPTR " r9: 0x%" PRIxPTR " r10: 0x%" PRIxPTR
" r11: 0x%" PRIxPTR "", esf->r8, esf->r9, esf->r10, esf->r11);
EXCEPTION_DUMP("r12: 0x%" PRIxPTR " r13: 0x%" PRIxPTR " pc: 0x%" PRIxPTR "",
ARC_EXCEPTION_DUMP("r12: 0x%" PRIxPTR " r13: 0x%" PRIxPTR " pc: 0x%" PRIxPTR "",
esf->r12, esf->r13, esf->pc);
EXCEPTION_DUMP(" blink: 0x%" PRIxPTR " status32: 0x%" PRIxPTR "",
ARC_EXCEPTION_DUMP(" blink: 0x%" PRIxPTR " status32: 0x%" PRIxPTR "",
esf->blink, esf->status32);
#ifdef CONFIG_ARC_HAS_ZOL
EXCEPTION_DUMP("lp_end: 0x%" PRIxPTR " lp_start: 0x%" PRIxPTR
ARC_EXCEPTION_DUMP("lp_end: 0x%" PRIxPTR " lp_start: 0x%" PRIxPTR
" lp_count: 0x%" PRIxPTR "", esf->lp_end, esf->lp_start, esf->lp_count);
#endif /* CONFIG_ARC_HAS_ZOL */
}

View File

@@ -20,6 +20,7 @@
#include <zephyr/kernel_structs.h>
#include <zephyr/arch/common/exc_handle.h>
#include <zephyr/logging/log.h>
#include <err_dump_handling.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
@@ -137,32 +138,32 @@ static void dump_protv_exception(uint32_t cause, uint32_t parameter)
{
switch (cause) {
case 0x0:
EXCEPTION_DUMP("Instruction fetch violation (%s)",
ARC_EXCEPTION_DUMP("Instruction fetch violation (%s)",
get_protv_access_err(parameter));
break;
case 0x1:
EXCEPTION_DUMP("Memory read protection violation (%s)",
ARC_EXCEPTION_DUMP("Memory read protection violation (%s)",
get_protv_access_err(parameter));
break;
case 0x2:
EXCEPTION_DUMP("Memory write protection violation (%s)",
ARC_EXCEPTION_DUMP("Memory write protection violation (%s)",
get_protv_access_err(parameter));
break;
case 0x3:
EXCEPTION_DUMP("Memory read-modify-write violation (%s)",
ARC_EXCEPTION_DUMP("Memory read-modify-write violation (%s)",
get_protv_access_err(parameter));
break;
case 0x10:
EXCEPTION_DUMP("Normal vector table in secure memory");
ARC_EXCEPTION_DUMP("Normal vector table in secure memory");
break;
case 0x11:
EXCEPTION_DUMP("NS handler code located in S memory");
ARC_EXCEPTION_DUMP("NS handler code located in S memory");
break;
case 0x12:
EXCEPTION_DUMP("NSC Table Range Violation");
ARC_EXCEPTION_DUMP("NSC Table Range Violation");
break;
default:
EXCEPTION_DUMP("unknown");
ARC_EXCEPTION_DUMP("unknown");
break;
}
}
@@ -171,46 +172,46 @@ static void dump_machine_check_exception(uint32_t cause, uint32_t parameter)
{
switch (cause) {
case 0x0:
EXCEPTION_DUMP("double fault");
ARC_EXCEPTION_DUMP("double fault");
break;
case 0x1:
EXCEPTION_DUMP("overlapping TLB entries");
ARC_EXCEPTION_DUMP("overlapping TLB entries");
break;
case 0x2:
EXCEPTION_DUMP("fatal TLB error");
ARC_EXCEPTION_DUMP("fatal TLB error");
break;
case 0x3:
EXCEPTION_DUMP("fatal cache error");
ARC_EXCEPTION_DUMP("fatal cache error");
break;
case 0x4:
EXCEPTION_DUMP("internal memory error on instruction fetch");
ARC_EXCEPTION_DUMP("internal memory error on instruction fetch");
break;
case 0x5:
EXCEPTION_DUMP("internal memory error on data fetch");
ARC_EXCEPTION_DUMP("internal memory error on data fetch");
break;
case 0x6:
EXCEPTION_DUMP("illegal overlapping MPU entries");
ARC_EXCEPTION_DUMP("illegal overlapping MPU entries");
if (parameter == 0x1) {
EXCEPTION_DUMP(" - jump and branch target");
ARC_EXCEPTION_DUMP(" - jump and branch target");
}
break;
case 0x10:
EXCEPTION_DUMP("secure vector table not located in secure memory");
ARC_EXCEPTION_DUMP("secure vector table not located in secure memory");
break;
case 0x11:
EXCEPTION_DUMP("NSC jump table not located in secure memory");
ARC_EXCEPTION_DUMP("NSC jump table not located in secure memory");
break;
case 0x12:
EXCEPTION_DUMP("secure handler code not located in secure memory");
ARC_EXCEPTION_DUMP("secure handler code not located in secure memory");
break;
case 0x13:
EXCEPTION_DUMP("NSC target address not located in secure memory");
ARC_EXCEPTION_DUMP("NSC target address not located in secure memory");
break;
case 0x80:
EXCEPTION_DUMP("uncorrectable ECC or parity error in vector memory");
ARC_EXCEPTION_DUMP("uncorrectable ECC or parity error in vector memory");
break;
default:
EXCEPTION_DUMP("unknown");
ARC_EXCEPTION_DUMP("unknown");
break;
}
}
@@ -219,54 +220,54 @@ static void dump_privilege_exception(uint32_t cause, uint32_t parameter)
{
switch (cause) {
case 0x0:
EXCEPTION_DUMP("Privilege violation");
ARC_EXCEPTION_DUMP("Privilege violation");
break;
case 0x1:
EXCEPTION_DUMP("disabled extension");
ARC_EXCEPTION_DUMP("disabled extension");
break;
case 0x2:
EXCEPTION_DUMP("action point hit");
ARC_EXCEPTION_DUMP("action point hit");
break;
case 0x10:
switch (parameter) {
case 0x1:
EXCEPTION_DUMP("N to S return using incorrect return mechanism");
ARC_EXCEPTION_DUMP("N to S return using incorrect return mechanism");
break;
case 0x2:
EXCEPTION_DUMP("N to S return with incorrect operating mode");
ARC_EXCEPTION_DUMP("N to S return with incorrect operating mode");
break;
case 0x3:
EXCEPTION_DUMP("IRQ/exception return fetch from wrong mode");
ARC_EXCEPTION_DUMP("IRQ/exception return fetch from wrong mode");
break;
case 0x4:
EXCEPTION_DUMP("attempt to halt secure processor in NS mode");
ARC_EXCEPTION_DUMP("attempt to halt secure processor in NS mode");
break;
case 0x20:
EXCEPTION_DUMP("attempt to access secure resource from normal mode");
ARC_EXCEPTION_DUMP("attempt to access secure resource from normal mode");
break;
case 0x40:
EXCEPTION_DUMP("SID violation on resource access (APEX/UAUX/key NVM)");
ARC_EXCEPTION_DUMP("SID violation on resource access (APEX/UAUX/key NVM)");
break;
default:
EXCEPTION_DUMP("unknown");
ARC_EXCEPTION_DUMP("unknown");
break;
}
break;
case 0x13:
switch (parameter) {
case 0x20:
EXCEPTION_DUMP("attempt to access secure APEX feature from NS mode");
ARC_EXCEPTION_DUMP("attempt to access secure APEX feature from NS mode");
break;
case 0x40:
EXCEPTION_DUMP("SID violation on access to APEX feature");
ARC_EXCEPTION_DUMP("SID violation on access to APEX feature");
break;
default:
EXCEPTION_DUMP("unknown");
ARC_EXCEPTION_DUMP("unknown");
break;
}
break;
default:
EXCEPTION_DUMP("unknown");
ARC_EXCEPTION_DUMP("unknown");
break;
}
}
@@ -274,7 +275,7 @@ static void dump_privilege_exception(uint32_t cause, uint32_t parameter)
static void dump_exception_info(uint32_t vector, uint32_t cause, uint32_t parameter)
{
if (vector >= 0x10 && vector <= 0xFF) {
EXCEPTION_DUMP("interrupt %u", vector);
ARC_EXCEPTION_DUMP("interrupt %u", vector);
return;
}
@@ -283,55 +284,55 @@ static void dump_exception_info(uint32_t vector, uint32_t cause, uint32_t parame
*/
switch (vector) {
case ARC_EV_RESET:
EXCEPTION_DUMP("Reset");
ARC_EXCEPTION_DUMP("Reset");
break;
case ARC_EV_MEM_ERROR:
EXCEPTION_DUMP("Memory Error");
ARC_EXCEPTION_DUMP("Memory Error");
break;
case ARC_EV_INS_ERROR:
EXCEPTION_DUMP("Instruction Error");
ARC_EXCEPTION_DUMP("Instruction Error");
break;
case ARC_EV_MACHINE_CHECK:
EXCEPTION_DUMP("EV_MachineCheck");
ARC_EXCEPTION_DUMP("EV_MachineCheck");
dump_machine_check_exception(cause, parameter);
break;
case ARC_EV_TLB_MISS_I:
EXCEPTION_DUMP("EV_TLBMissI");
ARC_EXCEPTION_DUMP("EV_TLBMissI");
break;
case ARC_EV_TLB_MISS_D:
EXCEPTION_DUMP("EV_TLBMissD");
ARC_EXCEPTION_DUMP("EV_TLBMissD");
break;
case ARC_EV_PROT_V:
EXCEPTION_DUMP("EV_ProtV");
ARC_EXCEPTION_DUMP("EV_ProtV");
dump_protv_exception(cause, parameter);
break;
case ARC_EV_PRIVILEGE_V:
EXCEPTION_DUMP("EV_PrivilegeV");
ARC_EXCEPTION_DUMP("EV_PrivilegeV");
dump_privilege_exception(cause, parameter);
break;
case ARC_EV_SWI:
EXCEPTION_DUMP("EV_SWI");
ARC_EXCEPTION_DUMP("EV_SWI");
break;
case ARC_EV_TRAP:
EXCEPTION_DUMP("EV_Trap");
ARC_EXCEPTION_DUMP("EV_Trap");
break;
case ARC_EV_EXTENSION:
EXCEPTION_DUMP("EV_Extension");
ARC_EXCEPTION_DUMP("EV_Extension");
break;
case ARC_EV_DIV_ZERO:
EXCEPTION_DUMP("EV_DivZero");
ARC_EXCEPTION_DUMP("EV_DivZero");
break;
case ARC_EV_DC_ERROR:
EXCEPTION_DUMP("EV_DCError");
ARC_EXCEPTION_DUMP("EV_DCError");
break;
case ARC_EV_MISALIGNED:
EXCEPTION_DUMP("EV_Misaligned");
ARC_EXCEPTION_DUMP("EV_Misaligned");
break;
case ARC_EV_VEC_UNIT:
EXCEPTION_DUMP("EV_VecUnit");
ARC_EXCEPTION_DUMP("EV_VecUnit");
break;
default:
EXCEPTION_DUMP("unknown");
ARC_EXCEPTION_DUMP("unknown");
break;
}
}
@@ -385,9 +386,9 @@ void z_arc_fault(struct arch_esf *esf, uint32_t old_sp)
}
#ifdef CONFIG_EXCEPTION_DEBUG
EXCEPTION_DUMP("***** Exception vector: 0x%x, cause code: 0x%x, parameter 0x%x",
ARC_EXCEPTION_DUMP("***** Exception vector: 0x%x, cause code: 0x%x, parameter 0x%x",
vector, cause, parameter);
EXCEPTION_DUMP("Address 0x%x", exc_addr);
ARC_EXCEPTION_DUMP("Address 0x%x", exc_addr);
dump_exception_info(vector, cause, parameter);
#endif

View File

@@ -22,8 +22,7 @@
#include <zephyr/arch/arc/v2/aux_regs.h>
#include <zephyr/arch/arc/cluster.h>
#include <zephyr/kernel_structs.h>
#include <zephyr/arch/common/xip.h>
#include <zephyr/arch/common/init.h>
#include <kernel_internal.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
@@ -68,7 +67,7 @@ extern char __device_states_end[];
*/
static void dev_state_zero(void)
{
arch_early_memset(__device_states_start, 0, __device_states_end - __device_states_start);
z_early_memset(__device_states_start, 0, __device_states_end - __device_states_start);
}
#endif
@@ -82,19 +81,21 @@ extern void arc_secureshield_init(void);
* This routine prepares for the execution of and runs C code.
*/
FUNC_NORETURN void z_prep_c(void)
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
#ifdef CONFIG_ISA_ARCV3
arc_cluster_scm_enable();
#endif
arch_bss_zero();
z_bss_zero();
#ifdef __CCAC__
dev_state_zero();
#endif
arch_data_copy();
z_data_copy();
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif

View File

@@ -11,13 +11,13 @@
*/
#include <zephyr/device.h>
#include <zephyr/kernel.h>
#include <zephyr/irq.h>
#include <zephyr/kernel_structs.h>
#include <ksched.h>
#include <ipi.h>
#include <zephyr/init.h>
#include <zephyr/irq.h>
#include <zephyr/platform/hooks.h>
#include <arc_irq_offload.h>
#include <kernel_arch_func.h>
volatile struct {
arch_cpustart_t fn;

View File

@@ -276,15 +276,6 @@ int arch_float_enable(struct k_thread *thread, unsigned int options)
}
#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
int arch_coprocessors_disable(struct k_thread *thread)
{
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
return arch_float_disable(thread);
#else
return -ENOTSUP;
#endif
}
#if !defined(CONFIG_MULTITHREADING)
K_KERNEL_STACK_ARRAY_DECLARE(z_interrupt_stacks, CONFIG_MP_MAX_NUM_CPUS, CONFIG_ISR_STACK_SIZE);

View File

@@ -0,0 +1,16 @@
/*
* Copyright (c) 2023 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_ARC_INCLUDE_ERR_DUMP_HANDLING_H_
#define ZEPHYR_ARCH_ARC_INCLUDE_ERR_DUMP_HANDLING_H_
#if defined CONFIG_LOG
#define ARC_EXCEPTION_DUMP(...) LOG_ERR(__VA_ARGS__)
#else
#define ARC_EXCEPTION_DUMP(format, ...) printk(format "\n", ##__VA_ARGS__)
#endif
#endif /* ZEPHYR_ARCH_ARC_INCLUDE_ERR_DUMP_HANDLING_H_ */

View File

@@ -27,7 +27,7 @@ add_subdirectory_ifdef(CONFIG_ARM_AARCH32_MMU mmu)
add_subdirectory_ifdef(CONFIG_CPU_AARCH32_CORTEX_R cortex_a_r)
add_subdirectory_ifdef(CONFIG_CPU_AARCH32_CORTEX_A cortex_a_r)
if(CONFIG_ARM_ZIMAGE_HEADER)
if (CONFIG_ARM_ZIMAGE_HEADER)
zephyr_linker_sources(ROM_START SORT_KEY 0x0vectors zimage_header.ld)
zephyr_linker_sources(ROM_START SORT_KEY 0x1vectors vector_table.ld)
zephyr_linker_sources(ROM_START SORT_KEY 0x2vectors cortex_m/vector_table_pad.ld)

View File

@@ -26,8 +26,6 @@ config CPU_CORTEX_A9
bool
select CPU_AARCH32_CORTEX_A
select ARMV7_A
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
help
This option signifies the use of a Cortex-A9 CPU.

View File

@@ -7,7 +7,6 @@
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/exception.h>
#include <kernel_internal.h>
#include <zephyr/arch/common/exc_handle.h>
#include <zephyr/logging/log.h>
@@ -52,7 +51,7 @@ static void dump_debug_event(void)
uint32_t moe = (dbgdscr & DBGDSCR_MOE_Msk) >> DBGDSCR_MOE_Pos;
/* Print debug event information */
EXCEPTION_DUMP("Debug Event (%s)", get_dbgdscr_moe_string(moe));
LOG_ERR("Debug Event (%s)", get_dbgdscr_moe_string(moe));
}
static uint32_t dump_fault(uint32_t status, uint32_t addr)
@@ -66,27 +65,27 @@ static uint32_t dump_fault(uint32_t status, uint32_t addr)
switch (status) {
case FSR_FS_ALIGNMENT_FAULT:
reason = K_ERR_ARM_ALIGNMENT_FAULT;
EXCEPTION_DUMP("Alignment Fault @ 0x%08x", addr);
LOG_ERR("Alignment Fault @ 0x%08x", addr);
break;
case FSR_FS_PERMISSION_FAULT:
reason = K_ERR_ARM_PERMISSION_FAULT;
EXCEPTION_DUMP("Permission Fault @ 0x%08x", addr);
LOG_ERR("Permission Fault @ 0x%08x", addr);
break;
case FSR_FS_SYNC_EXTERNAL_ABORT:
reason = K_ERR_ARM_SYNC_EXTERNAL_ABORT;
EXCEPTION_DUMP("Synchronous External Abort @ 0x%08x", addr);
LOG_ERR("Synchronous External Abort @ 0x%08x", addr);
break;
case FSR_FS_ASYNC_EXTERNAL_ABORT:
reason = K_ERR_ARM_ASYNC_EXTERNAL_ABORT;
EXCEPTION_DUMP("Asynchronous External Abort");
LOG_ERR("Asynchronous External Abort");
break;
case FSR_FS_SYNC_PARITY_ERROR:
reason = K_ERR_ARM_SYNC_PARITY_ERROR;
EXCEPTION_DUMP("Synchronous Parity/ECC Error @ 0x%08x", addr);
LOG_ERR("Synchronous Parity/ECC Error @ 0x%08x", addr);
break;
case FSR_FS_ASYNC_PARITY_ERROR:
reason = K_ERR_ARM_ASYNC_PARITY_ERROR;
EXCEPTION_DUMP("Asynchronous Parity/ECC Error");
LOG_ERR("Asynchronous Parity/ECC Error");
break;
case FSR_FS_DEBUG_EVENT:
reason = K_ERR_ARM_DEBUG_EVENT;
@@ -95,77 +94,73 @@ static uint32_t dump_fault(uint32_t status, uint32_t addr)
#if defined(CONFIG_AARCH32_ARMV8_R)
case FSR_FS_TRANSLATION_FAULT:
reason = K_ERR_ARM_TRANSLATION_FAULT;
EXCEPTION_DUMP("Translation Fault @ 0x%08x", addr);
LOG_ERR("Translation Fault @ 0x%08x", addr);
break;
case FSR_FS_UNSUPPORTED_EXCLUSIVE_ACCESS_FAULT:
reason = K_ERR_ARM_UNSUPPORTED_EXCLUSIVE_ACCESS_FAULT;
EXCEPTION_DUMP("Unsupported Exclusive Access Fault @ 0x%08x", addr);
LOG_ERR("Unsupported Exclusive Access Fault @ 0x%08x", addr);
break;
#elif defined(CONFIG_ARMV7_A)
case FSR_FS_PERMISSION_FAULT_2ND_LEVEL:
reason = K_ERR_ARM_PERMISSION_FAULT_2ND_LEVEL;
EXCEPTION_DUMP("2nd Level Permission Fault @ 0x%08x", addr);
LOG_ERR("2nd Level Permission Fault @ 0x%08x", addr);
break;
case FSR_FS_ACCESS_FLAG_FAULT_1ST_LEVEL:
reason = K_ERR_ARM_ACCESS_FLAG_FAULT_1ST_LEVEL;
EXCEPTION_DUMP("1st Level Access Flag Fault @ 0x%08x", addr);
LOG_ERR("1st Level Access Flag Fault @ 0x%08x", addr);
break;
case FSR_FS_ACCESS_FLAG_FAULT_2ND_LEVEL:
reason = K_ERR_ARM_ACCESS_FLAG_FAULT_2ND_LEVEL;
EXCEPTION_DUMP("2nd Level Access Flag Fault @ 0x%08x", addr);
LOG_ERR("2nd Level Access Flag Fault @ 0x%08x", addr);
break;
case FSR_FS_CACHE_MAINTENANCE_INSTRUCTION_FAULT:
reason = K_ERR_ARM_CACHE_MAINTENANCE_INSTRUCTION_FAULT;
EXCEPTION_DUMP("Cache Maintenance Instruction Fault @ 0x%08x", addr);
LOG_ERR("Cache Maintenance Instruction Fault @ 0x%08x", addr);
break;
case FSR_FS_TRANSLATION_FAULT:
reason = K_ERR_ARM_TRANSLATION_FAULT;
EXCEPTION_DUMP("1st Level Translation Fault @ 0x%08x", addr);
LOG_ERR("1st Level Translation Fault @ 0x%08x", addr);
break;
case FSR_FS_TRANSLATION_FAULT_2ND_LEVEL:
reason = K_ERR_ARM_TRANSLATION_FAULT_2ND_LEVEL;
EXCEPTION_DUMP("2nd Level Translation Fault @ 0x%08x", addr);
LOG_ERR("2nd Level Translation Fault @ 0x%08x", addr);
break;
case FSR_FS_DOMAIN_FAULT_1ST_LEVEL:
reason = K_ERR_ARM_DOMAIN_FAULT_1ST_LEVEL;
EXCEPTION_DUMP("1st Level Domain Fault @ 0x%08x", addr);
LOG_ERR("1st Level Domain Fault @ 0x%08x", addr);
break;
case FSR_FS_DOMAIN_FAULT_2ND_LEVEL:
reason = K_ERR_ARM_DOMAIN_FAULT_2ND_LEVEL;
EXCEPTION_DUMP("2nd Level Domain Fault @ 0x%08x", addr);
LOG_ERR("2nd Level Domain Fault @ 0x%08x", addr);
break;
case FSR_FS_SYNC_EXTERNAL_ABORT_TRANSLATION_TABLE_1ST_LEVEL:
reason = K_ERR_ARM_SYNC_EXTERNAL_ABORT_TRANSLATION_TABLE_1ST_LEVEL;
EXCEPTION_DUMP("1st Level Synchronous External Abort Translation Table @ 0x%08x",
addr);
LOG_ERR("1st Level Synchronous External Abort Translation Table @ 0x%08x", addr);
break;
case FSR_FS_SYNC_EXTERNAL_ABORT_TRANSLATION_TABLE_2ND_LEVEL:
reason = K_ERR_ARM_SYNC_EXTERNAL_ABORT_TRANSLATION_TABLE_2ND_LEVEL;
EXCEPTION_DUMP("2nd Level Synchronous External Abort Translation Table @ 0x%08x",
addr);
LOG_ERR("2nd Level Synchronous External Abort Translation Table @ 0x%08x", addr);
break;
case FSR_FS_TLB_CONFLICT_ABORT:
reason = K_ERR_ARM_TLB_CONFLICT_ABORT;
EXCEPTION_DUMP("TLB Conflict Abort @ 0x%08x", addr);
LOG_ERR("TLB Conflict Abort @ 0x%08x", addr);
break;
case FSR_FS_SYNC_PARITY_ERROR_TRANSLATION_TABLE_1ST_LEVEL:
reason = K_ERR_ARM_SYNC_PARITY_ERROR_TRANSLATION_TABLE_1ST_LEVEL;
EXCEPTION_DUMP("1st Level Synchronous Parity Error Translation Table @ 0x%08x",
addr);
LOG_ERR("1st Level Synchronous Parity Error Translation Table @ 0x%08x", addr);
break;
case FSR_FS_SYNC_PARITY_ERROR_TRANSLATION_TABLE_2ND_LEVEL:
reason = K_ERR_ARM_SYNC_PARITY_ERROR_TRANSLATION_TABLE_2ND_LEVEL;
EXCEPTION_DUMP("2nd Level Synchronous Parity Error Translation Table @ 0x%08x",
addr);
LOG_ERR("2nd Level Synchronous Parity Error Translation Table @ 0x%08x", addr);
break;
#else
case FSR_FS_BACKGROUND_FAULT:
reason = K_ERR_ARM_BACKGROUND_FAULT;
EXCEPTION_DUMP("Background Fault @ 0x%08x", addr);
LOG_ERR("Background Fault @ 0x%08x", addr);
break;
#endif
default:
EXCEPTION_DUMP("Unknown (%u)", status);
LOG_ERR("Unknown (%u)", status);
}
return reason;
}
@@ -285,7 +280,7 @@ bool z_arm_fault_undef_instruction(struct arch_esf *esf)
#endif
/* Print fault information */
EXCEPTION_DUMP("***** UNDEFINED INSTRUCTION ABORT *****");
LOG_ERR("***** UNDEFINED INSTRUCTION ABORT *****");
uint32_t reason = IS_ENABLED(CONFIG_SIMPLIFIED_EXCEPTION_CODES) ?
K_ERR_CPU_EXCEPTION :
@@ -330,7 +325,7 @@ bool z_arm_fault_prefetch(struct arch_esf *esf)
return false;
#endif
/* Print fault information*/
EXCEPTION_DUMP("***** PREFETCH ABORT *****");
LOG_ERR("***** PREFETCH ABORT *****");
if (FAULT_DUMP_VERBOSE) {
reason = dump_fault(fs, ifar);
}
@@ -414,7 +409,7 @@ bool z_arm_fault_data(struct arch_esf *esf)
#endif
/* Print fault information*/
EXCEPTION_DUMP("***** DATA ABORT *****");
LOG_ERR("***** DATA ABORT *****");
if (FAULT_DUMP_VERBOSE) {
reason = dump_fault(fs, dfar);
}

View File

@@ -24,8 +24,6 @@
#include <zephyr/arch/arm/cortex_a_r/lib_helpers.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
#include <zephyr/arch/common/xip.h>
#include <zephyr/arch/common/init.h>
#if defined(CONFIG_ARMV7_R) || defined(CONFIG_ARMV7_A)
#include <cortex_a_r/stack.h>
@@ -98,18 +96,19 @@ extern FUNC_NORETURN void z_cstart(void);
* This routine prepares for the execution of and runs C code.
*
*/
FUNC_NORETURN void z_prep_c(void)
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
/* Initialize tpidruro with our struct _cpu instance address */
write_tpidruro((uintptr_t)&_kernel.cpus[0]);
#if defined(CONFIG_CPU_HAS_FPU)
z_arm_floating_point_init();
#endif
arch_bss_zero();
arch_data_copy();
z_bss_zero();
z_data_copy();
#if ((defined(CONFIG_ARMV7_R) || defined(CONFIG_ARMV7_A)) && defined(CONFIG_INIT_STACKS))
z_arm_init_stacks();
#endif

View File

@@ -5,6 +5,7 @@
#include <zephyr/kernel/thread_stack.h>
#include <zephyr/kernel.h>
#include <ksched.h>
#include <zephyr/arch/arm/cortex_a_r/lib_helpers.h>
#include <zephyr/drivers/interrupt_controller/gic.h>
#include <ipi.h>

View File

@@ -1,7 +1,6 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright (c) 2021 Lexmark International, Inc.
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -15,8 +14,8 @@
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/llext/symbol.h>
#include <ksched.h>
#include <zephyr/sys/barrier.h>
#include <stdbool.h>
#include <cmsis_core.h>
@@ -38,34 +37,6 @@
*/
#define DEFAULT_EXC_RETURN 0xFD;
#ifdef CONFIG_USERSPACE
static void setup_priv_stack(struct k_thread *thread)
{
/* Set up privileged stack before entering user mode */
thread->arch.priv_stack_start = (uint32_t)z_priv_stack_find(thread->stack_obj);
/* CONFIG_PRIVILEGED_STACK_SIZE does not account for MPU_GUARD_ALIGN_AND_SIZE or
* MPU_GUARD_ALIGN_AND_SIZE_FLOAT. Therefore, we must compute priv_stack_end here before
* adjusting priv_stack_start for the mpu guard alignment
*/
thread->arch.priv_stack_end = thread->arch.priv_stack_start + CONFIG_PRIVILEGED_STACK_SIZE;
#if defined(CONFIG_MPU_STACK_GUARD)
/* Stack guard area reserved at the bottom of the thread's
* privileged stack. Adjust the available (writable) stack
* buffer area accordingly.
*/
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
thread->arch.priv_stack_start +=
((thread->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ?
MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE;
#else
thread->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE;
#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
#endif /* CONFIG_MPU_STACK_GUARD */
}
#endif
/* An initial context, to be "restored" by z_arm_pendsv(), is put at the other
* end of the stack, and thus reusable by the stack when not needed anymore.
*
@@ -109,10 +80,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
iframe = Z_STACK_PTR_TO_FRAME(struct __basic_sf, stack_ptr);
#if defined(CONFIG_USERSPACE)
thread->arch.priv_stack_start = 0;
if ((thread->base.user_options & K_USER) != 0) {
setup_priv_stack(thread);
iframe = Z_STACK_PTR_TO_FRAME(struct __basic_sf, thread->arch.priv_stack_end);
iframe->pc = (uint32_t)arch_user_mode_enter;
} else {
iframe->pc = (uint32_t)z_thread_entry;
@@ -154,6 +122,9 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
thread->arch.mode |= Z_ARM_MODE_MPU_GUARD_FLOAT_Msk;
}
#endif
#if defined(CONFIG_USERSPACE)
thread->arch.priv_stack_start = 0;
#endif
#endif
/*
* initial values in all other registers/thread entries are
@@ -225,8 +196,10 @@ static inline void z_arm_thread_stack_info_adjust(struct k_thread *thread,
FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry,
void *p1, void *p2, void *p3)
{
uint32_t sp_is_priv = 1;
/* Set up privileged stack before entering user mode */
_current->arch.priv_stack_start =
(uint32_t)z_priv_stack_find(_current->stack_obj);
#if defined(CONFIG_MPU_STACK_GUARD)
#if defined(CONFIG_THREAD_STACK_INFO)
/* We're dropping to user mode which means the guard area is no
@@ -243,29 +216,29 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry,
_current->stack_info.start -= MPU_GUARD_ALIGN_AND_SIZE;
_current->stack_info.size += MPU_GUARD_ALIGN_AND_SIZE;
#endif /* CONFIG_THREAD_STACK_INFO */
/* Stack guard area reserved at the bottom of the thread's
* privileged stack. Adjust the available (writable) stack
* buffer area accordingly.
*/
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
_current->arch.priv_stack_start +=
((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ?
MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE;
#else
_current->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE;
#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
#endif /* CONFIG_MPU_STACK_GUARD */
/* 2 ways how arch_user_mode_enter is called:
* - called as part of context switch from z_arm_pendsv, in this case privileged stack is
* already setup and stack pointer points to privileged stack.
* - called directly from k_thread_user_mode_enter, in this case privileged stack is not
* setup and stack pointer points to user stack.
*
* When called from k_thread_user_mode_enter, we need to check and setup the privileged
* stack and then instruct z_arm_userspace_enter to change the PSP to the privileged stack.
* Note that we do not change the PSP in this function to avoid any conflict with compiler's
* sequence which has already pushed stuff on the user stack.
*/
if (0 == _current->arch.priv_stack_start) {
setup_priv_stack(_current);
sp_is_priv = 0;
}
#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
_current->arch.priv_stack_end =
_current->arch.priv_stack_start + CONFIG_PRIVILEGED_STACK_SIZE;
#endif
z_arm_userspace_enter(user_entry, p1, p2, p3,
(uint32_t)_current->stack_info.start,
_current->stack_info.size -
_current->stack_info.delta,
sp_is_priv);
_current->stack_info.delta);
CODE_UNREACHABLE;
}
@@ -442,12 +415,3 @@ int arch_float_enable(struct k_thread *thread, unsigned int options)
return -ENOTSUP;
}
#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
int arch_coprocessors_disable(struct k_thread *thread)
{
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
return arch_float_disable(thread);
#else
return -ENOTSUP;
#endif
}

View File

@@ -2,20 +2,20 @@
zephyr_library()
if(CONFIG_ARM_PACBTI_STANDARD)
if(CONFIG_ARMV8_1_M_PACBTI_STANDARD)
zephyr_compile_options(-mbranch-protection=standard)
elseif(CONFIG_ARM_PACBTI_PACRET)
elseif(CONFIG_ARMV8_1_M_PACBTI_PACRET)
zephyr_compile_options(-mbranch-protection=pac-ret)
elseif(CONFIG_ARM_PACBTI_PACRET_LEAF)
elseif(CONFIG_ARMV8_1_M_PACBTI_PACRET_LEAF)
zephyr_compile_options(-mbranch-protection=pac-ret+leaf)
elseif(CONFIG_ARM_PACBTI_BTI)
elseif(CONFIG_ARMV8_1_M_PACBTI_BTI)
zephyr_compile_options(-mbranch-protection=bti)
elseif(CONFIG_ARM_PACBTI_PACRET_BTI)
elseif(CONFIG_ARMV8_1_M_PACBTI_PACRET_BTI)
zephyr_compile_options(-mbranch-protection=pac-ret+bti)
elseif(CONFIG_ARM_PACBTI_PACRET_LEAF_BTI)
elseif(CONFIG_ARMV8_1_M_PACBTI_PACRET_LEAF_BTI)
zephyr_compile_options(-mbranch-protection=pac-ret+leaf+bti)
elseif(CONFIG_ARM_PACBTI_NONE)
#TODO: Enable this after Zephyr SDK updates to the latest GCC version
elseif(CONFIG_ARMV8_1_M_PACBTI_NONE)
#TODO: Enable this after Zephyr SDK updates to GCC version >=14.2
# zephyr_compile_options(-mbranch-protection=none)
endif()
@@ -49,13 +49,13 @@ if(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
endif()
if(CONFIG_CORTEX_M_DWT)
if(CONFIG_TIMING_FUNCTIONS)
if (CONFIG_TIMING_FUNCTIONS)
zephyr_library_sources(timing.c)
endif()
endif()
if(CONFIG_SW_VECTOR_RELAY)
if(CONFIG_CPU_CORTEX_M_HAS_VTOR)
if (CONFIG_SW_VECTOR_RELAY)
if (CONFIG_CPU_CORTEX_M_HAS_VTOR)
set(relay_vector_table_sort_key relay_vectors)
else()
# Using 0x0 prefix will result in placing the relay vector table section
@@ -72,14 +72,14 @@ zephyr_linker_sources(
)
endif()
if(CONFIG_SW_VECTOR_RELAY OR CONFIG_SW_VECTOR_RELAY_CLIENT)
if (CONFIG_SW_VECTOR_RELAY OR CONFIG_SW_VECTOR_RELAY_CLIENT)
zephyr_linker_sources(
RAM_SECTIONS
vt_pointer_section.ld
)
endif()
if(CONFIG_CPU_CORTEX_M_HAS_VTOR)
if (CONFIG_CPU_CORTEX_M_HAS_VTOR)
zephyr_linker_sources_ifdef(CONFIG_SRAM_VECTOR_TABLE
RAM_SECTIONS
# Maybe need to be changed in order to be placed at the beginning of RAM

View File

@@ -63,17 +63,6 @@ config CPU_CORTEX_M33
help
This option signifies the use of a Cortex-M33 CPU
config CPU_CORTEX_M52
bool
select CPU_CORTEX_M
select ARMV8_1_M_MAINLINE
select ARMV8_M_SE if CPU_HAS_TEE
select ARMV7_M_ARMV8_M_FP if CPU_HAS_FPU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE
help
This option signifies the use of a Cortex-M52 CPU
config CPU_CORTEX_M55
bool
select CPU_CORTEX_M
@@ -310,6 +299,60 @@ config ARMV8_1_M_PMU
This option is enabled when the CPU implements ARMv8-M Performance
Monitoring Unit (PMU).
choice ARMV8_1_M_PACBTI
prompt "Pointer Authentication and Branch Target Identification"
default ARMV8_1_M_PACBTI_NONE
depends on ARMV8_1_M_MAINLINE
config ARMV8_1_M_PACBTI_STANDARD
bool "Standard (PACRET + LEAF + BTI)"
help
This option instructs the compiler to generate code with all branch protection features
enabled at their standard level.
config ARMV8_1_M_PACBTI_PACRET
bool "PACRET only"
help
This option instructs the compiler to generate code with return address signing for
all functions that save the return address to memory.
config ARMV8_1_M_PACBTI_PACRET_LEAF
bool "PACRET + Leaf"
help
This option instructs the compiler to generate code with return address signing for
all functions that save the return address to memory and,
also sign leaf functions even if they do not write the return address to memory.
config ARMV8_1_M_PACBTI_BTI
bool "BTI only"
help
This option enables Branch Target Identification (BTI), which inserts special landing
pad instructions at valid indirect branch targets. This option does not enable Pointer
Authentication (PAC).
config ARMV8_1_M_PACBTI_PACRET_BTI
bool "PACRET + BTI"
help
This option instructs the compiler to generate code with return address signing for
all functions that save the return address to memory and,
add landing-pad instructions at the permitted targets of indirect branch instructions
config ARMV8_1_M_PACBTI_PACRET_LEAF_BTI
bool "PACRET + Leaf + BTI"
help
This option instructs the compiler to generate code with return address signing for
all functions that save the return address to memory and,
also sign leaf functions even if they do not write the return address to memory and,
add landing-pad instructions at the permitted targets of indirect branch instructions
config ARMV8_1_M_PACBTI_NONE
bool "None"
help
This option instructs the compiler to generate code without branch protection or return
address signing
endchoice
config ARMV8_M_PMU_EVENTCNT
int "Number of event counters in the Performance Monitoring Unit"
depends on ARMV8_1_M_PMU
@@ -379,7 +422,7 @@ config SW_VECTOR_RELAY_CLIENT
initialization.
config CORTEX_M_DWT
bool "Data Watchpoint and Trace (DWT)" if !TIMING_FUNCTIONS
bool "Data Watchpoint and Trace (DWT)"
depends on CPU_CORTEX_M_HAS_DWT
default y if TIMING_FUNCTIONS
help

View File

@@ -13,7 +13,6 @@
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <cortex_m/dwt.h>
#include <cortex_m/debug.h>
/**
* @brief Assess whether a debug monitor event should be treated as an error

View File

@@ -15,17 +15,14 @@
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <inttypes.h>
#include <zephyr/arch/exception.h>
#include <zephyr/arch/common/exc_handle.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/barrier.h>
#include <cortex_m/debug.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#if defined(CONFIG_PRINTK) || defined(CONFIG_LOG)
#define PR_EXC(...) EXCEPTION_DUMP(__VA_ARGS__)
#define PR_EXC(...) LOG_ERR(__VA_ARGS__)
#define STORE_xFAR(reg_var, reg) uint32_t reg_var = (uint32_t)reg
#else
#define PR_EXC(...)

View File

@@ -16,7 +16,7 @@
void z_arm_save_fp_context(struct fpu_ctx_full *buffer)
{
#if defined(CONFIG_FPU)
#if defined(CONFIG_FPU_SHARING)
__ASSERT_NO_MSG(buffer != NULL);
uint32_t CONTROL = __get_CONTROL();
@@ -44,7 +44,7 @@ void z_arm_save_fp_context(struct fpu_ctx_full *buffer)
void z_arm_restore_fp_context(const struct fpu_ctx_full *buffer)
{
#if defined(CONFIG_FPU)
#if defined(CONFIG_FPU_SHARING)
if (buffer->ctx_saved) {
/* Set FPCA first so it is set even if an interrupt happens
* during restoration.

View File

@@ -1,6 +1,5 @@
/*
* Copyright (c) 2022, Carlo Caione <ccaione@baylibre.com>
* Copyright (c) 2025 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -15,20 +14,9 @@
/**
* CPU context for S2RAM
*/
__noinit _cpu_context_t _cpu_context;
#if DT_NODE_EXISTS(DT_NODELABEL(pm_s2ram)) &&\
DT_NODE_HAS_COMPAT(DT_NODELABEL(pm_s2ram), zephyr_memory_region)
/* Linker section name is given by `zephyr,memory-region` property of
* `zephyr,memory-region` compatible DT node with nodelabel `pm_s2ram`.
*/
__attribute__((section(DT_PROP(DT_NODELABEL(pm_s2ram), zephyr_memory_region))))
#else
__noinit
#endif
_cpu_context_t _cpu_context;
#ifndef CONFIG_HAS_PM_S2RAM_CUSTOM_MARKING
#ifndef CONFIG_PM_S2RAM_CUSTOM_MARKING
/**
* S2RAM Marker
*/
@@ -50,4 +38,4 @@ bool pm_s2ram_mark_check_and_clear(void)
return false;
}
#endif /* CONFIG_HAS_PM_S2RAM_CUSTOM_MARKING */
#endif /* CONFIG_PM_S2RAM_CUSTOM_MARKING */

View File

@@ -22,9 +22,6 @@
#include <zephyr/sys/barrier.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
#include <cortex_m/debug.h>
#include <zephyr/arch/common/xip.h>
#include <zephyr/arch/common/init.h>
/*
* GCC can detect if memcpy is passed a NULL argument, however one of
@@ -61,7 +58,7 @@ void __weak relocate_vector_table(void)
/* Copy vector table to its location in SRAM */
size_t vector_size = (size_t)_vector_end - (size_t)_vector_start;
arch_early_memcpy(_sram_vector_start, _vector_start, vector_size);
z_early_memcpy(_sram_vector_start, _vector_start, vector_size);
#endif
SCB->VTOR = VECTOR_ADDRESS & VTOR_MASK;
barrier_dsync_fence_full();
@@ -195,16 +192,18 @@ extern FUNC_NORETURN void z_cstart(void);
* This routine prepares for the execution of and runs C code.
*
*/
FUNC_NORETURN void z_prep_c(void)
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
relocate_vector_table();
#if defined(CONFIG_CPU_HAS_FPU)
z_arm_floating_point_init();
#endif
arch_bss_zero();
arch_data_copy();
z_bss_zero();
z_data_copy();
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
/* Invoke SoC-specific interrupt controller initialization */
z_soc_irq_init();

View File

@@ -1,6 +1,5 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -20,7 +19,7 @@
_ASM_FILE_PROLOGUE
GTEXT(z_arm_reset)
GTEXT(arch_early_memset)
GTEXT(z_early_memset)
GDATA(z_interrupt_stacks)
GDATA(z_main_stack)
#if defined(CONFIG_DEBUG_THREAD_INFO)
@@ -35,27 +34,6 @@ GTEXT(z_arm_init_arch_hw_at_boot)
#if defined(CONFIG_PM_S2RAM)
GTEXT(arch_pm_s2ram_resume)
#endif
#if defined(CONFIG_SOC_EARLY_RESET_HOOK)
GTEXT(soc_early_reset_hook)
#endif
/*
* PACBTI Mask for CONTROL register:
* bit 4 - BTI_EN, bit 5 - UBTI_EN,
* bit 6 - PAC_EN, bit 7 - UPAC_EN
*/
#ifdef CONFIG_ARM_PAC
#define CONTROL_ARM_PAC_MASK (1<<6)|(1<<7)
#else
#define CONTROL_ARM_PAC_MASK 0
#endif
#ifdef CONFIG_ARM_BTI
#define CONTROL_ARM_BTI_MASK (1<<4)|(1<<5)
#else
#define CONTROL_ARM_BTI_MASK 0
#endif
/**
*
@@ -104,10 +82,6 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
#endif /* CONFIG_INIT_ARCH_HW_AT_BOOT */
#if defined(CONFIG_SOC_EARLY_RESET_HOOK)
/* Call custom code that executes before any stack is set up or RAM memory is accessed */
bl soc_early_reset_hook
#endif
#if defined(CONFIG_PM_S2RAM)
/*
* Temporarily set MSP to interrupt stack so that arch_pm_s2ram_resume can
@@ -203,7 +177,7 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
ldr r0, =z_interrupt_stacks
ldr r1, =0xaa
ldr r2, =CONFIG_ISR_STACK_SIZE + MPU_GUARD_ALIGN_AND_SIZE
bl arch_early_memset
bl z_early_memset
#endif
/*
@@ -215,7 +189,7 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
adds r0, r0, r1
msr PSP, r0
mrs r0, CONTROL
movs r1, #(2 | CONTROL_ARM_PAC_MASK | CONTROL_ARM_BTI_MASK)
movs r1, #2
orrs r0, r1 /* CONTROL_SPSEL_Msk */
msr CONTROL, r0
/*

View File

@@ -1,6 +1,5 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright (c) 2025 STMicroelectronics
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -23,8 +22,6 @@
#include <zephyr/linker/linker-defs.h>
#include <zephyr/cache.h>
#include <zephyr/arch/cache.h>
#include <zephyr/arch/arm/cortex_m/scb.h>
#include <cortex_m/exception.h>
#if defined(CONFIG_CPU_HAS_NXP_SYSMPU)
#include <fsl_sysmpu.h>
@@ -154,99 +151,3 @@ void z_arm_init_arch_hw_at_boot(void)
barrier_isync_fence_full();
}
#endif /* CONFIG_INIT_ARCH_HW_AT_BOOT */
/**
* @brief Save essential SCB registers into a provided context structure.
*
* This function reads the current values of critical System Control Block (SCB)
* registers that are safe to backup, and stores them into the `context` structure.
* Access to SCB registers requires atomicity and consistency, so calling code
* should guarantee that interrupts are disabled.
*
* @param context Pointer to an `scb_context` structure where the register
* values will be stored. Must not be NULL.
*/
void z_arm_save_scb_context(struct scb_context *context)
{
__ASSERT_NO_MSG(context != NULL);
#if defined(CONFIG_CPU_CORTEX_M_HAS_VTOR)
context->vtor = SCB->VTOR;
#endif
context->aircr = SCB->AIRCR;
context->scr = SCB->SCR;
context->ccr = SCB->CCR;
/*
* Backup the System Handler Priority Registers.
* SCB->SHPR is defined as u8[] or u32[] depending
* on the target Cortex-M core, but it can always
* be accessed using word-sized reads and writes.
* Make u32 pointer using explicit cast to allow
* access on all cores without compiler warnings.
*/
volatile uint32_t *shpr = (volatile uint32_t *)SCB->SHPR;
for (int i = 0; i < SHPR_SIZE_W; i++) {
context->shpr[i] = shpr[i];
}
context->shcsr = SCB->SHCSR;
#if defined(CPACR_PRESENT)
context->cpacr = SCB->CPACR;
#endif /* CPACR_PRESENT */
}
/**
* @brief Restores essential SCB registers from a provided context structure.
*
* This function writes the values from the `context` structure back to the
* respective System Control Block (SCB) registers. Access to SCB registers
* requires atomicity and consistency, so calling code should guarantee that
* interrupts are disabled.
*
* @param context Pointer to a `scb_context` structure containing the
* register values to be restored. Must not be NULL.
*/
void z_arm_restore_scb_context(const struct scb_context *context)
{
__ASSERT_NO_MSG(context != NULL);
#if defined(CONFIG_CPU_CORTEX_M_HAS_VTOR)
/* Restore VTOR if present on this CPU */
SCB->VTOR = context->vtor;
#endif
/* Restoring AIRCR requires writing VECTKEY along with desired bits.
* Mask backed up data to ensure only modifiable bits are restored.
*/
SCB->AIRCR = (context->aircr & ~SCB_AIRCR_VECTKEY_Msk) |
(AIRCR_VECT_KEY_PERMIT_WRITE << SCB_AIRCR_VECTKEY_Pos);
SCB->SCR = context->scr;
SCB->CCR = context->ccr;
/* Restore System Handler Priority Registers */
volatile uint32_t *shpr = (volatile uint32_t *)SCB->SHPR;
for (int i = 0; i < SHPR_SIZE_W; i++) {
shpr[i] = context->shpr[i];
}
/* Restore SHCSR */
SCB->SHCSR = context->shcsr;
#if defined(CPACR_PRESENT)
/* Restore CPACR */
SCB->CPACR = context->cpacr;
#endif /* CPACR_PRESENT */
/**
* Ensure that updates to the SCB are visible by executing a DSB followed by ISB.
* This sequence is recommended in the M-profile Architecture Reference Manuals:
* - ARMv6: DDI0419 Issue E - §B2.5 "Barrier support for system correctness"
* - ARMv7: DDI0403 Issue E.e - §A3.7.3 "Memory barriers" (at end of section)
* - ARMv8: DDI0553 Version B.Y - §B7.2.16 "Synchronization requirements [...]"
*/
__DSB();
__ISB();
}

View File

@@ -2,7 +2,6 @@
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright (c) 2017-2019 Nordic Semiconductor ASA.
* Copyright (c) 2020 Stephanos Ioannidis <root@stephanos.io>
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -314,24 +313,6 @@ SECTION_FUNC(TEXT, z_arm_pendsv)
#endif
#ifdef CONFIG_ARM_PAC_PER_THREAD
/* Read thread's dedicated PAC key and write them in the privileged PAC key registers.
* Note: There is no way to know the _current thread mode after the thread creation since
* `_current->arch.mode` for the userspace thread is set in z_arm_userspace_enter() which
* runs after z_arm_pendsv is done. So for now, while switching to an unprivileged thread
* the same PAC keys are set in both privileged and unprivileged PAC key registers.
* TODO: find a way to not set privileged PAC keys if the thread being switched into is an
* unprivileged thread.
*/
add r0, r2, #_thread_offset_to_pac_keys
ldmia r0!, {r3-r6}
msr PAC_KEY_P_0, r3
msr PAC_KEY_P_1, r4
msr PAC_KEY_P_2, r5
msr PAC_KEY_P_3, r6
clrm {r3-r6}
#endif /* CONFIG_ARM_PAC_PER_THREAD */
/* load callee-saved + psp from thread */
add r0, r2, #_thread_offset_to_callee_saved
ldmia r0, {r4-r11, ip}

View File

@@ -1,7 +1,7 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright (c) 2021 Lexmark International, Inc.
* Copyright (c) 2023, 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
* Copyright (c) 2023 Arm Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -15,12 +15,11 @@
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/llext/symbol.h>
#include <ksched.h>
#include <zephyr/sys/barrier.h>
#include <stdbool.h>
#include <cmsis_core.h>
#include <zephyr/random/random.h>
#if (MPU_GUARD_ALIGN_AND_SIZE_FLOAT > MPU_GUARD_ALIGN_AND_SIZE)
#define FP_GUARD_EXTRA_SIZE (MPU_GUARD_ALIGN_AND_SIZE_FLOAT - MPU_GUARD_ALIGN_AND_SIZE)
@@ -46,35 +45,6 @@
K_THREAD_STACK_DECLARE(z_main_stack, CONFIG_MAIN_STACK_SIZE);
#endif
#ifdef CONFIG_USERSPACE
static void setup_priv_stack(struct k_thread *thread)
{
/* Set up privileged stack before entering user mode */
thread->arch.priv_stack_start = (uint32_t)z_priv_stack_find(thread->stack_obj);
/* CONFIG_PRIVILEGED_STACK_SIZE does not account for MPU_GUARD_ALIGN_AND_SIZE or
* MPU_GUARD_ALIGN_AND_SIZE_FLOAT. Therefore, we must compute priv_stack_end here before
* adjusting priv_stack_start for the mpu guard alignment
*/
thread->arch.priv_stack_end = thread->arch.priv_stack_start + CONFIG_PRIVILEGED_STACK_SIZE;
#if defined(CONFIG_MPU_STACK_GUARD)
/* Stack guard area reserved at the bottom of the thread's
* privileged stack. Adjust the available (writable) stack
* buffer area accordingly.
*/
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
thread->arch.priv_stack_start +=
((thread->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0)
? MPU_GUARD_ALIGN_AND_SIZE_FLOAT
: MPU_GUARD_ALIGN_AND_SIZE;
#else
thread->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE;
#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
#endif /* CONFIG_MPU_STACK_GUARD */
}
#endif
/* An initial context, to be "restored" by z_arm_pendsv(), is put at the other
* end of the stack, and thus reusable by the stack when not needed anymore.
*
@@ -117,10 +87,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, char *sta
iframe = Z_STACK_PTR_TO_FRAME(struct __basic_sf, stack_ptr);
#if defined(CONFIG_USERSPACE)
thread->arch.priv_stack_start = 0;
if ((thread->base.user_options & K_USER) != 0) {
setup_priv_stack(thread);
iframe = Z_STACK_PTR_TO_FRAME(struct __basic_sf, thread->arch.priv_stack_end);
iframe->pc = (uint32_t)arch_user_mode_enter;
} else {
iframe->pc = (uint32_t)z_thread_entry;
@@ -151,12 +118,9 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, char *sta
thread->arch.mode |= Z_ARM_MODE_MPU_GUARD_FLOAT_Msk;
}
#endif
#if defined(CONFIG_USERSPACE)
thread->arch.priv_stack_start = 0;
#endif
#ifdef CONFIG_ARM_PAC_PER_THREAD
/* Generate PAC key and save it in thread context to be set later
* when the thread is actually switched in
*/
sys_csrand_get(&thread->arch.pac_keys, sizeof(struct pac_keys));
#endif
/*
* initial values in all other registers/thread entries are
@@ -251,8 +215,9 @@ uint32_t z_arm_mpu_stack_guard_and_fpu_adjust(struct k_thread *thread)
#ifdef CONFIG_USERSPACE
FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, void *p1, void *p2, void *p3)
{
uint32_t sp_is_priv = 1;
/* Set up privileged stack before entering user mode */
_current->arch.priv_stack_start = (uint32_t)z_priv_stack_find(_current->stack_obj);
#if defined(CONFIG_MPU_STACK_GUARD)
#if defined(CONFIG_THREAD_STACK_INFO)
/* We're dropping to user mode which means the guard area is no
@@ -269,26 +234,23 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, void *p1, v
_current->stack_info.start -= MPU_GUARD_ALIGN_AND_SIZE;
_current->stack_info.size += MPU_GUARD_ALIGN_AND_SIZE;
#endif /* CONFIG_THREAD_STACK_INFO */
/* Stack guard area reserved at the bottom of the thread's
* privileged stack. Adjust the available (writable) stack
* buffer area accordingly.
*/
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
_current->arch.priv_stack_start +=
((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0)
? MPU_GUARD_ALIGN_AND_SIZE_FLOAT
: MPU_GUARD_ALIGN_AND_SIZE;
#else
_current->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE;
#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
#endif /* CONFIG_MPU_STACK_GUARD */
/* 2 ways how arch_user_mode_enter is called:
* - called as part of context switch from z_arm_pendsv, in this case privileged stack is
* already setup and stack pointer points to privileged stack.
* - called directly from k_thread_user_mode_enter, in this case privileged stack is not
* setup and stack pointer points to user stack.
*
* When called from k_thread_user_mode_enter, we need to check and setup the privileged
* stack and then instruct z_arm_userspace_enter to change the PSP to the privileged stack.
* Note that we do not change the PSP in this function to avoid any conflict with compiler's
* sequence which has already pushed stuff on the user stack.
*/
if (0 == _current->arch.priv_stack_start) {
setup_priv_stack(_current);
sp_is_priv = 0;
}
z_arm_userspace_enter(user_entry, p1, p2, p3, (uint32_t)_current->stack_info.start,
_current->stack_info.size - _current->stack_info.delta, sp_is_priv);
_current->stack_info.size - _current->stack_info.delta);
CODE_UNREACHABLE;
}
@@ -500,15 +462,6 @@ int arch_float_enable(struct k_thread *thread, unsigned int options)
}
#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
int arch_coprocessors_disable(struct k_thread *thread)
{
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
return arch_float_disable(thread);
#else
return -ENOTSUP;
#endif
}
/* Internal function for Cortex-M initialization,
* applicable to either case of running Zephyr
* with or without multi-threading support.
@@ -579,9 +532,6 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, char *stack_ptr,
#endif
#endif /* CONFIG_BUILTIN_STACK_GUARD */
#ifdef CONFIG_ARM_PAC_PER_THREAD
__set_PAC_KEY_P((uint32_t *)&main_thread->arch.pac_keys);
#endif
/*
* Set PSP to the highest address of the main stack
* before enabling interrupts and jumping to main.
@@ -690,7 +640,7 @@ FUNC_NORETURN void z_arm_switch_to_main_no_multithreading(k_thread_entry_t main_
,
[_psplim] "r"(psplim)
#endif
: "r0", "r1", "r2", "ip", "lr", "memory");
: "r0", "r1", "r2", "ip", "lr");
CODE_UNREACHABLE; /* LCOV_EXCL_LINE */
}

View File

@@ -19,6 +19,7 @@
#include <zephyr/kernel.h>
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <ksched.h>
#include <kswap.h>
#include <zephyr/sys/__assert.h>

View File

@@ -13,7 +13,6 @@
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/exception.h>
#include <kernel_arch_data.h>
#include <zephyr/logging/log.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
@@ -21,14 +20,14 @@ LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_EXCEPTION_DEBUG
static void esf_dump(const struct arch_esf *esf)
{
EXCEPTION_DUMP("r0/a1: 0x%08x r1/a2: 0x%08x r2/a3: 0x%08x",
LOG_ERR("r0/a1: 0x%08x r1/a2: 0x%08x r2/a3: 0x%08x",
esf->basic.a1, esf->basic.a2, esf->basic.a3);
EXCEPTION_DUMP("r3/a4: 0x%08x r12/ip: 0x%08x r14/lr: 0x%08x",
LOG_ERR("r3/a4: 0x%08x r12/ip: 0x%08x r14/lr: 0x%08x",
esf->basic.a4, esf->basic.ip, esf->basic.lr);
EXCEPTION_DUMP(" xpsr: 0x%08x", esf->basic.xpsr);
LOG_ERR(" xpsr: 0x%08x", esf->basic.xpsr);
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
for (int i = 0; i < ARRAY_SIZE(esf->fpu.s); i += 4) {
EXCEPTION_DUMP("s[%2d]: 0x%08x s[%2d]: 0x%08x"
LOG_ERR("s[%2d]: 0x%08x s[%2d]: 0x%08x"
" s[%2d]: 0x%08x s[%2d]: 0x%08x",
i, (uint32_t)esf->fpu.s[i],
i + 1, (uint32_t)esf->fpu.s[i + 1],
@@ -37,7 +36,7 @@ static void esf_dump(const struct arch_esf *esf)
}
#ifdef CONFIG_VFP_FEATURE_REGS_S64_D32
for (int i = 0; i < ARRAY_SIZE(esf->fpu.d); i += 4) {
EXCEPTION_DUMP("d[%2d]: 0x%16llx d[%2d]: 0x%16llx"
LOG_ERR("d[%2d]: 0x%16llx d[%2d]: 0x%16llx"
" d[%2d]: 0x%16llx d[%2d]: 0x%16llx",
i, (uint64_t)esf->fpu.d[i],
i + 1, (uint64_t)esf->fpu.d[i + 1],
@@ -45,24 +44,24 @@ static void esf_dump(const struct arch_esf *esf)
i + 3, (uint64_t)esf->fpu.d[i + 3]);
}
#endif
EXCEPTION_DUMP("fpscr: 0x%08x", esf->fpu.fpscr);
LOG_ERR("fpscr: 0x%08x", esf->fpu.fpscr);
#endif
#if defined(CONFIG_EXTRA_EXCEPTION_INFO)
const struct _callee_saved *callee = esf->extra_info.callee;
if (callee != NULL) {
EXCEPTION_DUMP("r4/v1: 0x%08x r5/v2: 0x%08x r6/v3: 0x%08x",
LOG_ERR("r4/v1: 0x%08x r5/v2: 0x%08x r6/v3: 0x%08x",
callee->v1, callee->v2, callee->v3);
EXCEPTION_DUMP("r7/v4: 0x%08x r8/v5: 0x%08x r9/v6: 0x%08x",
LOG_ERR("r7/v4: 0x%08x r8/v5: 0x%08x r9/v6: 0x%08x",
callee->v4, callee->v5, callee->v6);
EXCEPTION_DUMP("r10/v7: 0x%08x r11/v8: 0x%08x psp: 0x%08x",
LOG_ERR("r10/v7: 0x%08x r11/v8: 0x%08x psp: 0x%08x",
callee->v7, callee->v8, callee->psp);
}
EXCEPTION_DUMP("EXC_RETURN: 0x%0x", esf->extra_info.exc_return);
LOG_ERR("EXC_RETURN: 0x%0x", esf->extra_info.exc_return);
#endif /* CONFIG_EXTRA_EXCEPTION_INFO */
EXCEPTION_DUMP("Faulting instruction address (r15/pc): 0x%08x",
LOG_ERR("Faulting instruction address (r15/pc): 0x%08x",
esf->basic.pc);
}
#endif /* CONFIG_EXCEPTION_DEBUG */
@@ -80,7 +79,7 @@ void z_arm_fatal_error(unsigned int reason, const struct arch_esf *esf)
if (reason == K_ERR_SPURIOUS_IRQ) {
uint32_t irqn = __get_IPSR() - 16;
EXCEPTION_DUMP("Unhandled IRQn: %d", irqn);
LOG_ERR("Unhandled IRQn: %d", irqn);
}
#endif

View File

@@ -1,6 +1,5 @@
/*
* Copyright (c) 2015 Intel corporation
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -35,8 +34,7 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
offload_routine = routine;
offload_param = parameter;
__asm__ volatile ("svc %[id]\n"
IF_ENABLED(CONFIG_ARM_BTI, ("bti"))
__asm__ volatile ("svc %[id]"
:
: [id] "i" (_SVC_CALL_IRQ_OFFLOAD)
: "memory");

View File

@@ -890,9 +890,6 @@ static int __arch_mem_map(void *virt, uintptr_t phys, size_t size, uint32_t flag
switch (flags & K_MEM_CACHE_MASK) {
case K_MEM_ARM_NORMAL_NC:
conv_flags |= MT_NORMAL;
break;
case K_MEM_CACHE_NONE:
default:
conv_flags |= MT_DEVICE;

View File

@@ -11,10 +11,10 @@ if(CONFIG_CPU_CORTEX_M AND NOT CONFIG_CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS)
zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_SYSMPU nxp_mpu_regions.c)
endif()
if(CONFIG_CPU_AARCH32_CORTEX_R)
if (CONFIG_CPU_AARCH32_CORTEX_R)
zephyr_library_include_directories(cortex_a_r)
elseif(CONFIG_CPU_CORTEX_M)
elseif (CONFIG_CPU_CORTEX_M)
zephyr_library_include_directories(cortex_m)
else()
else ()
message(FATAL_ERROR "CPU is not Cortex-A/R/M")
endif()
endif ()

View File

@@ -14,18 +14,11 @@
#include <kernel_arch_data.h>
#include <zephyr/mem_mgmt/mem_attr.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
#include <zephyr/arch/arm/mpu/arm_mpu.h>
#define LOG_LEVEL CONFIG_MPU_LOG_LEVEL
#include <zephyr/logging/log.h>
LOG_MODULE_DECLARE(mpu);
#if Z_ARM_CPU_HAS_PMSAV8_MPU
#define ATTRIBUTE_AND_SIZE_REG_NAME RLAR
#else
#define ATTRIBUTE_AND_SIZE_REG_NAME RASR
#endif
#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
/* The order here is on purpose since ARMv8-M SoCs may define
* CONFIG_ARMV6_M_ARMV8_M_BASELINE or CONFIG_ARMV7_M_ARMV8_M_MAINLINE
@@ -69,7 +62,6 @@ static uint8_t static_regions_num;
#include "arm_mpu_v7_internal.h"
#elif defined(CONFIG_CPU_CORTEX_M23) || \
defined(CONFIG_CPU_CORTEX_M33) || \
defined(CONFIG_CPU_CORTEX_M52) || \
defined(CONFIG_CPU_CORTEX_M55) || \
defined(CONFIG_CPU_CORTEX_M85) || \
defined(CONFIG_AARCH32_ARMV8_R)
@@ -147,11 +139,6 @@ static int mpu_configure_regions_from_dt(uint8_t *reg_index)
region_conf = _BUILD_REGION_CONF(region[idx], REGION_IO_ATTR);
break;
#endif
#ifdef REGION_DEVICE_ATTR
case DT_MEM_ARM_MPU_DEVICE:
region_conf = _BUILD_REGION_CONF(region[idx], REGION_DEVICE_ATTR);
break;
#endif
#ifdef REGION_EXTMEM_ATTR
case DT_MEM_ARM_MPU_EXTMEM:
region_conf = _BUILD_REGION_CONF(region[idx], REGION_EXTMEM_ATTR);
@@ -420,72 +407,6 @@ void arm_core_mpu_configure_dynamic_mpu_regions(const struct z_arm_mpu_partition
}
}
#if defined(CONFIG_CPU_CORTEX_M)
/**
* @brief Save the current MPU configuration into the provided context struct.
*/
void z_arm_save_mpu_context(struct z_mpu_context_retained *ctx)
{
uint32_t regions = get_num_regions();
__ASSERT_NO_MSG(ctx != NULL);
if (regions == 0 || regions > Z_ARM_MPU_MAX_REGIONS) {
LOG_DBG("Invalid MPU region count: %u", regions);
ctx->num_valid_regions = 0;
return;
}
ctx->num_valid_regions = regions;
for (uint32_t i = 0; i < regions; i++) {
MPU->RNR = i;
__DSB(); /* Ensure MPU->RNR write completes before reading registers */
__ISB();
ctx->rbar[i] = MPU->RBAR;
ctx->rasr_rlar[i] = MPU->ATTRIBUTE_AND_SIZE_REG_NAME;
}
#if Z_ARM_CPU_HAS_PMSAV8_MPU
ctx->mair[0] = MPU->MAIR0;
ctx->mair[1] = MPU->MAIR1;
#endif
ctx->ctrl = MPU->CTRL;
}
/**
* @brief Restore the MPU configuration from the provided context struct.
*/
void z_arm_restore_mpu_context(const struct z_mpu_context_retained *ctx)
{
__ASSERT_NO_MSG(ctx != NULL);
if (ctx->num_valid_regions == 0 || ctx->num_valid_regions > Z_ARM_MPU_MAX_REGIONS) {
LOG_DBG("Invalid MPU context num_valid_regions: %u", ctx->num_valid_regions);
return;
}
/* Disable MPU before reprogramming */
arm_core_mpu_disable();
for (uint32_t i = 0; i < ctx->num_valid_regions; i++) {
MPU->RNR = i;
MPU->RBAR = ctx->rbar[i];
MPU->ATTRIBUTE_AND_SIZE_REG_NAME = ctx->rasr_rlar[i];
}
#if Z_ARM_CPU_HAS_PMSAV8_MPU
MPU->MAIR0 = ctx->mair[0];
MPU->MAIR1 = ctx->mair[1];
#endif
/* Restore MPU control register (including enable bit if set) */
MPU->CTRL = ctx->ctrl;
/* Ensure MPU settings take effect before continuing */
__DSB();
__ISB();
}
#endif /* CONFIG_CPU_CORTEX_M */
/* ARM MPU Driver Initial Setup */
/*

View File

@@ -7,7 +7,7 @@
#include <zephyr/sys/slist.h>
#include <zephyr/arch/arm/mpu/arm_mpu.h>
#include <zephyr/arch/arm/mpu/arm_mpu_mem_cfg.h>
#include <zephyr/arch/arm/cortex_m/arm_mpu_mem_cfg.h>
static const struct arm_mpu_region mpu_regions[] = {
#ifdef CONFIG_XIP

View File

@@ -32,8 +32,7 @@ struct dynamic_region_info {
*/
static struct dynamic_region_info dyn_reg_info[MPU_DYNAMIC_REGION_AREAS_NUM];
#if defined(CONFIG_CPU_CORTEX_M23) || defined(CONFIG_CPU_CORTEX_M33) || \
defined(CONFIG_CPU_CORTEX_M52) || defined(CONFIG_CPU_CORTEX_M55) || \
defined(CONFIG_CPU_CORTEX_M85)
defined(CONFIG_CPU_CORTEX_M55) || defined(CONFIG_CPU_CORTEX_M85)
static inline void mpu_set_mair0(uint32_t mair0)
{
MPU->MAIR0 = mair0;

View File

@@ -1,6 +1,5 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -33,10 +32,6 @@
GEN_OFFSET_SYM(_thread_arch_t, basepri);
GEN_OFFSET_SYM(_thread_arch_t, swap_return_value);
#if defined(CONFIG_ARM_PAC_PER_THREAD)
GEN_OFFSET_SYM(_thread_arch_t, pac_keys);
#endif
#if defined(CONFIG_CPU_AARCH32_CORTEX_A) || defined(CONFIG_CPU_AARCH32_CORTEX_R)
GEN_OFFSET_SYM(_thread_arch_t, exception_depth);
GEN_OFFSET_SYM(_cpu_arch_t, exc_depth);
@@ -50,9 +45,8 @@ GEN_OFFSET_SYM(_thread_arch_t, mode_exc_return);
#endif
#if defined(CONFIG_USERSPACE)
GEN_OFFSET_SYM(_thread_arch_t, priv_stack_start);
GEN_OFFSET_SYM(_thread_arch_t, priv_stack_end);
#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
GEN_OFFSET_SYM(_thread_arch_t, priv_stack_end);
GEN_OFFSET_SYM(_thread_arch_t, sp_usr);
#endif
#endif

View File

@@ -42,41 +42,45 @@ GDATA(_k_syscall_table)
*
* The function is invoked as:
* z_arm_userspace_enter(user_entry, p1, p2, p3,
* stack_info.start, stack_info.size,
* sp_is_priv);
* stack_info.start, stack_info.size);
*/
SECTION_FUNC(TEXT,z_arm_userspace_enter)
/* move user_entry to lr */
mov lr, r0
/* load arguments from stack:
* r4 = user stack start
* r5 = user stack size
* r6 = sp_is_priv (1 if already on privileged stack)
*/
pop {r4, r5, r6}
/* get current thread pointer */
/* prepare to set stack to privileged stack */
ldr r0, =_kernel
ldr r0, [r0, #_kernel_offset_to_current]
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* move p1 to ip */
mov ip, r1
ldr r1, =_thread_offset_to_priv_stack_end
ldr r0, [r0, r1]
ldr r1, =_thread_offset_to_priv_stack_start
ldr r0, [r0, r1] /* priv stack ptr */
ldr r1, =CONFIG_PRIVILEGED_STACK_SIZE
add r0, r0, r1
/* Restore p1 from ip */
mov r1, ip
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) \
|| defined(CONFIG_CPU_AARCH32_CORTEX_R)
ldr r0, [r0, #_thread_offset_to_priv_stack_end] /* privileged stack ptr */
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
ldr r0, [r0, #_thread_offset_to_priv_stack_start] /* priv stack ptr */
ldr ip, =CONFIG_PRIVILEGED_STACK_SIZE
add r0, r0, ip
#elif defined(CONFIG_CPU_AARCH32_CORTEX_R)
ldr r0, [r0, #_thread_offset_to_priv_stack_start] /* priv stack ptr */
ldr ip, =CONFIG_PRIVILEGED_STACK_SIZE
add r0, r0, ip
ldr ip, =_kernel
ldr ip, [ip, #_kernel_offset_to_current]
str r0, [ip, #_thread_offset_to_priv_stack_end] /* priv stack end */
#endif
/* check if current stack is privileged and switch to it if not */
cmp r6, #1
beq 1f
/* store current stack pointer to ip
* the current stack pointer is needed to retrieve
* stack_info.start and stack_info.size
*/
mov ip, sp
#if defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
mov sp, r0
#else
/* set stack to privileged stack
@@ -90,28 +94,35 @@ SECTION_FUNC(TEXT,z_arm_userspace_enter)
msr PSP, r0
#endif
1:
/* push thread args and entrypoint to stack */
push {r1,r2,r3,lr}
#if defined(CONFIG_BUILTIN_STACK_GUARD)
/* At this point the privileged stack is not yet protected by PSPLIM.
* Since we have switched to the top of the privileged stack, we
* Since we have just switched to the top of the privileged stack, we
* are safe, as long as the stack can accommodate the maximum exception
* stack frame.
*/
ldr r1, =CONFIG_PRIVILEGED_STACK_SIZE
sub r0, r0, r1 /* Calculate start of privileged stack */
/* set stack pointer limit to the start of the privileged stack */
/* set stack pointer limit to the start of the priv stack */
ldr r0, =_kernel
ldr r0, [r0, #_kernel_offset_to_current]
ldr r0, [r0, #_thread_offset_to_priv_stack_start] /* priv stack ptr */
msr PSPLIM, r0
#endif
/* push args to stack */
push {r1,r2,r3,lr}
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
mov r1, ip
push {r0,r1}
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) \
|| defined(CONFIG_CPU_AARCH32_CORTEX_R)
push {r0,ip}
#endif
/* Re-program dynamic memory map.
*
* Important note:
* z_arm_configure_dynamic_mpu_regions() may re-program the MPU Stack Guard
* to guard the privileged stack for overflows (if building with option
* to guard the privilege stack for overflows (if building with option
* CONFIG_MPU_STACK_GUARD). There is a risk of actually overflowing the
* stack while doing the re-programming. We minimize the risk by placing
* this function immediately after we have switched to the privileged stack
@@ -125,10 +136,29 @@ SECTION_FUNC(TEXT,z_arm_userspace_enter)
ldr r0, [r0, #_kernel_offset_to_current]
bl z_arm_configure_dynamic_mpu_regions
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
pop {r0,r3}
/* load up stack info from user stack */
ldr r0, [r3]
ldr r3, [r3, #4]
mov ip, r3
push {r0,r3}
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) \
|| defined(CONFIG_CPU_AARCH32_CORTEX_R)
pop {r0,ip}
/* load up stack info from user stack */
ldr r0, [ip]
ldr ip, [ip, #4]
push {r0,ip}
#endif
/* clear the user stack area to clean out privileged data */
/* from right past the guard right up to the end */
mov r0, r4
mov r2, r5
mov r2, ip
#ifdef CONFIG_INIT_STACKS
ldr r1,=0xaaaaaaaa
#else
@@ -136,18 +166,17 @@ SECTION_FUNC(TEXT,z_arm_userspace_enter)
#endif
bl memset
/* At this point:
* r4 contains user stack start
* r5 contains user stack size
* calculate top of user stack in r0 (start+size)
*/
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
adds r0, r4, r5
pop {r0, r1}
mov ip, r1
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) \
|| defined(CONFIG_CPU_AARCH32_CORTEX_R)
add r0, r4, r5
pop {r0,ip}
#endif
/* r0 contains user stack start, ip contains user stack size */
add r0, r0, ip /* calculate top of stack */
/* pop remaining arguments from stack before switching stacks */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* Use r4 to pop lr, then restore r4 */
@@ -160,7 +189,7 @@ SECTION_FUNC(TEXT,z_arm_userspace_enter)
pop {r1,r2,r3,lr}
#endif
#if defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
/*
* set stack to user stack. We are in SYSTEM state, so r13 and r14 are
* shared with USER state
@@ -195,7 +224,10 @@ SECTION_FUNC(TEXT,z_arm_userspace_enter)
isb
/* Set PSPLIM to guard the thread's user stack. */
msr PSPLIM, r4
ldr r0, =_kernel
ldr r0, [r0, #_kernel_offset_to_current]
ldr r0, [r0, #_thread_offset_to_stack_info_start]
msr PSPLIM, r0
pop {r0, ip}
#endif
@@ -242,24 +274,10 @@ SECTION_FUNC(TEXT,z_arm_userspace_enter)
orrs ip, ip, #1
/* Store (unprivileged) mode in thread's mode state variable */
str r1, [r0, #_thread_offset_to_mode]
#ifdef CONFIG_ARM_PAC_PER_THREAD
/* Read thread's dedicated PAC key and since we are in unprivileged mode write them in the
* unprivileged PAC key registers.
* This needs to be done before we switch to unprivileged mode.
*/
add r1, r0, #_thread_offset_to_pac_keys
ldmia r1!, {r3-r6}
msr PAC_KEY_U_0, r3
msr PAC_KEY_U_1, r4
msr PAC_KEY_U_2, r5
msr PAC_KEY_U_3, r6
clrm {r3-r6}
#endif
#endif
dsb
msr CONTROL, ip
#endif /* CONFIG_CPU_AARCH32_CORTEX_R */
#endif
/* ISB is not strictly necessary here (stack pointer is not being
* touched), but it's recommended to avoid executing pre-fetched

View File

@@ -32,24 +32,15 @@ extern "C" {
extern volatile irq_offload_routine_t offload_routine;
#endif
/* Check the CPSR mode bits to see if we are in IRQ or FIQ mode */
static ALWAYS_INLINE bool arch_is_in_isr(void)
{
uint32_t nested;
#ifdef CONFIG_SMP
unsigned int key;
key = arch_irq_lock();
#endif
nested = arch_curr_cpu()->nested;
#ifdef CONFIG_SMP
arch_irq_unlock(key);
#endif
return nested != 0U;
return (arch_curr_cpu()->nested != 0U);
}
static ALWAYS_INLINE bool arch_is_in_nested_exception(const struct arch_esf *esf)
{
return (_current_cpu->arch.exc_depth > 1U) ? (true) : (false);
return (arch_curr_cpu()->arch.exc_depth > 1U) ? (true) : (false);
}
/**

View File

@@ -1,6 +1,5 @@
/*
* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -78,8 +77,7 @@ static ALWAYS_INLINE void arch_switch(void *switch_to, void **switched_from)
extern FUNC_NORETURN void z_arm_userspace_enter(k_thread_entry_t user_entry,
void *p1, void *p2, void *p3,
uint32_t stack_end,
uint32_t stack_start,
uint32_t sp_is_priv);
uint32_t stack_start);
extern void z_arm_fatal_error(unsigned int reason, const struct arch_esf *esf);

View File

@@ -1,36 +0,0 @@
/*
* Copyright (c) 2025 Google LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief ARM Cortex-M debug monitor functions interface based on DWT
*
*/
#ifndef ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_M_DEBUG_H_
#define ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_M_DEBUG_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Assess whether a debug monitor event should be treated as an error
*
* This routine checks the status of a debug_monitor() exception, and
* evaluates whether this needs to be considered as a processor error.
*
* @return true if the DM exception is a processor error, otherwise false
*/
bool z_arm_debug_monitor_event_error_check(void);
int z_arm_debug_enable_null_pointer_detection(void);
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_M_DEBUG_H_ */

View File

@@ -36,11 +36,14 @@ extern "C" {
* update to CMSIS_6.
*/
#if !defined DWT_LSR_Present_Msk
#define DWT_LSR_Present_Msk ITM_LSR_PRESENT_Msk
#define DWT_LSR_Present_Msk \
IF_ENABLED(CONFIG_ZEPHYR_CMSIS_MODULE, (ITM_LSR_Present_Msk)) \
IF_DISABLED(CONFIG_ZEPHYR_CMSIS_MODULE, (ITM_LSR_PRESENT_Msk))
#endif
#if !defined DWT_LSR_Access_Msk
#define DWT_LSR_Access_Msk ITM_LSR_ACCESS_Msk
#define DWT_LSR_Access_Msk \
IF_ENABLED(CONFIG_ZEPHYR_CMSIS_MODULE, (ITM_LSR_Access_Msk)) \
IF_DISABLED(CONFIG_ZEPHYR_CMSIS_MODULE, (ITM_LSR_ACCESS_Msk))
#endif
static inline void dwt_access(bool ena)

View File

@@ -261,6 +261,16 @@ static ALWAYS_INLINE void z_arm_set_fault_sp(const struct arch_esf *esf, uint32_
#endif /* CONFIG_DEBUG_COREDUMP */
}
/**
* @brief Assess whether a debug monitor event should be treated as an error
*
* This routine checks the status of a debug_monitor() exception, and
* evaluates whether this needs to be considered as a processor error.
*
* @return true if the DM exception is a processor error, otherwise false
*/
bool z_arm_debug_monitor_event_error_check(void);
#ifdef __cplusplus
}
#endif

View File

@@ -1,6 +1,5 @@
/*
* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -76,8 +75,7 @@ extern FUNC_NORETURN void z_arm_switch_to_main_no_multithreading(k_thread_entry_
#endif /* !CONFIG_MULTITHREADING */
extern FUNC_NORETURN void z_arm_userspace_enter(k_thread_entry_t user_entry, void *p1, void *p2,
void *p3, uint32_t stack_end, uint32_t stack_start,
uint32_t sp_is_priv);
void *p3, uint32_t stack_end, uint32_t stack_start);
extern void z_arm_fatal_error(unsigned int reason, const struct arch_esf *esf);

View File

@@ -1,6 +1,5 @@
/*
* Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -46,10 +45,10 @@
#define _thread_offset_to_priv_stack_start \
(___thread_t_arch_OFFSET + ___thread_arch_t_priv_stack_start_OFFSET)
#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
#define _thread_offset_to_priv_stack_end \
(___thread_t_arch_OFFSET + ___thread_arch_t_priv_stack_end_OFFSET)
#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
#define _thread_offset_to_sp_usr \
(___thread_t_arch_OFFSET + ___thread_arch_t_sp_usr_OFFSET)
#endif
@@ -60,10 +59,6 @@
(___thread_stack_info_t_start_OFFSET + ___thread_t_stack_info_OFFSET)
#endif
#if defined(CONFIG_ARM_PAC_PER_THREAD)
#define _thread_offset_to_pac_keys \
(___thread_t_arch_OFFSET + ___thread_arch_t_pac_keys_OFFSET)
#endif
/* end - threads */

View File

@@ -41,9 +41,9 @@ zephyr_library_sources_ifdef(CONFIG_HAS_ARM_SMCCC smccc-call.S)
zephyr_library_sources_ifdef(CONFIG_AARCH64_IMAGE_HEADER header.S)
zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c)
zephyr_library_sources_ifdef(CONFIG_DEBUG_COREDUMP coredump.c)
if((CONFIG_MP_MAX_NUM_CPUS GREATER 1) OR (CONFIG_SMP))
if ((CONFIG_MP_MAX_NUM_CPUS GREATER 1) OR (CONFIG_SMP))
zephyr_library_sources(smp.c)
endif()
endif ()
zephyr_cc_option_ifdef(CONFIG_USERSPACE -mno-outline-atomics)
zephyr_cc_option_ifdef(CONFIG_FRAME_POINTER -mno-omit-leaf-frame-pointer)

View File

@@ -9,7 +9,7 @@ config CPU_CORTEX_A
select HAS_FLASH_LOAD_OFFSET
select SCHED_IPI_SUPPORTED if SMP
select CPU_HAS_FPU
select ARCH_HAS_SINGLE_THREAD_SUPPORT if !SMP
select ARCH_HAS_SINGLE_THREAD_SUPPORT
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE
imply FPU
@@ -72,13 +72,6 @@ config CPU_CORTEX_A76_A55
help
This option signifies the use of a Cortex-A76 and A55 big little CPU cluster
config CPU_CORTEX_A78
bool
select CPU_CORTEX_A
select ARMV8_A
help
This option signifies the use of a Cortex-A78 CPU
config CPU_CORTEX_R82
bool
select CPU_AARCH64_CORTEX_R

View File

@@ -760,8 +760,8 @@ static int configure_domain_partitions(struct k_mem_domain *domain)
struct k_thread *thread;
int ret;
SYS_DLIST_FOR_EACH_CONTAINER(&domain->thread_mem_domain_list, thread,
mem_domain_info.thread_mem_domain_node) {
SYS_DLIST_FOR_EACH_CONTAINER(&domain->mem_domain_q, thread,
mem_domain_info.mem_domain_q_node) {
ret = configure_dynamic_mpu_regions(thread);
if (ret != 0) {
return ret;

View File

@@ -23,11 +23,6 @@ SECTION_FUNC(TEXT, arch_cpu_idle)
#endif
dsb sy
wfi
#ifdef CONFIG_TRACING
str lr, [sp, #-16]!
bl sys_trace_idle_exit
ldr lr, [sp], #16
#endif
msr daifclr, #(DAIFCLR_IRQ_BIT)
ret
#endif
@@ -43,11 +38,6 @@ SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
msr daifset, #(DAIFSET_IRQ_BIT)
isb
wfe
#ifdef CONFIG_TRACING
str lr, [sp, #-16]!
bl sys_trace_idle_exit
ldr lr, [sp], #16
#endif
tst x0, #(DAIF_IRQ_BIT)
beq _irq_disabled
msr daifclr, #(DAIFCLR_IRQ_BIT)

View File

@@ -18,9 +18,9 @@ _ASM_FILE_PROLOGUE
* to memset or memcpy on its own.
*/
/* void arch_early_memset(void *dst, int c, size_t n) */
GTEXT(arch_early_memset)
SECTION_FUNC(TEXT, arch_early_memset)
/* void z_early_memset(void *dst, int c, size_t n) */
GTEXT(z_early_memset)
SECTION_FUNC(TEXT, z_early_memset)
/* is dst pointer 8-bytes aligned? */
tst x0, #0x7
@@ -51,9 +51,9 @@ SECTION_FUNC(TEXT, arch_early_memset)
4: ret
/* void arch_early_memcpy(void *dst, const void *src, size_t n) */
GTEXT(arch_early_memcpy)
SECTION_FUNC(TEXT, arch_early_memcpy)
/* void z_early_memcpy(void *dst, const void *src, size_t n) */
GTEXT(z_early_memcpy)
SECTION_FUNC(TEXT, z_early_memcpy)
/* are dst and src pointers 8-bytes aligned? */
orr x8, x1, x0

View File

@@ -22,7 +22,6 @@
#include <zephyr/sys/poweroff.h>
#include <kernel_arch_func.h>
#include <kernel_arch_interface.h>
#include <zephyr/arch/exception.h>
#include "paging.h"
@@ -180,24 +179,24 @@ static void dump_esr(uint64_t esr, bool *dump_far)
err = "Unknown";
}
EXCEPTION_DUMP("ESR_ELn: 0x%016llx", esr);
EXCEPTION_DUMP(" EC: 0x%llx (%s)", GET_ESR_EC(esr), err);
EXCEPTION_DUMP(" IL: 0x%llx", GET_ESR_IL(esr));
EXCEPTION_DUMP(" ISS: 0x%llx", GET_ESR_ISS(esr));
LOG_ERR("ESR_ELn: 0x%016llx", esr);
LOG_ERR(" EC: 0x%llx (%s)", GET_ESR_EC(esr), err);
LOG_ERR(" IL: 0x%llx", GET_ESR_IL(esr));
LOG_ERR(" ISS: 0x%llx", GET_ESR_ISS(esr));
}
static void esf_dump(const struct arch_esf *esf)
{
EXCEPTION_DUMP("x0: 0x%016llx x1: 0x%016llx", esf->x0, esf->x1);
EXCEPTION_DUMP("x2: 0x%016llx x3: 0x%016llx", esf->x2, esf->x3);
EXCEPTION_DUMP("x4: 0x%016llx x5: 0x%016llx", esf->x4, esf->x5);
EXCEPTION_DUMP("x6: 0x%016llx x7: 0x%016llx", esf->x6, esf->x7);
EXCEPTION_DUMP("x8: 0x%016llx x9: 0x%016llx", esf->x8, esf->x9);
EXCEPTION_DUMP("x10: 0x%016llx x11: 0x%016llx", esf->x10, esf->x11);
EXCEPTION_DUMP("x12: 0x%016llx x13: 0x%016llx", esf->x12, esf->x13);
EXCEPTION_DUMP("x14: 0x%016llx x15: 0x%016llx", esf->x14, esf->x15);
EXCEPTION_DUMP("x16: 0x%016llx x17: 0x%016llx", esf->x16, esf->x17);
EXCEPTION_DUMP("x18: 0x%016llx lr: 0x%016llx", esf->x18, esf->lr);
LOG_ERR("x0: 0x%016llx x1: 0x%016llx", esf->x0, esf->x1);
LOG_ERR("x2: 0x%016llx x3: 0x%016llx", esf->x2, esf->x3);
LOG_ERR("x4: 0x%016llx x5: 0x%016llx", esf->x4, esf->x5);
LOG_ERR("x6: 0x%016llx x7: 0x%016llx", esf->x6, esf->x7);
LOG_ERR("x8: 0x%016llx x9: 0x%016llx", esf->x8, esf->x9);
LOG_ERR("x10: 0x%016llx x11: 0x%016llx", esf->x10, esf->x11);
LOG_ERR("x12: 0x%016llx x13: 0x%016llx", esf->x12, esf->x13);
LOG_ERR("x14: 0x%016llx x15: 0x%016llx", esf->x14, esf->x15);
LOG_ERR("x16: 0x%016llx x17: 0x%016llx", esf->x16, esf->x17);
LOG_ERR("x18: 0x%016llx lr: 0x%016llx", esf->x18, esf->lr);
}
#endif /* CONFIG_EXCEPTION_DEBUG */
@@ -299,11 +298,10 @@ static bool print_trace_address(void *arg, unsigned long lr, void *fp)
uint32_t offset = 0;
const char *name = symtab_find_symbol_name(lr, &offset);
EXCEPTION_DUMP(" %d: fp: 0x%016llx lr: 0x%016lx [%s+0x%x]",
(*i)++, (uint64_t)fp, lr, name, offset);
LOG_ERR(" %d: fp: 0x%016llx lr: 0x%016lx [%s+0x%x]", (*i)++, (uint64_t)fp, lr, name,
offset);
#else
EXCEPTION_DUMP(" %d: fp: 0x%016llx lr: 0x%016lx",
(*i)++, (uint64_t)fp, lr);
LOG_ERR(" %d: fp: 0x%016llx lr: 0x%016lx", (*i)++, (uint64_t)fp, lr);
#endif /* CONFIG_SYMTAB */
return true;
@@ -313,10 +311,10 @@ static void esf_unwind(const struct arch_esf *esf)
{
int i = 0;
EXCEPTION_DUMP("");
EXCEPTION_DUMP("call trace:");
LOG_ERR("");
LOG_ERR("call trace:");
walk_stackframe(print_trace_address, &i, esf, CONFIG_ARCH_STACKWALK_MAX_FRAMES);
EXCEPTION_DUMP("");
LOG_ERR("");
}
#endif /* CONFIG_EXCEPTION_STACK_TRACE */
@@ -340,8 +338,7 @@ static bool z_arm64_stack_corruption_check(struct arch_esf *esf, uint64_t esr, u
write_cpacr_el1(read_cpacr_el1() | CPACR_EL1_FPEN_NOTRAP);
#endif
arch_curr_cpu()->arch.corrupted_sp = 0UL;
EXCEPTION_DUMP("STACK OVERFLOW FROM KERNEL,"
" SP: 0x%llx OR FAR: 0x%llx INVALID,"
LOG_ERR("STACK OVERFLOW FROM KERNEL, SP: 0x%llx OR FAR: 0x%llx INVALID,"
" SP LIMIT: 0x%llx", sp, far, sp_limit);
return true;
}
@@ -352,9 +349,8 @@ static bool z_arm64_stack_corruption_check(struct arch_esf *esf, uint64_t esr, u
guard_start = sp_limit - Z_ARM64_STACK_GUARD_SIZE;
sp = esf->sp;
if (sp <= sp_limit || (guard_start <= far && far <= sp_limit)) {
EXCEPTION_DUMP("STACK OVERFLOW FROM USERSPACE,"
"SP: 0x%llx OR FAR: 0x%llx INVALID,"
" SP LIMIT: 0x%llx", sp, far, sp_limit);
LOG_ERR("STACK OVERFLOW FROM USERSPACE, SP: 0x%llx OR FAR: 0x%llx INVALID,"
" SP LIMIT: 0x%llx", sp, far, sp_limit);
return true;
}
}
@@ -431,15 +427,15 @@ void z_arm64_fatal_error(unsigned int reason, struct arch_esf *esf)
#ifdef CONFIG_EXCEPTION_DEBUG
bool dump_far = false;
EXCEPTION_DUMP("ELR_ELn: 0x%016llx", elr);
LOG_ERR("ELR_ELn: 0x%016llx", elr);
dump_esr(esr, &dump_far);
if (dump_far) {
EXCEPTION_DUMP("FAR_ELn: 0x%016llx", far);
LOG_ERR("FAR_ELn: 0x%016llx", far);
}
EXCEPTION_DUMP("TPIDRRO: 0x%016llx", read_tpidrro_el0());
LOG_ERR("TPIDRRO: 0x%016llx", read_tpidrro_el0());
#endif /* CONFIG_EXCEPTION_DEBUG */
if (is_recoverable(esf, esr, far, elr) &&

View File

@@ -28,32 +28,23 @@ extern void z_arm64_fpu_restore(struct z_arm64_fp_context *saved_fp_context);
#include <string.h>
static char *dbg_prefix(char *buf, char *msg, struct k_thread *th)
static void DBG(char *msg, struct k_thread *th)
{
char buf[80], *p;
unsigned int v;
strcpy(buf, "CPU# exc# ");
buf[3] = '0' + _current_cpu->id;
buf[8] = '0' + arch_exception_depth();
strcat(buf, _current->name);
strcat(buf, ": ");
strcat(buf, msg);
if (th != NULL) {
strcat(buf, " ");
strcat(buf, th->name);
}
return buf + strlen(buf);
}
strcat(buf, " ");
strcat(buf, th->name);
static void DBG(char *msg, struct k_thread *th)
{
char buf[80], *p;
unsigned int v;
p = dbg_prefix(buf, msg, th);
if (th == NULL) {
th = _current;
}
v = *(unsigned char *)&th->arch.saved_fp_context;
p = buf + strlen(buf);
*p++ = ' ';
*p++ = ((v >> 4) < 10) ? ((v >> 4) + '0') : ((v >> 4) - 10 + 'a');
*p++ = ((v & 15) < 10) ? ((v & 15) + '0') : ((v & 15) - 10 + 'a');
@@ -63,31 +54,9 @@ static void DBG(char *msg, struct k_thread *th)
k_str_out(buf, p - buf);
}
static void DBG_PC(char *msg, uintptr_t pc)
{
char buf[80], *p;
uintptr_t addr = pc;
int i;
p = dbg_prefix(buf, msg, NULL);
strcpy(p, " PC=0x");
p += 6;
/* Format PC address as hex */
for (i = (sizeof(uintptr_t) * 2) - 1; i >= 0; i--) {
unsigned int nibble = (addr >> (i * 4)) & 0xf;
*p++ = (nibble < 10) ? (nibble + '0') : (nibble - 10 + 'a');
}
*p++ = '\n';
*p = 0;
k_str_out(buf, p - buf);
}
#else
static inline void DBG(char *msg, struct k_thread *t) { }
static inline void DBG_PC(char *msg, uintptr_t pc) { }
#endif /* FPU_DEBUG */
@@ -230,7 +199,6 @@ static bool simulate_str_q_insn(struct arch_esf *esf)
/* did we do something? */
if (pc != (uint32_t *)esf->elr) {
DBG_PC("simulated", esf->elr);
/* resume execution past the simulated instructions */
esf->elr = (uintptr_t)pc;
return true;
@@ -262,8 +230,6 @@ void z_arm64_fpu_trap(struct arch_esf *esf)
return;
}
DBG_PC("trap entry", esf->elr);
/* turn on FPU access */
write_cpacr_el1(read_cpacr_el1() | CPACR_EL1_FPEN_NOTRAP);
barrier_isync_fence_full();
@@ -302,7 +268,7 @@ void z_arm64_fpu_trap(struct arch_esf *esf)
/* restore our content */
z_arm64_fpu_restore(&_current->arch.saved_fp_context);
DBG("restore", NULL);
DBG("restore", _current);
}
/*

View File

@@ -64,14 +64,6 @@ SECTION_FUNC(TEXT, _isr_wrapper)
bl z_soc_irq_get_active
#endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
/* Preserve original IAR value */
str x0, [sp, #-16]!
#if CONFIG_GIC_VER == 2 && defined(CONFIG_SMP)
/* Mask out GICC_IAR.CPUID [12:10] */
bic x0, x0, #0x1c00
#endif
#if CONFIG_GIC_VER >= 3
/*
* Ignore Special INTIDs 1020..1023 see 2.2.1 of Arm Generic Interrupt Controller
@@ -90,6 +82,8 @@ oob:
cmp x0, x1
b.hi spurious_continue
stp x0, xzr, [sp, #-16]!
/* Retrieve the interrupt service routine */
ldr x1, =_sw_isr_table
add x1, x1, x0, lsl #4 /* table is 16-byte wide */
@@ -103,12 +97,10 @@ oob:
blr x3
msr daifset, #(DAIFSET_IRQ_BIT)
spurious_continue:
/* Retrieve original IAR value */
ldr x0, [sp], #16
/* Signal end-of-interrupt */
ldp x0, xzr, [sp], #16
spurious_continue:
#if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
bl arm_gic_eoi
#else

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