Daniel Leung 61e9f9ea04 soc: intel_adsp: rename CONFIG_SOC_INTEL_ACE* to CONFIG_SOC_ACE* ...

Just following guidelines here.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>

2026-01-20 20:09:40 -05:00

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adl

boards: intel: adl: Added alias for pwm

2025-12-03 11:41:33 +01:00

adsp

soc: intel_adsp: rename CONFIG_SOC_INTEL_ACE* to CONFIG_SOC_ACE*

2026-01-20 20:09:40 -05:00

btl

boards: intel: btl: Added revisions to support Hybrid and 12P

2025-10-08 15:10:58 -04:00

common

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ehl

boards: samples: remove CONFIG_BUILD_NO_GAP_FILL=y and similar

2024-12-02 11:14:09 +01:00

ish

doc: fix spelling errors tree-wide

2025-09-03 17:04:13 +02:00

niosv_g

boards: Remove help text from SoC selection Kconfigs

2025-08-01 07:44:39 -04:00

niosv_m

boards: Remove help text from SoC selection Kconfigs

2025-08-01 07:44:39 -04:00

ptl

dts: x86: intel: panther_lake: Update RTC to support MFD method

2025-10-05 10:06:05 -04:00

rpl

boards: intel: rpl: Added revisions for RPL-s board

2025-05-09 01:40:09 +02:00

socfpga

devicetree: format files in boards

2025-09-12 18:29:00 +02:00

socfpga_std/cyclonev_socdk

Kconfig: make use of configdefault

2025-11-13 11:20:20 -05:00

wcl

boards: intel: add full_name to intel_wcl_crb

2026-01-09 07:56:40 -06:00

index.rst

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