Nicolas Pitre f5d6b9ea0e tests: arm64: Add SIMD context switch stress test ...

Add stress test for SIMD register save/restore during context switching.
The test validates correct FPU context handling using either ARM Neon or
SVE2 instructions depending on the build target.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>

2025-11-18 17:49:40 -05:00

..

arm64_gicv3_its

boards: arm: Create unified fvp_base_revc_2xaem board structure

2025-11-18 17:49:40 -05:00

arm64_high_addresses

tests: arch: arm64: arm64_high_address: Exclude Renesas RZ/A3UL SMARC

2025-03-19 03:34:15 +01:00

arm64_isa_features

arch: arm64: Implement SVE context switching for ARMv9-A

2025-11-18 17:49:40 -05:00

arm64_mmu

arch/arm64/mmu: allow partial unmap of block mappings again

2024-08-27 15:14:43 -04:00

arm64_psci

tests: remove CONFIG_ZTEST_NEW_API in all tests

2023-10-20 15:04:29 +02:00

arm64_smc_call

boards: arm: Create unified fvp_base_revc_2xaem board structure

2025-11-18 17:49:40 -05:00

arm64_sve_ctx

tests: arm64: SVE: context switching test across different privileges

2025-11-18 17:49:40 -05:00

arm64_sve_stress

tests: arm64: Add SIMD context switch stress test

2025-11-18 17:49:40 -05:00