2bd84a1bc5
Port the only RISC-V SoC from GigaDevice to HWMv2. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
12 lines
335 B
CMake
12 lines
335 B
CMake
# Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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zephyr_sources(entry.S)
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zephyr_sources(soc.c)
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zephyr_include_directories(.)
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zephyr_linker_sources(ROM_START SORT_KEY 0x0 init.ld)
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set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/riscv/common/linker.ld CACHE INTERNAL "")
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