2bd84a1bc5
Port the only RISC-V SoC from GigaDevice to HWMv2. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
27 lines
408 B
C
27 lines
408 B
C
/*
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* Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/init.h>
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#include <zephyr/irq.h>
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#include <gd32vf103.h>
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static int gigadevice_gd32v_soc_init(void)
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{
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uint32_t key;
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key = irq_lock();
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SystemInit();
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irq_unlock(key);
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return 0;
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}
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SYS_INIT(gigadevice_gd32v_soc_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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