a6a11cc57d
CVA6 supports custom CSR. Move 'cva6.h' to 'arch/riscv/custom/cva6_csr.h', allowing other SoCs using the CVA6 core to reuse the same CSR definitions. Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
41 lines
952 B
C
41 lines
952 B
C
/*
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* Copyright (c) 2024, CISPA Helmholtz Center for Information Security
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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* @file
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* OpenHwGroup CVA6 declarations
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*/
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#ifndef ZEPHYR_ARCH_RISCV_CUSTOM_OPENHWGROUP_CVA6_CSR_H_
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#define ZEPHYR_ARCH_RISCV_CUSTOM_OPENHWGROUP_CVA6_CSR_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* CVA6 provides two custom CSRs for cache management:
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* CSR 7C1 controls the data cache, CSR 7C0 controls the instruction cache.
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* The least significant bit of the CSRs can be written to enable or disable the cache.
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* Writing a value of 1 means enabling the cache, writing 0 disables it.
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* After reset, both caches are enabled by default.
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*
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*/
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#define CVA6_DCACHE 0x7C1
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#define CVA6_ICACHE 0x7C0
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#define CVA6_DCACHE_ENABLE 0x1
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#define CVA6_DCACHE_DISABLE 0x0
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#define CVA6_ICACHE_ENABLE 0x1
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#define CVA6_ICACHE_DISABLE 0x0
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_ARCH_RISCV_CUSTOM_OPENHWGROUP_CVA6_CSR_H_ */
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