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configs: phycore_am6xx_a53_defconfig: Enable CMD_DDR4

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Enable command for verifying DDRSS inline ECC features.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
This commit is contained in:
Wadim Egorov
2026-01-13 06:35:29 +01:00
committed by Tom Rini
parent 84fac64026
commit 3396e7d4aa
3 changed files with 3 additions and 0 deletions
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1
configs/phycore_am62ax_a53_defconfig
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@@ -78,6 +78,7 @@ CONFIG_CMD_WDT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_RTC=y
CONFIG_CMD_DDR4=y
CONFIG_CMD_SMC=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y

1
configs/phycore_am62x_a53_defconfig
View File

@@ -80,6 +80,7 @@ CONFIG_CMD_WDT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_RTC=y
CONFIG_CMD_DDR4=y
CONFIG_CMD_SMC=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y

1
configs/phycore_am64x_a53_defconfig
View File

@@ -80,6 +80,7 @@ CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_RTC=y
CONFIG_CMD_TIME=y
CONFIG_CMD_DDR4=y
CONFIG_CMD_SMC=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y