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clk: mediatek: add array size fields to cg gates

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Add num_gates field to struct mtk_cg_priv and populate it for all
existing drivers.

Currently, there is no bounds checking when accessing the gates array.
Adding this field will allow for bounds checking in the future.

Signed-off-by: David Lechner <dlechner@baylibre.com>
This commit is contained in:
David Lechner
2026-01-07 09:50:12 -06:00
committed by Tom Rini
parent 3d54f47ae5
commit 538f72f403
15 changed files with 74 additions and 41 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/clk/mediatek/clk-mt7622.c
View File

@@ -692,7 +692,8 @@ static int mt7622_pericfg_probe(struct udevice *dev)
static int mt7622_pciesys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7622_clk_tree, pcie_cgs);
return mtk_common_clk_gate_init(dev, &mt7622_clk_tree, pcie_cgs,
ARRAY_SIZE(pcie_cgs));
}
static int mt7622_pciesys_bind(struct udevice *dev)
@@ -710,7 +711,8 @@ static int mt7622_pciesys_bind(struct udevice *dev)
static int mt7622_ethsys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7622_clk_tree, eth_cgs);
return mtk_common_clk_gate_init(dev, &mt7622_clk_tree, eth_cgs,
ARRAY_SIZE(eth_cgs));
}
static int mt7622_ethsys_bind(struct udevice *dev)
@@ -728,12 +730,14 @@ static int mt7622_ethsys_bind(struct udevice *dev)
static int mt7622_sgmiisys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7622_clk_tree, sgmii_cgs);
return mtk_common_clk_gate_init(dev, &mt7622_clk_tree, sgmii_cgs,
ARRAY_SIZE(sgmii_cgs));
}
static int mt7622_ssusbsys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7622_clk_tree, ssusb_cgs);
return mtk_common_clk_gate_init(dev, &mt7622_clk_tree, ssusb_cgs,
ARRAY_SIZE(ssusb_cgs));
}
static const struct udevice_id mt7622_apmixed_compat[] = {

12
drivers/clk/mediatek/clk-mt7623.c
View File

@@ -1057,8 +1057,8 @@ static const struct mtk_clk_tree mt7623_clk_gate_tree = {
static int mt7623_infracfg_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree,
infra_cgs);
return mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree, infra_cgs,
ARRAY_SIZE(infra_cgs));
}
static const struct mtk_clk_tree mt7623_clk_peri_tree = {
@@ -1079,14 +1079,14 @@ static int mt7623_pericfg_probe(struct udevice *dev)
static int mt7623_hifsys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree,
hif_cgs);
return mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree, hif_cgs,
ARRAY_SIZE(hif_cgs));
}
static int mt7623_ethsys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree,
eth_cgs);
return mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree, eth_cgs,
ARRAY_SIZE(eth_cgs));
}
static int mt7623_ethsys_hifsys_bind(struct udevice *dev)

15
drivers/clk/mediatek/clk-mt7629.c
View File

@@ -634,17 +634,20 @@ static int mt7629_topckgen_probe(struct udevice *dev)
static int mt7629_infracfg_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7629_clk_tree, infra_cgs);
return mtk_common_clk_gate_init(dev, &mt7629_clk_tree, infra_cgs,
ARRAY_SIZE(infra_cgs));
}
static int mt7629_pericfg_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7629_peri_clk_tree, peri_cgs);
return mtk_common_clk_gate_init(dev, &mt7629_peri_clk_tree, peri_cgs,
ARRAY_SIZE(peri_cgs));
}
static int mt7629_ethsys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7629_clk_tree, eth_cgs);
return mtk_common_clk_gate_init(dev, &mt7629_clk_tree, eth_cgs,
ARRAY_SIZE(eth_cgs));
}
static int mt7629_ethsys_bind(struct udevice *dev)
@@ -662,12 +665,14 @@ static int mt7629_ethsys_bind(struct udevice *dev)
static int mt7629_sgmiisys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7629_clk_tree, sgmii_cgs);
return mtk_common_clk_gate_init(dev, &mt7629_clk_tree, sgmii_cgs,
ARRAY_SIZE(sgmii_cgs));
}
static int mt7629_ssusbsys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7629_clk_tree, ssusb_cgs);
return mtk_common_clk_gate_init(dev, &mt7629_clk_tree, ssusb_cgs,
ARRAY_SIZE(ssusb_cgs));
}
static const struct udevice_id mt7629_apmixed_compat[] = {

6
drivers/clk/mediatek/clk-mt7981.c
View File

@@ -631,7 +631,7 @@ static const struct mtk_gate sgmii0_cgs[] = {
static int mt7981_sgmii0sys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7981_topckgen_clk_tree,
sgmii0_cgs);
sgmii0_cgs, ARRAY_SIZE(sgmii0_cgs));
}
static const struct udevice_id mt7981_sgmii0sys_compat[] = {
@@ -658,7 +658,7 @@ static const struct mtk_gate sgmii1_cgs[] = {
static int mt7981_sgmii1sys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7981_topckgen_clk_tree,
sgmii1_cgs);
sgmii1_cgs, ARRAY_SIZE(sgmii1_cgs));
}
static const struct udevice_id mt7981_sgmii1sys_compat[] = {
@@ -699,7 +699,7 @@ static const struct mtk_gate eth_cgs[] = {
static int mt7981_ethsys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7981_topckgen_clk_tree,
eth_cgs);
eth_cgs, ARRAY_SIZE(eth_cgs));
}
static int mt7981_ethsys_bind(struct udevice *dev)

4
drivers/clk/mediatek/clk-mt7986.c
View File

@@ -636,8 +636,8 @@ static const struct mtk_gate eth_cgs[] = {
static int mt7986_ethsys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7986_topckgen_clk_tree,
eth_cgs);
return mtk_common_clk_gate_init(dev, &mt7986_topckgen_clk_tree, eth_cgs,
ARRAY_SIZE(eth_cgs));
}
static int mt7986_ethsys_bind(struct udevice *dev)

4
drivers/clk/mediatek/clk-mt7987.c
View File

@@ -818,8 +818,8 @@ static const struct mtk_gate eth_cgs[] = {
static int mt7987_ethsys_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7987_topckgen_clk_tree,
eth_cgs);
return mtk_common_clk_gate_init(dev, &mt7987_topckgen_clk_tree, eth_cgs,
ARRAY_SIZE(eth_cgs));
}
static int mt7987_ethsys_bind(struct udevice *dev)

12
drivers/clk/mediatek/clk-mt7988.c
View File

@@ -892,7 +892,8 @@ static const struct mtk_gate ethdma_mtk_gate[] = {
static int mt7988_ethdma_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7988_topckgen_clk_tree,
ethdma_mtk_gate);
ethdma_mtk_gate,
ARRAY_SIZE(ethdma_mtk_gate));
}
static int mt7988_ethdma_bind(struct udevice *dev)
@@ -950,7 +951,8 @@ static const struct mtk_gate sgmiisys_0_mtk_gate[] = {
static int mt7988_sgmiisys_0_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7988_topckgen_clk_tree,
sgmiisys_0_mtk_gate);
sgmiisys_0_mtk_gate,
ARRAY_SIZE(sgmiisys_0_mtk_gate));
}
static const struct udevice_id mt7988_sgmiisys_0_compat[] = {
@@ -994,7 +996,8 @@ static const struct mtk_gate sgmiisys_1_mtk_gate[] = {
static int mt7988_sgmiisys_1_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7988_topckgen_clk_tree,
sgmiisys_1_mtk_gate);
sgmiisys_1_mtk_gate,
ARRAY_SIZE(sgmiisys_1_mtk_gate));
}
static const struct udevice_id mt7988_sgmiisys_1_compat[] = {
@@ -1040,7 +1043,8 @@ static const struct mtk_gate ethwarp_mtk_gate[] = {
static int mt7988_ethwarp_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt7988_topckgen_clk_tree,
ethwarp_mtk_gate);
ethwarp_mtk_gate,
ARRAY_SIZE(ethwarp_mtk_gate));
}
static int mt7988_ethwarp_bind(struct udevice *dev)

3
drivers/clk/mediatek/clk-mt8183.c
View File

@@ -777,7 +777,8 @@ static int mt8183_topckgen_probe(struct udevice *dev)
static int mt8183_infracfg_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt8183_clk_tree, infra_clks);
return mtk_common_clk_gate_init(dev, &mt8183_clk_tree, infra_clks,
ARRAY_SIZE(infra_clks));
}
static const struct udevice_id mt8183_apmixed_compat[] = {

23
drivers/clk/mediatek/clk-mt8188.c
View File

@@ -1694,33 +1694,44 @@ static int mt8188_topckgen_probe(struct udevice *dev)
static int mt8188_topckgen_cg_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt8188_topckgen_cg_clk_tree, topckgen_cg_clks);
return mtk_common_clk_gate_init(dev, &mt8188_topckgen_cg_clk_tree,
topckgen_cg_clks,
ARRAY_SIZE(topckgen_cg_clks));
}
static int mt8188_infracfg_ao_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt8188_infracfg_ao_clk_tree, infracfg_ao_clks);
return mtk_common_clk_gate_init(dev, &mt8188_infracfg_ao_clk_tree,
infracfg_ao_clks,
ARRAY_SIZE(infracfg_ao_clks));
}
static int mt8188_pericfg_ao_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt8188_pericfg_ao_clk_tree, pericfg_ao_clks);
return mtk_common_clk_gate_init(dev, &mt8188_pericfg_ao_clk_tree,
pericfg_ao_clks,
ARRAY_SIZE(pericfg_ao_clks));
}
static int mt8188_imp_iic_wrap_c_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt8188_imp_iic_wrap_c_clk_tree, imp_iic_wrap_c_clks);
return mtk_common_clk_gate_init(dev, &mt8188_imp_iic_wrap_c_clk_tree,
imp_iic_wrap_c_clks,
ARRAY_SIZE(imp_iic_wrap_c_clks));
}
static int mt8188_imp_iic_wrap_w_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt8188_imp_iic_wrap_w_clk_tree, imp_iic_wrap_w_clks);
return mtk_common_clk_gate_init(dev, &mt8188_imp_iic_wrap_w_clk_tree,
imp_iic_wrap_w_clks,
ARRAY_SIZE(imp_iic_wrap_w_clks));
}
static int mt8188_imp_iic_wrap_en_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt8188_imp_iic_wrap_en_clk_tree,
imp_iic_wrap_en_clks);
imp_iic_wrap_en_clks,
ARRAY_SIZE(imp_iic_wrap_en_clks));
}
static const struct udevice_id mt8188_apmixed_compat[] = {

6
drivers/clk/mediatek/clk-mt8365.c
View File

@@ -705,12 +705,14 @@ static int mt8365_topckgen_probe(struct udevice *dev)
static int mt8365_topckgen_cg_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt8365_clk_tree, top_clk_gates);
return mtk_common_clk_gate_init(dev, &mt8365_clk_tree, top_clk_gates,
ARRAY_SIZE(top_clk_gates));
}
static int mt8365_infracfg_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt8365_clk_tree, ifr_clks);
return mtk_common_clk_gate_init(dev, &mt8365_clk_tree, ifr_clks,
ARRAY_SIZE(ifr_clks));
}
static const struct udevice_id mt8365_apmixed_compat[] = {

6
drivers/clk/mediatek/clk-mt8512.c
View File

@@ -808,12 +808,14 @@ static int mt8512_topckgen_probe(struct udevice *dev)
static int mt8512_topckgen_cg_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt8512_clk_tree, top_clks);
return mtk_common_clk_gate_init(dev, &mt8512_clk_tree, top_clks,
ARRAY_SIZE(top_clks));
}
static int mt8512_infracfg_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt8512_clk_tree, infra_clks);
return mtk_common_clk_gate_init(dev, &mt8512_clk_tree, infra_clks,
ARRAY_SIZE(infra_clks));
}
static const struct udevice_id mt8512_apmixed_compat[] = {

3
drivers/clk/mediatek/clk-mt8516.c
View File

@@ -757,7 +757,8 @@ static int mt8516_topckgen_probe(struct udevice *dev)
static int mt8516_topckgen_cg_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt8516_clk_tree, top_clks);
return mtk_common_clk_gate_init(dev, &mt8516_clk_tree, top_clks,
ARRAY_SIZE(top_clks));
}
static const struct udevice_id mt8516_apmixed_compat[] = {

3
drivers/clk/mediatek/clk-mt8518.c
View File

@@ -1513,7 +1513,8 @@ static int mt8518_topckgen_probe(struct udevice *dev)
static int mt8518_topckgen_cg_probe(struct udevice *dev)
{
return mtk_common_clk_gate_init(dev, &mt8518_clk_tree, top_clks);
return mtk_common_clk_gate_init(dev, &mt8518_clk_tree, top_clks,
ARRAY_SIZE(top_clks));
}
static const struct udevice_id mt8518_apmixed_compat[] = {

3
drivers/clk/mediatek/clk-mtk.c
View File

@@ -824,7 +824,7 @@ int mtk_common_clk_infrasys_init(struct udevice *dev,
int mtk_common_clk_gate_init(struct udevice *dev,
const struct mtk_clk_tree *tree,
const struct mtk_gate *gates)
const struct mtk_gate *gates, int num_gates)
{
struct mtk_cg_priv *priv = dev_get_priv(dev);
struct udevice *parent;
@@ -845,6 +845,7 @@ int mtk_common_clk_gate_init(struct udevice *dev,
priv->parent = parent;
priv->tree = tree;
priv->gates = gates;
priv->num_gates = num_gates;
return 0;
}

3
drivers/clk/mediatek/clk-mtk.h
View File

@@ -279,6 +279,7 @@ struct mtk_cg_priv {
void __iomem *base;
const struct mtk_clk_tree *tree;
const struct mtk_gate *gates;
int num_gates;
};
extern const struct clk_ops mtk_clk_apmixedsys_ops;
@@ -293,6 +294,6 @@ int mtk_common_clk_infrasys_init(struct udevice *dev,
const struct mtk_clk_tree *tree);
int mtk_common_clk_gate_init(struct udevice *dev,
const struct mtk_clk_tree *tree,
const struct mtk_gate *gates);
const struct mtk_gate *gates, int num_gates);
#endif /* __DRV_CLK_MTK_H */