28642 Commits

Author SHA1 Message Date
Tom Rini
b9d4a17b90 arm: Remove remainder of ARCH_ORION5X
With commit 5663b137e6 ("arm: Remove edminiv2 board") the last
ARCH_ORION5X platform was removed. Remove the rest of the architecture
code which is now unused.

Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-21 12:05:15 -06:00
Tom Rini
084faca1d7 Merge patch series "Update linker scripts to ensure appended device tree is correctly aligned"
Tom Rini <trini@konsulko.com> says:

This series builds on top of what Beleswar Padhi did in [1]. While
there's still discussion about the mkimage related parts, the linker
portion appears to the reliable path forward. An alternative that I had
mentioned before, and was part of previous discussions on this topic[2]
is in the end I believe not reliable enough. While we can take an output
file and pad it to where we think it needs to be, ultimately the linker
needs to place the symbol where we want it and if that isn't where we
pad to, we have a different problem. So what this series does (but each
commit message elaborates on the arch-specific linker scripts being
inconsistent) is make sure the linker script will place the required
symbol at 8-byte alignment, and then also use an ASSERT to fail the
build if this would not be true due to some unforseen event.

[1]: https://lore.kernel.org/u-boot/20260112101102.1417970-1-b-padhi@ti.com/
[2]: https://source.denx.de/u-boot/u-boot/-/issues/30

Link: https://lore.kernel.org/r/20260115222828.3931345-1-trini@konsulko.com
2026-01-20 12:07:25 -06:00
Tom Rini
410d31bae4 x86: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Rewrite the '.rel.dyn' (u-boot.lds) to follow modern practices, and
  include the 8-byte alignment at the end of the section.
- Expands the '.dynamic' section (u-boot-64.lds) to be more readable
  when adding a second statement to the section.
- Aligns the final section before _end (for U-Boot) or _image_binary_end
  or __bss_end (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to
  the final section before the symbol or changing an existing ALIGN(4)
  statement.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:24 -06:00
Tom Rini
94b8145189 sandbox: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _image_binary_end (for xPL phases) by
  8-bytes by adding '. = ALIGN(8);' to the final section before the
  symbol.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:23 -06:00
Tom Rini
f150843499 riscv: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end (for U-Boot) or _image_binary_end
  (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final
  section before the symbol.
- Remove a now-spurious  '. = ALIGN(x);' statement that was intended to
  provide the above alignments.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:21 -06:00
Tom Rini
87d3780ebc powerpc: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end by 8-bytes by adding '. =
  ALIGN(8);' or changing an existing ALIGN(4) statement.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:20 -06:00
Tom Rini
546d84ca0c nios2: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end 8-bytes by adding '. = ALIGN(8);'
  to the final section before the symbol.
- Remove a now-spurious  '. = ALIGN(x);' statement that was intended to
  provide the above alignments.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:17 -06:00
Tom Rini
b220a43f5a mips: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end (for U-Boot) or _image_binary_end
  (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final
  section before the symbol. For SPL we need this in two places to cover
  all build configurations.
- Remove now-spurious  '. = ALIGN(x);' statements that were intended to
  provide the above alignments.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:16 -06:00
Tom Rini
2e52030584 microblaze: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end (for U-Boot) or _image_binary_end
  (for xPL phases) by 8-bytes by adjusting the ALIGN(4) statement to be
  ALIGN(8) in the final section before the symbol.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Tested-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:15 -06:00
Tom Rini
dac67bf0be m68k: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Remove part of what Marek Vasut did in commit 9ed99e2eea ("m68k:
  Assure end of U-Boot is at 8-byte aligned offset") as we now better
  understand what can trigger failure and check for it.
- Rewrite the '.dynsym' section to follow modern practices, and include
  the 8-byte alignment at the end of the section.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:07:14 -06:00
Tom Rini
8b0ebe054b arm: Update linker scripts to ensure appended device tree is aligned
With commit 0535e46d55 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Expands some linker sections to be more readable when adding a second
  statement to the section.
- Aligns the final section before _end (for U-Boot) or
  _image_binary_end or __bss_end (for xPL phases) by 8-bytes by adding
  '. = ALIGN(8);' to the final section before the symbol.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).
- Remove now-spurious  '. = ALIGN(x);' statements that were intended to
  provide the above alignments.

Tested-by: Michal Simek <michal.simek@amd.com> # Zynq
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
[trini: Also update arch/arm/cpu/armv8/u-boot.lds as Ilas requested]
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-20 12:06:41 -06:00
Beleswar Padhi
85f586035d ARM: OMAP2+: Pad SPL binary to 8-byte alignment before DTB
The OMAP2 SPL linker script (also used for K3 platforms) currently uses
a 4-byte alignment directive after the __u_boot_list section. This
alignment directive only advances the location counter without padding
the actual binary output.

When objcopy extracts u-boot-spl-nodtb.bin, it includes only actual
data, stopping at the last byte of __u_boot_list (e.g., 0x41c359fc),
not an aligned address (e.g., 0x41c35a00). So, when the FIT image
containing device trees is concatenated to the SPL binary, it gets
appended at this unaligned file size, causing libfdt validation failure.

To fix this, move the alignment directive into the __u_boot_list section
itself and make it 8-byte aligned as per DT spec. This forces the linker
to include padding as part of the section data, ensuring objcopy
includes the padding bytes in the binary and the appended FIT image
starts at an 8-byte aligned boundary.

Reported-by: Anshul Dalal <anshuld@ti.com>
Closes: https://lore.kernel.org/u-boot/DFJ950O0QM0D.380U0N16ZO19E@ti.com
Fixes: 0535e46d55 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c")
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
2026-01-20 10:18:43 -06:00
Tom Rini
55ca2110d7 Merge tag 'xilinx-for-v2026.04-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx/FPGA changes for v2026.04-rc1 v2

microblaze:
- Fix spl_boot_list order

versal2:
- Fix EMMC distro boot setup
- Align distro boot variables with memory layout

zynqmp-phy:
- Sync with Linux kernel driver

zynqmp:
- Add verify_auth command
- DT sync
- Add placing variables to FAT/EXT4
- Enable PCIe driver by default

pcie - xilinx-nwl:
- Fix Link down crash

ufs:
- Align clock/reset with DT binding

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# gpg: Signature made Mon 19 Jan 2026 02:22:55 AM CST
# gpg:                using EDDSA key 97022C40ACF6D6A516A7596FAB07FEF04EF511F5
# gpg: Can't check signature: No public key
2026-01-19 13:08:48 -06:00
Mikhail Kshevetskiy
9441ad8715 Revert "arm: dts: an7581: set r_smpl for MMC in U-Boot"
On my AN7581 board, the same change in the Airoha ATF-2.10 source code
causes instability in eMMC reading. After the patch, in about 9 of 10
cases, ATF BL2 is unable to read FIP image from the eMMC flash. Thus
BL31 and U-Boot are unable to start.

Lets revert commit 7cb79f8d3d ("arm: dts: an7581: set r_smpl for MMC
in U-Boot") until the issue will be investigated.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2026-01-19 10:53:15 -06:00
Michal Simek
8a532b5a22 microblaze: Fix SPL device support
Extend spl_boot_list[] only when SPL has support for it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d1c1d677b2eb4266290d31dbdf2e6e44c77a75ff.1768557507.git.michal.simek@amd.com
2026-01-19 09:17:00 +01:00
Ye Li
e77d6948f5 misc: ele_api: Add Voltage change start and finish APIs
On GDET enabled part, need to call voltage change start and finish
APIs when adjust the voltage more than 100mv. Otherwise GDET will be
triggered and system is reset

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-01-17 15:00:23 -03:00
Tom Rini
ff498a3c5e Merge branch 'qcom-main' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
We have been getting a lot more patches from Qualcomm engineers, largely
focusing on IoT, router, and automotive platforms (those with QCS, IPQ,
and SA prefixes specifically).

Quite a variety of changes here:
- Watchdog overflow fix
- Hardcoded fastboot buffer addresses for a few board (hoppefully
  temporary until fastboot is updated to read $fastboot_addr_r)
- Enable memory protection (MMU_MGPROT) for ARCH_SNAPDRAGON
- pinctrl support for the QCS615 soc
- various USB/phy fixes including phy config for msm8996/qcs615
- mmc and i2c clock configuration fixes
- significant fixes for rpmh and regulator drivers
- added config fragment for pixel devices
- sa8775p clock fixes
- support for "flattened" dwc3 DT that recently landed upstream for
  sc7280 (qcs6490) and a few other platforms
2026-01-16 15:14:37 -06:00
David Lechner
8241bd6a82 configs: mt8365: remove empty header file
Remove the empty include/configs/mt8365.h header file as it is not
needed. The Kconfig entry that referenced it is also removed.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-16 13:04:16 -06:00
David Lechner
dc82599c45 arm: mediatek: remove extra gpio header
Remove empty gpio.h header file and CONFIG_GPIO_EXTRA_HEADER on
ARCH_MEDIATEK. There is no reason to have these since the header
doesn't contain anything.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-01-16 09:53:57 -06:00
Ray Liu
7cb79f8d3d arm: dts: an7581: set r_smpl for MMC in U-Boot
When booting from SPI, the ROM code does not initialize the MMC
controller on AN7581. As a result, the first MMC initialization
is performed by U-Boot.

In this case, the r_smpl bit is left uninitialized, which may
cause incorrect sampling timing during early MMC access.

Set the r_smpl bit explicitly in the U-Boot device tree to ensure
reliable MMC initialization.

This change is limited to the U-Boot-specific device tree.
The Linux MMC driver already performs runtime delay detection
and does not require a fixed r_smpl setting.

Signed-off-by: Ray Liu <ray.xy.liu@gmail.com>
2026-01-16 09:53:57 -06:00
Casey Connolly
9be4f2f5f4 mach-snapdragon: of_fixup: support new flat dwc3 node
Qualcomm DTs are being updated to use a new format where the dwc3 glue
node and controller are combined into a single DT node. Update the fixup
code to handle this case.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260114135739.1546815-1-casey.connolly@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-01-14 16:25:09 +01:00
Alexey Minnekhanov
bf4045ede8 mach-snapdragon: capsule_update: Fix eMMC detection for non-UFS devices
Currently (since 2026.01-rc) on all SDM630/660 based devices this is
printed, after observing long boot delay (several seconds) before
executing preboot commands:

 QCOM-FMP: Failed to find boot partition

find_target_partition() function incorrectly assumes that eMMC is always
at number 0. In general you can't rely on device numbering to determine if
particular block device is eMMC or SD-card, because it depends on how
aliases are defined in device tree "chosen" node. Some SoCs have MMC
numbers starting at 1, not 0; so mmc1 is eMMC, mmc2 is SD-card.

Make eMMC detection reliable by using IS_SD() macro from mmc.h header.
Using this method target boot partition can be found successfully.
With debug prints enabled, this is printed:

 QCOM-FMP: skipped SD-Card (devnum 2)
 QCOM-FMP: Capsule update target: boot (disk 1:60)
 QCOM-FMP: DFU string: 'mmc 0=u-boot.bin part 1 60'

Without debug prints nothing is printed, no error about failure to find
boot partition.

Fixes: fe80a5f800 ("mach-snapdragon: CapsuleUpdate: support all boot methods")
Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20251107232935.283843-1-alexeymin@minlexx.ru
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-01-14 16:25:09 +01:00
Neil Armstrong
5c71f81101 mach-snapdragon: enable MMU_PGPROT by default
Let's enable proper MMU page table protection to properly
protect write-protected and non-executable sections.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://patch.msgid.link/20251106-topic-snapdragron-en-pgprot-v1-1-d2b9e802230b@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-01-14 16:25:09 +01:00
J. Neuschäfer
0b97991fa0 powerpc: mpc83xx: Check the size of peripheral structs
Peripheral registers on MPC83xx-series chips are declared in
immap_83xx.h as a set of structs that ultimately fill the entire MMIO
space of 1 MiB. This patch introduces a compile-time check of the size
of each peripheral struct. The purpose of these checks is two-fold:

1. To quickly tell readers of the code the total size of each struct
2. To verify that the size does not change when a struct is edited

If the size of a peripheral struct were to change by a few bytes due
to an editing error, the result would be mayhem for all following
peripherals, because all offsets would shift by the amount of the error.

All new checks have been compile-tested.

Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
2026-01-13 09:42:44 -06:00
Neal Frager
4bdaad9dee board: zynqmp: add cmd for getting boot auth state
Add command for checking if boot was authenticated.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Signed-off-by: Neal Frager <neal.frager@amd.com>
Reviewed-by: Tomas Melin <tomas.melin@vaisala.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260112100253.2778715-1-neal.frager@amd.com
2026-01-12 12:53:49 +01:00
Neal Frager
690e2f9c63 arch: dts: zynqmp: align cpu_opp_table with linux
Align the cpp_opp_table and pss_ref_clk values with Linux according to the
following patch submission:
https://lists.openwall.net/linux-kernel/2025/11/11/424

Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260112072139.2709127-1-neal.frager@amd.com
2026-01-12 10:40:12 +01:00
Michal Simek
d4a973d8d1 arm64: xilinx: Fix DT coding style violations
All these violations have been found by https://github.com/kylebonnici/dts-linter
but not all of them are taken. Adding newlines or long lines changes are
not taken.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f1811d2e9303bb63ddfa809cbebf2a7fa52afa0d.1767787961.git.michal.simek@amd.com
2026-01-12 10:34:00 +01:00
Michal Simek
aa9d6f8b0a arm64: zynqmp: Remove ina260 IIO description
Kernel has hwmon driver that's why there is no reason to wire iio to hwmon
converter.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/138720bf2ff976974f5ce3566446ecfd93b9259d.1767787961.git.michal.simek@amd.com
2026-01-12 10:34:00 +01:00
Tom Rini
1bcb2fe324 Merge patch series "Enable / require DEVRES for devm_.alloc usage outside xPL"
Tom Rini <trini@konsulko.com> says:

As seen by a number of patches fixing memory leaks, U-Boot has a problem
with developer expectations around devm_kmalloc and friends. Namely,
whereas in Linux these memory allocations will be freed automatically in
most cases, in U-Boot this is only true if DEVRES is enabled. Now,
intentionally, in xPL phases, we do not (and do not offer as an option)
enabling DEVRES. However in full U-Boot this is left either to the user,
or some drivers have select'd DEVRES on their own. This inconsistency is
a problem. This series goes and deals with two small issues that were
shown by having all drivers that use devm_.alloc to allocate memory also
select DEVRES and then we make DEVRES no longer be a prompted option and
instead select'd as needed. We do not make this unconditional as it
would result in growing the resulting binary on the many platforms which
have no users of the devm_.alloc family of functions.

Link: https://lore.kernel.org/r/20251227223833.3019311-1-trini@konsulko.com
2026-01-09 10:19:57 -06:00
Tom Rini
217cf656e2 dm: core: Default to using DEVRES outside of xPL
The devm alloc functions that we have may follow the Linux kernel model
where allocations are (almost always) automatically free()'d. However,
quite often we don't enable, in full U-Boot, the tracking and free()'ing
functionality. This in turn leads to memory leaks because the driver
author expects that since the functions have the same name as in the
Linux Kernel they have the same behavior. In turn we then get
functionally correct commits such as commit 00e1fed93c ("firmware:
ti_sci: Fix memory leaks in devm_ti_sci_get_of_resource") that manually
add these calls. Rather than manually tracking allocations and
implementing free()s, rework things so that we follow expectations by
enabling the DEVRES functionality (outside of xPL phases).

This turns DEVRES from a prompted symbol to a symbol that must be
select'd, and we now remove our non-managed alloc/free functions from
outside of xPL builds.

Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-09 09:08:14 -06:00
Tom Rini
284e1a00f4 x86: Increase SYS_MALLOC_F_LEN to 0x1000
A few x86 platforms use a SYS_MALLOC_F_LEN value of 0x1000 or higher.
With the impending move to having DEVRES enabled by default, we will
need a little more room here. Raise the default value.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-09 09:08:14 -06:00
Tom Rini
f646b7749a Merge patch series "Add support for MT8188"
Julien Stephan <jstephan@baylibre.com> says:

The MediaTek MT8188 is a ARM64-based SoC with a dual-core Cortex-A78
cluster and a six-core Cortex-A55 cluster. It includes UART, SPI,
USB3.0 dual role, SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and
several LPDDR3 and LPDDR4 options.

This series adds basic support for MT8188.

Link: https://lore.kernel.org/r/20251209-add-mt8188-support-v2-0-31dbfcf7303c@baylibre.com
2026-01-06 12:50:35 -06:00
Julien Masson
633e5602aa arm: mediatek: add support for MediaTek MT8188 SoC
This adds basic support for MediaTek MT8188 SoC.

Add watchdog support by adding upstream compatible string.

Add tphy support by adding "mediatek,generic-tphy-v2" compatible string
in arch/arm/dts/mt8188-u-boot.dtsi

Signed-off-by: Julien Masson <jmasson@baylibre.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
2026-01-06 12:50:12 -06:00
Marek Vasut
9ed99e2eea m68k: Assure end of U-Boot is at 8-byte aligned offset
Make sure the end of U-Boot is at 8-byte aligned offset, not 4-byte
aligned offset. This allows safely appending DT at the end of U-Boot
with the guarantee that the DT will be at 8-byte aligned offset. This
8-byte alignment is now checked by newer libfdt 1.7.2 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-01-02 14:20:16 -06:00
Sughosh Ganu
bd3f9ee679 kbuild: Bump the build system to 6.1
Our last sync with the kernel was 5.1.

We are so out of sync now, that tracking the patches and backporting
them one by one makes little sense and it's going to take ages.

This is an attempt to sync up Makefiles to 6.1.
Unfortunately due to sheer amount of patches this is not easy to review,
but that's what we decided during a community call for the bump to 5.1,
so we are following the same guidelines here.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>a #rebased on -next
2026-01-02 10:28:14 -06:00
Tom Rini
601733e708 Merge patch series "modify npcm7xx/8xx feature and bug fixed"
Jim Liu <jim.t90615@gmail.com> says:

Modify npcm7xx/8xx features and bug fixes.

Link: https://lore.kernel.org/r/20251216024729.1031306-1-JJLIU0@nuvoton.com
2025-12-31 11:51:15 -06:00
Tom Rini
101d0cc681 Merge patch series "configs: Remove default malloc length for K3 R5 SPL"
This series from Andrew Davis <afd@ti.com> makes a number of the TI K3
CONFIG symbols have consistent values in SPL, as they are things
determined by the SoC and not the board design.

Link: https://lore.kernel.org/r/20251208190635.2044082-1-afd@ti.com
2025-12-31 11:51:14 -06:00
David Lechner
fd104bea0c arm: dts: mediatek: switch mt8365 to OF_UPSTREAM
Change mt8365_evk_defconfig to use CONFIG_OF_UPSTREAM=y and delete the
U-Boot copy of the devicetree source files for mt8365.

The upstream devicetree is identical to the U-Boot one being removed
(other than having more nodes for devices not used by U-Boot and
upstream fixed a compatible string in &scpsys, also not affecting
U-Boot).

There was one minor glitch with upstream missing a few topckgen macro
definitions, so those are added to the clock driver directly as a
workaround.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
2025-12-31 11:50:56 -06:00
Jim Liu
8043053099 arm: dts: Add SGPIO node in dts
Add SGPIO node in dts

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2025-12-31 10:17:01 -06:00
Stanley Chu
73a7155ba3 dts: fix typo in the pin name of GPIO191/GPIO192
Fix typos in the pin name of GPIO191 and GPIO192

Signed-off-by: Stanley Chu <yschu@nuvoton.com>
2025-12-31 10:17:00 -06:00
Ted Lee
05d6026295 pinctrl: npcm8xx: Remove incorrect spi0cs2_pins and spi0cs3_pins
Signed-off-by: Ted Lee <xrli@nuvoton.com>
2025-12-31 10:17:00 -06:00
Stanley Chu
78dbe92cb0 pinctrl: npcm8xx: Add smb11ddc pin config
smb11ddcm: connect SMB11 to external DDC pins
smb11ddcs: connect SMB11 to internal GFXDDC

Signed-off-by: Stanley Chu <yschu@nuvoton.com>
2025-12-31 10:17:00 -06:00
Andrew Davis
dc1c7526b1 spl: Kconfig: k3: Set common default for SPL_LOAD_FIT(_ADDRESS)
These are common for all K3 based boards. Add the common values as
defaults and remove from each board defconfig

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
2025-12-31 10:13:01 -06:00
Marek Vasut
253a96ffb6 Makefile: Make flash.bin target available on i.MX9
The current implementation of flash.bin generation with
CONFIG_SPL_LOAD_IMX_CONTAINER=y requires build of u-boot.cnt
which is i.MX8 specific. Reinstate the i.MX8 check to avoid
this dependency for i.MX9 .

Fill in flash.bin target for i.MX9 into imx specific Makefile.

Fixes: c3587197c0 ("Makefile: Make flash.bin target available for all platforms")
Signed-off-by: Marek Vasut <marex@nabladev.com>
2025-12-29 10:17:01 -03:00
Brian Ruley
f010993606 video: imx: ipuv3: refactor to use dm-managed state
Get rid of most globals that are spread around between TU's and place
them in their own structs managed by dm. Device state is now owned by
each driver instance. This design mirrors the Linux IPUv3 driver
architecture.

This work is done in preparation to migrate the driver to the clock
framework. While not the primary intent, this change also enables
multiple IPU instances to exist contemporarily.

Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
2025-12-29 10:17:01 -03:00
Joseph Guo
e4eccb860a imx: Support i.MX91 11x11 FRDM board
Add i.MX91 11x11 FRDM Board support.
 - Four ddr scripts included w/o inline ecc feature. Support
   both 1gb and 2gb DDR
 - SDHC/EQOS/I2C/UART supported
 - PCA9451 supported, default nominal drive mode
 - Documentation added.

Signed-off-by: Joseph Guo <qijian.guo@nxp.com>
2025-12-29 10:17:01 -03:00
Joseph Guo
e71d109e7b arm64: dts: add NXP FRDM-IMX91 device tree
Add the device tree files for the FRDM-IMX91 board.
Provide the initial DT support for FRDM-IMX91.

The board devicetree already attempted to upstream, but not been
accepted yet:
https://lore.kernel.org/all/20251114-imx91_frdm-v1-0-e5763bdf9336@nxp.com/

Once it complete, can move to OF_UPSTREAM

Signed-off-by: Joseph Guo <qijian.guo@nxp.com>
2025-12-29 10:17:00 -03:00
Alice Guo
ede2e565ee imx8ulp_evk: Switch to use devicetree imported from Linux kernel release
Enable OF_UPSTREAM for i.MX8ULP EVK so that devicetree imported from
Linux kernel release can be used.

If mailbox@29220000 is enabled, gd->arch.ele_dev will be set to this
device for communication with ELE firmware. This is incorrect because
mu@27020000 is the MU used for communication with the ELE firmware. To
prevent misconfiguration, disable mailbox@29220000.

The driver model for watchdog timer is not enabled yet, so disable wdog3
temporarily.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2025-12-29 10:17:00 -03:00
Tom Rini
29ab19c2be Subtree merge tag 'v6.18-dts' of dts repo [1] into dts/upstream
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
2025-12-19 15:39:27 -06:00
Tom Rini
2aeaa3c4f5 Merge tag 'xilinx-for-v2026.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
AMD/Xilinx/FPGA changes for v2026.04-rc1

xilinx:
- Sync ESRT with detected GUID
- DT cleanups
- Add logic for FRU information multiple times
- Enable more drivers pca9541, usb5744
- Enable more commands
- Cleanup firmware DT bindings

firmware:
- Add enhancement SMC format support

clk/versal:
- Various cleanups
- Add support for Versal Gen 2

i2c:
- cdns: Add timeout for RXDV status bit polling

spi:
- cadence: Remove cdns,is-dma DT property
- cadence: Remove duplicated return
- cadence_versal: Update flash reset delay

memtop:
- Update max memory reserved spaces to 64

Versal Gen 2:
- Aligned addresses with default memory map
- Add support for reading multiboot value

MB-V:
- Make SPL smaller
- Add support for SPI
- Move SPL to run out of BRAM

ZynqMP:
- Change default load address for BL32
2025-12-19 10:30:53 -06:00