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modules: Update to use SOC_SERIES_NRF Kconfigs without X suffix

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Updates usage of the old Kconfig to use the new Kconfig

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit is contained in:
Jamie McCrae
2026-01-15 09:03:15 +00:00
committed by Fabio Baltieri
parent 3a9189aa3e
commit 723476370d
9 changed files with 39 additions and 39 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
modules/hal_nordic/Kconfig
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@@ -38,7 +38,7 @@ if NRF_802154_RADIO_DRIVER
config NRF_802154_CONSTLAT_CONTROL
def_bool y
depends on SOC_SERIES_NRF54LX && NRF_802154_SL_OPENSOURCE
depends on SOC_SERIES_NRF54L && NRF_802154_SL_OPENSOURCE
select NRF_SYS_EVENT
help
Allows the nRF 802.15.4 radio driver to manage the constant latency state.

2
modules/hal_nordic/Kconfig.nrf_regtool
View File

@@ -2,7 +2,7 @@
# SPDX-License-Identifier: Apache-2.0
menu "nrf-regtool options"
depends on SOC_SERIES_NRF92X
depends on SOC_SERIES_NRF92
config NRF_REGTOOL_GENERATE_UICR
bool "Generate UICR"

2
modules/hal_nordic/ironside/se/dvfs.c
View File

@@ -9,7 +9,7 @@
static enum ironside_se_dvfs_oppoint current_dvfs_oppoint = IRONSIDE_SE_DVFS_OPP_HIGH;
#if defined(CONFIG_SOC_SERIES_NRF54HX)
#if defined(CONFIG_SOC_SERIES_NRF54H)
#define ABB_STATUSANA_LOCKED_L_Pos (0UL)
#define ABB_STATUSANA_LOCKED_L_Msk (0x1UL << ABB_STATUSANA_LOCKED_L_Pos)
#define ABB_STATUSANA_REG_OFFSET (0x102UL)

4
modules/hal_nordic/nrf_802154/CMakeLists.txt
View File

@@ -102,8 +102,8 @@ if(CONFIG_NRF_802154_ASSERT_ZEPHYR OR CONFIG_NRF_802154_ASSERT_ZEPHYR_MINIMAL)
target_sources(nrf-802154-platform PRIVATE nrf_802154_assert_handler.c)
endif()
set(NRF52_SERIES ${CONFIG_SOC_SERIES_NRF52X})
set(NRF53_SERIES ${CONFIG_SOC_SERIES_NRF53X})
set(NRF52_SERIES ${CONFIG_SOC_SERIES_NRF52})
set(NRF53_SERIES ${CONFIG_SOC_SERIES_NRF53})
set(SER_HOST ${CONFIG_NRF_802154_SER_HOST})
set(SL_OPENSOURCE ${CONFIG_NRF_802154_SL_OPENSOURCE})

20
modules/hal_nordic/nrfx/CMakeLists.txt
View File

@@ -36,7 +36,7 @@ zephyr_include_directories(.)
include(${BSP_DIR}/zephyr/nrfx.cmake OPTIONAL)
# Define MDK defines globally
zephyr_compile_definitions_ifdef(CONFIG_SOC_SERIES_NRF51X NRF51)
zephyr_compile_definitions_ifdef(CONFIG_SOC_SERIES_NRF51 NRF51)
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF51822_QFAA NRF51422_XXAA)
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF51822_QFAB NRF51422_XXAB)
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF51822_QFAC NRF51422_XXAC)
@@ -104,14 +104,14 @@ zephyr_library_compile_definitions_ifdef(CONFIG_NRF_TRACE_PORT
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF5340_CPUAPP
NRF_SKIP_FICR_NS_COPY_TO_RAM)
zephyr_compile_definitions_ifdef(CONFIG_SOC_SERIES_NRF91X
zephyr_compile_definitions_ifdef(CONFIG_SOC_SERIES_NRF91
NRF_SKIP_FICR_NS_COPY_TO_RAM)
# Connect Kconfig compilation option for Non-Secure software with option required by MDK/nrfx
zephyr_compile_definitions_ifdef(CONFIG_ARM_NONSECURE_FIRMWARE NRF_TRUSTZONE_NONSECURE)
zephyr_compile_definitions_ifdef(CONFIG_LOG_BACKEND_SWO ENABLE_SWO)
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF51X ${MDK_DIR}/system_nrf51.c)
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF51 ${MDK_DIR}/system_nrf51.c)
zephyr_library_sources_ifdef(CONFIG_SOC_NRF52805 ${MDK_DIR}/system_nrf52805.c)
zephyr_library_sources_ifdef(CONFIG_SOC_NRF52810 ${MDK_DIR}/system_nrf52810.c)
zephyr_library_sources_ifdef(CONFIG_SOC_NRF52811 ${MDK_DIR}/system_nrf52811.c)
@@ -121,13 +121,13 @@ zephyr_library_sources_ifdef(CONFIG_SOC_NRF52833 ${MDK_DIR}/system_nrf5283
zephyr_library_sources_ifdef(CONFIG_SOC_NRF52840 ${MDK_DIR}/system_nrf52840.c)
zephyr_library_sources_ifdef(CONFIG_SOC_NRF5340_CPUAPP ${MDK_DIR}/system_nrf5340_application.c)
zephyr_library_sources_ifdef(CONFIG_SOC_NRF5340_CPUNET ${MDK_DIR}/system_nrf5340_network.c)
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF54HX ${MDK_DIR}/system_nrf54h.c)
if(CONFIG_SOC_SERIES_NRF54LX OR CONFIG_SOC_SERIES_BSIM_NRF54LX)
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF54H ${MDK_DIR}/system_nrf54h.c)
if(CONFIG_SOC_SERIES_NRF54L OR CONFIG_SOC_SERIES_BSIM_NRF54LX)
zephyr_library_sources(${MDK_DIR}/system_nrf54l.c)
endif()
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF71 ${MDK_DIR}/system_nrf7120_enga.c)
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF91X ${MDK_DIR}/system_nrf91.c)
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF92X ${MDK_DIR}/system_nrf92.c)
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF91 ${MDK_DIR}/system_nrf91.c)
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF92 ${MDK_DIR}/system_nrf92.c)
zephyr_library_sources(nrfx_glue.c)
zephyr_library_sources(${HELPERS_DIR}/nrfx_flag32_allocator.c)
@@ -135,7 +135,7 @@ zephyr_library_sources_ifdef(CONFIG_HAS_NORDIC_RAM_CTRL ${HELPERS_DIR}/nrf
if(CONFIG_NRFX_GPPI AND NOT CONFIG_NRFX_GPPI_V1)
zephyr_library_sources_ifdef(CONFIG_HAS_HW_NRF_PPI ${HELPERS_DIR}/nrfx_gppi_ppi.c)
if(CONFIG_SOC_SERIES_NRF54LX OR CONFIG_SOC_SERIES_NRF71 OR CONFIG_HAS_HW_NRF_DPPIC)
if(CONFIG_SOC_SERIES_NRF54L OR CONFIG_SOC_SERIES_NRF71 OR CONFIG_HAS_HW_NRF_DPPIC)
zephyr_library_sources(${HELPERS_DIR}/nrfx_gppi_dppi.c)
endif()
if(CONFIG_SOC_COMPATIBLE_NRF54LX OR CONFIG_SOC_SERIES_NRF71)
@@ -244,7 +244,7 @@ zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54LX_DISABLE_FICR_TRIMCNF NRF_DIS
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54LX_SKIP_GLITCHDETECTOR_DISABLE NRF_SKIP_GLITCHDETECTOR_DISABLE)
zephyr_compile_definitions_ifndef(CONFIG_SOC_NRF54L_ANOMALY_56_WORKAROUND NRF54L_CONFIGURATION_56_ENABLE=0)
if(CONFIG_SOC_SERIES_NRF54HX AND CONFIG_NRFX_GPPI_V1)
if(CONFIG_SOC_SERIES_NRF54H AND CONFIG_NRFX_GPPI_V1)
zephyr_library_sources(${HELPERS_DIR}/internal/nrfx_gppiv1_ipct.c)
zephyr_library_sources(${HELPERS_DIR}/internal/nrfx_gppiv1_shim.c)
endif()
@@ -256,7 +256,7 @@ macro(mdk_svd_ifdef feature_toggle filename)
endif()
endmacro()
mdk_svd_ifdef(CONFIG_SOC_SERIES_NRF51X nrf51.svd)
mdk_svd_ifdef(CONFIG_SOC_SERIES_NRF51 nrf51.svd)
mdk_svd_ifdef(CONFIG_SOC_NRF52805 nrf52805.svd)
mdk_svd_ifdef(CONFIG_SOC_NRF52810 nrf52810.svd)
mdk_svd_ifdef(CONFIG_SOC_NRF52811 nrf52811.svd)

24
modules/hal_nordic/nrfx/Kconfig
View File

@@ -11,7 +11,7 @@ rsource "Kconfig.logging"
config NRFX_ADC
bool "ADC driver"
depends on $(dt_nodelabel_exists,adc) && SOC_SERIES_NRF51X
depends on $(dt_nodelabel_exists,adc) && SOC_SERIES_NRF51
config NRFX_CLOCK
bool "CLOCK driver"
@@ -35,15 +35,15 @@ config NRFX_CLOCK_LF_SRC_XTAL
bool "Crystal Oscillator"
config NRFX_CLOCK_LF_SRC_SYNTH
depends on !SOC_SERIES_NRF91X
depends on !SOC_SERIES_NRF91
bool "Synthesized from HFCLK"
config NRFX_CLOCK_LF_SRC_LOW_SWING
depends on SOC_SERIES_NRF52X
depends on SOC_SERIES_NRF52
bool "External low swing"
config NRFX_CLOCK_LF_SRC_FULL_SWING
depends on SOC_SERIES_NRF52X
depends on SOC_SERIES_NRF52
bool "External full swing"
endif # NRFX_CLOCK
@@ -167,7 +167,7 @@ config NRFX_GPPI
config NRFX_GPPI_V1
bool "GPPI layer legacy"
depends on NRFX_GPPI
default y if SOC_SERIES_NRF54HX
default y if SOC_SERIES_NRF54H
help
When enabled then legacy version of Generic PPI layer is used.
@@ -257,24 +257,24 @@ config NRFX_RTC131
config NRFX_SAADC
bool "SAADC driver"
depends on $(dt_nodelabel_exists,adc) && !SOC_SERIES_NRF51X
depends on $(dt_nodelabel_exists,adc) && !SOC_SERIES_NRF51
config NRFX_SPI
bool
config NRFX_SPI0
bool "SPI0 driver instance"
depends on $(dt_nodelabel_exists,spi0) && (SOC_SERIES_NRF51X || SOC_SERIES_NRF52X)
depends on $(dt_nodelabel_exists,spi0) && (SOC_SERIES_NRF51 || SOC_SERIES_NRF52)
select NRFX_SPI
config NRFX_SPI1
bool "SPI1 driver instance"
depends on $(dt_nodelabel_exists,spi1) && (SOC_SERIES_NRF51X || SOC_SERIES_NRF52X)
depends on $(dt_nodelabel_exists,spi1) && (SOC_SERIES_NRF51 || SOC_SERIES_NRF52)
select NRFX_SPI
config NRFX_SPI2
bool "SPI2 driver instance"
depends on $(dt_nodelabel_exists,spi2) && SOC_SERIES_NRF52X
depends on $(dt_nodelabel_exists,spi2) && SOC_SERIES_NRF52
select NRFX_SPI
config NRFX_SPIM
@@ -305,12 +305,12 @@ config NRFX_TWI
config NRFX_TWI0
bool "TWI0 driver instance"
depends on $(dt_nodelabel_exists,i2c0) && (SOC_SERIES_NRF51X || SOC_SERIES_NRF52X)
depends on $(dt_nodelabel_exists,i2c0) && (SOC_SERIES_NRF51 || SOC_SERIES_NRF52)
select NRFX_TWI
config NRFX_TWI1
bool "TWI1 driver instance"
depends on $(dt_nodelabel_exists,i2c1) && (SOC_SERIES_NRF51X || SOC_SERIES_NRF52X)
depends on $(dt_nodelabel_exists,i2c1) && (SOC_SERIES_NRF51 || SOC_SERIES_NRF52)
select NRFX_TWI
config NRFX_TWIM
@@ -324,7 +324,7 @@ config NRFX_UART
config NRFX_UART0
bool "UART0 driver instance"
depends on $(dt_nodelabel_exists,uart0) && (SOC_SERIES_NRF51X || SOC_SERIES_NRF52X)
depends on $(dt_nodelabel_exists,uart0) && (SOC_SERIES_NRF51 || SOC_SERIES_NRF52)
select NRFX_UART
config NRFX_UARTE

4
modules/hal_nordic/nrfx/nrfx_kconfig.h
View File

@@ -42,7 +42,7 @@
#endif
#ifdef CONFIG_NRFX_CLOCK_LF_SRC_RC
#if defined(CONFIG_SOC_SERIES_NRF91X) || defined(CONFIG_SOC_COMPATIBLE_NRF53X)
#if defined(CONFIG_SOC_SERIES_NRF91) || defined(CONFIG_SOC_COMPATIBLE_NRF53X)
#define NRFX_CLOCK_CONFIG_LF_SRC 1
#else
#define NRFX_CLOCK_CONFIG_LF_SRC 0
@@ -50,7 +50,7 @@
#endif
#ifdef CONFIG_NRFX_CLOCK_LF_SRC_XTAL
#if defined(CONFIG_SOC_SERIES_NRF91X) || defined(CONFIG_SOC_COMPATIBLE_NRF53X)
#if defined(CONFIG_SOC_SERIES_NRF91) || defined(CONFIG_SOC_COMPATIBLE_NRF53X)
#define NRFX_CLOCK_CONFIG_LF_SRC 2
#else
#define NRFX_CLOCK_CONFIG_LF_SRC 1

4
modules/hal_nordic/nrfx/nrfx_reserved_resources.h
View File

@@ -53,7 +53,7 @@
*/
#if defined(CONFIG_BT_LL_SW_SPLIT)
#include <bt_ctlr_used_resources.h>
#if defined(CONFIG_SOC_SERIES_NRF51X) || defined(CONFIG_SOC_COMPATIBLE_NRF52X)
#if defined(CONFIG_SOC_SERIES_NRF51) || defined(CONFIG_SOC_COMPATIBLE_NRF52X)
#define NRFX_PPI_CHANNELS_USED_BY_BT_CTLR BT_CTLR_USED_PPI_CHANNELS
#define NRFX_PPI_GROUPS_USED_BY_BT_CTLR BT_CTLR_USED_PPI_GROUPS
#elif defined(CONFIG_SOC_COMPATIBLE_NRF53X)
@@ -78,7 +78,7 @@
#include <../src/nrf_802154_peripherals_nrf54l.h>
#define NRFX_DPPI10_CHANNELS_USED_BY_802154_DRV NRF_802154_DPPI_CHANNELS_USED_MASK
#define NRFX_DPPI10_GROUPS_USED_BY_802154_DRV NRF_802154_DPPI_GROUPS_USED_MASK
#elif defined(CONFIG_SOC_SERIES_NRF54HX)
#elif defined(CONFIG_SOC_SERIES_NRF54H)
#include <../src/nrf_802154_peripherals_nrf54h.h>
#define NRFX_DPPI020_CHANNELS_USED_BY_802154_DRV NRF_802154_DPPI_CHANNELS_USED_MASK
#define NRFX_DPPI020_GROUPS_USED_BY_802154_DRV NRF_802154_DPPI_GROUPS_USED_MASK

16
modules/nrf_wifi/bus/qspi_if.c
View File

@@ -76,7 +76,7 @@ BUILD_ASSERT(QSPI_IF_DEVICE_FREQUENCY >= (NRF_QSPI_BASE_CLOCK_FREQ / 16),
* need to be used to achieve the SCK frequency as close as possible (but not
* higher) to the one specified in DT.
*/
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_SERIES_NRF53)
/*
* On nRF53 Series SoCs, the default /4 divider for the HFCLK192M clock can
* only be used when the QSPI peripheral is idle. When a QSPI operation is
@@ -145,7 +145,7 @@ BUILD_ASSERT(QSPI_IF_DEVICE_FREQUENCY >= (NRF_QSPI_BASE_CLOCK_FREQ / 16),
/* For 8 MHz, use PCLK32M / 4 */
#define INST_0_SCK_CFG_WAKE NRF_QSPI_FREQ_DIV4
#endif /* defined(CONFIG_SOC_SERIES_NRF53X) */
#endif /* defined(CONFIG_SOC_SERIES_NRF53) */
static int qspi_device_init(const struct device *dev);
static void qspi_device_uninit(const struct device *dev);
@@ -358,7 +358,7 @@ static inline void qspi_lock(const struct device *dev)
* to perform a QSPI operation, otherwise the power consumption would be
* increased also when the QSPI peripheral is idle.
*/
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_SERIES_NRF53)
nrf_clock_hfclk192m_div_set(NRF_CLOCK, BASE_CLOCK_DIV);
k_busy_wait(BASE_CLOCK_SWITCH_DELAY_US);
#endif
@@ -366,7 +366,7 @@ static inline void qspi_lock(const struct device *dev)
static inline void qspi_unlock(const struct device *dev)
{
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_SERIES_NRF53)
/* Restore the default base clock divider to reduce power consumption.
*/
nrf_clock_hfclk192m_div_set(NRF_CLOCK, NRF_CLOCK_HFCLK_DIV_4);
@@ -701,7 +701,7 @@ static int qspi_nrfx_configure(const struct device *dev)
qspi_fill_init_struct(&QSPIconfig);
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_SERIES_NRF53)
/* When the QSPI peripheral is activated, during the nrfx_qspi driver
* initialization, it reads the status of the connected flash chip.
* Make sure this transaction is performed with a valid base clock
@@ -713,7 +713,7 @@ static int qspi_nrfx_configure(const struct device *dev)
int ret = _nrfx_qspi_init(&QSPIconfig, qspi_handler, dev_data);
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_SERIES_NRF53)
/* Restore the default /4 divider after the QSPI initialization. */
nrf_clock_hfclk192m_div_set(NRF_CLOCK, NRF_CLOCK_HFCLK_DIV_4);
k_busy_wait(BASE_CLOCK_SWITCH_DELAY_US);
@@ -984,7 +984,7 @@ static int qspi_nor_init(const struct device *dev)
return qspi_nor_configure(dev);
}
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_SERIES_NRF53)
static int qspi_cmd_encryption(const struct device *dev, nrf_qspi_encryption_t *p_cfg)
{
const struct qspi_buf tx_buf = { .buf = (uint8_t *)&p_cfg->nonce[1],
@@ -1404,7 +1404,7 @@ int qspi_cmd_sleep_rpu(const struct device *dev)
int qspi_enable_encryption(uint8_t *key)
{
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_SERIES_NRF53)
int err = 0;
if (qspi_cfg->encryption) {