release: Zephyr 1.8.0

Signed-off-by: Anas Nashif <anas.nashif@intel.com>

.gitignore

@@ -13,6 +13,7 @@ outdir
 outdir-*
 scripts/basic/fixdep
 scripts/gen_idt/gen_idt
+scripts/gen_offset_header/gen_offset_header
 scripts/kconfig/conf
 scripts/kconfig/mconf
 scripts/kconfig/zconf.hash.c
@@ -34,4 +35,3 @@ tags
 .project
 .cproject
 .xxproject
-.envrc

.gitlint

@@ -1,8 +1,8 @@
 # All these sections are optional, edit this file as you like.
 [general]
-ignore=title-trailing-punctuation, T3, title-max-length, T1
+ignore=title-trailing-punctuation, T3
 # verbosity should be a value between 1 and 3, the commandline -v flags take precedence over this
-verbosity = 3
+verbosity = 2
 # By default gitlint will ignore merge commits. Set to 'false' to disable.
 ignore-merge-commits=true
 # Enable debug mode (prints more output). Disabled by default
@@ -12,12 +12,13 @@ debug = false
 # See http://jorisroovers.github.io/gitlint/user_defined_rules for details
 extra-path=scripts/gitlint
 
-[title-max-length-no-revert]
-line-length=72
 
 [body-max-line-count]
 max-line-count=200
 
+[title-max-length]
+line-length=72
+
 [title-starts-with-subsystem]
 regex = ^(([^:]+):)(\s([^:]+):)*\s(.+)$
 

.gitreview

@@ -0,0 +1,5 @@
+[gerrit]
+host=gerrit.zephyrproject.org
+port=29418
+project=zephyr.git
+defaultremote=origin

.known-issues/doc/networking.conf

@@ -47,67 +47,3 @@
 ^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
 ^.*net_mgmt_event_callback.__unnamed__
 ^[- \t]*\^
-#
-# include/net/buf.h
-#
-^(?P<filename>[-._/\w]+/doc/api/networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
-^.*net_buf.__unnamed__
-^[- \t]*\^
-#
-# include/net/ieee802154.h
-#
-^(?P<filename>[-._/\w]+/doc/api/networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
-^[ \t]*
-^[ \t]*\^
-^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
-^.*ieee802154_req_params.__unnamed__
-^[- \t]*\^
-#
-# Various warning about net_mgmt declarations
-#
-^(?P<filename>[-._/\w]+/doc/api/networking.rst):(?P<lineno>[0-9]+): WARNING: Error when parsing function declaration\.
-^If the function has no return type\:
-^[ \t]*Error in declarator or parameters and qualifiers
-^[ \t]*Invalid definition: Expected identifier in nested name\. \[error at [0-9]+\]
-^[ \t]*NET_MGMT_DEFINE_.*?$
-^[- \t]*\^
-#
-^If the function has a return type\:
-^[ \t]*Error in declarator
-^[ \t]*If pointer to member declarator:
-^[ \t]*Invalid definition: Expected identifier in nested name\. \[error at [0-9]+\]
-^[ \t]*NET_MGMT_DEFINE_.*?$
-^[- \t]*\^
-#
-^[ \t]*If declId, parameters, and qualifiers\:
-^[ \t]*Invalid definition: Expected identifier in nested name\. \[error at [0-9]+\]
-^[ \t]*NET_MGMT_DEFINE_.*?$
-^[- \t]*\^
-#
-^[ \t]*If parenthesis in noptr-declarator\:
-^[ \t]*Error in declarator
-^[ \t]*If pointer to member declarator:
-^[ \t]*Invalid definition: Expected identifier in nested name\. \[error at [0-9]+\]
-^[ \t]*NET_MGMT_DEFINE_.*?$
-^[- \t]*\^
-#
-^[ \t]*If parenthesis in noptr-declarator\:
-^[ \t]*Error in declarator or parameters and qualifiers
-^[ \t]*If pointer to member declarator:
-^[ \t]*Invalid definition: Expected \'\:\:\' in pointer to member \(function\)\. \[error at [0-9]+\]
-^[ \t]*NET_MGMT_DEFINE_.*?$
-^[- \t]*\^
-#
-^[ \t]*If declarator-id:
-^[ \t]*Invalid definition: Expecting \"\(\" in parameters_and_qualifiers\. \[error at [0-9]+\]
-^[ \t]*NET_MGMT_DEFINE_.*?$
-^[- \t]*\^

.shippable.yml

@@ -11,11 +11,9 @@ env:
         - ZEPHYR_GCC_VARIANT=zephyr
         - USE_CCACHE=1
         - MATRIX_BUILDS="2"
-        - MATRIX_BUILDS_EXTRA="3"
     matrix:
         - MATRIX_BUILD="1"
         - MATRIX_BUILD="2"
-        - MATRIX_BUILD="3"
 
 build:
     cache: true
@@ -23,84 +21,76 @@ build:
         - ${SHIPPABLE_BUILD_DIR}/ccache
     pre_ci_boot:
         image_name: zephyrprojectrtos/ci
-        image_tag: master.27
+        image_tag: master.16
         pull: true
         options: "-e HOME=/home/buildslave --privileged=true --tty --net=bridge --user buildslave"
 
     ci:
       - export CCACHE_DIR=${SHIPPABLE_BUILD_DIR}/ccache/.ccache
-      - git rebase origin/${PULL_REQUEST_BASE_BRANCH}
       - source zephyr-env.sh
       - ccache -c -s --max-size=2000M
       - make host-tools
       - export PREBUILT_HOST_TOOLS=${ZEPHYR_BASE}/bin
       - >
-          if [ "$MATRIX_BUILD" = "3" -a "$IS_PULL_REQUEST" = "true" ]; then
-            export COMMIT_RANGE=origin/${PULL_REQUEST_BASE_BRANCH}..HEAD
+          if [ "$IS_PULL_REQUEST" = "true" ]; then
+            S3_PATH="s3://zephyr-logs/pull-requests/${REPO_FULL_NAME}/${PULL_REQUEST}"
+          else
+            if [ "$JOB_TRIGGERED_BY_NAME" = "undefined" ]; then
+              LOG_TYPE="manual";
+            else
+              LOG_TYPE=${JOB_TRIGGERED_BY_NAME};
+            fi;
+
+            S3_PATH="s3://zephyr-logs/${LOG_TYPE}/${REPO_FULL_NAME}/${BUILD_NUMBER}";
+          fi;
+      - >
+          if [ "$MATRIX_BUILD" = "1" -a "$IS_PULL_REQUEST" = "true" ]; then
+            export COMMIT_RANGE=origin/${PULL_REQUEST_BASE_BRANCH}..${COMMIT}
             echo "Building a Pull Request";
             echo "- Building Documentation";
             echo "Commit range:" ${COMMIT_RANGE}
+            sudo pip install sphinx==1.5.5
             make htmldocs > doc.log 2>&1;
             ./scripts/filter-known-issues.py --config-dir .known-issues/doc/ doc.log > doc.warnings;
-
-            if [ "$?" != 0 ]; then
-              echo " ==> Error running filter script"
-              exit 1
-            fi;
             if [ -s doc.warnings ]; then
               echo " => New documentation warnings/errors";
             fi;
             echo "- Verify commit message and coding style";
-            ./scripts/ci/check-compliance.py --commits ${COMMIT_RANGE} || true;
+            ./scripts/ci/check-compliance.py || true;
           fi;
       - >
-          sudo pip3 install sh;
-          ./scripts/ci/get_modified_tests.py --commits origin/${PULL_REQUEST_BASE_BRANCH}..HEAD > modified_tests.args;
-          ./scripts/ci/get_modified_boards.py --commits origin/${PULL_REQUEST_BASE_BRANCH}..HEAD > modified_boards.args;
-
-          if [ -s modified_boards.args ]; then
-            ./scripts/sanitycheck --subset ${MATRIX_BUILD}/${MATRIX_BUILDS_EXTRA} +modified_boards.args || ./scripts/sanitycheck +modified_boards.args --only-failed;
-            cp ./scripts/sanity_chk/last_sanity.xml modified_boards.xml;
+          if [ "$JOB_TRIGGERED_BY_NAME" = "daily-verify" ]; then
+            echo "- Building with --all --enable-slow";
+            COVERAGE="--all --enable-slow";
           fi;
-          if [ -s modified_tests.args ]; then
-            ./scripts/sanitycheck --subset ${MATRIX_BUILD}/${MATRIX_BUILDS_EXTRA} +modified_tests.args || ./scripts/sanitycheck +modified_tests.args --only-failed
-            cp ./scripts/sanity_chk/last_sanity.xml modified_tests.xml;
-          fi;
-          rm -f modified_tests.args modified_boards.args;
       - >
-          if [ "$MATRIX_BUILD" != "3" ]; then
-             ./scripts/sanitycheck ${PLATFORMS} --subset ${MATRIX_BUILD}/${MATRIX_BUILDS} ${COVERAGE} ${SANITYCHECK_OPTIONS} || ./scripts/sanitycheck ${PLATFORMS} ${COVERAGE} ${SANITYCHECK_OPTIONS_RETRY} || ./scripts/sanitycheck ${PLATFORMS} ${COVERAGE} ${SANITYCHECK_OPTIONS_RETRY}
-          fi;
+          ./scripts/sanitycheck ${PLATFORMS} --subset ${MATRIX_BUILD}/${MATRIX_BUILDS} ${COVERAGE} ${SANITYCHECK_OPTIONS} || ./scripts/sanitycheck ${PLATFORMS} --subset ${MATRIX_BUILD}/${MATRIX_BUILDS}  ${COVERAGE} ${SANITYCHECK_OPTIONS_RETRY};
       - ccache -s
-    on_failure:
-      - rm -rf sanity-out out-2nd-pass
-      - mkdir -p shippable/testresults
-      - >
-          if [ -e compliance.xml ]; then
-            cp compliance.xml shippable/testresults/;
-          fi;
-      - >
-          if [ -e ./scripts/sanity_chk/last_sanity.xml ]; then
-            cp ./scripts/sanity_chk/last_sanity.xml shippable/testresults/;
-          fi;
-      - >
-          if [ -e ./modified_tests.xml ]; then
-            cp ./modified_tests.xml shippable/testresults/;
-          fi;
     on_success:
       - rm -rf sanity-out out-2nd-pass
       - mkdir -p shippable/testresults
       - >
           if [ -e compliance.xml ]; then
             cp compliance.xml shippable/testresults/;
+            aws s3 cp compliance.xml ${S3_PATH}/;
           fi;
       - >
           if [ -e ./scripts/sanity_chk/last_sanity.xml ]; then
             cp ./scripts/sanity_chk/last_sanity.xml shippable/testresults/;
+            aws s3 cp ./scripts/sanity_chk/last_sanity.xml ${S3_PATH}/sanitycheck.xml;
+          fi;
+    on_failure:
+      - rm -rf sanity-out out-2nd-pass
+      - mkdir -p shippable/testresults
+      - >
+          if [ -e compliance.xml ]; then
+            cp compliance.xml shippable/testresults/;
+            aws s3 cp compliance.xml ${S3_PATH}/;
           fi;
       - >
-          if [ -e ./modified_tests.xml ]; then
-            cp ./modified_tests.xml shippable/testresults/;
+          if [ -e ./scripts/sanity_chk/last_sanity.xml ]; then
+            cp ./scripts/sanity_chk/last_sanity.xml shippable/testresults/;
+            aws s3 cp ./scripts/sanity_chk/last_sanity.xml ${S3_PATH}/sanitycheck.xml;
           fi;
 
 integrations:

CODEOWNERS

@@ -1,177 +0,0 @@
-# CODEOWNERS for autoreview assigning in github
-
-# Do not use wildcard on all source yet
-# *                                        @galak @nashif
-
-# Get all docs reviewed
-*.rst                                    @dbkinder
-.known-issues/*                          @inakypg @nashif
-MAINTAINERS                              @inakypg @nashif
-arch/arc/*                               @cjordan44 @ruuddw
-arch/arc/core/*                          @andrewboie
-arch/arm/*                               @MaureenHelm @galak
-arch/arm/core/*                          @andrewboie
-arch/arm/soc/arm/mps2/*                  @fvincenzo
-arch/arm/soc/st_stm32/*                  @erwango
-arch/arm/soc/st_stm32/stm32f4/*          @rsalveti @idlethread
-arch/arm/soc/ti_simplelink/cc32xx        @GAnthony
-arch/nios2/*                             @andrewboie
-arch/nios2/core/*                        @andrewboie
-arch/riscv32                             @fractalclone
-arch/x86/*                               @andrewboie @youvedeep
-arch/x86/core/*                          @andrewboie
-arch/x86/core/crt0.S                     @youvedeep @nashif
-arch/x86/soc/intel_quark/quark_d2000/*   @nashif
-arch/x86/soc/intel_quark/quark_se/*      @nashif
-arch/x86/soc/intel_quark/quark_x1000/*   @nashif
-arch/xtensa/*                            @andrewboie
-boards/arc/*                             @cjordan44 @ruuddw
-boards/arc/arduino_101_sss/*             @nashif
-boards/arc/em_starterkit/*               @cjordan44
-boards/arc/quark_se_c1000_ss_devboard/*  @nashif
-boards/arm/*                             @MaureenHelm @galak
-boards/arm/96b_carbon/*                  @rsalveti @idlethread
-boards/arm/96b_nitrogen/*                @idlethread
-boards/arm/arduino_101_ble/*             @jhedberg
-boards/arm/cc3220sf_launchxl/*           @GAnthony
-boards/arm/disco_l475_iot1/*             @erwango
-boards/arm/frdm_k64f/*                   @MaureenHelm
-boards/arm/frdm_kw41z/*                  @MaureenHelm
-boards/arm/hexiwear_k64/*                @MaureenHelm
-boards/arm/mps2_an385/*                  @fvincenzo
-boards/arm/nrf51_blenano/*               @rsalveti
-boards/arm/nrf52_pca10040/*              @carlescufi
-boards/arm/nucleo_f401re/*               @rsalveti @idlethread
-boards/arm/v2m_beetle/*                  @fvincenzo
-boards/arm/olimexino_stm32/*             @ydamigos
-boards/arm/stm32f3_disco/*               @ydamigos
-boards/nios2/*                           @andrewboie
-boards/nios2/altera_max10/*              @andrewboie
-boards/riscv32                           @fractalclone
-boards/x86/*                             @andrewboie @youvedeep
-boards/x86/arduino_101/*                 @nashif
-boards/x86/galileo/*                     @nashif
-boards/x86/quark_d2000_crb/*             @nashif
-boards/x86/quark_se_c1000_devboard/*     @nashif
-boards/xtensa/*                          @andrewboie
-doc/*                                    @dbkinder
-doc/subsystems/bluetooth/*               @sjanc @jhedberg @Vudentz
-drivers/*/*qmsi*                         @nashif
-drivers/*/*stm32*                        @erwango
-drivers/bluetooth/*                      @sjanc @jhedberg @Vudentz
-drivers/clock_control/*stm32f4*          @rsalveti @idlethread
-drivers/ethernet/*                       @jukkar @tbursztyka
-drivers/flash/*                          @nashif
-drivers/gpio/*stm32*                     @rsalveti @idlethread
-drivers/gpio/gpio_pulpino.c              @fractalclone
-drivers/ieee802154/*                     @jukkar @tbursztyka
-drivers/interrupt_controller/*           @andrewboie
-drivers/pinmux/stm32/*                   @rsalveti @idlethread
-drivers/sensor/*                         @bogdan-davidoaia
-drivers/serial/uart_altera_jtag.c        @andrewboie
-drivers/serial/uart_riscv_qemu.c         @fractalclone
-drivers/slip/*                           @jukkar @tbursztyka
-drivers/spi/*                            @tbursztyka
-drivers/spi/spi_ll_stm32.*               @superna9999 @mbolivar
-drivers/timer/altera_avalon_timer.c      @andrewboie
-drivers/timer/pulpino_timer.c            @fractalclone
-drivers/timer/riscv_machine_timer.c      @fractalclone
-drivers/usb                              @youvedeep @andyross
-drivers/i2c/i2c_ll_stm32*                @ldts @ydamigos
-dts/arm/st/*                             @erwango
-ext/fs/*                                 @nashif
-ext/hal/cmsis/*                          @MaureenHelm @galak
-ext/hal/nordic/mdk/*                     @carlescufi
-ext/hal/nxp/mcux/*                       @MaureenHelm
-ext/hal/qmsi/*                           @nashif
-ext/hal/st/stm32cube/*                   @erwango
-ext/lib/crypto/mbedtls/*                 @nashif
-ext/lib/crypto/tinycrypt/*               @lpereira
-include/arch/arc/*                       @cjordan44 @ruuddw
-include/arch/arc/arch.h                  @andrewboie
-include/arch/arc/v2/irq.h                @andrewboie
-include/arch/arm/*                       @MaureenHelm @galak
-include/arch/arm/cortex_m/irq.h          @andrewboie
-include/arch/nios2/*                     @andrewboie
-include/arch/nios2/arch.h                @andrewboie
-include/arch/riscv32                     @fractalclone
-include/arch/x86/*                       @andrewboie @youvedeep
-include/arch/x86/arch.h                  @andrewboie
-include/arch/xtensa/*                    @andrewboie
-include/atomic.h                         @andrewboie @andyross
-include/bluetooth/*                      @sjanc @jhedberg @Vudentz
-include/cache.h                          @andrewboie @andyross
-include/device.h                         @youvedeep @nashif
-include/drivers/bluetooth/*              @sjanc @jhedberg @Vudentz
-include/drivers/ioapic.h                 @andrewboie
-include/drivers/loapic.h                 @andrewboie
-include/drivers/mvic.h                   @andrewboie
-include/fs.h                             @nashif
-include/fs/*                             @nashif
-include/init.h                           @andrewboie @andyross
-include/init.h                           @youvedeep @nashif
-include/irq.h                            @andrewboie
-include/irq.h                            @andrewboie @andyross
-include/irq_offload.h                    @andrewboie @andyross
-include/kernel.h                         @andrewboie @andyross
-include/kernel_version.h                 @andrewboie @andyross
-include/linker/linker-defs.h             @andrewboie @andyross
-include/linker/linker-tool-gcc.h         @andrewboie @andyross
-include/linker/linker-tool.h             @andrewboie @andyross
-include/linker/section_tags.h            @andrewboie @andyross
-include/linker/sections.h                @andrewboie @andyross
-include/misc/*                           @andrewboie @andyross
-include/net/*                            @jukkar @tbursztyka
-include/net/buf.h                        @jukkar @jhedberg @tbursztyka
-include/power.h                          @youvedeep @nashif
-include/sensor.h                         @bogdan-davidoaia
-include/shared_irq.h                     @andrewboie @andyross
-include/spi.h                            @tbursztyka
-include/sw_isr_table.h                   @andrewboie @andyross
-include/sys_clock.h                      @andrewboie @andyross
-include/sys_io.h                         @andrewboie @andyross
-include/toolchain.h                      @andrewboie @andyross
-include/toolchain/*                      @andrewboie @andyross
-include/zephyr.h                         @andrewboie @andyross
-kernel/*                                 @andrewboie @andyross
-kernel/device.c                          @youvedeep @nashif
-kernel/idle.c                            @youvedeep @nashif
-samples/bluetooth/*                      @sjanc @jhedberg @Vudentz
-samples/boards/quark_se_c1000/power*/*   @youvedeep @nashif
-samples/net/*                            @jukkar @tbursztyka
-samples/net/dns_resolve/*                @jukkar @tbursztyka
-samples/net/http_server/*                @jukkar @tbursztyka
-samples/net/lwm2m_client/*               @mike-scott
-samples/net/mbedtls_sslclient/*          @nashif
-samples/net/mqtt_publisher/*             @jukkar @tbursztyka
-samples/net/zoap_client/*                @vcgomes
-samples/net/zoap_server/*                @vcgomes
-samples/sensor/*                         @bogdan-davidoaia
-samples/subsys/usb                       @youvedeep @andyross
-scripts/expr_parser.py                   @andrewboie
-scripts/sanity_chk/*                     @andrewboie
-scripts/sanitycheck                      @andrewboie
-subsys/bluetooth/*                       @sjanc @jhedberg @Vudentz
-subsys/bluetooth/controller/*            @carlescufi @cvinayak
-subsys/fs/*                              @nashif
-subsys/net/buf.c                         @jukkar @jhedberg @tbursztyka
-subsys/net/ip/*                          @jukkar @tbursztyka
-subsys/net/lib/*                         @jukkar @tbursztyka
-subsys/net/lib/dns/*                     @jukkar @tbursztyka
-subsys/net/lib/http/*                    @jukkar @tbursztyka
-subsys/net/lib/lwm2m/*                   @mike-scott
-subsys/net/lib/mqtt/*                    @jukkar @tbursztyka
-subsys/net/lib/zoap/*                    @vcgomes
-subsys/usb                               @youvedeep @andyross
-tests/bluetooth/*                        @sjanc @jhedberg @Vudentz
-tests/crypto/*                           @lpereira
-tests/crypto/mbedtls/*                   @nashif
-tests/drivers/spi/*                      @tbursztyka
-tests/kernel/*                           @andrewboie @andyross
-tests/net/*                              @jukkar @tbursztyka
-tests/net/buf/*                          @jukkar @jhedberg @tbursztyka
-tests/net/lib/*                          @jukkar @tbursztyka
-tests/net/lib/http_header_fields/*       @jukkar @tbursztyka
-tests/net/lib/mqtt_packet/*              @jukkar @tbursztyka
-tests/net/lib/zoap/*                     @vcgomes
-tests/subsys/fs/*                        @nashif

CONTRIBUTING.rst

@@ -1,480 +0,0 @@
-Contribution Guidelines
-#######################
-
-As an open-source project, we welcome and encourage the community to submit
-patches directly to the project.  In our collaborative open source environment,
-standards and methods for submitting changes help reduce the chaos that can result
-from an active development community.
-
-This document explains how to participate in project conversations, log bugs
-and enhancement requests, and submit patches to the project so your patch will
-be accepted quickly in the codebase.
-
-
-Licensing
-*********
-
-Licensing is very important to open source projects. It helps ensure the
-software continues to be available under the terms that the author desired.
-
-.. _Apache 2.0 license:
-   https://github.com/zephyrproject-rtos/zephyr/blob/master/LICENSE
-
-.. _GitHub repo: https://github.com/zephyrproject-rtos/zephyr
-
-Zephyr uses the `Apache 2.0 license`_ (as found in the LICENSE file in the
-project's `GitHub repo`_) to strike a balance between open contribution and
-allowing you to use the software however you would like to. There are some
-imported or reused components of the Zephyr project that use other licensing,
-as described in `Zephyr Licensing`_.
-
-.. _Zephyr Licensing:
-   https://www.zephyrproject.org/doc/LICENSING.html
-
-The license tells you what rights you have as a developer, provided by the
-copyright holder. It is important that the contributor fully understands the
-licensing rights and agrees to them. Sometimes the copyright holder isn't the
-contributor, such as when the contributor is doing work on behalf of a
-company.
-
-.. _DCO:
-
-Developer Certification of Origin (DCO)
-***************************************
-
-To make a good faith effort to ensure licensing criteria are met, the Zephyr
-project requires the Developer Certificate of Origin (DCO) process to be
-followed.
-
-The DCO is an attestation attached to every contribution made by every
-developer. In the commit message of the contribution, (described more fully
-later in this document), the developer simply adds a ``Signed-off-by``
-statement and thereby agrees to the DCO.
-
-When a developer submits a patch, it is a commitment that the contributor has
-the right to submit the patch per the license.  The DCO agreement is shown
-below and at http://developercertificate.org/.
-
-
-.. code-block:: none
-
-    Developer's Certificate of Origin 1.1
-
-    By making a contribution to this project, I certify that:
-
-    (a) The contribution was created in whole or in part by me and I
-        have the right to submit it under the open source license
-        indicated in the file; or
-
-    (b) The contribution is based upon previous work that, to the
-        best of my knowledge, is covered under an appropriate open
-        source license and I have the right under that license to
-        submit that work with modifications, whether created in whole
-        or in part by me, under the same open source license (unless
-        I am permitted to submit under a different license), as
-        Indicated in the file; or
-
-    (c) The contribution was provided directly to me by some other
-        person who certified (a), (b) or (c) and I have not modified
-        it.
-
-    (d) I understand and agree that this project and the contribution
-        are public and that a record of the contribution (including
-        all personal information I submit with it, including my
-        sign-off) is maintained indefinitely and may be redistributed
-        consistent with this project or the open source license(s)
-        involved.
-
-DCO Sign-Off Methods
-====================
-
-The DCO requires a sign-off message in the following format appear on each
-commit in the pull request::
-
-   Signed-off-by: Zephyrus Zephyr <zephyrus@zephyrproject.org>
-
-The DCO text can either be manually added to your commit body, or you can add
-either ``-s`` or ``--signoff`` to your usual Git commit commands. If you forget
-to add the sign-off you can also amend a previous commit with the sign-off by
-running ``git commit --amend -s``. If you've pushed your changes to GitHub
-already you'll need to force push your branch after this with ``git push -f``.
-
-
-Prerequisites
-*************
-
-.. _Zephyr Project website: https://zephyrproject.org
-
-As a contributor, you'll want to be familiar with the Zephyr project, how to
-configure, install, and use it as explained in the `Zephyr Project website`_
-and how to set up your development environment as introduced in the Zephyr
-`Getting Started Guide`_.
-
-.. _Getting Started Guide:
-   https://www.zephyrproject.org/doc/getting_started/getting_started.html
-
-The examples below use a Linux host environment for Zephyr development.
-You should be familiar with common developer tools such as Git and Make, and
-platforms such as GitHub.
-
-If you haven't already done so, you'll need to create a (free) GitHub account
-on http://github.com and have Git tools available on your development system.
-
-Repository layout
-*****************
-
-To clone the main Zephyr Project repository use::
-
-    $ git clone https://github.com/zephyrproject-rtos/zephyr
-
-The Zephyr project directory structure is described in `Source Tree Structure`_
-documentation. In addition to the Zephyr kernel itself, you'll also find the
-sources for technical documentation, sample code, supported board
-configurations, and a collection of subsystem tests.  All of these are
-available for developers to contribute to and enhance.
-
-.. _Source Tree Structure:
-   https://www.zephyrproject.org/doc/kernel/overview/source_tree.html
-
-Pull Requests and Issues
-************************
-
-.. _Zephyr Project Issues: https://jira.zephyrproject.org
-
-.. _open pull requests: https://github.com/zephyrproject-rtos/zephyr/pulls
-
-.. _Zephyr-devel mailing list:
-   https://lists.zephyrproject.org/mailman/listinfo/zephyr-devel
-
-Before starting on a patch, first check in our Jira `Zephyr Project Issues`_
-system to see what's been reported on the issue you'd like to address.  Have a
-conversation on the `Zephyr-devel mailing list`_ (or the #zephyrproject IRC
-channel on freenode.net) to see what others think of your issue (and proposed
-solution).  You may find others that have encountered the issue you're
-finding, or that have similar ideas for changes or additions.  Send a message
-to the `Zephyr-devel mailing list`_ to introduce and discuss your idea with
-the development community.
-
-It's always a good practice to search for existing or related issues before
-submitting your own. When you submit an issue (bug or feature request), the
-triage team will review and comment on the submission, typically within a few
-business days.
-
-You can find all `open pull requests`_ on GitHub and open `Zephyr Project
-Issues`_ in Jira.
-
-Development Tools and Git Setup
-*******************************
-
-Signed-off-by
-=============
-
-The name in the commit message ``Signed-off-by:`` line and your email must
-match the change authorship information. Make sure your *.git/config* is set
-up correctly::
-
-   $ git config --global user.name "David Developer"
-   $ git config --global user.email "david.developer@company.com"
-
-gitlint
-=========
-
-When you submit a pull request to the project, a series of checks are
-performed to verify your commit messages meet the requirements. The same step
-done during the CI process can be performed locally using the the *gitlint*
-command.
-
-Install gitlint and run it locally in your tree and branch where your patches
-have been committed::
-
-     $ sudo pip3 install gitlint
-     $ gitlint
-
-Note, gitlint only checks HEAD (the most recent commit), so you should run it
-after each commit, or use the ``--commits`` option to specify a commit range
-covering all the development patches to be submitted.
-
-sanitycheck
-===========
-
-To verify that your changes did not break any tests or samples, please run the
-``sanitycheck`` script locally before submitting your pull request to GitHub. To
-run the same tests the CI system runs, follow these steps from within your
-local Zephyr source working directory::
-
-    $ source zephyr-env.sh
-    $ make host-tools
-    $ export PREBUILT_HOST_TOOLS=${ZEPHYR_BASE}/bin
-    $ export USE_CCACHE=1
-    $ ./scripts/sanitycheck
-
-The above will execute the basic sanitycheck script, which will run various
-kernel tests using the QEMU emulator.  It will also do some build tests on
-various samples with advanced features that can't run in QEMU.
-
-We highly recommend you run these tests locally to avoid any CI failures.
-Using CCACHE and pre-built host tools is optional, however it speeds up the
-execution time considerably.
-
-
-Coding Style
-************
-
-Use these coding guidelines to ensure that your development complies with the
-project's style and naming conventions.
-
-.. _Linux kernel coding style:
-   https://kernel.org/doc/html/latest/process/coding-style.html
-
-
-In general, follow the `Linux kernel coding style`_, with the
-following exceptions:
-
-* Add braces to every ``if`` and ``else`` body, even for single-line code
-  blocks. Use the ``--ignore BRACES`` flag to make *checkpatch* stop
-  complaining.
-* Use spaces instead of tabs to align comments after declarations, as needed.
-* Use C89-style single line comments, ``/*  */``. The C99-style single line
-  comment, ``//``, is not allowed.
-* Use ``/**  */`` for doxygen comments that need to appear in the documentation.
-
-The Linux kernel GPL-licensed tool ``checkpatch`` is used to check coding
-style conformity. Checkpatch is available in the scripts directory. To invoke
-it when committing code, edit your *.git/hooks/pre-commit* file to contain:
-
-.. code-block:: bash
-
-    #!/bin/sh
-    set -e exec
-    exec git diff --cached | ${ZEPHYR_BASE}/scripts/checkpatch.pl - || true
-
-Contribution Workflow
-*********************
-
-One general practice we encourage, is to make small,
-controlled changes. This practice simplifies review, makes merging and
-rebasing easier, and keeps the change history clear and clean.
-
-When contributing to the Zephyr Project, it is also important you provide as much
-information as you can about your change, update appropriate documentation,
-and test your changes thoroughly before submitting.
-
-The general GitHub workflow used by Zephyr developers uses a combination of
-command line Git commands and browser interaction with GitHub.  As it is with
-Git, there are multiple ways of getting a task done.  We'll describe a typical
-workflow here:
-
-.. _Create a Fork of Zephyr:
-   https://github.com/zephyrproject-rtos/zephyr#fork-destination-box
-
-#. `Create a Fork of Zephyr`_
-   to your personal account on GitHub.  (Click on the fork button in the top
-   right corner of the Zephyr project repo page in GitHub.)
-
-#. On your development computer, clone the fork you just made::
-
-     $ git clone https://github.com/<your github id>/zephyr
-
-   This would be a good time to let Git know about the upstream repo too::
-
-     $ git remote add upstream https://github.com/zephyrproject-rtos/zephyr.git
-
-   and verify the remote repos::
-
-     $ git remote -v
-
-#. Create a topic branch (off of master) for your work (if you're addressing
-   Jira issue, we suggest including the Jira issue number in the branch name)::
-
-     $ git checkout master
-     $ git checkout -b fix_comment_typo
-
-   Some Zephyr subsystems do development work on a separate branch from
-   master so you may need to indicate this in your checkout::
-
-     $ git checkout -b fix_out_of_date_patch origin/net
-
-#. Make changes, test locally, change, test, test again, ...  (Check out the
-   prior chapter on `sanitycheck`_ as well).
-
-#. When things look good, start the pull request process by adding your changed
-   files::
-
-     $ git add [file(s) that changed, add -p if you want to be more specific]
-
-   You can see files that are not yet staged using::
-
-     $ git status
-
-#. Verify changes to be committed look as you expected::
-
-     $ git diff --cached
-
-#. Commit your changes to your local repo::
-
-     $ git commit -s
-
-   The ``-s`` option automatically adds your ``Signed-off-by:`` to your commit
-   message.  Your commit will be rejected without this line that indicates your
-   agreement with the `DCO`_.  See the `Commit Guidelines`_ section for
-   specific guidelines for writing your commit messages.
-
-#. Push your topic branch with your changes to your fork in your personal
-   GitHub account::
-
-     $ git push origin fix_comment_typo
-
-#. In your web browser, go to your forked repo and click on the
-   ``Compare & pull request`` button for the branch you just worked on and
-   you want to open a pull request with.
-
-#. Review the pull request changes, and verify that you are opening a
-   pull request for the appropriate branch. The title and message from your
-   commit message should appear as well.
-
-#. If you're working on a subsystem branch that's not ``master``,
-   you may need to change the intended branch for the pull request
-   here, for example, by changing the base branch from ``master`` to ``net``.
-
-#. GitHub will assign one or more suggested reviewers (based on the
-   CODEOWNERS file in the repo). If you are a project member, you can
-   select additional reviewers now too.
-
-#. Click on the submit button and your pull request is sent and awaits
-   review.  Email will be sent as review comments are made, or you can check
-   on your pull request at https://github.com/zephyrproject-rtos/zephyr/pulls.
-
-#. While you're waiting for your pull request to be accepted and merged, you
-   can create another branch to work on another issue. (Be sure to make your
-   new branch off of master and not the previous branch.)::
-
-     $ git checkout master
-     $ git checkout -b fix_another_issue
-
-   and use the same process described above to work on this new topic branch.
-
-#. If reviewers do request changes to your patch, you can interactively rebase
-   commit(s) to fix review issues.  In your development repo::
-
-     $ git fetch --all
-     $ git rebase --ignore-whitespace upstream/master
-
-   The ``--ignore-whitespace`` option stops ``git apply`` (called by rebase)
-   from changing any whitespace. Continuing::
-
-     $ git rebase -i <offending-commit-id>^
-
-   In the interactive rebase editor, replace ``pick`` with ``edit`` to select
-   a specific commit (if there's more than one in your pull request), or
-   remove the line to delete a commit entirely.  Then edit files to fix the
-   issues in the review.
-
-   As before, inspect and test your changes. When ready, continue the
-   patch submission::
-
-     $ git add [file(s)]
-     $ git rebase --continue
-
-   Update commit comment if needed, and continue::
-
-     $ git push --force origin fix_comment_typo
-
-   By force pushing your update, your original pull request will be updated
-   with your changes so you won't need to resubmit the pull request.
-
-
-Commit Guidelines
-*****************
-
-Changes are submitted as Git commits. Each commit message must contain:
-
-* A short and descriptive subject line that is less than 72 characters,
-  followed by a blank line. The subject line must include a prefix that
-  identifies the subsystem being changed, followed by a colon, and a short
-  title, for example:  ``doc: update wiki references to new site``.
-  (If you're updating an existing file, you can use
-  ``git log <filename>`` to see what developers used as the prefix for
-  previous patches of this file.)
-
-* A change description with your logic or reasoning for the changes, followed
-  by a blank line.
-
-* A Signed-off-by line, ``Signed-off-by: <name> <email>`` typically added
-  automatically by using ``git commit -s``
-
-* If the change address a Jira issue, include a line of the form::
-
-      Jira: ZEP-xxx
-
-
-All changes and topics sent to GitHub must be well-formed, as described above.
-
-Commit Message Body
-===================
-
-When editing the commit message, please briefly explain what your change
-does and why it's needed. A change summary of ``"Fixes stuff"`` will be rejected. An
-empty change summary is only acceptable for trivial changes fully described by
-the commit title (e.g., ``doc: fix misspellings in CONTRIBUTING doc``)
-
-The description body of the commit message must include:
-
-* **what** the change does,
-* **why** you chose that approach,
-* **what** assumptions were made, and
-* **how** you know it works -- for example, which tests you ran.
-
-For examples of accepted commit messages, you can refer to the Zephyr GitHub
-`changelog <https://github.com/zephyrproject-rtos/zephyr/commits/master>`__.
-
-Other Commit Expectations
-=========================
-
-* Commits must build cleanly when applied on top of each other, thus avoiding
-  breaking bisectability.
-
-* Commits must pass the *scripts/checkpatch.pl* requirements.
-
-* Each commit must address a single identifiable issue and must be
-  logically self-contained. Unrelated changes should be submitted as
-  separate commits.
-
-* You may submit pull request RFCs (requests for comments) to send work
-  proposals, progress snapshots of your work, or to get early feedback on
-  features or changes that will affect multiple areas in the code base.
-
-Identifying Contribution Origin
-===============================
-
-When adding a new file to the tree, it is important to detail the source of
-origin on the file, provide attributions, and detail the intended usage. In
-cases where the file is an original to Zephyr, the commit message should
-include the following ("Original" is the assumption if no Origin tag is
-present)::
-
-    Origin: Original
-
-In cases where the file is imported from an external project, the commit
-message shall contain details regarding the original project, the location of
-the project, the SHA-id of the origin commit for the file, the intended
-purpose, and if the file will be maintained by the Zephyr project,
-(whether or not the Zephyr project will contain a localized branch or if
-it is a downstream copy).
-
-For example, a copy of a locally maintained import::
-
-    Origin: Contiki OS
-    License: BSD 3-Clause
-    URL: http://www.contiki-os.org/
-    commit: 853207acfdc6549b10eb3e44504b1a75ae1ad63a
-    Purpose: Introduction of networking stack.
-    Maintained-by: Zephyr
-
-For example, a copy of an externally maintained import::
-
-    Origin: Tiny Crypt
-    License: BSD 3-Clause
-    URL: https://github.com/01org/tinycrypt
-    commit: 08ded7f21529c39e5133688ffb93a9d0c94e5c6e
-    Purpose: Introduction of TinyCrypt
-    Maintained-by: External

Kbuild

@@ -1,5 +1,19 @@
 # vim: filetype=make
 
+ifeq (${CONFIG_NUM_COMMAND_PACKETS},)
+CONFIG_NUM_COMMAND_PACKETS=0
+endif
+ifeq (${CONFIG_NUM_TIMER_PACKETS},)
+CONFIG_NUM_TIMER_PACKETS=0
+endif
+ifeq (${CONFIG_NUM_TASK_PRIORITIES},)
+CONFIG_NUM_TASK_PRIORITIES=$(CONFIG_NUM_PREEMPT_PRIORITIES)
+endif
+
+ifeq ($(ARCH),x86)
+TASKGROUP_SSE="  TASKGROUP SSE"
+endif
+
 define filechk_configs.c
 	(echo "/* file is auto-generated, do not modify ! */"; \
 	echo; \
@@ -37,15 +51,15 @@ arch/$(ARCH)/core/offsets/offsets.o: arch/$(ARCH)/core/offsets/offsets.c $(KCONF
 
 
 define offsetchk
-	$(Q)set -e;                                                \
-	$(kecho) '  CHK     $@';                                   \
-	mkdir -p $(dir $@);                                        \
-	$(srctree)/scripts/gen_offset_header.py -i $(1) -o $@.tmp; \
-	if [ -r $@ ] && cmp -s $@ $@.tmp; then                     \
-	rm -f $@.tmp;                                              \
-	else                                                       \
-	$(kecho) '  UPD     $@';                                   \
-	mv -f $@.tmp $@;                                           \
+	$(Q)set -e;                             \
+	$(kecho) '  CHK     $@';                \
+	mkdir -p $(dir $@);                     \
+	$(GENOFFSET_H) -i $(1) -o $@.tmp;       \
+	if [ -r $@ ] && cmp -s $@ $@.tmp; then  \
+	rm -f $@.tmp;                           \
+	else                                    \
+	$(kecho) '  UPD     $@';                \
+	mv -f $@.tmp $@;                        \
 	fi
 endef
 

Kconfig.zephyr

@@ -14,8 +14,6 @@ source "arch/Kconfig"
 
 source "kernel/Kconfig"
 
-source "dts/Kconfig"
-
 source "drivers/Kconfig"
 
 source "net/Kconfig"

MAINTAINERS

@@ -62,6 +62,7 @@ Maintainers List (try to look for most precise areas first)
 ARC ARCHITECTURE
 M:	Ruud Derwig <Ruud.Derwig@synopsys.com>
 M:	Chuck Jordan <cjordan@synopsys.com>
+M:	Benjamin Walsh <benjamin.walsh@windriver.com>
 S:	Supported
 F:	arch/arc/
 F:	include/arch/arc/
@@ -115,6 +116,7 @@ F:	boards/arm/arduino_101_ble/
 BOARDS/ARM - CC32XX LAUNCHXL
 M:      Gil Pitney <gil.pitney@linaro.org>
 S:      Supported
+F:      boards/arm/cc3200_launchxl/
 F:      boards/arm/cc3220sf_launchxl/
 
 BOARDS/ARM - NXP FRDM-K64F
@@ -171,12 +173,12 @@ F:	boards/x86/galileo/
 BOARDS/X86 - QUARK D2000 Devboard
 M:      Anas Nashif <anas.nashif@intel.com>
 S:	Supported
-F:	boards/x86/quark_d2000_crb/
+F:	boards/x86/quark_d2000/
 
 BOARDS/X86 - QUARK SE C1000 Devboard
 M:      Anas Nashif <anas.nashif@intel.com>
 S:	Supported
-F:	boards/x86/quark_se_c1000_devboard/
+F:	boards/x86/quark_se_c1000/
 
 BLUETOOTH
 M:	Johan Hedberg <johan.hedberg@intel.com>
@@ -201,7 +203,8 @@ F:	subsys/bluetooth/controller/
 CC32XX SDK
 M:      Gil Pitney <gil.pitney@linaro.org>
 S:      Supported
-F:      ext/hal/ti/simplelink
+F:      ext/hal/ti/cc3200sdk/
+F:      ext/hal/ti/cc3220sdk/
 
 CC32XX SOC - TI SIMPLELINK
 M:      Gil Pitney <gil.pitney@linaro.org>
@@ -209,23 +212,33 @@ S:      Supported
 F:      arch/arm/soc/ti_simplelink/cc32xx
 
 DOCUMENTATION
-M:	David Kinder <david.b.kinder@intel.com>
-M:	Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
+M:	Kinder, David <david.b.kinder@intel.com>
+M:	Perez-Gonzalez, Inaky <inaky.perez-gonzalez@intel.com>
 S:	Supported
 F:	doc/
 F:	*.rst
+F:	*/*.rst
+F:	*/*/*.rst
+F:	*/*/*/*.rst
+F:	*/*/*/*/*.rst
+F:	*/*/*/*/*/*.rst
+F:	*/*/*/*/*/*/*.rst
+F:	*/*/*/*/*/*/*/*.rst
+F:	*/*/*/*/*/*/*/*/*.rst
 
 FILE SYSTEM
-M:	Anas Nashif <anas.nashif@intel.com>
+M:	Ramesh Thomas <ramesh.thomas@intel.com>
+M:	Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
 S:	Supported
 F:	ext/fs/
 F:	subsys/fs/
 F:	include/fs/
 F:	include/fs.h
-F:	tests/subsys/fs
+F:	samples/fs/
 
 FLASH DRIVER
-M:	Anas Nashif <anas.nashif@intel.com>
+M:	Baohong Liu <baohong.liu@intel.com>
+M:	Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
 S:	Supported
 F:	drivers/flash/
 
@@ -248,6 +261,7 @@ F:	include/drivers/ioapic.h
 F:	include/drivers/mvic.h
 
 KERNEL CORE
+M:	Benjamin Walsh <benjamin.walsh@windriver.com>
 M:	Andrew Boie <andrew.p.boie@intel.com>
 M:	Andy Ross <andrew.j.ross@intel.com>
 S:	Supported
@@ -260,11 +274,11 @@ F:	include/init.h
 F:	include/irq.h
 F:	include/irq_offload.h
 F:	include/kernel_version.h
-F:	include/linker/linker-defs.h
-F:	include/linker/linker-tool-gcc.h
-F:	include/linker/linker-tool.h
-F:	include/linker/section_tags.h
-F:	include/linker/sections.h
+F:	include/linker-defs.h
+F:	include/linker-tool-gcc.h
+F:	include/linker-tool.h
+F:	include/section_tags.h
+F:	include/sections.h
 F:	include/shared_irq.h
 F:	include/sw_isr_table.h
 F:	include/sys_clock.h
@@ -279,24 +293,21 @@ M:	Anas Nashif <anas.nashif@intel.com>
 M:	Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
 F:	.known-issues/
 
-LWM2M
-M:	Michael Scott <michael.scott@linaro.org>
-S:	Supported
-F:	subsys/net/lib/lwm2m/
-F:	samples/net/lwm2m_client/
 
 MAINTAINERS
 M:	Anas Nashif <anas.nashif@intel.com>
-M:	Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
+M:	Perez-Gonzalez, Inaky <inaky.perez-gonzalez@intel.com>
 S:	Supported
 F:	MAINTAINERS
 
 MBEDTLS
-M:	Anas Nashif <anas.nashif@intel.com>
+M:	Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
+M:	Jithu Joseph <jithu.joseph@intel.com>
+M:	Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
 S:	Supported
 F:	ext/lib/crypto/mbedtls/
 F:	samples/net/mbedtls_sslclient/
-F:	tests/crypto/mbedtls/
+F:	tests/crypto/test_mbedtls/
 
 MCUXPRESSO SOFTWARE DEVELOPMENT KIT (MCUX)
 M:	Maureen Helm <maureen.helm@nxp.com>
@@ -307,7 +318,7 @@ MPS2 - ARM LTD CORTEX-M PROTOTYPING SYSTEM
 M:	Vincenzo Frascino <vincenzo.frascino@linaro.org>
 S:	Supported
 F:	arch/arm/soc/arm/mps2/
-F:	boards/arm/mps2_an385/
+F:	boards/arm/mps2/
 
 NETWORKING
 M:	Jukka Rissanen <jukka.rissanen@linux.intel.com>
@@ -331,7 +342,7 @@ S:	Supported
 F:	subsys/net/lib/dns/
 F:	subsys/net/lib/http/
 F:	subsys/net/lib/mqtt/
-F:	samples/net/dns_resolve/
+F:	samples/net/dns_client/
 F:	samples/net/http_server/
 F:	samples/net/mqtt_publisher/
 F:	tests/net/lib/http_header_fields/
@@ -354,6 +365,7 @@ F:	arch/nios2/
 F:	include/arch/nios2/
 F:	drivers/serial/uart_altera_jtag.c
 F:	drivers/timer/altera_avalon_timer.c
+F:	tests/kernel/test_intmath/
 F:	boards/nios2/
 
 NORDIC MDK
@@ -362,16 +374,16 @@ S:	Supported
 F:	ext/hal/nordic/mdk/
 
 POWER MANAGEMENT
-M:	Anas Nashif <anas.nashif@intel.com>
-M:	Youvedeep Singh <youvedeep.singh@intel.com>
+M:	Ramesh Thomas <ramesh.thomas@intel.com>
+M:	Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
 S:	Supported
 F:	arch/x86/core/crt0.S
 F:	include/device.h
 F:	include/init.h
 F:	include/power.h
-F:	kernel/idle.c
+F:	kernel/k_idle.c
 F:	kernel/device.c
-F:	samples/boards/quark_se_c1000/power*/
+F:	samples/power/
 
 QMSI
 M:	Anas Nashif <anas.nashif@intel.com>
@@ -379,9 +391,12 @@ S:	Supported
 F:	ext/hal/qmsi/
 
 QMSI DRIVERS
-M:      Anas Nashif <anas.nashif@intel.com>
+M:	Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
+M:	Baohong Liu <baohong.liu@intel.com>
+M:	Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
 S:	Supported
 F:	drivers/*/*qmsi*
+F:	drivers/*/*/*qmsi*
 
 QUARK D2000 SOC
 M:      Anas Nashif <anas.nashif@intel.com>
@@ -391,7 +406,7 @@ F:	arch/x86/soc/intel_quark/quark_d2000/
 QUARK SE C1000 SOC
 M:      Anas Nashif <anas.nashif@intel.com>
 S:	Supported
-F:	arch/x86/soc/intel_quark/quark_se/
+F:	arch/x86/soc/intel_quark/quark_se_c1000/
 
 QUARK X1000 SOC
 M:      Anas Nashif <anas.nashif@intel.com>
@@ -406,9 +421,9 @@ F:	scripts/expr_parser.py
 F:	scripts/sanity_chk/
 
 SENSOR DRIVERS
-M:	Bogdan Davidoaia <bogdan.davidoaia@gmail.com>
+M:	Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
 M:	Murtaza Alexandru <murtaza.alexandru1995@gmail.com>
-S:	Maintained
+S:	Supported
 W:	https://www.zephyrproject.org/doc/subsystems/sensor.html
 F:	include/sensor.h
 F:	drivers/sensor/
@@ -439,19 +454,18 @@ M:	Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
 S:	Supported
 F:	drivers/spi/
 F:	include/spi.h
-F:	tests/drivers/spi/
+F:	tests/drivers/spi_test/
 
 USB
-M:	Youvedeep Singh <youvedeep.singh@intel.com>
-M:	Andy Ross <andrew.j.ross@intel.com>
+M:	Jithu Joseph <jithu.joseph@intel.com>
 S:	Supported
 F:	subsys/usb
 F:	drivers/usb
-F:	samples/subsys/usb
+F:	samples/usb
 
 X86 ARCH
+M:	Benjamin Walsh <benjamin.walsh@windriver.com>
 M:	Andrew Boie <andrew.p.boie@intel.com>
-M:	Youvedeep Singh <youvedeep.singh@intel.com>
 S:	Supported
 F:	arch/x86/
 F:	include/arch/x86/

Makefile

@@ -1,7 +1,7 @@
 VERSION_MAJOR 	   = 1
-VERSION_MINOR 	   = 9
+VERSION_MINOR 	   = 8
 PATCHLEVEL 	   = 0
-VERSION_RESERVED   = 0
+VERSION_RESERVED   =
 EXTRAVERSION       =
 NAME 		   = Zephyr Kernel
 
@@ -320,8 +320,10 @@ GDB		= $(CROSS_COMPILE)gdb
 READELF		= $(CROSS_COMPILE)readelf
 AWK		= awk
 ifeq ($(PREBUILT_HOST_TOOLS),)
+GENOFFSET_H	= scripts/gen_offset_header/gen_offset_header
 FIXDEP		= scripts/basic/fixdep
 else
+GENOFFSET_H	= $(PREBUILT_HOST_TOOLS)/gen_offset_header
 ifneq ($(filter host-tools, $(MAKECMDGOALS)),)
 FIXDEP		= scripts/basic/fixdep
 else
@@ -414,7 +416,7 @@ exports += VERSION_MAJOR VERSION_MINOR PATCHLEVEL VERSION_RESERVED EXTRAVERSION
 exports += KERNELRELEASE KERNELVERSION
 exports += ARCH CONFIG_SHELL HOSTCC HOSTCFLAGS CROSS_COMPILE AS LD CC CXX
 exports += CPP AR NM STRIP OBJCOPY OBJDUMP GDB
-exports += MAKE AWK PERL PYTHON
+exports += MAKE AWK INSTALLKERNEL PERL PYTHON GENOFFSET_H
 exports += HOSTCXX HOSTCXXFLAGS CHECK CHECKFLAGS
 
 exports += KBUILD_CPPFLAGS NOSTDINC_FLAGS ZEPHYRINCLUDE OBJCOPYFLAGS LDFLAGS
@@ -435,9 +437,7 @@ define filechk_Makefile.export
 	echo "BOARD=$(BOARD)"; \
 	echo; \
 	$(foreach e,$(exports),echo $(e)=$($(e));) echo; \
-	echo "include $(O)/include/config/auto.conf"; \
-	echo "include $(O)/include/generated/generated_dts_board.conf"; \
-	echo "-include $(srctree)/boards/$(ARCH)/$(BOARD_NAME)/Makefile.board";)
+	echo "include $(O)/include/config/auto.conf";)
 endef
 
 # Files to ignore in find ... statements
@@ -456,6 +456,7 @@ PHONY += scripts_basic
 ifeq ($(PREBUILT_HOST_TOOLS),)
 scripts_basic:
 	$(Q)$(MAKE) $(build)=scripts/basic
+	$(Q)$(MAKE) $(build)=scripts/gen_offset_header
 else
 scripts_basic:
 endif
@@ -605,8 +606,9 @@ include/config/auto.conf: ;
 endif # $(dot-config)
 
 # kernel objects are built as a static library
-libs-y := lib/
-core-y := kernel/ drivers/ misc/ boards/ ext/ subsys/ tests/ arch/
+libs-y := kernel/
+core-y := lib/ misc/ boards/ ext/ subsys/ tests/ arch/
+drivers-y := drivers/
 
 ARCH = $(subst $(DQUOTE),,$(CONFIG_ARCH))
 export ARCH
@@ -659,8 +661,6 @@ endif
 
 # Some GCC variants don't support these
 KBUILD_CFLAGS += $(call cc-option,-fno-asynchronous-unwind-tables,)
-KBUILD_CFLAGS += $(call cc-option,-fno-pie,)
-KBUILD_CFLAGS += $(call cc-option,-fno-pic,)
 
 ifeq ($(CONFIG_STACK_CANARIES),y)
 KBUILD_CFLAGS += $(call cc-option,-fstack-protector-all,)
@@ -755,7 +755,6 @@ KBUILD_CFLAGS += $(KCFLAGS)
 
 LINKFLAGPREFIX ?= -Wl,
 LDFLAGS_zephyr += $(LDFLAGS)
-LDFLAGS_zephyr += $(call cc-ldoption,-no-pie)
 LDFLAGS_zephyr += $(call cc-ldoption,$(LINKFLAGPREFIX)-X)
 LDFLAGS_zephyr += $(call cc-ldoption,$(LINKFLAGPREFIX)-N)
 LDFLAGS_zephyr += $(call cc-ldoption,$(LINKFLAGPREFIX)--gc-sections)
@@ -801,7 +800,8 @@ all: $(KERNEL_BIN_NAME) $(KERNEL_STAT_NAME)
 # this default value
 export KBUILD_IMAGE ?= zephyr
 
-zephyr-dirs	:= $(patsubst %/,%,$(filter %/,$(libs-y) $(core-y)))
+zephyr-dirs	:= $(patsubst %/,%,$(filter %/, $(core-y) $(drivers-y) \
+		     $(libs-y)))
 
 # Workaround for some make notdir implementations that require
 # the paramenter not to end in "/".
@@ -812,16 +812,20 @@ zephyr-app-dir-root := $(abspath $(patsubst %, %/.., $(SOURCE_DIR)))
 zephyr-alldirs	:= $(sort $(zephyr-dirs) $(SOURCE_DIR) $(patsubst %/,%,$(filter %/, \
 		     $(core-) $(drivers-) $(libs-) $(app-))))
 
-core-y		:= $(patsubst %/, %/built-in.o, $(core-y)) kernel/lib.a
+core-y		:= $(patsubst %/, %/built-in.o, $(core-y))
 app-y		:= $(patsubst %, %/built-in.o, $(notdir $(zephyr-app-dir-root-name)))
-libs-y		:= $(patsubst %/, %/built-in.o, $(libs-y))
+drivers-y	:= $(patsubst %/, %/built-in.o, $(drivers-y))
+libs-y1		:= $(patsubst %/, %/lib.a, $(libs-y))
+libs-y2		:= $(patsubst %/, %/built-in.o, $(libs-y))
+libs-y		:= $(libs-y1) $(libs-y2)
 
 # core-y must be last here. several arches use .gnu.linkonce magic
 # to register interrupt or exception handlers, and defaults under
 # arch/ (part of core-y) must be linked after drivers or libs.
+export KBUILD_ZEPHYR_MAIN := $(drivers-y) $(libs-y) $(core-y)
 export LDFLAGS_zephyr
 
-zephyr-deps := $(KBUILD_LDS) $(core-y) $(libs-y) $(app-y)
+zephyr-deps := $(KBUILD_LDS) $(KBUILD_ZEPHYR_MAIN) $(app-y)
 
 ALL_LIBS += $(TOOLCHAIN_LIBS)
 export ALL_LIBS
@@ -829,18 +833,11 @@ export ALL_LIBS
 LINK_LIBS := $(foreach l,$(ALL_LIBS), -l$(l))
 
 quiet_cmd_ar_target = AR      $@
-      cmd_ar_target = rm -f $@; $(AR) rcT$(KBUILD_ARFLAGS) $@ $^
-
-# Contains all the kernel-space objects except the kernel/lib.a which is
-# linked outside of the --whole-archive directive with different AR
-# parameters to save footprint space for unused kernel subsystems
-libzephyr.a: $(filter-out %/lib.a, $(core-y))
-	$(call cmd,ar_target)
-
-# All application objects and third party libraries which would be considered
-# to not directly be part of the kernel (and hence whose symbols would not
-# be globally marked as supervisor-only in memory protection scenarios)
-libapplication.a: $(app-y) $(libs-y) $(KBUILD_ZEPHYR_APP)
+# Do not put lib.a into libzephyr.a. lib.a files are to be linked separately to
+# the final image
+cmd_ar_target = rm -f $@; $(AR) rcT$(KBUILD_ARFLAGS) $@ \
+	$(filter-out %/lib.a, $(KBUILD_ZEPHYR_MAIN))
+libzephyr.a: $(zephyr-deps)
 	$(call cmd,ar_target)
 
 quiet_cmd_create-lnk = LINK    $@
@@ -853,10 +850,11 @@ quiet_cmd_create-lnk = LINK    $@
 	echo "-e __start"; 						 	\
 	echo "$(LINKFLAGPREFIX)--start-group";					\
 	echo "$(LINKFLAGPREFIX)--whole-archive";				\
-	echo "libapplication.a";						\
+	echo "$(KBUILD_ZEPHYR_APP)";						\
+	echo "$(app-y)";							\
 	echo "libzephyr.a";							\
 	echo "$(LINKFLAGPREFIX)--no-whole-archive";         			\
-	echo "$(filter %/lib.a, $(core-y))";					\
+	echo "$(filter %/lib.a, $(KBUILD_ZEPHYR_MAIN))";			\
 	echo "$(objtree)/arch/$(ARCH)/core/offsets/offsets.o"; 			\
 	echo "$(LINKFLAGPREFIX)--end-group"; 					\
 	echo "$(LIB_INCLUDE_DIR) $(LINK_LIBS)";					\
@@ -873,7 +871,7 @@ linker.cmd: $(zephyr-deps)
 		$(EXTRA_LINKER_CMD_OPT) $(KBUILD_LDS) -o $@
 
 
-$(PREBUILT_KERNEL): $(zephyr-deps) libzephyr.a libapplication.a \
+$(PREBUILT_KERNEL): $(zephyr-deps) libzephyr.a $(KBUILD_ZEPHYR_APP) $(app-y) \
 		linker.cmd $(KERNEL_NAME).lnk
 	$(Q)$(CC) -T linker.cmd @$(KERNEL_NAME).lnk -o $@
 
@@ -895,12 +893,6 @@ WARN_ABOUT_DEPRECATION := $(if $(CONFIG_BOARD_DEPRECATED),echo -e \
 
 ifeq ($(ARCH),x86)
 include $(srctree)/arch/x86/Makefile.idt
-ifeq ($(CONFIG_X86_MMU),y)
-include $(srctree)/arch/x86/Makefile.mmu
-endif
-ifeq ($(CONFIG_GDT_DYNAMIC),y)
-include $(srctree)/arch/x86/Makefile.gdt
-endif
 endif
 
 ifeq ($(CONFIG_GEN_ISR_TABLES),y)
@@ -1013,17 +1005,6 @@ endif
 
 dts: include/generated/generated_dts_board.h
 
-define filechk_.config-sanitycheck
-	(cat .config; \
-	 grep -e '^CONFIG' include/generated/generated_dts_board.conf | cat; \
-	)
-endef
-
-.config-sanitycheck: include/generated/generated_dts_board.conf FORCE
-	$(call filechk,.config-sanitycheck)
-
-config-sanitycheck: .config-sanitycheck
-
 # The actual objects are generated when descending,
 # make sure no implicit rule kicks in
 $(sort $(zephyr-deps)): $(zephyr-dirs) zephyr-app-dir ;
@@ -1140,7 +1121,6 @@ CLEAN_DIRS  += $(MODVERDIR)
 
 CLEAN_FILES += 	include/generated/generated_dts_board.conf \
 		include/generated/generated_dts_board.h \
-		.config-sanitycheck \
 		.old_version .tmp_System.map .tmp_version \
 		.tmp_* System.map *.lnk *.map *.elf *.lst \
 		*.bin *.hex *.stat *.strip staticIdt.o linker.cmd \
@@ -1219,6 +1199,8 @@ help:
 	@echo  '  all		  - Build all targets marked with [*]'
 	@echo  '* zephyr	  - Build a zephyr application'
 	@echo  '  run		  - Build a zephyr application and run it if board supports emulation'
+	@echo  '  qemu		  - Build a zephyr application and run it in qemu [deprecated]'
+	@echo  '  qemugdb         - Same as 'qemu' but start a GDB server on port 1234 [deprecated]'
 	@echo  '  flash		  - Build and flash an application'
 	@echo  '  debug		  - Build and debug an application using GDB'
 	@echo  '  debugserver	  - Build and start a GDB server (port 1234 for Qemu targets)'
@@ -1277,8 +1259,11 @@ $(help-board-dirs): help-%:
 host-tools:
 	$(Q)$(MAKE) $(build)=scripts/basic
 	$(Q)$(MAKE) $(build)=scripts/kconfig standalone
+	$(Q)$(MAKE) $(build)=scripts/gen_idt
+	$(Q)$(MAKE) $(build)=scripts/gen_offset_header
 	@mkdir -p ${ZEPHYR_BASE}/bin
-	@cp scripts/basic/fixdep scripts/kconfig/conf ${ZEPHYR_BASE}/bin
+	@cp scripts/basic/fixdep scripts/gen_idt/gen_idt scripts/kconfig/conf \
+		scripts/gen_offset_header/gen_offset_header ${ZEPHYR_BASE}/bin
 
 
 # Documentation targets

Makefile.inc

@@ -87,13 +87,18 @@ debug:	$(DOTCONFIG)
 flash: $(DOTCONFIG)
 	$(Q)$(call zephyrmake,$(O),$@)
 
+qemugdb: debugserver
+
+qemu: $(DOTCONFIG)
+	@echo This target is deprecated, use 'make run' instead
+	$(Q)$(call zephyrmake,$(O),$@)
+
 run: $(DOTCONFIG)
 	$(Q)$(call zephyrmake,$(O),$@)
 
 ifeq ($(MAKECMDGOALS),debugserver)
 ARCH = $(notdir $(subst /$(BOARD),,$(wildcard $(ZEPHYR_BASE)/boards/*/$(BOARD))))
-BOARD_DIR = $(dir $(wildcard $(ZEPHYR_BASE)/boards/*/*/$(BOARD)_defconfig))
--include $(BOARD_DIR)/Makefile.board
+-include $(ZEPHYR_BASE)/boards/$(ARCH)/$(BOARD)/Makefile.board
 -include $(ZEPHYR_BASE)/scripts/Makefile.toolchain.$(ZEPHYR_GCC_VARIANT)
 BOARD_NAME = $(BOARD)
 export BOARD_NAME
@@ -120,9 +125,6 @@ outputexports: initconfig
 dts: initconfig
 	$(Q)$(call zephyrmake,$(O),$@)
 
-config-sanitycheck: dts
-	$(Q)$(call zephyrmake,$(O),$@)
-
 menuconfig: initconfig
 	$(Q)$(call zephyrmake,$(O),$@)
 
@@ -133,6 +135,8 @@ help:
 %:
 	$(Q)$(call zephyrmake,$(O),$@)
 
+OVERLAY_CONFIG += $(ZEPHYR_BASE)/kernel/configs/kernel.config
+
 $(DOTCONFIG): $(BOARDCONFIG) $(KBUILD_DEFCONFIG_PATH) $(CONF_FILE)
 	$(Q)$(CONFIG_SHELL) $(ZEPHYR_BASE)/scripts/kconfig/merge_config.sh \
 		-q -m -O $(O) $(KBUILD_DEFCONFIG_PATH) $(OVERLAY_CONFIG) $(CONF_FILE) \

README.rst

@@ -1,11 +1,6 @@
 Zephyr Project
 ##############
 
-.. raw:: html
-
-   <a href="https://bestpractices.coreinfrastructure.org/projects/74"><img
-   src="https://bestpractices.coreinfrastructure.org/projects/74/badge"></a>
-
 The Zephyr Project is a scalable real-time operating system (RTOS) supporting
 multiple hardware architectures, optimized for resource constrained devices,
 and built with security in mind.
@@ -15,13 +10,9 @@ resource-constrained systems: from simple embedded environmental sensors and
 LED wearables to sophisticated smart watches and IoT wireless gateways.
 
 The Zephyr kernel supports multiple architectures, including ARM Cortex-M,
-Intel x86, ARC, NIOS II, Tensilica Xtensa, and RISC V, and a large number of
+Intel x86, ARC, NIOS II and RISC V, and a large number of
 `supported boards`_.
 
-.. below included in doc/introduction/introduction.rst
-
-.. start_include_here
-
 Community Support
 *****************
 
@@ -57,7 +48,7 @@ support systems:
 * **Source Code in GitHub**: Zephyr Project source code is maintained on a
   public GitHub repository at https://github.com/zephyrproject-rtos/zephyr.
   You'll find information about getting access to the repository and how to
-  contribute to the project in this `Contribution Guide`_ document.
+  contribute to the project in this `Contribution Guide`_ wiki article.
 
 * **Samples Code**: In addition to the kernel source code, there are also
   many documented `Sample and Demo Code Examples`_ that can help show you
@@ -72,12 +63,6 @@ support systems:
   our JIRA system: https://jira.zephyrproject.org. You can browse through the
   reported issues and submit issues of your own.
 
-* **Security-related Issue Reporting**: For security-related inquiries or
-  reporting suspected security-related bugs in the Zephyr OS, please
-  send email to vulnerabilities@zephyrproject.org.  We will assess and fix
-  flaws according to our security policy outlined in the Zephyr Project
-  `Security Overview`_.
-
 * **Mailing List**: The `Zephyr Mailing Lists`_ are perhaps the most convenient
   way to track developer discussions and to ask your own support questions to
   the Zephyr project community.
@@ -94,8 +79,7 @@ support systems:
 .. _supported boards: https://www.zephyrproject.org/doc/boards/boards.html
 .. _Zephyr Introduction: https://www.zephyrproject.org/doc/introduction/introducing_zephyr.html
 .. _Getting Started Guide: https://www.zephyrproject.org/doc/getting_started/getting_started.html
-.. _Contribution Guide: https://www.zephyrproject.org/doc/contribute/contribute_guidelines.html
+.. _Contribution Guide: https://github.com/zephyrproject-rtos/zephyr/wiki/Contribution-Guide
 .. _Zephyr GitHub wiki: https://github.com/zephyrproject-rtos/zephyr/wiki
 .. _Zephyr Mailing Lists: https://lists.zephyrproject.org/
 .. _Sample and Demo Code Examples: https://www.zephyrproject.org/doc/samples/samples.html
-.. _Security Overview: https://www.zephyrproject.org/doc/security/security-overview.html

arch/arc/Kconfig

@@ -103,6 +103,15 @@ config	RGF_NUM_BANKS
 	register bank, the fast interrupt handler must save
 	and restore general purpose registers.
 
+config	FIRQ_STACK_SIZE
+	int
+	prompt "Size of stack for FIRQs (in bytes)"
+	depends on CPU_ARCV2
+	default 1024
+	help
+	  FIRQs and regular IRQs have different stacks so that a FIRQ can start
+	  running without doing stack switching in software.
+
 config	ARC_STACK_CHECKING
 	bool "Enable Stack Checking"
 	depends on CPU_ARCV2
@@ -159,7 +168,7 @@ config CODE_DENSITY
 	bool
 	default n
 	help
-	Enable code density option to get better code density
+	Enbale code density option to get better code desntiy
 
 menu "Floating Point Options"
 depends on CPU_HAS_FPU
@@ -186,21 +195,6 @@ config FP_SHARING
 
 endmenu
 
-menu "ARC MPU Options"
-depends on CPU_HAS_MPU
-
-config ARC_MPU_ENABLE
-	bool "Enable MPU"
-	depends on CPU_HAS_MPU
-	select ARC_MPU
-	default n
-	help
-	  Enable MPU
-
-source "arch/arc/core/mpu/Kconfig"
-
-endmenu
-
 config ICCM_SIZE
 	int "ICCM Size in kB"
 	help

arch/arc/Makefile

@@ -21,4 +21,4 @@ soc-cxxflags ?= $(soc-cflags)
 soc-aflags ?= $(soc-cflags)
 KBUILD_CFLAGS += $(soc-cflags)
 KBUILD_CXXFLAGS += $(soc-cxxflags)
-KBUILD_AFLAGS += $(soc-aflags)
+KBUILD_AFLAGS += $(soc-aflags)

arch/arc/core/Makefile

@@ -16,5 +16,3 @@ obj-$(CONFIG_IRQ_OFFLOAD) += irq_offload.o
 # Some ARC cores like the EM4 lack the atomic LLOCK/SCOND and
 # can't use these.
 obj-$(CONFIG_ATOMIC_OPERATIONS_CUSTOM) += atomic.o
-
-obj-$(CONFIG_CPU_HAS_MPU) += mpu/

arch/arc/core/atomic.S

@@ -17,7 +17,7 @@
  */
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 
 /* exports */
 

arch/arc/core/cache.c

@@ -18,7 +18,7 @@
 #include <misc/util.h>
 #include <toolchain.h>
 #include <cache.h>
-#include <linker/linker-defs.h>
+#include <linker-defs.h>
 #include <arch/arc/v2/aux_regs.h>
 #include <nano_internal.h>
 #include <misc/__assert.h>

arch/arc/core/cpu_idle.S

@@ -14,15 +14,15 @@
 #include <kernel_structs.h>
 #include <offsets_short.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <arch/cpu.h>
 
 GTEXT(k_cpu_idle)
 GTEXT(k_cpu_atomic_idle)
 GDATA(k_cpu_sleep_mode)
 
-SECTION_VAR(BSS, k_cpu_sleep_mode)
 	.balign 4
+SECTION_VAR(BSS, k_cpu_sleep_mode)
 	.word 0
 
 /*

arch/arc/core/fast_irq.S

@@ -21,14 +21,28 @@
 
 GTEXT(_firq_enter)
 GTEXT(_firq_exit)
+GTEXT(_firq_stack_setup)
+GTEXT(_firq_stack_suspend)
+GTEXT(_firq_stack_resume)
 
-GDATA(exc_nest_count)
-#if CONFIG_RGF_NUM_BANKS == 1
-GDATA(saved_r0)
+#if CONFIG_RGF_NUM_BANKS != 1
+GDATA(_firq_stack)
+GDATA(_saved_firq_stack)
+
+SECTION_VAR(NOINIT, _firq_stack)
+	.space CONFIG_FIRQ_STACK_SIZE
 #else
-GDATA(saved_sp)
+GDATA(saved_r0)
 #endif
 
+.macro _firq_return
+#if CONFIG_RGF_NUM_BANKS == 1
+	b _firq_no_reschedule
+#else
+	rtie
+#endif
+.endm
+
 /**
  *
  * @brief Work to be done before handing control to a FIRQ ISR
@@ -52,6 +66,7 @@ GDATA(saved_sp)
  */
 
 SECTION_FUNC(TEXT, _firq_enter)
+
 /*
  * ATTENTION:
  * If CONFIG_RGF_NUM_BANKS>1, firq uses a 2nd register bank so GPRs do
@@ -59,6 +74,7 @@ SECTION_FUNC(TEXT, _firq_enter)
  * If CONFIG_RGF_NUM_BANKS==1, firq must use the stack to save registers.
  * This has already been done by _isr_wrapper.
  */
+
 #ifdef CONFIG_ARC_STACK_CHECKING
 	/* disable stack checking */
 	lr r2, [_ARC_V2_STATUS32]
@@ -79,41 +95,8 @@ SECTION_FUNC(TEXT, _firq_enter)
 #endif
 #endif
 
-	ld r1, [exc_nest_count]
-	add r0, r1, 1
-	st r0, [exc_nest_count]
-	cmp r1, 0
-
-	bgt.d  firq_nest
-	mov r0, sp
-
-	mov r1, _kernel
-	ld sp, [r1, _kernel_offset_to_irq_stack]
-#if CONFIG_RGF_NUM_BANKS != 1
-	b firq_nest_1
-firq_nest:
-	mov r1, ilink
-	lr r0, [_ARC_V2_STATUS32]
-	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
-	kflag r0
-
-	st sp, [saved_sp]
-
-	lr ilink, [_ARC_V2_STATUS32]
-	or ilink, ilink, _ARC_V2_STATUS32_RB(1)
-	kflag ilink
-	mov r0, sp
-	ld sp, [saved_sp]
-	mov ilink, r1
-firq_nest_1:
-#else
-firq_nest:
-#endif
-	push_s r0
 	j @_isr_demux
 
-
-
 /**
  *
  * @brief Work to be done exiting a FIRQ
@@ -123,8 +106,6 @@ firq_nest:
 
 SECTION_FUNC(TEXT, _firq_exit)
 
-	pop sp
-
 #if CONFIG_RGF_NUM_BANKS != 1
 #ifndef CONFIG_FIRQ_NO_LPCC
 	/* restore lp_count, lp_start, lp_end from r23-r25 */
@@ -133,20 +114,29 @@ SECTION_FUNC(TEXT, _firq_exit)
 	sr r25, [_ARC_V2_LP_END]
 #endif
 #endif
-	/* check if we're a nested interrupt: if so, let the interrupted
-	 * interrupt handle the reschedule */
-	mov	r1, exc_nest_count
-	ld	r0, [r1]
-	sub	r0, r0, 1
-	cmp	r0, 0
-	bne.d	_firq_no_reschedule
-	st	r0, [r1]
 
 #ifdef CONFIG_PREEMPT_ENABLED
-
 	mov_s r1, _kernel
 	ld_s r2, [r1, _kernel_offset_to_current]
 
+#if CONFIG_NUM_IRQ_PRIO_LEVELS > 1
+	/* check if we're a nested interrupt: if so, let the interrupted
+	 * interrupt handle the reschedule */
+
+	lr r3, [_ARC_V2_AUX_IRQ_ACT]
+
+	/* the OS on ARCv2 always runs in kernel mode, so assume bit31 [U] in
+	 * AUX_IRQ_ACT is always 0: if the contents of AUX_IRQ_ACT is not 1, it
+	 * means that another bit is set so an interrupt was interrupted.
+	 */
+
+	breq r3, 1, _firq_check_for_swap
+
+	_firq_return
+#endif
+
+.balign 4
+_firq_check_for_swap:
 	/*
 	 * Non-preemptible thread ? Do not schedule (see explanation of
 	 * preempt field in kernel_struct.h).
@@ -190,6 +180,7 @@ _firq_no_reschedule:
 	sr r0, [_ARC_V2_LP_START]
 	pop_s r0
 	mov lp_count,r0
+	ld r0,[saved_r0]
 #ifdef CONFIG_CODE_DENSITY
 	pop_s r0
 	sr r0, [_ARC_V2_EI_BASE]
@@ -198,7 +189,6 @@ _firq_no_reschedule:
 	pop_s r0
 	sr r0, [_ARC_V2_JLI_BASE]
 #endif
-	ld r0,[saved_r0]
 	add sp,sp,8 /* don't need ilink & status32_po from stack */
 #endif
 	rtie
@@ -257,13 +247,6 @@ _firq_reschedule:
 	 */
 	_load_callee_saved_regs
 
-#ifdef CONFIG_MPU_STACK_GUARD
-	push_s r2
-	mov r0, r2
-	bl configure_mpu_stack_guard
-	pop_s r2
-#endif
-
 	ld_s r3, [r2, _thread_offset_to_relinquish_cause]
 
 	breq r3, _CAUSE_RIRQ, _firq_return_from_rirq
@@ -312,3 +295,84 @@ _firq_return_from_firq:
 	rtie
 
 #endif /* CONFIG_PREEMPT_ENABLED */
+
+/**
+ *
+ * @brief Install the FIRQ stack in register bank 1 if CONFIG_RGF_NUM_BANK!=1
+ *
+ * @return N/A
+ */
+
+SECTION_FUNC(TEXT, _firq_stack_setup)
+
+#if CONFIG_RGF_NUM_BANKS != 1
+	lr r0, [_ARC_V2_STATUS32]
+	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
+	or r0, r0, _ARC_V2_STATUS32_RB(1)
+	kflag r0
+
+	mov sp, _firq_stack
+	add sp, sp, CONFIG_FIRQ_STACK_SIZE
+
+	/*
+	 * We have to reload r0 here, because it is bank1 r0 which contains
+	 * garbage, not bank0 r0 containing the previous value of status32.
+	 */
+	lr r0, [_ARC_V2_STATUS32]
+	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
+	kflag r0
+#endif
+
+	j_s [blink]
+
+/**
+ *
+ * @brief Save the FIRQ context if CONFIG_RGF_NUM_BANK!=1
+ *
+ * @return N/A
+ */
+
+SECTION_FUNC(TEXT, _firq_stack_suspend)
+
+#if CONFIG_RGF_NUM_BANKS != 1
+	/* Switch to bank 1 */
+	lr r0, [_ARC_V2_STATUS32]
+	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
+	or r0, r0, _ARC_V2_STATUS32_RB(1)
+	kflag r0
+
+	st sp, [_saved_firq_stack]
+
+	/* Switch back to bank 0 */
+	lr r0, [_ARC_V2_STATUS32]
+	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
+	kflag r0
+#endif
+
+	j_s [blink]
+
+/**
+ *
+ * @brief Restore the FIRQ context if CONFIG_RGF_NUM_BANK!=1
+ *
+ * @return N/A
+ */
+
+SECTION_FUNC(TEXT, _firq_stack_resume)
+
+#if CONFIG_RGF_NUM_BANKS != 1
+	/* Switch to bank 1 */
+	lr r0, [_ARC_V2_STATUS32]
+	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
+	or r0, r0, _ARC_V2_STATUS32_RB(1)
+	kflag r0
+
+	ld sp, [_saved_firq_stack]
+
+	/* Switch back to bank 0 */
+	lr r0, [_ARC_V2_STATUS32]
+	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
+	kflag r0
+#endif
+
+	j_s [blink]

arch/arc/core/fault.c

@@ -12,7 +12,7 @@
  */
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <inttypes.h>
 
 #include <kernel.h>

arch/arc/core/fault_s.S

@@ -12,7 +12,7 @@
  */
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <arch/cpu.h>
 #include <swap_macros.h>
 
@@ -33,7 +33,18 @@ GTEXT(__ev_div_zero)
 GTEXT(__ev_dc_error)
 GTEXT(__ev_maligned)
 
-GDATA(exc_nest_count)
+	.balign 4
+SECTION_VAR(BSS, saved_stack_pointer)
+	.word 0
+
+#if CONFIG_RGF_NUM_BANKS == 1
+GDATA(_exception_stack)
+SECTION_VAR(NOINIT, _exception_stack)
+	.space 512
+/* note: QUARK_SE_C1000_SS can't afford 512B */
+#else
+GDATA(_firq_stack)
+#endif
 
 /*
  * @brief Fault handler installed in the fault and reserved vectors
@@ -71,6 +82,15 @@ SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_maligned)
 	pop_s r2
 #endif
 
+	st sp, [saved_stack_pointer]
+#if CONFIG_RGF_NUM_BANKS == 1
+	mov_s sp, _exception_stack
+	add sp, sp, 512
+#else
+	mov_s sp, _firq_stack
+	add sp, sp, CONFIG_FIRQ_STACK_SIZE
+#endif
+
 	/* save caller saved registers */
 	_create_irq_stack_frame
 
@@ -79,32 +99,13 @@ SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_maligned)
 	lr r0,[_ARC_V2_ERET]
 	st_s r0, [sp, ___isf_t_pc_OFFSET] /* eret into pc */
 
-
-	ld r1, [exc_nest_count]
-	add r0, r1, 1
-	st r0, [exc_nest_count]
-	cmp r1, 0
-
-	bgt.d  exc_nest_handle
-	mov r0, sp
-
-	mov r1, _kernel
-	ld sp, [r1, _kernel_offset_to_irq_stack]
-exc_nest_handle:
-	push_s r0
-
 	jl _Fault
 
-	pop sp
-
-	mov	r1, exc_nest_count
-	ld	r0, [r1]
-	sub	r0, r0, 1
-	st 	r0, [r1]
-
 	/* if _Fault returns, restore the registers */
 	_pop_irq_stack_frame
 
+	/* now restore the stack */
+	ld sp,[saved_stack_pointer]
 	rtie
 
 #ifdef CONFIG_IRQ_OFFLOAD
@@ -135,41 +136,26 @@ SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_trap)
 	lr r0,[_ARC_V2_ERET]
 	st_s r0, [sp, ___isf_t_pc_OFFSET] /* eret into pc */
 
-	ld r1, [exc_nest_count]
-	add r0, r1, 1
-	st r0, [exc_nest_count]
-	cmp r1, 0
-
-	bgt.d  trap_nest_handle
-	mov r0, sp
-
-	mov r1, _kernel
-	ld sp, [r1, _kernel_offset_to_irq_stack]
-trap_nest_handle:
-	push_s r0
-
 	jl _irq_do_offload
 
-	pop sp
-
+	mov_s r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
 	/* check if we're a nested interrupt: if so, let the
 	 * interrupted interrupt handle the reschedule
 	 */
-	mov	r1, exc_nest_count
-	ld	r0, [r1]
-	sub	r0, r0, 1
-	cmp	r0, 0
-	beq.d	_trap_check_for_swap
-	st 	r0, [r1]
-
+	lr r3, [_ARC_V2_AUX_IRQ_ACT]
+	/* the OS on ARCv2 always runs in kernel mode, so assume bit31 [U] in
+	 * AUX_IRQ_ACT is always 0: if the contents of AUX_IRQ_ACT is 0, it
+	 * means trap was taken from outside an interrupt handler.
+	 * But if it was inside, let that handler do the swap.
+	 */
+	breq r3, 0, _trap_check_for_swap
 _trap_return:
 	_pop_irq_stack_frame
 	rtie
 
 .balign 4
 _trap_check_for_swap:
-	mov_s r1, _kernel
-	ld_s r2, [r1, _kernel_offset_to_current]
 	/*
 	 * Non-preemptible thread ? Do not schedule (see explanation of
 	 * preempt field in kernel_struct.h).

arch/arc/core/irq_manage.c

@@ -21,7 +21,7 @@
 #include <arch/cpu.h>
 #include <misc/__assert.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <sw_isr_table.h>
 #include <irq.h>
 

arch/arc/core/isr_wrapper.S

@@ -15,7 +15,7 @@
 
 #include <offsets_short.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <sw_isr_table.h>
 #include <kernel_structs.h>
 #include <arch/cpu.h>
@@ -23,24 +23,12 @@
 GTEXT(_isr_wrapper)
 GTEXT(_isr_demux)
 
-GDATA(exc_nest_count)
-SECTION_VAR(BSS, exc_nest_count)
-	.balign 4
-	.word 0
-
-
 #if CONFIG_RGF_NUM_BANKS == 1
 GDATA(saved_r0)
 
+	.balign 4
 SECTION_VAR(BSS, saved_r0)
-	.balign 4
-	.word 0
-#else
-GDATA(saved_sp)
-
-SECTION_VAR(BSS, saved_sp)
-	.balign 4
-	.word 0
+        .word 0
 #endif
 
 #if defined(CONFIG_SYS_POWER_MANAGEMENT)
@@ -242,14 +230,6 @@ SECTION_FUNC(TEXT, _isr_wrapper)
 	push_s r0
 	mov r0,ilink
 	push_s r0
-#ifdef CONFIG_CODE_DENSITY
-	lr r0, [_ARC_V2_JLI_BASE]
-	push_s r0
-	lr r0, [_ARC_V2_LDI_BASE]
-	push_s r0
-	lr r0, [_ARC_V2_EI_BASE]
-	push_s r0
-#endif
 	mov r0,lp_count
 	push_s r0
 	lr r0, [_ARC_V2_LP_START]
@@ -345,7 +325,6 @@ _skip_sys_power_save_idle_exit:
 SECTION_FUNC(TEXT, _isr_demux)
 	push_s r3
 
-
 	/* cannot be done before this point because we must be able to run C */
 	/* r0 is available to be stomped here, and exit_tickless_idle uses it */
 	exit_tickless_idle
@@ -353,12 +332,6 @@ SECTION_FUNC(TEXT, _isr_demux)
 	log_sleep_k_event
 
 	lr r0, [_ARC_V2_ICAUSE]
-	/* handle software triggered interrupt */
-	lr	r3, [_ARC_V2_AUX_IRQ_HINT]
-	brne	r3, r0, irq_hint_handled
-	sr	0, [_ARC_V2_AUX_IRQ_HINT]
-irq_hint_handled:
-
 	sub r0, r0, 16
 
 	mov r1, _sw_isr_table

arch/arc/core/mpu/Kconfig

@@ -1,39 +0,0 @@
-# Kconfig - Memory Protection Unit (MPU) configuration options
-
-#
-# Copyright (c) 2017 Synopsys
-#
-# SPDX-License-Identifier: Apache-2.0
-#
-config ARC_MPU_VER
-	int
-	prompt "ARC MPU version"
-	range 2 4
-	default 2
-	help
-	ARC MPU has several versions. For MPU v2, the minimum region is 2048 bytes;
-	For MPU v3, the minimum region is 32 bytes
-
-config ARC_CORE_MPU
-	bool "ARC Core MPU functionalities"
-	depends on CPU_HAS_MPU
-	default n
-	help
-	  ARC core MPU functionalities
-
-config MPU_STACK_GUARD
-	bool "Thread Stack Guards"
-	depends on ARC_CORE_MPU && !ARC_STACK_CHECKING
-	select THREAD_STACK_INFO
-	default n
-	help
-	  Enable thread stack guards via MPU. ARC supports built-in stack protection.
-	  If your core supports that, it is preferred over MPU stack guard
-
-config ARC_MPU
-	bool "ARC MPU Support"
-	depends on CPU_HAS_MPU
-	select ARC_CORE_MPU
-	default n
-	help
-	  Target has ARC MPU (currently only works for EMSK 2.2 ARCEM7D)

arch/arc/core/mpu/Makefile

@@ -1,2 +0,0 @@
-obj-$(CONFIG_ARC_CORE_MPU) += arc_core_mpu.o
-obj-$(CONFIG_ARC_MPU) += arc_mpu.o

arch/arc/core/mpu/arc_core_mpu.c

@@ -1,30 +0,0 @@
-/*
- * Copyright (c) 2017 Synopsys.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <device.h>
-#include <init.h>
-#include <kernel.h>
-#include <soc.h>
-#include <arch/arc/v2/mpu/arc_core_mpu.h>
-
-#if defined(CONFIG_MPU_STACK_GUARD)
-/*
- * @brief Configure MPU stack guard
- *
- * This function configures per thread stack guards reprogramming the MPU.
- * The functionality is meant to be used during context switch.
- *
- * @param thread thread info data structure.
- */
-void configure_mpu_stack_guard(struct k_thread *thread)
-{
-	arc_core_mpu_disable();
-	arc_core_mpu_configure(THREAD_STACK_GUARD_REGION,
-			       thread->stack_info.start - STACK_GUARD_SIZE,
-			       thread->stack_info.size);
-	arc_core_mpu_enable();
-}
-#endif

arch/arc/core/mpu/arc_mpu.c

@@ -1,242 +0,0 @@
-/*
- * Copyright (c) 2017 Synopsys.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <device.h>
-#include <init.h>
-#include <kernel.h>
-#include <soc.h>
-#include <arch/arc/v2/aux_regs.h>
-#include <arch/arc/v2/mpu/arc_mpu.h>
-#include <arch/arc/v2/mpu/arc_core_mpu.h>
-#include <logging/sys_log.h>
-
-
-#define AUX_MPU_RDB_VALID_MASK (0x1)
-#define AUX_MPU_EN_ENABLE   (0x40000000)
-#define AUX_MPU_EN_DISABLE  (0xBFFFFFFF)
-
-#define AUX_MPU_RDP_REGION_SIZE(bits)  \
-			(((bits - 1) & 0x3) | (((bits - 1) & 0x1C) << 7))
-#define AUX_MPU_RDP_ATTR_MASK (0xFFF)
-
-#define _ARC_V2_MPU_EN   (0x409)
-#define _ARC_V2_MPU_RDB0 (0x422)
-#define _ARC_V2_MPU_RDP0 (0x423)
-
-/* For MPU version 2, the minimum protection region size is 2048 bytes */
-/* FOr MPU version 3, the minimum protection region size is 32 bytes */
-#if CONFIG_ARC_MPU_VER == 2
-#define ARC_FEATURE_MPU_ALIGNMENT_BITS 11
-#elif CONFIG_ARC_MPU_VER == 3
-#define ARC_FEATURE_MPU_ALIGNMENT_BITS 5
-#endif
-
-/**
- * @brief Get the number of supported mpu regions
- *
- */
-static inline u8_t _get_num_regions(void)
-{
-	u32_t num = _arc_v2_aux_reg_read(_ARC_V2_MPU_BUILD);
-
-	num = (num & 0xFF00) >> 8;
-
-	return (u8_t)num;
-}
-
-
-/**
- * This internal function is utilized by the MPU driver to parse the intent
- * type (i.e. THREAD_STACK_REGION) and return the correct parameter set.
- */
-static inline u32_t _get_region_attr_by_type(u32_t type, u32_t size)
-{
-	switch (type) {
-	case THREAD_STACK_REGION:
-		return 0;
-	case THREAD_STACK_GUARD_REGION:
-	/* no Read, Write and Execute to guard region */
-		return  AUX_MPU_RDP_REGION_SIZE(
-			ARC_FEATURE_MPU_ALIGNMENT_BITS);
-	default:
-		/* Size 0 region */
-		return 0;
-	}
-}
-
-static inline void _region_init(u32_t index, u32_t region_addr,
-			 u32_t region_attr)
-{
-
-	index = 2 * index;
-
-	_arc_v2_aux_reg_write(_ARC_V2_MPU_RDP0 + index, region_attr);
-	_arc_v2_aux_reg_write(_ARC_V2_MPU_RDB0 + index, region_addr);
-}
-
-
-/* ARC Core MPU Driver API Implementation for ARC MPU */
-
-/**
- * @brief enable the MPU
- */
-void arc_core_mpu_enable(void)
-{
-	/* Enable MPU */
-	_arc_v2_aux_reg_write(_ARC_V2_MPU_EN,
-		_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) | AUX_MPU_EN_ENABLE);
-}
-
-/**
- * @brief disable the MPU
- */
-void arc_core_mpu_disable(void)
-{
-	/* Disable MPU */
-	_arc_v2_aux_reg_write(_ARC_V2_MPU_EN,
-		_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) & AUX_MPU_EN_DISABLE);
-}
-
-
-/**
- * @brief configure the base address and size for an MPU region
- *
- * @param   type    MPU region type
- * @param   base    base address in RAM
- * @param   size    size of the region
- */
-void arc_core_mpu_configure(u8_t type, u32_t base, u32_t size)
-{
-	u32_t region_index;
-	u32_t region_attr;
-
-	SYS_LOG_DBG("Region info: 0x%x 0x%x", base, size);
-	/*
-	 * The new MPU regions are allocated per type before
-	 * the statically configured regions.
-	 *
-	 * For ARC MPU v2, MPU regions can be overlapped, smaller
-	 * region index has higher priority.
-	 */
-
-	region_index = _get_num_regions() - mpu_config.num_regions;
-
-	if (type > region_index) {
-		return;
-	}
-
-	region_index -= type;
-	region_attr = _get_region_attr_by_type(type, size);
-
-	if (region_attr == 0) {
-		return;
-	}
-
-	base |= AUX_MPU_RDB_VALID_MASK;
-
-	_region_init(region_index, base, region_attr);
-}
-
-/**
- * @brief configure the default region
- *
- * @param   region_attr region attribute of default region
- */
-void arc_core_mpu_default(u32_t region_attr)
-{
-	u32_t val =  _arc_v2_aux_reg_read(_ARC_V2_MPU_EN) &
-			(~AUX_MPU_RDP_ATTR_MASK);
-
-	region_attr &= AUX_MPU_RDP_ATTR_MASK;
-
-	_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, region_attr | val);
-}
-
-
-/**
- * @brief configure the mpu region
- *
- * @param   index   MPU region index
- * @param   base    base address
- * @param   region_attr region attribute
- */
-void arc_core_mpu_region(u32_t index, u32_t base, u32_t region_attr)
-{
-	if (index >= _get_num_regions()) {
-		return;
-	}
-
-	base |= AUX_MPU_RDB_VALID_MASK;
-	region_attr &= AUX_MPU_RDP_ATTR_MASK;
-
-	_region_init(index, base, region_attr);
-}
-
-/* ARC MPU Driver Initial Setup */
-
-/*
- * @brief MPU default configuration
- *
- * This function provides the default configuration mechanism for the Memory
- * Protection Unit (MPU).
- */
-static void _arc_mpu_config(void)
-{
-	u32_t r_index;
-	u32_t num_regions;
-	u32_t i;
-
-	num_regions = _get_num_regions();
-
-	/* ARC MPU supports up to 16 Regions */
-	if (mpu_config.num_regions > num_regions) {
-		return;
-	}
-
-	/*
-	 * the MPU regions are filled in the reverse order.
-	 * According to ARCv2 ISA, the mpu region with smaller
-	 * index has higher priority. The static background mpu
-	 * regions in mpu_config will be in the bottom. Then
-	 * the special type regions will be above.
-	 *
-	 */
-	r_index = num_regions - mpu_config.num_regions;
-	/* Disable MPU */
-	arc_core_mpu_disable();
-
-	/* clear the regions reserved for special type */
-	for (i = 0; i < r_index; i++) {
-		_region_init(i, 0, 0);
-	}
-
-	/* configure the static regions */
-	for (r_index = 0; i < num_regions; i++) {
-		_region_init(i,
-			mpu_config.mpu_regions[r_index].base
-			| AUX_MPU_RDB_VALID_MASK,
-			mpu_config.mpu_regions[r_index].attr);
-		r_index++;
-	}
-
-	/* default region: no read, write and execute */
-	arc_core_mpu_default(0);
-
-	/* Enable MPU */
-	arc_core_mpu_enable();
-}
-
-static int arc_mpu_init(struct device *arg)
-{
-	ARG_UNUSED(arg);
-
-	_arc_mpu_config();
-
-	return 0;
-}
-
-SYS_INIT(arc_mpu_init, PRE_KERNEL_1,
-	 CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);

arch/arc/core/prep_c.c

@@ -18,7 +18,7 @@
 
 #include <zephyr/types.h>
 #include <toolchain.h>
-#include <linker/linker-defs.h>
+#include <linker-defs.h>
 #include <arch/arc/v2/aux_regs.h>
 #include <kernel_structs.h>
 #include <nano_internal.h>

arch/arc/core/regular_irq.S

@@ -23,7 +23,6 @@
 GTEXT(_rirq_enter)
 GTEXT(_rirq_exit)
 GTEXT(_rirq_common_interrupt_swap)
-GDATA(exc_nest_count)
 
 #if 0 /* TODO: when FIRQ is not present, all would be regular */
 #define NUM_REGULAR_IRQ_PRIO_LEVELS CONFIG_NUM_IRQ_PRIO_LEVELS
@@ -35,6 +34,14 @@ GDATA(exc_nest_count)
  * TODO: Revist this if FIRQ becomes configurable.
  */
 
+#if NUM_REGULAR_IRQ_PRIO_LEVELS > 1
+#error "nested regular interrupts are not supported."
+/*
+ * Nesting of Regularing interrupts is not yet supported.
+ * Set CONFIG_NUM_IRQ_PRIO_LEVELS to 2 even if SOC supports more.
+ */
+#endif
+
 
 /**
  *
@@ -51,28 +58,20 @@ GDATA(exc_nest_count)
 
 SECTION_FUNC(TEXT, _rirq_enter)
 
-
+	mov r1, _kernel
 #ifdef CONFIG_ARC_STACK_CHECKING
 	/* disable stack checking */
 	lr r2, [_ARC_V2_STATUS32]
 	bclr r2, r2, _ARC_V2_STATUS32_SC_BIT
 	kflag r2
 #endif
-	clri
-	ld r1, [exc_nest_count]
-	add r0, r1, 1
-	st r0, [exc_nest_count]
-	cmp r1, 0
-
-	bgt.d  rirq_nest
-	mov r0, sp
-
-	mov r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
+#if NUM_REGULAR_IRQ_PRIO_LEVELS == 1
+	st sp, [r2, _thread_offset_to_sp]
 	ld sp, [r1, _kernel_offset_to_irq_stack]
-rirq_nest:
-	push_s r0
-
-	seti
+#else
+#error regular irq nesting is not implemented
+#endif
 	j _isr_demux
 
 
@@ -84,16 +83,6 @@ rirq_nest:
  */
 
 SECTION_FUNC(TEXT, _rirq_exit)
-	clri
-
-	pop sp
-
-	mov	r1, exc_nest_count
-	ld	r0, [r1]
-	sub	r0, r0, 1
-	cmp	r0, 0
-	bne.d	_rirq_return_from_rirq
-	st	r0, [r1]
 
 #ifdef CONFIG_PREEMPT_ENABLED
 
@@ -105,6 +94,26 @@ SECTION_FUNC(TEXT, _rirq_exit)
 	 * point on until return from interrupt.
 	 */
 
+	clri
+
+#if NUM_REGULAR_IRQ_PRIO_LEVELS > 1
+	/* check if we're a nested interrupt: if so, let the interrupted interrupt
+	 * handle the reschedule */
+
+	lr r3, [_ARC_V2_AUX_IRQ_ACT]
+	ffs r0, r3
+
+	asl r0, 1, r0
+
+	/* the OS on ARCv2 always runs in kernel mode, so assume bit31 [U] in
+	 * AUX_IRQ_ACT is always 0: if the contents of AUX_IRQ_ACT is greater
+	 * than FFS(AUX_IRQ_ACT), it means that another bit is set so an
+	 * interrupt was interrupted.
+	 */
+
+	cmp r0, r3
+	brgt _rirq_return_from_rirq
+#endif
 
 	/*
 	 * Non-preemptible thread ? Do not schedule (see explanation of
@@ -125,6 +134,8 @@ SECTION_FUNC(TEXT, _rirq_exit)
 	 * b) needs to load it to restore the interrupted context.
 	 */
 
+	ld sp, [r2, _thread_offset_to_sp]
+
 	/* check if the current thread needs to be rescheduled */
 	ld_s r0, [r1, _kernel_offset_to_ready_q_cache]
 	cmp_s r0, r2
@@ -161,13 +172,6 @@ _rirq_common_interrupt_swap:
 	 */
 	_load_callee_saved_regs
 
-#ifdef CONFIG_MPU_STACK_GUARD
-	push_s r2
-	mov r0, r2
-	bl configure_mpu_stack_guard
-	pop_s r2
-#endif
-
 	ld_s r3, [r2, _thread_offset_to_relinquish_cause]
 
 	breq r3, _CAUSE_RIRQ, _rirq_return_from_rirq
@@ -214,6 +218,10 @@ _rirq_return_from_coop:
 
 	/* fall through to rtie instruction */
 
+.balign 4
+_rirq_return_from_firq:
+_rirq_return_from_rirq:
+
 	/* rtie will pop the rest from the stack */
 
 	/* fall through to rtie instruction */
@@ -221,8 +229,6 @@ _rirq_return_from_coop:
 #endif /* CONFIG_PREEMPT_ENABLED */
 
 .balign 4
-_rirq_return_from_firq:
-_rirq_return_from_rirq:
 _rirq_no_reschedule:
 
 	rtie

arch/arc/core/reset.S

@@ -13,17 +13,30 @@
 
 // #include <board.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <arch/cpu.h>
 
 GDATA(_interrupt_stack)
+GDATA(_firq_stack)
 GDATA(_main_stack)
 
 /* use one of the available interrupt stacks during init */
 
+/* FIRQ only ? */
+#if CONFIG_NUM_IRQ_PRIO_LEVELS == 1
 
-#define INIT_STACK _interrupt_stack
-#define INIT_STACK_SIZE CONFIG_ISR_STACK_SIZE
+	/* FIRQ, but uses _interrupt_stack ? */
+	#if CONFIG_RGF_NUM_BANKS == 1
+		#define INIT_STACK _interrupt_stack
+		#define INIT_STACK_SIZE CONFIG_ISR_STACK_SIZE
+	#else
+		#define INIT_STACK _firq_stack
+		#define INIT_STACK_SIZE CONFIG_FIRQ_STACK_SIZE
+	#endif
+#else
+	#define INIT_STACK _interrupt_stack
+	#define INIT_STACK_SIZE CONFIG_ISR_STACK_SIZE
+#endif
 
 GTEXT(__reset)
 GTEXT(__start)
@@ -93,6 +106,13 @@ done_cache_invalidate:
 	mov_s r2, CONFIG_ISR_STACK_SIZE
 	jl memset
 
+#if CONFIG_RGF_NUM_BANKS != 1
+	mov_s r0, _firq_stack
+	mov_s r1, 0xaa
+	mov_s r2, CONFIG_FIRQ_STACK_SIZE
+	jl memset
+#endif
+
 #endif /* CONFIG_INIT_STACKS */
 
 	mov sp, INIT_STACK

arch/arc/core/swap.S

@@ -110,13 +110,6 @@ SECTION_FUNC(TEXT, __swap)
 
 	_load_callee_saved_regs
 
-#ifdef CONFIG_MPU_STACK_GUARD
-	push_s r2
-	mov r0, r2
-	bl configure_mpu_stack_guard
-	pop_s r2
-#endif
-
 	ld_s r3, [r2, _thread_offset_to_relinquish_cause]
 
 	breq r3, _CAUSE_RIRQ, _swap_return_from_rirq

arch/arc/core/sys_fatal_error_handler.c

@@ -13,7 +13,7 @@
 
 #include <kernel.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <kernel_structs.h>
 #include <misc/printk.h>
 

arch/arc/core/thread.c

@@ -54,12 +54,11 @@ struct init_stack_frame {
  *
  * @return N/A
  */
-void _new_thread(struct k_thread *thread, k_thread_stack_t stack,
-		 size_t stackSize, _thread_entry_t pEntry,
+void _new_thread(struct k_thread *thread, char *pStackMem, size_t stackSize,
+		 _thread_entry_t pEntry,
 		 void *parameter1, void *parameter2, void *parameter3,
 		 int priority, unsigned int options)
 {
-	char *pStackMem = K_THREAD_STACK_BUFFER(stack);
 	_ASSERT_VALID_PRIO(priority, pEntry);
 
 	char *stackEnd = pStackMem + stackSize;

arch/arc/core/thread_entry_wrapper.S

@@ -12,7 +12,7 @@
  */
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 
 GTEXT(_thread_entry_wrapper)
 GTEXT(_thread_entry)

arch/arc/include/kernel_arch_data.h

@@ -25,7 +25,7 @@ extern "C" {
 #endif
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <arch/cpu.h>
 #include <vector_table.h>
 #include <kernel_arch_thread.h>

arch/arc/include/v2/irq.h

@@ -32,7 +32,8 @@ extern "C" {
 
 #ifndef _ASMLANGUAGE
 
-extern K_THREAD_STACK_DEFINE(_interrupt_stack, CONFIG_ISR_STACK_SIZE);
+extern void _firq_stack_setup(void);
+extern char _interrupt_stack[];
 
 /*
  * _irq_setup
@@ -53,8 +54,8 @@ static ALWAYS_INLINE void _irq_setup(void)
 	k_cpu_sleep_mode = _ARC_V2_WAKE_IRQ_LEVEL;
 	_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_CTRL, aux_irq_ctrl_value);
 
-	_kernel.irq_stack =
-		K_THREAD_STACK_BUFFER(_interrupt_stack) + CONFIG_ISR_STACK_SIZE;
+	_kernel.irq_stack = _interrupt_stack + CONFIG_ISR_STACK_SIZE;
+	_firq_stack_setup();
 }
 
 #endif /* _ASMLANGUAGE */

arch/arc/include/vector_table.h

@@ -31,7 +31,7 @@ extern "C" {
 
 #include <board.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 
 GTEXT(__start)
 GTEXT(_VectorTable)

arch/arc/soc/em11d/Kconfig.defconfig

@@ -13,12 +13,13 @@ config SOC
 config NUM_IRQ_PRIO_LEVELS
 	# This processor supports 4 priority levels:
 	# 0 for Fast Interrupts (FIRQs) and 1-3 for Regular Interrupts (IRQs).
-	default 4
+	# TODO: But regular irq nesting is not implemented --
+	# so this must be 2 for now.
+	default 2
 
 config NUM_IRQS
 	# must be > the highest interrupt number used
-	default 38 if BOARD_EM_STARTERKIT_R23
-	default 36 if BOARD_EM_STARTERKIT_R22
+	default 38
 
 config RGF_NUM_BANKS
 	default 2
@@ -60,4 +61,192 @@ config CACHE_FLUSHING
 config FP_FPU_DA
 	def_bool y
 
+if GPIO
+
+config GPIO_DW
+	def_bool y
+
+if GPIO_DW
+
+config GPIO_DW_0
+	def_bool y
+
+if GPIO_DW_0
+
+config GPIO_DW_0_NAME
+	default "GPIO_PORTA"
+
+config GPIO_DW_0_IRQ_PRI
+	default 1
+
+endif # GPIO_DW_0
+
+config GPIO_DW_1
+	def_bool y
+
+if GPIO_DW_1
+
+config GPIO_DW_1_NAME
+	default "GPIO_PORTB"
+
+config GPIO_DW_1_IRQ_PRI
+	default 1
+
+endif # GPIO_DW_1
+
+config GPIO_DW_2
+	def_bool y
+
+if GPIO_DW_2
+
+config GPIO_DW_2_IRQ_PRI
+	default 1
+
+config GPIO_DW_2_NAME
+	default "GPIO_PORTC"
+
+endif # GPIO_DW_2
+
+config GPIO_DW_3
+	def_bool y
+
+if GPIO_DW_3
+
+config GPIO_DW_3_IRQ_PRI
+	default 1
+
+config GPIO_DW_3_NAME
+	default "GPIO_PORTD"
+
+endif # GPIO_DW_3
+
+endif # GPIO_DW
+
+endif # GPIO
+
+if I2C
+
+config I2C_DW
+	def_bool y
+
+if I2C_DW
+
+config I2C_DW_CLOCK_SPEED
+	default 100
+
+config I2C_0
+	def_bool y
+
+if I2C_0
+
+config I2C_0_NAME
+	default "I2C_0"
+config I2C_0_DEFAULT_CFG
+	default 0x3
+config I2C_0_IRQ_PRI
+	default 1
+
+endif # I2C_0
+
+config I2C_1
+	def_bool y
+
+if I2C_1
+
+config I2C_1_NAME
+	default "I2C_1"
+config I2C_1_DEFAULT_CFG
+	default 0x3
+config I2C_1_IRQ_PRI
+	default 1
+
+endif # I2C_1
+
+endif # I2C_DW
+
+endif # I2C
+
+if UART_NS16550
+
+config UART_NS16550_PORT_0
+	def_bool n
+
+if UART_NS16550_PORT_0
+
+config UART_NS16550_PORT_0_NAME
+	default "UART_0"
+config UART_NS16550_PORT_0_IRQ_PRI
+	default 1
+config UART_NS16550_PORT_0_BAUD_RATE
+	default 115200
+config UART_NS16550_PORT_0_OPTIONS
+	default 0
+
+endif # UART_NS16550_PORT_0
+
+config UART_NS16550_PORT_1
+	def_bool y
+
+if UART_NS16550_PORT_1
+
+config UART_NS16550_PORT_1_NAME
+	default "UART_1"
+config UART_NS16550_PORT_1_IRQ_PRI
+	default 1
+config UART_NS16550_PORT_1_BAUD_RATE
+	default 115200
+config UART_NS16550_PORT_1_OPTIONS
+	default 0
+
+endif # UART_NS16550_PORT_1
+
+endif # UART_NS16550
+
+if UART_CONSOLE
+
+config UART_CONSOLE_ON_DEV_NAME
+	default "UART_1"
+
+endif
+
+if SPI
+
+config SPI_DW
+	def_bool y
+
+if SPI_DW
+
+config SPI_DW_CLOCK_GATE
+	def_bool n
+
+config SPI_DW_FIFO_DEPTH
+	default 32
+
+config SPI_DW_ARC_AUX_REGS
+	def_bool n
+
+config SPI_0
+	def_bool y
+
+if SPI_0
+
+config SPI_0_IRQ_PRI
+	default 0
+
+endif # SPI_0
+
+config SPI_1
+	def_bool y
+
+if SPI_1
+
+config SPI_1_IRQ_PRI
+	default 0
+
+endif # SPI_1
+
+endif # SPI_DW
+
+endif # SPI
+
 endif #SOC_EM11D

arch/arc/soc/em11d/soc.h

@@ -11,22 +11,23 @@
  * aspects for the target.
  */
 
-#ifndef _SOC__H_
-#define _SOC__H_
+#ifndef _BOARD__H_
+#define _BOARD__H_
 
 #include <misc/util.h>
 
 /* default system clock */
-/* On the EM Starter Kit board, the peripheral bus clock frequency is 50Mhz */
+
 #define SYSCLK_DEFAULT_IOSC_HZ			MHZ(50)
+/* On the EM Starter Kit board, the peripheral bus clock frequency is 50Mhz */
 
 
-/* ARC EM Core IRQs */
+/* IRQs */
+
 #define IRQ_TIMER0				16
 #define IRQ_TIMER1				17
-
-#define IRQ_CORE_DMA_COMPLETE			20
-#define IRQ_CORE_DMA_ERROR			21
+#define IRQ_CORE_DMA_COMPLETE			22
+#define IRQ_CORE_DMA_ERROR			23
 
 #ifndef _ASMLANGUAGE
 
@@ -46,38 +47,55 @@
 #define INT_ENABLE_ARC_BIT_POS			(8)
 
 /* I2C */
+
 /* I2C_0 is on Pmod2 connector */
 #define I2C_DW_0_BASE_ADDR			0xF0004000
+#define I2C_DW_0_IRQ				25
+
 
 /* I2C_1 is on Pmod4 connector */
 #define I2C_DW_1_BASE_ADDR			0xF0005000
+#define I2C_DW_1_IRQ				26
 
 #define I2C_DW_IRQ_FLAGS			0
 
 /* GPIO */
 #define GPIO_DW_0_BASE_ADDR			0xF0002000 /* GPIO 0 : PORTA */
+#define GPIO_DW_0_IRQ				24
 #define GPIO_DW_0_BITS				32
 #define GPIO_DW_PORT_0_INT_MASK			0 /* n/a */
 #define GPIO_DW_0_IRQ_FLAGS			0 /* Defaults */
 
 #define GPIO_DW_1_BASE_ADDR			0xF000200C /* GPIO 1 : PORTB */
+#define GPIO_DW_1_IRQ				0          /* can't interrupt */
 #define GPIO_DW_1_BITS				9          /* 9 LEDs on board */
 #define GPIO_DW_PORT_1_INT_MASK			0 /* n/a */
 
 #define GPIO_DW_2_BASE_ADDR			0xF0002018 /* GPIO 2 : PORTC */
+#define GPIO_DW_2_IRQ				0          /* can't interrupt */
 #define GPIO_DW_2_BITS				32
 #define GPIO_DW_PORT_2_INT_MASK			0 /* n/a */
 
 #define GPIO_DW_3_BASE_ADDR			0xF0002024 /* GPIO 3 : PORTD */
+#define GPIO_DW_3_IRQ				0          /* can't interrupt */
 #define GPIO_DW_3_BITS				12
 #define GPIO_DW_PORT_3_INT_MASK			0 /* n/a */
 
+/* undef GPIO_DW_IO_ACCESS .. because memory mapped */
+/* undef CONFIG_GPIO_DW_0_IRQ_SHARED */
+/* undef CONFIG_GPIO_DW_CLOCK_GATE */
+/* undef CONFIG_SOC_QUARK_SE_C1000_SS */
+
 /* SPI */
+
 #define SPI_DW_SPI_CLOCK			SYSCLK_DEFAULT_IOSC_HZ
 
 #define SPI_DW_PORT_0_REGS			0xF0006000
 #define SPI_DW_PORT_1_REGS			0xF0007000
 
+#define SPI_DW_PORT_0_IRQ			27
+#define SPI_DW_PORT_1_IRQ			28
+
 #define SPI_DW_IRQ_FLAGS			0
 
 /*
@@ -92,46 +110,24 @@
  */
 
 /*
- * UARTs: UART0 & UART1 & UART2
+ * UART
+     UART0 vector 29 0xF0008000
+     UART1 vector 30 0xF0009000
+     UART2 vector 31 0xF000A000
  */
-#define UART_NS16550_PORT_0_BASE_ADDR		0xF0008000
-#define UART_NS16550_PORT_0_CLK_FREQ		SYSCLK_DEFAULT_IOSC_HZ
+#define UART_NS16550_PORT_0_BASE_ADDR			0xF0008000
+#define UART_NS16550_PORT_0_IRQ				29
+#define UART_NS16550_PORT_0_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
 
-#define UART_NS16550_PORT_1_BASE_ADDR		0xF0009000
-#define UART_NS16550_PORT_1_CLK_FREQ		SYSCLK_DEFAULT_IOSC_HZ
+#define UART_NS16550_PORT_1_BASE_ADDR			0xF0009000
+#define UART_NS16550_PORT_1_IRQ				30
+#define UART_NS16550_PORT_1_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
 
-#define UART_NS16550_PORT_2_BASE_ADDR		0xF000A000
-#define UART_NS16550_PORT_2_CLK_FREQ		SYSCLK_DEFAULT_IOSC_HZ
-
-#define UART_IRQ_FLAGS				0 /* Default */
-
-/**
- * Peripheral Interrupt Connection Configurations
- */
-#ifdef CONFIG_BOARD_EM_STARTERKIT_R23
-#define GPIO_DW_0_IRQ				24
-#define I2C_DW_0_IRQ				25
-#define I2C_DW_1_IRQ				26
-#define SPI_DW_PORT_0_IRQ			27
-#define SPI_DW_PORT_1_IRQ			28
-#define UART_NS16550_PORT_0_IRQ			29
-#define UART_NS16550_PORT_1_IRQ			30
-#define UART_NS16550_PORT_2_IRQ			31
-#else /* CONFIG_BOARD_EM_STARTERKIT_R23 */
-#define GPIO_DW_0_IRQ				22
-#define I2C_DW_0_IRQ				23
-#define I2C_DW_1_IRQ				24
-#define SPI_DW_PORT_0_IRQ			25
-#define SPI_DW_PORT_1_IRQ			26
-#define UART_NS16550_PORT_0_IRQ			27
-#define UART_NS16550_PORT_1_IRQ			28
-#define UART_NS16550_PORT_2_IRQ			29
-#endif /* !CONFIG_BOARD_EM_STARTERKIT_R23 */
-
-#define GPIO_DW_1_IRQ				0	/* can't interrupt */
-#define GPIO_DW_2_IRQ				0	/* can't interrupt */
-#define GPIO_DW_3_IRQ				0	/* can't interrupt */
+#define UART_NS16550_PORT_2_BASE_ADDR			0xF000A000
+#define UART_NS16550_PORT_2_IRQ				31
+#define UART_NS16550_PORT_2_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
 
+#define UART_IRQ_FLAGS					0 /* Default */
 #endif /* !_ASMLANGUAGE */
 
-#endif /* _SOC__H_ */
+#endif /* _BOARD__H_ */

arch/arc/soc/em7d/Kbuild

@@ -5,6 +5,4 @@ ccflags-y +=-I$(srctree)/drivers
 
 asflags-y := ${ccflags-y}
 
-obj-y += soc.o soc_config.o
-
-obj-$(CONFIG_ARC_MPU_ENABLE) += arc_mpu_regions.o
+obj-y = soc.o soc_config.o

arch/arc/soc/em7d/Kconfig.defconfig

@@ -13,19 +13,19 @@ config SOC
 config NUM_IRQ_PRIO_LEVELS
 	# This processor supports 4 priority levels:
 	# 0 for Fast Interrupts (FIRQs) and 1-3 for Regular Interrupts (IRQs).
-	default 4
+	# TODO: But regular irq nesting is not implemented --
+	# so this must be 2 for now.
+	default 2
 
 config NUM_IRQS
 	# must be > the highest interrupt number used
-	default 38 if BOARD_EM_STARTERKIT_R23
-	default 36 if BOARD_EM_STARTERKIT_R22
+	default 38
 
 config RGF_NUM_BANKS
 	default 1
 
 config SYS_CLOCK_HW_CYCLES_PER_SEC
-	default 25000000 if BOARD_EM_STARTERKIT_R23
-	default 30000000 if BOARD_EM_STARTERKIT_R22
+	default 25000000
 
 config HARVARD
 	def_bool n
@@ -58,4 +58,192 @@ config DCCM_SIZE
 config CACHE_FLUSHING
 	def_bool y
 
+if GPIO
+
+config GPIO_DW
+	def_bool y
+
+if GPIO_DW
+
+config GPIO_DW_0
+	def_bool y
+
+if GPIO_DW_0
+
+config GPIO_DW_0_NAME
+	default "GPIO_PORTA"
+
+config GPIO_DW_0_IRQ_PRI
+	default 1
+
+endif # GPIO_DW_0
+
+config GPIO_DW_1
+	def_bool y
+
+if GPIO_DW_1
+
+config GPIO_DW_1_NAME
+	default "GPIO_PORTB"
+
+config GPIO_DW_1_IRQ_PRI
+	default 1
+
+endif # GPIO_DW_1
+
+config GPIO_DW_2
+	def_bool y
+
+if GPIO_DW_2
+
+config GPIO_DW_2_IRQ_PRI
+	default 1
+
+config GPIO_DW_2_NAME
+	default "GPIO_PORTC"
+
+endif # GPIO_DW_2
+
+config GPIO_DW_3
+	def_bool y
+
+if GPIO_DW_3
+
+config GPIO_DW_3_IRQ_PRI
+	default 1
+
+config GPIO_DW_3_NAME
+	default "GPIO_PORTD"
+
+endif # GPIO_DW_3
+
+endif # GPIO_DW
+
+endif # GPIO
+
+if I2C
+
+config I2C_DW
+	def_bool y
+
+if I2C_DW
+
+config I2C_DW_CLOCK_SPEED
+	default 100
+
+config I2C_0
+	def_bool y
+
+if I2C_0
+
+config I2C_0_NAME
+	default "I2C_0"
+config I2C_0_DEFAULT_CFG
+	default 0x3
+config I2C_0_IRQ_PRI
+	default 1
+
+endif # I2C_0
+
+config I2C_1
+	def_bool y
+
+if I2C_1
+
+config I2C_1_NAME
+	default "I2C_1"
+config I2C_1_DEFAULT_CFG
+	default 0x3
+config I2C_1_IRQ_PRI
+	default 1
+
+endif # I2C_1
+
+endif # I2C_DW
+
+endif # I2C
+
+if UART_NS16550
+
+config UART_NS16550_PORT_0
+	def_bool n
+
+if UART_NS16550_PORT_0
+
+config UART_NS16550_PORT_0_NAME
+	default "UART_0"
+config UART_NS16550_PORT_0_IRQ_PRI
+	default 1
+config UART_NS16550_PORT_0_BAUD_RATE
+	default 115200
+config UART_NS16550_PORT_0_OPTIONS
+	default 0
+
+endif # UART_NS16550_PORT_0
+
+config UART_NS16550_PORT_1
+	def_bool y
+
+if UART_NS16550_PORT_1
+
+config UART_NS16550_PORT_1_NAME
+	default "UART_1"
+config UART_NS16550_PORT_1_IRQ_PRI
+	default 1
+config UART_NS16550_PORT_1_BAUD_RATE
+	default 115200
+config UART_NS16550_PORT_1_OPTIONS
+	default 0
+
+endif # UART_NS16550_PORT_1
+
+endif # UART_NS16550
+
+if UART_CONSOLE
+
+config UART_CONSOLE_ON_DEV_NAME
+	default "UART_1"
+
+endif
+
+if SPI
+
+config SPI_DW
+	def_bool y
+
+if SPI_DW
+
+config SPI_DW_CLOCK_GATE
+	def_bool n
+
+config SPI_DW_FIFO_DEPTH
+	default 32
+
+config SPI_DW_ARC_AUX_REGS
+	def_bool n
+
+config SPI_0
+	def_bool y
+
+if SPI_0
+
+config SPI_0_IRQ_PRI
+	default 0
+
+endif # SPI_0
+
+config SPI_1
+	def_bool y
+
+if SPI_1
+
+config SPI_1_IRQ_PRI
+	default 0
+
+endif # SPI_1
+
+endif # SPI_DW
+
+endif # SPI
+
 endif #SOC_EM7D

arch/arc/soc/em7d/Kconfig.soc

@@ -1,4 +1,3 @@
 
 config SOC_EM7D
 	bool "Synopsys ARC EM7D"
-	select CPU_HAS_MPU

arch/arc/soc/em7d/Makefile

@@ -1,7 +1,7 @@
 #  -mcpu=em4_dmips is added to KBUILD_CFLAGS to make cc-option check the options correctly
 KBUILD_CFLAGS += -mcpu=em4_dmips
 
-soc-cflags += $(call cc-option,-mcpu=em4_dmips -mno-sdata) \
+soc-cflags = $(call cc-option,-mcpu=em4_dmips -mno-sdata) \
 		$(call cc-option,-mdiv-rem -mswap -mnorm) \
 		$(call cc-option,-mmpy-option=6 -mbarrel-shifter) \
 		$(call cc-option,--param l1-cache-size=16384) \
@@ -10,7 +10,3 @@ soc-cflags += $(call cc-option,-mcpu=em4_dmips -mno-sdata) \
 ifeq ($(CONFIG_CODE_DENSITY), y)
 soc-cflags += $(call cc-option,-mcode-density)
 endif
-
-ifeq ($(CONFIG_BOARD_EM_STARTERKIT_R23), y)
-$(error em7d from em starterkit 2.3 is not supported)
-endif

arch/arc/soc/em7d/arc_mpu_regions.c

@@ -1,38 +0,0 @@
-/*
- * Copyright (c) 2017 Synopsys
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
- #include <soc.h>
- #include <arch/arc/v2/mpu/arc_mpu.h>
-
-static struct arc_mpu_region mpu_regions[] = {
-#if CONFIG_ICCM_SIZE > 0
-	/* Region ICCM */
-	MPU_REGION_ENTRY("ICCM",
-			 CONFIG_ICCM_BASE_ADDRESS,
-			 REGION_FLASH_ATTR(REGION_256K)),
-#endif
-#if CONFIG_DCCM_SIZE > 0
-	/* Region DCCM */
-	MPU_REGION_ENTRY("DCCM",
-			 CONFIG_DCCM_BASE_ADDRESS,
-			 REGION_RAM_ATTR(REGION_128K)),
-#endif
-#if CONFIG_SRAM_SIZE > 0
-	/* Region DDR RAM */
-	MPU_REGION_ENTRY("DDR RAM",
-			CONFIG_SRAM_BASE_ADDRESS,
-			REGION_ALL_ATTR(REGION_128M)),
-#endif
-	/* Region Peripheral */
-	MPU_REGION_ENTRY("PERIPHERAL",
-			 0xF0000000,
-			 REGION_IO_ATTR(REGION_64K)),
-};
-
-struct arc_mpu_config mpu_config = {
-	.num_regions = ARRAY_SIZE(mpu_regions),
-	.mpu_regions = mpu_regions,
-};

arch/arc/soc/em7d/soc.h

@@ -11,31 +11,24 @@
  * aspects for the target.
  */
 
-#ifndef _SOC__H_
-#define _SOC__H_
+#ifndef _BOARD__H_
+#define _BOARD__H_
 
 #include <misc/util.h>
 
 /* default system clock */
-/* On the EM Starter Kit board, the peripheral bus clock frequency is 50Mhz */
+
 #define SYSCLK_DEFAULT_IOSC_HZ			MHZ(50)
+/* On the EM Starter Kit board, the peripheral bus clock frequency is 50Mhz */
 
 
-/* ARC EM Core IRQs */
+/* IRQs */
+
 #define IRQ_TIMER0				16
 #define IRQ_TIMER1				17
-
-#if defined(CONFIG_BOARD_EM_STARTERKIT_R23) && defined(CONFIG_SOC_EM7D)
 #define IRQ_SEC_TIMER0				20
-#endif /* CONFIG_BOARD_EM_STARTERKIT_R23 && CONFIG_SOC_EM7D */
-
-#if defined(CONFIG_BOARD_EM_STARTERKIT_R23) && defined(CONFIG_SOC_EM7D)
 #define IRQ_CORE_DMA_COMPLETE			22
 #define IRQ_CORE_DMA_ERROR			23
-#else /* CONFIG_BOARD_EM_STARTERKIT_R23 && CONFIG_SOC_EM7D */
-#define IRQ_CORE_DMA_COMPLETE			20
-#define IRQ_CORE_DMA_ERROR			21
-#endif /* !(CONFIG_BOARD_EM_STARTERKIT_R23 && CONFIG_SOC_EM7D) */
 
 #ifndef _ASMLANGUAGE
 
@@ -55,38 +48,55 @@
 #define INT_ENABLE_ARC_BIT_POS			(8)
 
 /* I2C */
+
 /* I2C_0 is on Pmod2 connector */
 #define I2C_DW_0_BASE_ADDR			0xF0004000
+#define I2C_DW_0_IRQ				25
+
 
 /* I2C_1 is on Pmod4 connector */
 #define I2C_DW_1_BASE_ADDR			0xF0005000
+#define I2C_DW_1_IRQ				26
 
 #define I2C_DW_IRQ_FLAGS			0
 
 /* GPIO */
 #define GPIO_DW_0_BASE_ADDR			0xF0002000 /* GPIO 0 : PORTA */
+#define GPIO_DW_0_IRQ				24
 #define GPIO_DW_0_BITS				32
 #define GPIO_DW_PORT_0_INT_MASK			0 /* n/a */
 #define GPIO_DW_0_IRQ_FLAGS			0 /* Defaults */
 
 #define GPIO_DW_1_BASE_ADDR			0xF000200C /* GPIO 1 : PORTB */
+#define GPIO_DW_1_IRQ				0          /* can't interrupt */
 #define GPIO_DW_1_BITS				9          /* 9 LEDs on board */
 #define GPIO_DW_PORT_1_INT_MASK			0 /* n/a */
 
 #define GPIO_DW_2_BASE_ADDR			0xF0002018 /* GPIO 2 : PORTC */
+#define GPIO_DW_2_IRQ				0          /* can't interrupt */
 #define GPIO_DW_2_BITS				32
 #define GPIO_DW_PORT_2_INT_MASK			0 /* n/a */
 
 #define GPIO_DW_3_BASE_ADDR			0xF0002024 /* GPIO 3 : PORTD */
+#define GPIO_DW_3_IRQ				0          /* can't interrupt */
 #define GPIO_DW_3_BITS				12
 #define GPIO_DW_PORT_3_INT_MASK			0 /* n/a */
 
+/* undef GPIO_DW_IO_ACCESS .. because memory mapped */
+/* undef CONFIG_GPIO_DW_0_IRQ_SHARED */
+/* undef CONFIG_GPIO_DW_CLOCK_GATE */
+/* undef CONFIG_SOC_QUARK_SE_C1000_SS */
+
 /* SPI */
+
 #define SPI_DW_SPI_CLOCK			SYSCLK_DEFAULT_IOSC_HZ
 
 #define SPI_DW_PORT_0_REGS			0xF0006000
 #define SPI_DW_PORT_1_REGS			0xF0007000
 
+#define SPI_DW_PORT_0_IRQ			27
+#define SPI_DW_PORT_1_IRQ			28
+
 #define SPI_DW_IRQ_FLAGS			0
 
 /*
@@ -101,46 +111,24 @@
  */
 
 /*
- * UARTs: UART0 & UART1 & UART2
+ * UART
+     UART0 vector 29 0xF0008000
+     UART1 vector 30 0xF0009000
+     UART2 vector 31 0xF000A000
  */
-#define UART_NS16550_PORT_0_BASE_ADDR		0xF0008000
-#define UART_NS16550_PORT_0_CLK_FREQ		SYSCLK_DEFAULT_IOSC_HZ
+#define UART_NS16550_PORT_0_BASE_ADDR			0xF0008000
+#define UART_NS16550_PORT_0_IRQ				29
+#define UART_NS16550_PORT_0_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
 
-#define UART_NS16550_PORT_1_BASE_ADDR		0xF0009000
-#define UART_NS16550_PORT_1_CLK_FREQ		SYSCLK_DEFAULT_IOSC_HZ
+#define UART_NS16550_PORT_1_BASE_ADDR			0xF0009000
+#define UART_NS16550_PORT_1_IRQ				30
+#define UART_NS16550_PORT_1_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
 
-#define UART_NS16550_PORT_2_BASE_ADDR		0xF000A000
-#define UART_NS16550_PORT_2_CLK_FREQ		SYSCLK_DEFAULT_IOSC_HZ
-
-#define UART_IRQ_FLAGS				0 /* Default */
-
-/**
- * Peripheral Interrupt Connection Configurations
- */
-#ifdef CONFIG_BOARD_EM_STARTERKIT_R23
-#define GPIO_DW_0_IRQ				24
-#define I2C_DW_0_IRQ				25
-#define I2C_DW_1_IRQ				26
-#define SPI_DW_PORT_0_IRQ			27
-#define SPI_DW_PORT_1_IRQ			28
-#define UART_NS16550_PORT_0_IRQ			29
-#define UART_NS16550_PORT_1_IRQ			30
-#define UART_NS16550_PORT_2_IRQ			31
-#else /* CONFIG_BOARD_EM_STARTERKIT_R23 */
-#define GPIO_DW_0_IRQ				22
-#define I2C_DW_0_IRQ				23
-#define I2C_DW_1_IRQ				24
-#define SPI_DW_PORT_0_IRQ			25
-#define SPI_DW_PORT_1_IRQ			26
-#define UART_NS16550_PORT_0_IRQ			27
-#define UART_NS16550_PORT_1_IRQ			28
-#define UART_NS16550_PORT_2_IRQ			29
-#endif /* !CONFIG_BOARD_EM_STARTERKIT_R23 */
-
-#define GPIO_DW_1_IRQ				0	/* can't interrupt */
-#define GPIO_DW_2_IRQ				0	/* can't interrupt */
-#define GPIO_DW_3_IRQ				0	/* can't interrupt */
+#define UART_NS16550_PORT_2_BASE_ADDR			0xF000A000
+#define UART_NS16550_PORT_2_IRQ				31
+#define UART_NS16550_PORT_2_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
 
+#define UART_IRQ_FLAGS					0 /* Default */
 #endif /* !_ASMLANGUAGE */
 
-#endif /* _SOC__H_ */
+#endif /* _BOARD__H_ */

arch/arc/soc/em9d/Kconfig.defconfig

@@ -13,12 +13,13 @@ config SOC
 config NUM_IRQ_PRIO_LEVELS
 	# This processor supports 4 priority levels:
 	# 0 for Fast Interrupts (FIRQs) and 1-3 for Regular Interrupts (IRQs).
-	default 4
+	# TODO: But regular irq nesting is not implemented --
+	# so this must be 2 for now.
+	default 2
 
 config NUM_IRQS
 	# must be > the highest interrupt number used
-	default 38 if BOARD_EM_STARTERKIT_R23
-	default 36 if BOARD_EM_STARTERKIT_R22
+	default 38
 
 config RGF_NUM_BANKS
 	default 2
@@ -55,4 +56,192 @@ config DCCM_BASE_ADDRESS
 config DCCM_SIZE
 	default 128
 
+if GPIO
+
+config GPIO_DW
+	def_bool y
+
+if GPIO_DW
+
+config GPIO_DW_0
+	def_bool y
+
+if GPIO_DW_0
+
+config GPIO_DW_0_NAME
+	default "GPIO_PORTA"
+
+config GPIO_DW_0_IRQ_PRI
+	default 1
+
+endif # GPIO_DW_0
+
+config GPIO_DW_1
+	def_bool y
+
+if GPIO_DW_1
+
+config GPIO_DW_1_NAME
+	default "GPIO_PORTB"
+
+config GPIO_DW_1_IRQ_PRI
+	default 1
+
+endif # GPIO_DW_1
+
+config GPIO_DW_2
+	def_bool y
+
+if GPIO_DW_2
+
+config GPIO_DW_2_IRQ_PRI
+	default 1
+
+config GPIO_DW_2_NAME
+	default "GPIO_PORTC"
+
+endif # GPIO_DW_2
+
+config GPIO_DW_3
+	def_bool y
+
+if GPIO_DW_3
+
+config GPIO_DW_3_IRQ_PRI
+	default 1
+
+config GPIO_DW_3_NAME
+	default "GPIO_PORTD"
+
+endif # GPIO_DW_3
+
+endif # GPIO_DW
+
+endif # GPIO
+
+if I2C
+
+config I2C_DW
+	def_bool y
+
+if I2C_DW
+
+config I2C_DW_CLOCK_SPEED
+	default 100
+
+config I2C_0
+	def_bool y
+
+if I2C_0
+
+config I2C_0_NAME
+	default "I2C_0"
+config I2C_0_DEFAULT_CFG
+	default 0x3
+config I2C_0_IRQ_PRI
+	default 1
+
+endif # I2C_0
+
+config I2C_1
+	def_bool y
+
+if I2C_1
+
+config I2C_1_NAME
+	default "I2C_1"
+config I2C_1_DEFAULT_CFG
+	default 0x3
+config I2C_1_IRQ_PRI
+	default 1
+
+endif # I2C_1
+
+endif # I2C_DW
+
+endif # I2C
+
+if UART_NS16550
+
+config UART_NS16550_PORT_0
+	def_bool n
+
+if UART_NS16550_PORT_0
+
+config UART_NS16550_PORT_0_NAME
+	default "UART_0"
+config UART_NS16550_PORT_0_IRQ_PRI
+	default 1
+config UART_NS16550_PORT_0_BAUD_RATE
+	default 115200
+config UART_NS16550_PORT_0_OPTIONS
+	default 0
+
+endif # UART_NS16550_PORT_0
+
+config UART_NS16550_PORT_1
+	def_bool y
+
+if UART_NS16550_PORT_1
+
+config UART_NS16550_PORT_1_NAME
+	default "UART_1"
+config UART_NS16550_PORT_1_IRQ_PRI
+	default 1
+config UART_NS16550_PORT_1_BAUD_RATE
+	default 115200
+config UART_NS16550_PORT_1_OPTIONS
+	default 0
+
+endif # UART_NS16550_PORT_1
+
+endif # UART_NS16550
+
+if UART_CONSOLE
+
+config UART_CONSOLE_ON_DEV_NAME
+	default "UART_1"
+
+endif
+
+if SPI
+
+config SPI_DW
+	def_bool y
+
+if SPI_DW
+
+config SPI_DW_CLOCK_GATE
+	def_bool n
+
+config SPI_DW_FIFO_DEPTH
+	default 32
+
+config SPI_DW_ARC_AUX_REGS
+	def_bool n
+
+config SPI_0
+	def_bool y
+
+if SPI_0
+
+config SPI_0_IRQ_PRI
+	default 0
+
+endif # SPI_0
+
+config SPI_1
+	def_bool y
+
+if SPI_1
+
+config SPI_1_IRQ_PRI
+	default 0
+
+endif # SPI_1
+
+endif # SPI_DW
+
+endif # SPI
+
 endif #SOC_EM9D

arch/arc/soc/em9d/Makefile

@@ -3,12 +3,12 @@ KBUILD_CFLAGS += -mcpu=em4_fpus
 
 soc-cflags += $(call cc-option,-mcpu=em4_fpus -mno-sdata) \
 		$(call cc-option,-mdiv-rem -mswap -mnorm) \
-		$(call cc-option,-mmpy-option=6 -mbarrel-shifter)
+		$(call cc-option,-mmpy-option=6 -mbarrel-shifter) \
 
 ifeq ($(CONFIG_CODE_DENSITY), y)
 soc-cflags += $(call cc-option,-mcode-density)
 endif
 
 ifeq ($(CONFIG_FLOAT), y)
-soc-cflags += $(call cc-option,-mfpu=fpus_all)
+soc-cflags += 	$(call cc-option,-mfpu=fpus_all)
 endif

arch/arc/soc/em9d/soc.h

@@ -11,22 +11,23 @@
  * aspects for the target.
  */
 
-#ifndef _SOC__H_
-#define _SOC__H_
+#ifndef _BOARD__H_
+#define _BOARD__H_
 
 #include <misc/util.h>
 
 /* default system clock */
-/* On the EM Starter Kit board, the peripheral bus clock frequency is 50Mhz */
+
 #define SYSCLK_DEFAULT_IOSC_HZ			MHZ(50)
+/* On the EM Starter Kit board, the peripheral bus clock frequency is 50Mhz */
 
 
-/* ARC EM Core IRQs */
+/* IRQs */
+
 #define IRQ_TIMER0				16
 #define IRQ_TIMER1				17
-
-#define IRQ_CORE_DMA_COMPLETE			20
-#define IRQ_CORE_DMA_ERROR			21
+#define IRQ_CORE_DMA_COMPLETE			22
+#define IRQ_CORE_DMA_ERROR			23
 
 #ifndef _ASMLANGUAGE
 
@@ -46,38 +47,55 @@
 #define INT_ENABLE_ARC_BIT_POS			(8)
 
 /* I2C */
+
 /* I2C_0 is on Pmod2 connector */
 #define I2C_DW_0_BASE_ADDR			0xF0004000
+#define I2C_DW_0_IRQ				25
+
 
 /* I2C_1 is on Pmod4 connector */
 #define I2C_DW_1_BASE_ADDR			0xF0005000
+#define I2C_DW_1_IRQ				26
 
 #define I2C_DW_IRQ_FLAGS			0
 
 /* GPIO */
 #define GPIO_DW_0_BASE_ADDR			0xF0002000 /* GPIO 0 : PORTA */
+#define GPIO_DW_0_IRQ				24
 #define GPIO_DW_0_BITS				32
 #define GPIO_DW_PORT_0_INT_MASK			0 /* n/a */
 #define GPIO_DW_0_IRQ_FLAGS			0 /* Defaults */
 
 #define GPIO_DW_1_BASE_ADDR			0xF000200C /* GPIO 1 : PORTB */
+#define GPIO_DW_1_IRQ				0          /* can't interrupt */
 #define GPIO_DW_1_BITS				9          /* 9 LEDs on board */
 #define GPIO_DW_PORT_1_INT_MASK			0 /* n/a */
 
 #define GPIO_DW_2_BASE_ADDR			0xF0002018 /* GPIO 2 : PORTC */
+#define GPIO_DW_2_IRQ				0          /* can't interrupt */
 #define GPIO_DW_2_BITS				32
 #define GPIO_DW_PORT_2_INT_MASK			0 /* n/a */
 
 #define GPIO_DW_3_BASE_ADDR			0xF0002024 /* GPIO 3 : PORTD */
+#define GPIO_DW_3_IRQ				0          /* can't interrupt */
 #define GPIO_DW_3_BITS				12
 #define GPIO_DW_PORT_3_INT_MASK			0 /* n/a */
 
+/* undef GPIO_DW_IO_ACCESS .. because memory mapped */
+/* undef CONFIG_GPIO_DW_0_IRQ_SHARED */
+/* undef CONFIG_GPIO_DW_CLOCK_GATE */
+/* undef CONFIG_SOC_QUARK_SE_C1000_SS */
+
 /* SPI */
+
 #define SPI_DW_SPI_CLOCK			SYSCLK_DEFAULT_IOSC_HZ
 
 #define SPI_DW_PORT_0_REGS			0xF0006000
 #define SPI_DW_PORT_1_REGS			0xF0007000
 
+#define SPI_DW_PORT_0_IRQ			27
+#define SPI_DW_PORT_1_IRQ			28
+
 #define SPI_DW_IRQ_FLAGS			0
 
 /*
@@ -92,46 +110,24 @@
  */
 
 /*
- * UARTs: UART0 & UART1 & UART2
+ * UART
+     UART0 vector 29 0xF0008000
+     UART1 vector 30 0xF0009000
+     UART2 vector 31 0xF000A000
  */
-#define UART_NS16550_PORT_0_BASE_ADDR		0xF0008000
-#define UART_NS16550_PORT_0_CLK_FREQ		SYSCLK_DEFAULT_IOSC_HZ
+#define UART_NS16550_PORT_0_BASE_ADDR			0xF0008000
+#define UART_NS16550_PORT_0_IRQ				29
+#define UART_NS16550_PORT_0_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
 
-#define UART_NS16550_PORT_1_BASE_ADDR		0xF0009000
-#define UART_NS16550_PORT_1_CLK_FREQ		SYSCLK_DEFAULT_IOSC_HZ
+#define UART_NS16550_PORT_1_BASE_ADDR			0xF0009000
+#define UART_NS16550_PORT_1_IRQ				30
+#define UART_NS16550_PORT_1_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
 
-#define UART_NS16550_PORT_2_BASE_ADDR		0xF000A000
-#define UART_NS16550_PORT_2_CLK_FREQ		SYSCLK_DEFAULT_IOSC_HZ
-
-#define UART_IRQ_FLAGS				0 /* Default */
-
-/**
- * Peripheral Interrupt Connection Configurations
- */
-#ifdef CONFIG_BOARD_EM_STARTERKIT_R23
-#define GPIO_DW_0_IRQ				24
-#define I2C_DW_0_IRQ				25
-#define I2C_DW_1_IRQ				26
-#define SPI_DW_PORT_0_IRQ			27
-#define SPI_DW_PORT_1_IRQ			28
-#define UART_NS16550_PORT_0_IRQ			29
-#define UART_NS16550_PORT_1_IRQ			30
-#define UART_NS16550_PORT_2_IRQ			31
-#else /* CONFIG_BOARD_EM_STARTERKIT_R23 */
-#define GPIO_DW_0_IRQ				22
-#define I2C_DW_0_IRQ				23
-#define I2C_DW_1_IRQ				24
-#define SPI_DW_PORT_0_IRQ			25
-#define SPI_DW_PORT_1_IRQ			26
-#define UART_NS16550_PORT_0_IRQ			27
-#define UART_NS16550_PORT_1_IRQ			28
-#define UART_NS16550_PORT_2_IRQ			29
-#endif /* !CONFIG_BOARD_EM_STARTERKIT_R23 */
-
-#define GPIO_DW_1_IRQ				0	/* can't interrupt */
-#define GPIO_DW_2_IRQ				0	/* can't interrupt */
-#define GPIO_DW_3_IRQ				0	/* can't interrupt */
+#define UART_NS16550_PORT_2_BASE_ADDR			0xF000A000
+#define UART_NS16550_PORT_2_IRQ				31
+#define UART_NS16550_PORT_2_CLK_FREQ			SYSCLK_DEFAULT_IOSC_HZ
 
+#define UART_IRQ_FLAGS					0 /* Default */
 #endif /* !_ASMLANGUAGE */
 
-#endif /* _SOC__H_ */
+#endif /* _BOARD__H_ */

arch/arc/soc/quark_se_c1000_ss/Kconfig.defconfig

@@ -229,9 +229,9 @@ config ADC_QMSI_SS
 	def_bool y
 endif
 
-if BT_H4
+if BLUETOOTH_H4
 
-config BT_UART_ON_DEV_NAME
+config BLUETOOTH_UART_ON_DEV_NAME
 	default UART_QMSI_0_NAME
 
 config UART_QMSI_0
@@ -243,7 +243,7 @@ config UART_QMSI_0_BAUDRATE
 config UART_QMSI_0_HW_FC
 	def_bool y
 
-endif # BT_H4
+endif # BLUETOOTH_H4
 
 if UART_QMSI
 

arch/arm/core/cortex_m/mpu/Kconfig

@@ -38,10 +38,3 @@ config NXP_MPU
 	default n
 	help
 	  MCU has NXP MPU
-
-config MPU_ALLOW_FLASH_WRITE
-	bool "Add MPU access to write to flash"
-	depends on ARM_MPU || NXP_MPU
-	default n
-	help
-	  Enable this to allow MPU RWX access to flash memory

arch/arm/core/cortex_m/mpu/arm_core_mpu.c

@@ -24,8 +24,8 @@ void configure_mpu_stack_guard(struct k_thread *thread)
 {
 	arm_core_mpu_disable();
 	arm_core_mpu_configure(THREAD_STACK_GUARD_REGION,
-			thread->stack_info.start - MPU_GUARD_ALIGN_AND_SIZE,
-			thread->stack_info.size);
+			       thread->stack_info.start,
+			       thread->stack_info.size);
 	arm_core_mpu_enable();
 }
 #endif

arch/arm/core/cortex_m/mpu/arm_mpu.c

@@ -108,12 +108,10 @@ void arm_core_mpu_configure(u8_t type, u32_t base, u32_t size)
 {
 	SYS_LOG_DBG("Region info: 0x%x 0x%x", base, size);
 	/*
-	 * The new MPU regions are allocated per type after the statically
-	 * configured regions. The type is one-indexed rather than
-	 * zero-indexed, therefore we need to subtract by one to get the region
-	 * index.
+	 * The new MPU regions are are allocated per type after the statically
+	 * configured regions.
 	 */
-	u32_t region_index = mpu_config.num_regions + type - 1;
+	u32_t region_index = mpu_config.num_regions + type;
 	u32_t region_attr = _get_region_attr_by_type(type, size);
 
 	/* ARM MPU supports up to 16 Regions */

arch/arm/core/cortex_m/mpu/nxp_mpu.c

@@ -44,33 +44,10 @@ static inline u8_t _get_num_regions(void)
 static void _region_init(u32_t index, u32_t region_base,
 			 u32_t region_end, u32_t region_attr)
 {
-	if (index == 0) {
-		/* The MPU does not allow writes from the core to affect the
-		 * RGD0 start or end addresses nor the permissions associated
-		 * with the debugger; it can only write the permission fields
-		 * associated with the other masters. These protections
-		 * guarantee that the debugger always has access to the entire
-		 * address space.
-		 */
-		__ASSERT(region_base == SYSMPU->WORD[index][0],
-			 "Region %d base address got 0x%08x expected 0x%08x",
-			 index, region_base, SYSMPU->WORD[index][0]);
-
-		__ASSERT(region_end == SYSMPU->WORD[index][1],
-			 "Region %d end address got 0x%08x expected 0x%08x",
-			 index, region_end, SYSMPU->WORD[index][1]);
-
-		/* Changes to the RGD0_WORD2 alterable fields should be done
-		 * via a write to RGDAAC0.
-		 */
-		SYSMPU->RGDAAC[index] = region_attr;
-
-	} else {
-		SYSMPU->WORD[index][0] = region_base;
-		SYSMPU->WORD[index][1] = region_end;
-		SYSMPU->WORD[index][2] = region_attr;
-		SYSMPU->WORD[index][3] = SYSMPU_WORD_VLD_MASK;
-	}
+	SYSMPU->WORD[index][0] = region_base;
+	SYSMPU->WORD[index][1] = region_end;
+	SYSMPU->WORD[index][2] = region_attr;
+	SYSMPU->WORD[index][3] = SYSMPU_WORD_VLD_MASK;
 
 	SYS_LOG_DBG("[%d] 0x%08x 0x%08x 0x%08x 0x%08x", index,
 		    SYSMPU->WORD[index][0],
@@ -120,12 +97,10 @@ void arm_core_mpu_configure(u8_t type, u32_t base, u32_t size)
 {
 	SYS_LOG_DBG("Region info: 0x%x 0x%x", base, size);
 	/*
-	 * The new MPU regions are allocated per type after the statically
-	 * configured regions. The type is one-indexed rather than
-	 * zero-indexed, therefore we need to subtract by one to get the region
-	 * index.
+	 * The new MPU regions are are allocated per type after the statically
+	 * configured regions.
 	 */
-	u32_t region_index = mpu_config.num_regions + type - 1;
+	u32_t region_index = mpu_config.num_regions + type;
 	u32_t region_attr = _get_region_attr_by_type(type);
 	u32_t last_region = _get_num_regions() - 1;
 
@@ -155,7 +130,7 @@ void arm_core_mpu_configure(u8_t type, u32_t base, u32_t size)
 	 * structure is mapped on the mpu_config.sram_region + 1 region of
 	 * the MPU.
 	 */
-	_region_init(mpu_config.sram_region,
+	_region_init(mpu_config.sram_region + 1,
 		     mpu_config.mpu_regions[mpu_config.sram_region].base,
 		     ENDADDR_ROUND(base),
 		     mpu_config.mpu_regions[mpu_config.sram_region].attr);
@@ -207,9 +182,22 @@ static void _nxp_mpu_config(void)
 
 	/* MPU Configuration */
 
-	/* Configure regions */
+	/* Disable Region 0 */
+	SYSMPU->WORD[0][2] = 0;
+
+	SYS_LOG_DBG("[0] 0x%08x 0x%08x 0x%08x 0x%08x",
+		    SYSMPU->WORD[0][0],
+		    SYSMPU->WORD[0][1],
+		    SYSMPU->WORD[0][2],
+		    SYSMPU->WORD[0][3]);
+
+	/*
+	 * Configure regions:
+	 * r_index starts from 0 but is passed to region_init as r_index + 1,
+	 * region 0 is not configurable
+	 */
 	for (r_index = 0; r_index < mpu_config.num_regions; r_index++) {
-		_region_init(r_index,
+		_region_init(r_index + 1,
 			     mpu_config.mpu_regions[r_index].base,
 			     mpu_config.mpu_regions[r_index].end,
 			     mpu_config.mpu_regions[r_index].attr);

arch/arm/core/cortex_m/nmi.c

@@ -18,7 +18,7 @@
 #include <misc/printk.h>
 #include <misc/reboot.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 
 extern void _SysNmiOnReset(void);
 #if !defined(CONFIG_RUNTIME_NMI)

arch/arm/core/cortex_m/nmi_on_reset.S

@@ -16,7 +16,7 @@
  */
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 
 _ASM_FILE_PROLOGUE
 

arch/arm/core/cortex_m/prep_c.c

@@ -19,23 +19,12 @@
 #include <kernel.h>
 #include <zephyr/types.h>
 #include <toolchain.h>
-#include <linker/linker-defs.h>
+#include <linker-defs.h>
 #include <nano_internal.h>
 #include <arch/arm/cortex_m/cmsis.h>
-#include <string.h>
 
 #ifdef CONFIG_ARMV6_M
-
-#define VECTOR_ADDRESS 0
-static inline void relocate_vector_table(void)
-{
-#if defined(CONFIG_XIP) && (CONFIG_FLASH_BASE_ADDRESS != 0) || \
-    !defined(CONFIG_XIP) && (CONFIG_SRAM_BASE_ADDRESS != 0)
-	size_t vector_size = (size_t)_vector_end - (size_t)_vector_start;
-	memcpy(VECTOR_ADDRESS, _vector_start, vector_size);
-#endif
-}
-
+static inline void relocate_vector_table(void) { /* do nothing */ }
 #elif defined(CONFIG_ARMV7_M)
 #ifdef CONFIG_XIP
 #define VECTOR_ADDRESS ((uintptr_t)&_image_rom_start + \
@@ -98,18 +87,12 @@ extern FUNC_NORETURN void _Cstart(void);
  * @return N/A
  */
 
-#ifdef CONFIG_BOOT_TIME_MEASUREMENT
-	extern u64_t __start_time_stamp;
-#endif
 void _PrepC(void)
 {
 	relocate_vector_table();
 	enable_floating_point();
 	_bss_zero();
 	_data_copy();
-#ifdef CONFIG_BOOT_TIME_MEASUREMENT
-	__start_time_stamp = 0;
-#endif
 	_Cstart();
 	CODE_UNREACHABLE;
 }

arch/arm/core/cortex_m/reset.S

@@ -13,7 +13,7 @@
 
 #include <board.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <arch/cpu.h>
 #include <offsets_short.h>
 #include "vector_table.h"

arch/arm/core/cortex_m/vector_table.S

@@ -18,7 +18,7 @@
 
 #include <board.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <drivers/system_timer.h>
 #include "vector_table.h"
 

arch/arm/core/cortex_m/vector_table.h

@@ -29,7 +29,7 @@ extern "C" {
 
 #include <board.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <misc/util.h>
 
 GTEXT(__start)

arch/arm/core/cpu_idle.S

@@ -12,7 +12,7 @@
 
 #include <offsets_short.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <arch/cpu.h>
 #ifdef CONFIG_TICKLESS_IDLE
 #include <kernel_structs.h>

arch/arm/core/exc_exit.S

@@ -58,6 +58,17 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, _IntExit)
 
 /* _IntExit falls through to _ExcExit (they are aliases of each other) */
 
+#ifdef CONFIG_TIMESLICING
+    push {lr}
+    bl _update_time_slice_before_swap
+#if defined(CONFIG_ARMV6_M)
+    pop {r0}
+    mov lr, r0
+#else
+    pop {lr}
+#endif /* CONFIG_ARMV6_M */
+#endif
+
 /**
  *
  * @brief Kernel housekeeping when exiting exception handler installed
@@ -87,17 +98,6 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, _ExcExit)
     cmp r0, r1
     beq _EXIT_EXC
 
-#ifdef CONFIG_TIMESLICING
-    push {lr}
-    bl _update_time_slice_before_swap
-#if defined(CONFIG_ARMV6_M)
-    pop {r0}
-    mov lr, r0
-#else
-    pop {lr}
-#endif /* CONFIG_ARMV6_M */
-#endif /* CONFIG_TIMESLICING */
-
     /* context switch required, pend the PendSV exception */
     ldr r1, =_SCS_ICSR
     ldr r2, =_SCS_ICSR_PENDSV

arch/arm/core/fatal.c

@@ -12,7 +12,7 @@
  */
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <inttypes.h>
 
 #include <kernel.h>

arch/arm/core/fault.c

@@ -12,7 +12,7 @@
  */
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 
 #include <kernel.h>
 #include <kernel_structs.h>

arch/arm/core/fault_s.S

@@ -12,7 +12,7 @@
  */
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE

arch/arm/core/irq_init.c

@@ -17,7 +17,7 @@
  */
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <kernel.h>
 #include <arch/cpu.h>
 #include <arch/arm/cortex_m/cmsis.h>

arch/arm/core/irq_manage.c

@@ -19,7 +19,7 @@
 #include <arch/arm/cortex_m/cmsis.h>
 #include <misc/__assert.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <sw_isr_table.h>
 #include <irq.h>
 #include <kernel_structs.h>

arch/arm/core/isr_wrapper.S

@@ -14,7 +14,7 @@
 
 #include <offsets_short.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <sw_isr_table.h>
 #include <kernel_structs.h>
 #include <arch/cpu.h>
@@ -44,7 +44,7 @@ SECTION_FUNC(TEXT, _isr_wrapper)
 	push {lr}		/* lr is now the first item on the stack */
 
 #ifdef CONFIG_EXECUTION_BENCHMARKING
-	bl read_timer_start_of_isr
+	bl read_systick_start_of_isr
 #endif
 
 #ifdef CONFIG_KERNEL_EVENT_LOGGER_INTERRUPT
@@ -110,16 +110,18 @@ _idle_state_cleared:
 
 	ldm r1!,{r0,r3}	/* arg in r0, ISR in r3 */
 #ifdef CONFIG_EXECUTION_BENCHMARKING
-	stm sp!,{r0-r3} /* Save r0 to r4 into stack */
+#if defined(CONFIG_ARMV6_M)
+	push {r3}
+#endif
 	push {lr}
-	bl read_timer_end_of_isr
+	bl read_systick_end_of_isr
 #if defined(CONFIG_ARMV6_M)
 	pop {r3}
 	mov lr,r3
+	pop {r3}
 #else
 	pop {lr}
 #endif
-	ldm sp!,{r0-r3} /* Restore r0 to r4 regs */
 #endif
 	blx r3		/* call ISR */
 

arch/arm/core/swap.S

@@ -185,18 +185,21 @@ _thread_irq_disabled:
     msr PSP, ip
 
 #ifdef CONFIG_EXECUTION_BENCHMARKING
-    stm sp!,{r0-r3} /* Save regs r0 to r4 on stack */
+#if defined(CONFIG_ARMV6_M)
+    push {r3}
+#endif
     push {lr}
-    bl read_timer_end_of_swap
+
+    bl read_systick_end_of_swap
 
 #if defined(CONFIG_ARMV6_M)
     pop {r3}
     mov lr,r3
+    pop {r3}
 #else
     pop {lr}
-#endif /* CONFIG_ARMV6_M */
-    ldm sp!,{r0-r3} /* Load back regs ro to r4 */
-#endif /* CONFIG_EXECUTION_BENCHMARKING */
+#endif
+#endif
 
     /* exc return */
     bx lr
@@ -360,15 +363,19 @@ _oops:
 SECTION_FUNC(TEXT, __swap)
 
 #ifdef CONFIG_EXECUTION_BENCHMARKING
+#if defined(CONFIG_ARMV6_M)
+    push {r3}
+#endif
     push {lr}
-    bl read_timer_start_of_swap
+    bl read_systick_start_of_swap
 #if defined(CONFIG_ARMV6_M)
     pop {r3}
     mov lr,r3
+    pop {r3}
 #else
     pop {lr}
-#endif /* CONFIG_ARMV6_M */
-#endif /* CONFIG_EXECUTION_BENCHMARKING */
+#endif
+#endif
     ldr r1, =_kernel
     ldr r2, [r1, #_kernel_offset_to_current]
     str r0, [r2, #_thread_offset_to_basepri]

arch/arm/core/sys_fatal_error_handler.c

@@ -14,7 +14,7 @@
 
 #include <kernel.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <kernel_structs.h>
 #include <misc/printk.h>
 

arch/arm/core/thread.c

@@ -49,23 +49,26 @@
  * @return N/A
  */
 
-void _new_thread(struct k_thread *thread, k_thread_stack_t stack,
-		 size_t stackSize, _thread_entry_t pEntry,
+void _new_thread(struct k_thread *thread, char *pStackMem, size_t stackSize,
+		 _thread_entry_t pEntry,
 		 void *parameter1, void *parameter2, void *parameter3,
 		 int priority, unsigned int options)
 {
-	char *pStackMem = K_THREAD_STACK_BUFFER(stack);
-
 	_ASSERT_VALID_PRIO(priority, pEntry);
 
+	__ASSERT(!((u32_t)pStackMem & (STACK_ALIGN - 1)),
+		 "stack is not aligned properly\n"
+		 "%d-byte alignment required\n", STACK_ALIGN);
+
 	char *stackEnd = pStackMem + stackSize;
 	struct __esf *pInitCtx;
+
 	_new_thread_init(thread, pStackMem, stackSize, priority, options);
 
 	/* carve the thread entry struct from the "base" of the stack */
 
-	pInitCtx = (struct __esf *)(STACK_ROUND_DOWN(stackEnd -
-						     sizeof(struct __esf)));
+	pInitCtx = (struct __esf *)(STACK_ROUND_DOWN(stackEnd) -
+				    sizeof(struct __esf));
 
 	pInitCtx->pc = ((u32_t)_thread_entry) & 0xfffffffe;
 	pInitCtx->a1 = (u32_t)pEntry;

arch/arm/core/thread_abort.c

@@ -19,7 +19,7 @@
 #include <kernel.h>
 #include <kernel_structs.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <ksched.h>
 #include <wait_q.h>
 

arch/arm/include/cortex_m/stack.h

@@ -21,13 +21,19 @@
 extern "C" {
 #endif
 
+#ifdef CONFIG_STACK_ALIGN_DOUBLE_WORD
+#define STACK_ALIGN_SIZE 8
+#else
+#define STACK_ALIGN_SIZE 4
+#endif
+
 #ifdef _ASMLANGUAGE
 
 /* nothing */
 
 #else
 
-extern K_THREAD_STACK_DEFINE(_interrupt_stack, CONFIG_ISR_STACK_SIZE);
+extern char _interrupt_stack[CONFIG_ISR_STACK_SIZE];
 
 /**
  *
@@ -40,8 +46,7 @@ extern K_THREAD_STACK_DEFINE(_interrupt_stack, CONFIG_ISR_STACK_SIZE);
  */
 static ALWAYS_INLINE void _InterruptStackSetup(void)
 {
-	u32_t msp = (u32_t)(K_THREAD_STACK_BUFFER(_interrupt_stack) +
-			    CONFIG_ISR_STACK_SIZE);
+	u32_t msp = (u32_t)(_interrupt_stack + CONFIG_ISR_STACK_SIZE);
 
 	_MspSet(msp);
 }

arch/arm/include/kernel_arch_data.h

@@ -25,7 +25,7 @@ extern "C" {
 #endif
 
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <arch/cpu.h>
 #include <kernel_arch_thread.h>
 

arch/arm/include/kernel_arch_func.h

@@ -38,15 +38,13 @@ static ALWAYS_INLINE void kernel_arch_init(void)
 }
 
 static ALWAYS_INLINE void
-_arch_switch_to_main_thread(struct k_thread *main_thread,
-			    k_thread_stack_t main_stack,
+_arch_switch_to_main_thread(struct k_thread *main_thread, char *main_stack,
 			    size_t main_stack_size, _thread_entry_t _main)
 {
 	/* get high address of the stack, i.e. its start (stack grows down) */
 	char *start_of_main_stack;
 
-	start_of_main_stack =
-		K_THREAD_STACK_BUFFER(main_stack) + main_stack_size;
+	start_of_main_stack = main_stack + main_stack_size;
 	start_of_main_stack = (void *)STACK_ROUND_DOWN(start_of_main_stack);
 
 	_current = main_thread;

arch/arm/soc/atmel_sam/sam3x/soc_pinmap.h

@@ -60,16 +60,16 @@
 #define PINS_USART3 {PIN_USART3_RXD, PIN_USART3_TXD, PIN_USART3_CTS, \
 	  PIN_USART3_RTS, PIN_USART3_SCK}
 
-/* Two-wire Interface (TWI) */
+/* Two-wire Interface (TWIHS) */
 
-#define PIN_TWI0_TWCK {PIO_PA18A_TWCK0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
-#define PIN_TWI0_TWD  {PIO_PA17A_TWD0,  PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
+#define PIN_TWIHS0_TWCK {PIO_PA18A_TWCK0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
+#define PIN_TWIHS0_TWD  {PIO_PA17A_TWD0,  PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
 
-#define PINS_TWI0 {PIN_TWI0_TWCK, PIN_TWI0_TWD}
+#define PINS_TWIHS0 {PIN_TWIHS0_TWCK, PIN_TWIHS0_TWD}
 
-#define PIN_TWI1_TWCK {PIO_PB13A_TWCK1, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
-#define PIN_TWI1_TWD  {PIO_PB12A_TWD1,  PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
+#define PIN_TWIHS1_TWCK {PIO_PB13A_TWCK1, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
+#define PIN_TWIHS1_TWD  {PIO_PB12A_TWD1,  PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
 
-#define PINS_TWI1 {PIN_TWI1_TWCK, PIN_TWI1_TWD}
+#define PINS_TWIHS1 {PIN_TWIHS1_TWCK, PIN_TWIHS1_TWD}
 
 #endif /* _ATMEL_SAM3X_SOC_PINMAP_H_ */

arch/arm/soc/atmel_sam/same70/soc_config.c

@@ -22,7 +22,7 @@
  */
 static int atmel_same70_config(struct device *dev)
 {
-#ifdef CONFIG_SOC_ATMEL_SAME70_DISABLE_ERASE_PIN
+#ifdef SOC_ATMEL_SAME70_DISABLE_ERASE_PIN
 	/* Disable ERASE function on PB12 pin, this is controlled by Bus Matrix */
 	MATRIX->CCFG_SYSIO |= CCFG_SYSIO_SYSIO12;
 #endif

arch/arm/soc/nordic_nrf5/include/nrf5_common.h

@@ -68,8 +68,6 @@
  * Uses the UARTE_BAUDRATE macros since they are more precise.
  */
 
-#define NRF5_UART_BAUDRATE_300                 0x00014000
-#define NRF5_UART_BAUDRATE_600                 0x00027000
 #define NRF5_UART_BAUDRATE_1200                0x0004f000
 #define NRF5_UART_BAUDRATE_2400                0x0009d000
 #define NRF5_UART_BAUDRATE_4800                0x0013b000

arch/arm/soc/nordic_nrf5/nrf51/soc.h

@@ -25,7 +25,4 @@
 #define NRF51_POWER_RAMONB_ADDRESS             0x40000554
 #define NRF51_POWER_RAMONx_RAMxON_ONMODE_Msk   0x3
 
-#define FLASH_PAGE_ERASE_MAX_TIME_US 22300UL
-#define FLASH_PAGE_MAX_CNT 256UL
-
 #endif /* _NORDICSEMI_NRF51_SOC_H_ */

arch/arm/soc/nordic_nrf5/nrf52/soc.h

@@ -21,7 +21,4 @@
 
 #endif /* !_ASMLANGUAGE */
 
-#define FLASH_PAGE_ERASE_MAX_TIME_US 89700UL
-#define FLASH_PAGE_MAX_CNT 256UL
-
 #endif /* _NORDICSEMI_NRF52_SOC_H_ */

arch/arm/soc/nxp_kinetis/Kconfig

@@ -52,12 +52,6 @@ config HAS_TRNG
 	help
 	  Set if the true random number generator (TRNG) module is present in the SoC.
 
-config HAS_FTM
-	bool
-	default n
-	help
-	  Set if the FlexTimer (FTM) module is present in the SoC.
-
 config HAS_LPUART
 	bool
 	default n
@@ -70,12 +64,6 @@ config HAS_LPSCI
 	help
 	  Set if the low power uart (LPSCI) module is present in the SoC.
 
-config HAS_ADC16
-	bool
-	default n
-	help
-	  Set if the 16-bit ADC (ADC16) module is present in the SoC.
-
 config HAS_SYSMPU
 	bool "Enable MPU"
 	depends on CPU_HAS_MPU

arch/arm/soc/nxp_kinetis/k6x/Kconfig.defconfig.mk64f12

@@ -12,13 +12,6 @@ config SOC
 	string
 	default mk64f12
 
-if ADC
-
-config ADC_MCUX_ADC16
-	def_bool y
-
-endif # ADC
-
 if PINMUX
 
 config PINMUX_MCUX
@@ -45,7 +38,7 @@ endif # I2C
 
 if PWM
 
-config PWM_MCUX_FTM
+config PWM_K64_FTM
 	def_bool y
 
 endif # PWM

arch/arm/soc/nxp_kinetis/k6x/Kconfig.soc

@@ -15,7 +15,6 @@ config SOC_MK64F12
 	select HAS_OSC
 	select HAS_MCG
 	select HAS_RNGA
-	select HAS_ADC16
 	select CPU_HAS_FPU
 
 endchoice

arch/arm/soc/nxp_kinetis/k6x/nxp_mpu_regions.c

@@ -12,16 +12,11 @@
 
 static struct nxp_mpu_region mpu_regions[] = {
 	/* Region 0 */
-	MPU_REGION_ENTRY("DEBUGGER_0",
-			 0,
-			 0xFFFFFFFF,
-			 REGION_DEBUG_ATTR),
-	/* Region 1 */
 	MPU_REGION_ENTRY("FLASH_0",
 			 CONFIG_FLASH_BASE_ADDRESS,
 			 0x07FFFFFF,
 			 REGION_FLASH_ATTR),
-	/* Region 2 */
+	/* Region 1 */
 	/*
 	 * This region (Flexbus + FlexNVM) is bigger than the FLEXBUS one in
 	 * order to save 1 region allocation in the MPU.
@@ -30,18 +25,18 @@ static struct nxp_mpu_region mpu_regions[] = {
 			 FLEXBUS_BASE_ADDRESS,
 			 0x1BFFFFFF,
 			 REGION_IO_ATTR),
-	/* Region 3 */
+	/* Region 2 */
 	MPU_REGION_ENTRY("RAM_L_0",
 			 SRAM_L_BASE_ADDRESS,
 			 0x1FFFFFFF,
 			 REGION_RAM_ATTR),
-	/* Region 4 */
+	/* Region 3 */
 	MPU_REGION_ENTRY("RAM_U_0",
 			 CONFIG_SRAM_BASE_ADDRESS,
 			 (CONFIG_SRAM_BASE_ADDRESS +
 				 (CONFIG_SRAM_SIZE * 1024) - 1),
 			 REGION_RAM_ATTR),
-	/* Region 5 */
+	/* Region 4 */
 	MPU_REGION_ENTRY("DEVICE_0",
 			 DEVICE_S_BASE_ADDRESS,
 			 0xFFFFFFFF,
@@ -51,5 +46,5 @@ static struct nxp_mpu_region mpu_regions[] = {
 struct nxp_mpu_config mpu_config = {
 	.num_regions = ARRAY_SIZE(mpu_regions),
 	.mpu_regions = mpu_regions,
-	.sram_region = 4,
+	.sram_region = 3,
 };

arch/arm/soc/nxp_kinetis/k6x/soc.c

@@ -18,7 +18,7 @@
 #include <init.h>
 #include <soc.h>
 #include <uart.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <fsl_common.h>
 #include <fsl_clock.h>
 #include <arch/cpu.h>

arch/arm/soc/nxp_kinetis/k6x/soc.h

@@ -76,6 +76,14 @@ extern "C" {
 #define IRQ_I2S0_TX 28
 #define IRQ_I2S0_RX 29
 #define IRQ_RESERVED0 30
+#define IRQ_UART0_STATUS 31
+#define IRQ_UART0_ERROR 32
+#define IRQ_UART1_STATUS 33
+#define IRQ_UART1_ERROR 34
+#define IRQ_UART2_STATUS 35
+#define IRQ_UART2_ERROR 36
+#define IRQ_UART3_STATUS 37
+#define IRQ_UART3_ERROR 38
 #define IRQ_ADC0 39
 #define IRQ_CMP0 40
 #define IRQ_CMP1 41
@@ -103,6 +111,10 @@ extern "C" {
 #define IRQ_GPIO_PORTE 63
 #define IRQ_SOFTWARE 64
 #define IRQ_SPI2 65
+#define IRQ_UART4_STATUS 66
+#define IRQ_UART4_ERROR 67
+#define IRQ_RESERVED2 68 /* IRQ_UART5_STATUS - UART5 not implemented */
+#define IRQ_RESERVED3 69 /* IRQ_UART5_ERROR - UART5 not implemented */
 #define IRQ_CMP2 70
 #define IRQ_FTM3 71
 #define IRQ_DAC1 72
@@ -127,6 +139,14 @@ extern "C" {
 #include <misc/util.h>
 #include <drivers/rand32.h>
 
+/*
+ * PWM/FTM configuration settings
+ */
+#define PWM_K64_FTM_0_REG_BASE	0x40038000
+#define PWM_K64_FTM_1_REG_BASE	0x40039000
+#define PWM_K64_FTM_2_REG_BASE	0x4003A000
+#define PWM_K64_FTM_3_REG_BASE	0x400B9000
+
 #endif /* !_ASMLANGUAGE */
 
 #ifdef __cplusplus

arch/arm/soc/nxp_kinetis/k6x/wdog.S

@@ -13,7 +13,7 @@
 
 #include <soc.h>
 #include <toolchain.h>
-#include <linker/sections.h>
+#include <sections.h>
 
 _ASM_FILE_PROLOGUE
 

arch/arm/soc/nxp_kinetis/kl2x/Kconfig.defconfig.mkl25z4

@@ -15,13 +15,6 @@ config NUM_IRQS
 	int
 	default 32
 
-if ADC
-
-config ADC_MCUX_ADC16
-	def_bool y
-
-endif # ADC
-
 if PINMUX
 
 config PINMUX_MCUX

arch/arm/soc/nxp_kinetis/kl2x/Kconfig.soc

@@ -16,7 +16,6 @@ config SOC_MKL25Z4
 	select HAS_OSC
 	select HAS_MCG
 	select HAS_LPSCI
-	select HAS_ADC16
 
 endchoice
 

arch/arm/soc/nxp_kinetis/kl2x/soc.c

@@ -8,7 +8,7 @@
 #include <device.h>
 #include <init.h>
 #include <soc.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <fsl_common.h>
 #include <fsl_clock.h>
 #include <arch/cpu.h>

arch/arm/soc/nxp_kinetis/kwx/Kconfig.defconfig.mkw40z4

@@ -15,13 +15,6 @@ config NUM_IRQS
 	int
 	default 32
 
-if ADC
-
-config ADC_MCUX_ADC16
-	def_bool y
-
-endif # ADC
-
 if PINMUX
 
 config PINMUX_MCUX

arch/arm/soc/nxp_kinetis/kwx/Kconfig.defconfig.mkw41z4

@@ -15,13 +15,6 @@ config NUM_IRQS
 	int
 	default 32
 
-if ADC
-
-config ADC_MCUX_ADC16
-	def_bool y
-
-endif # ADC
-
 if PINMUX
 
 config PINMUX_MCUX

arch/arm/soc/nxp_kinetis/kwx/Kconfig.soc

@@ -16,7 +16,6 @@ config SOC_MKW40Z4
 	select HAS_OSC
 	select HAS_MCG
 	select HAS_LPUART
-	select HAS_ADC16
 	select HAS_TRNG
 	select HAS_SEGGER_RTT
 
@@ -27,7 +26,6 @@ config SOC_MKW41Z4
 	select HAS_OSC
 	select HAS_MCG
 	select HAS_LPUART
-	select HAS_ADC16
 	select HAS_TRNG
 
 endchoice

arch/arm/soc/nxp_kinetis/kwx/soc.c

@@ -9,7 +9,7 @@
 #include <init.h>
 #include <soc.h>
 #include <uart.h>
-#include <linker/sections.h>
+#include <sections.h>
 #include <fsl_common.h>
 #include <fsl_clock.h>
 #include <arch/cpu.h>

arch/arm/soc/nxp_kinetis/kwx/soc.h

@@ -29,6 +29,7 @@ extern "C" {
 #define IRQ_I2C1 9
 #define IRQ_SPI0 10
 #define IRQ_TSI0 11
+#define IRQ_LPUART0 12
 #define IRQ_TRNG0 13
 #define IRQ_CMT 14
 #define IRQ_ADC0 15

arch/arm/soc/st_stm32/Kbuild

@@ -1,3 +1,2 @@
 
 obj-y += $(SOC_SERIES)/
-obj-y += common/

arch/arm/soc/st_stm32/Kconfig

@@ -16,12 +16,4 @@ config SOC_FAMILY
 	default st_stm32
 endif
 
-config STM32_ARM_MPU_ENABLE
-	bool "Enable MPU"
-	depends on CPU_HAS_MPU
-	select ARM_MPU
-	default n
-	help
-	  Enable MPU
-
 source "arch/arm/soc/st_stm32/*/Kconfig.soc"

arch/arm/soc/st_stm32/common/Makefile

@@ -1 +0,0 @@
-obj-$(CONFIG_STM32_ARM_MPU_ENABLE) += arm_mpu_regions.o

arch/arm/soc/st_stm32/stm32f1/Kconfig.defconfig.stm32f103xb

@@ -0,0 +1,19 @@
+# Kconfig - ST Microelectronics STM32F103RB MCU
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if SOC_STM32F103XB
+
+config SOC
+	string
+	default stm32f103xb
+
+config NUM_IRQS
+	int
+	default 59
+
+endif # SOC_STM32F103XB
+

arch/arm/soc/st_stm32/stm32f1/Kconfig.defconfig.stm32f103xe

@@ -0,0 +1,19 @@
+# Kconfig - ST Microelectronics STM32F103VE MCU
+#
+# Copyright (c) 2016 Open-RnD Sp. z o.o.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if SOC_STM32F103XE
+
+config SOC
+	string
+	default stm32f103xe
+
+config NUM_IRQS
+	int
+	default 68
+
+endif # SOC_STM32F103XE
+