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Author SHA1 Message Date
Anas Nashif
fcb9144dca release: Zephyr 1.8.0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-15 22:25:54 -04:00
Anas Nashif
dba5033038 release: minor enhancements
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-15 22:25:54 -04:00
Anas Nashif
c718fcd6b7 release: update sanitycheck data
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-15 21:58:55 -04:00
David B. Kinder
9db36b838e doc: release-notes: cleanup
Fixed misspellings, cleanup summary (removed "changes go here..."
marker, removed known-issues/workaround section place holder

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-14 22:19:35 -04:00
Johan Hedberg
547af0c07a doc: release-notes: Add mention of micro:bit display driver
Support for the 5x5 LED display on the BBC micro:bit makes the board
much more usable, so it's worth to mention it in the release notes.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2017-06-14 13:49:16 -04:00
Anas Nashif
62b98d7086 release: Update release notes
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-14 10:28:23 -04:00
Anas Nashif
9d2fd30f44 samples: Fix sample link
Tempture -> Temperature

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-14 09:32:29 -04:00
Carles Cufi
9aed792835 doc: Remove micro:bit Pong game from release notes
It did not make the 1.8 release, was added by mistake.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-06-14 09:28:13 -04:00
Anas Nashif
2f39cea343 release: Tag 1.8.0-rc4
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-13 21:44:14 -04:00
David B. Kinder
71bc2e1746 doc: fix board/sample broken links
Some files have moved from their original location, or are no longer
available.  For the mbedtls samples, tweak the link to point to a page
where links for current and previous downloads can be found.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-13 21:44:14 -04:00
David B. Kinder
72ddd52eb2 doc: fix misspellings in docs
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-13 21:44:14 -04:00
Carles Cufi
d389492199 doc: Fill the Bluetooth section in the 1.8 release notes
Used the following command to get the full list of changes:

(v1.8-branch) $ git log v1.7.0.. subsys/bluetooth/

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-06-13 10:36:56 -04:00
Jukka Rissanen
8d963ce722 doc: Add networking changes to 1.8 release note
Add general description of network stack changes in v1.8 and
two IEEE 802.15.4 driver additions in Drivers section.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-06-13 08:44:24 -04:00
Inaky Perez-Gonzalez
36075ec42c scripts: look for files with no licensing info
Bash hack that will parse the list of files known to git, filter the
ones for which we think we have licensing info, filter trivial ones
and print the non-compliant ones to stdout:

$ cd WHEREVER/zephyr.git
$ scripts/scan-no-license.sh  > no-license
I: 6327 files total
I: 3568 after filtering known issues
I: 3568 files before, 1828 after filtering token 'SPDX-License-Identifier'
I: 1828 files before, 1027 after filtering token 'Copyright'
I: 1027 files before, 1023 after filtering token 'License'
I: 1023 files before, 1017 after filtering token 'licenseText'
I: 1017 files before, 78 after filtering token '([Cc])'
I: 78 files without license
$ head no-license
arch/nios2/soc/nios2f-zephyr/cpu/ghrd_10m50da.qsys
arch/nios2/soc/nios2f-zephyr/cpu/ghrd_10m50da.qws
arch/nios2/soc/nios2f-zephyr/cpu/ghrd_10m50da.sof
arch/nios2/soc/nios2f-zephyr/cpu/ghrd_10m50da.sopcinfo
arch/nios2/soc/nios2f-zephyr/cpu/ghrd_10m50da_top.v
...

Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
2017-06-13 08:31:56 -04:00
ruuddw
c6e91f55cc Create release-notes-1.8.rst 2017-06-12 12:18:08 +02:00
Jukka Rissanen
cb7b274428 net: tcp: Check pkt before sending RESET
In certain TCP states we should not try to send RESET segment
to peer. So check this and do not try to use NULL pkt to send
a message.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-06-09 09:06:48 -04:00
Jukka Rissanen
ba9b133979 samples: net: Fix README.rst file documentation
Various network samples contained QEMU slip setup instructions
or those instructions were missing. A reference doc in
doc/subsystems/networking/qemu_setup.rst file already has the
setup instructions for QEMU. So add a reference to that file
in samples/net/*/README.rst files and remove unnecessary slip
setup instructions in relevant files.

Fix various typos in readme files at the same time.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-06-09 09:06:48 -04:00
Ravi kumar Veeramally
78d7b40548 net: 6lo: Fix source address uncompression
When src and dst addresses are compressed based on context
information, uncompression method should verify CID bit,
SAC and DAC bits and context ID's. But it has missed some
cases which resulted in invalid uncompressed IPv6 header.

e.g. CID is set, SAC is 0 and DAC is 1 and context id's provided.
Uncompression method assumed that src address is compressed based
on context information but it is not.

Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
2017-06-09 09:06:48 -04:00
Ravi kumar Veeramally
fc84b73ff4 net: rpl: Update RPL header
Empty RPL HBH header will be inserted while finalizing IPv6 packet
but updated after finding nexthop and sent the packet. In case of
Bluetooth or multicast dst address it was missed. Resulted in
empty RPL HBH header and packet dropped at peer node. It should
be updated in all circumstances.

Jira: ZEP-2088

Signed-off-by: Ravi kumar Veeramally <ravikumar.veeramally@linux.intel.com>
2017-06-09 09:06:48 -04:00
Jukka Rissanen
4c206f288b net: https: Allow mbedtls debugging for https-server
The mbedtls debugging function was set before the ssl config
struct was initialized. This meant that it was not possible
to activate mbedtls debug prints. This commit sets the debug
print option after the config struct has been initialized.

Fixed also the debug prints which print extra \n which looks
very bad in debugging outputs.

This commit does not enable mbedtls debugging, it just makes it
possible to output mbedtls debug prints. In order to get mbedlts
debug prints one needs to do this:
* set DEBUG_THRESHOLD to >0 in http_server.c
* enable CONFIG_NET_DEBUG_HTTP in project config file
* enable MBEDTLS_DEBUG_C in mbedtls config file (see file pointed
  by CONFIG_MBEDTLS_CFG_FILE option)
* in qemu, one needs to increase the size of the available RAM,
  this setting does the trick, CONFIG_RAM_SIZE=300

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-06-09 09:06:48 -04:00
Paul Sokolovsky
b5cfd9a56c net: context: Operations on unused context should lead to EBADF.
Semantics of ENOENT error as used previously is "named entity not
found", whereas for "I/O handle is not valid", there's EBADF. For
example, POSIX/SUSV2 doesn't even list ENOENT as a possible error
for accept(), connect(), recv(), etc. whereas it lists EBADF, e.g.:
http://pubs.opengroup.org/onlinepubs/7908799/xns/connect.html

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2017-06-09 09:06:48 -04:00
Leandro Pereira
078bf1c669 samples: dns_resolve: Clarify documentation about DNS configuration
Add clarification that the DNS server configuration must be edited in
the respective prj.conf file.

JIRA: ZEP-2040
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-09 09:06:48 -04:00
David B. Kinder
43fb7de3aa doc: starting draft for 1.8 release notes
Draft of 1.8 release notes with heading and jira items from
draft doc. Added 1.8 release notes to index.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-09 09:06:48 -04:00
Andrew Boie
1505b05ff9 tests: context: move idle test to the end
On some devices, when k_cpu_idle() was called we were getting
interrupts that were not the timer interrupt. On bbc_micro
a power clock control driver interrupt was happening instead
and k_cpu_idle() was returning without the system tick advancing,
failing the test.

The clock control interrupts seem to only happen early in device
boot; moving the idle test much later lets the test pass on this
board (and likely all other NRF5 based boards).

Issue: ZEP-2257
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-09 09:06:48 -04:00
Anas Nashif
a76363fa9a tests: remove obsolete usage of defrag
Also increase ISR stack to make it run on Quark D2000 CRB.

Jira: ZEP-2224
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-09 09:06:48 -04:00
Kumar Gala
711aebf96a toolchain.gccarmemb: Fix support for where to find newlib
When we build with newlib enabled and utilizing one of the other
variants (like having floating point enabled) we need to have the proper
library path setup to find the library.  This is mimicked after what we
do in Makefile.toolchain.zephyr for newlib.

Issue: ZEP-2240

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-09 09:06:48 -04:00
Andrew Boie
d2e5bf4f46 stack_sentinel: hang system on failure
Stack sentinel doesn't prevent corruption, it just notices when
it happens. Any memory could be in a bad state and it's more
appropriate to take the entire system down rather than just kill
the thread.

Fatal testcase will still work since it installs its own
_SysFatalErrorHandler.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-09 09:06:48 -04:00
Andrew Boie
ec882761fe tests: fatal: increase coverage
- _SysFatalErrorHandler is supposed to be user-overridable.
The test case now installs its own handler to show that this
has happened properly.

- Use TC_PRINT() TC_ERROR() macros

- Since we have out own _SysFatalErrorHandler, show that
k_panic() works

- Show that _SysFatalErrorHandler gets invoked with the expected
reason code for some of the scenarios.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-09 09:06:48 -04:00
Andrew Boie
a68f8d106c k_oops: force unlock IRQs on ARMv7M
Fixes an issue where if a thread calls k_panic() or k_oops()
with interrupts locked, control would return to the thread
and it would only be aborted after interrupts were unlocked
again.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-09 09:06:48 -04:00
Andrew Boie
3179df55e1 arches: declare _SysFatalErrorHandler __weak
This function is intended to be easily overridable by applications.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-09 09:06:48 -04:00
Andrew Boie
8da09cf5ca stack_sentinel: change cooperative check
One of the stack sentinel policies was to check the sentinel
any time a cooperative context switch is done (i.e, _Swap is
called).

This was done by adding a hook to _check_stack_sentinel in
every arch's __swap function.

This way is cleaner as we just have the hook in one inline
function rather than implemented in several different assembly
dialects.

The check upon interrupt is now made unconditionally rather
than checking if we are calling __swap, since the check now
is only called on cooperative _Swap(). The interrupt is always
serviced first.

Issue: ZEP-2244
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-09 09:06:47 -04:00
Andrew Boie
2bd1d0175a frdm_k64f: default to pyocd.sh for flashing/debug
The wiki directions indicate that this script should be used,
and openocd.sh doesn't even work. Switch to pyocd.sh by default.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-09 09:06:47 -04:00
Andrew Boie
a9cdbc8069 sam3x: report correct number of IRQ priority bits
The Sam3x HAL defines __NVIC_PRIO_BITS to 4.
Fixes an issue where interrupt priorities and masking
were not being done correctly.

Issue: ZEP-2243
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-09 09:06:47 -04:00
Anas Nashif
34f52d9be3 license: add missing licenses and copyright
We were missing license boilerplate in many files, add them

Jira: ZEP-1464

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-09 09:06:47 -04:00
Sharron LIU
a3e60396bf samples: static_lib: conditional assign BOARD (?=)
The sample app "static_lib" is very important to Zephyr user, which
demonstrate how to build and link a static lib.
ISSM team wanted to integrate this app in their IDE for quark platforms.
However they find the in "static_lib/hello_world/Makefile" BOARD is
hardcoded as qemu_x86.

This patch supports other BOARD passed from build command.
I have verified this app working fine @Arduino101.

Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-06-09 09:06:47 -04:00
Andrew Boie
50efafd605 tests: context: allow 2 ticks of slop
The hard-coded value of 10ms doesn't take the system configured
amount of ticks per second, nor does it account for an unlucky
tick advance which causes the test to fail very intermittently
in QEMU.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-08 18:25:27 -04:00
Andrew Boie
252eccc36e tests: context: make some failures less ambiguous
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-08 18:25:27 -04:00
David B. Kinder
7964d3f75f doc: fix linenum references in api example
fixed literalinclude warning that referenced beyond end of file and
added lineno-start option to show correct line number of included file

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-06-08 18:25:27 -04:00
Sharron LIU
9eeeb62b59 samples: fixed typo in README.rst
Per ISSM team feedbacks:
“demostrating” >> “demonstrating”
“demonstates” >> ”demonstrates”

Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-06-08 18:25:27 -04:00
Andrew Boie
b0a7df3de7 riscv32: update time slice before swap
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-08 18:25:27 -04:00
Andrew Boie
6a74582297 nios2: reset timeslice on interrupt-induced swap
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-08 18:25:27 -04:00
Andrew Boie
90b520a76a schedule_api: don't exclude Nios II
Nothing about this test requires tickless idle and it's not even
turned on in prj.conf.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-08 18:25:27 -04:00
Andrew Boie
289c5095d4 kernel: fix short time-slice reset
The kernel tracks time slice usage with the _time_slice_elapsed global.
Every time the timer interrupt goes off and the timer driver calls
_nano_sys_clock_tick_announce() with the elapsed time, this is added to
_time_slice_elapsed. If it exceeds the total time slice, the thread is
moved to the back of the queue for that priority level and
_time_slice_elapsed is reset to zero.

In a non-tickless kernel, this is the only time _time_slice_elapsed is
reset.  If a thread uses up a partial time slice, and then cooperatively
switches to another thread, the next thread will inherit the remaining
time slice, causing it not to be able to run as long as it ought to.

There does exist code to properly reset the elapsed count, but it was
only compiled in a tickless kernel. Now it is built any time
CONFIG_TIMESLICING is enabled.

Issue: ZEP-2107
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-08 18:25:27 -04:00
Anas Nashif
44b9743c6c release: Tag 1.8.0-rc3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-07 21:49:23 -04:00
chunlin
61d3eef9b7 arm: core: mpu: Prevent updating unexpected region
The REGION bits (bit[3:0]) of MPU_RBAR register can specify the number
of the region to update if the VALID bit (bit[4]) is also set.

If the bit[3:0] of "region_addr" are not zero, might cause to update
unexpected region. This could happen since we might not declare stack
memory with specific alignment.

This patch will mask the bit[4:0] of "region_addr" to prevent updating
unexpected region.

Signed-off-by: Chunlin Han <chunlin.han@linaro.org>
2017-06-07 13:17:12 -04:00
Andrew Boie
65b1859e85 gccarmemb: don't assume 'dtc' is in /usr/bin
Just search for it in the system PATH.

Issue: ZEP-2211
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-07 10:20:27 -04:00
Andrew Boie
caca8c0351 printk: fix printing of long long types
64-bit types were not being handled properly and depending on the
calling convention could result in garbage values being printed.

We still truncate these to 32-bit values, the predominant use-case
is printing timestamp delta values which generally fit in a 32-bit
value. However we are no longer printing random stuff.

Test case for printk() updated appripriately to catch this regression.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-07 10:20:27 -04:00
Harry Jiang
7b5506d437 dts: 96b_carbon: Fix the model name and compatible
Signed-off-by: Harry Jiang <explora26@gmail.com>
2017-06-07 10:20:27 -04:00
Justin Watson
21f4faef01 boards: arm: arduino_due: Added doc. image for the Arduino Due.
Signed-off-by: Justin Watson <jwatson5@gmail.com>
2017-06-07 10:20:27 -04:00
Justin Watson
2cf1c0bc0e boards: arm: Added doc. image for the SAM E70 Xplained.
Signed-off-by: Justin Watson <jwatson5@gmail.com>
2017-06-07 10:20:27 -04:00
Carles Cufi
79f2098996 doc: getting_started: Add WSL instructions
Having tried and tested building Zephyr using the standard SDK on
Windows 10 using the new WSL (Windows Subsystem for Linux), add the
documentation so that others can benefit from the functionality.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-06-07 10:20:27 -04:00
Anas Nashif
d056cecf43 gitlint: Ignore signed-off-by line
When checking for line length limits, ignore lines with Signed-off-by.
Some developers have a long name that would not fit within the limits.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-07 10:20:27 -04:00
Harry Jiang
b223f6ae9a sensor: lps22hb: fix the pressure sensor fractional value
Signed-off-by: Harry Jiang <explora26@gmail.com>
2017-06-07 10:20:27 -04:00
Andrew Boie
11a3675f48 doc: add interrupt implementation details
Issue: ZEP-634
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-07 10:20:27 -04:00
Andrew Boie
74824060ce samples: restore cpp_synchronization test
Issue: ZEP-2172
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-07 10:20:27 -04:00
Andrew Boie
6a2084efc8 Makefile.toolchain.zephyr: fix C++ on Xtensa
Need to set CXXFLAGS just like we did CFLAGS.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-07 10:20:27 -04:00
Carles Cufi
a4a98908b7 build: Fix DTC overlay file paths on MSYS2
On MSYS2, the #include paths for GCC need to be in native format
(Windows-style paths) since GCC is a native Windows application and
therefore requires standard paths.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-06-07 10:20:27 -04:00
David Brown
d3c6f0fb73 dts: Allow override of dts overlay directory
Instead of requiring the dts overlay files to be at the top level
directory (where make is invoked), allow this default to be overridden
by setting DTS_OVERLAY_DIR.  This is a directory where the overlays
themselves (which are still named $(BOARD_NAME).overlay) will live.

Change-Id: Ie9796afbd27971650b7636a36149c0d1f8e2b9fb
Signed-off-by: David Brown <david.brown@linaro.org>
2017-06-07 10:20:27 -04:00
Andy Gross
1a6c4b1133 scripts: Makefile.lib: Add dependency for DTS overlay
This patch adds a dependency for the DTS overlay so that the DTS is
compiled when the state of the overlay file changes.

Change-Id: I2affe67f90f56b1d97384d5cd4e3026abed24253
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-07 10:20:27 -04:00
Vinayak Kariappa Chettimada
ae8c659674 arch: arm: Fix compile error on ARMv6-M SoCs with TICKLESS_KERNEL
pop {lr} instruction is not supported in ARMv6-M, fixed by
using pop {r0}; mov lr, r0; instructions.

Jira: ZEP-2222

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-06-07 10:20:27 -04:00
Maureen Helm
2b358a3ab5 arm: nxp: mpu: Return constant number of mpu regions
The original implementation of _get_num_regions() parsed the CESR[NRGD]
register field to determine the number of mpu region descriptors
implemented in hardware. There was a possible path in the code to return
zero, which would cause underflow later on in arm_core_mpu_configure().
Coverity complained despite an assert to catch this condition. Instead,
use a preprocessor macro from mcux that defines the number of mpu region
descriptors.

Coverity-CID: 169811
Jira: ZEP-2208

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-06-03 10:57:49 -04:00
Paul Sokolovsky
e3917cee62 drivers: serial: Clarification for uart_fifo_fill()/read() calls
As they are part of interrupt-driver API, they must be called from
an ISR. That means that calling it outside IST may not have a desired
effect, and vice-versa, not calling them from ISR can lead to issues.

The patch also eleborates/fixes description of uart_irq_rx_ready().

Jira: ZEP-2016

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2017-06-03 09:59:27 -04:00
Andy Gross
1305ad9071 dts: yaml: Add YAML template file
This patch adds a YAML template file that describes the format of a
Zephyr device tree YAML specification.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-03 09:59:27 -04:00
Andy Gross
2747242f20 doc: Add Device Tree documentation
This patch adds documention for device tree development in Zephyr.  This
includes a description of device tree, how it is integrated into Zephyr,
and other related information.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-03 09:59:27 -04:00
Andrew Boie
4cc4dc6e95 arm: fix k_oops on armv6 with interrupts locked
Calling 'svc' on ARMv6 causes a hard fault if interrups are locked.
Force them unlocked before making the svc call.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-03 09:59:27 -04:00
Andrew Boie
1ea60c5e03 arm: implement __svc on Cortex M0
This is needed for irq_offload() and k_oops()/k_panic()

Issue: ZEP-2221
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-03 09:59:27 -04:00
Andrew Boie
048410ff62 bbc_microbit: fix 'make debugserver'
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-03 09:59:27 -04:00
Vinayak Kariappa Chettimada
b6a7908744 drivers: timer: Fix nRF RTC timer _timer_cycle_get_32
Fix nRF RTC timer from returning more than actual cycles
in _timer_cycle_get_32, under race condition when ISR
announces to kernel.

Jira: ZEP-2229

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-06-03 09:59:27 -04:00
Tomasz Bursztyka
d8e4a5cfd9 api/spi: Change transceive functions signature
Instead of NULL terminated buffer arrays, let's add a parameter for each
that tells the number of spi_buf in it.

It adds a little bit more complexity in driver's side (spi_context.h)
but not on user side (bufer one has to take care of providing the NULL
pointer at the end of the array, now he requires to give the count).

This will saves a significant amount of bytes in more complex setup than
the current dumb spi driver sample.

Fix and Use size_t everywhere (spi_context.h was using u32_t).

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-06-03 09:59:27 -04:00
Anas Nashif
46b9ba561a quark_d2000_crb: increase default stack size
Increase to 1024 to get more tests and sample running on this device
with only 8K of SRAM.

Change thread stack size in the mslab test to make it fit into this
board.

Jira: ZEP-2079
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-03 09:59:27 -04:00
Anas Nashif
0a4d8b8048 Revert "x86: call gen_idt with $ZEPHYR_BASE too"
This reverts commit 37f4178f58.

This change builds gen_idt in the zephyr project tree instead of
building it in outdir of the application. The build process should all
happen inside outdir and no binaries should be placed in the zephyr
tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-03 09:59:27 -04:00
Jukka Rissanen
1a2fb65eac net: tcp: Timeout memory allocations
Instead of waiting forever for a free net_buf, set a timeout to
the allocations (500 ms). This way the application will not be
blocked by memory exhaustion.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-06-02 08:44:36 -04:00
Jukka Rissanen
7a2634a68a net: http: Avoid unnecessary net_pkt error print
In some cases the net_pkt can be null when freeing it,
this will print error from net_pkt library. Avoid this by
checking the value of net_pkt before calling net_pkt_unref().

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-06-02 08:44:36 -04:00
Jukka Rissanen
9c8f2ac93b net: http: Use random source port when connecting
If we re-connect to same peer server, then we should select a new
source port. Noticed that if the same source port as before is
used for the new connection, the peer might drop the packet. This
was seen when connecting to Linux peer.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-06-02 08:44:36 -04:00
Jukka Rissanen
0b0dedea40 samples: net: http_client: Increase the number of buffers
The number of RX and TX buffers is increased to 64 as the
earlier limit can cause memory exhaust in some cases.

Jira: ZEP-2223

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-06-02 08:44:36 -04:00
Leandro Pereira
e976465a10 net: tcp: Limit number of segment retransmissions
Defines a new tunable, CONFIG_NET_TCP_RETRY_COUNT, that determines the
number of segment retransmissions that the IP stack will attempt to
perform before resetting the connection.

The default value is 9 retransmissions, which amounts to 1:42 minutes,
as close as possible to the minimum recommended by RFC1122.

Jira: ZEP-1956, ZEP-1957

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-02 08:44:36 -04:00
Jukka Rissanen
45d7231eb4 samples: net: dtls_client: Fix Coverity warning
This fix is basically a no-op as the rx_buf pointer cannot be null
in practice, but in order to avoid Coverity complaining about
it add some null pointer checks to the UDP handling code.

Coverity-CID: 170124
Jira: ZEP-2235

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-06-02 08:44:36 -04:00
Jukka Rissanen
230c7f4aac samples: net: zperf: Fix llvm compiler warnings
Jira: ZEP-1884

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-06-02 08:44:36 -04:00
Johan Hedberg
2c1cb041f3 Bluetooth: L2CAP: Remove redundant checks for chan->ops
It's mandatory to set chan->ops so explicit checks for it are
redundant. What's worse, inconsistent checking for this triggers
static code analyzer warnings. This patch fixes Coverity CID 151984.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2017-06-01 10:29:20 -04:00
Jaganath Kanakkassery
57d1c919af Bluetooth: SDP: Fix possible out of bound memory access
buf->len should be validated before accessing it since remote can
send invalid frame_len which can result in out of bound memory
access.

This also fix the len check wrt cstate, since current check is
not considering the cstate length size and frame_len size.

Jira: ZEP-2110
Signed-off-by: Jaganath Kanakkassery <jaganathx.kanakkassery@intel.com>
2017-06-01 10:29:20 -04:00
Luiz Augusto von Dentz
e9adcd7e96 Bluetooth: GATT: Fix not queuing writes to CCC
In order to properly queue request there need to be a bt_att_req
storage but none of the calls to gatt_write_ccc were using the params
causing gatt_send to use bt_att_send and not bt_att_req_send.

To fix this now all the callers of gatt_write_ccc do set the params
properly but this means that bt_gatt_unsubscribe has to wait for it
to be completed before the application can reuse the
bt_gatt_subscribe_params.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2017-06-01 10:29:20 -04:00
Anas Nashif
7d8dde77df release: Zephyr 1.8.0-rc2
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-31 20:02:48 -04:00
Leandro Pereira
80881be124 samples: mqtt_publisher: Try connecting a few times before giving up
Waiting for an NET_EVENT_IF_UP before trying to connect isn't sufficient
in some cases; for instance, on devices using the MCUX HAL, such as the
FRDM-K64F, the interface will have the NET_IF_UP flag set even though
the link negotiation didn't yet complete.

Executing this sample on such board will produce the following output.
Notice the "Enabled 100M..." message right after trying to connect.

    [dev/eth_mcux] [DBG] eth_0_init: MAC 00:04:9f:6f:91:da
    net_context_connect error Is the server (broker) up and running?
    [publisher:247] network_setup: -60 <ERROR>

    Bye!  [dev/eth_mcux] [INF] eth_mcux_phy_event: Enabled 100M
    full-duplex mode.

Even though the returned error is ETIMEDOUT, increasing
net_context_connect()'s timeout parameter to several seconds isn't
sufficient; other steps performed by network_setup() after the link has
been fully established are necessary.  As a stopgap measure, try
connecting a few times before giving up (more than one connection
attempt should be made by application in most cases, anyway.)

It might be the case that we need events to monitor ethernet link
(re)negotation in addition to the NET_IF_UP bit.

Jira: ZEP-2036
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-31 18:51:46 -04:00
Andy Gross
dbdbe9b38f Makefile: Add dts config include file
This patch adds a dts config include file that is sourced during builds.
The config file contents are key value pairs derived from the DTS board
descriptions.

Jira: ZEP-2119

Change-Id: I4d50e795ba776645b56f0b83410cbb5b0a8fd4fa
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-05-31 16:08:15 -04:00
Anas Nashif
8cc329b97b dts: generate definitions for build system
This will generate an additional file that can be sourced by the build
system to expose definitions generated by device tree and used for
flashing and debugging targets.

Change-Id: I184e247f0a8dbd1a4a42dd4b02ea01f2caa70533
Jira: ZEP-2119
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-31 16:08:15 -04:00
Anas Nashif
057fbc8cb9 dts: make extract script take options
Use argeparse for options and add a fixup option to add on top of
generated file. This was previously done in the top Makefile and was
generated defines outside of the header main if statement.

Jira: ZEP-2147

Change-Id: If65f34a11de27baa770d4ce0ef4fca2abbd30258
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-31 16:08:15 -04:00
Jukka Rissanen
c16b0f12ca net: http: Parsing state was not cleared
If we received a bad HTTP request, then subsequent good requests
were also returning 400 error code. The parsing state needs to
be initialized after each received HTTP request.

Jira: ZEP-2181

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 16:08:15 -04:00
Marti Bolivar
08c58b50d4 tests: json: test JSON_OBJ_DESCR_*_NAMED
Add tests for new macro helpers that allow JSON field names to differ
from their corresponding C struct field names. These pass.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-05-31 16:08:15 -04:00
Marti Bolivar
f083787f5c lib: json: add JSON_OBJ_DESCR_*_NAMED variants
The set of valid JSON field names is larger than the set of C
identifiers. This can result in structure field names which pack
decoded JSON values which necessarily differ from the field names in
the JSON.

Support this by adding _NAMED variants to each of the JSON_OBJ_DESCR_*
helper macros. For example, JSON_OBJ_DESCR_PRIM_NAMED allows users to
declare a descriptor field for a primitive type, whose structure field
name is different from the JSON field name.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-05-31 16:08:15 -04:00
Marti Bolivar
e2b8a7b149 tests: json: fix sense of test result string
The other test strings are worded in the positive sense; keep things
consistent.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-05-31 16:08:15 -04:00
Marti Bolivar
81e9303367 lib: json: fix JSON_OBJ_DESCR_ARRAY Doxygen example
This is missing two required arguments.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-05-31 16:08:15 -04:00
Anas Nashif
271e115b18 doc: emphasize usage of MSYS2 MSYS Shell
Some users started the wrong shell (MinGW) and ended up having build
issues, added a note about starting the right shell.

Jira: ZEP-2004
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-31 16:08:15 -04:00
Anas Nashif
0cd9f3f8f2 doc: also require dtc to be installed for linux
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-31 16:08:15 -04:00
Anas Nashif
d1ef064c2e doc: update macOS getting started documentation
Fixed documentation and updated config files for xtools to be used with
the latest version of crosstool-ng (1.23)

Jira: ZEP-616, ZEP-2146
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-31 16:08:15 -04:00
Anas Nashif
b76eb5b461 xtools: add new configurations for xtools 1.23
Remove arm.config, we should be using the official ARM cross compiler
instead.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-31 16:08:15 -04:00
Anas Nashif
6d59a378e7 doc: remove links to wiki
Wiki is being obsoleted, so remove any links that might become dead
really soon.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-31 16:08:15 -04:00
Leandro Pereira
1a1a19f17d ieee802154_shell: Only accept channels within expected range
Fixes the following issue:
   "In expression 1UL << chan - 1U, left shifting by more than 31
    bits has undefined behavior.  The shift amount, chan - 1U, is
    4294967295."

Coverity-CID: 167140
Jira: ZEP-2131
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-31 16:08:15 -04:00
Adithya Baglody
37bbe406a5 tests: benchmark: Fixed build error from icx toolchain.
The error was generated by a piece of code that is
not currently being used. This piece of code was kept to measure
the overhead caused by the benchmarking code on x86.

JIRA:ZEP-2160

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-05-31 16:08:15 -04:00
Marti Bolivar
de7fb4d44b stack.h: add missing include guard
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-05-31 16:08:15 -04:00
Jukka Rissanen
df3d38caa4 net: shell: Enhance IPv6 fragmentation debugging prints
Print also network buffers that are allocated by the IPv6
fragment handler. This is very useful in debugging.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
70253f2fff tests: net: ipv6: Test IPv6 fragmentation sending
These tests make sure that the IPv6 fragments are build correctly
when a large IPv6 packet is being sent.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
3f2a412707 net: ipv6: Make max number of fragmented pkt configurable
If the user really wants, it is possible to increase the
maximum size of the fragmented packet. According to RFC 2460
chapter 5, we do not need to accept larger than 1500 byte IPv6
packets, so the max pkt limit is set to 2. But if really needed
the limit can be raised by defining NET_IPV6_FRAGMENTS_MAX_PKT
to some new value. Currently there is no Kconfig option for
doing this as it is unlikely that this is needed.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
46f26e1350 net: ipv6: Fix fragmentation cancellation
The cancellation of reassembly did not work as expected because
K_WORK_INITIALIZER() did not setup the timeout function properly.
So do the timer initialization at runtime instead.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
6add190cda net: ipv6: Fix the IPv6 packet fragmentation sending
The IPv6 fragmentation was not working properly when the large
IPv6 packet was being sent. There is unit tests in next commit
that will test the IPv6 fragmentation sending.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
900d404260 net: ipv6: Memory leak during fragment reassembly
If the fragmented IPv6 packet was very large, we could run out
of resources. When that happened, we leaked the memory for the
pending fragments that were waiting reassembly.

Jira: ZEP-2166

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
82a630e50c net: ipv6: Default reassembly timeout set to 5 sec
The previous default 60 seconds is way too long for our limited
amount of memory. It might be that the 5 sec is still too long
but that can be changed in the future.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Luiz Augusto von Dentz
a1a97d3ebf net: shell: Remove extra help command
Shell itself already have a help command, so instead of creating a net
specific help just fill the help description of each command.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2017-05-31 08:06:47 -04:00
Luiz Augusto von Dentz
1dbe98d7fb net: shell: Move SHELL_REGISTER out of net_shell_init
Shell modules are registered at link time thus it makes no sense to
leave it behind net_shell_init.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
9ac9d4ac56 samples: net: coaps_client: Fix testcase.ini
The platform list was incorrectly set.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
740d7e034f samples: net: coaps_client: Fix compile issues
The coaps_client was bit rotted and did not compile
correctly.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
a6ca48d77e samples: net: mbedtls_dtlsclient: Fix testcase.ini
The platform list was incorrectly set.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
fc9ba5feb4 samples: net: mbedtls_dtlsclient: Fix compile issues
Some net_pkt API changes were not done for this sample.

Jira: ZEP-2072

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
064e79b816 net: http: Handle HTTPS connection closing gracefully
If the HTTPS connection is closed, then properly handle call to
HTTP parser init in case of error and also remove any pending
data that belong to old connection.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
b4e94aee4c net: ipv6: Skip unknown options in NS message
If we receive unknown option in neighbor solicitation message,
then skip those properly. Old code did not check the length of
the extension options which could cause infinite loop.

Jira: ZEP-2174

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
de0568905e net: pkt: Handle out-of-mem case properly
If we could not split the packet properly, make sure that the
fragments that we managed to allocate are unreffed and marked
as NULL.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
2fa3b65ed4 net: Print characters in hexdump
Print also the character when hexdumping a memory area.
This is useful so that one does not need to convert hex
values to characters in head. Unprintable chars are printed
as '.'

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
6edd521818 sample: net: http: Add Basic auth support to server sample
Basic auth support was missing from HTTP server sample.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Jukka Rissanen
f37eab2ea3 net: http: Add timeout to HTTP server response
Allow the caller to delay the closing of the HTTP connection
for a number of milliseconds. The purpose for this is that
the client can send still some data back to us for a short
period of time.

This is needed for example for Basic authentication so that
server is able to receive authentication values back.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-31 08:06:47 -04:00
Johan Hedberg
5eb8da7c50 Bluetooth: ATT: Fix canceling ATT timeout upon response
For some write requests, such as CCC, the code doesn't use an ATT
request context but we still need to clear the request timeout when
the response comes. Move the k_delayed_work_cancel() call to the right
place and add some debug logs that helped pinpoint this issue.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2017-05-30 07:02:13 -04:00
Vinayak Kariappa Chettimada
bdeae8e12b Bluetooth: controller: Fix failing fast encryption setup feature
In commit c41d3edda when implementing the alternative
encryption setup implementation, the original fast
encryption setup implementation was broken. When host is
slow in responding to LTK request, the controller asserted
when fast encryption implementation is selected. This is
now fixed.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-05-30 07:02:13 -04:00
Vinayak Kariappa Chettimada
b72f23cd6d Bluetooth: controller: Fix CSA#2 assert
Fix the assert in the controller during connection setup
when peer does not support CSA#2 feature and free Rx buffer
queue does not have enough buffers to generate CSA event.

The assert was reproduced by turning on advertisement
indication and scan request notification features in the
controllers advanced features, and a peer that does not
support CSA#2 initiated a connection.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-05-30 07:02:13 -04:00
Carles Cufi
ee64472a90 Bluetooth: Consolidate all role configuration
Since role support is fundamental to both the Host and the Controller,
move the role configuration options to the top-level file and rename
them to fit the GAP specification, avoiding confusion between GAP and LL
names.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-05-30 07:02:13 -04:00
Carles Cufi
ba38320fb0 Bluetooth: controller: Conditionally include conn-related options
Only include connection-related options when CONFIG_BLUETOOTH_CONN is
selected, since otherwise this can lead to inconsistencies between
features and supported commands.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-05-30 07:02:13 -04:00
Johan Hedberg
752a440ed8 Bluetooth: Fix missing test for BLUETOOTH_CONN with DLE
There's no point in doing anything about DLE if connection support is
not enabled.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2017-05-30 07:02:13 -04:00
Vinayak Kariappa Chettimada
c87d6c636d Bluetooth: Auto-update LE data length to max. supported
Added implementation to auto-update LE Data Length to max.
Tx octets supported by the local and peer controllers.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-05-30 07:02:13 -04:00
Vinayak Kariappa Chettimada
46354fe197 Bluetooth: controller: Handle Rej Ext Ind for Length Req PDU
Added implementation to handle an incoming Reject Ext Ind PDU in
response to a sent Length Req PDU.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-05-30 07:02:13 -04:00
Vinayak Kariappa Chettimada
1f5e93aa1d Bluetooth: controller: Fix DLE crossover assert
When initiating Data Length Change at the same instant the
crossover condition was not handled correctly causing the
controller to assert.

This fix will allow crossover of Data Length Update
procedure, and this collison is harmless as per Bluetooth
specification, and gracefully handled by the controller.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-05-30 07:02:13 -04:00
Anas Nashif
c140e27c9d Revert "xtools: get rid of warnings about wrong path"
This reverts commit 96def63f10.

This breaks building with xtools for some reason, removing for now while
we figure out what went wrong.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-29 16:20:31 -04:00
Sharron LIU
f20555c06c tests: kernel: added tests for k_mem_pool_alloc from isr
Added tests to invoke k_mem_pool_alloc() from isr context

Jira: ZEP-1631

Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-05-27 12:12:08 -04:00
Sharron LIU
d4021f87e6 tests: kernel: added tests for timeslice reset
Added test cases to verify timeslice reset among thread context
switching.

Jira: ZEP-948

Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-05-27 12:12:08 -04:00
Adithya Baglody
8fa9c9719a tests: benchmark: app_kernel: Return values from kernel APIs are read.
Static code analysis reported some kernel APIs were used without
reading the return value. Since the benchmark doesn't need error
conditions, a simple read of the values followed by a ARG_UNUSED
is used to handle static code analysis errors.

JIRA: ZEP-2134

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-05-27 12:12:08 -04:00
Leandro Pereira
06fe443f70 tests: clock: Initialize d64 value
CID: 167149
Jira: ZEP-2130
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-05-27 12:12:08 -04:00
Carles Cufi
660886affa Bluetooth: controller: Increase RX prio stack size
Due to several changes in the way stacks are calculated, 320 bytes is no
longer enough for the controller-only build. After measuring usages of
up to 320 bytes (locally) and 376 (reported by Ricardo Salveti), the
stack size is increased by 128 bytes, up to 448 bytes.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-05-27 12:12:08 -04:00
Paul Sokolovsky
7bfe4f58f0 drivers/ethernet/eth_mcux: Fix selection of promisc mode IPv6 workaround
Until we have better solution, we enable promiscuous mode as a
workaround to get IPv6 neighbour discovery going. Kconfig had
typos/thinkos preventing that to work however.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2017-05-27 12:12:08 -04:00
Johan Hedberg
8cac266902 Bluetooth: AVDTP: Remove dead code
The msgtype value is created using 'hdr & 3' which means that the
resulting value can never be greater than 3. This fixes Coverity CID
166771.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2017-05-27 12:12:08 -04:00
Paul Sokolovsky
eaa1bffaa7 tests: net: ipv6: Fix possible NULL pointer dereference behind a macro
As this is a test, it's minor issue, but let's keep Coverity report
clean.

Coverity-CID: 169303

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2017-05-27 12:12:08 -04:00
Jukka Rissanen
f4ad56299d net: zoap: Remove extra null checks
No need to check attr and path variables for null as they
cannot be null.

Coverity-CID: 157595
Coverity-CID: 157602

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-27 12:12:08 -04:00
Jukka Rissanen
2b951bb3fd tests: net: zoap: Add path uri matching tests
Test the match_path_uri() function that was fixed by previous
commit.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-27 12:12:08 -04:00
Jukka Rissanen
ec67534959 net: zoap: Fix NULL pointer access
The code was setting pointer to null and then access it.

Coverity-CID: 157575

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-27 12:12:08 -04:00
John Andersen
b400199240 samples: net: mqtt_publisher: fixed formatting
README.rst had formatting which was making things disappear in the
online documentation.

Signed-off-by: John Andersen <john.s.andersen@intel.com>
2017-05-27 12:12:08 -04:00
Paul Sokolovsky
8bc2d64c5b drivers/ethernet/eth_mcux: Fix extra PHY debug Kconfig name.
Source had CONFIG_ETH_MCUX_PHY_DETAILED_DEBUG, while Kconfig had
CONFIG_ETH_MCUX_PHY_EXTRA_DEBUG. Use the shorter name consistently.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2017-05-27 12:12:08 -04:00
Leandro Pereira
debf010d05 drivers: spi_mcux_dspi: Fix unlikely but possible division by zero
Documentation doesn't specify if this function may return 0, so add an
inexpensive check to account for this.

Jira: ZEP-2135
CID: 160954
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-05-27 12:12:08 -04:00
Patrik Flykt
29c5a9a073 zoap: Include net/net_ip.h when sockaddr is used
Add include file net/net_ip.h as zoap header files use struct
sockaddr.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2017-05-27 12:12:08 -04:00
Anas Nashif
07792c17bd boards: microbit: enable flashing with pyocd
Flash the BBC Micro:Bit with pyocd, just run:

make BOARD=bbc_microbit flash

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-27 12:12:08 -04:00
Michael Scott
0a87a851b5 arm: soc: nxp k6x: mpu: add Bus Master 3 User Mode access bits
Ethernet on K64F is connected via Logical Bus Master 3.
Section 19.3.8 of K64F reference manual establishes bits 20-18
(M3UM) on page 427 as "Bus Master 3 User Mode Access Control".

To fix RWX user mode access via Bus Master 3 when MPU is enabled,
we need to add these bits to the MPU region descriptors.

This fixes ETH0 on K64F when MPU is enabled.

Fix recommended by Maureen Helm <maureen.helm@nxp.com>

Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-05-27 10:11:30 -04:00
Michael Scott
5210f872f3 arm: soc: nxp k6x: mpu: clarify magic numbers for UM/SM defines
Let's clarify what bits are being set by removing magic numbers in the
MPU READ/WRITE/EXECUTE User Mode and Supervisor Mode defines.

Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-05-27 10:11:30 -04:00
Michael Scott
9a00383f3b arm: soc: nordic nRF52: Add MPU support
We now have generic ARM M4 MPU support added to Zephyr.
Let's enable it for use with Nordic nRF52 chips.

Memory Layout was generated from Section 8.3 "Memory
Map" of nRF52 Product Specifications (for both nRF52832
and nRF52840):
0x00000000: Flash
0x10000000: Factory Information Config Registers
0x10001000: User Information Config Registers
0x20000000: SRAM
0x40000000: APB Peripherals
0x50000000: AHB Peripherals
0xE0000000: ARM M4 Private Peripheral Registers

NOT Configured:
0x60000000: External RAM
0x80000000: External RAM
0xA0000000: External Device
0xC0000000: External Device

NOTE: More work will be needed for future Nordic MWU (Memory
Watching Unit) support.

Signed-off-by: Michael Scott <michael.scott@linaro.org>
2017-05-27 10:11:30 -04:00
Piotr Mienkowski
e3fd14b6d5 watchdog: atmel_sam: enable build for all SAM family
atmel_sam watchdog driver was temporarily limited to SAME70
series only. Now that all SAM series are using ASF the
change can be reverted.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-05-27 10:11:30 -04:00
Justin Watson
c87492dbe1 arch: arm: Fix SoC issues with Atmel SAM4S series.
Signed-off-by: Justin Watson <jwatson5@gmail.com>
2017-05-27 10:11:30 -04:00
Vincenzo Frascino
ce4117deb4 arm: core: mpu: Add core support to NXP MPU
This patch add arm core MPU support to NXP MPU driver.

With this feature it is now possible to enable stack guarding on NXP
MPUs.

Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2017-05-27 10:11:30 -04:00
Paul Sokolovsky
2a7a1c84b4 subsys: console: Fix signed vs unsigned char issues.
May lead to warnings/errors with pedantic compilers (like LLVM).

Jira: ZEP-2170

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2017-05-27 10:11:30 -04:00
Anas Nashif
98e14bc67d release: Zephyr v1.8-rc1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-21 19:14:07 -04:00
24318 changed files with 3634578 additions and 2458172 deletions

View File

@@ -1,32 +1,20 @@
--mailback
--no-tree
--emacs
--summary-file
--show-types
--max-line-length=100
--max-line-length=80
--min-conf-desc-length=1
--typedefsfile=scripts/checkpatch/typedefsfile
--ignore BRACES
--ignore PRINTK_WITHOUT_KERN_LEVEL
--ignore SPLIT_STRING
--ignore VOLATILE
--ignore CONFIG_EXPERIMENTAL
--ignore PREFER_KERNEL_TYPES
--ignore PREFER_SECTION
--ignore AVOID_EXTERNS
--ignore NETWORKING_BLOCK_COMMENT_STYLE
--ignore DATE_TIME
--ignore MINMAX
--ignore CONST_STRUCT
--ignore FILE_PATH_CHANGES
--ignore SPDX_LICENSE_TAG
--ignore C99_COMMENT_TOLERANCE
--ignore REPEATED_WORD
--ignore UNDOCUMENTED_DT_STRING
--ignore DT_SPLIT_BINDING_PATCH
--ignore DT_SCHEMA_BINDING_PATCH
--ignore TRAILING_SEMICOLON
--ignore COMPLEX_MACRO
--ignore MULTISTATEMENT_MACRO_USE_DO_WHILE
--ignore ENOSYS
--ignore IS_ENABLED_CONFIG
--exclude ext

View File

@@ -1,145 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
#
# clang-format configuration file. Intended for clang-format >= 4.
#
# For more information, see:
#
# Documentation/process/clang-format.rst
# https://clang.llvm.org/docs/ClangFormat.html
# https://clang.llvm.org/docs/ClangFormatStyleOptions.html
#
---
AccessModifierOffset: -4
AlignAfterOpenBracket: Align
AlignConsecutiveAssignments: false
AlignConsecutiveDeclarations: false
#AlignEscapedNewlines: Left # Unknown to clang-format-4.0
AlignOperands: true
AlignTrailingComments: false
AllowAllParametersOfDeclarationOnNextLine: false
AllowShortBlocksOnASingleLine: false
AllowShortCaseLabelsOnASingleLine: false
AllowShortFunctionsOnASingleLine: None
AllowShortIfStatementsOnASingleLine: false
AllowShortLoopsOnASingleLine: false
AlwaysBreakAfterDefinitionReturnType: None
AlwaysBreakAfterReturnType: None
AlwaysBreakBeforeMultilineStrings: false
AlwaysBreakTemplateDeclarations: false
BinPackArguments: true
BinPackParameters: true
BraceWrapping:
AfterClass: false
AfterControlStatement: false
AfterEnum: false
AfterFunction: true
AfterNamespace: true
AfterObjCDeclaration: false
AfterStruct: false
AfterUnion: false
#AfterExternBlock: false # Unknown to clang-format-5.0
BeforeCatch: false
BeforeElse: false
IndentBraces: false
#SplitEmptyFunction: true # Unknown to clang-format-4.0
#SplitEmptyRecord: true # Unknown to clang-format-4.0
#SplitEmptyNamespace: true # Unknown to clang-format-4.0
BreakBeforeBinaryOperators: None
BreakBeforeBraces: Custom
#BreakBeforeInheritanceComma: false # Unknown to clang-format-4.0
BreakBeforeTernaryOperators: false
BreakConstructorInitializersBeforeComma: false
#BreakConstructorInitializers: BeforeComma # Unknown to clang-format-4.0
BreakAfterJavaFieldAnnotations: false
BreakStringLiterals: false
ColumnLimit: 100
CommentPragmas: '^ IWYU pragma:'
#CompactNamespaces: false # Unknown to clang-format-4.0
ConstructorInitializerAllOnOneLineOrOnePerLine: false
ConstructorInitializerIndentWidth: 8
ContinuationIndentWidth: 8
Cpp11BracedListStyle: false
DerivePointerAlignment: false
DisableFormat: false
ExperimentalAutoDetectBinPacking: false
#FixNamespaceComments: false # Unknown to clang-format-4.0
# Taken from:
# git grep -h '^#define [^[:space:]]*FOR_EACH[^[:space:]]*(' include/ \
# | sed "s,^#define \([^[:space:]]*FOR_EACH[^[:space:]]*\)(.*$, - '\1'," \
# | sort | uniq
ForEachMacros:
- 'FOR_EACH'
- 'FOR_EACH_FIXED_ARG'
- 'RB_FOR_EACH'
- 'RB_FOR_EACH_CONTAINER'
- 'SYS_DLIST_FOR_EACH_CONTAINER'
- 'SYS_DLIST_FOR_EACH_CONTAINER_SAFE'
- 'SYS_DLIST_FOR_EACH_NODE'
- 'SYS_DLIST_FOR_EACH_NODE_SAFE'
- 'SYS_SFLIST_FOR_EACH_CONTAINER'
- 'SYS_SFLIST_FOR_EACH_CONTAINER_SAFE'
- 'SYS_SFLIST_FOR_EACH_NODE'
- 'SYS_SFLIST_FOR_EACH_NODE_SAFE'
- 'SYS_SLIST_FOR_EACH_CONTAINER'
- 'SYS_SLIST_FOR_EACH_CONTAINER_SAFE'
- 'SYS_SLIST_FOR_EACH_NODE'
- 'SYS_SLIST_FOR_EACH_NODE_SAFE'
- 'Z_GENLIST_FOR_EACH_CONTAINER'
- 'Z_GENLIST_FOR_EACH_CONTAINER_SAFE'
- 'Z_GENLIST_FOR_EACH_NODE'
- 'Z_GENLIST_FOR_EACH_NODE_SAFE'
- '_WAIT_Q_FOR_EACH'
#IncludeBlocks: Preserve # Unknown to clang-format-5.0
IncludeCategories:
- Regex: '.*'
Priority: 1
IncludeIsMainRegex: '(Test)?$'
IndentCaseLabels: false
#IndentPPDirectives: None # Unknown to clang-format-5.0
IndentWidth: 8
IndentWrappedFunctionNames: false
JavaScriptQuotes: Leave
JavaScriptWrapImports: true
KeepEmptyLinesAtTheStartOfBlocks: false
MacroBlockBegin: ''
MacroBlockEnd: ''
MaxEmptyLinesToKeep: 1
NamespaceIndentation: Inner
#ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0
ObjCBlockIndentWidth: 8
ObjCSpaceAfterProperty: true
ObjCSpaceBeforeProtocolList: true
# Taken from git's rules
#PenaltyBreakAssignment: 10 # Unknown to clang-format-4.0
PenaltyBreakBeforeFirstCallParameter: 30
PenaltyBreakComment: 10
PenaltyBreakFirstLessLess: 0
PenaltyBreakString: 10
PenaltyExcessCharacter: 100
PenaltyReturnTypeOnItsOwnLine: 60
PointerAlignment: Right
ReflowComments: false
SortIncludes: false
#SortUsingDeclarations: false # Unknown to clang-format-4.0
SpaceAfterCStyleCast: false
SpaceAfterTemplateKeyword: true
SpaceBeforeAssignmentOperators: true
#SpaceBeforeCtorInitializerColon: true # Unknown to clang-format-5.0
#SpaceBeforeInheritanceColon: true # Unknown to clang-format-5.0
SpaceBeforeParens: ControlStatements
#SpaceBeforeRangeBasedForLoopColon: true # Unknown to clang-format-5.0
SpaceInEmptyParentheses: false
SpacesBeforeTrailingComments: 1
SpacesInAngles: false
SpacesInContainerLiterals: false
SpacesInCStyleCastParentheses: false
SpacesInParentheses: false
SpacesInSquareBrackets: false
Standard: Cpp03
TabWidth: 8
UseTab: Always
...

View File

@@ -1,31 +0,0 @@
codecov:
notify:
require_ci_to_pass: yes
coverage:
precision: 2
round: down
range: "70...100"
status:
project: yes
patch: yes
changes: no
#ignore:
# - "tests/**/*"
# - "samples/**/*"
# - "ext/hal/**/*"
parsers:
gcov:
branch_detection:
conditional: yes
loop: yes
method: no
macro: no
comment:
layout: "reach, diff, flags, files, footer"
behavior: default
require_changes: no

View File

@@ -1,75 +0,0 @@
# EditorConfig: https://editorconfig.org/
# top-most EditorConfig file
root = true
# All (Defaults)
[*]
charset = utf-8
end_of_line = lf
insert_final_newline = true
trim_trailing_whitespace = true
max_line_length = 80
# Assembly
[*.S]
indent_style = tab
indent_size = 8
# C
[*.{c,h}]
indent_style = tab
indent_size = 8
# Python
[*.py]
indent_style = space
indent_size = 4
# Perl
[*.pl]
indent_style = tab
indent_size = 8
# YAML
[*.{yml,yaml}]
indent_style = space
indent_size = 2
# Shell Script
[*.sh]
indent_style = space
indent_size = 4
# Windows Command Script
[*.cmd]
end_of_line = crlf
indent_style = tab
indent_size = 8
# Valgrind Suppression File
[*.supp]
indent_style = space
indent_size = 3
# CMake
[{CMakeLists.txt,*.cmake}]
indent_style = space
indent_size = 2
# Makefile
[Makefile]
indent_style = tab
# Device tree
[*.{dts,dtsi,overlay}]
indent_style = tab
indent_size = 8
# Git commit messages
[COMMIT_EDITMSG]
max_line_length = 72
# Kconfig
[Kconfig*]
indent_style=tab

8
.gitattributes vendored
View File

@@ -3,11 +3,3 @@
.gitattributes export-ignore
.gitignore export-ignore
.mailmap export-ignore
# Tell git to not diff certain files
*.svg -diff
# Tell linguist that generated test pattern files should not be included in the
# language statistics.
*.pat linguist-generated
*.svg linguist-generated

View File

@@ -1,45 +0,0 @@
---
name: Bug report
about: Create a report to help us improve Zephyr
title: ''
labels: bug
assignees: ''
---
**Describe the bug**
A clear and concise description of what the bug is.
Please also mention any information which could help others to understand
the problem you're facing:
- What target platform are you using?
- What have you tried to diagnose or workaround this issue?
- ...
**To Reproduce**
Steps to reproduce the behavior:
1. mkdir build; cd build
2. cmake -DBOARD=board\_xyz
3. make
4. See error
**Expected behavior**
A clear and concise description of what you expected to happen.
**Impact**
What impact does this issue have on your progress (e.g., annoyance, showstopper)
**Logs and console output**
If applicable, add console logs or other types of debug information
e.g Wireshark capture or Logic analyzer capture (upload in zip archive).
copy-and-paste text and put a code fence (\`\`\`) before and after, to help
explain the issue. (if unable to obtain text log, add a screenshot)
**Environment (please complete the following information):**
- OS: (e.g. Linux, MacOS, Windows)
- Toolchain (e.g Zephyr SDK, ...)
- Commit SHA or Version used
**Additional context**
Add any other context that could be relevant to your issue, such as pin setting,
target configuration, ...

View File

@@ -1,20 +0,0 @@
---
name: Enhancement
about: Suggest enhancements to existing features
title: ''
labels: Enhancement
assignees: ''
---
**Is your enhancement proposal related to a problem? Please describe.**
A clear and concise description of what the problem is.
**Describe the solution you'd like**
A clear and concise description of what you want to happen.
**Describe alternatives you've considered**
A clear and concise description of any alternative solutions or features you've considered.
**Additional context**
Add any other context or graphics (drag-and-drop an image) about the feature request here.

View File

@@ -1,62 +0,0 @@
---
name: External Source Code
about: Submit a proposal to integrate external source code
title: ''
labels: TSC
assignees: ''
---
## Origin
Name of project hosting the original open source code
Provide a link to the source
## Purpose
Brief description of what this software does
## Mode of integration
Describe whether you'd like to integrate this exernal component in the main tree
or as a module, and why. If the mode of integration is a module, suggest a
repository name for the module
## Pull Request
Pull request (if any) with the actual implementation of the integration, be it
in the main tree or as a module (pointing to your own fork for now). Make sure
the PR is correctly labeled as "DNM"
## Description
Long description that will help reviewers discuss suitability of the
component to solve the problem at hand (there may be a better options
available.)
What is its primary functionality (e.g., SQLLite is a lightweight
database)?
What problem are you trying to solve? (e.g., a state store is
required to maintain ...)
Why is this the right component to solve it (e.g., SQLite is small,
easy to use, and has a very liberal license.)
# Dependencies
What other components does this package depend on?
Will the Zephyr project have a direct dependency on the component, or
will it be included via an abstraction layer with this component as a
replaceable implementation?
## Revision
Version or SHA you would like to integrate initially
## License
Please use an SPDX identifier (https://spdx.org/licenses/), such as
``BSD-3-Clause``

View File

@@ -1,20 +0,0 @@
---
name: Feature request
about: Suggest an idea for this project
title: ''
labels: Feature Request
assignees: ''
---
**Is your feature request related to a problem? Please describe.**
A clear and concise description of what the problem is.
**Describe the solution you'd like**
A clear and concise description of what you want to happen.
**Describe alternatives you've considered**
A clear and concise description of any alternative solutions or features you've considered.
**Additional context**
Add any other context or graphics (drag-and-drop an image) about the feature request here.

View File

@@ -1,19 +0,0 @@
---
name: Hardware Support
about: Suggest adding hardware support
title: ''
labels: Hardware Support
assignees: ''
---
**Is this request related to a missing driver support for a particular hardware platform, SoC or board? Please describe.**
Describe in details the hardware support being requested and why this support benefits Zephyr.
**Describe why you are asking for this support?**
Describe why you are asking for this support instead of contributing it directly to the tree
If this is a new board or SoC, please state whether you are willing to maintain the Zephyr support for it if it is included in the main tree
**Additional context**
Add any other context or graphics (drag-and-drop an image) about the hardware here.

View File

@@ -1,41 +0,0 @@
---
name: Contributor Nomination
about: Nominate a GitHub user for additional rights on the Zephyr Project
title: ''
labels: Role Nomination
assignees: ''
---
# Background
The [TSC Project Roles] defines the main roles for the Zephyr Project, including
Maintainer, Collaborator, and Contributor.
By default anyone that contributes code or documentation is a Contributor, but
with the lowest [GitHub Permission Level] of Read. For example, Contributors
with Read permission do not have the permission to add reviewers to a pull
request.
Use this template to nominate a GitHub user for an elevated permission level in
the Contributor role.
# Nomination
## GitHub User
Provide the following information about the GitHub user:
1. Full Name
1. GitHub username
1. Organization (optional)
## Supporting Documents
Add links to 3-5 GitHub pull requests, in the Zephyr project, authored or
reviewed by the GitHub user that demonstrate the user's dedication to the
Zephyr project.
[TSC Project Roles]: <https://docs.zephyrproject.org/latest/development_process/project_roles.html#tsc-project-roles>
[GitHub Permission Level]: <https://docs.github.com/en/organizations/managing-access-to-your-organizations-repositories/repository-permission-levels-for-an-organization>

View File

@@ -1,51 +0,0 @@
---
name: RFC / Proposal
about: Submit an RFC / Proposal
title: ''
labels: RFC
assignees: ''
---
## Introduction
This section targets end users, TSC members, maintainers and anyone else that might
need a quick explanation of your proposed change.
### Problem description
Why do we want this change and what problem are we trying to address?
### Proposed change
A brief summary of the proposed change - the 10,000 ft view on what it will
change once this change is implemented.
## Detailed RFC
In this section of the document the target audience is the dev team. Upon
reading this section each engineer should have a rather clear picture of what
needs to be done in order to implement the described feature.
### Proposed change (Detailed)
This section is freeform - you should describe your change in as much detail
as possible. Please also ensure to include any context or background info here.
For example, do we have existing components which can be reused or altered.
By reading this section, each team member should be able to know what exactly
you're planning to change and how.
### Dependencies
Highlight how the change may affect the rest of the project (new components,
modifications in other areas), or other teams/projects.
### Concerns and Unresolved Questions
List any concerns, unknowns, and generally unresolved questions etc.
## Alternatives
List any alternatives considered, and the reasons for choosing this option
over them.

22
.github/SECURITY.md vendored
View File

@@ -1,22 +0,0 @@
# Security Policy
## Supported versions
The Zephyr project supports the following versions with security
updates:
- The most recent release, and the release prior to that.
- Active LTS releases.
At this time, with the latest release of v3.0.0, the supported
versions are:
- v2.7.0: Current LTS
- v2.7.0: Prior release
- v3.0.0: Current release
## Reporting process
Please see our [Security Vulnerability
Reporting](https://docs.zephyrproject.org/latest/security/reporting.html)
page for details on the process.

171
.github/labeler.yml vendored
View File

@@ -1,171 +0,0 @@
"Release Notes":
- "doc/releases/**/*"
"area: Modem":
- "drivers/modem/**/*"
"area: PWM":
- "drivers/pwm/**/*"
"area: Watchdog":
- "drivers/watchdog/**/*"
"area: Sensors":
- "drivers/sensors/**/*"
"area: ADC":
- "drivers/adc/**/*"
"area: Counter":
- "drivers/counter/**/*"
"area: CAN":
- "include/drivers/can.h"
- "include/canbus/*/**"
- "drivers/can/**/*"
- "subsys/canbus/*/**"
"area: EEPROM":
- "include/drivers/eeprom.h"
- "drivers/eeprom/**/*"
"area: Timer":
- "drivers/timer/**/*"
"area: I2S":
- "drivers/i2s/**/*"
"area: C Library":
- "lib/libc/**/*"
"area: Devicetree":
- "dts/**/*"
- "**/*.dts"
- "**/*.dtsi"
- "include/devicetree.h"
- "include/devicetree/*"
- "doc/guides/dts/**/*"
"area: Devicetree Binding":
- "include/dt-bindings/**/*"
- "dts/bindings/**/*"
"area: Devicetree Tooling":
- "scripts/dts/**/*"
"area: I2C":
- "drivers/i2c/**/*"
"area: SPI":
- "drivers/spi/**/*"
"area: Boards":
- "boards/**/*"
"area: POSIX":
- "lib/posix/**/*"
"area: native port":
- "arch/posix/**/*"
- "include/arch/posix/**/*"
- "soc/posix/**/*"
- "**/*native_posix*"
"area: X86":
- "arch/x86/**/*"
- "include/arch/x86/**/*"
"area: ARM":
- "arch/arm/**/*"
- "include/arch/arm/**/*"
"area: ARM64":
- "arch/arm64/**/*"
- "include/arch/arm64/**/*"
"area: MIPS":
- "arch/mips/**/*"
- "include/arch/mips/**/*"
"area: NIOS2":
- "arch/nios2/**/*"
- "include/arch/nios2/**/*"
"area: Xtensa":
- "arch/xtensa/**/*"
- "include/arch/xtensa/**/*"
"area: RISCV":
- "arch/risv/**/*"
- "include/arch/riscv/**/*"
"area: ARC":
- "arch/arc/**/*"
- "include/arch/arc/**/*"
"area: Networking":
- "subsys/net/**/*"
- "samples/net/**/*"
- "tests/net/**/*"
- "include/net/**/*"
- "include/drivers/ieee802154/**/*"
- "drivers/ethernet/**/*"
- "drivers/ieee802154/**/*"
- "drivers/wifi/**/*"
- "drivers/ptp_clock/**/*"
- "drivers/net/**/*"
"area: Logging":
- "subsys/logging/**/*"
"area: Shell":
- "subsys/shell/**/*"
"area: Console":
- "subsys/console/**/*"
"area: Test Framework":
- "subsys/testsuite/**/*"
"area: Settings":
- "subsys/settings/**/*"
"area: File System":
- "subsys/fs/**/*"
"area: Storage":
- "subsys/storage/**/*"
"area: Bluetooth":
- "subsys/bluetooth/**/*"
- "**/*bluetooth*"
"area: Bluetooth Mesh":
- "subsys/bluetooth/mesh/**/*"
"area: Bluetooth Audio":
- "subsys/bluetooth/audio/**/*"
"area: Bluetooth Controller":
- "subsys/bluetooth/controller/**/*"
"area: Bluetooth Host":
- "subsys/bluetooth/host/**/*"
- "subsys/bluetooth/services/**/*"
"area: API":
- "include/**/*"
"area: Samples":
- "samples/**/*"
"area: Tests":
- "tests/**/*"
"area: Kernel":
- "kernel/**/*"
- "tests/kernel/**/*"
"area: Documentation":
- "**/*.rst"
- "**/*.md"
"area: Build System":
- "cmake/**/*"
- "CmakeLists.txt"
"area: Kconfig":
- "scripts/kconfig/**/*"
- "Kconfig"
- "Kconfig.zephyr"
"area: Twister":
- "scripts/twister"
- "scripts/pylib/twister/**/*"
"area: Modules":
- "west.yml"
- "modules/**/*"
"area: Shields":
- "boards/shields/**"
- "samples/shields/**"
"area: Power Management":
- "subsys/pm/**/*"
- "include/pm/**/*"
- "tests/subsys/pm/**/*"
- "samples/subsys/pm/**/*"
"platform: NXP":
- "boards/arm/frdm*/**"
- "boards/arm/hexiwear*/**"
- "boards/arm/lpcxpresso*/**"
- "boards/arm/*imx*/**"
- "drivers/**/*imx*"
- "drivers/**/*mcux*"
- "dts/arm/nxp/*/*"
- "dts/bindings/**/nxp*"
- "soc/arm/nxp*/**"
"platform: STM32":
- "boards/arm/nucleo_*/**"
- "boards/arm/*stm32*/**"
- "drivers/**/*stm32*"
- "dts/arm/st/*/*"
- "include/drivers/*/*stm32*"
- "soc/arm/st_stm32/**"
"platform: SiLabs":
- "boards/arm/efr32_*/**/*"
- "boards/arm/efm32_*/**/*"
- "drivers/**/*gecko*"
- "dts/arm/silabs/**/*"
- "dts/bindings/**/silabs,gecko*"
- "soc/arm/silabs_exx32/**/*"

View File

@@ -1,16 +0,0 @@
license:
main: apache-2.0
report_missing: true
category: Permissive
copyright:
check: true
exclude:
extensions:
- yml
- yaml
- html
- rst
- conf
- cfg
langs:
- HTML

View File

@@ -1,19 +0,0 @@
name: Backport
on:
pull_request_target:
types:
- closed
- labeled
branches:
- main
jobs:
backport:
runs-on: ubuntu-18.04
name: Backport
steps:
- name: Backport
uses: zephyrproject-rtos/action-backport@v1.1.1-1
with:
github_token: ${{ secrets.ZB_GITHUB_TOKEN }}
issue_labels: backport

View File

@@ -1,85 +0,0 @@
name: Bluetooth Tests
on:
pull_request_target:
paths:
- "west.yml"
- "subsys/bluetooth/**"
- "tests/bluetooth/bsim_bt/**"
- "boards/posix/**"
- "soc/posix/**"
- "arch/posix/**"
jobs:
bluetooth-test-prep:
runs-on: ubuntu-latest
steps:
- name: Cancel Previous Runs
uses: styfle/cancel-workflow-action@0.6.0
with:
access_token: ${{ github.token }}
bluetooth-test-build:
runs-on: ubuntu-latest
needs: bluetooth-test-prep
container:
image: zephyrprojectrtos/ci:v0.21.0
options: '--entrypoint /bin/bash'
env:
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.2
CLANG_ROOT_DIR: /usr/lib/llvm-12
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
EDTT_PATH: ../tools/edtt
bsim_bt_test_results_file: ./bsim_bt_out/bsim_results.xml
steps:
- name: Update PATH for west
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: checkout
uses: actions/checkout@v2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: west setup
run: |
west init -l . || true
west config --global update.narrow true
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
- name: Run Bluetooth Tests with BSIM
run: |
export ZEPHYR_BASE=${PWD}
WORK_DIR=${ZEPHYR_BASE}/bsim_bt_out tests/bluetooth/bsim_bt/compile.sh
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bt_test_results_file} \
SEARCH_PATH=tests/bluetooth/bsim_bt/ tests/bluetooth/bsim_bt/run_parallel.sh
- name: Upload Test Results
if: always()
uses: actions/upload-artifact@v2
with:
name: Bluetooth Test Results
path: ./bsim_bt_out/bsim_results.xml
bluetooth-test-results:
name: "Publish Bluetooth Test Results"
needs: bluetooth-test-build
runs-on: ubuntu-20.04
# the build-and-test job might be skipped, we don't need to run this job then
if: success() || failure()
steps:
- name: Download Artifacts
uses: actions/download-artifact@v2
with:
path: artifacts
- name: Publish Bluetooth Test Results
uses: EnricoMi/publish-unit-test-result-action@v1
with:
check_name: Bluetooth Test Results
github_token: ${{ secrets.GITHUB_TOKEN }}
files: "**/bsim_results.xml"
comment_mode: off

View File

@@ -1,154 +0,0 @@
name: Build with Clang/LLVM
on: pull_request_target
jobs:
clang-build-prep:
runs-on: ubuntu-latest
steps:
- name: Cancel Previous Runs
uses: styfle/cancel-workflow-action@0.6.0
with:
access_token: ${{ github.token }}
clang-build:
runs-on: zephyr_runner
needs: clang-build-prep
container:
image: zephyrprojectrtos/ci:v0.21.0
options: '--entrypoint /bin/bash'
volumes:
- /home/runners/zephyrproject:/github/cache/zephyrproject
strategy:
fail-fast: false
matrix:
platform: ["native_posix"]
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.2
CLANG_ROOT_DIR: /usr/lib/llvm-12
COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
BASE_REF: ${{ github.base_ref }}
outputs:
report_needed: ${{ steps.twister.outputs.report_needed }}
steps:
- name: Cleanup
run: |
# hotfix, until we have a better way to deal with existing data
rm -rf zephyr zephyr-testing
- name: Checkout
uses: actions/checkout@v2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Environment Setup
run: |
pip3 install GitPython
echo "$HOME/.local/bin" >> $GITHUB_PATH
git config --global user.email "bot@zephyrproject.org"
git config --global user.name "Zephyr Bot"
rm -fr ".git/rebase-apply"
git rebase origin/${BASE_REF}
git log --pretty=oneline | head -n 10
west init -l . || true
west config --global update.narrow true
# In some cases modules are left in a state where they can't be
# updated (i.e. when we cancel a job and the builder is killed),
# So first retry to update, if that does not work, remove all modules
# and start over. (Workaround until we implement more robust module
# west caching).
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west2.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
- name: Check Environment
run: |
cmake --version
${CLANG_ROOT_DIR}/bin/clang --version
gcc --version
ls -la
- name: Prepare ccache timestamp/data
id: ccache_cache_timestamp
shell: cmake -P {0}
run: |
string(TIMESTAMP current_date "%Y-%m-%d-%H;%M;%S" UTC)
string(REPLACE "/" "_" repo ${{github.repository}})
string(REPLACE "-" "_" repo2 ${repo})
message("::set-output name=repo::${repo2}")
- name: use cache
id: cache-ccache
uses: nashif/action-s3-cache@master
with:
key: ${{ steps.ccache_cache_timestamp.outputs.repo }}-${{ github.ref_name }}-clang-${{ matrix.platform }}-ccache
path: /github/home/.ccache
aws-s3-bucket: ccache.zephyrproject.org
aws-access-key-id: ${{ secrets.CCACHE_S3_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.CCACHE_S3_SECRET_ACCESS_KEY }}
aws-region: us-east-2
- name: ccache stats initial
run: |
test -d github/home/.ccache && rm -rf /github/home/.ccache && mv github/home/.ccache /github/home/.ccache
ccache -M 10G -s
- name: Run Tests with Twister
id: twister
run: |
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=llvm
# check if we need to run a full twister or not based on files changed
python3 ./scripts/ci/test_plan.py --platform ${{ matrix.platform }} -c origin/${BASE_REF}..
# We can limit scope to just what has changed
if [ -s testplan.csv ]; then
echo "::set-output name=report_needed::1";
# Full twister but with options based on changes
./scripts/twister --inline-logs -M -N -v --load-tests testplan.csv --retry-failed 2
else
# if nothing is run, skip reporting step
echo "::set-output name=report_needed::0";
fi
- name: ccache stats post
run: |
ccache -s
- name: Upload Unit Test Results
if: always() && steps.twister.outputs.report_needed != 0
uses: actions/upload-artifact@v2
with:
name: Unit Test Results (Subset ${{ matrix.platform }})
path: twister-out/twister.xml
clang-build-results:
name: "Publish Unit Tests Results"
needs: clang-build
runs-on: ubuntu-20.04
if: (success() || failure() ) && needs.clang-build.outputs.report_needed != 0
steps:
- name: Download Artifacts
uses: actions/download-artifact@v2
with:
path: artifacts
- name: Merge Test Results
run: |
pip3 install junitparser junit2html
junitparser merge artifacts/*/twister.xml junit.xml
junit2html junit.xml junit-clang.html
- name: Upload Unit Test Results in HTML
if: always()
uses: actions/upload-artifact@v2
with:
name: HTML Unit Test Results
if-no-files-found: ignore
path: |
junit-clang.html
- name: Publish Unit Test Results
uses: EnricoMi/publish-unit-test-result-action@v1
if: always()
with:
check_name: Unit Test Results
github_token: ${{ secrets.GITHUB_TOKEN }}
files: "**/twister.xml"
comment_mode: off

View File

@@ -1,165 +0,0 @@
name: Code Coverage with codecov
on:
schedule:
- cron: '25 */3 * * 1-5'
jobs:
codecov-prep:
runs-on: ubuntu-latest
if: github.repository == 'zephyrproject-rtos/zephyr'
steps:
- name: Cancel Previous Runs
uses: styfle/cancel-workflow-action@0.6.0
with:
access_token: ${{ github.token }}
codecov:
runs-on: zephyr_runner
needs: codecov-prep
container:
image: zephyrprojectrtos/ci:v0.21.0
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
matrix:
platform: ["native_posix", "qemu_x86", "unit_testing"]
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.2
CLANG_ROOT_DIR: /usr/lib/llvm-12
steps:
- name: Update PATH for west
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: checkout
uses: actions/checkout@v2
with:
fetch-depth: 0
- name: west setup
run: |
west init -l . || true
west update 1> west.update.log || west update 1> west.update-2.log
- name: Check Environment
run: |
cmake --version
${CLANG_ROOT_DIR}/bin/clang --version
gcc --version
ls -la
- name: Prepare ccache keys
id: ccache_cache_prop
shell: cmake -P {0}
run: |
string(REPLACE "/" "_" repo ${{github.repository}})
string(REPLACE "-" "_" repo2 ${repo})
message("::set-output name=repo::${repo2}")
- name: use cache
id: cache-ccache
uses: nashif/action-s3-cache@master
with:
key: ${{ steps.ccache_cache_prop.outputs.repo }}-${{github.event_name}}-${{matrix.platform}}-codecov-ccache
path: /github/home/.ccache
aws-s3-bucket: ccache.zephyrproject.org
aws-access-key-id: ${{ secrets.CCACHE_S3_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.CCACHE_S3_SECRET_ACCESS_KEY }}
aws-region: us-east-2
- name: ccache stats initial
run: |
test -d github/home/.ccache && mv github/home/.ccache /github/home/.ccache
ccache -M 10G -s
- name: Run Tests with Twister (Push)
continue-on-error: true
run: |
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
mkdir -p coverage/reports
./scripts/twister -N -v --filter runnable -p ${{ matrix.platform }} --coverage -T tests
- name: Generate Coverage Report
run: |
mv twister-out/coverage.info lcov.pre.info
lcov -q --remove lcov.pre.info mylib.c --remove lcov.pre.info tests/\* \
--remove lcov.pre.info samples/\* --remove lcov.pre.info ext/\* \
--remove lcov.pre.info *generated* \
-o coverage/reports/${{ matrix.platform }}.info --rc lcov_branch_coverage=1
- name: ccache stats post
run: |
ccache -s
- name: Upload Coverage Results
if: always()
uses: actions/upload-artifact@v2
with:
name: Coverage Data (Subset ${{ matrix.platform }})
path: coverage/reports/${{ matrix.platform }}.info
codecov-results:
name: "Publish Coverage Results"
needs: codecov
runs-on: ubuntu-latest
# the codecov job might be skipped, we don't need to run this job then
if: success() || failure()
steps:
- name: checkout
uses: actions/checkout@v2
with:
fetch-depth: 0
- name: Download Artifacts
uses: actions/download-artifact@v2
with:
path: coverage/reports
- name: Move coverage files
run: |
mv ./coverage/reports/*/*.info ./coverage/reports
ls -la ./coverage/reports
- name: Generate list of coverage files
id: get-coverage-files
shell: cmake -P {0}
run: |
file(GLOB INPUT_FILES_LIST "coverage/reports/*.info")
set(MERGELIST "")
set(FILELIST "")
foreach(ITEM ${INPUT_FILES_LIST})
get_filename_component(f ${ITEM} NAME)
if(FILELIST STREQUAL "")
set(FILELIST "${f}")
else()
set(FILELIST "${FILELIST},${f}")
endif()
endforeach()
foreach(ITEM ${INPUT_FILES_LIST})
get_filename_component(f ${ITEM} NAME)
if(MERGELIST STREQUAL "")
set(MERGELIST "-a ${f}")
else()
set(MERGELIST "${MERGELIST} -a ${f}")
endif()
endforeach()
message("::set-output name=mergefiles::${MERGELIST}")
message("::set-output name=covfiles::${FILELIST}")
- name: Merge coverage files
run: |
sudo apt-get update
sudo apt-get install -y lcov
cd ./coverage/reports
lcov ${{ steps.get-coverage-files.outputs.mergefiles }} -o merged.info --rc lcov_branch_coverage=1
- name: Upload coverage to Codecov
if: always()
uses: codecov/codecov-action@v2
with:
directory: ./coverage/reports
env_vars: OS,PYTHON
fail_ci_if_error: false
verbose: true
files: merged.info

View File

@@ -1,61 +0,0 @@
name: Coding Guidelines
on: pull_request
jobs:
compliance_job:
runs-on: ubuntu-latest
name: Run coding guidelines checks on patch series (PR)
steps:
- name: Checkout the code
uses: actions/checkout@v2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: cache-pip
uses: actions/cache@v1
with:
path: ~/.cache/pip
key: ${{ runner.os }}-doc-pip
- name: Install python dependencies
run: |
pip3 install unidiff
pip3 install wheel
pip3 install sh
- name: Install Packages
run: |
sudo apt-get update
sudo apt-get install ocaml-base-nox
wget https://launchpad.net/~npalix/+archive/ubuntu/coccinelle/+files/coccinelle_1.0.8~20.04npalix1_amd64.deb
sudo dpkg -i coccinelle_1.0.8~20.04npalix1_amd64.deb
- name: Run Coding Guildeines Checks
continue-on-error: true
id: coding_guidelines
env:
BASE_REF: ${{ github.base_ref }}
run: |
export ZEPHYR_BASE=$PWD
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git remote -v
git rebase origin/${BASE_REF}
source zephyr-env.sh
# debug
ls -la
git log --pretty=oneline | head -n 10
./scripts/ci/guideline_check.py --output output.txt -c origin/${BASE_REF}..
- name: check-warns
run: |
if [[ -s "output.txt" ]]; then
errors=$(cat output.txt)
errors="${errors//'%'/'%25'}"
errors="${errors//$'\n'/'%0A'}"
errors="${errors//$'\r'/'%0D'}"
echo "::error file=output.txt::$errors"
exit 1;
fi

View File

@@ -1,100 +0,0 @@
name: Compliance Checks
on: pull_request
jobs:
maintainer_check:
runs-on: ubuntu-latest
name: Check MAINTAINERS file
steps:
- name: Checkout the code
uses: actions/checkout@v2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Run Maintainers Script
id: maintainer
env:
BASE_REF: ${{ github.base_ref }}
run: |
python3 ./scripts/get_maintainer.py path CMakeLists.txt
check_compliance:
runs-on: ubuntu-latest
name: Run compliance checks on patch series (PR)
steps:
- name: Update PATH for west
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: Checkout the code
uses: actions/checkout@v2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: cache-pip
uses: actions/cache@v1
with:
path: ~/.cache/pip
key: ${{ runner.os }}-doc-pip
- name: Install python dependencies
run: |
pip3 install setuptools
pip3 install wheel
pip3 install python-magic junitparser==1.6.3 gitlint pylint pykwalify
pip3 install west
- name: west setup
env:
BASE_REF: ${{ github.base_ref }}
run: |
git config --global user.email "you@example.com"
git config --global user.name "Your Name"
git remote -v
git rebase origin/${BASE_REF}
# debug
git log --pretty=oneline | head -n 10
west init -l . || true
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
- name: Run Compliance Tests
continue-on-error: true
id: compliance
env:
BASE_REF: ${{ github.base_ref }}
run: |
export ZEPHYR_BASE=$PWD
# debug
ls -la
git log --pretty=oneline | head -n 10
./scripts/ci/check_compliance.py -m Codeowners -m Devicetree -m Gitlint -m Identity -m Nits -m pylint -m checkpatch -m Kconfig -c origin/${BASE_REF}..
- name: upload-results
uses: actions/upload-artifact@master
continue-on-error: True
with:
name: compliance.xml
path: compliance.xml
- name: check-warns
run: |
if [[ ! -s "compliance.xml" ]]; then
exit 1;
fi
for file in Nits.txt checkpatch.txt Identity.txt Gitlint.txt pylint.txt Devicetree.txt Kconfig.txt Codeowners.txt; do
if [[ -s $file ]]; then
errors=$(cat $file)
errors="${errors//'%'/'%25'}"
errors="${errors//$'\n'/'%0A'}"
errors="${errors//$'\r'/'%0D'}"
echo "::error file=${file}::$errors"
exit=1
fi
done
if [ "${exit}" == "1" ]; then
exit 1;
fi

View File

@@ -1,14 +0,0 @@
name: Conflict Finder
on:
push:
branches-ignore:
- '**'
jobs:
conflict:
runs-on: ubuntu-latest
steps:
- uses: mschilde/auto-label-merge-conflicts@v2
with:
CONFLICT_LABEL_NAME: "has conflicts"
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

View File

@@ -1,38 +0,0 @@
# Copyright (c) 2020 Intel Corp.
# SPDX-License-Identifier: Apache-2.0
name: Publish commit for daily testing
on:
schedule:
- cron: '50 22 * * *'
push:
branches:
- refs/tags/*
jobs:
get_version:
runs-on: ubuntu-latest
if: github.repository == 'zephyrproject-rtos/zephyr'
steps:
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v1
with:
aws-access-key-id: ${{ secrets.AWS_ACCESS_KEY_ID_TESTING }}
aws-secret-access-key: ${{ secrets.AWS_SECRET_ACCESS_KEY_TESTING }}
aws-region: us-east-1
- name: install-pip
run: |
pip3 install gitpython
- name: checkout
uses: actions/checkout@v2
with:
fetch-depth: 0
- name: Upload to AWS S3
run: |
python3 scripts/ci/version_mgr.py --update .
aws s3 cp versions.json s3://testing.zephyrproject.org/daily_tests/versions.json

View File

@@ -1,69 +0,0 @@
# Copyright (c) 2020 Linaro Limited.
# Copyright (c) 2020 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
name: Devicetree script tests
on:
push:
paths:
- 'scripts/dts/**'
- '.github/workflows/devicetree_checks.yml'
pull_request:
paths:
- 'scripts/dts/**'
- '.github/workflows/devicetree_checks.yml'
jobs:
devicetree-checks:
name: Devicetree script tests
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: [3.6, 3.7, 3.8]
os: [ubuntu-latest, macos-latest, windows-latest]
exclude:
- os: macos-latest
python-version: 3.6
- os: windows-latest
python-version: 3.6
steps:
- name: checkout
uses: actions/checkout@v2
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v1
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux
if: startsWith(runner.os, 'Linux')
uses: actions/cache@v1
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ matrix.python-version }}
restore-keys: |
${{ runner.os }}-pip-${{ matrix.python-version }}
- name: cache-pip-mac
if: startsWith(runner.os, 'macOS')
uses: actions/cache@v1
with:
path: ~/Library/Caches/pip
# Trailing '-' was just to get a different cache name
key: ${{ runner.os }}-pip-${{ matrix.python-version }}-
restore-keys: |
${{ runner.os }}-pip-${{ matrix.python-version }}-
- name: cache-pip-win
if: startsWith(runner.os, 'Windows')
uses: actions/cache@v1
with:
path: ~\AppData\Local\pip\Cache
key: ${{ runner.os }}-pip-${{ matrix.python-version }}
restore-keys: |
${{ runner.os }}-pip-${{ matrix.python-version }}
- name: install python dependencies
run: |
pip3 install wheel
pip3 install pytest pyyaml tox
- name: run tox
working-directory: scripts/dts/python-devicetree
run: |
tox

View File

@@ -1,148 +0,0 @@
# Copyright (c) 2020 Linaro Limited.
# SPDX-License-Identifier: Apache-2.0
name: Documentation Build
on:
schedule:
- cron: '0 */3 * * *'
push:
tags:
- v*
pull_request:
paths:
- 'doc/**'
- '**.rst'
- 'include/**'
- 'kernel/include/kernel_arch_interface.h'
- 'lib/libc/**'
- 'subsys/testsuite/ztest/include/**'
- 'tests/**'
- '**/Kconfig*'
- 'west.yml'
- '.github/workflows/doc-build.yml'
- 'scripts/dts/**'
- 'scripts/requirements-doc.txt'
env:
# NOTE: west docstrings will be extracted from the version listed here
WEST_VERSION: 0.12.0
# The latest CMake available directly with apt is 3.18, but we need >=3.20
# so we fetch that through pip.
CMAKE_VERSION: 3.20.5
DOXYGEN_VERSION: 1.9.2
jobs:
doc-build-html:
name: "Documentation Build (HTML)"
runs-on: ubuntu-latest
timeout-minutes: 30
concurrency:
group: doc-build-html-${{ github.ref }}
cancel-in-progress: true
steps:
- name: checkout
uses: actions/checkout@v2
- name: install-pkgs
run: |
sudo apt-get update
sudo apt-get install -y ninja-build graphviz libclang1-9 libclang-cpp9
wget --no-verbose https://www.doxygen.nl/files/doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz
tar xf doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz
echo "${PWD}/doxygen-${DOXYGEN_VERSION}/bin" >> $GITHUB_PATH
- name: cache-pip
uses: actions/cache@v1
with:
path: ~/.cache/pip
key: pip-${{ hashFiles('scripts/requirements-doc.txt') }}
- name: install-pip
run: |
sudo pip3 install -U setuptools wheel pip
pip3 install -r scripts/requirements-doc.txt
pip3 install west==${WEST_VERSION}
pip3 install cmake==${CMAKE_VERSION}
- name: west setup
run: |
west init -l .
- name: build-docs
run: |
if [[ "$GITHUB_REF" =~ "refs/tags/v" ]]; then
DOC_TAG="release"
else
DOC_TAG="development"
fi
if [[ "${{ github.event_name }}" == "pull_request" ]]; then
DOC_TARGET="html-fast"
else
DOC_TARGET="html"
fi
DOC_TAG=${DOC_TAG} SPHINXOPTS="-q -W -t publish" make -C doc ${DOC_TARGET}
- name: compress-docs
run: |
tar cfJ html-output.tar.xz --directory=doc/_build html
- name: upload-build
uses: actions/upload-artifact@master
with:
name: html-output
path: html-output.tar.xz
doc-build-pdf:
name: "Documentation Build (PDF)"
runs-on: ubuntu-latest
container: texlive/texlive:latest
timeout-minutes: 30
concurrency:
group: doc-build-pdf-${{ github.ref }}
cancel-in-progress: true
steps:
- name: checkout
uses: actions/checkout@v2
- name: install-pkgs
run: |
apt-get update
apt-get install -y python3-pip ninja-build doxygen graphviz librsvg2-bin
- name: cache-pip
uses: actions/cache@v1
with:
path: ~/.cache/pip
key: pip-${{ hashFiles('scripts/requirements-doc.txt') }}
- name: install-pip
run: |
pip3 install -U setuptools wheel pip
pip3 install -r scripts/requirements-doc.txt
pip3 install west==${WEST_VERSION}
pip3 install cmake==${CMAKE_VERSION}
- name: west setup
run: |
west init -l .
- name: build-docs
run: |
if [[ "$GITHUB_REF" =~ "refs/tags/v" ]]; then
DOC_TAG="release"
else
DOC_TAG="development"
fi
DOC_TAG=${DOC_TAG} SPHINXOPTS="-q -j auto" LATEXMKOPTS="-quiet -halt-on-error" make -C doc pdf
- name: upload-build
uses: actions/upload-artifact@master
with:
name: pdf-output
path: doc/_build/latex/zephyr.pdf

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@@ -1,56 +0,0 @@
# Copyright (c) 2020 Linaro Limited.
# Copyright (c) 2021 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
name: Publish Documentation
on:
workflow_run:
workflows: ["Documentation Build"]
branches:
- main
- v*
tags:
- v*
types:
- completed
jobs:
doc-publish:
name: Publish Documentation
runs-on: ubuntu-latest
if: |
github.event.workflow_run.conclusion == 'success' &&
github.repository == 'zephyrproject-rtos/zephyr'
steps:
- name: Download artifacts
uses: dawidd6/action-download-artifact@v2
with:
workflow: doc-build.yml
run_id: ${{ github.event.workflow_run.id }}
- name: Uncompress HTML docs
run: |
tar xf html-output/html-output.tar.xz -C html-output
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v1
with:
aws-access-key-id: ${{ secrets.AWS_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_SECRET_ACCESS_KEY }}
aws-region: us-east-1
- name: Upload to AWS S3
env:
HEAD_BRANCH: ${{ github.event.workflow_run.head_branch }}
run: |
if [ "${HEAD_BRANCH:0:1}" == "v" ]; then
VERSION=${HEAD_BRANCH:1}
else
VERSION="latest"
fi
aws s3 sync --quiet html-output/html s3://docs.zephyrproject.org/${VERSION} --delete
aws s3 sync --quiet html-output/html/doxygen/html s3://docs.zephyrproject.org/apidoc/${VERSION} --delete
aws s3 cp --quiet pdf-output/zephyr.pdf s3://docs.zephyrproject.org/${VERSION}/zephyr.pdf

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@@ -1,20 +0,0 @@
name: Error numbers
on:
pull_request:
paths:
- 'lib/libc/minimal/include/errno.h'
jobs:
check-errno:
runs-on: ubuntu-latest
container:
image: zephyrprojectrtos/ci:v0.21.0
steps:
- name: checkout
uses: actions/checkout@v2
- name: Run errno.py
run: |
export ZEPHYR_BASE=${PWD}
./scripts/ci/errno.py

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@@ -1,71 +0,0 @@
name: Footprint Tracking
# Run every 12 hours and on tags
on:
schedule:
- cron: '50 1/12 * * *'
push:
paths:
- 'VERSION'
- '.github/workflows/footprint-tracking.yml'
tags:
# only publish v* tags, do not care about zephyr-v* which point to the
# same commit
- 'v*'
jobs:
footprint-tracking-cancel:
runs-on: ubuntu-latest
if: github.repository == 'zephyrproject-rtos/zephyr'
steps:
- name: Cancel Previous Runs
uses: styfle/cancel-workflow-action@0.6.0
with:
access_token: ${{ github.token }}
footprint-tracking:
runs-on: ubuntu-latest
if: github.repository == 'zephyrproject-rtos/zephyr'
needs: footprint-tracking-cancel
container:
image: zephyrprojectrtos/ci:v0.21.0
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.2
CLANG_ROOT_DIR: /usr/lib/llvm-12
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
steps:
- name: Update PATH for west
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: Install pip packages
run: |
sudo pip3 install -U setuptools wheel pip gitpython
- name: checkout
uses: actions/checkout@v2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: west setup
run: |
west init -l . || true
west config --global update.narrow true
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v1
with:
aws-access-key-id: ${{ secrets.FOOTPRINT_AWS_KEY_ID }}
aws-secret-access-key: ${{ secrets.FOOTPRINT_AWS_ACCESS_KEY }}
aws-region: us-east-1
- name: Record Footprint
env:
BASE_REF: ${{ github.base_ref }}
run: |
export ZEPHYR_BASE=${PWD}
./scripts/footprint/track.py -p scripts/footprint/plan.txt
aws s3 sync --quiet footprint_data/ s3://testing.zephyrproject.org/footprint_data/

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@@ -1,72 +0,0 @@
name: Footprint Delta
on: pull_request
jobs:
footprint-cancel:
runs-on: ubuntu-latest
if: github.repository == 'zephyrproject-rtos/zephyr'
steps:
- name: Cancel Previous Runs
uses: styfle/cancel-workflow-action@0.6.0
with:
access_token: ${{ github.token }}
footprint-delta:
runs-on: ubuntu-latest
if: github.repository == 'zephyrproject-rtos/zephyr'
needs: footprint-cancel
container:
image: zephyrprojectrtos/ci:v0.21.0
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.2
CLANG_ROOT_DIR: /usr/lib/llvm-12
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
steps:
- name: Cancel Previous Runs
uses: styfle/cancel-workflow-action@0.6.0
with:
access_token: ${{ github.token }}
- name: Update PATH for west
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: checkout
uses: actions/checkout@v2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: west setup
run: |
west init -l . || true
west config --global update.narrow true
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update.log
- name: Detect Changes in Footprint
env:
BASE_REF: ${{ github.base_ref }}
run: |
export ZEPHYR_BASE=${PWD}
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git remote -v
git rebase origin/${BASE_REF}
git checkout -b this_pr
west build -b frdm_k64f tests/benchmarks/footprints -t ram_report
cp build/ram.json ram2.json
west build -b frdm_k64f tests/benchmarks/footprints -t rom_report
cp build/rom.json rom2.json
git checkout origin/${BASE_REF}
west update
west build -p always -b frdm_k64f tests/benchmarks/footprints -t ram_report
west build -b frdm_k64f tests/benchmarks/footprints -t rom_report
cp build/ram.json ram1.json
cp build/rom.json rom1.json
git checkout this_pr
./scripts/footprint/fpdiff.py ram1.json ram2.json
./scripts/footprint/fpdiff.py rom1.json rom2.json

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@@ -1,54 +0,0 @@
name: Issue Tracker
on:
schedule:
- cron: '*/10 * * * *'
env:
OUTPUT_FILE_NAME: IssuesReport.md
COMMITTER_EMAIL: actions@github.com
COMMITTER_NAME: github-actions
COMMITTER_USERNAME: github-actions
jobs:
track-issues:
name: "Collect Issue Stats"
runs-on: ubuntu-latest
if: github.repository == 'zephyrproject-rtos/zephyr'
steps:
- name: Download configuration file
run: |
wget -q https://raw.githubusercontent.com/$GITHUB_REPOSITORY/master/.github/workflows/issues-report-config.json
- name: install-packages
run: |
sudo apt-get update
sudo apt-get install discount
- uses: brcrista/summarize-issues@v3
with:
title: 'Issues Report for ${{ github.repository }}'
configPath: 'issues-report-config.json'
outputPath: ${{ env.OUTPUT_FILE_NAME }}
token: ${{ secrets.GITHUB_TOKEN }}
- name: upload-stats
uses: actions/upload-artifact@master
continue-on-error: True
with:
name: ${{ env.OUTPUT_FILE_NAME }}
path: ${{ env.OUTPUT_FILE_NAME }}
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v1
with:
aws-access-key-id: ${{ secrets.AWS_ACCESS_KEY_ID_TESTING }}
aws-secret-access-key: ${{ secrets.AWS_SECRET_ACCESS_KEY_TESTING }}
aws-region: us-east-1
- name: Post Results
run: |
mkd2html IssuesReport.md IssuesReport.html
aws s3 cp --quiet IssuesReport.html s3://testing.zephyrproject.org/issues/$GITHUB_REPOSITORY/index.html

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@@ -1,37 +0,0 @@
[
{
"section": "High Priority Bugs",
"labels": ["bug", "priority: high"],
"threshold": 0
},
{
"section": "Medium Priority Bugs",
"labels": ["bug", "priority: medium"],
"threshold": 20
},
{
"section": "Low Priority Bugs",
"labels": ["bug", "priority: low"],
"threshold": 100
},
{
"section": "Enhancements",
"labels": ["Enhancement"],
"threshold": 500
},
{
"section": "Features",
"labels": ["Feature"],
"threshold": 100
},
{
"section": "Questions",
"labels": ["question"],
"threshold": 100
},
{
"section": "Static Analysis",
"labels": ["Coverity"],
"threshold": 100
}
]

View File

@@ -1,12 +0,0 @@
name: 'Pull Request Labeler'
on:
- pull_request_target
jobs:
labeler:
name: Pull Request Labeler
runs-on: ubuntu-latest
steps:
- uses: actions/labeler@v2.1.1
with:
repo-token: '${{ secrets.GITHUB_TOKEN }}'

View File

@@ -1,32 +0,0 @@
name: Scancode
on: [pull_request]
jobs:
scancode_job:
runs-on: ubuntu-latest
name: Scan code for licenses
steps:
- name: Checkout the code
uses: actions/checkout@v1
- name: Scan the code
id: scancode
uses: zephyrproject-rtos/action_scancode@v3
with:
directory-to-scan: 'scan/'
- name: Artifact Upload
uses: actions/upload-artifact@v1
with:
name: scancode
path: ./artifacts
- name: Verify
run: |
if [ -s ./artifacts/report.txt ]; then
report=$(cat ./artifacts/report.txt)
report="${report//'%'/'%25'}"
report="${report//$'\n'/'%0A'}"
report="${report//$'\r'/'%0D'}"
echo "::error file=./artifacts/report.txt::$report"
exit 1
fi

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@@ -1,28 +0,0 @@
name: Manifest
on:
pull_request_target:
paths:
- 'west.yml'
jobs:
contribs:
runs-on: ubuntu-latest
name: Manifest
steps:
- name: Checkout the code
uses: actions/checkout@v2
with:
path: zephyrproject/zephyr
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Manifest
uses: zephyrproject-rtos/action-manifest@2f1ad2908599d4fe747f886f9d733dd7eebae4ef
with:
github-token: ${{ secrets.GITHUB_TOKEN }}
manifest-path: 'west.yml'
checkout-path: 'zephyrproject/zephyr'
label-prefix: 'manifest-'
verbosity-level: '1'
labels: 'manifest, west'
dnm-labels: 'DNM'

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@@ -1,61 +0,0 @@
name: Create a Release
on:
push:
tags:
- 'v*'
jobs:
release:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v2
with:
fetch-depth: 0
- name: Get the version
id: get_version
run: echo ::set-output name=VERSION::${GITHUB_REF#refs/tags/}
- name: REUSE Compliance Check
uses: fsfe/reuse-action@v1
with:
args: spdx -o zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
- name: upload-results
uses: actions/upload-artifact@master
continue-on-error: True
with:
name: zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
path: zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
- name: Get Diff since last tag
run: |
oldtag=$(git describe --abbrev=0 ${{ github.ref }}^)
echo "Changes since ${oldtag}:" > release-notes.txt
echo "" >> release-notes.txt
echo "" >> release-notes.txt
git shortlog ${oldtag}..${{ github.ref }} >> release-notes.txt
- name: Create Release
id: create_release
uses: actions/create-release@v1
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
with:
tag_name: ${{ github.ref }}
release_name: Zephyr ${{ github.ref }}
body_path: release-notes.txt
draft: true
prerelease: true
- name: Upload Release Assets
id: upload-release-asset
uses: actions/upload-release-asset@v1
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
with:
upload_url: ${{ steps.create_release.outputs.upload_url }}
asset_path: zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
asset_name: zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
asset_content_type: text/plain

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@@ -1,23 +0,0 @@
name: "Close stale pull requests/issues"
on:
schedule:
- cron: "16 00 * * *"
jobs:
stale:
name: Find Stale issues and PRs
runs-on: ubuntu-latest
if: github.repository == 'zephyrproject-rtos/zephyr'
steps:
- uses: actions/stale@v3
with:
repo-token: ${{ secrets.GITHUB_TOKEN }}
stale-pr-message: 'This pull request has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this pull request will automatically be closed in 14 days. Note, that you can always re-open a closed pull request at any time.'
stale-issue-message: 'This issue has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this issue will automatically be closed in 14 days. Note, that you can always re-open a closed issue at any time.'
days-before-stale: 60
days-before-close: 14
stale-issue-label: 'Stale'
stale-pr-label: 'Stale'
exempt-pr-labels: 'Blocked,In progress'
exempt-issue-labels: 'In progress,Enhancement,Feature,Feature Request,RFC,Meta,Process'
operations-per-run: 400

View File

@@ -1,282 +0,0 @@
name: Run tests with twister
on:
push:
branches:
- main
pull_request_target:
branches:
- main
schedule:
# Run at 00:00 on Wednesday and Saturday
- cron: '0 0 * * 3,6'
jobs:
twister-build-cleanup:
runs-on: ubuntu-latest
steps:
- name: Cancel Previous Runs
uses: styfle/cancel-workflow-action@0.6.0
with:
access_token: ${{ github.token }}
twister-build-prep:
runs-on: zephyr_runner
needs: twister-build-cleanup
container:
image: zephyrprojectrtos/ci:v0.21.0
options: '--entrypoint /bin/bash'
volumes:
- /home/runners/zephyrproject:/github/cache/zephyrproject
outputs:
subset: ${{ steps.output-services.outputs.subset }}
size: ${{ steps.output-services.outputs.size }}
fullrun: ${{ steps.output-services.outputs.fullrun }}
env:
MATRIX_SIZE: 10
PUSH_MATRIX_SIZE: 15
DAILY_MATRIX_SIZE: 80
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.2
CLANG_ROOT_DIR: /usr/lib/llvm-12
TESTS_PER_BUILDER: 700
COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
BASE_REF: ${{ github.base_ref }}
steps:
- name: Cleanup
run: |
# hotfix, until we have a better way to deal with existing data
rm -rf zephyr zephyr-testing
- name: Checkout
if: github.event_name == 'pull_request_target'
uses: actions/checkout@v2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Environment Setup
if: github.event_name == 'pull_request_target'
run: |
pip3 install GitPython
git config --global user.email "bot@zephyrproject.org"
git config --global user.name "Zephyr Bot"
rm -fr ".git/rebase-apply"
git rebase origin/${BASE_REF}
git log --pretty=oneline | head -n 10
west init -l . || true
# no need for west update here
- name: Generate Test Plan with Twister
if: github.event_name == 'pull_request_target'
id: test-plan
run: |
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
python3 ./scripts/ci/test_plan.py -c origin/${BASE_REF}.. --pull-request -t $TESTS_PER_BUILDER
if [ -s .testplan ]; then
cat .testplan >> $GITHUB_ENV
else
echo "TWISTER_NODES=${MATRIX_SIZE}" >> $GITHUB_ENV
fi
rm -f testplan.csv .testplan
- name: Determine matrix size
id: output-services
run: |
if [ "${{github.event_name}}" = "pull_request_target" ]; then
if [ -n "${TWISTER_NODES}" ]; then
subset="[$(seq -s',' 1 ${TWISTER_NODES})]"
else
subset="[$(seq -s',' 1 ${MATRIX_SIZE})]"
fi
size=${TWISTER_NODES}
elif [ "${{github.event_name}}" = "push" ]; then
subset="[$(seq -s',' 1 ${PUSH_MATRIX_SIZE})]"
size=${MATRIX_SIZE}
elif [ "${{github.event_name}}" = "schedule" -a "${{github.repository}}" = "zephyrproject-rtos/zephyr" ]; then
subset="[$(seq -s',' 1 ${DAILY_MATRIX_SIZE})]"
size=${DAILY_MATRIX_SIZE}
else
size=0
fi
echo "::set-output name=subset::${subset}";
echo "::set-output name=size::${size}";
echo "::set-output name=fullrun::${TWISTER_FULL}";
twister-build:
runs-on: zephyr_runner
needs: twister-build-prep
if: needs.twister-build-prep.outputs.size != 0
container:
image: zephyrprojectrtos/ci:v0.21.0
options: '--entrypoint /bin/bash'
volumes:
- /home/runners/zephyrproject:/github/cache/zephyrproject
strategy:
fail-fast: false
matrix:
subset: ${{fromJSON(needs.twister-build-prep.outputs.subset)}}
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.2
CLANG_ROOT_DIR: /usr/lib/llvm-12
TWISTER_COMMON: ' --inline-logs -v -N -M --retry-failed 3 '
DAILY_OPTIONS: ' -M --build-only --all '
PR_OPTIONS: ' --clobber-output --integration '
PUSH_OPTIONS: ' --clobber-output -M '
COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
BASE_REF: ${{ github.base_ref }}
steps:
- name: Cleanup
run: |
# hotfix, until we have a better way to deal with existing data
rm -rf zephyr zephyr-testing
- name: Checkout
uses: actions/checkout@v2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Environment Setup
run: |
pip3 install GitPython
if [ "${{github.event_name}}" = "pull_request_target" ]; then
git config --global user.email "bot@zephyrproject.org"
git config --global user.name "Zephyr Builder"
rm -fr ".git/rebase-apply"
git rebase origin/${BASE_REF}
git log --pretty=oneline | head -n 10
fi
echo "$HOME/.local/bin" >> $GITHUB_PATH
west init -l . || true
west config --global update.narrow true
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
- name: Check Environment
run: |
cmake --version
${CLANG_ROOT_DIR}/bin/clang --version
gcc --version
ls -la
echo "github.ref: ${{ github.ref }}"
echo "github.base_ref: ${{ github.base_ref }}"
echo "github.ref_name: ${{ github.ref_name }}"
- name: Prepare ccache timestamp/data
id: ccache_cache_timestamp
shell: cmake -P {0}
run: |
string(TIMESTAMP current_date "%Y-%m-%d-%H;%M;%S" UTC)
string(REPLACE "/" "_" repo ${{github.repository}})
string(REPLACE "-" "_" repo2 ${repo})
message("::set-output name=repo::${repo2}")
- name: use cache
id: cache-ccache
uses: nashif/action-s3-cache@master
with:
key: ${{ steps.ccache_cache_timestamp.outputs.repo }}-${{ github.ref_name }}-${{github.event_name}}-${{ matrix.subset }}-ccache
path: /github/home/.ccache
aws-s3-bucket: ccache.zephyrproject.org
aws-access-key-id: ${{ secrets.CCACHE_S3_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.CCACHE_S3_SECRET_ACCESS_KEY }}
aws-region: us-east-2
- name: ccache stats initial
run: |
test -d github/home/.ccache && rm -rf /github/home/.ccache && mv github/home/.ccache /github/home/.ccache
ccache -M 10G -s
- if: github.event_name == 'push'
name: Run Tests with Twister (Push)
run: |
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
./scripts/twister --subset ${{matrix.subset}}/${{ strategy.job-total }} ${TWISTER_COMMON} ${PUSH_OPTIONS}
if [ "${{matrix.subset}}" = "1" ]; then
./scripts/zephyr_module.py --twister-out module_tests.args
if [ -s module_tests.args ]; then
./scripts/twister +module_tests.args --outdir module_tests ${TWISTER_COMMON} ${PUSH_OPTIONS}
fi
fi
- if: github.event_name == 'pull_request_target'
name: Run Tests with Twister (Pull Request)
run: |
rm -f testplan.csv
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
python3 ./scripts/ci/test_plan.py -c origin/${BASE_REF}.. --pull-request
./scripts/twister --subset ${{matrix.subset}}/${{ strategy.job-total }} --load-tests testplan.csv ${TWISTER_COMMON} ${PR_OPTIONS}
if [ "${{matrix.subset}}" = "1" -a ${{needs.twister-build-prep.outputs.fullrun}} = 'True' ]; then
./scripts/zephyr_module.py --twister-out module_tests.args
if [ -s module_tests.args ]; then
./scripts/twister +module_tests.args --outdir module_tests ${TWISTER_COMMON} ${PR_OPTIONS}
fi
fi
- if: github.event_name == 'schedule'
name: Run Tests with Twister (Daily)
run: |
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
./scripts/twister --subset ${{matrix.subset}}/${{ strategy.job-total }} ${TWISTER_COMMON} ${DAILY_OPTIONS}
if [ "${{matrix.subset}}" = "1" ]; then
./scripts/zephyr_module.py --twister-out module_tests.args
if [ -s module_tests.args ]; then
./scripts/twister +module_tests.args --outdir module_tests ${TWISTER_COMMON} ${DAILY_OPTIONS}
fi
fi
- name: ccache stats post
run: |
ccache -s
- name: Upload Unit Test Results
if: always()
uses: actions/upload-artifact@v2
with:
name: Unit Test Results (Subset ${{ matrix.subset }})
if-no-files-found: ignore
path: |
twister-out/twister.xml
testplan.csv
twister-test-results:
name: "Publish Unit Tests Results"
needs: twister-build
runs-on: ubuntu-latest
# the build-and-test job might be skipped, we don't need to run this job then
if: success() || failure()
steps:
- name: Download Artifacts
uses: actions/download-artifact@v2
with:
path: artifacts
- name: Merge Test Results
run: |
pip3 install junitparser junit2html
junitparser merge artifacts/*/*/twister.xml junit.xml
junit2html junit.xml junit.html
- name: Upload Unit Test Results in HTML
if: always()
uses: actions/upload-artifact@v2
with:
name: HTML Unit Test Results
if-no-files-found: ignore
path: |
junit.html
- name: Publish Unit Test Results
uses: EnricoMi/publish-unit-test-result-action@v1
with:
check_name: Unit Test Results
github_token: ${{ secrets.GITHUB_TOKEN }}
files: "**/twister.xml"
comment_mode: off

View File

@@ -1,52 +0,0 @@
# Copyright (c) 2020 Intel Corporation.
# SPDX-License-Identifier: Apache-2.0
name: Twister TestSuite
on:
push:
paths:
- 'scripts/pylib/twister/**'
- 'scripts/twister'
- 'scripts/tests/twister/**'
- '.github/workflows/twister_tests.yml'
pull_request:
paths:
- 'scripts/pylib/twister/**'
- 'scripts/twister'
- 'scripts/tests/twister/**'
- '.github/workflows/twister_tests.yml'
jobs:
twister-tests:
name: Twister Unit Tests
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: [3.6, 3.7, 3.8]
os: [ubuntu-latest]
steps:
- name: checkout
uses: actions/checkout@v2
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v1
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux
if: startsWith(runner.os, 'Linux')
uses: actions/cache@v1
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ matrix.python-version }}
restore-keys: |
${{ runner.os }}-pip-${{ matrix.python-version }}
- name: install-packages
run: |
pip3 install pytest colorama pyyaml ply mock
- name: Run pytest
env:
ZEPHYR_BASE: ./
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
run: |
echo "Run twister tests"
PYTHONPATH=./scripts/tests pytest ./scripts/tests/twister

View File

@@ -1,74 +0,0 @@
# Copyright (c) 2020 Linaro Limited.
# SPDX-License-Identifier: Apache-2.0
name: Zephyr West Command Tests
on:
push:
paths:
- 'scripts/west-commands.yml'
- 'scripts/west_commands/**'
- '.github/workflows/west_cmds.yml'
pull_request:
paths:
- 'scripts/west-commands.yml'
- 'scripts/west_commands/**'
- '.github/workflows/west_cmds.yml'
jobs:
west-commnads:
name: West Command Tests
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: [3.6, 3.7, 3.8]
os: [ubuntu-latest, macos-latest, windows-latest]
exclude:
- os: macos-latest
python-version: 3.6
- os: windows-latest
python-version: 3.6
steps:
- name: checkout
uses: actions/checkout@v2
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v1
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux
if: startsWith(runner.os, 'Linux')
uses: actions/cache@v1
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ matrix.python-version }}
restore-keys: |
${{ runner.os }}-pip-${{ matrix.python-version }}
- name: cache-pip-mac
if: startsWith(runner.os, 'macOS')
uses: actions/cache@v1
with:
path: ~/Library/Caches/pip
# Trailing '-' was just to get a different cache name
key: ${{ runner.os }}-pip-${{ matrix.python-version }}-
restore-keys: |
${{ runner.os }}-pip-${{ matrix.python-version }}-
- name: cache-pip-win
if: startsWith(runner.os, 'Windows')
uses: actions/cache@v1
with:
path: ~\AppData\Local\pip\Cache
key: ${{ runner.os }}-pip-${{ matrix.python-version }}
restore-keys: |
${{ runner.os }}-pip-${{ matrix.python-version }}
- name: install pytest
run: |
pip3 install wheel
pip3 install pytest west pyelftools canopen progress mypy intelhex psutil
- name: run pytest-win
if: runner.os == 'Windows'
run: |
python ./scripts/west_commands/run_tests.py
- name: run pytest-mac-linux
if: runner.os != 'Windows'
run: |
./scripts/west_commands/run_tests.py

47
.gitignore vendored
View File

@@ -7,22 +7,18 @@
*.swp
*.swo
*~
build*/
!doc/guides/build
!tests/drivers/build_all
cscope.*
.dir
/*.patch
# The .cache directory will be used to cache toolchain capabilities if
# no suitable out-of-tree directory is found.
.cache
outdir
outdir-*
scripts/basic/fixdep
scripts/gen_idt/gen_idt
scripts/gen_offset_header/gen_offset_header
scripts/kconfig/conf
scripts/kconfig/mconf
scripts/kconfig/zconf.hash.c
scripts/kconfig/zconf.lex.c
scripts/kconfig/zconf.tab.c
doc/_build
doc/doxygen
doc/xml
@@ -31,30 +27,11 @@ doc/boards
doc/samples
doc/latex
doc/themes/zephyr-docs-theme
sanity-out*
twister-out*
bsim_bt_out
sanity-out/
scripts/grub
doc/reference/kconfig/*.rst
doc/doc.warnings
.*project
.settings
.envrc
.vscode
hide-defaults-note
venv
.venv
.DS_Store
# CI output
compliance.xml
_error.types
# Tag files
GPATH
GRTAGS
GTAGS
TAGS
doc/reference/kconfig/CONFIG_*
doc/reference/kconfig/index.rst
tags
.idea
.project
.cproject
.xxproject

View File

@@ -1,13 +1,10 @@
# All these sections are optional, edit this file as you like.
[general]
ignore=title-trailing-punctuation, T3, title-max-length, T1, body-hard-tab, B3, B1
ignore=title-trailing-punctuation, T3
# verbosity should be a value between 1 and 3, the commandline -v flags take precedence over this
verbosity = 3
verbosity = 2
# By default gitlint will ignore merge commits. Set to 'false' to disable.
ignore-merge-commits=false
ignore-revert-commits=false
ignore-fixup-commits=false
ignore-squash-commits=false
ignore-merge-commits=true
# Enable debug mode (prints more output). Disabled by default
debug = false
@@ -15,23 +12,21 @@ debug = false
# See http://jorisroovers.github.io/gitlint/user_defined_rules for details
extra-path=scripts/gitlint
[title-max-length-no-revert]
line-length=75
[body-min-line-count]
min-line-count=1
[body-max-line-count]
max-line-count=200
[title-max-length]
line-length=72
[title-starts-with-subsystem]
regex = ^(?!subsys:)(([^:]+):)(\s([^:]+):)*\s(.+)$
regex = ^(([^:]+):)(\s([^:]+):)*\s(.+)$
[title-must-not-contain-word]
# Comma-separated list of words that should not occur in the title. Matching is case
# insensitive. It's fine if the keyword occurs as part of a larger word (so "WIPING"
# will not cause a violation, but "WIP: my title" will.
words=wip
words=wip,title
[title-match-regex]
# python like regex (https://docs.python.org/2/library/re.html) that the
@@ -42,7 +37,7 @@ words=wip
[max-line-length-with-exceptions]
# B1 = body-max-line-length
line-length=75
line-length=72
[body-min-length]
min-length=3

5
.gitreview Normal file
View File

@@ -0,0 +1,5 @@
[gerrit]
host=gerrit.zephyrproject.org
port=29418
project=zephyr.git
defaultremote=origin

55
.known-issues/README Normal file
View File

@@ -0,0 +1,55 @@
This directory contains configuration files to ignore errors found in
the build and test process which are known to the developers and for
now can be safely ignored.
To use:
$ cd zephyr
$ make SOMETHING >& result
$ scripts/filter-known-issues.py result
It is included in the source tree so if anyone has to submit anything
that triggers some kind of error that is a false positive, it can
include the "ignore me" file, properly documented.
Each file can contain one or more multiline Python regular expressions
(https://docs.python.org/2/library/re.html#regular-expression-syntax)
that match an error message. Multiple regular expressions are
separated by comment blocks (that start with #). Note that an empty
line still is considered part of the multiline regular expression.
For example
---beginning---
#
# This testcase always fails, pending fix ZEP-1234
#
.*/tests/kernel/grumpy .* FAIL
#
# Documentation issue, masks:
#
# /home/e/inaky/z/kernel.git/doc/api/io_interfaces.rst:28: WARNING: Invalid definition: Expected identifier in nested name. [error at 19]
# struct dev_config::@65 dev_config::bits
# -------------------^
#
^(?P<filename>.+/doc/api/io_interfaces.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^\s+struct dev_config::@[0-9]+ dev_config::bits.*
^\s+-+\^
---end---
Note you want to:
- use relateive paths; instead of
/home/me/mydir/zephyr/something/somewhere.c you will want
^.*/something/somewhere.c (as they will depend on where it is being
built)
- Replace line numbers with [0-9]+, as they will change
- (?P<filename>[-._/\w]+/something/somewhere.c) saves the match on
that file path in a "variable" called 'filename' that later you can
match with (?P=filename) if you want to match multiple lines of the
same error message.
Can get really twisted and interesting in terms of regexps; they are
powerful, so start small :)

View File

@@ -0,0 +1,42 @@
#
# Bluetooth unnamed struct definition
#
# FIXME: all these should match the relative filename
#
^(?P<filename>[-._/\w]+/doc/api/bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]$
^[ \t]*$
^[ \t]*\^$
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]$
^[ \t]*$
^[ \t]*\^$
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]$
^.*bt_conn_info.__unnamed__.*$
^[- \t]*\^$
#
# bt_gatt_discover_params unnamed struct definition
#
^(?P<filename>[-._/\w]+/doc/api/bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
^.*bt_gatt_discover_params.__unnamed__.*
^[- \t]*\^
#
# Bluetooth GATT unnamed struct definition
#
^(?P<filename>[-._/\w]+/doc/api/bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
^.*bt_gatt_read_params.__unnamed__.*
^[- \t]*\^
#
# Bluetooth packed
#
^(?P<filename>[-._/\w]+/doc/api/bluetooth.rst):(?P<lineno>[0-9]+): WARNING: cpp:typeOrConcept targets a member \(__packed\).$

View File

@@ -0,0 +1,18 @@
#
# KERNELVERSION not being defined in local builds, kill that warning,
# can ignore it
#
^.*/Kconfig.zephyr:[0-9]+: warning: The symbol KERNELVERSION references the non-existent environment variable KERNELVERSION.*
#
# Documentation generation, early message
#
^cd .* && doxygen doc/doxygen.config
^srctree=.* SRCARCH=\w+ python scripts/genrest/genrest.py .*$
# This cuts the sphinx build line; has to be separate because in the
# middle, we have removed the KERNELVERSION one and a full regex won't match
^sphinx-build -t \w+ -b html .*
#
# Documentation generation, footer message
#
^[ \t]*
^Build finished. The HTML pages are in [-._/\w]+

View File

@@ -0,0 +1,14 @@
#
# Kernel unnamed struct definition
#
# FIXME: all these should match the relative filename
#
^(?P<filename>[-._/\w]+/doc/api/kernel_api.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]$
^[ \t]*$
^[ \t]*\^$
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]$
^[ \t]*$
^[ \t]*\^$
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]$
^.*k_msg.extra.*$
^[- \t]*\^$

View File

@@ -0,0 +1,49 @@
#
# Networking
#
#
# include/net/net_ip.h warnings
#
^(?P<filename>[-._/\w]+/doc/api/networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
^.*in[_6]+addr.in[46]_u
^[- \t]*\^
#
# include/net/net_if.h warnings
#
^(?P<filename>[-._/\w]+/doc/api/networking.rst):(?P<lineno>[0-9]+): WARNING: Error when parsing function declaration.
^\If the function has no return type:
^[ \t]*Error in declarator or parameters and qualifiers
^[ \t]*Invalid definition: Expected identifier in nested name, got keyword: struct \[error at [0-9]+]
^.*struct net_if __aligned\(32\)
^[- \t]*\^
^\If the function has a return type:
^[ \t]*Error in declarator or parameters and qualifiers
^[ \t]*If pointer to member declarator:
^[ \t]*Invalid definition: Expected \'::\' in pointer to member \(function\). \[error at [0-9]+]
^.*struct net_if __aligned\(32\)
^[- \t]*\^
^[ \t]*If declarator-id:
^[ \t]*Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^.*struct net_if __aligned\(32\)
^[- \t]*\^
#
# include/net/net_mgmt.h
#
^(?P<filename>[-._/\w]+/doc/api/networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
^.*net_mgmt_event_callback.__unnamed__
^[- \t]*\^

View File

@@ -0,0 +1,12 @@
#
# Sensor value unnamed struct definition
#
^(?P<filename>[-._/\w]+/doc/api/io_interfaces.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
^.*sensor_value.__unnamed__.*
^[- \t]*\^

View File

@@ -0,0 +1,15 @@
#
# UART unnamed struct definition
#
^(?P<filename>[-._/\w]+/doc/api/io_interfaces.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^[ \t]*
^[ \t]*\^
^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
^.*uart_device_config.__unnamed__.*
^[- \t]*\^

6
.known-issues/make.conf Normal file
View File

@@ -0,0 +1,6 @@
#
# When filtering output of the build process, ignore lines that don't
# provide any information that helps the invoker tell if there was an
# error.
#
^make: (Entering|Leaving) directory .*

View File

@@ -0,0 +1,11 @@
#
# When executing test cases, ignore the following messages as they are
# not to be considered hard errors.
#
# Block line when test case cannot run in the HW due to server or connection issues
#
^BLCK0/[-a-z0-9:]+ (.+)#test @[^/]+/[^:]+:[^:]+: evaluation blocked(.*)$
#
# Block line when there is an issue with the YKUSH serial connection
#
^BLCK0/[-a-z0-9:]+ (.+)#test @[^/]+/(?P<board>[^:]+):[^:]+: exception: 400: (?P=board): Cannot find YKUSH serial '[A-Z0-9]+'$

View File

@@ -0,0 +1,18 @@
#
# When executing test cases under TCF, ignore the following messages
# as they are not to be considered hard errors.
#
# TCF is run under make for taking advantage of the jobserver; when
# the testcase execution fail, make will complain, which we can
# ignore ('sommersault' was the old name of the target).
#
^/tmp/tcf-[a-zA-Z0-9]+.mk:[0-9]+: recipe for target ('tcf-jobserver-run'|'sommersault') failed$
#
# More of the same
#
^make: \*\*\* \[(tcf-jobserver-run|sommersault)\] Error 1$
#
# TCF's summary line. We don't need to consider it to determine if the
# run failed or passed.
#
^[A-Z]+0/\S+:\s+\S+\s+@\S+: [0-9]+ tests \([0-9]+ passed, [0-9]+ failed, [0-9]+ blocked, [0-9]+ skipped\).*$

View File

@@ -0,0 +1,4 @@
#
# Skip line when test case is eliminated due to filters
#
^SKIP0/\S+\s+\S+: No targets can be used \(all [0-9]+ selected from [0-9]+ available eliminated by testcase filtering\)$

View File

@@ -19,17 +19,3 @@ Naga Raja Rao Tulasi <tulasi.r@tcs.com> <tulasi.r@tcs.com>
Felipe Neves <ryukokki.felipe@gmail.com> <ryukokki.felipe@gmail.com>
Amir Kaplan <amir.kaplan@intel.com> <amir.kaplan@intel.com>
Anas Nashif <anas.nashif@intel.com> <anas.nashif@intel.com>
Ruud Derwig <Ruud.Derwig@synopsys.com> <Ruud.Derwig@synopsys.com>
Flavio Arieta Netto <flavio@exati.com.br>
Nishikant Nayak <nishikantax.nayak@intel.com>
Justin Watson <jwatson5@gmail.com>
Johann Fischer <j.fischer@phytec.de>
Jun Li <jun.r.li@intel.com>
Xiaorui Hu <xiaorui.hu@linaro.org>
Yannis Damigos <giannis.damigos@gmail.com> <ydamigos@iccs.gr>
Vinayak Kariappa Chettimada <vinayak.kariappa.chettimada@nordicsemi.no> <vinayak.kariappa.chettimada@nordicsemi.no> <vich@nordicsemi.no> <vinayak.kariappa@gmail.com>
Sean Nyekjaer <sean@geanix.com> <sean.nyekjaer@prevas.dk>
Sean Nyekjaer <sean@geanix.com> <sean@nyekjaer.dk>
Marc Herbert <marc.herbert@intel.com> <46978960+marc-hb@users.noreply.github.com>
Martin Jäger <martin@libre.solar> <17674105+martinjaeger@users.noreply.github.com>
Armand Ciejak <armand@riedonetworks.com> <armandciejak@users.noreply.github.com>

118
.shippable.yml Normal file
View File

@@ -0,0 +1,118 @@
language: c
compiler: gcc
env:
global:
- SDK=0.9.1
- SANITYCHECK_OPTIONS=" --inline-logs -R"
- SANITYCHECK_OPTIONS_RETRY="${SANITYCHECK_OPTIONS} --only-failed --outdir=out-2nd-pass"
- ZEPHYR_SDK_INSTALL_DIR=/opt/sdk/zephyr-sdk-0.9.1
- ZEPHYR_GCC_VARIANT=zephyr
- USE_CCACHE=1
- MATRIX_BUILDS="2"
matrix:
- MATRIX_BUILD="1"
- MATRIX_BUILD="2"
build:
cache: true
cache_dir_list:
- ${SHIPPABLE_BUILD_DIR}/ccache
pre_ci_boot:
image_name: zephyrprojectrtos/ci
image_tag: master.16
pull: true
options: "-e HOME=/home/buildslave --privileged=true --tty --net=bridge --user buildslave"
ci:
- export CCACHE_DIR=${SHIPPABLE_BUILD_DIR}/ccache/.ccache
- source zephyr-env.sh
- ccache -c -s --max-size=2000M
- make host-tools
- export PREBUILT_HOST_TOOLS=${ZEPHYR_BASE}/bin
- >
if [ "$IS_PULL_REQUEST" = "true" ]; then
S3_PATH="s3://zephyr-logs/pull-requests/${REPO_FULL_NAME}/${PULL_REQUEST}"
else
if [ "$JOB_TRIGGERED_BY_NAME" = "undefined" ]; then
LOG_TYPE="manual";
else
LOG_TYPE=${JOB_TRIGGERED_BY_NAME};
fi;
S3_PATH="s3://zephyr-logs/${LOG_TYPE}/${REPO_FULL_NAME}/${BUILD_NUMBER}";
fi;
- >
if [ "$MATRIX_BUILD" = "1" -a "$IS_PULL_REQUEST" = "true" ]; then
export COMMIT_RANGE=origin/${PULL_REQUEST_BASE_BRANCH}..${COMMIT}
echo "Building a Pull Request";
echo "- Building Documentation";
echo "Commit range:" ${COMMIT_RANGE}
sudo pip install sphinx==1.5.5
make htmldocs > doc.log 2>&1;
./scripts/filter-known-issues.py --config-dir .known-issues/doc/ doc.log > doc.warnings;
if [ -s doc.warnings ]; then
echo " => New documentation warnings/errors";
fi;
echo "- Verify commit message and coding style";
./scripts/ci/check-compliance.py || true;
fi;
- >
if [ "$JOB_TRIGGERED_BY_NAME" = "daily-verify" ]; then
echo "- Building with --all --enable-slow";
COVERAGE="--all --enable-slow";
fi;
- >
./scripts/sanitycheck ${PLATFORMS} --subset ${MATRIX_BUILD}/${MATRIX_BUILDS} ${COVERAGE} ${SANITYCHECK_OPTIONS} || ./scripts/sanitycheck ${PLATFORMS} --subset ${MATRIX_BUILD}/${MATRIX_BUILDS} ${COVERAGE} ${SANITYCHECK_OPTIONS_RETRY};
- ccache -s
on_success:
- rm -rf sanity-out out-2nd-pass
- mkdir -p shippable/testresults
- >
if [ -e compliance.xml ]; then
cp compliance.xml shippable/testresults/;
aws s3 cp compliance.xml ${S3_PATH}/;
fi;
- >
if [ -e ./scripts/sanity_chk/last_sanity.xml ]; then
cp ./scripts/sanity_chk/last_sanity.xml shippable/testresults/;
aws s3 cp ./scripts/sanity_chk/last_sanity.xml ${S3_PATH}/sanitycheck.xml;
fi;
on_failure:
- rm -rf sanity-out out-2nd-pass
- mkdir -p shippable/testresults
- >
if [ -e compliance.xml ]; then
cp compliance.xml shippable/testresults/;
aws s3 cp compliance.xml ${S3_PATH}/;
fi;
- >
if [ -e ./scripts/sanity_chk/last_sanity.xml ]; then
cp ./scripts/sanity_chk/last_sanity.xml shippable/testresults/;
aws s3 cp ./scripts/sanity_chk/last_sanity.xml ${S3_PATH}/sanitycheck.xml;
fi;
integrations:
notifications:
- integrationName: slack_integration
type: slack
recipients:
- "#ci"
branches:
only:
- master
on_success: never
on_failure: always
- integrationName: email
type: email
recipients:
- builds@zephyrproject.org
branches:
only:
- master
- net
- bluetooth
- arm
on_success: never
on_failure: never

View File

@@ -1,87 +0,0 @@
indent_with_tabs = 2 # 1=indent to level only, 2=indent with tabs
input_tab_size = 8 # original tab size
output_tab_size = 8 # new tab size
indent_columns = output_tab_size
indent_label = 1 # pos: absolute col, neg: relative column
indent_switch_case = 0 # number
#
# inter-symbol newlines
#
nl_enum_brace = remove # "enum {" vs "enum \n {"
nl_union_brace = remove # "union {" vs "union \n {"
nl_struct_brace = remove # "struct {" vs "struct \n {"
nl_do_brace = remove # "do {" vs "do \n {"
nl_if_brace = remove # "if () {" vs "if () \n {"
nl_for_brace = remove # "for () {" vs "for () \n {"
nl_else_brace = remove # "else {" vs "else \n {"
nl_while_brace = remove # "while () {" vs "while () \n {"
nl_switch_brace = remove # "switch () {" vs "switch () \n {"
nl_brace_while = remove # "} while" vs "} \n while" - cuddle while
nl_brace_else = remove # "} \n else" vs "} else"
nl_func_var_def_blk = 1
nl_fcall_brace = remove # "list_for_each() {" vs "list_for_each()\n{"
nl_fdef_brace = add # "int foo() {" vs "int foo()\n{"
#
# End of file behavior
#
nl_end_of_file = force # string (add/force/ignore/remove)
nl_end_of_file_min = 1 # The min number of newlines at end of file
#
# Source code modifications
#
mod_paren_on_return = ignore # "return 1;" vs "return (1);"
mod_full_brace_if = add # "if() { } else { }" vs "if() else"
#
# inter-character spacing options
#
sp_sizeof_paren = remove # "sizeof (int)" vs "sizeof(int)"
sp_before_sparen = force # "if (" vs "if("
sp_after_sparen = force # "if () {" vs "if (){"
sp_inside_braces = add # "{ 1 }" vs "{1}"
sp_inside_braces_struct = add # "{ 1 }" vs "{1}"
sp_inside_braces_enum = add # "{ 1 }" vs "{1}"
sp_assign = add
sp_arith = add
sp_bool = add
sp_compare = add
sp_assign = add
sp_after_comma = add
sp_func_def_paren = remove # "int foo (){" vs "int foo(){"
sp_func_call_paren = remove # "foo (" vs "foo("
sp_func_proto_paren = remove # "int foo ();" vs "int foo();"
sp_inside_fparen = remove # "func( arg )" vs "func(arg)"
sp_else_brace = add # ignore/add/remove/force
sp_before_ptr_star = add # ignore/add/remove/force
sp_after_ptr_star = remove # ignore/add/remove/force
sp_between_ptr_star = remove # ignore/add/remove/force
sp_inside_paren = remove # remove spaces inside parens
sp_paren_paren = remove # remove spaces between nested parens
sp_inside_sparen = remove # remove spaces inside parens for if, while and the like
sp_brace_else = add # ignore/add/remove/force
sp_before_nl_cont = ignore
sp_cmt_cpp_start = add
sp_brace_typedef = add # }typedefd_name -> } typedefd_name
cmt_sp_after_star_cont = 1
#
# Aligning stuff
#
align_with_tabs = FALSE # use tabs to align
align_on_tabstop = TRUE # align on tabstops
align_enum_equ_span = 4 # '=' in enum definition
align_struct_init_span = 0 # align stuff in a structure init '= { }'
align_right_cmt_span = 3
align_nl_cont = TRUE
sp_pp_concat = ignore # ignore/add/remove/force

File diff suppressed because it is too large Load Diff

View File

@@ -1,799 +0,0 @@
# CODEOWNERS for autoreview assigning in github
# https://help.github.com/en/articles/about-code-owners#codeowners-syntax
# Order is important; for each modified file, the last matching
# pattern takes the most precedence.
# That is, with the last pattern being
# *.rst @nashif
# if only .rst files are being modified, only nashif is
# automatically requested for review, but you can manually
# add others as needed.
# Do not use wildcard on all source yet
# * @galak @nashif
/.github/ @nashif
/.github/workflows/ @galak @nashif
/MAINTAINERS.yml @MaureenHelm
/arch/arc/ @abrodkin @ruuddw @evgeniy-paltsev
/arch/arm/ @MaureenHelm @galak @ioannisg
/arch/arm/core/aarch32/cortex_m/cmse/ @ioannisg
/arch/arm/include/aarch32/cortex_m/cmse.h @ioannisg
/arch/arm/core/aarch32/cortex_a_r/ @MaureenHelm @galak @ioannisg @bbolen @stephanosio
/arch/arm64/ @carlocaione
/arch/arm64/core/cortex_r/ @povergoing
/arch/arm64/core/xen/ @lorc @firscity
/arch/common/ @ioannisg @andyross
/arch/mips/ @frantony
/soc/arc/snps_*/ @abrodkin @ruuddw @evgeniy-paltsev
/soc/nios2/ @nashif
/soc/arm/ @MaureenHelm @galak @ioannisg
/soc/arm/arm/mps2/ @fvincenzo
/soc/arm/atmel_sam/common/*_sam4l_*.c @nandojve
/soc/arm/atmel_sam/sam3x/ @ioannisg
/soc/arm/atmel_sam/sam4e/ @nandojve
/soc/arm/atmel_sam/sam4l/ @nandojve
/soc/arm/atmel_sam/sam4s/ @fallrisk
/soc/arm/atmel_sam/same70/ @nandojve
/soc/arm/atmel_sam/samv71/ @nandojve
/soc/arm/cypress/ @nandojve
/soc/arm/bcm*/ @sbranden
/soc/arm/gigadevice/ @nandojve
/soc/arm/infineon_xmc/ @parthitce
/soc/arm/nxp*/ @mmahadevan108 @dleach02
/soc/arm/nordic_nrf/ @anangl
/soc/arm/nuvoton_npcx/ @MulinChao @WealianLiao @ChiHuaL
/soc/arm/nuvoton_numicro/ @ssekar15
/soc/arm/quicklogic_eos_s3/ @kowalewskijan @kgugala
/soc/arm/rpi_pico/ @yonsch
/soc/arm/silabs_exx32/efm32pg1b/ @rdmeneze
/soc/arm/silabs_exx32/efr32mg21/ @l-alfred
/soc/arm/st_stm32/ @erwango
/soc/arm/st_stm32/*/power.c @FRASTM
/soc/arm/st_stm32/stm32mp1/ @arnopo
/soc/arm/ti_simplelink/cc13x2_cc26x2/ @bwitherspoon
/soc/arm/ti_simplelink/cc32xx/ @vanti
/soc/arm/ti_simplelink/msp432p4xx/ @Mani-Sadhasivam
/soc/arm/xilinx_zynq7000/ @ibirnbaum
/soc/arm/xilinx_zynqmp/ @stephanosio
/soc/arm/renesas_rcar/ @julien-massot
/soc/xtensa/intel_s1000/ @sathishkuttan @dcpleung
/soc/arm64/ @carlocaione
/soc/arm64/qemu_cortex_a53/ @carlocaione
/soc/arm64/bcm_vk/ @abhishek-brcm
/soc/arm64/nxp_layerscape/ @JiafeiPan
/soc/arm64/xenvm/ @lorc @firscity
/soc/arm64/arm/ @povergoing
/soc/arm64/arm/fvp_aemv8a/ @carlocaione
/submanifests/* @mbolivar-nordic
/arch/x86/ @jhedberg @nashif @jenmwms @aasthagr
/arch/nios2/ @nashif
/arch/posix/ @aescolar @daor-oti
/arch/riscv/ @kgugala @pgielda
/soc/mips/ @frantony
/soc/posix/ @aescolar @daor-oti
/soc/riscv/ @kgugala @pgielda
/soc/riscv/openisa*/ @dleach02
/soc/riscv/riscv-privilege/andes_v5/ @cwshu @kevinwang821020 @jimmyzhe
/soc/riscv/riscv-privilege/neorv32/ @henrikbrixandersen
/soc/riscv/riscv-privilege/gd32vf103/ @soburi
/soc/x86/ @dcpleung @nashif @jenmwms @aasthagr
/arch/xtensa/ @dcpleung @andyross @nashif
/soc/xtensa/ @dcpleung @andyross @nashif
/arch/sparc/ @martin-aberg
/soc/sparc/ @martin-aberg
/boards/arc/ @abrodkin @ruuddw @evgeniy-paltsev
/boards/arm/ @MaureenHelm @galak
/boards/arm/96b_argonkey/ @avisconti
/boards/arm/96b_avenger96/ @Mani-Sadhasivam
/boards/arm/96b_carbon/ @idlethread
/boards/arm/96b_meerkat96/ @Mani-Sadhasivam
/boards/arm/96b_nitrogen/ @idlethread
/boards/arm/96b_neonkey/ @Mani-Sadhasivam
/boards/arm/96b_stm32_sensor_mez/ @Mani-Sadhasivam
/boards/arm/96b_wistrio/ @Mani-Sadhasivam
/boards/arm/arduino_due/ @ioannisg
/boards/arm/bbc_microbit_v2/ @LingaoM
/boards/arm/blackpill_f401ce/ @coderkalyan
/boards/arm/blackpill_f411ce/ @coderkalyan
/boards/arm/cc1352r1_launchxl/ @bwitherspoon
/boards/arm/cc26x2r1_launchxl/ @bwitherspoon
/boards/arm/cc3220sf_launchxl/ @vanti
/boards/arm/cy8* @nandojve
/boards/arm/disco_l475_iot1/ @erwango
/boards/arm/efm32pg_stk3401a/ @rdmeneze
/boards/arm/faze/ @mbittan @simonguinot
/boards/arm/frdm*/ @mmahadevan108 @dleach02
/boards/arm/frdm*/doc/ @dleach02 @MeganHansen
/boards/arm/gd32*/ @nandojve
/boards/arm/google_*/ @jackrosenthal
/boards/arm/hexiwear*/ @mmahadevan108 @dleach02
/boards/arm/hexiwear*/doc/ @dleach02 @MeganHansen
/boards/arm/ip_k66f/ @parthitce @lmajewski
/boards/arm/legend/ @mbittan @simonguinot
/boards/arm/lpcxpresso*/ @mmahadevan108 @dleach02
/boards/arm/lpcxpresso*/doc/ @dleach02 @MeganHansen
/boards/arm/mimx8mm_evk/ @Mani-Sadhasivam
/boards/arm/mimxrt*/ @mmahadevan108 @dleach02
/boards/arm/mimxrt*/doc/ @dleach02 @MeganHansen
/boards/arm/mps2_an385/ @fvincenzo
/boards/arm/msp_exp432p401r_launchxl/ @Mani-Sadhasivam
/boards/arm/npcx7m6fb_evb/ @MulinChao @WealianLiao @ChiHuaL
/boards/arm/nrf*/ @carlescufi @lemrey
/boards/arm/nucleo*/ @erwango @ABOSTM @FRASTM
/boards/arm/nucleo_f401re/ @idlethread
/boards/arm/nuvoton_pfm_m487/ @ssekar15
/boards/arm/qemu_cortex_a9/ @ibirnbaum
/boards/arm/qemu_cortex_r*/ @stephanosio
/boards/arm/qemu_cortex_m*/ @ioannisg @stephanosio
/boards/arm/quick_feather/ @kowalewskijan @kgugala
/boards/arm/rak4631_nrf52840/ @gpaquet85
/boards/arm/rak5010_nrf52840/ @gpaquet85
/boards/arm/rpi_pico/ @yonsch
/boards/arm/ronoth_lodev/ @NorthernDean
/boards/arm/xmc45_relax_kit/ @parthitce
/boards/arm/sam4e_xpro/ @nandojve
/boards/arm/sam4l_ek/ @nandojve
/boards/arm/sam4s_xplained/ @fallrisk
/boards/arm/sam_e70_xplained/ @nandojve
/boards/arm/sam_v71_xult/ @nandojve
/boards/arm/scobc_module1/ @yashi
/boards/arm/v2m_beetle/ @fvincenzo
/boards/arm/olimexino_stm32/ @ydamigos
/boards/arm/sensortile_box/ @avisconti
/boards/arm/steval_fcu001v1/ @Navin-Sankar
/boards/arm/stm32l1_disco/ @karlp
/boards/arm/stm32*_disco/ @erwango @ABOSTM @FRASTM
/boards/arm/stm32f3_disco/ @ydamigos
/boards/arm/stm32*_eval/ @erwango @ABOSTM @FRASTM
/boards/arm/rcar_h3ulcb/ @julien-massot
/boards/arm/ubx_bmd345eval_nrf52840/ @Navin-Sankar @brec-u-blox
/boards/common/ @mbolivar-nordic
/boards/deprecated.cmake @tejlmand
/boards/mips/ @frantony
/boards/nios2/ @nashif
/boards/nios2/altera_max10/ @nashif
/boards/arm/stm32_min_dev/ @sidcha
/boards/posix/ @aescolar @daor-oti
/boards/posix/nrf52_bsim/ @aescolar @wopu-ot
/boards/riscv/ @kgugala @pgielda
/boards/riscv/rv32m1_vega/ @dleach02
/boards/riscv/beaglev_starlight_jh7100/ @rajnesh-kanwal
/boards/riscv/adp_xc7k_ae350/ @cwshu @kevinwang821020 @jimmyzhe
/boards/riscv/gd32*/ @gmarull
/boards/riscv/longan_nano/ @soburi
/boards/riscv/neorv32/ @henrikbrixandersen
/boards/shields/ @erwango
/boards/shields/atmel_rf2xx/ @nandojve
/boards/shields/esp_8266/ @nandojve
/boards/shields/inventek_eswifi/ @nandojve
/boards/x86/ @dcpleung @nashif @jenmwms @aasthagr
/boards/x86/acrn/ @enjiamai
/boards/xtensa/ @nashif @dcpleung
/boards/xtensa/intel_s1000_crb/ @sathishkuttan @dcpleung
/boards/xtensa/odroid_go/ @ydamigos
/boards/xtensa/nxp_adsp_imx8/ @iuliana-prodan @dbaluta
/boards/sparc/ @martin-aberg
/boards/arm64/qemu_cortex_a53/ @carlocaione
/boards/arm64/bcm958402m2_a72/ @abhishek-brcm
/boards/arm64/nxp_ls1046ardb/ @JiafeiPan
/boards/arm64/xenvm/ @lorc @firscity
/boards/arm64/fvp_baser_aemv8r/ @povergoing
/boards/arm64/fvp_base_revc_2xaemv8a/ @carlocaione
/boards/arm64/intel_socfpga_agilex_socdk/ @siclim @ngboonkhai
# All cmake related files
/cmake/ @tejlmand @nashif
/cmake/*/arcmwdt/ @abrodkin @evgeniy-paltsev @tejlmand
/CMakeLists.txt @tejlmand @nashif
/doc/ @dbkinder
/doc/guides/coccinelle.rst @himanshujha199640 @JuliaLawall
/doc/CMakeLists.txt @carlescufi
/doc/_scripts/ @carlescufi
/doc/guides/bluetooth/ @alwa-nordic @jhedberg @Vudentz
/doc/guides/dts/ @galak @mbolivar-nordic
/doc/reference/bluetooth/ @alwa-nordic @jhedberg @Vudentz
/doc/reference/devicetree/ @galak @mbolivar-nordic
/doc/reference/canbus/ @alexanderwachter
/doc/security/ @ceolin @d3zd3z
/drivers/debug/ @nashif
/drivers/*/*sam4l* @nandojve
/drivers/*/*cc13xx_cc26xx* @bwitherspoon
/drivers/*/*gd32* @nandojve
/drivers/*/*litex* @mateusz-holenko @kgugala @pgielda
/drivers/*/*mcux* @mmahadevan108 @dleach02
/drivers/*/*stm32* @erwango @ABOSTM @FRASTM
/drivers/*/*native_posix* @aescolar @daor-oti
/drivers/*/*lpc11u6x* @mbittan @simonguinot
/drivers/*/*npcx* @MulinChao @WealianLiao @ChiHuaL
/drivers/*/*andes* @cwshu @kevinwang821020 @jimmyzhe
/drivers/*/*neorv32* @henrikbrixandersen
/drivers/adc/ @anangl
/drivers/adc/adc_stm32.c @cybertale
/drivers/audio/*nrfx* @anangl
/drivers/bbram/* @yperess @sjg20 @jackrosenthal
/drivers/bluetooth/ @alwa-nordic @jhedberg @Vudentz
/drivers/bluetooth/hci/hci_esp32.c @sylvioalves
/drivers/cache/ @carlocaione
/drivers/syscon/ @carlocaione @yperess
/drivers/can/ @alexanderwachter
/drivers/can/*mcp2515* @karstenkoenig
/drivers/can/*rcar* @julien-massot
/drivers/clock_control/*agilex* @siclim
/drivers/clock_control/*nrf* @nordic-krch
/drivers/clock_control/*esp32* @extremegtx @glaubermaroto
/drivers/clock_control/*rcar* @julien-massot
/drivers/counter/ @nordic-krch
/drivers/console/ipm_console.c @finikorg
/drivers/console/semihost_console.c @luozhongyao
/drivers/counter/counter_cmos.c @dcpleung
/drivers/counter/counter_ll_stm32_timer.c @kentjhall
/drivers/crypto/*nrf_ecb* @maciekfabia @anangl
/drivers/display/ @vanwinkeljan
/drivers/display/display_framebuf.c @dcpleung
/drivers/dac/ @martinjaeger
/drivers/dma/*dw* @tbursztyka
/drivers/dma/*sam0* @Sizurka
/drivers/dma/dma_stm32* @cybertale @lowlander
/drivers/dma/*pl330* @raveenp
/drivers/dma/*iproc_pax* @raveenp
/drivers/ec_host_cmd_periph/ @jettr
/drivers/edac/ @finikorg
/drivers/eeprom/ @henrikbrixandersen
/drivers/eeprom/eeprom_stm32.c @KwonTae-young
/drivers/entropy/*b91* @yurvyn
/drivers/entropy/*rv32m1* @dleach02
/drivers/entropy/*gecko* @chrta
/drivers/entropy/*litex* @mateusz-holenko @kgugala @pgielda
/drivers/espi/ @albertofloyd @franciscomunoz @sjvasanth1
/drivers/ethernet/ @tbursztyka @pfalcon
/drivers/ethernet/*dwmac* @npitre
/drivers/ethernet/*stm32* @Nukersson @lochej
/drivers/ethernet/*w5500* @parthitce
/drivers/ethernet/*xlnx_gem* @ibirnbaum
/drivers/ethernet/phy/ @rlubos @tbursztyka @arvinf
/drivers/mdio/ @rlubos @tbursztyka @arvinf
/drivers/flash/ @nashif @nvlsianpu
/drivers/flash/*stm32_qspi* @lmajewski
/drivers/flash/*b91* @yurvyn
/drivers/flash/*nrf* @nvlsianpu
/drivers/flash/*esp32* @glaubermaroto
/drivers/fpga/ @tgorochowik @kgugala
/drivers/gpio/ @mnkp
/drivers/gpio/*b91* @yurvyn
/drivers/gpio/*lmp90xxx* @henrikbrixandersen
/drivers/gpio/*nct38xx* @MulinChao @WealianLiao @ChiHuaL
/drivers/gpio/*stm32* @erwango
/drivers/gpio/*eos_s3* @wtatarski @kowalewskijan @kgugala
/drivers/gpio/*rcar* @julien-massot
/drivers/gpio/*esp32* @glaubermaroto
/drivers/gpio/*rpi_pico* @yonsch
/drivers/hwinfo/ @alexanderwachter
/drivers/i2c/i2c_common.c @sjg20
/drivers/i2c/i2c_emul.c @sjg20
/drivers/i2c/i2c_ite_it8xxx2.c @GTLin08
/drivers/i2c/i2c_shell.c @nashif
/drivers/i2c/Kconfig.i2c_emul @sjg20
/drivers/i2c/Kconfig.it8xxx2 @GTLin08
/drivers/i2c/slave/*eeprom* @henrikbrixandersen
/drivers/i2c/Kconfig.test @mbolivar-nordic
/drivers/i2c/i2c_test.c @mbolivar-nordic
/drivers/i2c/*rcar* @aaillet
/drivers/i2s/*litex* @mateusz-holenko @kgugala @pgielda
/drivers/i2s/i2s_ll_stm32* @avisconti
/drivers/i2s/*nrfx* @anangl
/drivers/ieee802154/ @rlubos @tbursztyka
/drivers/ieee802154/*b91* @yurvyn
/drivers/ieee802154/ieee802154_rf2xx* @tbursztyka @nandojve
/drivers/ieee802154/ieee802154_cc13xx* @bwitherspoon @cfriedt
/drivers/interrupt_controller/ @dcpleung @nashif
/drivers/interrupt_controller/intc_gic.c @stephanosio
/drivers/interrupt_controller/*esp32* @glaubermaroto
/drivers/interrupt_controller/intc_nuclei_eclic.c @soburi
/drivers/ipm/ipm_mhu* @karl-zh
/drivers/ipm/Kconfig.nrfx @masz-nordic
/drivers/ipm/Kconfig.nrfx_ipc_channel @masz-nordic
/drivers/ipm/ipm_cavs_idc* @dcpleung
/drivers/ipm/ipm_nrfx_ipc.c @masz-nordic
/drivers/ipm/ipm_nrfx_ipc.h @masz-nordic
/drivers/ipm/ipm_stm32_ipcc.c @arnopo
/drivers/ipm/ipm_stm32_hsem.c @cameled
/drivers/kscan/ @VenkatKotakonda @franciscomunoz @sjvasanth1
/drivers/kscan/*xec* @franciscomunoz @sjvasanth1
/drivers/kscan/*ft5336* @MaureenHelm
/drivers/kscan/*ht16k33* @henrikbrixandersen
/drivers/led/ @Mani-Sadhasivam
/drivers/led_strip/ @mbolivar-nordic
/drivers/lora/ @Mani-Sadhasivam
/drivers/mbox/ @carlocaione
/drivers/memc/ @gmarull
/drivers/misc/ @tejlmand
/drivers/misc/ft8xx/ @hubertmis
/drivers/mm/ @dcpleung
/drivers/modem/hl7800.c @LairdCP/zephyr
/drivers/modem/simcom-sim7080.c @lgehreke
/drivers/modem/simcom-sim7080.h @lgehreke
/drivers/modem/Kconfig.hl7800 @LairdCP/zephyr
/drivers/modem/Kconfig.simcom-sim7080 @lgehreke
/drivers/pcie/ @dcpleung @nashif @jhedberg
/drivers/peci/ @albertofloyd @franciscomunoz @sjvasanth1
/drivers/pinctrl/ @gmarull
/drivers/pinmux/*b91* @yurvyn
/drivers/pinmux/*hsdk* @iriszzw
/drivers/pinmux/*it8xxx2* @ite
/drivers/pinmux/*esp32* @glaubermaroto
/drivers/pm_cpu_ops/ @carlocaione
/drivers/power_domain/ @ceolin
/drivers/ps2/ @franciscomunoz @sjvasanth1
/drivers/ps2/*xec* @franciscomunoz @sjvasanth1
/drivers/ps2/*npcx* @MulinChao @WealianLiao @ChiHuaL
/drivers/pwm/*b91* @yurvyn
/drivers/pwm/*rv32m1* @henrikbrixandersen
/drivers/pwm/*sam0* @nzmichaelh
/drivers/pwm/*stm32* @gmarull
/drivers/pwm/*xlnx* @henrikbrixandersen
/drivers/pwm/pwm_capture.c @henrikbrixandersen
/drivers/pwm/pwm_shell.c @henrikbrixandersen
/drivers/pwm/*gecko* @sun681
/drivers/pwm/*it8xxx2* @RuibinChang
/drivers/regulator/*pmic* @danieldegrasse
/drivers/sensor/ @MaureenHelm
/drivers/sensor/ams_iAQcore/ @alexanderwachter
/drivers/sensor/ens210/ @alexanderwachter
/drivers/sensor/hts*/ @avisconti
/drivers/sensor/ina23*/ @bbilas
/drivers/sensor/lis*/ @avisconti
/drivers/sensor/lps*/ @avisconti
/drivers/sensor/lsm*/ @avisconti
/drivers/sensor/mpr/ @sven-hm
/drivers/sensor/st*/ @avisconti
/drivers/serial/*b91* @yurvyn
/drivers/serial/uart_altera_jtag_hal.c @nashif
/drivers/serial/*ns16550* @dcpleung @nashif @jenmwms @aasthagr
/drivers/serial/*nrfx* @Mierunski @anangl
/drivers/serial/uart_liteuart.c @mateusz-holenko @kgugala @pgielda
/drivers/serial/Kconfig.mcux_iuart @Mani-Sadhasivam
/drivers/serial/uart_mcux_iuart.c @Mani-Sadhasivam
/drivers/serial/Kconfig.rtt @carlescufi @pkral78
/drivers/serial/uart_rtt.c @carlescufi @pkral78
/drivers/serial/*rpi_pico* @yonsch
/drivers/serial/Kconfig.xlnx @wjliang
/drivers/serial/uart_xlnx_ps.c @wjliang
/drivers/serial/uart_xlnx_uartlite.c @henrikbrixandersen
/drivers/serial/*xmc4xxx* @parthitce
/drivers/serial/*numicro* @ssekar15
/drivers/serial/*apbuart* @martin-aberg
/drivers/serial/*rcar* @aaillet
/drivers/serial/Kconfig.test @str4t0m
/drivers/serial/serial_test.c @str4t0m
/drivers/serial/Kconfig.xen @lorc @firscity
/drivers/serial/uart_hvc_xen.c @lorc @firscity
/drivers/serial/uart_hvc_xen_consoleio.c @lorc @firscity
/drivers/serial/Kconfig.it8xxx2 @GTLin08
/drivers/serial/uart_ite_it8xxx2.c @GTLin08
/drivers/disk/ @jfischer-no
/drivers/disk/sdmmc_sdhc.h @JunYangNXP
/drivers/disk/sdmmc_spi.c @JunYangNXP
/drivers/disk/usdhc.c @JunYangNXP
/drivers/disk/sdmmc_stm32.c @anthonybrandon
/drivers/net/ @rlubos @tbursztyka
/drivers/ptp_clock/ @tbursztyka
/drivers/spi/ @tbursztyka
/drivers/spi/*b91* @yurvyn
/drivers/spi/spi_rv32m1_lpspi* @karstenkoenig
/drivers/spi/*esp32* @glaubermaroto
/drivers/timer/*apic* @dcpleung @nashif
/drivers/timer/apic_tsc.c @andyross
/drivers/timer/*arm_arch* @carlocaione
/drivers/timer/*cortex_m_systick* @anangl
/drivers/timer/*altera_avalon* @nashif
/drivers/timer/*riscv_machine* @kgugala @pgielda
/drivers/timer/*ite_it8xxx2* @ite
/drivers/timer/*xlnx_psttc* @wjliang @stephanosio
/drivers/timer/*cc13x2_cc26x2_rtc* @vanti
/drivers/timer/*cavs* @dcpleung
/drivers/timer/*stm32_lptim* @FRASTM
/drivers/timer/*leon_gptimer* @martin-aberg
/drivers/timer/*mips_cp0* @frantony
/drivers/timer/*rcar_cmt* @julien-massot
/drivers/timer/*esp32c3_sys* @uLipe
/drivers/timer/*sam0_rtc* @bendiscz
/drivers/timer/*arcv2* @ruuddw
/drivers/timer/*xtensa* @dcpleung
/drivers/timer/*rv32m1_lptmr* @mbolivar
/drivers/timer/*nrf_rtc* @anangl
/drivers/timer/*hpet* @dcpleung
/drivers/usb/ @jfischer-no
/drivers/usb/device/usb_dc_stm32.c @ydamigos @loicpoulain
/drivers/video/ @loicpoulain
/drivers/i2c/*b91* @yurvyn
/drivers/i2c/i2c_ll_stm32* @ydamigos
/drivers/i2c/i2c_rv32m1_lpi2c* @henrikbrixandersen
/drivers/i2c/*sam0* @Sizurka
/drivers/i2c/i2c_dw* @dcpleung
/drivers/i2c/*tca954x* @kurddt
/drivers/*/*xec* @franciscomunoz @albertofloyd @sjvasanth1
/drivers/watchdog/*gecko* @oanerer
/drivers/watchdog/*sifive* @katsuster
/drivers/watchdog/wdt_handlers.c @dcpleung @nashif
/drivers/watchdog/*cc32xx* @pavlohamov
/drivers/watchdog/wdt_ite_it8xxx2.c @RuibinChang
/drivers/watchdog/Kconfig.it8xxx2 @RuibinChang
/drivers/watchdog/wdt_counter.c @nordic-krch
/drivers/wifi/ @rlubos @tbursztyka @pfalcon
/drivers/wifi/esp_at/ @mniestroj
/drivers/wifi/eswifi/ @loicpoulain @nandojve
/drivers/wifi/winc1500/ @kludentwo
/drivers/virtualization/ @tbursztyka
/drivers/xen/ @lorc @firscity
/dts/arc/ @abrodkin @ruuddw @iriszzw @evgeniy-paltsev
/dts/arm/acsip/ @NorthernDean
/dts/arm/atmel/sam4e* @nandojve
/dts/arm/atmel/sam4l* @nandojve
/dts/arm/atmel/samr21.dtsi @benpicco
/dts/arm/atmel/sam*5*.dtsi @benpicco
/dts/arm/atmel/same70* @nandojve
/dts/arm/atmel/samv71* @nandojve
/dts/arm/atmel/ @galak
/dts/arm/broadcom/ @sbranden
/dts/arm/cypress/ @nandojve
/dts/arm/gigadevice/ @nandojve
/dts/arm/infineon/ @parthitce
/dts/arm64/ @carlocaione
/dts/arm64/armv8-r.dtsi @povergoing
/dts/arm64/nxp/ @JiafeiPan
/dts/arm/quicklogic/ @wtatarski @kowalewskijan @kgugala
/dts/arm/seeed/ @str4t0m
/dts/arm/st/ @erwango
/dts/arm/ti/cc13?2* @bwitherspoon
/dts/arm/ti/cc26?2* @bwitherspoon
/dts/arm/ti/cc3235* @vanti
/dts/arm/nordic/ @anangl @carlescufi
/dts/arm/nuvoton/ @ssekar15 @MulinChao @WealianLiao @ChiHuaL
/dts/arm/nxp/ @mmahadevan108 @dleach02
/dts/arm/microchip/ @franciscomunoz @albertofloyd @sjvasanth1
/dts/arm/rpi_pico/ @yonsch
/dts/arm/silabs/efm32_pg_1b.dtsi @rdmeneze
/dts/arm/silabs/efm32gg11b* @oanerer
/dts/arm/silabs/efm32_jg_pg* @chrta
/dts/arm/silabs/efr32bg13p* @mnkp
/dts/arm/silabs/efr32xg13p* @mnkp
/dts/arm/silabs/efm32jg12b* @chrta
/dts/arm/silabs/efm32pg12b* @chrta
/dts/arm/silabs/efm32pg1b* @rdmeneze
/dts/arm/silabs/efr32mg21* @l-alfred
/dts/arm/silabs/efr32fg13* @yonsch
/dts/riscv/ @kgugala @pgielda
/dts/riscv/it8xxx2.dtsi @ite
/dts/riscv/microsemi-miv.dtsi @galak
/dts/riscv/rv32m1* @dleach02
/dts/riscv/riscv32-litex-vexriscv.dtsi @mateusz-holenko @kgugala @pgielda
/dts/riscv/starfive/ @rajnesh-kanwal
/dts/riscv/andes_v5* @cwshu @kevinwang821020 @jimmyzhe
/dts/arm/armv*m.dtsi @galak @ioannisg
/dts/arm/armv7-a.dtsi @ibirnbaum
/dts/arm/armv7-r.dtsi @bbolen @stephanosio
/dts/arm/xilinx/ @bbolen @stephanosio
/dts/arm/renesas/ @julien-massot
/dts/x86/ @jhedberg
/dts/xtensa/xtensa.dtsi @ydamigos
/dts/xtensa/intel/ @dcpleung
/dts/xtensa/espressif/ @glaubermaroto
/dts/xtensa/nxp/ @iuliana-prodan @dbaluta
/dts/sparc/ @martin-aberg
/dts/bindings/ @galak
/dts/bindings/can/ @alexanderwachter
/dts/bindings/i2c/zephyr*i2c-emul*.yaml @sjg20
/dts/bindings/adc/st*stm32-adc.yaml @cybertale
/dts/bindings/modem/*hl7800.yaml @LairdCP/zephyr
/dts/bindings/serial/ns16550.yaml @dcpleung @nashif
/dts/bindings/wifi/*esp-at.yaml @mniestroj
/dts/bindings/*/*gd32* @nandojve
/dts/bindings/*/*npcx* @MulinChao @WealianLiao @ChiHuaL
/dts/bindings/*/*psoc6* @nandojve
/dts/bindings/*/nordic* @anangl
/dts/bindings/*/nxp* @mmahadevan108 @dleach02
/dts/bindings/*/openisa* @dleach02
/dts/bindings/*/raspberrypi*pico* @yonsch
/dts/bindings/*/st* @erwango
/dts/bindings/sensor/ams* @alexanderwachter
/dts/bindings/*/sifive* @mateusz-holenko @kgugala @pgielda
/dts/bindings/*/litex* @mateusz-holenko @kgugala @pgielda
/dts/bindings/*/vexriscv* @mateusz-holenko @kgugala @pgielda
/dts/bindings/*/andes* @cwshu @kevinwang821020 @jimmyzhe
/dts/bindings/*/neorv32* @henrikbrixandersen
/dts/bindings/pm_cpu_ops/* @carlocaione
/dts/bindings/ethernet/*gem.yaml @ibirnbaum
/dts/posix/ @aescolar @vanwinkeljan @daor-oti
/dts/bindings/sensor/*bme680* @BoschSensortec
/dts/bindings/sensor/*ina23* @bbilas
/dts/bindings/sensor/st* @avisconti
/dts/common/ @galak
/include/ @nashif @carlescufi @galak @MaureenHelm
/include/drivers/*/*litex* @mateusz-holenko @kgugala @pgielda
/include/drivers/adc.h @anangl
/include/drivers/can.h @alexanderwachter
/include/drivers/counter.h @nordic-krch
/include/drivers/dac.h @martinjaeger
/include/drivers/display.h @vanwinkeljan
/include/drivers/espi.h @albertofloyd @franciscomunoz @sjvasanth1
/include/drivers/bluetooth/ @alwa-nordic @jhedberg @Vudentz
/include/drivers/flash.h @nashif @carlescufi @galak @MaureenHelm @nvlsianpu
/include/drivers/i2c_emul.h @sjg20
/include/drivers/led/ht16k33.h @henrikbrixandersen
/include/drivers/interrupt_controller/ @dcpleung @nashif
/include/drivers/interrupt_controller/gic.h @stephanosio
/include/drivers/modem/hl7800.h @LairdCP/zephyr
/include/drivers/pcie/ @dcpleung
/include/drivers/hwinfo.h @alexanderwachter
/include/drivers/led.h @Mani-Sadhasivam
/include/drivers/led_strip.h @mbolivar-nordic
/include/drivers/sensor.h @MaureenHelm
/include/drivers/spi.h @tbursztyka
/include/drivers/lora.h @Mani-Sadhasivam
/include/drivers/peci.h @albertofloyd @franciscomunoz @sjvasanth1
/include/drivers/pm_cpu_ops.h @carlocaione
/include/drivers/pm_cpu_ops/ @carlocaione
/include/app_memory/ @dcpleung
/include/arch/arc/ @abrodkin @ruuddw @evgeniy-paltsev
/include/arch/arc/arch.h @abrodkin @ruuddw @evgeniy-paltsev
/include/arch/arc/v2/irq.h @abrodkin @ruuddw @evgeniy-paltsev
/include/arch/arm/aarch32/ @MaureenHelm @galak @ioannisg
/include/arch/arm/aarch32/cortex_a_r/ @stephanosio
/include/arch/arm64/ @carlocaione
/include/arch/arm64/cortex_r/ @povergoing
/include/arch/arm/aarch32/irq.h @carlocaione
/include/arch/mips/ @frantony
/include/arch/nios2/ @nashif
/include/arch/nios2/arch.h @nashif
/include/arch/posix/ @aescolar @daor-oti
/include/arch/riscv/ @kgugala @pgielda
/include/arch/x86/ @jhedberg @dcpleung
/include/arch/common/ @andyross @nashif
/include/arch/xtensa/ @andyross @dcpleung
/include/arch/sparc/ @martin-aberg
/include/sys/atomic.h @andyross
/include/bluetooth/ @alwa-nordic @jhedberg @Vudentz
/include/bluetooth/audio/ @alwa-nordic @jhedberg @Vudentz @Thalley @asbjornsabo
/include/cache.h @carlocaione @andyross
/include/canbus/ @alexanderwachter
/include/tracing/ @nashif
/include/debug/ @nashif
/include/debug/coredump.h @dcpleung
/include/debug/gdbstub.h @ceolin
/include/device.h @tbursztyka @nashif
/include/devicetree.h @galak
/include/display/ @vanwinkeljan
/include/dt-bindings/clock/kinetis_mcg.h @henrikbrixandersen
/include/dt-bindings/clock/kinetis_scg.h @henrikbrixandersen
/include/dt-bindings/ethernet/xlnx_gem.h @ibirnbaum
/include/dt-bindings/pcie/ @dcpleung
/include/dt-bindings/pwm/*it8xxx2* @RuibinChang
/include/dt-bindings/usb/usb.h @galak
/include/drivers/emul.h @sjg20
/include/fs/ @nashif @nvlsianpu @de-nordic
/include/init.h @nashif @andyross
/include/irq.h @dcpleung @nashif @andyross
/include/irq_offload.h @dcpleung @nashif @andyross
/include/kernel.h @dcpleung @nashif @andyross
/include/kernel_version.h @dcpleung @nashif @andyross
/include/linker/app_smem*.ld @dcpleung @nashif
/include/linker/ @dcpleung @nashif @andyross
/include/logging/ @nordic-krch
/include/lorawan/lorawan.h @Mani-Sadhasivam
/include/mgmt/osdp.h @sidcha
/include/net/ @rlubos @tbursztyka @pfalcon
/include/net/buf.h @jhedberg @tbursztyka @pfalcon @rlubos
/include/net/coap*.h @rlubos
/include/net/lwm2m*.h @rlubos
/include/net/mqtt.h @rlubos
/include/net/net_pkt_filter.h @npitre
/include/posix/ @pfalcon
/include/pm/pm.h @nashif @ceolin
/include/drivers/ptp_clock.h @tbursztyka
/include/shared_irq.h @dcpleung @nashif @andyross
/include/shell/ @jakub-uC @nordic-krch
/include/sw_isr_table.h @dcpleung @nashif @andyross
/include/sys_clock.h @dcpleung @nashif @andyross
/include/sys/sys_io.h @dcpleung @nashif @andyross
/include/sys/kobject.h @dcpleung @nashif
/include/toolchain.h @dcpleung @andyross @nashif
/include/toolchain/ @dcpleung @nashif @andyross
/include/zephyr.h @dcpleung @nashif @andyross
/kernel/ @dcpleung @nashif @andyross
/lib/smf/ @sambhurst
/lib/util/ @carlescufi @jakub-uC
/lib/util/fnmatch/ @carlescufi @jakub-uC
/lib/gui/ @vanwinkeljan
/lib/open-amp/ @arnopo
/lib/os/ @dcpleung @nashif @andyross
/lib/os/cbprintf_packaged.c @npitre
/lib/posix/ @pfalcon
/lib/posix/getopt/ @jakub-uC
/subsys/portability/ @nashif
/lib/libc/ @nashif
/lib/libc/arcmwdt/ @abrodkin @ruuddw @evgeniy-paltsev
/misc/ @tejlmand
/modules/ @nashif
/modules/canopennode/ @henrikbrixandersen
/modules/mbedtls/ @ceolin @d3zd3z
/modules/hal_gigadevice/ @nandojve
/modules/trusted-firmware-m/ @microbuilder
/kernel/device.c @andyross @nashif
/kernel/idle.c @andyross @nashif
/samples/ @nashif
/samples/basic/minimal/ @carlescufi
/samples/basic/servo_motor/boards/*microbit* @jhe
/samples/bluetooth/ @jhedberg @Vudentz @alwa-nordic
/samples/boards/intel_s1000_crb/ @sathishkuttan @dcpleung @nashif
/samples/subsys/display/ @vanwinkeljan
/samples/compression/ @Navin-Sankar
/samples/drivers/can/ @alexanderwachter
/samples/drivers/clock_control_litex/ @mateusz-holenko @kgugala @pgielda
/samples/drivers/display/ @vanwinkeljan
/samples/drivers/eeprom/ @henrikbrixandersen
/samples/drivers/ht16k33/ @henrikbrixandersen
/samples/drivers/lora/ @Mani-Sadhasivam
/samples/subsys/lorawan/ @Mani-Sadhasivam
/samples/modules/canopennode/ @henrikbrixandersen
/samples/net/ @rlubos @tbursztyka @pfalcon
/samples/net/cloud/tagoio_http_post/ @nandojve
/samples/net/dns_resolve/ @rlubos @tbursztyka @pfalcon
/samples/net/lwm2m_client/ @rlubos
/samples/net/mqtt_publisher/ @rlubos
/samples/net/sockets/coap_*/ @rlubos
/samples/net/sockets/ @rlubos @tbursztyka @pfalcon
/samples/net/*civetweb* @Nukersson
/samples/sensor/ @MaureenHelm
/samples/shields/ @avisconti
/samples/subsys/logging/ @nordic-krch @jakub-uC
/samples/subsys/shell/ @jakub-uC @nordic-krch
/samples/subsys/mgmt/mcumgr/smp_svr/ @aunsbjerg @nvlsianpu
/samples/subsys/mgmt/updatehub/ @nandojve @otavio
/samples/subsys/mgmt/osdp/ @sidcha
/samples/subsys/usb/ @jfischer-no
/samples/subsys/pm/ @nashif @ceolin
/samples/tfm_integration/ @microbuilder
/samples/userspace/ @dcpleung @nashif
/scripts/release/bug_bash.py @cfriedt
/scripts/coccicheck @himanshujha199640 @JuliaLawall
/scripts/coccinelle/ @himanshujha199640 @JuliaLawall
/scripts/coredump/ @dcpleung
/scripts/footprint/ @nashif
/scripts/kconfig/ @ulfalizer
/scripts/logging/dictionary/ @dcpleung
/scripts/pylib/twister/expr_parser.py @nashif
/scripts/schemas/twister/ @nashif
/scripts/gen_app_partitions.py @dcpleung @nashif
scripts/gen_image_info.py @tejlmand
/scripts/get_maintainer.py @nashif
/scripts/dts/ @mbolivar-nordic @galak
/scripts/release/ @nashif
/scripts/ci/ @nashif
/arch/x86/gen_gdt.py @dcpleung @nashif
/arch/x86/gen_idt.py @dcpleung @nashif
/scripts/gen_kobject_list.py @dcpleung @nashif
/scripts/gen_kobject_placeholders.py @dcpleung
/scripts/gen_syscalls.py @dcpleung @nashif
/scripts/list_boards.py @mbolivar-nordic
/scripts/process_gperf.py @dcpleung @nashif
/scripts/gen_relocate_app.py @dcpleung
/scripts/requirements*.txt @mbolivar-nordic @galak @nashif
/scripts/tests/twister/ @aasthagr
/scripts/tests/build/test_subfolder_list.py @rmstoi
/scripts/tracing/ @nashif
/scripts/pylib/twister/ @nashif
/scripts/twister @nashif
/scripts/series-push-hook.sh @erwango
/scripts/utils/pinctrl_nrf_migrate.py @gmarull
/scripts/west_commands/ @mbolivar-nordic
/scripts/west_commands/runners/gd32isp.py @mbolivar-nordic @nandojve
/scripts/west_commands/tests/test_gd32isp.py @mbolivar-nordic @nandojve
/scripts/west-commands.yml @mbolivar-nordic
/scripts/zephyr_module.py @tejlmand
/scripts/uf2conv.py @petejohanson
/scripts/user_wordsize.py @cfriedt
/scripts/valgrind.supp @aescolar @daor-oti
/share/zephyr-package/ @tejlmand
/share/zephyrunittest-package/ @tejlmand
/subsys/bluetooth/ @alwa-nordic @jhedberg @Vudentz
/subsys/bluetooth/audio/ @alwa-nordic @jhedberg @Vudentz @Thalley @asbjornsabo
/subsys/bluetooth/controller/ @carlescufi @cvinayak @thoh-ot @kruithofa
/subsys/bluetooth/mesh/ @jhedberg @trond-snekvik @alwa-nordic @Vudentz @LingaoM
/subsys/canbus/ @alexanderwachter
/subsys/cpp/ @vanwinkeljan
/subsys/debug/ @nashif
/subsys/debug/coredump/ @dcpleung
/subsys/debug/gdbstub/ @ceolin
/subsys/debug/gdbstub.c @ceolin
/subsys/dfu/ @nvlsianpu
/subsys/disk/ @jfischer-no
/subsys/tracing/ @nashif
/subsys/debug/asan_hacks.c @vanwinkeljan @aescolar @daor-oti
/subsys/demand_paging/ @dcpleung @nashif
/subsys/emul/ @sjg20
/subsys/fb/ @jfischer-no
/subsys/fs/ @nashif
/subsys/fs/fcb/ @nvlsianpu
/subsys/fs/fuse_fs_access.c @vanwinkeljan
/subsys/fs/nvs/ @Laczen
/subsys/ipc/ @carlocaione
/subsys/logging/ @nordic-krch
/subsys/logging/log_backend_net.c @nordic-krch @rlubos
/subsys/lorawan/ @Mani-Sadhasivam
/subsys/mgmt/ec_host_cmd/ @jettr
/subsys/mgmt/mcumgr/ @carlescufi @nvlsianpu
/subsys/mgmt/mcumgr/lib/ @de-nordic
/subsys/mgmt/hawkbit/ @Navin-Sankar
/subsys/mgmt/mcumgr/smp_udp.c @aunsbjerg
/subsys/mgmt/updatehub/ @nandojve @otavio
/subsys/mgmt/osdp/ @sidcha
/subsys/modbus/ @jfischer-no
/subsys/net/buf.c @jhedberg @tbursztyka @pfalcon @rlubos
/subsys/net/ip/ @rlubos @tbursztyka @pfalcon
/subsys/net/lib/ @rlubos @tbursztyka @pfalcon
/subsys/net/lib/dns/ @rlubos @tbursztyka @pfalcon @cfriedt
/subsys/net/lib/lwm2m/ @rlubos
/subsys/net/lib/config/ @rlubos @tbursztyka @pfalcon
/subsys/net/lib/mqtt/ @rlubos
/subsys/net/lib/coap/ @rlubos
/subsys/net/lib/sockets/socketpair.c @cfriedt
/subsys/net/lib/sockets/ @rlubos @tbursztyka @pfalcon
/subsys/net/lib/tls_credentials/ @rlubos
/subsys/net/l2/ @rlubos @tbursztyka
/subsys/net/l2/canbus/ @alexanderwachter
/subsys/net/pkt_filter/ @npitre
/subsys/net/*/openthread/ @rlubos
/subsys/pm/ @nashif @ceolin
/subsys/random/ @dleach02
/subsys/settings/ @nvlsianpu
/subsys/shell/ @jakub-uC @nordic-krch
/subsys/stats/ @nvlsianpu
/subsys/storage/ @nvlsianpu
/subsys/task_wdt/ @martinjaeger
/subsys/testsuite/ @nashif
/subsys/testsuite/ztest/*/ztress* @nordic-krch
/subsys/timing/ @nashif @dcpleung
/subsys/usb/ @jfischer-no
/subsys/usb/class/dfu/usb_dfu.c @nvlsianpu
/tests/ @nashif
/tests/arch/arm/ @ioannisg @stephanosio
/tests/benchmarks/cmsis_dsp/ @stephanosio
/tests/boards/native_posix/ @aescolar @daor-oti
/tests/boards/intel_s1000_crb/ @dcpleung @sathishkuttan
/tests/bluetooth/ @alwa-nordic @jhedberg @Vudentz
/tests/bluetooth/controller/ @cvinayak @thoh-ot @kruithofa @erbr-ot @sjanc @ppryga
/tests/bluetooth/bsim_bt/ @alwa-nordic @jhedberg @Vudentz @aescolar @wopu-ot
/tests/bluetooth/bsim_bt/bsim_test_audio/ @alwa-nordic @jhedberg @Vudentz @aescolar @wopu-ot @Thalley @asbjornsabo
/tests/bluetooth/tester/ @alwa-nordic @jhedberg @Vudentz @sjanc
/tests/posix/ @pfalcon
/tests/crypto/ @ceolin
/tests/crypto/mbedtls/ @nashif @ceolin @d3zd3z
/tests/drivers/can/ @alexanderwachter
/tests/drivers/counter/ @nordic-krch
/tests/drivers/eeprom/ @henrikbrixandersen @sjg20
/tests/drivers/flash_simulator/ @nvlsianpu
/tests/drivers/gpio/ @mnkp
/tests/drivers/hwinfo/ @alexanderwachter
/tests/drivers/spi/ @tbursztyka
/tests/drivers/uart/uart_async_api/ @Mierunski
/tests/kernel/ @dcpleung @andyross @nashif
/tests/lib/ @nashif
/tests/lib/cmsis_dsp/ @stephanosio
/tests/net/ @rlubos @tbursztyka @pfalcon
/tests/net/buf/ @jhedberg @tbursztyka @pfalcon
/tests/net/lib/ @rlubos @tbursztyka @pfalcon
/tests/net/lib/http_header_fields/ @rlubos @tbursztyka
/tests/net/lib/mqtt_packet/ @rlubos
/tests/net/lib/coap/ @rlubos
/tests/net/npf/ @npitre
/tests/net/socket/socketpair/ @cfriedt
/tests/net/socket/ @rlubos @tbursztyka @pfalcon
/tests/subsys/debug/coredump/ @dcpleung
/tests/subsys/fs/ @nashif @nvlsianpu @de-nordic
/tests/subsys/settings/ @nvlsianpu
/tests/subsys/shell/ @jakub-uC @nordic-krch
# Get all docs reviewed
*.rst @nashif
/doc/reference/kernel/ @andyross @nashif
*posix*.rst @aescolar @daor-oti

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@@ -1,78 +0,0 @@
# Contributor Covenant Code of Conduct
## Our Pledge
In the interest of fostering an open and welcoming environment, we as
contributors and maintainers pledge to making participation in our project and
our community a harassment-free experience for everyone, regardless of age, body
size, disability, ethnicity, sex characteristics, gender identity and expression,
level of experience, education, socio-economic status, nationality, personal
appearance, race, religion, or sexual identity and orientation.
## Our Standards
Examples of behavior that contributes to creating a positive environment
include:
* Using welcoming and inclusive language
* Being respectful of differing viewpoints and experiences
* Gracefully accepting constructive criticism
* Focusing on what is best for the community
* Showing empathy towards other community members
Examples of unacceptable behavior by participants include:
* The use of sexualized language or imagery and unwelcome sexual attention or
advances
* Trolling, insulting/derogatory comments, and personal or political attacks
* Public or private harassment
* Publishing others' private information, such as a physical or electronic
address, without explicit permission
* Other conduct which could reasonably be considered inappropriate in a
professional setting
## Our Responsibilities
Project maintainers are responsible for clarifying the standards of acceptable
behavior and are expected to take appropriate and fair corrective action in
response to any instances of unacceptable behavior.
Project maintainers have the right and responsibility to remove, edit, or
reject comments, commits, code, wiki edits, issues, and other contributions
that are not aligned to this Code of Conduct, or to ban temporarily or
permanently any contributor for other behaviors that they deem inappropriate,
threatening, offensive, or harmful.
## Scope
This Code of Conduct applies both within project spaces and in public spaces
when an individual is representing the project or its community. Examples of
representing a project or community include using an official project e-mail
address, posting via an official social media account, or acting as an appointed
representative at an online or offline event. Representation of a project may be
further defined and clarified by project maintainers.
## Enforcement
Instances of abusive, harassing, or otherwise unacceptable behavior may be
reported by contacting the project team at conduct@zephyrproject.org.
Reports will be received by Kate Stewart (Linux Foundation) and Amy Occhialino
(Intel). All complaints will be reviewed and investigated, and will result in a
response that is deemed necessary and appropriate to the circumstances. The
project team is obligated to maintain confidentiality with regard to the
reporter of an incident. Further details of specific enforcement policies may
be posted separately.
Project maintainers who do not follow or enforce the Code of Conduct in good
faith may face temporary or permanent repercussions as determined by other
members of the project's leadership.
## Attribution
This Code of Conduct is adapted from the [Contributor Covenant][homepage], version 1.4,
available at https://www.contributor-covenant.org/version/1/4/code-of-conduct.html
[homepage]: https://www.contributor-covenant.org
For answers to common questions about this code of conduct, see
https://www.contributor-covenant.org/faq

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@@ -1,39 +0,0 @@
Contribution Guidelines
#######################
As an open-source project, we welcome and encourage the community to submit
patches directly to the project. In our collaborative open source environment,
standards and methods for submitting changes help reduce the chaos that can result
from an active development community.
This document briefly summarizes the full `Contribution
Guidelines <http://docs.zephyrproject.org/latest/contribute/index.html>`_
documentation.
* Zephyr uses the permissive open source `Apache 2.0 license`_
that allows you to freely use, modify, distribute and sell your own products
that include Apache 2.0 licensed software.
* There are some imported or reused components of the Zephyr project that
use other licensing and are clearly identified.
* The Developer Certificate of Origin (DCO) process is followed to
ensure developers are following licensing criteria for their
contributions, and documented with a ``Signed-off-by`` line in commits.
* Zephyr development workflow is supported on Linux, macOS, and Windows,
(with a few exceptions).
* Source code for the project is maintained in the GitHub repo:
https://github.com/zephyrproject-rtos/zephyr
* Issue and feature tracking is done using GitHub issues in this repo.
* A Continuous Integration (CI) system runs on every Pull Request (PR)
to verify several aspects of the PR including Git commit formatting,
Coding Style, sanity checks builds, and documentation builds.
* The `Zephyr devel mailing list`_ is a great place to engage with the
community, ask questions, discuss issues, and help each other.
.. _Zephyr devel mailing list: https://lists.zephyrproject.org/g/devel

70
Kbuild Normal file
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@@ -0,0 +1,70 @@
# vim: filetype=make
ifeq (${CONFIG_NUM_COMMAND_PACKETS},)
CONFIG_NUM_COMMAND_PACKETS=0
endif
ifeq (${CONFIG_NUM_TIMER_PACKETS},)
CONFIG_NUM_TIMER_PACKETS=0
endif
ifeq (${CONFIG_NUM_TASK_PRIORITIES},)
CONFIG_NUM_TASK_PRIORITIES=$(CONFIG_NUM_PREEMPT_PRIORITIES)
endif
ifeq ($(ARCH),x86)
TASKGROUP_SSE=" TASKGROUP SSE"
endif
define filechk_configs.c
(echo "/* file is auto-generated, do not modify ! */"; \
echo; \
echo "#include <toolchain.h>"; \
echo; \
echo "GEN_ABS_SYM_BEGIN (_ConfigAbsSyms)"; \
echo; \
cat $(CURDIR)/include/generated/autoconf.h | sed \
's/".*"/1/' | awk \
'/#define/{printf "GEN_ABSOLUTE_SYM(%s, %s);\n", $$2, $$3}'; \
echo; \
echo "GEN_ABS_SYM_END";)
endef
misc/generated/configs.c: include/config/auto.conf FORCE
$(call filechk,configs.c)
targets := misc/generated/configs.c
targets += include/generated/offsets.h
always := misc/generated/configs.c
always += include/generated/offsets.h
define rule_cc_o_c_1
$(call echo-cmd,cc_o_c_1) $(cmd_cc_o_c_1);
endef
cmd_cc_o_c_1 = $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(ZEPHYRINCLUDE) -c -o $@ $<
arch/$(ARCH)/core/offsets/offsets.o: arch/$(ARCH)/core/offsets/offsets.c $(KCONFIG_CONFIG) \
include/generated/generated_dts_board.h
$(Q)mkdir -p $(dir $@)
$(call if_changed,cc_o_c_1)
define offsetchk
$(Q)set -e; \
$(kecho) ' CHK $@'; \
mkdir -p $(dir $@); \
$(GENOFFSET_H) -i $(1) -o $@.tmp; \
if [ -r $@ ] && cmp -s $@ $@.tmp; then \
rm -f $@.tmp; \
else \
$(kecho) ' UPD $@'; \
mv -f $@.tmp $@; \
fi
endef
include/generated/offsets.h: arch/$(ARCH)/core/offsets/offsets.o \
include/config/auto.conf FORCE
$(call offsetchk,arch/$(ARCH)/core/offsets/offsets.o)

View File

@@ -1,8 +1,10 @@
# General configuration options
# Kconfig - general configuration options
#
# Copyright (c) 2014-2015 Wind River Systems, Inc.
#
# SPDX-License-Identifier: Apache-2.0
#
mainmenu "Zephyr Kernel Configuration"
source "Kconfig.zephyr"

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@@ -1,801 +1,39 @@
# General configuration options
# Kconfig - general configuration options
#
# Copyright (c) 2014-2015 Wind River Systems, Inc.
# Copyright (c) 2016 Intel Corporation
#
# SPDX-License-Identifier: Apache-2.0
# Include Kconfig.defconfig files first so that they can override defaults and
# other symbol/choice properties by adding extra symbol/choice definitions.
# After merging all definitions for a symbol/choice, Kconfig picks the first
# property (e.g. the first default) with a satisfied condition.
#
# Shield defaults should have precedence over board defaults, which should have
# precedence over SoC defaults, so include them in that order.
#
# $ARCH and $BOARD_DIR will be glob patterns when building documentation.
# This loads custom shields defconfigs (from BOARD_ROOT)
osource "$(KCONFIG_BINARY_DIR)/Kconfig.shield.defconfig"
# This loads Zephyr base shield defconfigs
source "boards/shields/*/Kconfig.defconfig"
config KERNELVERSION
string
option env="KERNELVERSION"
source "$(BOARD_DIR)/Kconfig.defconfig"
# This loads custom SoC root defconfigs
osource "$(KCONFIG_BINARY_DIR)/Kconfig.soc.defconfig"
# This loads Zephyr base SoC root defconfigs
osource "soc/$(ARCH)/*/Kconfig.defconfig"
# This loads the toolchain defconfigs
osource "$(TOOLCHAIN_KCONFIG_DIR)/Kconfig.defconfig"
menu "Modules"
source "modules/Kconfig"
endmenu
source "boards/Kconfig"
source "soc/Kconfig"
source "arch/Kconfig"
source "kernel/Kconfig"
source "dts/Kconfig"
source "drivers/Kconfig"
source "net/Kconfig"
source "misc/Kconfig"
source "lib/Kconfig"
source "subsys/Kconfig"
osource "$(TOOLCHAIN_KCONFIG_DIR)/Kconfig"
menu "Build and Link Features"
menu "Linker Options"
choice
prompt "Linker Orphan Section Handling"
default LINKER_ORPHAN_SECTION_WARN
config LINKER_ORPHAN_SECTION_PLACE
bool "Place"
help
Linker puts orphan sections in place without warnings
or errors.
config LINKER_ORPHAN_SECTION_WARN
bool "Warn"
help
Linker places the orphan sections in output and issues
warning about those sections.
config LINKER_ORPHAN_SECTION_ERROR
bool "Error"
help
Linker exits with error when an orphan section is found.
endchoice
config HAS_FLASH_LOAD_OFFSET
bool
help
This option is selected by targets having a FLASH_LOAD_OFFSET
and FLASH_LOAD_SIZE.
if HAS_FLASH_LOAD_OFFSET
config USE_DT_CODE_PARTITION
bool "Link application into /chosen/zephyr,code-partition from devicetree"
help
When enabled, the application will be linked into the flash partition
selected by the zephyr,code-partition property in /chosen in devicetree.
When this is disabled, the flash load offset and size can be set manually
below.
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
config FLASH_LOAD_OFFSET
# Only user-configurable when USE_DT_CODE_PARTITION is disabled
hex "Kernel load offset" if !USE_DT_CODE_PARTITION
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) if USE_DT_CODE_PARTITION
default 0
help
This option specifies the byte offset from the beginning of flash that
the kernel should be loaded into. Changing this value from zero will
affect the Zephyr image's link, and will decrease the total amount of
flash available for use by application code.
If unsure, leave at the default value 0.
config FLASH_LOAD_SIZE
# Only user-configurable when USE_DT_CODE_PARTITION is disabled
hex "Kernel load size" if !USE_DT_CODE_PARTITION
default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) if USE_DT_CODE_PARTITION
default 0
help
If non-zero, this option specifies the size, in bytes, of the flash
area that the Zephyr image will be allowed to occupy. If zero, the
image will be able to occupy from the FLASH_LOAD_OFFSET to the end of
the device.
If unsure, leave at the default value 0.
endif # HAS_FLASH_LOAD_OFFSET
config ROM_START_OFFSET
hex
prompt "ROM start offset" if !BOOTLOADER_MCUBOOT
default 0x200 if BOOTLOADER_MCUBOOT
default 0
help
If the application is built for chain-loading by a bootloader this
variable is required to be set to value that leaves sufficient
space between the beginning of the image and the start of the first
section to store an image header or any other metadata.
In the particular case of the MCUboot bootloader this reserves enough
space to store the image header, which should also meet vector table
alignment requirements on most ARM targets, although some targets
may require smaller or larger values.
config LD_LINKER_SCRIPT_SUPPORTED
bool
default y
choice LINKER_SCRIPT
prompt "Linker script"
default LD_LINKER_TEMPLATE if LD_LINKER_SCRIPT_SUPPORTED
config LD_LINKER_TEMPLATE
bool "LD template"
depends on LD_LINKER_SCRIPT_SUPPORTED
help
Select this option to use the LD linker script templates.
The templates are pre-processed by the C pre-processor to create the
final LD linker script.
config CMAKE_LINKER_GENERATOR
bool "CMake generator"
depends on ARM
help
Select this option to use the Zephyr CMake linker script generator.
The linker configuration is written in CMake and the final linker
script will be generated by the toolchain specific linker generator.
For LD based linkers, this will be the ld generator, for ARMClang /
armlink based linkers it will be the scatter generator.
endchoice
config HAVE_CUSTOM_LINKER_SCRIPT
bool "Custom linker script provided"
help
Set this option if you have a custom linker script which needed to
be define in CUSTOM_LINKER_SCRIPT.
config CUSTOM_LINKER_SCRIPT
string "Path to custom linker script"
depends on HAVE_CUSTOM_LINKER_SCRIPT
help
Path to the linker script to be used instead of the one define by the
board.
The linker script must be based on a version provided by Zephyr since
the kernel can expect a certain layout/certain regions.
This is useful when an application needs to add sections into the
linker script and avoid having to change the script provided by
Zephyr.
config KERNEL_ENTRY
string "Kernel entry symbol"
default "__start"
help
Code entry symbol, to be set at linking phase.
config LINKER_SORT_BY_ALIGNMENT
bool "Sort input sections by alignment"
default y
help
This turns on the linker flag to sort sections by alignment
in decreasing size of symbols. This helps to minimize
padding between symbols.
config SRAM_VECTOR_TABLE
bool "Place the vector table in SRAM instead of flash"
help
The option specifies that the vector table should be placed at the
start of SRAM instead of the start of flash.
config HAS_SRAM_OFFSET
bool
help
This option is selected by targets that require SRAM_OFFSET.
config SRAM_OFFSET
hex "Kernel SRAM offset" if HAS_SRAM_OFFSET
default 0
help
This option specifies the byte offset from the beginning of SRAM
where the kernel begins. Changing this value from zero will affect
the Zephyr image's link, and will decrease the total amount of
SRAM available for use by application code.
If unsure, leave at the default value 0.
menu "Linker Sections"
config LINKER_USE_BOOT_SECTION
bool "Enable Usage of Boot Linker Section"
help
If enabled, the symbols which are needed for the boot process
will be put into another linker section reserved for these
symbols.
Requires that boot sections exist in the architecture, SoC,
board or custom linker script.
config LINKER_USE_PINNED_SECTION
bool "Enable Usage of Pinned Linker Section"
help
If enabled, the symbols which need to be pinned in memory
will be put into another linker section reserved for pinned
symbols. During boot, the corresponding memory will be marked
as pinned.
Requires that pinned sections exist in the architecture, SoC,
board or custom linker script.
config LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT
bool "Generic sections are present at boot" if DEMAND_PAGING && LINKER_USE_PINNED_SECTION
default y
help
When disabled, the linker sections other than the boot and
pinned sections will be marked as not present in the page
tables. This allows kernel to pull in data pages on demand
as required by current execution context when demand paging
is enabled. There is no need to load all code and data into
memory at once.
If unsure, say Y.
endmenu # "Linker Sections"
endmenu
menu "Compiler Options"
config CODING_GUIDELINE_CHECK
bool "Enforce coding guideline rules"
help
Use available compiler flags to check coding guideline rules during
the build.
config NATIVE_APPLICATION
bool "Build as a native host application"
help
Build as a native application that can run on the host and using
resources and libraries provided by the host.
choice COMPILER_OPTIMIZATIONS
prompt "Optimization level"
default NO_OPTIMIZATIONS if COVERAGE
default DEBUG_OPTIMIZATIONS if DEBUG
default SIZE_OPTIMIZATIONS
help
Note that these flags shall only control the compiler
optimization level, and that no extra debug code shall be
conditionally compiled based on them.
config SIZE_OPTIMIZATIONS
bool "Optimize for size"
help
Compiler optimizations will be set to -Os independently of other
options.
config SPEED_OPTIMIZATIONS
bool "Optimize for speed"
help
Compiler optimizations will be set to -O2 independently of other
options.
config DEBUG_OPTIMIZATIONS
bool "Optimize debugging experience"
help
Compiler optimizations will be set to -Og independently of other
options.
config NO_OPTIMIZATIONS
bool "Optimize nothing"
help
Compiler optimizations will be set to -O0 independently of other
options.
endchoice
config COMPILER_COLOR_DIAGNOSTICS
bool "Enable colored diagnostics"
default y
help
Compiler diagnostic messages are colorized.
config COMPILER_OPT
string "Custom compiler options"
help
This option is a free-form string that is passed to the compiler
when building all parts of a project (i.e. kernel).
The compiler options specified by this string supplement the
predefined set of compiler supplied by the build system,
and can be used to change compiler optimization, warning and error
messages, and so on.
config MISRA_SANE
bool "MISRA standards compliance features"
help
Causes the source code to build in "MISRA" mode, which
disallows some otherwise-permitted features of the C
standard for safety reasons. Specifically variable length
arrays are not permitted (and gcc will enforce this).
endmenu
choice
prompt "Error checking behavior for CHECK macro"
default RUNTIME_ERROR_CHECKS
config ASSERT_ON_ERRORS
bool "Assert on all errors"
help
Assert on errors covered with the CHECK macro.
config NO_RUNTIME_CHECKS
bool "No runtime error checks"
help
Do not do any runtime checks or asserts when using the CHECK macro.
config RUNTIME_ERROR_CHECKS
bool "Enable runtime error checks"
help
Always perform runtime checks covered with the CHECK macro. This
option is the default and the only option used during testing.
endchoice
menu "Build Options"
config KERNEL_BIN_NAME
string "The kernel binary name"
default "zephyr"
help
This option sets the name of the generated kernel binary.
config OUTPUT_STAT
bool "Create a statistics file"
default y
help
Create a stat file using readelf -e <elf>
config OUTPUT_DISASSEMBLY
bool "Create a disassembly file"
default y
help
Create an .lst file with the assembly listing of the firmware.
config OUTPUT_DISASSEMBLE_ALL
bool "Disassemble all sections with source. Fill zeros."
default n
depends on OUTPUT_DISASSEMBLY
help
The .lst file will contain complete disassembly of the firmware
not just those expected to contain instructions including zeros
config OUTPUT_PRINT_MEMORY_USAGE
bool "Print memory usage to stdout"
default y
help
If the toolchain supports it, this option will pass
--print-memory-region to the linker when it is doing it's first
linker pass. Note that the memory regions are symbolic concepts
defined by the linker scripts and do not necessarily map
directly to the real physical address space. Take also note that
some platforms do two passes of the linker so the results do not
match exactly to the final elf file. See also rom_report,
ram_report and
https://sourceware.org/binutils/docs/ld/MEMORY.html
config CLEANUP_INTERMEDIATE_FILES
bool "Remove all intermediate files"
help
Delete intermediate files to save space and cleanup clutter resulting
from the build process.
config BUILD_NO_GAP_FILL
bool "Don't fill gaps in generated hex/bin/s19 files."
config BUILD_OUTPUT_HEX
bool "Build a binary in HEX format"
help
Build an Intel HEX binary zephyr/zephyr.hex in the build directory.
The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
config BUILD_OUTPUT_BIN
bool "Build a binary in BIN format"
default y
help
Build a "raw" binary zephyr/zephyr.bin in the build directory.
The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
config BUILD_OUTPUT_EFI
bool "Build as an EFI application"
default n
depends on X86_64
help
Build as an EFI application.
This works by creating a "zephyr.efi" EFI binary containing a zephyr
image extracted from a built zephyr.elf file. EFI applications are
relocatable, and cannot be placed at specific locations in memory.
Instead, the stub code will copy the embedded zephyr sections to the
appropriate locations at startup, clear any zero-filled (BSS, etc...)
areas, then jump into the 64 bit entry point.
config BUILD_OUTPUT_EXE
bool "Build a binary in ELF format with .exe extension"
help
Build an ELF binary that can run in the host system at
zephyr/zephyr.exe in the build directory.
The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
config BUILD_OUTPUT_S19
bool "Build a binary in S19 format"
help
Build an S19 binary zephyr/zephyr.s19 in the build directory.
The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
config BUILD_OUTPUT_UF2
bool "Build a binary in UF2 format"
depends on BUILD_OUTPUT_BIN
help
Build a UF2 binary zephyr/zephyr.uf2 in the build directory.
The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
if BUILD_OUTPUT_UF2
config BUILD_OUTPUT_UF2_FAMILY_ID
string "UF2 device family ID"
default "0x1c5f21b0" if SOC_ESP32
default "0xada52840" if SOC_NRF52840_QIAA
default "0x4fb2d5bd" if SOC_SERIES_IMX_RT
default "0x2abc77ec" if SOC_SERIES_LPC55XXX
default "0xe48bff56" if SOC_SERIES_RP2XXX
default "0x68ed2b88" if SOC_SERIES_SAMD21
default "0x55114460" if SOC_SERIES_SAMD51
default "0x647824b6" if SOC_SERIES_STM32F0X
default "0x5d1a0a2e" if SOC_SERIES_STM32F2X
default "0x6b846188" if SOC_SERIES_STM32F3X
default "0x53b80f00" if SOC_SERIES_STM32F7X
default "0x300f5633" if SOC_SERIES_STM32G0X
default "0x4c71240a" if SOC_SERIES_STM32G4X
default "0x6db66082" if SOC_SERIES_STM32H7X
default "0x202e3a91" if SOC_SERIES_STM32L0X
default "0x1e1f432d" if SOC_SERIES_STM32L1X
default "0x00ff6919" if SOC_SERIES_STM32L4X
default "0x04240bdf" if SOC_SERIES_STM32L5X
default "0x70d16653" if SOC_SERIES_STM32WBX
default "0x5ee21072" if SOC_STM32F103XE
default "0x57755a57" if SOC_STM32F401XC || SOC_STM32F401XE
default "0x6d0922fa" if SOC_STM32F407XE
default "0x8fb060fe" if SOC_STM32F407XG
help
UF2 bootloaders only accept UF2 files with a matching family ID.
This can be either a hex, e.g. 0x68ed2b88, or well-known family
name string. If the SoC in use is known by UF2, the Family ID will
be pre-filled with the known value.
config BUILD_OUTPUT_UF2_USE_FLASH_BASE
bool
default n
config BUILD_OUTPUT_UF2_USE_FLASH_OFFSET
bool
default n
endif # BUILD_OUTPUT_UF2
config BUILD_OUTPUT_STRIPPED
bool "Build a stripped binary"
help
Build a stripped binary zephyr/zephyr.strip in the build directory.
The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
config BUILD_OUTPUT_ADJUST_LMA
string
help
This will adjust the LMA address in the final ELF and hex files with
the value provided.
This will not affect the internal address symbols inside the image but
can be useful when adjusting the LMA address for flash tools or multi
stage loaders where a pre-loader may copy image to a second location
before booting a second core.
The value will be evaluated as a math expression, this means that
following are valid expression
- 1024
- 0x1000
- -0x1000
- 0x20000000 - 0x10000000
Note: negative numbers are valid.
To adjust according to a chosen flash partition one can specify a
default as:
DT_CHOSEN_IMAGE_<name> := <name>,<name>-partition
DT_CHOSEN_Z_FLASH := zephyr,flash
config BUILD_OUTPUT_ADJUST_LMA
default "$(dt_chosen_reg_addr_hex,$(DT_CHOSEN_IMAGE_M4))-\
$(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))"
config BUILD_OUTPUT_INFO_HEADER
bool "Create a image information header"
help
Create an image information header which will contain image
information from the Zephyr binary.
Example of information contained in the header file:
- Number of segments in the image
- LMA address of each segment
- VMA address of each segment
- Size of each segment
config APPLICATION_DEFINED_SYSCALL
bool "Scan application folder for any syscall definition"
help
Scan additional folders inside application source folder
for application defined syscalls.
config MAKEFILE_EXPORTS
bool "Generate build metadata files named Makefile.exports"
help
Generates a file with build information that can be read by
third party Makefile-based build systems.
config BUILD_OUTPUT_META
bool "Create a build meta file"
help
Create a build meta file in the build directory containing lists of:
- Zephyr: path and revision (if git repo)
- Zephyr modules: name, path, and revision (if git repo)
- West:
- manifest: path and revision
- projects: path and revision
- Workspace:
- dirty: one or more repositories are marked dirty
- extra: extra Zephyr modules are manually included in the build
- off: the SHA of one or more west projects are not what the manifest
defined when `west update` was run the last time (`manifest-rev`).
The off state is only present if a west workspace is found.
File extension is .meta
config BUILD_OUTPUT_META_STATE_PROPAGATE
bool "Propagate module and project state"
depends on BUILD_OUTPUT_META
help
Propagate to state of each module to the Zephyr revision field.
If west is used the state of each west project is also propagated to
the Zephyr revision field.
West manifest repo revision field will also
be marked with the same state as the Zephyr revision.
The final revision will become: <SHA>-<state1>-<state2>-<state3>...
If no states are appended to the SHA it means the build is of a clean
tree.
- dirty: one or more repositories are marked dirty
- extra: extra Zephyr modules are manually included in the build
- off: the SHA of one or more west projects are not what the manifest
defined when `west update` was run the last time (`manifest-rev`).
The off state is only present if a west workspace is found.
endmenu
config EXPERIMENTAL
bool
help
Symbol that must be selected by a feature if it is considered to be
at an experimental implementation stage.
config WARN_EXPERIMENTAL
bool
prompt "Warn on experimental usage"
help
Print a warning when the Kconfig tree is parsed if any experimental
features are enabled.
endmenu
menu "Boot Options"
config IS_BOOTLOADER
bool "Act as a bootloader"
depends on XIP
depends on ARM
help
This option indicates that Zephyr will act as a bootloader to execute
a separate Zephyr image payload.
config BOOTLOADER_SRAM_SIZE
int "SRAM reserved for bootloader"
default 16
depends on !XIP || IS_BOOTLOADER
depends on ARM || XTENSA
help
This option specifies the amount of SRAM (measure in kB) reserved for
a bootloader image, when either:
- the Zephyr image itself is to act as the bootloader, or
- Zephyr is a !XIP image, which implicitly assumes existence of a
bootloader that loads the Zephyr !XIP image onto SRAM.
config MCUBOOT
bool
help
Hidden option used to indicate that the current image is MCUBoot
config BOOTLOADER_MCUBOOT
bool "MCUboot bootloader support"
select USE_DT_CODE_PARTITION
imply INIT_ARCH_HW_AT_BOOT if ARCH_SUPPORTS_ARCH_HW_INIT
depends on !MCUBOOT
help
This option signifies that the target uses MCUboot as a bootloader,
or in other words that the image is to be chain-loaded by MCUboot.
This sets several required build system and Device Tree options in
order for the image generated to be bootable using the MCUboot open
source bootloader. Currently this includes:
* Setting ROM_START_OFFSET to a default value that allows space
for the MCUboot image header
* Activating SW_VECTOR_RELAY_CLIENT on Cortex-M0
(or Armv8-M baseline) targets with no built-in vector relocation
mechanisms
By default, this option instructs Zephyr to initialize the core
architecture HW registers during boot, when this is supported by
the application. This removes the need by MCUboot to reset
the core registers' state itself.
if BOOTLOADER_MCUBOOT
config MCUBOOT_SIGNATURE_KEY_FILE
string "Path to the mcuboot signing key file"
default ""
depends on !MCUBOOT_GENERATE_UNSIGNED_IMAGE
help
The file contains a key pair whose public half is verified
by your target's MCUboot image. The file is in PEM format.
If set to a non-empty value, the build system tries to
sign the final binaries using a 'west sign -t imgtool' command.
The signed binaries are placed in the build directory
at zephyr/zephyr.signed.bin and zephyr/zephyr.signed.hex.
The file names can be customized with CONFIG_KERNEL_BIN_NAME.
The existence of bin and hex files depends on CONFIG_BUILD_OUTPUT_BIN
and CONFIG_BUILD_OUTPUT_HEX.
This option should contain a path to the same file as the
BOOT_SIGNATURE_KEY_FILE option in your MCUboot .config. The path
may be absolute or relative to the west workspace topdir. (The MCUboot
config option is used for the MCUboot bootloader image; this option is
for your application which is to be loaded by MCUboot. The MCUboot
config option can be a relative path from the MCUboot repository
root.)
If left empty, you must sign the Zephyr binaries manually.
config MCUBOOT_ENCRYPTION_KEY_FILE
string "Path to the mcuboot encryption key file"
default ""
depends on MCUBOOT_SIGNATURE_KEY_FILE != ""
help
The file contains the public key that is used to encrypt the
ephemeral key that encrypts the image. The corresponding
private key is hard coded in the MCUboot source code and is
used to decrypt the ephemeral key that is embedded in the
image. The file is in PEM format.
If set to a non-empty value, the build system tries to
sign and encrypt the final binaries using a 'west sign -t imgtool'
command. The binaries are placed in the build directory at
zephyr/zephyr.signed.encrypted.bin and
zephyr/zephyr.signed.encrypted.hex.
The file names can be customized with CONFIG_KERNEL_BIN_NAME.
The existence of bin and hex files depends on CONFIG_BUILD_OUTPUT_BIN
and CONFIG_BUILD_OUTPUT_HEX.
This option should either be an absolute path or a path relative to
the west workspace topdir.
Example: './bootloader/mcuboot/enc-rsa2048-pub.pem'
If left empty, you must encrypt the Zephyr binaries manually.
config MCUBOOT_EXTRA_IMGTOOL_ARGS
string "Extra arguments to pass to imgtool"
default ""
help
If CONFIG_MCUBOOT_SIGNATURE_KEY_FILE is a non-empty string,
you can use this option to pass extra options to imgtool.
For example, you could set this to "--version 1.2".
config MCUBOOT_GENERATE_UNSIGNED_IMAGE
bool "Generate unsigned binary image bootable with MCUboot"
help
Enabling this configuration allows automatic unsigned binary image
generation when MCUboot signing key is not provided,
i.e., MCUBOOT_SIGNATURE_KEY_FILE is left empty.
config MCUBOOT_GENERATE_CONFIRMED_IMAGE
bool "Also generate a padded, confirmed image"
help
The signed, padded, and confirmed binaries are placed in the build
directory at zephyr/zephyr.signed.confirmed.bin and
zephyr/zephyr.signed.confirmed.hex.
The file names can be customized with CONFIG_KERNEL_BIN_NAME.
The existence of bin and hex files depends on CONFIG_BUILD_OUTPUT_BIN
and CONFIG_BUILD_OUTPUT_HEX.
endif # BOOTLOADER_MCUBOOT
config BOOTLOADER_ESP_IDF
bool "ESP-IDF bootloader support"
depends on (SOC_ESP32 || SOC_ESP32S2 || SOC_ESP32C3) && !BOOTLOADER_MCUBOOT
default y
help
This option will trigger the compilation of the ESP-IDF bootloader
inside the build folder.
At flash time, the bootloader will be flashed with the zephyr image
config BOOTLOADER_BOSSA
bool "BOSSA bootloader support"
select USE_DT_CODE_PARTITION
help
Signifies that the target uses a BOSSA compatible bootloader. If CDC
ACM USB support is also enabled then the board will reboot into the
bootloader automatically when bossac is run.
config BOOTLOADER_BOSSA_DEVICE_NAME
string "BOSSA CDC ACM device name"
depends on BOOTLOADER_BOSSA && CDC_ACM_DTE_RATE_CALLBACK_SUPPORT
default "CDC_ACM_0"
help
Sets the CDC ACM port to watch for reboot commands.
choice
prompt "BOSSA bootloader variant"
depends on BOOTLOADER_BOSSA
config BOOTLOADER_BOSSA_LEGACY
bool "Legacy"
help
Select the Legacy variant of the BOSSA bootloader. This is defined
for compatibility mode only. The recommendation is use newer
versions like Arduino or Adafruit UF2.
config BOOTLOADER_BOSSA_ARDUINO
bool "Arduino"
help
Select the Arduino variant of the BOSSA bootloader. Uses 0x07738135
as the magic value to enter the bootloader.
config BOOTLOADER_BOSSA_ADAFRUIT_UF2
bool "Adafruit UF2"
help
Select the Adafruit UF2 variant of the BOSSA bootloader. Uses
0xf01669ef as the magic value to enter the bootloader.
endchoice
endmenu
menu "Compatibility"
config COMPAT_INCLUDES
bool "Suppress warnings when using header shims"
default y
help
Suppress any warnings from the pre-processor when including
deprecated header files.
endmenu
source "ext/Kconfig"
source "tests/Kconfig"
#
# The following are for Kconfig files for default values only.
# These should be parsed at the end.
#
# Board defaults should be parsed after SoC defaults
# because board usually overrides SoC values.
#
source "arch/*/soc/*/Kconfig.defconfig"
source "boards/*/*/Kconfig.defconfig"

507
MAINTAINERS Normal file
View File

@@ -0,0 +1,507 @@
Originally from the Linux Kernel.
# Licensed under the terms of the GNU GPL License version 2
Descriptions of section entries:
P: Person (obsolete)
M: Mail patches to: FullName <address@domain>
R: Designated reviewer: FullName <address@domain>
These reviewers should be CCed on patches.
L: Mailing list that is relevant to this area
W: Web-page with status/info
Q: Patchwork web based patch tracking system site
T: SCM tree type and location.
Type is one of: git, hg, quilt, stgit, topgit
S: Status, one of the following:
Supported: Someone is actually paid to look after this.
Maintained: Someone actually looks after it.
Odd Fixes: It has a maintainer but they don't have time to do
much other than throw the odd patch in. See below..
Orphan: No current maintainer [but maybe you could take the
role as you write your new code].
Obsolete: Old code. Something tagged obsolete generally means
it has been replaced by a better system and you
should be using that.
F: Files and directories with wildcard patterns.
A trailing slash includes all files and subdirectory files.
F: drivers/net/ all files in and below drivers/net
F: drivers/net/* all files in drivers/net, but not below
F: */net/* all files in "any top level directory"/net
One pattern per line. Multiple F: lines acceptable.
N: Files and directories with regex patterns.
N: [^a-z]tegra all files whose path contains the word tegra
One pattern per line. Multiple N: lines acceptable.
scripts/get_maintainer.pl has different behavior for files that
match F: pattern and matches of N: patterns. By default,
get_maintainer will not look at git log history when an F: pattern
match occurs. When an N: match occurs, git log history is used
to also notify the people that have git commit signatures.
X: Files and directories that are NOT maintained, same rules as F:
Files exclusions are tested before file matches.
Can be useful for excluding a specific subdirectory, for instance:
F: net/
X: net/ipv6/
matches all files in and below net excluding net/ipv6/
K: Keyword perl extended regex pattern to match content in a
patch or file. For instance:
K: of_get_profile
matches patches or files that contain "of_get_profile"
K: \b(printk|pr_(info|err))\b
matches patches or files that contain one or more of the words
printk, pr_info or pr_err
One regex pattern per line. Multiple K: lines acceptable.
Note: For the hard of thinking, this list is meant to remain in alphabetical
order. If you could add yourselves to it in alphabetical order that would be
so much easier [Ed]
Maintainers List (try to look for most precise areas first)
-----------------------------------
ARC ARCHITECTURE
M: Ruud Derwig <Ruud.Derwig@synopsys.com>
M: Chuck Jordan <cjordan@synopsys.com>
M: Benjamin Walsh <benjamin.walsh@windriver.com>
S: Supported
F: arch/arc/
F: include/arch/arc/
F: boards/arc/
ARM ARCHITECTURE
M: Maureen Helm <maureen.helm@nxp.com>
M: Kumar Gala <kumar.gala@linaro.org>
S: Supported
F: arch/arm/
F: include/arch/arm/
F: boards/arm/
ARM CORTEX MICROCONTROLLER SOFTWARE INTERFACE STANDARD (CMSIS)
M: Maureen Helm <maureen.helm@nxp.com>
M: Kumar Gala <kumar.gala@linaro.org>
S: Supported
F: ext/hal/cmsis/
BOARDS/ARC - ARDUINO 101 SSS
M: Anas Nashif <anas.nashif@intel.com>
S: Supported
F: boards/arc/arduino_101_sss/
BOARDS/ARC - EM Starterkit
M: Chuck Jordan <cjordan@synopsys.com>
S: Supported
F: boards/arc/em_starterkit/
BOARDS/ARC - QUARK SE C1000 SS Devboard
M: Anas Nashif <anas.nashif@intel.com>
S: Supported
F: boards/arc/quark_se_c1000_ss_devboard/
BOARDS/ARM - 96Boards CARBON
M: Amit Kucheria <amit.kucheria@linaro.org>
M: Ricardo Salveti <ricardo.salveti@linaro.org>
S: Supported
F: boards/arm/96b_carbon/
BOARDS/ARM - 96Boards NITROGEN
M: Amit Kucheria <amit.kucheria@linaro.org>
S: Supported
F: boards/arm/96b_nitrogen/
BOARDS/ARM - ARDUINO 101 BLE
M: Johan Hedberg <johan.hedberg@intel.com>
S: Supported
F: boards/arm/arduino_101_ble/
BOARDS/ARM - CC32XX LAUNCHXL
M: Gil Pitney <gil.pitney@linaro.org>
S: Supported
F: boards/arm/cc3200_launchxl/
F: boards/arm/cc3220sf_launchxl/
BOARDS/ARM - NXP FRDM-K64F
M: Maureen Helm <maureen.helm@nxp.com>
S: Supported
F: boards/arm/frdm_k64f/
BOARDS/ARM - NXP FRDM-KW41Z
M: Maureen Helm <maureen.helm@nxp.com>
S: Supported
F: boards/arm/frdm_kw41z/
BOARDS/ARM - NXP Hexiwear
M: Maureen Helm <maureen.helm@nxp.com>
S: Supported
F: boards/arm/hexiwear_k64/
BOARDS/ARM - NORDIC NRF51 REDBEAR BLENANO
M: Ricardo Salveti <ricardo.salveti@linaro.org>
S: Supported
F: boards/arm/nrf51_blenano/
BOARDS/ARM - NORDIC NRF52 PCA10040
M: Carles Cufi <carles.cufi@nordicsemi.no>
S: Supported
F: boards/arm/nrf52_pca10040/
BOARDS/ARM - NUCLEO-64 F401RE Devboard
M: Amit Kucheria <amit.kucheria@linaro.org>
M: Ricardo Salveti <ricardo.salveti@linaro.org>
S: Supported
F: boards/arm/nucleo_f401re/
BOARDS/ARM - ARM LTD V2M Beetle
M: Vincenzo Frascino <vincenzo.frascino@linaro.org>
S: Supported
F: boards/arm/v2m_beetle/
BOARDS/NIOS2 - ALTERA MAX10
M: Andrew Boie <andrew.p.boie@intel.com>
S: Supported
F: boards/nios2/altera_max10/
BOARDS/X86 - ARDUINO 101
M: Anas Nashif <anas.nashif@intel.com>
S: Supported
F: boards/x86/arduino_101/
BOARDS/X86 - Galileo
M: Anas Nashif <anas.nashif@intel.com>
S: Supported
F: boards/x86/galileo/
BOARDS/X86 - QUARK D2000 Devboard
M: Anas Nashif <anas.nashif@intel.com>
S: Supported
F: boards/x86/quark_d2000/
BOARDS/X86 - QUARK SE C1000 Devboard
M: Anas Nashif <anas.nashif@intel.com>
S: Supported
F: boards/x86/quark_se_c1000/
BLUETOOTH
M: Johan Hedberg <johan.hedberg@intel.com>
M: Luiz Augusto von Dentz <luiz.dentz@gmail.com>
M: Szymon Janc <szymon.janc@gmail.com>
S: Supported
W: https://www.zephyrproject.org/doc/subsystems/bluetooth/bluetooth.html
F: subsys/bluetooth/
F: include/bluetooth/
F: include/drivers/bluetooth/
F: drivers/bluetooth/
F: samples/bluetooth/
F: tests/bluetooth/
F: doc/subsystems/bluetooth/
BLUETOOTH CONTROLLER
M: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
M: Carles Cufi <carles.cufi@nordicsemi.no>
S: Supported
F: subsys/bluetooth/controller/
CC32XX SDK
M: Gil Pitney <gil.pitney@linaro.org>
S: Supported
F: ext/hal/ti/cc3200sdk/
F: ext/hal/ti/cc3220sdk/
CC32XX SOC - TI SIMPLELINK
M: Gil Pitney <gil.pitney@linaro.org>
S: Supported
F: arch/arm/soc/ti_simplelink/cc32xx
DOCUMENTATION
M: Kinder, David <david.b.kinder@intel.com>
M: Perez-Gonzalez, Inaky <inaky.perez-gonzalez@intel.com>
S: Supported
F: doc/
F: *.rst
F: */*.rst
F: */*/*.rst
F: */*/*/*.rst
F: */*/*/*/*.rst
F: */*/*/*/*/*.rst
F: */*/*/*/*/*/*.rst
F: */*/*/*/*/*/*/*.rst
F: */*/*/*/*/*/*/*/*.rst
FILE SYSTEM
M: Ramesh Thomas <ramesh.thomas@intel.com>
M: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
S: Supported
F: ext/fs/
F: subsys/fs/
F: include/fs/
F: include/fs.h
F: samples/fs/
FLASH DRIVER
M: Baohong Liu <baohong.liu@intel.com>
M: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
S: Supported
F: drivers/flash/
INTERRUPTS
M: Andrew Boie <andrew.p.boie@intel.com>
S: Supported
F: drivers/interrupt_controller/
F: arch/arc/core/
F: arch/arm/core/
F: arch/nios2/core/
F: arch/x86/core/
F: include/irq.h
F: include/arch/x86/arch.h
F: include/arch/arm/cortex_m/irq.h
F: include/arch/nios2/arch.h
F: include/arch/arc/arch.h
F: include/arch/arc/v2/irq.h
F: include/drivers/loapic.h
F: include/drivers/ioapic.h
F: include/drivers/mvic.h
KERNEL CORE
M: Benjamin Walsh <benjamin.walsh@windriver.com>
M: Andrew Boie <andrew.p.boie@intel.com>
M: Andy Ross <andrew.j.ross@intel.com>
S: Supported
F: kernel/
F: include/misc/
F: include/toolchain/
F: include/atomic.h
F: include/cache.h
F: include/init.h
F: include/irq.h
F: include/irq_offload.h
F: include/kernel_version.h
F: include/linker-defs.h
F: include/linker-tool-gcc.h
F: include/linker-tool.h
F: include/section_tags.h
F: include/sections.h
F: include/shared_irq.h
F: include/sw_isr_table.h
F: include/sys_clock.h
F: include/sys_io.h
F: include/toolchain.h
F: include/zephyr.h
F: include/kernel.h
F: tests/kernel/
KNOWN ISSUES
M: Anas Nashif <anas.nashif@intel.com>
M: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
F: .known-issues/
MAINTAINERS
M: Anas Nashif <anas.nashif@intel.com>
M: Perez-Gonzalez, Inaky <inaky.perez-gonzalez@intel.com>
S: Supported
F: MAINTAINERS
MBEDTLS
M: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
M: Jithu Joseph <jithu.joseph@intel.com>
M: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
S: Supported
F: ext/lib/crypto/mbedtls/
F: samples/net/mbedtls_sslclient/
F: tests/crypto/test_mbedtls/
MCUXPRESSO SOFTWARE DEVELOPMENT KIT (MCUX)
M: Maureen Helm <maureen.helm@nxp.com>
S: Supported
F: ext/hal/nxp/mcux/
MPS2 - ARM LTD CORTEX-M PROTOTYPING SYSTEM
M: Vincenzo Frascino <vincenzo.frascino@linaro.org>
S: Supported
F: arch/arm/soc/arm/mps2/
F: boards/arm/mps2/
NETWORKING
M: Jukka Rissanen <jukka.rissanen@linux.intel.com>
M: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
S: Supported
W: https://www.zephyrproject.org/doc/subsystems/networking/networking.html
F: subsys/net/ip/
F: subsys/net/lib/
F: include/net/
F: samples/net/
F: tests/net/
F: tests/net/lib/
F: drivers/ethernet/
F: drivers/ieee802154/
F: drivers/slip/
NETWORK APPLICATIONS
M: Jukka Rissanen <jukka.rissanen@linux.intel.com>
M: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
S: Supported
F: subsys/net/lib/dns/
F: subsys/net/lib/http/
F: subsys/net/lib/mqtt/
F: samples/net/dns_client/
F: samples/net/http_server/
F: samples/net/mqtt_publisher/
F: tests/net/lib/http_header_fields/
F: tests/net/lib/mqtt_packet/
NETWORK BUFFERS
M: Johan Hedberg <johan.hedberg@intel.com>
M: Jukka Rissanen <jukka.rissanen@linux.intel.com>
M: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
S: Supported
W: https://www.zephyrproject.org/doc/subsystems/networking/buffers.html
F: subsys/net/buf.c
F: include/net/buf.h
F: tests/net/buf/
NIOS II
M: Andrew Boie <andrew.p.boie@intel.com>
S: Supported
F: arch/nios2/
F: include/arch/nios2/
F: drivers/serial/uart_altera_jtag.c
F: drivers/timer/altera_avalon_timer.c
F: tests/kernel/test_intmath/
F: boards/nios2/
NORDIC MDK
M: Carles Cufi <carles.cufi@nordicsemi.no>
S: Supported
F: ext/hal/nordic/mdk/
POWER MANAGEMENT
M: Ramesh Thomas <ramesh.thomas@intel.com>
M: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
S: Supported
F: arch/x86/core/crt0.S
F: include/device.h
F: include/init.h
F: include/power.h
F: kernel/k_idle.c
F: kernel/device.c
F: samples/power/
QMSI
M: Anas Nashif <anas.nashif@intel.com>
S: Supported
F: ext/hal/qmsi/
QMSI DRIVERS
M: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
M: Baohong Liu <baohong.liu@intel.com>
M: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
S: Supported
F: drivers/*/*qmsi*
F: drivers/*/*/*qmsi*
QUARK D2000 SOC
M: Anas Nashif <anas.nashif@intel.com>
S: Supported
F: arch/x86/soc/intel_quark/quark_d2000/
QUARK SE C1000 SOC
M: Anas Nashif <anas.nashif@intel.com>
S: Supported
F: arch/x86/soc/intel_quark/quark_se_c1000/
QUARK X1000 SOC
M: Anas Nashif <anas.nashif@intel.com>
S: Supported
F: arch/x86/soc/intel_quark/quark_x1000/
SANITYCHECK
M: Andrew Boie <andrew.p.boie@intel.com>
S: Supported
F: scripts/sanitycheck
F: scripts/expr_parser.py
F: scripts/sanity_chk/
SENSOR DRIVERS
M: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
M: Murtaza Alexandru <murtaza.alexandru1995@gmail.com>
S: Supported
W: https://www.zephyrproject.org/doc/subsystems/sensor.html
F: include/sensor.h
F: drivers/sensor/
F: samples/sensor/
STM32CUBE SDK
M: Erwan Gouriou <erwan.gouriou@linaro.org>
S: Supported
F: ext/hal/st/stm32cube/
STM32F4X SoC FAMILY and DRIVERS
M: Amit Kucheria <amit.kucheria@linaro.org>
M: Ricardo Salveti <ricardo.salveti@linaro.org>
S: Supported
F: arch/arm/soc/st_stm32/stm32f4/
F: drivers/pinmux/stm32/
F: drivers/gpio/*stm32*
F: drivers/clock_control/*stm32f4*
TINYCRYPT
M: Constanza Heath <constanza.m.heath@intel.com>
S: Supported
F: ext/lib/crypto/tinycrypt/
F: tests/crypto/
SPI
M: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
S: Supported
F: drivers/spi/
F: include/spi.h
F: tests/drivers/spi_test/
USB
M: Jithu Joseph <jithu.joseph@intel.com>
S: Supported
F: subsys/usb
F: drivers/usb
F: samples/usb
X86 ARCH
M: Benjamin Walsh <benjamin.walsh@windriver.com>
M: Andrew Boie <andrew.p.boie@intel.com>
S: Supported
F: arch/x86/
F: include/arch/x86/
F: boards/x86/
XTENSA ARCH
M: Andrew Boie <andrew.p.boie@intel.com>
S: Supported
F: arch/xtensa
F: include/arch/xtensa/
F: boards/xtensa/
RISCV32 ARCH
M: Jean-Paul Etienne <fractalclone@gmail.com>
S: Supported
F: arch/riscv32
F: include/arch/riscv32
F: boards/riscv32
F: drivers/serial/uart_riscv_qemu.c
F: drivers/timer/pulpino_timer.c
F: drivers/timer/riscv_machine_timer.c
F: drivers/gpio/gpio_pulpino.c
ZOAP
M: Vinicius Costa Gomes <vinicius.gomes@intel.com>
S: Supported
F: subsys/net/lib/zoap/
F: samples/net/zoap_client/
F: samples/net/zoap_server/
F: tests/net/lib/zoap/
THE REST
M: Anas Nashif <anas.nashif@intel.com>
M: Kumar Gala <kumar.gala@linaro.org>
L: devel@lists.zephyrproject.com
T: git https://github.com/zephyrproject-rtos/zephyr
S: Buried alive in reporters
F: *
F: */

File diff suppressed because it is too large Load Diff

1412
Makefile Normal file

File diff suppressed because it is too large Load Diff

152
Makefile.inc Normal file
View File

@@ -0,0 +1,152 @@
# vim: filetype=make
#
UNAME := $(shell uname)
ifeq (MINGW, $(findstring MINGW, $(UNAME)))
DQUOTE = '
# '
PROJECT_BASE ?= $(shell sh -c "pwd -W")
else
DQUOTE = "
# "
PROJECT_BASE ?= $(CURDIR)
endif
ifdef BOARD
KBUILD_DEFCONFIG_PATH=$(wildcard $(ZEPHYR_BASE)/boards/*/*/$(BOARD)_defconfig)
ifeq ($(KBUILD_DEFCONFIG_PATH),)
$(error Board $(BOARD) not found!)
endif
else
$(error BOARD is not defined!)
endif
# Choose a default output directory if one wasn't supplied. Note that
# PRISTINE_O depends on whether this is default or not. If building
# in-tree, we want to remove the whole outdir and not just the BOARD
# specified (thus "pristine"). Out of tree, we can obviously remove
# only what we were told to build.
ifndef O
PRISTINE_O = outdir
O = $(PROJECT_BASE)/outdir/$(BOARD)
else
PRISTINE_O = $(O)
endif
# Turn O into an absolute path; we call the main Kbuild with $(MAKE) -C
# which changes the working directory, relative paths don't work right.
# Need to create the directory first to make realpath happy
ifneq ($(MAKECMDGOALS),help)
$(shell mkdir -p $(O))
override O := $(realpath $(O))
endif
export ARCH QEMU_EXTRA_FLAGS PROJECT_BASE
override CONF_FILE := $(strip $(subst $(DQUOTE),,$(CONF_FILE)))
SOURCE_DIR ?= $(PROJECT_BASE)/src/
override SOURCE_DIR := $(realpath $(SOURCE_DIR))
override SOURCE_DIR := $(subst \,/,$(SOURCE_DIR))
override SOURCE_DIR_PARENT := $(patsubst %, %/.., $(SOURCE_DIR))
override SOURCE_DIR_PARENT := $(abspath $(SOURCE_DIR_PARENT))
override SOURCE_DIR_PARENT := $(subst \,/,$(SOURCE_DIR_PARENT))
export SOURCE_DIR SOURCE_DIR_PARENT
ifeq ("$(origin V)", "command line")
KBUILD_VERBOSE = $(V)
endif
ifndef KBUILD_VERBOSE
KBUILD_VERBOSE = 0
endif
ifeq ($(KBUILD_VERBOSE),1)
Q =
S =
else
Q = @
S = -s
endif
export CFLAGS
zephyrmake = +$(MAKE) -C $(ZEPHYR_BASE) O=$(1) \
PROJECT=$(PROJECT_BASE) SOURCE_DIR=$(DQUOTE)$(SOURCE_DIR)$(DQUOTE) $(2)
BOARDCONFIG = $(O)/.board_$(BOARD)
DOTCONFIG = $(O)/.config
all: $(DOTCONFIG)
$(Q)$(call zephyrmake,$(O),$@)
debug: $(DOTCONFIG)
$(Q)$(call zephyrmake,$(O),$@)
flash: $(DOTCONFIG)
$(Q)$(call zephyrmake,$(O),$@)
qemugdb: debugserver
qemu: $(DOTCONFIG)
@echo This target is deprecated, use 'make run' instead
$(Q)$(call zephyrmake,$(O),$@)
run: $(DOTCONFIG)
$(Q)$(call zephyrmake,$(O),$@)
ifeq ($(MAKECMDGOALS),debugserver)
ARCH = $(notdir $(subst /$(BOARD),,$(wildcard $(ZEPHYR_BASE)/boards/*/$(BOARD))))
-include $(ZEPHYR_BASE)/boards/$(ARCH)/$(BOARD)/Makefile.board
-include $(ZEPHYR_BASE)/scripts/Makefile.toolchain.$(ZEPHYR_GCC_VARIANT)
BOARD_NAME = $(BOARD)
export BOARD_NAME
endif
debugserver: FORCE
$(Q)$(CONFIG_SHELL) $(ZEPHYR_BASE)/scripts/support/$(DEBUG_SCRIPT) debugserver
initconfig: $(DOTCONFIG)
$(BOARDCONFIG):
@rm -f $(O)/.board_*
@touch $@
ram_report: initconfig
$(Q)$(call zephyrmake,$(O),$@)
rom_report: initconfig
$(Q)$(call zephyrmake,$(O),$@)
outputexports: initconfig
$(Q)$(call zephyrmake,$(O),$@)
dts: initconfig
$(Q)$(call zephyrmake,$(O),$@)
menuconfig: initconfig
$(Q)$(call zephyrmake,$(O),$@)
help:
$(Q)$(MAKE) -s -C $(ZEPHYR_BASE) $@
# Catch all
%:
$(Q)$(call zephyrmake,$(O),$@)
OVERLAY_CONFIG += $(ZEPHYR_BASE)/kernel/configs/kernel.config
$(DOTCONFIG): $(BOARDCONFIG) $(KBUILD_DEFCONFIG_PATH) $(CONF_FILE)
$(Q)$(CONFIG_SHELL) $(ZEPHYR_BASE)/scripts/kconfig/merge_config.sh \
-q -m -O $(O) $(KBUILD_DEFCONFIG_PATH) $(OVERLAY_CONFIG) $(CONF_FILE) \
$(wildcard $(O)/*.conf)
$(Q)$(MAKE) $(S) -C $(ZEPHYR_BASE) O=$(O) PROJECT=$(PROJECT_BASE) oldnoconfig
pristine:
$(Q)rm -rf $(PRISTINE_O)
PHONY += FORCE initconfig
FORCE:
.PHONY: $(PHONY)

4
Makefile.test Normal file
View File

@@ -0,0 +1,4 @@
OVERLAY_CONFIG += $(ZEPHYR_BASE)/tests/include/test.config
include ${ZEPHYR_BASE}/Makefile.inc

View File

@@ -1,18 +1,5 @@
.. raw:: html
<a href="https://www.zephyrproject.org">
<p align="center">
<img src="doc/_static/images/logo-readme.svg">
</p>
</a>
<a href="https://bestpractices.coreinfrastructure.org/projects/74"><img
src="https://bestpractices.coreinfrastructure.org/projects/74/badge"></a>
<a
href="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml?query=branch%3Amain">
<img
src="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml/badge.svg?event=push"></a>
Zephyr Project
##############
The Zephyr Project is a scalable real-time operating system (RTOS) supporting
multiple hardware architectures, optimized for resource constrained devices,
@@ -23,66 +10,76 @@ resource-constrained systems: from simple embedded environmental sensors and
LED wearables to sophisticated smart watches and IoT wireless gateways.
The Zephyr kernel supports multiple architectures, including ARM Cortex-M,
Intel x86, ARC, Nios II, Tensilica Xtensa, and RISC-V, and a large number of
Intel x86, ARC, NIOS II and RISC V, and a large number of
`supported boards`_.
.. below included in doc/introduction/introduction.rst
Getting Started
***************
Welcome to Zephyr! See the `Introduction to Zephyr`_ for a high-level overview,
and the documentation's `Getting Started Guide`_ to start developing.
.. start_include_here
Community Support
*****************
Community support is provided via mailing lists and Discord; see the Resources
below for details.
The Zephyr Project Developer Community includes developers from member
organizations and the general community all joining in the development of
software within the Zephyr Project. Members contribute and discuss ideas,
submit bugs and bug fixes, and provide training. They also help those in need
through the community's forums such as mailing lists and IRC channels. Anyone
can join the developer community and the community is always willing to help
its members and the User Community to get the most out of the Zephyr Project.
.. _project-resources:
Welcome to the Zephyr community!
Resources
*********
Here's a quick summary of resources to help you find your way around:
Here's a quick summary of resources to find your way around the Zephyr Project
support systems:
* **Help**: `Asking for Help Tips`_
* **Documentation**: http://docs.zephyrproject.org (`Getting Started Guide`_)
* **Source Code**: https://github.com/zephyrproject-rtos/zephyr is the main
repository; https://elixir.bootlin.com/zephyr/latest/source contains a
searchable index
* **Releases**: https://github.com/zephyrproject-rtos/zephyr/releases
* **Samples and example code**: see `Sample and Demo Code Examples`_
* **Mailing Lists**: users@lists.zephyrproject.org and
devel@lists.zephyrproject.org are the main user and developer mailing lists,
respectively. You can join the developer's list and search its archives at
`Zephyr Development mailing list`_. The other `Zephyr mailing list
subgroups`_ have their own archives and sign-up pages.
* **Nightly CI Build Status**: https://lists.zephyrproject.org/g/builds
The builds@lists.zephyrproject.org mailing list archives the CI nightly build results.
* **Chat**: Real-time chat happens in Zephyr's Discord Server. Use
this `Discord Invite`_ to register.
* **Contributing**: see the `Contribution Guide`_
* **Wiki**: `Zephyr GitHub wiki`_
* **Issues**: https://github.com/zephyrproject-rtos/zephyr/issues
* **Security Issues**: Email vulnerabilities@zephyrproject.org to report
security issues; also see our `Security`_ documentation. Security issues are
tracked separately at https://zephyrprojectsec.atlassian.net.
* **Zephyr Project Website**: https://zephyrproject.org
* **Zephyr Project Website**: The https://zephyrproject.org website is the
central source of information about the Zephyr Project. On this site, you'll
find background and current information about the project as well as all the
relevant links to project material. For a quick start, refer to the
`Zephyr Introduction`_ and `Getting Started Guide`_.
.. _Discord Invite: https://chat.zephyrproject.org
.. _supported boards: http://docs.zephyrproject.org/latest/boards/index.html
.. _Zephyr Documentation: http://docs.zephyrproject.org
.. _Introduction to Zephyr: http://docs.zephyrproject.org/latest/introduction/index.html
.. _Getting Started Guide: http://docs.zephyrproject.org/latest/getting_started/index.html
.. _Contribution Guide: http://docs.zephyrproject.org/latest/contribute/index.html
* **Releases**: Source code for Zephyr kernel releases are available at
https://zephyrproject.org/downloads. On this page,
you'll find release information, and links to download or clone source
code from our GitHub repository. You'll also find links for the Zephyr
SDK, a moderated collection of tools and libraries used to develop your
applications.
* **Source Code in GitHub**: Zephyr Project source code is maintained on a
public GitHub repository at https://github.com/zephyrproject-rtos/zephyr.
You'll find information about getting access to the repository and how to
contribute to the project in this `Contribution Guide`_ wiki article.
* **Samples Code**: In addition to the kernel source code, there are also
many documented `Sample and Demo Code Examples`_ that can help show you
how to use Zephyr services and subsystems.
* **Documentation**: Extensive Project technical documentation is developed
along with the Zephyr kernel itself, and can be found at
https://zephyrproject.org/doc. Additional documentation is maintained in
the `Zephyr GitHub wiki`_.
* **Issue Reporting and Tracking**: Requirements and Issue tracking is done in
our JIRA system: https://jira.zephyrproject.org. You can browse through the
reported issues and submit issues of your own.
* **Mailing List**: The `Zephyr Mailing Lists`_ are perhaps the most convenient
way to track developer discussions and to ask your own support questions to
the Zephyr project community.
You can also read through message archives to follow
past posts and discussions, a good thing to do to discover more about the
Zephyr project.
* **IRC Chatting**: You can chat online with the Zephyr project developer
community and other users in our IRC channel #zephyrproject on the
freenode.net IRC server. You can use the http://webchat.freenode.net web
client or use a client-side application such as pidgin.
.. _supported boards: https://www.zephyrproject.org/doc/boards/boards.html
.. _Zephyr Introduction: https://www.zephyrproject.org/doc/introduction/introducing_zephyr.html
.. _Getting Started Guide: https://www.zephyrproject.org/doc/getting_started/getting_started.html
.. _Contribution Guide: https://github.com/zephyrproject-rtos/zephyr/wiki/Contribution-Guide
.. _Zephyr GitHub wiki: https://github.com/zephyrproject-rtos/zephyr/wiki
.. _Zephyr Development mailing list: https://lists.zephyrproject.org/g/devel
.. _Zephyr mailing list subgroups: https://lists.zephyrproject.org/g/main/subgroups
.. _Sample and Demo Code Examples: http://docs.zephyrproject.org/latest/samples/index.html
.. _Security: http://docs.zephyrproject.org/latest/security/index.html
.. _Asking for Help Tips: https://docs.zephyrproject.org/latest/getting_started/index.html#asking-for-help
.. _Zephyr Mailing Lists: https://lists.zephyrproject.org/
.. _Sample and Demo Code Examples: https://www.zephyrproject.org/doc/samples/samples.html

View File

@@ -1,5 +0,0 @@
VERSION_MAJOR = 3
VERSION_MINOR = 0
PATCHLEVEL = 0
VERSION_TWEAK = 0
EXTRAVERSION =

View File

@@ -1,11 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
add_definitions(-D__ZEPHYR_SUPERVISOR__)
include_directories(
${ZEPHYR_BASE}/kernel/include
${ARCH_DIR}/${ARCH}/include
)
add_subdirectory(common)
add_subdirectory(${ARCH_DIR}/${ARCH} arch/${ARCH})

View File

@@ -1,838 +1,168 @@
# General architecture configuration options
# Kconfig - general architecture configuration options
#
# Copyright (c) 2014-2015 Wind River Systems, Inc.
# Copyright (c) 2015 Intel Corporation
# Copyright (c) 2016 Cadence Design Systems, Inc.
# SPDX-License-Identifier: Apache-2.0
# Include these first so that any properties (e.g. defaults) below can be
# overridden (by defining symbols in multiple locations)
# Note: $ARCH might be a glob pattern
source "$(ARCH_DIR)/$(ARCH)/Kconfig"
# Architecture symbols
#
# Should be 'select'ed by low-level symbols like SOC_SERIES_* or, lacking that,
# by SOC_*.
# SPDX-License-Identifier: Apache-2.0
#
choice
prompt "Architecture"
default X86
config ARC
bool
select ARCH_IS_SET
select HAS_DTS
imply XIP
select ARCH_HAS_THREAD_LOCAL_STORAGE
help
ARC architecture
bool "ARC architecture"
config ARM
bool
select ARCH_IS_SET
select ARCH_SUPPORTS_COREDUMP if CPU_CORTEX_M
select HAS_DTS
# FIXME: current state of the code for all ARM requires this, but
# is really only necessary for Cortex-M with ARM MPU!
select GEN_PRIV_STACKS
select ARCH_HAS_THREAD_LOCAL_STORAGE if CPU_CORTEX_R || CPU_CORTEX_M
help
ARM architecture
config ARM64
bool
select ARCH_IS_SET
select 64BIT
select HAS_DTS
select HAS_ARM_SMCCC
select ARCH_HAS_THREAD_LOCAL_STORAGE
select USE_SWITCH
select USE_SWITCH_SUPPORTED
help
ARM64 (AArch64) architecture
config MIPS
bool
select ARCH_IS_SET
select ATOMIC_OPERATIONS_C
select HAS_DTS
help
MIPS architecture
config SPARC
bool
select ARCH_IS_SET
select HAS_DTS
select USE_SWITCH
select USE_SWITCH_SUPPORTED
select BIG_ENDIAN
select ATOMIC_OPERATIONS_BUILTIN if SPARC_CASA
select ATOMIC_OPERATIONS_C if !SPARC_CASA
select ARCH_HAS_THREAD_LOCAL_STORAGE
select ARCH_HAS_EXTRA_EXCEPTION_INFO
help
SPARC architecture
bool "ARM architecture"
config X86
bool
select ARCH_IS_SET
bool "x86 architecture"
select ATOMIC_OPERATIONS_BUILTIN
select HAS_DTS
select ARCH_SUPPORTS_COREDUMP
select CPU_HAS_MMU
select ARCH_MEM_DOMAIN_DATA if USERSPACE && !X86_COMMON_PAGE_TABLE
select ARCH_MEM_DOMAIN_SYNCHRONOUS_API if USERSPACE
select ARCH_HAS_GDBSTUB if !X86_64
select ARCH_HAS_TIMING_FUNCTIONS
select ARCH_HAS_THREAD_LOCAL_STORAGE
select ARCH_HAS_DEMAND_PAGING
select NEED_LIBC_MEM_PARTITION if USERSPACE && TIMING_FUNCTIONS \
&& !BOARD_HAS_TIMING_FUNCTIONS \
&& !SOC_HAS_TIMING_FUNCTIONS
help
x86 architecture
config NIOS2
bool
select ARCH_IS_SET
bool "Nios II Gen 2 architecture"
select ATOMIC_OPERATIONS_C
select HAS_DTS
imply XIP
select ARCH_HAS_TIMING_FUNCTIONS
help
Nios II Gen 2 architecture
config RISCV
bool
select ARCH_IS_SET
select HAS_DTS
select ARCH_SUPPORTS_COREDUMP
select ARCH_HAS_THREAD_LOCAL_STORAGE
imply XIP
help
RISCV architecture
config RISCV32
bool "RISCV32 architecture"
config XTENSA
bool "Xtensa architecture"
endchoice
#
# Hidden PM feature configs which are to be selected by
# individual SoC.
#
config SYS_POWER_LOW_POWER_STATE_SUPPORTED
# Hidden
bool
select ARCH_IS_SET
select HAS_DTS
select USE_SWITCH
select USE_SWITCH_SUPPORTED
imply ATOMIC_OPERATIONS_ARCH
default n
help
Xtensa architecture
This option signifies that the target supports the SYS_POWER_LOW_POWER_STATE
configuration option.
config ARCH_POSIX
config SYS_POWER_DEEP_SLEEP_SUPPORTED
# Hidden
bool
select ARCH_IS_SET
select HAS_DTS
select ATOMIC_OPERATIONS_BUILTIN
select ARCH_HAS_CUSTOM_SWAP_TO_MAIN
select ARCH_HAS_CUSTOM_BUSY_WAIT
select ARCH_HAS_THREAD_ABORT
select NATIVE_APPLICATION
select HAS_COVERAGE_SUPPORT
default n
help
POSIX (native) architecture
This option signifies that the target supports the SYS_POWER_DEEP_SLEEP
configuration option.
config ARCH_IS_SET
config BOOTLOADER_CONTEXT_RESTORE_SUPPORTED
# Hidden
bool
default n
help
Helper symbol to detect SoCs forgetting to select one of the arch
symbols above. See the top-level CMakeLists.txt.
This option signifies that the target has options of bootloaders
that support context restore upon resume from deep sleep
menu "General Architecture Options"
module = ARCH
module-str = arch
source "subsys/logging/Kconfig.template.log_config"
module = MPU
module-str = mpu
source "subsys/logging/Kconfig.template.log_config"
config BIG_ENDIAN
config SIMPLE_FATAL_ERROR_HANDLER
prompt "Simple system fatal error handler"
bool
default n
default y if !MULTITHREADING
help
This option tells the build system that the target system is big-endian.
Little-endian architecture is the default and should leave this option
unselected. This option is selected by arch/$ARCH/Kconfig,
soc/**/Kconfig, or boards/**/Kconfig and the user should generally avoid
modifying it. The option is used to select linker script OUTPUT_FORMAT
and command line option for gen_isr_tables.py.
Provides an implementation of _SysFatalErrorHandler() that hard hangs
instead of aborting the faulting thread, and does not print anything,
for footprint-concerned systems. Only enable this option if you do not
want debug capabilities in case of system fatal error.
config 64BIT
bool
#
# End hidden PM feature configs
#
config ARCH
string
help
This option tells the build system that the target system is
using a 64-bit address space, meaning that pointer and long types
are 64 bits wide. This option is selected by arch/$ARCH/Kconfig,
soc/**/Kconfig, or boards/**/Kconfig and the user should generally
avoid modifying it.
System architecture string.
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_SRAM := zephyr,sram
config SRAM_SIZE
int "SRAM Size in kB"
default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_SRAM),0,K)
config SOC
string
help
The SRAM size in kB. The default value comes from /chosen/zephyr,sram in
devicetree. The user should generally avoid changing it via menuconfig or
in configuration files.
SoC name which can be found under arch/<arch>/soc/<soc name>.
This option holds the directory name used by the build system to locate
the correct linker and header files for the SoC. This option will go away
once all SoCs are using family/series structure.
config SRAM_BASE_ADDRESS
hex "SRAM Base Address"
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_SRAM))
config SOC_SERIES
string
help
The SRAM base address. The default value comes from from
/chosen/zephyr,sram in devicetree. The user should generally avoid
changing it via menuconfig or in configuration files.
SoC series name which can be found under arch/<arch>/soc/<family>/<series>.
This option holds the directory name used by the build system to locate
the correct linker and header files.
if ARC || ARM || ARM64 || NIOS2 || X86
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
config FLASH_SIZE
int "Flash Size in kB"
default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K) if (XIP && (ARM ||ARM64)) || !ARM
config SOC_FAMILY
string
help
This option specifies the size of the flash in kB. It is normally set by
the board's defconfig file and the user should generally avoid modifying
it via the menu configuration.
SoC family name which can be found under arch/<arch>/soc/<family>.
This option holds the directory name used by the build system to locate
the correct linker and header files.
config FLASH_BASE_ADDRESS
hex "Flash Base Address"
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) if (XIP && (ARM || ARM64)) || !ARM
config BOARD
string
help
This option specifies the base address of the flash on the board. It is
normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration.
This option holds the name of the board and is used to locate the files
related to the board in the source tree (under boards/).
The Board is the first location where we search for a linker.ld file,
if not found we look for the linker file in
arch/<arch>/soc/<family>/<series>
endif # ARM || ARM64 || ARC || NIOS2 || X86
if ARCH_HAS_TRUSTED_EXECUTION
config TRUSTED_EXECUTION_SECURE
bool "Trusted Execution: Secure firmware image"
help
Select this option to enable building a Secure firmware
image for a platform that supports Trusted Execution. A
Secure firmware image will execute in Secure state. It may
allow the CPU to execute in Non-Secure (Normal) state.
Therefore, a Secure firmware image shall be able to
configure security attributions of CPU resources (memory
areas, peripherals, interrupts, etc.) as well as to handle
faults, related to security violations. It may optionally
allow certain functions to be called from the Non-Secure
(Normal) domain.
config TRUSTED_EXECUTION_NONSECURE
depends on !TRUSTED_EXECUTION_SECURE
bool "Trusted Execution: Non-Secure firmware image"
help
Select this option to enable building a Non-Secure
firmware image for a platform that supports Trusted
Execution. A Non-Secure firmware image will execute
in Non-Secure (Normal) state. Therefore, it shall not
access CPU resources (memory areas, peripherals,
interrupts etc.) belonging to the Secure domain.
endif # ARCH_HAS_TRUSTED_EXECUTION
config HW_STACK_PROTECTION
bool "Hardware Stack Protection"
depends on ARCH_HAS_STACK_PROTECTION
help
Select this option to enable hardware-based platform features to
catch stack overflows when the system is running in privileged
mode. If CONFIG_USERSPACE is not enabled, the system is always
running in privileged mode.
Note that this does not necessarily prevent corruption and assertions
about the overall system state when a fault is triggered cannot be
made.
config USERSPACE
bool "User mode threads"
depends on ARCH_HAS_USERSPACE
depends on RUNTIME_ERROR_CHECKS
depends on SRAM_REGION_PERMISSIONS
select THREAD_STACK_INFO
help
When enabled, threads may be created or dropped down to user mode,
which has significantly restricted permissions and must interact
with the kernel via system calls. See Zephyr documentation for more
details about this feature.
If a user thread overflows its stack, this will be caught and the
kernel itself will be shielded from harm. Enabling this option
may or may not catch stack overflows when the system is in
privileged mode or handling a system call; to ensure these are always
caught, enable CONFIG_HW_STACK_PROTECTION.
config PRIVILEGED_STACK_SIZE
int "Size of privileged stack"
default 1024
depends on ARCH_HAS_USERSPACE
help
This option sets the privileged stack region size that will be used
in addition to the user mode thread stack. During normal execution,
this region will be inaccessible from user mode. During system calls,
this region will be utilized by the system call. This value must be
a multiple of the minimum stack alignment.
config KOBJECT_TEXT_AREA
int "Size of kobject text area"
default 512 if COVERAGE_GCOV
default 512 if NO_OPTIMIZATIONS
default 512 if STACK_CANARIES && RISCV
default 256
depends on ARCH_HAS_USERSPACE
help
Size of kernel object text area. Used in linker script.
config KOBJECT_DATA_AREA_RESERVE_EXTRA_PERCENT
int "Reserve extra kobject data area (in percentage)"
default 100
depends on ARCH_HAS_USERSPACE
help
Multiplication factor used to calculate the size of placeholder to
reserve space for kobject metadata hash table. The hash table is
generated via gperf is highly dependent on the absolute addresses of
kobjects which might change between prebuilts. To reserve enough
space for the hash table during final linking passes to keep
kobjects in same place, the size of reserved space is calculated
from the first prebuilt plus additional space calculated with
this percentage (of the kobject data area in first prebuilt).
config KOBJECT_RODATA_AREA_EXTRA_BYTES
int "Reserve extra bytes for kobject rodata area"
default 16
depends on ARCH_HAS_USERSPACE
help
Reserve a few more bytes for the RODATA region for kobject metadata.
This is to account for the uncertainty of tables generated by gperf.
config GEN_PRIV_STACKS
bool
help
Selected if the architecture requires that privilege elevation stacks
be allocated in a separate memory area. This is typical of arches
whose MPUs require regions to be power-of-two aligned/sized.
FIXME: This should be removed and replaced with checks against
CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT, but both ARM and ARC
changes will be necessary for this.
config STACK_GROWS_UP
bool "Stack grows towards higher memory addresses"
help
Select this option if the architecture has upward growing thread
stacks. This is not common.
config NO_UNUSED_STACK_INSPECTION
bool
help
Selected if the architecture will generate a fault if unused stack
memory is examined, which is the region between the current stack
pointer and the deepest available address in the current stack
region.
config MAX_THREAD_BYTES
int "Bytes to use when tracking object thread permissions"
default 2
depends on USERSPACE
help
Every kernel object will have an associated bitfield to store
thread permissions for that object. This controls the size of the
bitfield (in bytes) and imposes a limit on how many threads can
be created in the system.
config DYNAMIC_OBJECTS
bool "Allow kernel objects to be allocated at runtime"
depends on USERSPACE
help
Enabling this option allows for kernel objects to be requested from
the calling thread's resource pool, at a slight cost in performance
due to the supplemental run-time tables required to validate such
objects.
Objects allocated in this way can be freed with a supervisor-only
API call, or when the number of references to that object drops to
zero.
config NOCACHE_MEMORY
bool "Support for uncached memory"
depends on ARCH_HAS_NOCACHE_MEMORY_SUPPORT
help
Add a "nocache" read-write memory section that is configured to
not be cached. This memory section can be used to perform DMA
transfers when cache coherence issues are not optimal or can not
be solved using cache maintenance operations.
menu "Interrupt Configuration"
config DYNAMIC_INTERRUPTS
bool "Enable installation of IRQs at runtime"
help
Enable installation of interrupts at runtime, which will move some
interrupt-related data structures to RAM instead of ROM, and
on some architectures increase code size.
#
# Interrupt related configs
#
config GEN_ISR_TABLES
bool "Use generated IRQ tables"
bool
prompt "Use generated IRQ tables"
default n
help
This option controls whether a platform uses the gen_isr_tables
script to generate its interrupt tables. This mechanism will create
an appropriate hardware vector table and/or software IRQ table.
This option controls whether a platform uses the gen_isr_tables
script to generate its interrupt tables. This mechanism will create
an appropriate hardware vector table and/or software IRQ table.
config GEN_IRQ_VECTOR_TABLE
bool "Generate an interrupt vector table"
bool
prompt "Generate an interrupt vector table"
default y
depends on GEN_ISR_TABLES
help
This option controls whether a platform using gen_isr_tables
needs an interrupt vector table created. Only disable this if the
platform does not use a vector table at all, or requires the vector
table to be in a format that is not an array of function pointers
indexed by IRQ line. In the latter case, the vector table must be
supplied by the application or architecture code.
This option controls whether a platform using gen_isr_tables
needs an interrupt vector table created. Only disable this if the
platform does not use a vector table at all, or requires the vector
table to be in a format that is not an array of function pointers
indexed by IRQ line. In the latter case, the vector table must be
supplied by the application or architecture code.
config GEN_SW_ISR_TABLE
bool "Generate a software ISR table"
bool
prompt "Generate a software ISR table"
default y
depends on GEN_ISR_TABLES
help
This option controls whether a platform using gen_isr_tables
needs a software ISR table table created. This is an array of struct
_isr_table_entry containing the interrupt service routine and supplied
parameter.
config ARCH_SW_ISR_TABLE_ALIGN
int "Alignment size of a software ISR table"
default 0
depends on GEN_SW_ISR_TABLE
help
This option controls alignment size of generated
_sw_isr_table. Some architecture needs a software ISR table
to be aligned to architecture specific size. The default
size is 0 for no alignment.
This option controls whether a platform using gen_isr_tables
needs a software ISR table table created. This is an array of struct
_isr_table_entry containing the interrupt service routine and supplied
parameter.
config GEN_IRQ_START_VECTOR
int
default 0
depends on GEN_ISR_TABLES
help
On some architectures, part of the vector table may be reserved for
system exceptions and is declared separately from the tables
created by gen_isr_tables.py. When creating these tables, this value
will be subtracted from CONFIG_NUM_IRQS to properly size them.
This is a hidden option which needs to be set per architecture and
left alone.
On some architectures, part of the vector table may be reserved for
system exceptions and is declared separately from the tables
created by gen_isr_tables.py. When creating these tables, this value
will be subtracted from CONFIG_NUM_IRQS to properly size them.
This is a hidden option which needs to be set per architecture and
left alone.
config IRQ_OFFLOAD
bool "Enable IRQ offload"
depends on TEST
help
Enable irq_offload() API which allows functions to be synchronously
run in interrupt context. Only useful for test cases that need
to validate the correctness of kernel objects in IRQ context.
source "arch/*/Kconfig"
config EXTRA_EXCEPTION_INFO
bool "Collect extra exception info"
depends on ARCH_HAS_EXTRA_EXCEPTION_INFO
help
This option enables the collection of extra information, such as
register state, when a fault occurs. This information can be useful
to collect for post-mortem analysis and debug of issues.
endmenu # Interrupt configuration
config INIT_ARCH_HW_AT_BOOT
bool "Initialize internal architecture state at boot"
depends on ARCH_SUPPORTS_ARCH_HW_INIT
help
This option instructs Zephyr to force the initialization
of the internal architectural state (for example ARCH-level
HW registers and system control blocks) during boot to
the reset values as specified by the corresponding
architecture manual. The option is useful when the Zephyr
firmware image is chain-loaded, for example, by a debugger
or a bootloader, and we need to guarantee that the internal
states of the architecture core blocks are restored to the
reset values (as specified by the architecture).
Note: the functionality is architecture-specific. For the
implementation details refer to each architecture where
this feature is supported.
endmenu
#
# Architecture Capabilities
#
config ARCH_HAS_SINGLE_THREAD_SUPPORT
bool
config ARCH_HAS_TIMING_FUNCTIONS
bool
config ARCH_HAS_TRUSTED_EXECUTION
bool
config ARCH_HAS_STACK_PROTECTION
bool
config ARCH_HAS_USERSPACE
bool
config ARCH_HAS_EXECUTABLE_PAGE_BIT
bool
config ARCH_HAS_NOCACHE_MEMORY_SUPPORT
bool
config ARCH_HAS_RAMFUNC_SUPPORT
bool
config ARCH_HAS_NESTED_EXCEPTION_DETECTION
bool
config ARCH_SUPPORTS_COREDUMP
bool
config ARCH_SUPPORTS_ARCH_HW_INIT
bool
config ARCH_HAS_EXTRA_EXCEPTION_INFO
bool
config ARCH_HAS_GDBSTUB
bool
config ARCH_HAS_COHERENCE
bool
help
When selected, the architecture supports the
arch_mem_coherent() API and can link into incoherent/cached
memory using the ".cached" linker section.
config ARCH_HAS_THREAD_LOCAL_STORAGE
bool
#
# Other architecture related options
#
config ARCH_HAS_THREAD_ABORT
bool
#
# Hidden CPU family configs
#
config CPU_HAS_TEE
bool
help
This option is enabled when the CPU has support for Trusted
Execution Environment (e.g. when it has a security attribution
unit).
config CPU_HAS_DCLS
bool
help
This option is enabled when the processor hardware is configured in
Dual-redundant Core Lock-step (DCLS) topology.
config CPU_HAS_FPU
bool
help
This option is enabled when the CPU has hardware floating point
unit.
config CPU_HAS_FPU_DOUBLE_PRECISION
bool
select CPU_HAS_FPU
help
When enabled, this indicates that the CPU has a double floating point
precision unit.
config CPU_HAS_MPU
bool
help
This option is enabled when the CPU has a Memory Protection Unit (MPU).
config CPU_HAS_MMU
bool
help
This hidden option is selected when the CPU has a Memory Management Unit
(MMU).
config ARCH_HAS_DEMAND_PAGING
bool
help
This hidden configuration should be selected by the architecture if
demand paging is supported.
config ARCH_HAS_RESERVED_PAGE_FRAMES
bool
help
This hidden configuration should be selected by the architecture if
certain RAM page frames need to be marked as reserved and never used for
memory mappings. The architecture will need to implement
arch_reserved_pages_update().
config ARCH_MAPS_ALL_RAM
bool
help
This hidden option is selected by the architecture to inform the kernel
that all RAM is mapped at boot, and not just the bounds of the Zephyr image.
If RAM starts at 0x0, the first page must remain un-mapped to catch NULL
pointer dereferences. With this enabled, the kernel will not assume that
virtual memory addresses past the kernel image are available for mappings,
but instead takes into account an entire RAM mapping instead.
This is typically set by architectures which need direct access to all memory.
It is the architecture's responsibility to mark reserved memory regions
as such in arch_reserved_pages_update().
Although the kernel will not disturb this RAM mapping by re-mapping the associated
virtual addresses elsewhere, this is limited to only management of the
virtual address space. The kernel's page frame ontology will not consider
this mapping at all; non-kernel pages will be considered free (unless marked
as reserved) and Z_PAGE_FRAME_MAPPED will not be set.
menuconfig MPU
bool "Enable MPU features"
depends on CPU_HAS_MPU
help
This option, when enabled, indicates to the core kernel that an MPU
is enabled.
if MPU
config MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT
bool
help
This option is enabled when the MPU requires a power of two alignment
and size for MPU regions.
config MPU_REQUIRES_NON_OVERLAPPING_REGIONS
bool
help
This option is enabled when the MPU requires the active (i.e. enabled)
MPU regions to be non-overlapping with each other.
config MPU_GAP_FILLING
bool "Force MPU to be filling in background memory regions"
depends on MPU_REQUIRES_NON_OVERLAPPING_REGIONS
default y if !USERSPACE
help
This Kconfig option instructs the MPU driver to enforce
a full kernel SRAM partitioning, when it programs the
dynamic MPU regions (user thread stack, PRIV stack guard
and application memory domains) during context-switch. We
allow this to be a configurable option, in order to be able
to switch the option off and have an increased number of MPU
regions available for application memory domain programming.
Notes:
An increased number of MPU regions should only be required,
when building with USERSPACE support. As a result, when we
build without USERSPACE support, gap filling should always
be required.
When the option is switched off, access to memory areas not
covered by explicit MPU regions is restricted to privileged
code on an ARCH-specific basis. Refer to ARCH-specific
documentation for more information on how this option is
used.
endif # MPU
config SRAM_REGION_PERMISSIONS
bool "Assign appropriate permissions to kernel areas in SRAM"
depends on MMU || MPU
default y
help
This option indicates that memory protection hardware
is present, enabled, and regions have been configured at boot for memory
ranges within the kernel image.
If this option is turned on, certain areas of the kernel image will
have the following access policies applied for all threads, including
supervisor threads:
1) All program text will be have read-only, execute memory permission
2) All read-only data will have read-only permission, and execution
disabled if the hardware supports it.
3) All other RAM addresses will have read-write permission, and
execution disabled if the hardware supports it.
Options such as USERSPACE or HW_STACK_PROTECTION may additionally
impose additional policies on the memory map, which may be global
or local to the current running thread.
This option may consume additional memory to satisfy memory protection
hardware alignment constraints.
If this option is disabled, the entire kernel will have default memory
access permissions set, typically read/write/execute. It may be desirable
to turn this off on MMU systems which are using the MMU for demand
paging, do not need memory protection, and would rather not use up
RAM for the alignment between regions.
menu "Floating Point Options"
config FPU
bool "Enable floating point unit (FPU)"
depends on CPU_HAS_FPU
help
This option enables the hardware Floating Point Unit (FPU), in order to
support using the floating point registers and instructions.
When this option is enabled, by default, threads may use the floating
point registers only in an exclusive manner, and this usually means that
only one thread may perform floating point operations.
If it is necessary for multiple threads to perform concurrent floating
point operations, the "FPU register sharing" option must be enabled to
preserve the floating point registers across context switches.
Note that this option cannot be selected for the platforms that do not
include a hardware floating point unit; the floating point support for
those platforms is dependent on the availability of the toolchain-
provided software floating point library.
config FPU_SHARING
bool "FPU register sharing"
depends on FPU && MULTITHREADING
help
This option enables preservation of the hardware floating point registers
across context switches to allow multiple threads to perform concurrent
floating point operations.
Note that some compiler configurations may activate a floating point
context by generating FP instructions for any thread, and that
context must be preserved when switching such threads in and out.
The developers can still disable the FP sharing mode in their
application projects, and switch to Unshared FP registers mode,
if it is guaranteed that the image code does not generate FP
instructions outside the single thread context that is allowed
to do so.
endmenu
menu "Cache Options"
config CACHE_MANAGEMENT
bool "Enable cache management features"
help
This links in the cache management functions (for d-cache and i-cache
where possible).
config DCACHE_LINE_SIZE_DETECT
bool "Detect d-cache line size at runtime"
depends on CACHE_MANAGEMENT
help
This option enables querying some architecture-specific hardware for
finding the d-cache line size at the expense of taking more memory and
code and a slightly increased boot time.
If the CPU's d-cache line size is known in advance, disable this option and
manually enter the value for DCACHE_LINE_SIZE or set it in the DT
using the 'd-cache-line-size' property.
config DCACHE_LINE_SIZE
int "d-cache line size" if !DCACHE_LINE_SIZE_DETECT
depends on CACHE_MANAGEMENT
default 0
help
Size in bytes of a CPU d-cache line. If this is set to 0 the value is
obtained from the 'd-cache-line-size' DT property instead if present.
Detect automatically at runtime by selecting DCACHE_LINE_SIZE_DETECT.
config ICACHE_LINE_SIZE_DETECT
bool "Detect i-cache line size at runtime"
depends on CACHE_MANAGEMENT
help
This option enables querying some architecture-specific hardware for
finding the i-cache line size at the expense of taking more memory and
code and a slightly increased boot time.
If the CPU's i-cache line size is known in advance, disable this option and
manually enter the value for ICACHE_LINE_SIZE or set it in the DT
using the 'i-cache-line-size' property.
config ICACHE_LINE_SIZE
int "i-cache line size" if !ICACHE_LINE_SIZE_DETECT
depends on CACHE_MANAGEMENT
default 0
help
Size in bytes of a CPU i-cache line. If this is set to 0 the value is
obtained from the 'i-cache-line-size' DT property instead if present.
Detect automatically at runtime by selecting ICACHE_LINE_SIZE_DETECT.
choice CACHE_TYPE
prompt "Cache type"
depends on CACHE_MANAGEMENT
default HAS_ARCH_CACHE
config HAS_ARCH_CACHE
bool "Integrated cache controller"
help
"Integrade on-core cache controller"
config HAS_EXTERNAL_CACHE
bool "External cache controller"
help
"External cache controller or cache management system"
endchoice
endmenu
config ARCH
string
help
System architecture string.
config SOC
string
help
SoC name which can be found under soc/<arch>/<soc name>.
This option holds the directory name used by the build system to locate
the correct linker and header files for the SoC.
config SOC_SERIES
string
help
SoC series name which can be found under soc/<arch>/<family>/<series>.
This option holds the directory name used by the build system to locate
the correct linker and header files.
config SOC_FAMILY
string
help
SoC family name which can be found under soc/<arch>/<family>.
This option holds the directory name used by the build system to locate
the correct linker and header files.
config BOARD
string
help
This option holds the name of the board and is used to locate the files
related to the board in the source tree (under boards/).
The Board is the first location where we search for a linker.ld file,
if not found we look for the linker file in
soc/<arch>/<family>/<series>
config TOOLCHAIN_HAS_BUILTIN_FFS
bool
default y if !(64BIT && RISCV)
help
Hidden option to signal that toolchain has __builtin_ffs*().
source "boards/Kconfig"

1
arch/Makefile Normal file
View File

@@ -0,0 +1 @@
obj-y += common/ $(ARCH)/

View File

@@ -1,26 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
# Enable debug support in mdb
# Dwarf version 2 can be recognized by mdb
# The default dwarf version in gdb is not recognized by mdb
zephyr_cc_option(-g3 -gdwarf-2)
# Without this (poorly named) option, compiler may generate undefined
# references to abort().
# See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63691
zephyr_cc_option(-fno-delete-null-pointer-checks)
zephyr_cc_option_ifdef(CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS -munaligned-access)
if(CONFIG_ISA_ARCV2)
# Instruct compiler to use register R26 as thread pointer
# for thread local storage.
# For ARCv3 the register is fixed to r30, so we don't need to specify it
zephyr_cc_option_ifdef(CONFIG_THREAD_LOCAL_STORAGE -mtp-regno=26)
endif()
add_subdirectory(core)
if(COMPILER STREQUAL arcmwdt)
add_subdirectory(arcmwdt)
endif()

6
arch/arc/Kbuild Normal file
View File

@@ -0,0 +1,6 @@
subdir-ccflags-y +=-I$(srctree)/include/drivers
subdir-ccflags-y +=-I$(srctree)/drivers
subdir-asflags-y += $(subdir-ccflags-y)
obj-y += soc/$(SOC_PATH)/
obj-y += core/

View File

@@ -1,7 +1,18 @@
# ARC options
# ARC EM4 options
# Copyright (c) 2014, 2019 Wind River Systems, Inc.
#
# Copyright (c) 2014 Wind River Systems, Inc.
#
# SPDX-License-Identifier: Apache-2.0
#
choice
prompt "ARC SoC Selection"
depends on ARC
source "arch/arc/soc/*/Kconfig.soc"
endchoice
menu "ARC Options"
depends on ARC
@@ -9,112 +20,56 @@ menu "ARC Options"
config ARCH
default "arc"
config ARCH_DEFCONFIG
string
default "arch/arc/defconfig"
config CPU_ARCEM
config CPU_HAS_MPU
bool
# Omit prompt to signify "hidden" option
default n
help
This option is enabled when the CPU has a Memory Protection Unit (MPU).
config CPU_HAS_FPU
# Hidden config selected by CPU family
bool
default n
help
This option is enabled when the CPU has hardware floating point
unit.
menu "ARC EM4 processor options"
config CPU_ARCEM4
bool
default y
select CPU_ARCV2
select ATOMIC_OPERATIONS_C
help
This option signifies the use of an ARC EM CPU
This option signifies the use of an ARC EM4 CPU
config CPU_ARCHS
endmenu
menu "ARCv2 Family Options"
config CPU_ARCV2
bool
select ATOMIC_OPERATIONS_BUILTIN
help
This option signifies the use of an ARC HS CPU
choice
prompt "ARC Instruction Set"
default ISA_ARCV2
config ISA_ARCV2
bool "ARC ISA v2"
select ARCH_HAS_STACK_PROTECTION if ARC_HAS_STACK_CHECKING || (ARC_MPU && ARC_MPU_VER !=2)
select ARCH_HAS_USERSPACE if ARC_MPU
select USE_SWITCH
select USE_SWITCH_SUPPORTED
help
v2 ISA for the ARC-HS & ARC-EM cores
config ISA_ARCV3
bool "ARC ISA v3"
select USE_SWITCH
select USE_SWITCH_SUPPORTED
endchoice
if ISA_ARCV2
config CPU_EM4
bool
select CPU_ARCEM
help
If y, the SoC uses an ARC EM4 CPU
config CPU_EM4_DMIPS
bool
select CPU_ARCEM
help
If y, the SoC uses an ARC EM4 DMIPS CPU
config CPU_EM4_FPUS
bool
select CPU_ARCEM
help
If y, the SoC uses an ARC EM4 DMIPS CPU with the single-precision
floating-point extension
config CPU_EM4_FPUDA
bool
select CPU_ARCEM
help
If y, the SoC uses an ARC EM4 DMIPS CPU with single-precision
floating-point and double assist instructions
config CPU_EM6
bool
select CPU_ARCEM
help
If y, the SoC uses an ARC EM6 CPU
config CPU_HS3X
bool
select CPU_ARCHS
help
If y, the SoC uses an ARC HS3x or HS4x CPU
endif #ISA_ARCV2
if ISA_ARCV3
config CPU_HS6X
bool
select CPU_ARCHS
select 64BIT
help
If y, the SoC uses an ARC HS6x CPU
endif #ISA_ARCV3
config FP_FPU_DA
bool
menu "ARC CPU Options"
config ARC_HAS_ZOL
bool
depends on ISA_ARCV2
default y
help
ARCv2 CPUs have ZOL hardware loop mechanism which the ARCv3 ISA drops.
Architecturally ZOL provides
- LPcc instruction
- LP_COUNT core reg
- LP_START, LP_END aux regs
Disabling this option removes usage of ZOL regs from code
This option signifies the use of a CPU of the ARCv2 family.
config NUM_IRQ_PRIO_LEVELS
int "Number of supported interrupt priority levels"
config DATA_ENDIANNESS_LITTLE
bool
default y
help
This is driven by the processor implementation, since it is fixed in
hardware. The BSP should set this value to 'n' if the data is
implemented as big endian.
config NUM_IRQ_PRIO_LEVELS
int
prompt "Number of supported interrupt priority levels"
range 1 16
help
Interrupt priorities available will be 0 to NUM_IRQ_PRIO_LEVELS-1.
@@ -122,8 +77,9 @@ config NUM_IRQ_PRIO_LEVELS
The BSP must provide a valid default for proper operation.
config NUM_IRQS
int "Upper limit of interrupt numbers/IDs used"
config NUM_IRQS
int
prompt "Upper limit of interrupt numbers/IDs used"
range 17 256
help
Interrupts available will be 0 to NUM_IRQS-1.
@@ -133,115 +89,65 @@ config NUM_IRQS
The BSP must provide a valid default. This drives the size of the
vector table.
config RGF_NUM_BANKS
int "Number of General Purpose Register Banks"
depends on ARC_FIRQ
depends on NUM_IRQ_PRIO_LEVELS > 1
config RGF_NUM_BANKS
int
prompt "Number of General Purpose Register Banks"
depends on CPU_ARCV2
range 1 2
default 2
help
The ARC CPU can be configured to have more than one register
bank. If fast interrupts are supported (FIRQ), the 2nd
register bank, in the set, will be used by FIRQ interrupts.
If fast interrupts are supported but there is only 1
register bank, the fast interrupt handler must save
and restore general purpose registers.
NOTE: it's required to have more than one interrupt priority level
to use second register bank - otherwise all interrupts will use
same register bank. Such configuration isn't supported in software
and it is not beneficial from the performance point of view.
The ARC CPU can be configured to have more than one register
bank. If fast interrupts are supported (FIRQ), the 2nd
register bank, in the set, will be used by FIRQ interrupts.
If fast interrupts are supported but there is only 1
register bank, the fast interrupt handler must save
and restore general purpose registers.
config ARC_FIRQ
bool "FIRQ enable"
depends on ISA_ARCV2
depends on NUM_IRQ_PRIO_LEVELS > 1
default y
help
Fast interrupts are supported (FIRQ). If FIRQ enabled, for interrupts
with highest priority, status32 and pc will be saved in aux regs,
other regs will be saved according to the number of register bank;
If FIRQ is disabled, the handle of interrupts with highest priority
will be same with other interrupts.
NOTE: we don't allow the configuration with FIRQ enabled and only one
interrupt priority level (so all interrupts are FIRQ). Such
configuration isn't supported in software and it is not beneficial
from the performance point of view.
config ARC_FIRQ_STACK
bool "Enable separate firq stack"
depends on ARC_FIRQ && RGF_NUM_BANKS > 1
help
Use separate stack for FIRQ handing. When the fast irq is also a direct
irq, this will get the minimal interrupt latency.
config ARC_FIRQ_STACK_SIZE
int "FIRQ stack size"
depends on ARC_FIRQ_STACK
config FIRQ_STACK_SIZE
int
prompt "Size of stack for FIRQs (in bytes)"
depends on CPU_ARCV2
default 1024
help
The size of firq stack.
FIRQs and regular IRQs have different stacks so that a FIRQ can start
running without doing stack switching in software.
config ARC_HAS_STACK_CHECKING
bool "ARC has STACK_CHECKING"
depends on ISA_ARCV2
default y
help
ARC is configured with STACK_CHECKING which is a mechanism for
checking stack accesses and raising an exception when a stack
overflow or underflow is detected.
config ARC_CONNECT
bool "ARC has ARC connect"
select SCHED_IPI_SUPPORTED
help
ARC is configured with ARC CONNECT which is a hardware for connecting
multi cores.
config ARC_STACK_CHECKING
bool
select NO_UNUSED_STACK_INSPECTION
help
Use ARC STACK_CHECKING to do stack protection
config ARC_STACK_PROTECTION
bool
default y if HW_STACK_PROTECTION
select ARC_STACK_CHECKING if ARC_HAS_STACK_CHECKING
select MPU_STACK_GUARD if (!ARC_STACK_CHECKING && ARC_MPU && ARC_MPU_VER !=2)
config ARC_STACK_CHECKING
bool "Enable Stack Checking"
depends on CPU_ARCV2
select THREAD_STACK_INFO
default n
help
This option enables either:
- The ARC stack checking, or
- the MPU-based stack guard
to cause a system fatal error
if the bounds of the current process stack are overflowed.
The two stack guard options are mutually exclusive. The
selection of the ARC stack checking is
prioritized over the MPU-based stack guard.
ARCV2 has a special feature allowing to check stack overflows. This
enables code that allows using this debug feature
config ARC_USE_UNALIGNED_MEM_ACCESS
bool "Enable unaligned access in HW"
default y if CPU_ARCHS
depends on (CPU_ARCEM && !ARC_HAS_SECURE) || CPU_ARCHS
help
ARC EM cores w/o secure shield 2+2 mode support might be configured
to support unaligned memory access which is then disabled by default.
Enable unaligned access in hardware and make software to use it.
config FAULT_DUMP
int "Fault dump level"
config FAULT_DUMP
int
prompt "Fault dump level"
default 2
range 0 2
help
Different levels for display information when a fault occurs.
Different levels for display information when a fault occurs.
2: The default. Display specific and verbose information. Consumes
2: The default. Display specific and verbose information. Consumes
the most memory (long strings).
1: Display general and short information. Consumes less memory
1: Display general and short information. Consumes less memory
(short strings).
0: Off.
0: Off.
config IRQ_OFFLOAD
bool "Enable IRQ offload"
default n
help
Enable irq_offload() API which allows functions to be synchronously
run in interrupt context. Uses one entry in the IDT. Mainly useful
for test cases.
config XIP
default n if NSIM
default y
config GEN_ISR_TABLES
default y
@@ -250,139 +156,138 @@ config GEN_IRQ_START_VECTOR
default 16
config HARVARD
bool "Harvard Architecture"
prompt "Harvard Architecture"
bool
default n
help
The ARC CPU can be configured to have two busses;
one for instruction fetching and another that serves as a data bus.
The ARC CPU can be configured to have two busses;
one for instruction fetching and another that serves as a data bus.
config CODE_DENSITY
bool "Code Density Option"
help
Enable code density option to get better code density
config ARC_HAS_ACCL_REGS
bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6)"
default y if CPU_HS3X
help
Depending on the configuration, CPU can contain accumulator reg-pair
(also referred to as r58:r59). These can also be used by gcc as GPR so
kernel needs to save/restore per process
config ARC_HAS_SECURE
bool "ARC has SecureShield"
depends on ISA_ARCV2
select CPU_HAS_TEE
select ARCH_HAS_TRUSTED_EXECUTION
help
This option is enabled when ARC core supports secure mode
config SJLI_TABLE_SIZE
int "SJLI table size"
depends on ARC_SECURE_FIRMWARE
default 8
help
The size of sjli (Secure Jump and Link Indexed) table. The
code in normal mode call secure services in secure mode through
sjli instruction.
config ARC_SECURE_FIRMWARE
bool "Generate Secure Firmware"
depends on ARC_HAS_SECURE
default y if TRUSTED_EXECUTION_SECURE
help
This option indicates that we are building a Zephyr image that
is intended to execute in secure mode. The option is only
applicable to ARC processors that implement the SecureShield.
This option enables Zephyr to include code that executes in
secure mode, as well as to exclude code that is designed to
execute only in normal mode.
Code executing in secure mode has access to both the secure
and normal resources of the ARC processors.
config ARC_NORMAL_FIRMWARE
bool "Generate Normal Firmware"
depends on !ARC_SECURE_FIRMWARE
depends on ARC_HAS_SECURE
default y if TRUSTED_EXECUTION_NONSECURE
help
This option indicates that we are building a Zephyr image that
is intended to execute in normal mode. Execution of this
image is triggered by secure firmware that executes in secure
mode. The option is only applicable to ARC processors that
implement the SecureShield.
This option enables Zephyr to include code that executes in
normal mode only, as well as to exclude code that is
designed to execute only in secure mode.
Code executing in normal mode has no access to secure
resources of the ARC processors, and, therefore, it shall avoid
accessing them.
menu "ARC MPU Options"
depends on CPU_HAS_MPU
config ARC_MPU_ENABLE
bool "Enable MPU"
select ARC_MPU
help
Enable MPU
source "arch/arc/core/mpu/Kconfig"
endmenu
config DCACHE_LINE_SIZE
default 32
config ARC_EXCEPTION_STACK_SIZE
int "ARC exception handling stack size"
default 768 if !64BIT
default 2048 if 64BIT
help
Size in bytes of exception handling stack which is at the top of
interrupt stack to get smaller memory footprint because exception
is not frequent. To reduce the impact on interrupt handling,
especially nested interrupt, it cannot be too large.
endmenu
config ARC_EXCEPTION_DEBUG
bool "Unhandled exception debugging information"
prompt "Code Density Option"
bool
default n
depends on PRINTK || LOG
help
Print human-readable information about exception vectors, cause codes,
and parameters, at a cost of code/data size for the human-readable
strings.
Enbale code density option to get better code desntiy
menu "Floating Point Options"
depends on CPU_HAS_FPU
config FLOAT
bool
prompt "Floating point registers"
default n
help
This option allows tasks and fibers to use the floating point registers.
By default, only a single task or fiber may use the registers.
Disabling this option means that any task or fiber that uses a
floating point register will get a fatal exception.
config FP_SHARING
bool
prompt "Floating point register sharing"
depends on FLOAT
default n
help
This option allows multiple tasks and fibers to use the floating point
registers.
endmenu
config MAIN_STACK_SIZE
default 4096 if 64BIT
config ICCM_SIZE
int "ICCM Size in kB"
help
This option specifies the size of the ICCM in kB. It is normally set by
the board's defconfig file and the user should generally avoid modifying
it via the menu configuration.
config ISR_STACK_SIZE
default 4096 if 64BIT
config ICCM_BASE_ADDRESS
hex "ICCM Base Address"
help
This option specifies the base address of the ICCM on the board. It is
normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration.
config SYSTEM_WORKQUEUE_STACK_SIZE
default 4096 if 64BIT
config DCCM_SIZE
int "DCCM Size in kB"
help
This option specifies the size of the DCCM in kB. It is normally set by
the board's defconfig file and the user should generally avoid modifying
it via the menu configuration.
config IDLE_STACK_SIZE
default 1024 if 64BIT
config DCCM_BASE_ADDRESS
hex "DCCM Base Address"
help
This option specifies the base address of the DCCM on the board. It is
normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration.
config IPM_CONSOLE_STACK_SIZE
default 2048 if 64BIT
config SRAM_SIZE
int "SRAM Size in kB"
help
This option specifies the size of the SRAM in kB. It is normally set by
the board's defconfig file and the user should generally avoid modifying
it via the menu configuration.
config TEST_EXTRA_STACKSIZE
default 2048 if 64BIT
config SRAM_BASE_ADDRESS
hex "SRAM Base Address"
help
This option specifies the base address of the SRAM on the board. It is
normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration.
config CMSIS_THREAD_MAX_STACK_SIZE
default 2048 if 64BIT
config FLASH_SIZE
int "Flash Size in kB"
help
This option specifies the size of the flash in kB. It is normally set by
the board's defconfig file and the user should generally avoid modifying
it via the menu configuration.
config CMSIS_V2_THREAD_MAX_STACK_SIZE
default 2048 if 64BIT
config FLASH_BASE_ADDRESS
hex "Flash Base Address"
help
This option specifies the base address of the flash on the board. It is
normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration.
config CMSIS_V2_THREAD_DYNAMIC_STACK_SIZE
default 2048 if 64BIT
config CACHE_LINE_SIZE_DETECT
bool
prompt "Detect d-cache line size at runtime"
default n
help
This option enables querying the d-cache build register for finding
the d-cache line size at the expense of taking more memory and code
and a slightly increased boot time.
If the CPU's d-cache line size is known in advance, disable this
option and manually enter the value for CACHE_LINE_SIZE.
config CACHE_LINE_SIZE
int
prompt "Cache line size" if !CACHE_LINE_SIZE_DETECT
default 32
help
Size in bytes of a CPU d-cache line.
Detect automatically at runtime by selecting CACHE_LINE_SIZE_DETECT.
config ARCH_CACHE_FLUSH_DETECT
bool
default n
config CACHE_FLUSHING
bool
default n
prompt "Enable d-cache flushing mechanism"
help
This links in the sys_cache_flush() function, which provides a
way to flush multiple lines of the d-cache.
If the d-cache is present, set this to y.
If the d-cache is NOT present, set this to n.
endmenu
source "arch/arc/soc/*/Kconfig"
endmenu

24
arch/arc/Makefile Normal file
View File

@@ -0,0 +1,24 @@
# Enable debug support in mdb
# Dwarf version 2 can be recognized by mdb
# The default dwarf version in gdb is not recognized by mdb
cflags-y += $(call cc-option, -g3 -gdwarf-2)
cflags-y += $(call cc-option,-ffunction-sections,) $(call cc-option,-fdata-sections,)
# Without this (poorly named) option, compiler may generate undefined
# references to abort().
# See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63691
cflags-y += $(call cc-option,-fno-delete-null-pointer-checks)
cflags-$(CONFIG_LTO) = $(call cc-option,-flto,)
include $(srctree)/arch/$(ARCH)/soc/$(SOC_PATH)/Makefile
KBUILD_CFLAGS += $(cflags-y)
KBUILD_CXXFLAGS += $(cflags-y)
soc-cxxflags ?= $(soc-cflags)
soc-aflags ?= $(soc-cflags)
KBUILD_CFLAGS += $(soc-cflags)
KBUILD_CXXFLAGS += $(soc-cxxflags)
KBUILD_AFLAGS += $(soc-aflags)

View File

@@ -1,5 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
if(CONFIG_ARCMWDT_LIBC OR CONFIG_CPLUSPLUS)
zephyr_sources(arcmwdt-dtr-stubs.c)
endif()

View File

@@ -1,22 +0,0 @@
/*
* Copyright (c) 2021 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <toolchain.h>
__weak void *__dso_handle;
int __cxa_atexit(void (*destructor)(void *), void *objptr, void *dso)
{
ARG_UNUSED(destructor);
ARG_UNUSED(objptr);
ARG_UNUSED(dso);
return 0;
}
int atexit(void (*function)(void))
{
return 0;
}

View File

@@ -1,36 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
zephyr_library()
zephyr_library_sources(
thread.c
thread_entry_wrapper.S
cpu_idle.S
fatal.c
fault.c
fault_s.S
irq_manage.c
timestamp.c
isr_wrapper.S
regular_irq.S
switch.S
prep_c.c
reset.S
vector_table.c
)
zephyr_library_sources_ifdef(CONFIG_CACHE_MANAGEMENT cache.c)
zephyr_library_sources_ifdef(CONFIG_ARC_FIRQ fast_irq.S)
zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c)
zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)
zephyr_library_sources_ifdef(CONFIG_ARC_CONNECT arc_connect.c)
zephyr_library_sources_ifdef(CONFIG_ARC_CONNECT arc_smp.c)
zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c)
add_subdirectory_ifdef(CONFIG_ARC_CORE_MPU mpu)
add_subdirectory_ifdef(CONFIG_ARC_SECURE_FIRMWARE secureshield)
zephyr_linker_sources(ROM_START SORT_KEY 0x0vectors vector_table.ld)

18
arch/arc/core/Makefile Normal file
View File

@@ -0,0 +1,18 @@
ccflags-y += -I$(srctree)/kernel/include
ccflags-y +=-I$(srctree)/arch/$(ARCH)/include
obj-y += thread.o thread_entry_wrapper.o \
cpu_idle.o fast_irq.o fatal.o fault.o \
fault_s.o irq_manage.o cache.o timestamp.o \
isr_wrapper.o regular_irq.o swap.o \
sys_fatal_error_handler.o
obj-y += prep_c.o \
reset.o \
vector_table.o
obj-$(CONFIG_IRQ_OFFLOAD) += irq_offload.o
# Some ARC cores like the EM4 lack the atomic LLOCK/SCOND and
# can't use these.
obj-$(CONFIG_ATOMIC_OPERATIONS_CUSTOM) += atomic.o

View File

@@ -1,443 +0,0 @@
/*
* Copyright (c) 2019 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief ARCv2 ARC CONNECT driver
*
*/
#include <kernel.h>
#include <arch/cpu.h>
#include <spinlock.h>
#include <kernel_internal.h>
static struct k_spinlock arc_connect_spinlock;
/* Generate an inter-core interrupt to the target core */
void z_arc_connect_ici_generate(uint32_t core)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_GENERATE_IRQ, core);
}
}
/* Acknowledge the inter-core interrupt raised by core */
void z_arc_connect_ici_ack(uint32_t core)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_GENERATE_ACK, core);
}
}
/* Read inter-core interrupt status */
uint32_t z_arc_connect_ici_read_status(uint32_t core)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_READ_STATUS, core);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/* Check the source of inter-core interrupt */
uint32_t z_arc_connect_ici_check_src(void)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_CHECK_SOURCE, 0);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/* Clear the inter-core interrupt */
void z_arc_connect_ici_clear(void)
{
uint32_t cpu, c;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_CHECK_SOURCE, 0);
cpu = z_arc_connect_cmd_readback(); /* 1,2,4,8... */
/*
* In rare case, multiple concurrent ICIs sent to same target can
* possibly be coalesced by MCIP into 1 asserted IRQ, so @cpu can be
* "vectored" (multiple bits sets) as opposed to typical single bit
*/
while (cpu) {
c = find_lsb_set(cpu) - 1;
z_arc_connect_cmd(
ARC_CONNECT_CMD_INTRPT_GENERATE_ACK, c);
cpu &= ~(1U << c);
}
}
}
/* Reset the cores in core_mask */
void z_arc_connect_debug_reset(uint32_t core_mask)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_RESET,
0, core_mask);
}
}
/* Halt the cores in core_mask */
void z_arc_connect_debug_halt(uint32_t core_mask)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_HALT,
0, core_mask);
}
}
/* Run the cores in core_mask */
void z_arc_connect_debug_run(uint32_t core_mask)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_RUN,
0, core_mask);
}
}
/* Set core mask */
void z_arc_connect_debug_mask_set(uint32_t core_mask, uint32_t mask)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_SET_MASK,
mask, core_mask);
}
}
/* Read core mask */
uint32_t z_arc_connect_debug_mask_read(uint32_t core_mask)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_READ_MASK,
0, core_mask);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/*
* Select cores that should be halted if the core issuing the command is halted
*/
void z_arc_connect_debug_select_set(uint32_t core_mask)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_SET_SELECT,
0, core_mask);
}
}
/* Read the select value */
uint32_t z_arc_connect_debug_select_read(void)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_DEBUG_READ_SELECT, 0);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/* Read the status, halt or run of all cores in the system */
uint32_t z_arc_connect_debug_en_read(void)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_DEBUG_READ_EN, 0);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/* Read the last command sent */
uint32_t z_arc_connect_debug_cmd_read(void)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_DEBUG_READ_CMD, 0);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/* Read the value of internal MCD_CORE register */
uint32_t z_arc_connect_debug_core_read(void)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_DEBUG_READ_CORE, 0);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/* Clear global free running counter */
void z_arc_connect_gfrc_clear(void)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_CLEAR, 0);
}
}
/* Read total 64 bits of global free running counter */
uint64_t z_arc_connect_gfrc_read(void)
{
uint32_t low;
uint32_t high;
uint32_t key;
/*
* each core has its own arc connect interface, i.e.,
* CMD/READBACK. So several concurrent commands to ARC
* connect are of if they are trying to access different
* sub-components. For GFRC, HW allows simultaneously accessing to
* counters. So an irq lock is enough.
*/
key = arch_irq_lock();
z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_READ_LO, 0);
low = z_arc_connect_cmd_readback();
z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_READ_HI, 0);
high = z_arc_connect_cmd_readback();
arch_irq_unlock(key);
return (((uint64_t)high) << 32) | low;
}
/* Enable global free running counter */
void z_arc_connect_gfrc_enable(void)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_ENABLE, 0);
}
}
/* Disable global free running counter */
void z_arc_connect_gfrc_disable(void)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_DISABLE, 0);
}
}
/* Disable global free running counter */
void z_arc_connect_gfrc_core_set(uint32_t core_mask)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd_data(ARC_CONNECT_CMD_GFRC_SET_CORE,
0, core_mask);
}
}
/* Set the relevant cores to halt global free running counter */
uint32_t z_arc_connect_gfrc_halt_read(void)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_READ_HALT, 0);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/* Read the internal CORE register */
uint32_t z_arc_connect_gfrc_core_read(void)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_READ_CORE, 0);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/* Enable interrupt distribute unit */
void z_arc_connect_idu_enable(void)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_ENABLE, 0);
}
}
/* Disable interrupt distribute unit */
void z_arc_connect_idu_disable(void)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_DISABLE, 0);
}
}
/* Read enable status of interrupt distribute unit */
uint32_t z_arc_connect_idu_read_enable(void)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_ENABLE, 0);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/*
* Set the triggering mode and distribution mode for the specified common
* interrupt
*/
void z_arc_connect_idu_set_mode(uint32_t irq_num,
uint16_t trigger_mode, uint16_t distri_mode)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd_data(ARC_CONNECT_CMD_IDU_SET_MODE,
irq_num, (distri_mode | (trigger_mode << 4)));
}
}
/* Read the internal MODE register of the specified common interrupt */
uint32_t z_arc_connect_idu_read_mode(uint32_t irq_num)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_MODE, irq_num);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/*
* Set the target cores to receive the specified common interrupt
* when it is triggered
*/
void z_arc_connect_idu_set_dest(uint32_t irq_num, uint32_t core_mask)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd_data(ARC_CONNECT_CMD_IDU_SET_DEST,
irq_num, core_mask);
}
}
/* Read the internal DEST register of the specified common interrupt */
uint32_t z_arc_connect_idu_read_dest(uint32_t irq_num)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_DEST, irq_num);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/* Assert the specified common interrupt */
void z_arc_connect_idu_gen_cirq(uint32_t irq_num)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_GEN_CIRQ, irq_num);
}
}
/* Acknowledge the specified common interrupt */
void z_arc_connect_idu_ack_cirq(uint32_t irq_num)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_ACK_CIRQ, irq_num);
}
}
/* Read the internal STATUS register of the specified common interrupt */
uint32_t z_arc_connect_idu_check_status(uint32_t irq_num)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_CHECK_STATUS, irq_num);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/* Read the internal SOURCE register of the specified common interrupt */
uint32_t z_arc_connect_idu_check_source(uint32_t irq_num)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_CHECK_SOURCE, irq_num);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/* Mask or unmask the specified common interrupt */
void z_arc_connect_idu_set_mask(uint32_t irq_num, uint32_t mask)
{
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd_data(ARC_CONNECT_CMD_IDU_SET_MASK,
irq_num, mask);
}
}
/* Read the internal MASK register of the specified common interrupt */
uint32_t z_arc_connect_idu_read_mask(uint32_t irq_num)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_MASK, irq_num);
ret = z_arc_connect_cmd_readback();
}
return ret;
}
/*
* Check if it is the first-acknowledging core to the common interrupt
* if IDU is programmed in the first-acknowledged mode
*/
uint32_t z_arc_connect_idu_check_first(uint32_t irq_num)
{
uint32_t ret = 0;
LOCKED(&arc_connect_spinlock) {
z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_CHECK_FIRST, irq_num);
ret = z_arc_connect_cmd_readback();
}
return ret;
}

View File

@@ -1,183 +0,0 @@
/*
* Copyright (c) 2019 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief codes required for ARC multicore and Zephyr smp support
*
*/
#include <device.h>
#include <kernel.h>
#include <kernel_structs.h>
#include <ksched.h>
#include <soc.h>
#include <init.h>
#ifndef IRQ_ICI
#define IRQ_ICI 19
#endif
#define ARCV2_ICI_IRQ_PRIORITY 1
volatile struct {
arch_cpustart_t fn;
void *arg;
} arc_cpu_init[CONFIG_MP_NUM_CPUS];
/*
* arc_cpu_wake_flag is used to sync up master core and slave cores
* Slave core will spin for arc_cpu_wake_flag until master core sets
* it to the core id of slave core. Then, slave core clears it to notify
* master core that it's waken
*
*/
volatile uint32_t arc_cpu_wake_flag;
volatile char *arc_cpu_sp;
/*
* _curr_cpu is used to record the struct of _cpu_t of each cpu.
* for efficient usage in assembly
*/
volatile _cpu_t *_curr_cpu[CONFIG_MP_NUM_CPUS];
/* Called from Zephyr initialization */
void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
arch_cpustart_t fn, void *arg)
{
_curr_cpu[cpu_num] = &(_kernel.cpus[cpu_num]);
arc_cpu_init[cpu_num].fn = fn;
arc_cpu_init[cpu_num].arg = arg;
/* set the initial sp of target sp through arc_cpu_sp
* arc_cpu_wake_flag will protect arc_cpu_sp that
* only one slave cpu can read it per time
*/
arc_cpu_sp = Z_THREAD_STACK_BUFFER(stack) + sz;
arc_cpu_wake_flag = cpu_num;
/* wait slave cpu to start */
while (arc_cpu_wake_flag != 0U) {
;
}
}
#ifdef CONFIG_SMP
static void arc_connect_debug_mask_update(int cpu_num)
{
uint32_t core_mask = 1 << cpu_num;
core_mask |= z_arc_connect_debug_select_read();
z_arc_connect_debug_select_set(core_mask);
/* Debugger halts cores at all conditions:
* ARC_CONNECT_CMD_DEBUG_MASK_H: Core global halt.
* ARC_CONNECT_CMD_DEBUG_MASK_AH: Actionpoint halt.
* ARC_CONNECT_CMD_DEBUG_MASK_BH: Software breakpoint halt.
* ARC_CONNECT_CMD_DEBUG_MASK_SH: Self halt.
*/
z_arc_connect_debug_mask_set(core_mask, (ARC_CONNECT_CMD_DEBUG_MASK_SH
| ARC_CONNECT_CMD_DEBUG_MASK_BH | ARC_CONNECT_CMD_DEBUG_MASK_AH
| ARC_CONNECT_CMD_DEBUG_MASK_H));
}
#endif
/* the C entry of slave cores */
void z_arc_slave_start(int cpu_num)
{
arch_cpustart_t fn;
#ifdef CONFIG_SMP
struct arc_connect_bcr bcr;
bcr.val = z_arc_v2_aux_reg_read(_ARC_V2_CONNECT_BCR);
if (bcr.dbg) {
/* configure inter-core debug unit if available */
arc_connect_debug_mask_update(cpu_num);
}
z_irq_setup();
z_arc_connect_ici_clear();
z_irq_priority_set(IRQ_ICI, ARCV2_ICI_IRQ_PRIORITY, 0);
irq_enable(IRQ_ICI);
#endif
/* call the function set by arch_start_cpu */
fn = arc_cpu_init[cpu_num].fn;
fn(arc_cpu_init[cpu_num].arg);
}
#ifdef CONFIG_SMP
static void sched_ipi_handler(const void *unused)
{
ARG_UNUSED(unused);
z_arc_connect_ici_clear();
z_sched_ipi();
}
/* arch implementation of sched_ipi */
void arch_sched_ipi(void)
{
uint32_t i;
/* broadcast sched_ipi request to other cores
* if the target is current core, hardware will ignore it
*/
for (i = 0U; i < CONFIG_MP_NUM_CPUS; i++) {
z_arc_connect_ici_generate(i);
}
}
static int arc_smp_init(const struct device *dev)
{
ARG_UNUSED(dev);
struct arc_connect_bcr bcr;
/* necessary master core init */
_curr_cpu[0] = &(_kernel.cpus[0]);
bcr.val = z_arc_v2_aux_reg_read(_ARC_V2_CONNECT_BCR);
if (bcr.dbg) {
/* configure inter-core debug unit if available */
arc_connect_debug_mask_update(0);
}
if (bcr.ipi) {
/* register ici interrupt, just need master core to register once */
z_arc_connect_ici_clear();
IRQ_CONNECT(IRQ_ICI, ARCV2_ICI_IRQ_PRIORITY,
sched_ipi_handler, NULL, 0);
irq_enable(IRQ_ICI);
} else {
__ASSERT(0,
"ARC connect has no inter-core interrupt\n");
return -ENODEV;
}
if (bcr.gfrc) {
/* global free running count init */
z_arc_connect_gfrc_enable();
/* when all cores halt, gfrc halt */
z_arc_connect_gfrc_core_set((1 << CONFIG_MP_NUM_CPUS) - 1);
z_arc_connect_gfrc_clear();
} else {
__ASSERT(0,
"ARC connect has no global free running counter\n");
return -ENODEV;
}
return 0;
}
SYS_INIT(arc_smp_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif

422
arch/arc/core/atomic.S Normal file
View File

@@ -0,0 +1,422 @@
/*
* Copyright (c) 2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief ARC atomic operations library
*
* This library provides routines to perform a number of atomic operations
* on a memory location: add, subtract, increment, decrement, bitwise OR,
* bitwise NOR, bitwise AND, bitwise NAND, set, clear and compare-and-swap.
*
* This requires the processor to support LLOCK and SCOND instructions,
* where they are not supported on ARC EM family processors.
*/
#include <toolchain.h>
#include <sections.h>
/* exports */
GTEXT(atomic_set)
GTEXT(atomic_get)
GTEXT(atomic_add)
GTEXT(atomic_nand)
GTEXT(atomic_and)
GTEXT(atomic_or)
GTEXT(atomic_xor)
GTEXT(atomic_clear)
GTEXT(atomic_dec)
GTEXT(atomic_inc)
GTEXT(atomic_sub)
GTEXT(atomic_cas)
.section .TEXT._Atomic, "ax"
.balign 2
/**
*
* @brief Atomically clear a memory location
*
* This routine atomically clears the contents of <target> and returns the old
* value that was in <target>.
*
* This routine can be used from both task and interrupt level.
*
* @return Contents of <target> before the atomic operation
*
* ERRNO: N/A
*
* atomic_val_t atomic_clear
* (
* atomic_t *target /@ memory location to clear @/
* )
*/
SECTION_SUBSEC_FUNC(TEXT, atomic_clear_set, atomic_clear)
mov_s r1, 0
/* fall through into atomic_set */
/**
*
* @brief Atomically set a memory location
*
* This routine atomically sets the contents of <target> to <value> and returns
* the old value that was in <target>.
*
* This routine can be used from both task and interrupt level.
*
* @return Contents of <target> before the atomic operation
*
* ERRNO: N/A
*
* atomic_val_t atomic_set
* (
* atomic_t *target, /@ memory location to set @/
* atomic_val_t value /@ set with this value @/
* )
*
*/
SECTION_SUBSEC_FUNC(TEXT, atomic_clear_set, atomic_set)
ex r1, [r0] /* swap new value with old value */
j_s.d [blink]
mov_s r0, r1 /* return old value */
/**
*
* @brief Get the value of a shared memory atomically
*
* This routine atomically retrieves the value in *target
*
* atomic_val_t atomic_get
* (
* atomic_t *target /@ address of atom to be retrieved @/
* )
*
* RETURN: value read from address target.
*
*/
SECTION_FUNC(TEXT, atomic_get)
ld_s r0, [r0, 0]
j_s [blink]
/**
*
* @brief Atomically increment a memory location
*
* This routine atomically increments the value in <target>. The operation is
* done using unsigned integer arithmetic. Various CPU architectures may impose
* restrictions with regards to the alignment and cache attributes of the
* atomic_t type.
*
* This routine can be used from both task and interrupt level.
*
* @return Contents of <target> before the atomic operation
*
* ERRNO: N/A
*
* atomic_val_t atomic_inc
* (
* atomic_t *target, /@ memory location to increment @/
* )
*
*/
SECTION_SUBSEC_FUNC(TEXT, atomic_inc_add, atomic_inc)
mov_s r1, 1
/* fall through into atomic_add */
/**
*
* @brief Atomically add a value to a memory location
*
* This routine atomically adds the contents of <target> and <value>, placing
* the result in <target>. The operation is done using signed integer arithmetic.
* Various CPU architectures may impose restrictions with regards to the
* alignment and cache attributes of the atomic_t type.
*
* This routine can be used from both task and interrupt level.
*
* @return Contents of <target> before the atomic operation
*
* ERRNO: N/A
*
* atomic_val_t atomic_add
* (
* atomic_t *target, /@ memory location to add to @/
* atomic_val_t value /@ value to add @/
* )
*/
SECTION_SUBSEC_FUNC(TEXT, atomic_inc_add, atomic_add)
llock r2, [r0] /* load old value and mark exclusive access */
add_s r3, r1, r2
scond r3, [r0] /* try to store new value */
/* STATUS32.Z = 1 if successful */
bne_s atomic_add /* if store is not successful, retry */
j_s.d [blink]
mov_s r0, r2 /* return old value */
/**
*
* @brief Atomically decrement a memory location
*
* This routine atomically decrements the value in <target>. The operation is
* done using unsigned integer arithmetic. Various CPU architectures may impose
* restrictions with regards to the alignment and cache attributes of the
* atomic_t type.
*
* This routine can be used from both task and interrupt level.
*
* @return Contents of <target> before the atomic operation
*
* ERRNO: N/A
*
* atomic_val_t atomic_dec
* (
* atomic_t *target, /@ memory location to decrement @/
* )
*
*/
SECTION_SUBSEC_FUNC(TEXT, atomic_dec_sub, atomic_dec)
mov_s r1, 1
/* fall through into atomic_sub */
/**
*
* @brief Atomically subtract a value from a memory location
*
* This routine atomically subtracts <value> from the contents of <target>,
* placing the result in <target>. The operation is done using signed integer
* arithmetic. Various CPU architectures may impose restrictions with regards to
* the alignment and cache attributes of the atomic_t type.
*
* This routine can be used from both task and interrupt level.
*
* @return Contents of <target> before the atomic operation
*
* ERRNO: N/A
*
* atomic_val_t atomic_sub
* (
* atomic_t *target, /@ memory location to subtract from @/
* atomic_val_t value /@ value to subtract @/
* )
*
*/
SECTION_SUBSEC_FUNC(TEXT, atomic_dec_sub, atomic_sub)
llock r2, [r0] /* load old value and mark exclusive access */
sub r3, r2, r1
scond r3, [r0] /* try to store new value */
/* STATUS32.Z = 1 if successful */
bne_s atomic_sub /* if store is not successful, retry */
j_s.d [blink]
mov_s r0, r2 /* return old value */
/**
*
* @brief Atomically perform a bitwise NAND on a memory location
*
* This routine atomically performs a bitwise NAND operation of the contents of
* <target> and <value>, placing the result in <target>.
* Various CPU architectures may impose restrictions with regards to the
* alignment and cache attributes of the atomic_t type.
*
* This routine can be used from both task and interrupt level.
*
* @return Contents of <target> before the atomic operation
*
* ERRNO: N/A
*
* atomic_val_t atomic_nand
* (
* atomic_t *target, /@ memory location to NAND @/
* atomic_val_t value /@ NAND with this value @/
* )
*
*/
SECTION_FUNC(TEXT, atomic_nand)
llock r2, [r0] /* load old value and mark exclusive access */
and r3, r1, r2
not r3, r3
scond r3, [r0] /* try to store new value */
/* STATUS32.Z = 1 if successful */
bne_s atomic_nand /* if store is not successful, retry */
j_s.d [blink]
mov_s r0, r2 /* return old value */
/**
*
* @brief Atomically perform a bitwise AND on a memory location
*
* This routine atomically performs a bitwise AND operation of the contents of
* <target> and <value>, placing the result in <target>.
* Various CPU architectures may impose restrictions with regards to the
* alignment and cache attributes of the atomic_t type.
*
* This routine can be used from both task and interrupt level.
*
* @return Contents of <target> before the atomic operation
*
* ERRNO: N/A
*
* atomic_val_t atomic_and
* (
* atomic_t *target, /@ memory location to AND @/
* atomic_val_t value /@ AND with this value @/
* )
*
*/
SECTION_FUNC(TEXT, atomic_and)
llock r2, [r0] /* load old value and mark exclusive access */
and r3, r1, r2
scond r3, [r0] /* try to store new value */
/* STATUS32.Z = 1 if successful */
bne_s atomic_and /* if store is not successful, retry */
j_s.d [blink]
mov_s r0, r2 /* return old value */
/**
*
* @brief Atomically perform a bitwise OR on memory location
*
* This routine atomically performs a bitwise OR operation of the contents of
* <target> and <value>, placing the result in <target>.
* Various CPU architectures may impose restrictions with regards to the
* alignment and cache attributes of the atomic_t type.
*
* This routine can be used from both task and interrupt level.
*
* @return Contents of <target> before the atomic operation
*
* ERRNO: N/A
*
* atomic_val_t atomic_or
* (
* atomic_t *target, /@ memory location to OR @/
* atomic_val_t value /@ OR with this value @/
* )
*
*/
SECTION_FUNC(TEXT, atomic_or)
llock r2, [r0] /* load old value and mark exclusive access */
or r3, r1, r2
scond r3, [r0] /* try to store new value */
/* STATUS32.Z = 1 if successful */
bne_s atomic_or /* if store is not successful, retry */
j_s.d [blink]
mov_s r0, r2 /* return old value */
/**
*
* @brief Atomically perform a bitwise XOR on a memory location
*
* This routine atomically performs a bitwise XOR operation of the contents of
* <target> and <value>, placing the result in <target>.
* Various CPU architectures may impose restrictions with regards to the
* alignment and cache attributes of the atomic_t type.
*
* This routine can be used from both task and interrupt level.
*
* @return Contents of <target> before the atomic operation
*
* ERRNO: N/A
*
* atomic_val_t atomic_xor
* (
* atomic_t *target, /@ memory location to XOR @/
* atomic_val_t value /@ XOR with this value @/
* )
*
*/
SECTION_FUNC(TEXT, atomic_xor)
llock r2, [r0] /* load old value and mark exclusive access */
xor r3, r1, r2
scond r3, [r0] /* try to store new value */
/* STATUS32.Z = 1 if successful */
bne_s atomic_xor /* if store is not successful, retry */
j_s.d [blink]
mov_s r0, r2 /* return old value */
/**
*
* @brief Atomically compare-and-swap the contents of a memory location
*
* This routine performs an atomic compare-and-swap. testing that the contents of
* <target> contains <oldValue>, and if it does, setting the value of <target>
* to <newValue>. Various CPU architectures may impose restrictions with regards
* to the alignment and cache attributes of the atomic_t type.
*
* This routine can be used from both task and interrupt level.
*
* @return 1 if the swap is actually executed, 0 otherwise.
*
* ERRNO: N/A
*
* int atomic_cas
* (
* atomic_t *target, /@ memory location to compare-and-swap @/
* atomic_val_t oldValue, /@ compare to this value @/
* atomic_val_t newValue, /@ swap with this value @/
* )
*
*/
SECTION_FUNC(TEXT, atomic_cas)
llock r3, [r0] /* load old value and mark exclusive access */
cmp_s r1, r3
bne_s nanoAtomicCas_fail
scond r2, [r0] /* try to store new value */
/* STATUS32.Z = 1 if successful */
bne_s atomic_cas /* if store is not successful, retry */
j_s.d [blink]
mov_s r0, 1 /* return TRUE */
/* failed comparison */
nanoAtomicCas_fail:
scond r1, [r0] /* write old value to clear the access lock */
j_s.d [blink]
mov_s r0, 0 /* return FALSE */

View File

@@ -15,18 +15,25 @@
#include <kernel.h>
#include <arch/cpu.h>
#include <sys/util.h>
#include <misc/util.h>
#include <toolchain.h>
#include <cache.h>
#include <linker/linker-defs.h>
#include <linker-defs.h>
#include <arch/arc/v2/aux_regs.h>
#include <kernel_internal.h>
#include <sys/__assert.h>
#include <nano_internal.h>
#include <misc/__assert.h>
#include <init.h>
#include <stdbool.h>
#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
size_t sys_cache_line_size;
#if defined(CONFIG_CACHE_FLUSHING)
#if (CONFIG_CACHE_LINE_SIZE == 0) && !defined(CONFIG_CACHE_LINE_SIZE_DETECT)
#error Cannot use this implementation with a cache line size of 0
#endif
#if defined(CONFIG_CACHE_LINE_SIZE_DETECT)
#define DCACHE_LINE_SIZE sys_cache_line_size
#else
#define DCACHE_LINE_SIZE CONFIG_CACHE_LINE_SIZE
#endif
#define DC_CTRL_DC_ENABLE 0x0 /* enable d-cache */
@@ -41,129 +48,120 @@ size_t sys_cache_line_size;
#define DC_CTRL_OP_SUCCEEDED 0x4 /* d-cache operation succeeded */
static bool dcache_available(void)
static int dcache_available(void)
{
unsigned long val = z_arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
unsigned long val = _arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
val &= 0xff; /* extract version */
return (val == 0) ? false : true;
return (val == 0)?0:1;
}
static void dcache_dc_ctrl(uint32_t dcache_en_mask)
static void dcache_dc_ctrl(u32_t dcache_en_mask)
{
if (dcache_available()) {
z_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, dcache_en_mask);
}
if (!dcache_available())
return;
_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, dcache_en_mask);
}
void arch_dcache_enable(void)
static void dcache_enable(void)
{
dcache_dc_ctrl(DC_CTRL_DC_ENABLE);
}
static void arch_dcache_flush(void *start_addr_ptr, size_t size)
/**
*
* @brief Flush multiple d-cache lines to memory
*
* No alignment is required for either <start_addr> or <size>, but since
* dcache_flush_mlines() iterates on the d-cache lines, a cache line
* alignment for both is optimal.
*
* The d-cache line size is specified either via the CONFIG_CACHE_LINE_SIZE
* kconfig option or it is detected at runtime.
*
* @param start_addr the pointer to start the multi-line flush
* @param size the number of bytes that are to be flushed
*
* @return N/A
*/
static void dcache_flush_mlines(u32_t start_addr, u32_t size)
{
size_t line_size = sys_cache_data_line_size_get();
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
u32_t end_addr;
unsigned int key;
if (!dcache_available() || (size == 0U) || line_size == 0U) {
if (!dcache_available() || (size == 0)) {
return;
}
end_addr = start_addr + size;
end_addr = start_addr + size - 1;
start_addr &= (u32_t)(~(DCACHE_LINE_SIZE - 1));
start_addr = ROUND_DOWN(start_addr, line_size);
key = arch_irq_lock(); /* --enter critical section-- */
key = irq_lock(); /* --enter critical section-- */
do {
z_arc_v2_aux_reg_write(_ARC_V2_DC_FLDL, start_addr);
__builtin_arc_nop();
__builtin_arc_nop();
__builtin_arc_nop();
_arc_v2_aux_reg_write(_ARC_V2_DC_FLDL, start_addr);
__asm__ volatile("nop_s");
__asm__ volatile("nop_s");
__asm__ volatile("nop_s");
/* wait for flush completion */
do {
if ((z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL) &
DC_CTRL_FLUSH_STATUS) == 0) {
if ((_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL) &
DC_CTRL_FLUSH_STATUS) == 0)
break;
}
} while (1);
start_addr += line_size;
} while (start_addr < end_addr);
start_addr += DCACHE_LINE_SIZE;
} while (start_addr <= end_addr);
arch_irq_unlock(key); /* --exit critical section-- */
irq_unlock(key); /* --exit critical section-- */
}
static void arch_dcache_invd(void *start_addr_ptr, size_t size)
/**
*
* @brief Flush d-cache lines to main memory
*
* No alignment is required for either <virt> or <size>, but since
* sys_cache_flush() iterates on the d-cache lines, a d-cache line alignment for
* both is optimal.
*
* The d-cache line size is specified either via the CONFIG_CACHE_LINE_SIZE
* kconfig option or it is detected at runtime.
*
* @param start_addr the pointer to start the multi-line flush
* @param size the number of bytes that are to be flushed
*
* @return N/A
*/
void sys_cache_flush(vaddr_t start_addr, size_t size)
{
size_t line_size = sys_cache_data_line_size_get();
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
unsigned int key;
if (!dcache_available() || (size == 0U) || line_size == 0U) {
return;
}
end_addr = start_addr + size;
start_addr = ROUND_DOWN(start_addr, line_size);
key = arch_irq_lock(); /* -enter critical section- */
do {
z_arc_v2_aux_reg_write(_ARC_V2_DC_IVDL, start_addr);
__builtin_arc_nop();
__builtin_arc_nop();
__builtin_arc_nop();
start_addr += line_size;
} while (start_addr < end_addr);
irq_unlock(key); /* -exit critical section- */
dcache_flush_mlines((u32_t)start_addr, (u32_t)size);
}
int arch_dcache_range(void *addr, size_t size, int op)
{
if (op == K_CACHE_INVD) {
/*
* TODO: On invalidate we can contextually flush by setting the
* DC_CTRL_INVALID_FLUSH bit
*/
arch_dcache_invd(addr, size);
} else if (op == K_CACHE_WB) {
arch_dcache_flush(addr, size);
} else {
return -ENOTSUP;
}
return 0;
}
#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
#if defined(CONFIG_CACHE_LINE_SIZE_DETECT)
size_t sys_cache_line_size;
static void init_dcache_line_size(void)
{
uint32_t val;
u32_t val;
val = z_arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
__ASSERT((val&0xff) != 0U, "d-cache is not present");
val = _arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
__ASSERT((val&0xff) != 0, "d-cache is not present");
val = ((val>>16) & 0xf) + 1;
val *= 16U;
val *= 16;
sys_cache_line_size = (size_t) val;
}
size_t arch_dcache_line_size_get(void)
{
return sys_cache_line_size;
}
#endif
static int init_dcache(const struct device *unused)
static int init_dcache(struct device *unused)
{
ARG_UNUSED(unused);
arch_dcache_enable();
dcache_enable();
#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
#if defined(CONFIG_CACHE_LINE_SIZE_DETECT)
init_dcache_line_size();
#endif
@@ -171,3 +169,6 @@ static int init_dcache(const struct device *unused)
}
SYS_INIT(init_dcache, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* CONFIG_CACHE_FLUSHING */

View File

@@ -14,16 +14,15 @@
#include <kernel_structs.h>
#include <offsets_short.h>
#include <toolchain.h>
#include <linker/sections.h>
#include <sections.h>
#include <arch/cpu.h>
#include <arch/arc/asm-compat/assembler.h>
GTEXT(arch_cpu_idle)
GTEXT(arch_cpu_atomic_idle)
GDATA(z_arc_cpu_sleep_mode)
GTEXT(k_cpu_idle)
GTEXT(k_cpu_atomic_idle)
GDATA(k_cpu_sleep_mode)
SECTION_VAR(BSS, z_arc_cpu_sleep_mode)
.align 4
.balign 4
SECTION_VAR(BSS, k_cpu_sleep_mode)
.word 0
/*
@@ -34,16 +33,15 @@ SECTION_VAR(BSS, z_arc_cpu_sleep_mode)
* void nanCpuIdle(void)
*/
SECTION_FUNC(TEXT, arch_cpu_idle)
SECTION_FUNC(TEXT, k_cpu_idle)
#ifdef CONFIG_TRACING
PUSHR blink
jl sys_trace_idle
POPR blink
#ifdef CONFIG_KERNEL_EVENT_LOGGER_SLEEP
push_s blink
jl _sys_k_event_logger_enter_sleep
pop_s blink
#endif
/* z_arc_cpu_sleep_mode is 32 bit despite of platform bittnes */
ld r1, [z_arc_cpu_sleep_mode]
ld r1, [k_cpu_sleep_mode]
or r1, r1, (1 << 4) /* set IRQ-enabled bit */
sleep r1
j_s [blink]
@@ -54,18 +52,17 @@ SECTION_FUNC(TEXT, arch_cpu_idle)
*
* This function exits with interrupts restored to <key>.
*
* void arch_cpu_atomic_idle(unsigned int key)
* void k_cpu_atomic_idle(unsigned int key)
*/
SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
SECTION_FUNC(TEXT, k_cpu_atomic_idle)
#ifdef CONFIG_TRACING
PUSHR blink
jl sys_trace_idle
POPR blink
#ifdef CONFIG_KERNEL_EVENT_LOGGER_SLEEP
push_s blink
jl _sys_k_event_logger_enter_sleep
pop_s blink
#endif
/* z_arc_cpu_sleep_mode is 32 bit despite of platform bittnes */
ld r1, [z_arc_cpu_sleep_mode]
ld r1, [k_cpu_sleep_mode]
or r1, r1, (1 << 4) /* set IRQ-enabled bit */
sleep r1
j_s.d [blink]

View File

@@ -16,14 +16,35 @@
#include <kernel_structs.h>
#include <offsets_short.h>
#include <toolchain.h>
#include <linker/sections.h>
#include <arch/cpu.h>
#include <swap_macros.h>
GTEXT(_firq_enter)
GTEXT(_firq_exit)
GTEXT(_firq_stack_setup)
GTEXT(_firq_stack_suspend)
GTEXT(_firq_stack_resume)
#if CONFIG_RGF_NUM_BANKS != 1
GDATA(_firq_stack)
GDATA(_saved_firq_stack)
SECTION_VAR(NOINIT, _firq_stack)
.space CONFIG_FIRQ_STACK_SIZE
#else
GDATA(saved_r0)
#endif
.macro _firq_return
#if CONFIG_RGF_NUM_BANKS == 1
b _firq_no_reschedule
#else
rtie
#endif
.endm
/**
*
* @brief Work to be done before handing control to a FIRQ ISR
*
* The processor switches to a second register bank so registers from the
@@ -40,9 +61,12 @@ GTEXT(_firq_exit)
* interrupt. An exception, however, can be taken.
*
* Assumption by _isr_demux: r3 is untouched by _firq_enter.
*
* @return N/A
*/
SECTION_FUNC(TEXT, _firq_enter)
/*
* ATTENTION:
* If CONFIG_RGF_NUM_BANKS>1, firq uses a 2nd register bank so GPRs do
@@ -50,20 +74,16 @@ SECTION_FUNC(TEXT, _firq_enter)
* If CONFIG_RGF_NUM_BANKS==1, firq must use the stack to save registers.
* This has already been done by _isr_wrapper.
*/
#ifdef CONFIG_ARC_STACK_CHECKING
#ifdef CONFIG_ARC_SECURE_FIRMWARE
lr r2, [_ARC_V2_SEC_STAT]
bclr r2, r2, _ARC_V2_SEC_STAT_SSC_BIT
sflag r2
#else
/* disable stack checking */
lr r2, [_ARC_V2_STATUS32]
bclr r2, r2, _ARC_V2_STATUS32_SC_BIT
kflag r2
#endif
#endif
#if CONFIG_RGF_NUM_BANKS != 1
#ifndef CONFIG_FIRQ_NO_LPCC
/*
* Save LP_START/LP_COUNT/LP_END because called handler might use.
* Save these in callee saved registers to avoid using memory.
@@ -73,152 +93,123 @@ SECTION_FUNC(TEXT, _firq_enter)
lr r24, [_ARC_V2_LP_START]
lr r25, [_ARC_V2_LP_END]
#endif
/* check whether irq stack is used */
_check_and_inc_int_nest_counter r0, r1
bne.d firq_nest
mov_s r0, sp
_get_curr_cpu_irq_stack sp
#if CONFIG_RGF_NUM_BANKS != 1
b firq_nest_1
firq_nest:
/*
* because firq and rirq share the same interrupt stack,
* switch back to original register bank to get correct sp.
* to get better firq latency, an approach is to prepare
* separate interrupt stack for firq and do not do thread
* switch in firq.
*/
lr r1, [_ARC_V2_STATUS32]
and r1, r1, ~_ARC_V2_STATUS32_RB(7)
kflag r1
/* here use _ARC_V2_USER_SP and ilink to exchange sp
* save original value of _ARC_V2_USER_SP and ilink into
* the stack of interrupted context first, then restore them later
*/
push ilink
PUSHAX ilink, _ARC_V2_USER_SP
/* sp here is the sp of interrupted context */
sr sp, [_ARC_V2_USER_SP]
/* here, bank 0 sp must go back to the value before push and
* PUSHAX as we will switch to bank1, the pop and POPAX later will
* change bank1's sp, not bank0's sp
*/
add sp, sp, 8
/* switch back to banked reg, only ilink can be used */
lr ilink, [_ARC_V2_STATUS32]
or ilink, ilink, _ARC_V2_STATUS32_RB(1)
kflag ilink
lr sp, [_ARC_V2_USER_SP]
POPAX ilink, _ARC_V2_USER_SP
pop ilink
firq_nest_1:
#else
firq_nest:
#endif
push_s r0
j _isr_demux
j @_isr_demux
/**
*
* @brief Work to be done exiting a FIRQ
*
* @return N/A
*/
SECTION_FUNC(TEXT, _firq_exit)
#if CONFIG_RGF_NUM_BANKS != 1
#ifndef CONFIG_FIRQ_NO_LPCC
/* restore lp_count, lp_start, lp_end from r23-r25 */
mov lp_count,r23
sr r24, [_ARC_V2_LP_START]
sr r25, [_ARC_V2_LP_END]
#endif
_dec_int_nest_counter r0, r1
#endif
_check_nest_int_by_irq_act r0, r1
#ifdef CONFIG_PREEMPT_ENABLED
mov_s r1, _kernel
ld_s r2, [r1, _kernel_offset_to_current]
jne _firq_no_switch
#if CONFIG_NUM_IRQ_PRIO_LEVELS > 1
/* check if we're a nested interrupt: if so, let the interrupted
* interrupt handle the reschedule */
/* sp is struct k_thread **old of z_arc_switch_in_isr
* which is a wrapper of z_get_next_switch_handle.
* r0 contains the 1st thread in ready queue. if
* it equals _current(r2) ,then do swap, or no swap.
lr r3, [_ARC_V2_AUX_IRQ_ACT]
/* the OS on ARCv2 always runs in kernel mode, so assume bit31 [U] in
* AUX_IRQ_ACT is always 0: if the contents of AUX_IRQ_ACT is not 1, it
* means that another bit is set so an interrupt was interrupted.
*/
_get_next_switch_handle
cmp r0, r2
bne _firq_switch
breq r3, 1, _firq_check_for_swap
/* fall to no switch */
_firq_return
#endif
.align 4
_firq_no_switch:
/* restore interrupted context' sp */
pop sp
.balign 4
_firq_check_for_swap:
/*
* Non-preemptible thread ? Do not schedule (see explanation of
* preempt field in kernel_struct.h).
*/
ldh_s r0, [r2, _thread_offset_to_preempt]
brhs r0, _NON_PREEMPT_THRESHOLD, _firq_no_reschedule
/* Check if the current thread (in r2) is the cached thread */
ld_s r0, [r1, _kernel_offset_to_ready_q_cache]
brne r0, r2, _firq_reschedule
/* fall to no rescheduling */
#endif /* CONFIG_PREEMPT_ENABLED */
.balign 4
_firq_no_reschedule:
/*
* Keeping this code block close to those that use it allows using brxx
* instruction instead of a pair of cmp and bxx
*/
#if CONFIG_RGF_NUM_BANKS == 1
_pop_irq_stack_frame
add sp,sp,4 /* don't need r0 from stack */
pop_s r1
pop_s r2
pop_s r3
pop r4
pop r5
pop r6
pop r7
pop r8
pop r9
pop r10
pop r11
pop_s r12
pop_s r13
pop_s blink
pop_s r0
sr r0, [_ARC_V2_LP_END]
pop_s r0
sr r0, [_ARC_V2_LP_START]
pop_s r0
mov lp_count,r0
ld r0,[saved_r0]
#ifdef CONFIG_CODE_DENSITY
pop_s r0
sr r0, [_ARC_V2_EI_BASE]
pop_s r0
sr r0, [_ARC_V2_LDI_BASE]
pop_s r0
sr r0, [_ARC_V2_JLI_BASE]
#endif
add sp,sp,8 /* don't need ilink & status32_po from stack */
#endif
rtie
.align 4
_firq_switch:
/* restore interrupted context' sp */
pop sp
#ifdef CONFIG_PREEMPT_ENABLED
.balign 4
_firq_reschedule:
#if CONFIG_RGF_NUM_BANKS != 1
/*
* save r0, r2 in irq stack for a while, as they will be changed by register
* bank switch
*/
_get_curr_cpu_irq_stack r1
st r0, [r1, -4]
st r2, [r1, -8]
/*
* We know there is no interrupted interrupt of lower priority at this
* point, so when switching back to register bank 0, it will contain the
* registers from the interrupted thread.
*/
#if defined(CONFIG_USERSPACE)
/* when USERSPACE is configured, here need to consider the case where firq comes
* out in user mode, according to ARCv2 ISA and nsim, the following micro ops
* will be executed:
* sp<-reg bank1'sp
* switch between sp and _ARC_V2_USER_SP
* then:
* sp is the sp of kernel stack of interrupted thread
* _ARC_V2_USER_SP is reg bank1'sp
* the sp of user stack of interrupted thread is reg bank0'sp
* if firq comes out in kernel mode, the following micro ops will be executed:
* sp<-reg bank'sp
* so, sw needs to do necessary handling to set up the correct sp
*/
lr r0, [_ARC_V2_AUX_IRQ_ACT]
bbit0 r0, 31, _firq_from_kernel
aex sp, [_ARC_V2_USER_SP]
lr r0, [_ARC_V2_STATUS32]
and r0, r0, ~_ARC_V2_STATUS32_RB(7)
kflag r0
aex sp, [_ARC_V2_USER_SP]
b _firq_create_irq_stack_frame
_firq_from_kernel:
#endif
/* chose register bank #0 */
lr r0, [_ARC_V2_STATUS32]
and r0, r0, ~_ARC_V2_STATUS32_RB(7)
kflag r0
_firq_create_irq_stack_frame:
/* we're back on the outgoing thread's stack */
_create_irq_stack_frame
@@ -231,56 +222,68 @@ _firq_create_irq_stack_frame:
st_s r0, [sp, ___isf_t_status32_OFFSET]
st ilink, [sp, ___isf_t_pc_OFFSET] /* ilink into pc */
/*
* load r0, r2 from irq stack
*/
_get_curr_cpu_irq_stack r1
ld r0, [r1, -4]
ld r2, [r1, -8]
#endif
/* r2 is old thread */
_irq_store_old_thread_callee_regs
mov_s r1, _kernel
ld_s r2, [r1, _kernel_offset_to_current]
_save_callee_saved_regs
st _CAUSE_FIRQ, [r2, _thread_offset_to_relinquish_cause]
/* mov new thread (r0) to r2 */
ld_s r2, [r1, _kernel_offset_to_ready_q_cache]
st_s r2, [r1, _kernel_offset_to_current]
mov r2, r0
_load_new_thread_callee_regs
#ifdef CONFIG_ARC_STACK_CHECKING
/* Use stack top and base registers from restored context */
ld r3, [r2, _thread_offset_to_stack_base]
sr r3, [_ARC_V2_KSTACK_BASE]
ld r3, [r2, _thread_offset_to_stack_top]
sr r3, [_ARC_V2_KSTACK_TOP]
#endif
/*
* _load_callee_saved_regs expects incoming thread in r2.
* _load_callee_saved_regs restores the stack pointer.
*/
_load_callee_saved_regs
breq r3, _CAUSE_RIRQ, _firq_switch_from_rirq
nop_s
breq r3, _CAUSE_FIRQ, _firq_switch_from_firq
nop_s
ld_s r3, [r2, _thread_offset_to_relinquish_cause]
breq r3, _CAUSE_RIRQ, _firq_return_from_rirq
nop
breq r3, _CAUSE_FIRQ, _firq_return_from_firq
nop
/* fall through */
.align 4
_firq_switch_from_coop:
.balign 4
_firq_return_from_coop:
_set_misc_regs_irq_switch_from_coop
ld_s r3, [r2, _thread_offset_to_intlock_key]
st 0, [r2, _thread_offset_to_intlock_key]
/* pc into ilink */
pop_s r0
mov ilink, r0
pop_s r0 /* status32 into r0 */
/*
* There are only two interrupt lock states: locked and unlocked. When
* entering _Swap(), they are always locked, so the IE bit is unset in
* status32. If the incoming thread had them locked recursively, it
* means that the IE bit should stay unset. The only time the bit
* has to change is if they were not locked recursively.
*/
and.f r3, r3, (1 << 4)
or.nz r0, r0, _ARC_V2_STATUS32_IE
sr r0, [_ARC_V2_STATUS32_P0]
#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
push_s blink
bl z_thread_mark_switched_in
pop_s blink
#endif
ld_s r0, [r2, _thread_offset_to_return_value]
rtie
.align 4
_firq_switch_from_rirq:
_firq_switch_from_firq:
_set_misc_regs_irq_switch_from_irq
.balign 4
_firq_return_from_rirq:
_firq_return_from_firq:
_pop_irq_stack_frame
@@ -288,12 +291,88 @@ _firq_switch_from_firq:
sr ilink, [_ARC_V2_STATUS32_P0]
ld ilink, [sp, -8] /* pc into ilink */
#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
push_s blink
bl z_thread_mark_switched_in
pop_s blink
#endif
/* LP registers are already restored, just switch back to bank 0 */
rtie
#endif /* CONFIG_PREEMPT_ENABLED */
/**
*
* @brief Install the FIRQ stack in register bank 1 if CONFIG_RGF_NUM_BANK!=1
*
* @return N/A
*/
SECTION_FUNC(TEXT, _firq_stack_setup)
#if CONFIG_RGF_NUM_BANKS != 1
lr r0, [_ARC_V2_STATUS32]
and r0, r0, ~_ARC_V2_STATUS32_RB(7)
or r0, r0, _ARC_V2_STATUS32_RB(1)
kflag r0
mov sp, _firq_stack
add sp, sp, CONFIG_FIRQ_STACK_SIZE
/*
* We have to reload r0 here, because it is bank1 r0 which contains
* garbage, not bank0 r0 containing the previous value of status32.
*/
lr r0, [_ARC_V2_STATUS32]
and r0, r0, ~_ARC_V2_STATUS32_RB(7)
kflag r0
#endif
j_s [blink]
/**
*
* @brief Save the FIRQ context if CONFIG_RGF_NUM_BANK!=1
*
* @return N/A
*/
SECTION_FUNC(TEXT, _firq_stack_suspend)
#if CONFIG_RGF_NUM_BANKS != 1
/* Switch to bank 1 */
lr r0, [_ARC_V2_STATUS32]
and r0, r0, ~_ARC_V2_STATUS32_RB(7)
or r0, r0, _ARC_V2_STATUS32_RB(1)
kflag r0
st sp, [_saved_firq_stack]
/* Switch back to bank 0 */
lr r0, [_ARC_V2_STATUS32]
and r0, r0, ~_ARC_V2_STATUS32_RB(7)
kflag r0
#endif
j_s [blink]
/**
*
* @brief Restore the FIRQ context if CONFIG_RGF_NUM_BANK!=1
*
* @return N/A
*/
SECTION_FUNC(TEXT, _firq_stack_resume)
#if CONFIG_RGF_NUM_BANKS != 1
/* Switch to bank 1 */
lr r0, [_ARC_V2_STATUS32]
and r0, r0, ~_ARC_V2_STATUS32_RB(7)
or r0, r0, _ARC_V2_STATUS32_RB(1)
kflag r0
ld sp, [_saved_firq_stack]
/* Switch back to bank 0 */
lr r0, [_ARC_V2_STATUS32]
and r0, r0, ~_ARC_V2_STATUS32_RB(7)
kflag r0
#endif
j_s [blink]

View File

@@ -12,59 +12,79 @@
* ARCv2 CPUs.
*/
#include <kernel.h>
#include <kernel_structs.h>
#include <offsets_short.h>
#include <toolchain.h>
#include <arch/cpu.h>
#include <logging/log.h>
#include <kernel_arch_data.h>
#include <arch/arc/v2/exc.h>
#include <misc/printk.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
const NANO_ESF _default_esf = {
0xdeaddead, /* placeholder */
};
#ifdef CONFIG_ARC_EXCEPTION_DEBUG
static void dump_arc_esf(const z_arch_esf_t *esf)
/**
*
* @brief Kernel fatal error handler
*
* This routine is called when fatal error conditions are detected by software
* and is responsible only for reporting the error. Once reported, it then
* invokes the user provided routine _SysFatalErrorHandler() which is
* responsible for implementing the error handling policy.
*
* The caller is expected to always provide a usable ESF. In the event that the
* fatal error does not have a hardware generated ESF, the caller should either
* create its own or use a pointer to the global default ESF <_default_esf>.
*
* @return This function does not return.
*/
FUNC_NORETURN void _NanoFatalErrorHandler(unsigned int reason,
const NANO_ESF *pEsf)
{
LOG_ERR(" r0: 0x%" PRIxPTR " r1: 0x%" PRIxPTR " r2: 0x%" PRIxPTR " r3: 0x%" PRIxPTR "",
esf->r0, esf->r1, esf->r2, esf->r3);
LOG_ERR(" r4: 0x%" PRIxPTR " r5: 0x%" PRIxPTR " r6: 0x%" PRIxPTR " r7: 0x%" PRIxPTR "",
esf->r4, esf->r5, esf->r6, esf->r7);
LOG_ERR(" r8: 0x%" PRIxPTR " r9: 0x%" PRIxPTR " r10: 0x%" PRIxPTR " r11: 0x%" PRIxPTR "",
esf->r8, esf->r9, esf->r10, esf->r11);
LOG_ERR("r12: 0x%" PRIxPTR " r13: 0x%" PRIxPTR " pc: 0x%" PRIxPTR "",
esf->r12, esf->r13, esf->pc);
LOG_ERR(" blink: 0x%" PRIxPTR " status32: 0x%" PRIxPTR "", esf->blink, esf->status32);
#ifdef CONFIG_ARC_HAS_ZOL
LOG_ERR("lp_end: 0x%" PRIxPTR " lp_start: 0x%" PRIxPTR " lp_count: 0x%" PRIxPTR "",
esf->lp_end, esf->lp_start, esf->lp_count);
#endif /* CONFIG_ARC_HAS_ZOL */
}
switch (reason) {
case _NANO_ERR_HW_EXCEPTION:
break;
case _NANO_ERR_INVALID_TASK_EXIT:
printk("***** Invalid Exit Software Error! *****\n");
break;
#if defined(CONFIG_STACK_CANARIES) || defined(CONFIG_ARC_STACK_CHECKING)
case _NANO_ERR_STACK_CHK_FAIL:
printk("***** Stack Check Fail! *****\n");
break;
#endif
void z_arc_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
#ifdef CONFIG_ARC_EXCEPTION_DEBUG
if (esf != NULL) {
dump_arc_esf(esf);
case _NANO_ERR_ALLOCATION_FAIL:
printk("**** Kernel Allocation Failure! ****\n");
break;
case _NANO_ERR_KERNEL_OOPS:
printk("***** Kernel OOPS! *****\n");
break;
case _NANO_ERR_KERNEL_PANIC:
printk("***** Kernel Panic! *****\n");
break;
default:
printk("**** Unknown Fatal Error %d! ****\n", reason);
break;
}
#endif /* CONFIG_ARC_EXCEPTION_DEBUG */
printk("Current thread ID = %p\n"
"Faulting instruction address = 0x%lx\n",
k_current_get(),
_arc_v2_aux_reg_read(_ARC_V2_ERET));
z_fatal_error(reason, esf);
}
FUNC_NORETURN void arch_syscall_oops(void *ssf_ptr)
{
/* TODO: convert ssf_ptr contents into an esf, they are not the same */
ARG_UNUSED(ssf_ptr);
z_arc_fatal_error(K_ERR_KERNEL_OOPS, NULL);
CODE_UNREACHABLE;
}
FUNC_NORETURN void arch_system_halt(unsigned int reason)
{
ARG_UNUSED(reason);
__asm__("brk");
CODE_UNREACHABLE;
/*
* Now that the error has been reported, call the user implemented
* policy
* to respond to the error. The decisions as to what responses are
* appropriate to the various errors are something the customer must
* decide.
*/
_SysFatalErrorHandler(reason, pEsf);
for (;;)
;
}

View File

@@ -12,402 +12,43 @@
*/
#include <toolchain.h>
#include <linker/sections.h>
#include <sections.h>
#include <inttypes.h>
#include <kernel.h>
#include <kernel_internal.h>
#include <kernel_structs.h>
#include <exc_handle.h>
#include <logging/log.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_USERSPACE
Z_EXC_DECLARE(z_arc_user_string_nlen);
static const struct z_exc_handle exceptions[] = {
Z_EXC_HANDLE(z_arc_user_string_nlen)
};
#endif
#if defined(CONFIG_MPU_STACK_GUARD)
/**
* @brief Assess occurrence of current thread's stack corruption
*
* This function performs an assessment whether a memory fault (on a given
* memory address) is the result of a stack overflow of the current thread.
*
* When called, we know at this point that we received an ARC
* protection violation, with any cause code, with the protection access
* error either "MPU" or "Secure MPU". In other words, an MPU fault of
* some kind. Need to determine whether this is a general MPU access
* exception or the specific case of a stack overflow.
*
* @param fault_addr memory address on which memory access violation
* has been reported.
* @param sp stack pointer when exception comes out
* @retval True if this appears to be a stack overflow
* @retval False if this does not appear to be a stack overflow
*/
static bool z_check_thread_stack_fail(const uint32_t fault_addr, uint32_t sp)
{
const struct k_thread *thread = _current;
uint32_t guard_end, guard_start;
if (!thread) {
/* TODO: Under what circumstances could we get here ? */
return false;
}
#ifdef CONFIG_USERSPACE
if ((thread->base.user_options & K_USER) != 0) {
if ((z_arc_v2_aux_reg_read(_ARC_V2_ERSTATUS) &
_ARC_V2_STATUS32_U) != 0) {
/* Normal user mode context. There is no specific
* "guard" installed in this case, instead what's
* happening is that the stack pointer is crashing
* into the privilege mode stack buffer which
* immediately precededs it.
*/
guard_end = thread->stack_info.start;
guard_start = (uint32_t)thread->stack_obj;
} else {
/* Special case: handling a syscall on privilege stack.
* There is guard memory reserved immediately before
* it.
*/
guard_end = thread->arch.priv_stack_start;
guard_start = guard_end - Z_ARC_STACK_GUARD_SIZE;
}
} else
#endif /* CONFIG_USERSPACE */
{
/* Supervisor thread */
guard_end = thread->stack_info.start;
guard_start = guard_end - Z_ARC_STACK_GUARD_SIZE;
}
/* treat any MPU exceptions within the guard region as a stack
* overflow.As some instrustions
* (like enter_s {r13-r26, fp, blink}) push a collection of
* registers on to the stack. In this situation, the fault_addr
* will less than guard_end, but sp will greater than guard_end.
*/
if (fault_addr < guard_end && fault_addr >= guard_start) {
return true;
}
return false;
}
#endif
#ifdef CONFIG_ARC_EXCEPTION_DEBUG
/* For EV_ProtV, the numbering/semantics of the parameter are consistent across
* several codes, although not all combination will be reported.
*
* These codes and parameters do not have associated* names in
* the technical manual, just switch on the values in Table 6-5
*/
static const char *get_protv_access_err(uint32_t parameter)
{
switch (parameter) {
case 0x1:
return "code protection scheme";
case 0x2:
return "stack checking scheme";
case 0x4:
return "MPU";
case 0x8:
return "MMU";
case 0x10:
return "NVM";
case 0x24:
return "Secure MPU";
case 0x44:
return "Secure MPU with SID mismatch";
default:
return "unknown";
}
}
static void dump_protv_exception(uint32_t cause, uint32_t parameter)
{
switch (cause) {
case 0x0:
LOG_ERR("Instruction fetch violation (%s)",
get_protv_access_err(parameter));
break;
case 0x1:
LOG_ERR("Memory read protection violation (%s)",
get_protv_access_err(parameter));
break;
case 0x2:
LOG_ERR("Memory write protection violation (%s)",
get_protv_access_err(parameter));
break;
case 0x3:
LOG_ERR("Memory read-modify-write violation (%s)",
get_protv_access_err(parameter));
break;
case 0x10:
LOG_ERR("Normal vector table in secure memory");
break;
case 0x11:
LOG_ERR("NS handler code located in S memory");
break;
case 0x12:
LOG_ERR("NSC Table Range Violation");
break;
default:
LOG_ERR("unknown");
break;
}
}
static void dump_machine_check_exception(uint32_t cause, uint32_t parameter)
{
switch (cause) {
case 0x0:
LOG_ERR("double fault");
break;
case 0x1:
LOG_ERR("overlapping TLB entries");
break;
case 0x2:
LOG_ERR("fatal TLB error");
break;
case 0x3:
LOG_ERR("fatal cache error");
break;
case 0x4:
LOG_ERR("internal memory error on instruction fetch");
break;
case 0x5:
LOG_ERR("internal memory error on data fetch");
break;
case 0x6:
LOG_ERR("illegal overlapping MPU entries");
if (parameter == 0x1) {
LOG_ERR(" - jump and branch target");
}
break;
case 0x10:
LOG_ERR("secure vector table not located in secure memory");
break;
case 0x11:
LOG_ERR("NSC jump table not located in secure memory");
break;
case 0x12:
LOG_ERR("secure handler code not located in secure memory");
break;
case 0x13:
LOG_ERR("NSC target address not located in secure memory");
break;
case 0x80:
LOG_ERR("uncorrectable ECC or parity error in vector memory");
break;
default:
LOG_ERR("unknown");
break;
}
}
static void dump_privilege_exception(uint32_t cause, uint32_t parameter)
{
switch (cause) {
case 0x0:
LOG_ERR("Privilege violation");
break;
case 0x1:
LOG_ERR("disabled extension");
break;
case 0x2:
LOG_ERR("action point hit");
break;
case 0x10:
switch (parameter) {
case 0x1:
LOG_ERR("N to S return using incorrect return mechanism");
break;
case 0x2:
LOG_ERR("N to S return with incorrect operating mode");
break;
case 0x3:
LOG_ERR("IRQ/exception return fetch from wrong mode");
break;
case 0x4:
LOG_ERR("attempt to halt secure processor in NS mode");
break;
case 0x20:
LOG_ERR("attempt to access secure resource from normal mode");
break;
case 0x40:
LOG_ERR("SID violation on resource access (APEX/UAUX/key NVM)");
break;
default:
LOG_ERR("unknown");
break;
}
break;
case 0x13:
switch (parameter) {
case 0x20:
LOG_ERR("attempt to access secure APEX feature from NS mode");
break;
case 0x40:
LOG_ERR("SID violation on access to APEX feature");
break;
default:
LOG_ERR("unknown");
break;
}
break;
default:
LOG_ERR("unknown");
break;
}
}
static void dump_exception_info(uint32_t vector, uint32_t cause, uint32_t parameter)
{
if (vector >= 0x10 && vector <= 0xFF) {
LOG_ERR("interrupt %u", vector);
return;
}
/* Names are exactly as they appear in Designware ARCv2 ISA
* Programmer's reference manual for easy searching
*/
switch (vector) {
case ARC_EV_RESET:
LOG_ERR("Reset");
break;
case ARC_EV_MEM_ERROR:
LOG_ERR("Memory Error");
break;
case ARC_EV_INS_ERROR:
LOG_ERR("Instruction Error");
break;
case ARC_EV_MACHINE_CHECK:
LOG_ERR("EV_MachineCheck");
dump_machine_check_exception(cause, parameter);
break;
case ARC_EV_TLB_MISS_I:
LOG_ERR("EV_TLBMissI");
break;
case ARC_EV_TLB_MISS_D:
LOG_ERR("EV_TLBMissD");
break;
case ARC_EV_PROT_V:
LOG_ERR("EV_ProtV");
dump_protv_exception(cause, parameter);
break;
case ARC_EV_PRIVILEGE_V:
LOG_ERR("EV_PrivilegeV");
dump_privilege_exception(cause, parameter);
break;
case ARC_EV_SWI:
LOG_ERR("EV_SWI");
break;
case ARC_EV_TRAP:
LOG_ERR("EV_Trap");
break;
case ARC_EV_EXTENSION:
LOG_ERR("EV_Extension");
break;
case ARC_EV_DIV_ZERO:
LOG_ERR("EV_DivZero");
break;
case ARC_EV_DC_ERROR:
LOG_ERR("EV_DCError");
break;
case ARC_EV_MISALIGNED:
LOG_ERR("EV_Misaligned");
break;
case ARC_EV_VEC_UNIT:
LOG_ERR("EV_VecUnit");
break;
default:
LOG_ERR("unknown");
break;
}
}
#endif /* CONFIG_ARC_EXCEPTION_DEBUG */
#include <misc/printk.h>
/*
* @brief Fault handler
*
* This routine is called when fatal error conditions are detected by hardware
* and is responsible only for reporting the error. Once reported, it then
* invokes the user provided routine k_sys_fatal_error_handler() which is
* invokes the user provided routine _SysFatalErrorHandler() which is
* responsible for implementing the error handling policy.
*
* @return This function does not return.
*/
void _Fault(z_arch_esf_t *esf, uint32_t old_sp)
void _Fault(void)
{
uint32_t vector, cause, parameter;
uint32_t exc_addr = z_arc_v2_aux_reg_read(_ARC_V2_EFA);
uint32_t ecr = z_arc_v2_aux_reg_read(_ARC_V2_ECR);
u32_t vector, code, parameter;
u32_t exc_addr = _arc_v2_aux_reg_read(_ARC_V2_EFA);
u32_t ecr = _arc_v2_aux_reg_read(_ARC_V2_ECR);
#ifdef CONFIG_USERSPACE
for (int i = 0; i < ARRAY_SIZE(exceptions); i++) {
uint32_t start = (uint32_t)exceptions[i].start;
uint32_t end = (uint32_t)exceptions[i].end;
if (esf->pc >= start && esf->pc < end) {
esf->pc = (uint32_t)(exceptions[i].fixup);
return;
}
}
#endif
vector = Z_ARC_V2_ECR_VECTOR(ecr);
cause = Z_ARC_V2_ECR_CODE(ecr);
parameter = Z_ARC_V2_ECR_PARAMETER(ecr);
/* exception raised by kernel */
if (vector == ARC_EV_TRAP && parameter == _TRAP_S_CALL_RUNTIME_EXCEPT) {
/*
* in user mode software-triggered system fatal exceptions only allow
* K_ERR_KERNEL_OOPS and K_ERR_STACK_CHK_FAIL
*/
#ifdef CONFIG_USERSPACE
if ((esf->status32 & _ARC_V2_STATUS32_U) &&
esf->r0 != K_ERR_STACK_CHK_FAIL) {
esf->r0 = K_ERR_KERNEL_OOPS;
}
#endif
z_arc_fatal_error(esf->r0, esf);
return;
}
LOG_ERR("***** Exception vector: 0x%x, cause code: 0x%x, parameter 0x%x",
vector, cause, parameter);
LOG_ERR("Address 0x%x", exc_addr);
#ifdef CONFIG_ARC_EXCEPTION_DEBUG
dump_exception_info(vector, cause, parameter);
#endif
vector = _ARC_V2_ECR_VECTOR(ecr);
code = _ARC_V2_ECR_CODE(ecr);
parameter = _ARC_V2_ECR_PARAMETER(ecr);
printk("Exception vector: 0x%x, cause code: 0x%x, parameter 0x%x\n",
vector, code, parameter);
printk("Address 0x%x\n", exc_addr);
#ifdef CONFIG_ARC_STACK_CHECKING
/* Vector 6 = EV_ProV. Regardless of cause, parameter 2 means stack
/* Vector 6 = EV_ProV. Regardless of code, parameter 2 means stack
* check violation
* stack check and mpu violation can come out together, then
* parameter = 0x2 | [0x4 | 0x8 | 0x1]
*/
if (vector == ARC_EV_PROT_V && parameter & 0x2) {
z_arc_fatal_error(K_ERR_STACK_CHK_FAIL, esf);
return;
if (vector == 6 && parameter == 2) {
_NanoFatalErrorHandler(_NANO_ERR_STACK_CHK_FAIL, &_default_esf);
}
#endif
#ifdef CONFIG_MPU_STACK_GUARD
if (vector == ARC_EV_PROT_V && ((parameter == 0x4) ||
(parameter == 0x24))) {
if (z_check_thread_stack_fail(exc_addr, old_sp)) {
z_arc_fatal_error(K_ERR_STACK_CHK_FAIL, esf);
return;
}
}
#endif
z_arc_fatal_error(K_ERR_CPU_EXCEPTION, esf);
_NanoFatalErrorHandler(_NANO_ERR_HW_EXCEPTION, &_default_esf);
}

View File

@@ -1,6 +1,5 @@
/*
* Copyright (c) 2014 Wind River Systems, Inc.
* Copyright (c) 2018 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -13,13 +12,12 @@
*/
#include <toolchain.h>
#include <linker/sections.h>
#include <sections.h>
#include <arch/cpu.h>
#include <swap_macros.h>
#include <syscall.h>
#include <arch/arc/asm-compat/assembler.h>
GTEXT(_Fault)
GTEXT(__reset)
GTEXT(__memory_error)
GTEXT(__instruction_error)
@@ -34,31 +32,18 @@ GTEXT(__ev_extension)
GTEXT(__ev_div_zero)
GTEXT(__ev_dc_error)
GTEXT(__ev_maligned)
#ifdef CONFIG_IRQ_OFFLOAD
GTEXT(z_irq_do_offload);
#endif
.macro _save_exc_regs_into_stack
#ifdef CONFIG_ARC_HAS_SECURE
/* ERSEC_STAT is IOW/RAZ in normal mode */
lr r0,[_ARC_V2_ERSEC_STAT]
st_s r0, [sp, ___isf_t_sec_stat_OFFSET]
#endif
LRR r0, [_ARC_V2_ERET]
STR r0, sp, ___isf_t_pc_OFFSET
LRR r0, [_ARC_V2_ERSTATUS]
STR r0, sp, ___isf_t_status32_OFFSET
.endm
.balign 4
SECTION_VAR(BSS, saved_stack_pointer)
.word 0
/*
* The exception handling will use top part of interrupt stack to
* get smaller memory footprint, because exception is not frequent.
* To reduce the impact on interrupt handling, especially nested interrupt
* the top part of interrupt stack cannot be too large, so add a check
* here
*/
#if CONFIG_ARC_EXCEPTION_STACK_SIZE > (CONFIG_ISR_STACK_SIZE >> 1)
#error "interrupt stack size is too small"
#if CONFIG_RGF_NUM_BANKS == 1
GDATA(_exception_stack)
SECTION_VAR(NOINIT, _exception_stack)
.space 512
/* note: QUARK_SE_C1000_SS can't afford 512B */
#else
GDATA(_firq_stack)
#endif
/*
@@ -73,196 +58,133 @@ SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_tlb_miss_d)
SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_prot_v)
SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_privilege_v)
SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_swi)
#ifndef CONFIG_IRQ_OFFLOAD
SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_trap)
#endif
SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_extension)
SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_div_zero)
SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_dc_error)
SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_maligned)
_exc_entry:
/*
* re-use the top part of interrupt stack as exception
* stack. If this top part is used by interrupt handling,
* and exception is raised, then here it's guaranteed that
* exception handling has necessary stack to use
*/
MOVR ilink, sp
_get_curr_cpu_irq_stack sp
SUBR sp, sp, (CONFIG_ISR_STACK_SIZE - CONFIG_ARC_EXCEPTION_STACK_SIZE)
/*
* save caller saved registers
* this stack frame is set up in exception stack,
* not in the original sp (thread stack or interrupt stack).
* Because the exception may be raised by stack checking or
* mpu protect violation related to stack. If this stack frame
* is setup in original sp, double exception may be raised during
* _create_irq_stack_frame, which is unrecoverable.
*/
_create_irq_stack_frame
_save_exc_regs_into_stack
/* sp is parameter of _Fault */
MOVR r0, sp
/* ilink is the thread's original sp */
MOVR r1, ilink
jl _Fault
_exc_return:
/* the exception cause must be fixed in exception handler when exception returns
* directly, or exception will be repeated.
*
* If thread switch is raised in exception handler, the context of old thread will
* not be saved, i.e., it cannot be recovered, because we don't know where the
* exception comes out, thread context?irq_context?nest irq context?
*/
_get_next_switch_handle
BREQR r0, r2, _exc_return_from_exc
MOVR r2, r0
#ifdef CONFIG_ARC_SECURE_FIRMWARE
/*
* sync up the ERSEC_STAT.ERM and SEC_STAT.IRM.
* use a fake interrupt return to simulate an exception turn.
* ERM and IRM record which mode the cpu should return, 1: secure
* 0: normal
*/
lr r3,[_ARC_V2_ERSEC_STAT]
btst r3, 31
bset.nz r3, r3, _ARC_V2_SEC_STAT_IRM_BIT
bclr.z r3, r3, _ARC_V2_SEC_STAT_IRM_BIT
sflag r3
#endif
/* clear AE bit to forget this was an exception, and go to
* register bank0 (if exception is raised in firq with 2 reg
* banks, then we may be bank1)
*/
#if defined(CONFIG_ARC_FIRQ) && CONFIG_RGF_NUM_BANKS != 1
/* save r2 in ilink because of the possible following reg
* bank switch
*/
mov ilink, r2
#endif
LRR r3, [_ARC_V2_STATUS32]
ANDR r3, r3, (~(_ARC_V2_STATUS32_AE | _ARC_V2_STATUS32_RB(7)))
kflag r3
/* pretend lowest priority interrupt happened to use common handler
* if exception is raised in irq, i.e., _ARC_V2_AUX_IRQ_ACT !=0,
* ignore irq handling, we cannot return to irq handling which may
* raise exception again. The ignored interrupts will be re-triggered
* if not cleared, or re-triggered by interrupt sources, or just missed
* Before invoking exception handler, the kernel switches to an exception
* stack, to save the faulting thread's registers.
* The exception is fatal and all the kernel can do is just print
* a diagnostic message and halt.
*/
#ifdef CONFIG_ARC_SECURE_FIRMWARE
mov_s r3, (1 << (ARC_N_IRQ_START_LEVEL - 1))
#else
MOVR r3, (1 << (CONFIG_NUM_IRQ_PRIO_LEVELS - 1))
#endif
#ifdef CONFIG_ARC_NORMAL_FIRMWARE
#ifdef CONFIG_ARC_STACK_CHECKING
push_s r2
mov_s r0, _ARC_V2_AUX_IRQ_ACT
mov_s r1, r3
mov_s r6, ARC_S_CALL_AUX_WRITE
sjli SJLI_CALL_ARC_SECURE
/* disable stack checking */
lr r2, [_ARC_V2_STATUS32]
bclr r2, r2, _ARC_V2_STATUS32_SC_BIT
kflag r2
pop_s r2
#endif
st sp, [saved_stack_pointer]
#if CONFIG_RGF_NUM_BANKS == 1
mov_s sp, _exception_stack
add sp, sp, 512
#else
SRR r3, [_ARC_V2_AUX_IRQ_ACT]
mov_s sp, _firq_stack
add sp, sp, CONFIG_FIRQ_STACK_SIZE
#endif
#if defined(CONFIG_ARC_FIRQ) && CONFIG_RGF_NUM_BANKS != 1
mov r2, ilink
#endif
/* Assumption: r2 has next thread */
b _rirq_newthread_switch
_exc_return_from_exc:
/* exception handler may change return address.
* reload it
*/
LDR r0, sp, ___isf_t_pc_OFFSET
SRR r0, [_ARC_V2_ERET]
_pop_irq_stack_frame
MOVR sp, ilink
rtie
/* separated entry for trap which may be used by irq_offload, USERPSACE */
SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_trap)
/* get the id of trap_s */
LRR ilink, [_ARC_V2_ECR]
ANDR ilink, ilink, 0x3f
#ifdef CONFIG_USERSPACE
cmp ilink, _TRAP_S_CALL_SYSTEM_CALL
bne _do_non_syscall_trap
/* do sys_call */
mov ilink, K_SYSCALL_LIMIT
cmp r6, ilink
blo valid_syscall_id
mov_s r0, r6
mov_s r6, K_SYSCALL_BAD
valid_syscall_id:
/* create a sys call frame
* caller regs (r0 - 12) are saved in _create_irq_stack_frame
* ok to use them later
*/
_create_irq_stack_frame
_save_exc_regs_into_stack
/* exc return and do sys call in kernel mode,
* so need to clear U bit, r0 is already loaded
* with ERSTATUS in _save_exc_regs_into_stack
*/
bclr r0, r0, _ARC_V2_STATUS32_U_BIT
sr r0, [_ARC_V2_ERSTATUS]
mov_s r0, _arc_do_syscall
sr r0, [_ARC_V2_ERET]
rtie
_do_non_syscall_trap:
#endif /* CONFIG_USERSPACE */
#ifdef CONFIG_IRQ_OFFLOAD
/*
* IRQ_OFFLOAD is to simulate interrupt handling through exception,
* so its entry is different with normal exception handling, it is
* handled in isr stack
*/
CMPR ilink, _TRAP_S_SCALL_IRQ_OFFLOAD
bne _exc_entry
/* save caller saved registers */
_create_irq_stack_frame
_save_exc_regs_into_stack
lr r0,[_ARC_V2_ERSTATUS]
st_s r0, [sp, ___isf_t_status32_OFFSET]
lr r0,[_ARC_V2_ERET]
st_s r0, [sp, ___isf_t_pc_OFFSET] /* eret into pc */
/* check whether irq stack is used */
_check_and_inc_int_nest_counter r0, r1
bne.d exc_nest_handle
MOVR r0, sp
_get_curr_cpu_irq_stack sp
exc_nest_handle:
PUSHR r0
jl z_irq_do_offload
POPR sp
_dec_int_nest_counter r0, r1
jl _Fault
/* if _Fault returns, restore the registers */
_pop_irq_stack_frame
/* ERSTATUS, ERET are not changed, so ok to rtie */
/* now restore the stack */
ld sp,[saved_stack_pointer]
rtie
#ifdef CONFIG_IRQ_OFFLOAD
GTEXT(_irq_do_offload);
SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_trap)
/*
* Before invoking exception handler, the kernel switches to an exception
* stack to save the faulting thread's registers.
* The exception is fatal and all the kernel can do is just print
* a diagnostic message and halt.
*/
#ifdef CONFIG_ARC_STACK_CHECKING
push_s r2
/* disable stack checking */
lr r2, [_ARC_V2_STATUS32]
bclr r2, r2, _ARC_V2_STATUS32_SC_BIT
kflag r2
pop_s r2
#endif
/* save caller saved registers */
_create_irq_stack_frame
lr r0,[_ARC_V2_ERSTATUS]
st_s r0, [sp, ___isf_t_status32_OFFSET]
lr r0,[_ARC_V2_ERET]
st_s r0, [sp, ___isf_t_pc_OFFSET] /* eret into pc */
jl _irq_do_offload
mov_s r1, _kernel
ld_s r2, [r1, _kernel_offset_to_current]
/* check if we're a nested interrupt: if so, let the
* interrupted interrupt handle the reschedule
*/
lr r3, [_ARC_V2_AUX_IRQ_ACT]
/* the OS on ARCv2 always runs in kernel mode, so assume bit31 [U] in
* AUX_IRQ_ACT is always 0: if the contents of AUX_IRQ_ACT is 0, it
* means trap was taken from outside an interrupt handler.
* But if it was inside, let that handler do the swap.
*/
breq r3, 0, _trap_check_for_swap
_trap_return:
_pop_irq_stack_frame
rtie
.balign 4
_trap_check_for_swap:
/*
* Non-preemptible thread ? Do not schedule (see explanation of
* preempt field in kernel_struct.h).
*/
ldh_s r0, [r2, _thread_offset_to_preempt]
brhs r0, _NON_PREEMPT_THRESHOLD, _trap_return
/* check if the current thread needs to be rescheduled */
ld_s r0, [r1, _kernel_offset_to_ready_q_cache]
breq r0, r2, _trap_return
_save_callee_saved_regs
st _CAUSE_RIRQ, [r2, _thread_offset_to_relinquish_cause]
/* note: Ok to use _CAUSE_RIRQ since everything is saved */
ld_s r2, [r1, _kernel_offset_to_ready_q_cache]
st_s r2, [r1, _kernel_offset_to_current]
/* clear AE bit to forget this was an exception */
lr r3, [_ARC_V2_STATUS32]
and r3,r3,(~_ARC_V2_STATUS32_AE)
kflag r3
/* pretend lowest priority interrupt happened to use common handler */
lr r3, [_ARC_V2_AUX_IRQ_ACT]
or r3,r3,(1<<(CONFIG_NUM_IRQ_PRIO_LEVELS-1)) /* use lowest */
sr r3, [_ARC_V2_AUX_IRQ_ACT]
/* Assumption: r2 has current thread */
b _rirq_common_interrupt_swap
#endif /* CONFIG_IRQ_OFFLOAD */
b _exc_entry

View File

@@ -19,105 +19,48 @@
#include <kernel.h>
#include <arch/cpu.h>
#include <sys/__assert.h>
#include <misc/__assert.h>
#include <toolchain.h>
#include <linker/sections.h>
#include <sections.h>
#include <sw_isr_table.h>
#include <irq.h>
#include <sys/printk.h>
/*
* storage space for the interrupt stack of fast_irq
*/
#if defined(CONFIG_ARC_FIRQ_STACK)
#if defined(CONFIG_SMP)
K_KERNEL_STACK_ARRAY_DEFINE(_firq_interrupt_stack, CONFIG_MP_NUM_CPUS,
CONFIG_ARC_FIRQ_STACK_SIZE);
#else
K_KERNEL_STACK_DEFINE(_firq_interrupt_stack, CONFIG_ARC_FIRQ_STACK_SIZE);
#endif
/**
* @brief Set the stack pointer for firq handling
*/
void z_arc_firq_stack_set(void)
{
#ifdef CONFIG_SMP
char *firq_sp = Z_KERNEL_STACK_BUFFER(
_firq_interrupt_stack[z_arc_v2_core_id()]) +
CONFIG_ARC_FIRQ_STACK_SIZE;
#else
char *firq_sp = Z_KERNEL_STACK_BUFFER(_firq_interrupt_stack) +
CONFIG_ARC_FIRQ_STACK_SIZE;
#endif
/* the z_arc_firq_stack_set must be called when irq diasbled, as
* it can be called not only in the init phase but also other places
*/
unsigned int key = arch_irq_lock();
__asm__ volatile (
/* only ilink will not be banked, so use ilink as channel
* between 2 banks
*/
"mov %%ilink, %0\n\t"
"lr %0, [%1]\n\t"
"or %0, %0, %2\n\t"
"kflag %0\n\t"
"mov %%sp, %%ilink\n\t"
/* switch back to bank0, use ilink to avoid the pollution of
* bank1's gp regs.
*/
"lr %%ilink, [%1]\n\t"
"and %%ilink, %%ilink, %3\n\t"
"kflag %%ilink\n\t"
:
: "r"(firq_sp), "i"(_ARC_V2_STATUS32),
"i"(_ARC_V2_STATUS32_RB(1)),
"i"(~_ARC_V2_STATUS32_RB(7))
);
arch_irq_unlock(key);
}
#endif
/**
* @brief Enable an interrupt line
*
* Clear possible pending interrupts on the line, and enable the interrupt
* line. After this call, the CPU will receive interrupts for the specified
* @a irq.
*
* @return N/A
*/
void arch_irq_enable(unsigned int irq)
void _arch_irq_enable(unsigned int irq)
{
z_arc_v2_irq_unit_int_enable(irq);
int key = irq_lock();
_arc_v2_irq_unit_int_enable(irq);
irq_unlock(key);
}
/**
/*
* @brief Disable an interrupt line
*
* Disable an interrupt line. After this call, the CPU will stop receiving
* interrupts for the specified @a irq.
*/
void arch_irq_disable(unsigned int irq)
{
z_arc_v2_irq_unit_int_disable(irq);
}
/**
* @brief Return IRQ enable state
*
* @param irq IRQ line
* @return interrupt enable state, true or false
* @return N/A
*/
int arch_irq_is_enabled(unsigned int irq)
void _arch_irq_disable(unsigned int irq)
{
return z_arc_v2_irq_unit_int_enabled(irq);
int key = irq_lock();
_arc_v2_irq_unit_int_disable(irq);
irq_unlock(key);
}
/**
/*
* @internal
*
* @brief Set an interrupt's priority
@@ -127,47 +70,37 @@ int arch_irq_is_enabled(unsigned int irq)
* The priority is verified if ASSERT_ON is enabled; max priority level
* depends on CONFIG_NUM_IRQ_PRIO_LEVELS.
*
* @return N/A
*/
void z_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
void _irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags)
{
ARG_UNUSED(flags);
int key = irq_lock();
__ASSERT(prio < CONFIG_NUM_IRQ_PRIO_LEVELS,
"invalid priority %d for irq %d", prio, irq);
/* 0 -> CONFIG_NUM_IRQ_PRIO_LEVELS allocted to secure world
* left prio levels allocated to normal world
*/
#if defined(CONFIG_ARC_SECURE_FIRMWARE)
prio = prio < ARC_N_IRQ_START_LEVEL ?
prio : (ARC_N_IRQ_START_LEVEL - 1);
#elif defined(CONFIG_ARC_NORMAL_FIRMWARE)
prio = prio < ARC_N_IRQ_START_LEVEL ?
ARC_N_IRQ_START_LEVEL : prio;
#endif
z_arc_v2_irq_unit_prio_set(irq, prio);
_arc_v2_irq_unit_prio_set(irq, prio);
irq_unlock(key);
}
/**
/*
* @brief Spurious interrupt handler
*
* Installed in all dynamic interrupt slots at boot time. Throws an error if
* called.
*
* @return N/A
*/
void z_irq_spurious(const void *unused)
#include <misc/printk.h>
void _irq_spurious(void *unused)
{
ARG_UNUSED(unused);
z_fatal_error(K_ERR_SPURIOUS_IRQ, NULL);
printk("_irq_spurious(). Spinning...\n");
for (;;)
;
}
#ifdef CONFIG_DYNAMIC_INTERRUPTS
int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
void (*routine)(const void *parameter),
const void *parameter, uint32_t flags)
{
z_isr_install(irq, routine, parameter);
z_irq_priority_set(irq, priority, flags);
return irq;
}
#endif /* CONFIG_DYNAMIC_INTERRUPTS */

View File

@@ -12,22 +12,24 @@
#include <irq_offload.h>
static irq_offload_routine_t offload_routine;
static const void *offload_param;
static void *offload_param;
/* Called by trap_s exception handler */
void z_irq_do_offload(void)
void _irq_do_offload(void)
{
offload_routine(offload_param);
}
void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
void irq_offload(irq_offload_routine_t routine, void *parameter)
{
int key;
key = irq_lock();
offload_routine = routine;
offload_param = parameter;
__asm__ volatile ("trap_s %[id]"
:
: [id] "i"(_TRAP_S_SCALL_IRQ_OFFLOAD) : );
__asm__ volatile ("trap_s 0");
irq_unlock(key);
}

View File

@@ -15,18 +15,24 @@
#include <offsets_short.h>
#include <toolchain.h>
#include <linker/sections.h>
#include <sections.h>
#include <sw_isr_table.h>
#include <kernel_structs.h>
#include <arch/cpu.h>
#include <swap_macros.h>
#include <arch/arc/asm-compat/assembler.h>
GTEXT(_isr_wrapper)
GTEXT(_isr_demux)
#if defined(CONFIG_PM)
GTEXT(z_pm_save_idle_exit)
#if CONFIG_RGF_NUM_BANKS == 1
GDATA(saved_r0)
.balign 4
SECTION_VAR(BSS, saved_r0)
.word 0
#endif
#if defined(CONFIG_SYS_POWER_MANAGEMENT)
GTEXT(_sys_power_save_idle_exit)
#endif
/*
@@ -36,38 +42,47 @@ _rirq_enter/_firq_enter: they are jump points.
The flow is the following:
ISR -> _isr_wrapper -- + -> _rirq_enter -> _isr_demux -> ISR -> _rirq_exit
|
+ -> _firq_enter -> _isr_demux -> ISR -> _firq_exit
|
+ -> _firq_enter -> _isr_demux -> ISR -> _firq_exit
Context switch explanation:
The context switch code is spread in these files:
isr_wrapper.s, switch.s, swap_macros.h, fast_irq.s, regular_irq.s
isr_wrapper.s, swap.s, swap_macros.s, fast_irq.s, regular_irq.s
IRQ stack frame layout:
high address
high address
status32
pc
lp_count
lp_start
lp_end
blink
r13
...
sp -> r0
status32
pc
lp_count
lp_start
lp_end
blink
r13
...
sp -> r0
low address
low address
Registers not taken into account in the current implementation.
jli_base
ldi_base
ei_base
accl
acch
The context switch code adopts this standard so that it is easier to follow:
- r2 contains _kernel.current ASAP, and the incoming thread when we
transition from outgoing thread to incoming thread
- r1 contains _kernel ASAP and is not overwritten over the lifespan of
the functions.
- r2 contains _kernel.current ASAP, and the incoming thread when we
transition from outgoing thread to incoming thread
Not loading _kernel into r0 allows loading _kernel without stomping on
the parameter in r0 in arch_switch().
the parameter in r0 in _Swap().
ARCv2 processors have two kinds of interrupts: fast (FIRQ) and regular. The
@@ -93,55 +108,53 @@ registers (to avoid stack accesses). It is possible to register a FIRQ
handler that operates outside of the kernel, but care must be taken to only
use instructions that only use the banked registers.
The kernel is able to handle transitions to and from FIRQ, RIRQ and threads.
The contexts are saved 'lazily': the minimum amount of work is
The kernel is able to handle transitions to and from FIRQ, RIRQ and threads
(fibers/task). The contexts are saved 'lazily': the minimum amount of work is
done upfront, and the rest is done when needed:
o RIRQ
All needed registers to run C code in the ISR are saved automatically
on the outgoing thread's stack: loop, status32, pc, and the caller-
saved GPRs. That stack frame layout is pre-determined. If returning
to a thread, the stack is popped and no registers have to be saved by
the kernel. If a context switch is required, the callee-saved GPRs
are then saved in the thread's stack.
All needed regisers to run C code in the ISR are saved automatically
on the outgoing thread's stack: loop, status32, pc, and the caller-
saved GPRs. That stack frame layout is pre-determined. If returning
to a fiber, the stack is popped and no registers have to be saved by
the kernel. If a context switch is required, the callee-saved GPRs
are then saved in the thread control structure (TCS).
o FIRQ
First, a FIRQ can be interrupting a lower-priority RIRQ: if this is
the case, the FIRQ does not take a scheduling decision and leaves it
the RIRQ to handle. This limits the amount of code that has to run at
interrupt-level.
First, a FIRQ can be interrupting a lower-priority RIRQ: if this is the case,
the FIRQ does not take a scheduling decision and leaves it the RIRQ to
handle. This limits the amount of code that has to run at interrupt-level.
CONFIG_RGF_NUM_BANKS==1 case:
Registers are saved on the stack frame just as they are for RIRQ.
Context switch can happen just as it does in the RIRQ case, however,
if the FIRQ interrupted a RIRQ, the FIRQ will return from interrupt
and let the RIRQ do the context switch. At entry, one register is
needed in order to have code to save other registers. r0 is saved
first in the stack and restored later
CONFIG_RGF_NUM_BANKS==1 case:
Registers are saved on the stack frame just as they are for RIRQ.
Context switch can happen just as it does in the RIRQ case, however,
if the FIRQ interrupted a RIRQ, the FIRQ will return from interrupt and
let the RIRQ do the context switch. At entry, one register is needed in order
to have code to save other registers. r0 is saved first in a global called
saved_r0.
CONFIG_RGF_NUM_BANKS!=1 case:
During early initialization, the sp in the 2nd register bank is made to
refer to _firq_stack. This allows for the FIRQ handler to use its own
stack. GPRs are banked, loop registers are saved in unused callee saved
regs upon interrupt entry. If returning to a thread, loop registers are
restored and the CPU switches back to bank 0 for the GPRs. If a context
switch is needed, at this point only are all the registers saved.
First, a stack frame with the same layout as the automatic RIRQ one is
created and then the callee-saved GPRs are saved in the stack.
status32_p0 and ilink are saved in this case, not status32 and pc.
To create the stack frame, the FIRQ handling code must first go back to
using bank0 of registers, since that is where the registers containing
the exiting thread are saved. Care must be taken not to touch any
register before saving them: the only one usable at that point is the
stack pointer.
CONFIG_RGF_NUM_BANKS!=1 case:
During early initialization, the sp in the 2nd register bank is made to
refer to _firq_stack. This allows for the FIRQ handler to use its own stack.
GPRs are banked, loop registers are saved in unused callee saved regs upon
interrupt entry. If returning to a fiber, loop registers are restored and the
CPU switches back to bank 0 for the GPRs. If a context switch is
needed, at this point only are all the registers saved. First, a
stack frame with the same layout as the automatic RIRQ one is created
and then the callee-saved GPRs are saved in the TCS. status32_p0 and
ilink are saved in this case, not status32 and pc.
To create the stack frame, the FIRQ handling code must first go back to using
bank0 of registers, since that is where the registers containing the exiting
thread are saved. Care must be taken not to touch any register before saving
them: the only one usable at that point is the stack pointer.
o coop
When a coop context switch is done, the callee-saved registers are
saved in the stack. The other GPRs do not need to be saved, since the
compiler has already placed them on the stack.
When a coop context switch is done, the callee-saved registers are
saved in the TCS. The other GPRs do not need to be saved, since the
compiler has already placed them on the stack.
For restoring the contexts, there are six cases. In all cases, the
callee-saved registers of the incoming thread have to be restored. Then, there
@@ -149,87 +162,102 @@ are specifics for each case:
From coop:
o to coop
o to coop
Do a normal function call return.
Restore interrupt lock level and do a normal function call return.
o to any irq
o to any irq
The incoming interrupted thread has an IRQ stack frame containing the
caller-saved registers that has to be popped. status32 has to be
restored, then we jump to the interrupted instruction.
The incoming interrupted thread has an IRQ stack frame containing the
caller-saved registers that has to be popped. status32 has to be restored,
then we jump to the interrupted instruction.
From FIRQ:
When CONFIG_RGF_NUM_BANKS==1, context switch is done as it is for RIRQ.
When CONFIG_RGF_NUM_BANKS!=1, the processor is put back to using bank0,
not bank1 anymore, because it had to save the outgoing context from
bank0, and now has to load the incoming one into bank0.
When CONFIG_RGF_NUM_BANKS==1, context switch is done as it is for RIRQ.
When CONFIG_RGF_NUM_BANKS!=1, the processor is put back to using bank0,
not bank1 anymore, because it had to save the outgoing context from bank0,
and now has to load the incoming one
into bank0.
o to coop
o to coop
The address of the returning instruction from arch_switch() is loaded
in ilink and the saved status32 in status32_p0.
The address of the returning instruction from _Swap() is loaded in ilink and
the saved status32 in status32_p0, taking care to adjust the interrupt lock
state desired in status32_p0. The return value is put in r0.
o to any irq
o to any irq
The IRQ has saved the caller-saved registers in a stack frame, which
must be popped, and status32 and pc loaded in status32_p0 and ilink.
The IRQ has saved the caller-saved registers in a stack frame, which must be
popped, and statu32 and pc loaded in status32_p0 and ilink.
From RIRQ:
o to coop
o to coop
The interrupt return mechanism in the processor expects a stack frame,
but the outgoing context did not create one. A fake one is created
here, with only the relevant values filled in: pc, status32.
The interrupt return mechanism in the processor expects a stack frame, but
the outgoing context did not create one. A fake one is created here, with
only the relevant values filled in: pc, status32 and the return value in r0.
There is a discrepancy between the ABI from the ARCv2 docs,
including the way the processor pushes GPRs in pairs in the IRQ stack
frame, and the ABI GCC uses. r13 should be a callee-saved register,
but GCC treats it as caller-saved. This means that the processor pushes
it in the stack frame along with r12, but the compiler does not save it
before entering a function. So, it is saved as part of the callee-saved
registers, and restored there, but the processor restores it _a second
time_ when popping the IRQ stack frame. Thus, the correct value must
also be put in the fake stack frame when returning to a thread that
context switched out cooperatively.
There is a discrepancy between the ABI from the ARCv2 docs, including the
way the processor pushes GPRs in pairs in the IRQ stack frame, and the ABI
GCC uses. r13 should be a callee-saved register, but GCC treats it as
caller-saved. This means that the processor pushes it in the stack frame
along with r12, but the compiler does not save it before entering a
function. So, it is saved as part of the callee-saved registers, and
restored there, but the processor restores it _a second time_ when popping
the IRQ stack frame. Thus, the correct value must also be put in the fake
stack frame when returning to a thread that context switched out
cooperatively.
o to any irq
o to any irq
Both types of IRQs already have an IRQ stack frame: simply return from
interrupt.
Both types of IRQs already have an IRQ stack frame: simply return from
interrupt.
*/
SECTION_FUNC(TEXT, _isr_wrapper)
#ifdef CONFIG_ARC_FIRQ
#if CONFIG_RGF_NUM_BANKS == 1
/* free r0 here, use r0 to check whether irq is firq.
* for rirq, as sp will not change and r0 already saved, this action
* in fact is useless
* for firq, r0 will be restored later
*/
push r0
st r0,[saved_r0]
#endif
lr r0, [_ARC_V2_AUX_IRQ_ACT]
ffs r0, r0
cmp r0, 0
#if CONFIG_RGF_NUM_BANKS == 1
bnz rirq_path
pop r0
/* 1-register bank FIRQ handling must save registers on stack */
_create_irq_stack_frame
lr r0, [_ARC_V2_STATUS32_P0]
st_s r0, [sp, ___isf_t_status32_OFFSET]
st ilink, [sp, ___isf_t_pc_OFFSET]
mov_s r3, _firq_exit
mov_s r2, _firq_enter
lr r0,[_ARC_V2_STATUS32_P0]
push_s r0
mov r0,ilink
push_s r0
mov r0,lp_count
push_s r0
lr r0, [_ARC_V2_LP_START]
push_s r0
lr r0, [_ARC_V2_LP_END]
push_s r0
push_s blink
push_s r13
push_s r12
push r11
push r10
push r9
push r8
push r7
push r6
push r5
push r4
push_s r3
push_s r2
push_s r1
ld r0,[saved_r0]
push_s r0
mov r3, _firq_exit
mov r2, _firq_enter
j_s [r2]
rirq_path:
add sp, sp, 4
mov_s r3, _rirq_exit
mov_s r2, _rirq_enter
mov r3, _rirq_exit
mov r2, _rirq_enter
j_s [r2]
#else
mov.z r3, _firq_exit
@@ -238,86 +266,82 @@ rirq_path:
mov.nz r2, _rirq_enter
j_s [r2]
#endif
#ifdef CONFIG_KERNEL_EVENT_LOGGER_SLEEP
GTEXT(_sys_k_event_logger_exit_sleep)
.macro log_sleep_k_event
clri r0 /* do not interrupt event logger operations */
push_s r0
push_s blink
jl _sys_k_event_logger_exit_sleep
pop_s blink
pop_s r0
seti r0
.endm
#else
MOVR r3, _rirq_exit
MOVR r2, _rirq_enter
j_s [r2]
#define log_sleep_k_event
#endif
#if defined(CONFIG_KERNEL_EVENT_LOGGER_INTERRUPT)
GTEXT(_sys_k_event_logger_interrupt)
.macro log_interrupt_k_event
clri r0 /* do not interrupt event logger operations */
push_s r0
push_s blink
jl _sys_k_event_logger_interrupt
pop_s blink
pop_s r0
seti r0
.endm
#else
#define log_interrupt_k_event
#endif
/* r0, r1, and r3 will be used in exit_tickless_idle macro */
#if defined(CONFIG_SYS_POWER_MANAGEMENT)
.macro exit_tickless_idle
#if defined(CONFIG_PM)
clri r0 /* do not interrupt exiting tickless idle operations */
MOVR r1, _kernel
breq r3, 0, _skip_pm_save_idle_exit
push_s r1
push_s r0
mov_s r1, _kernel
ld_s r0, [r1, _kernel_offset_to_idle] /* requested idle duration */
breq r0, 0, _skip_sys_power_save_idle_exit
st 0, [r1, _kernel_offset_to_idle] /* zero idle duration */
PUSHR blink
jl z_pm_save_idle_exit
POPR blink
push_s blink
jl _sys_power_save_idle_exit
pop_s blink
_skip_pm_save_idle_exit:
_skip_sys_power_save_idle_exit:
pop_s r0
pop_s r1
seti r0
#endif
.endm
#else
#define exit_tickless_idle
#endif
/* when getting here, r3 contains the interrupt exit stub to call */
SECTION_FUNC(TEXT, _isr_demux)
PUSHR r3
push_s r3
/* according to ARCv2 ISA, r25, r30, r58, r59 are caller-saved
* scratch registers, possibly used by interrupt handlers
*/
PUSHR r25
PUSHR r30
#ifdef CONFIG_ARC_HAS_ACCL_REGS
PUSHR r58
PUSHR r59
#endif
#ifdef CONFIG_SCHED_THREAD_USAGE
bl z_sched_usage_stop
#endif
#ifdef CONFIG_TRACING_ISR
bl sys_trace_isr_enter
#endif
/* cannot be done before this point because we must be able to run C */
/* r0 is available to be stomped here, and exit_tickless_idle uses it */
exit_tickless_idle
log_interrupt_k_event
log_sleep_k_event
lr r0, [_ARC_V2_ICAUSE]
/* handle software triggered interrupt */
lr r3, [_ARC_V2_AUX_IRQ_HINT]
brne r3, r0, irq_hint_handled
sr 0, [_ARC_V2_AUX_IRQ_HINT]
irq_hint_handled:
sub r0, r0, 16
MOVR r1, _sw_isr_table
/* SW ISR table entries are 8-bytes wide for 32bit ISA and
* 16-bytes wide for 64bit ISA */
ASLR r0, r0, (ARC_REGSHIFT + 1)
ADDR r0, r1, r0
/* ISR into r1 */
LDR r1, r0, ARC_REGSZ
mov r1, _sw_isr_table
add3 r0, r1, r0 /* table entries are 8-bytes wide */
ld_s r1, [r0, 4] /* ISR into r1 */
jl_s.d [r1]
/* delay slot: ISR parameter into r0 */
LDR r0, r0
#ifdef CONFIG_TRACING_ISR
bl sys_trace_isr_exit
#endif
#ifdef CONFIG_ARC_HAS_ACCL_REGS
POPR r59
POPR r58
#endif
POPR r30
POPR r25
ld_s r0, [r0] /* delay slot: ISR parameter into r0 */
/* back from ISR, jump to exit stub */
POPR r3
pop_s r3
j_s [r3]
nop_s
nop

View File

@@ -1,6 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
zephyr_library()
zephyr_library_sources_ifdef(CONFIG_ARC_CORE_MPU arc_core_mpu.c)
zephyr_library_sources_ifdef(CONFIG_ARC_MPU arc_mpu.c)

View File

@@ -1,39 +0,0 @@
# Memory Protection Unit (MPU) configuration options
# Copyright (c) 2017 Synopsys
# SPDX-License-Identifier: Apache-2.0
config ARC_MPU_VER
int "ARC MPU version"
range 2 6
default 2
help
ARC MPU has several versions. For MPU v2, the minimum region is 2048 bytes;
For other versions, the minimum region is 32 bytes; v4 has secure features,
v6 supports up to 32 regions.
config ARC_CORE_MPU
bool "ARC Core MPU functionalities"
help
ARC core MPU functionalities
config MPU_STACK_GUARD
bool "Thread Stack Guards"
depends on ARC_CORE_MPU && ARC_MPU_VER !=2
help
Enable thread stack guards via MPU. ARC supports built-in stack protection.
If your core supports that, it is preferred over MPU stack guard.
For ARC_MPU_VER == 2, it requires 2048 extra bytes and a strong start address
alignment, this will bring big waste of memory, so no support for it.
config ARC_MPU
bool "ARC MPU Support"
select MPU
select SRAM_REGION_PERMISSIONS
select ARC_CORE_MPU
select THREAD_STACK_INFO
select GEN_PRIV_STACKS if ARC_MPU_VER != 4
select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if ARC_MPU_VER !=4
select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if ARC_MPU_VER = 4
help
Target has ARC MPU (currently only works for EMSK 2.2/2.3 ARCEM7D)

View File

@@ -1,43 +0,0 @@
/*
* Copyright (c) 2017 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <device.h>
#include <init.h>
#include <kernel.h>
#include <soc.h>
#include <arch/arc/v2/mpu/arc_core_mpu.h>
#include <kernel_structs.h>
/*
* @brief Configure MPU for the thread
*
* This function configures per thread memory map reprogramming the MPU.
*
* @param thread thread info data structure.
*/
void configure_mpu_thread(struct k_thread *thread)
{
arc_core_mpu_disable();
arc_core_mpu_configure_thread(thread);
arc_core_mpu_enable();
}
#if defined(CONFIG_USERSPACE)
int arch_mem_domain_max_partitions_get(void)
{
return arc_core_mpu_get_max_domain_partition_regions();
}
/*
* Validate the given buffer is user accessible or not
*/
int arch_buffer_validate(void *addr, size_t size, int write)
{
return arc_core_mpu_buffer_validate(addr, size, write);
}
#endif

View File

@@ -1,59 +0,0 @@
/*
* Copyright (c) 2019 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <device.h>
#include <init.h>
#include <kernel.h>
#include <soc.h>
#include <arch/arc/v2/aux_regs.h>
#include <arch/arc/v2/mpu/arc_mpu.h>
#include <arch/arc/v2/mpu/arc_core_mpu.h>
#include <linker/linker-defs.h>
#define LOG_LEVEL CONFIG_MPU_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(mpu);
/**
* @brief Get the number of supported MPU regions
*
*/
static inline uint8_t get_num_regions(void)
{
uint32_t num = z_arc_v2_aux_reg_read(_ARC_V2_MPU_BUILD);
num = (num & 0xFF00U) >> 8U;
return (uint8_t)num;
}
/**
* This internal function is utilized by the MPU driver to parse the intent
* type (i.e. THREAD_STACK_REGION) and return the correct parameter set.
*/
static inline uint32_t get_region_attr_by_type(uint32_t type)
{
switch (type) {
case THREAD_STACK_USER_REGION:
return REGION_RAM_ATTR;
case THREAD_STACK_REGION:
return AUX_MPU_ATTR_KW | AUX_MPU_ATTR_KR;
case THREAD_APP_DATA_REGION:
return REGION_RAM_ATTR;
case THREAD_STACK_GUARD_REGION:
/* no Write and Execute to guard region */
return AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR;
default:
/* unknown type */
return 0;
}
}
#if CONFIG_ARC_MPU_VER == 4
#include "arc_mpu_v4_internal.h"
#else
#include "arc_mpu_common_internal.h"
#endif

View File

@@ -1,288 +0,0 @@
/*
* Copyright (c) 2021 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_COMMON_INTERNAL_H_
#define ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_COMMON_INTERNAL_H_
#if CONFIG_ARC_MPU_VER == 2 || CONFIG_ARC_MPU_VER == 3
#include "arc_mpu_v2_internal.h"
#elif CONFIG_ARC_MPU_VER == 6
#include "arc_mpu_v6_internal.h"
#else
#error "Unsupported MPU version"
#endif
/**
* @brief configure the base address and size for an MPU region
*
* @param type MPU region type
* @param base base address in RAM
* @param size size of the region
*/
static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size)
{
int32_t region_index = get_region_index_by_type(type);
uint32_t region_attr = get_region_attr_by_type(type);
LOG_DBG("Region info: 0x%x 0x%x", base, size);
if (region_attr == 0U || region_index < 0) {
return -EINVAL;
}
/*
* For ARC MPU, MPU regions can be overlapped, smaller
* region index has higher priority.
*/
_region_init(region_index, base, size, region_attr);
return 0;
}
/* ARC Core MPU Driver API Implementation for ARC MP */
/**
* @brief enable the MPU
*/
void arc_core_mpu_enable(void)
{
/* Enable MPU */
z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN,
z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) | AUX_MPU_EN_ENABLE);
}
/**
* @brief disable the MPU
*/
void arc_core_mpu_disable(void)
{
/* Disable MPU */
z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN,
z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) & AUX_MPU_EN_DISABLE);
}
/**
* @brief configure the thread's MPU regions
*
* @param thread the target thread
*/
void arc_core_mpu_configure_thread(struct k_thread *thread)
{
#if defined(CONFIG_USERSPACE)
/* configure stack region of user thread */
if (thread->base.user_options & K_USER) {
LOG_DBG("configure user thread %p's stack", thread);
if (_mpu_configure(THREAD_STACK_USER_REGION,
(uint32_t)thread->stack_info.start,
thread->stack_info.size) < 0) {
LOG_ERR("user thread %p's stack failed", thread);
return;
}
}
LOG_DBG("configure thread %p's domain", thread);
arc_core_mpu_configure_mem_domain(thread);
#endif
}
/**
* @brief configure the default region
*
* @param region_attr region attribute of default region
*/
void arc_core_mpu_default(uint32_t region_attr)
{
uint32_t val = z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) & (~AUX_MPU_RDP_ATTR_MASK);
region_attr &= AUX_MPU_RDP_ATTR_MASK;
z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, region_attr | val);
}
/**
* @brief configure the MPU region
*
* @param index MPU region index
* @param base base address
* @param region_attr region attribute
*/
int arc_core_mpu_region(uint32_t index, uint32_t base, uint32_t size, uint32_t region_attr)
{
if (index >= get_num_regions()) {
return -EINVAL;
}
region_attr &= AUX_MPU_RDP_ATTR_MASK;
_region_init(index, base, size, region_attr);
return 0;
}
#if defined(CONFIG_USERSPACE)
/**
* @brief configure MPU regions for the memory partitions of the memory domain
*
* @param thread the thread which has memory domain
*/
void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
{
int region_index = get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
uint32_t num_partitions;
struct k_mem_partition *pparts;
struct k_mem_domain *mem_domain = NULL;
if (thread) {
mem_domain = thread->mem_domain_info.mem_domain;
}
if (mem_domain) {
LOG_DBG("configure domain: %p", mem_domain);
num_partitions = mem_domain->num_partitions;
pparts = mem_domain->partitions;
} else {
LOG_DBG("disable domain partition regions");
num_partitions = 0U;
pparts = NULL;
}
for (; region_index >= 0; region_index--) {
if (num_partitions) {
LOG_DBG("set region 0x%x 0x%lx 0x%x",
region_index, pparts->start, pparts->size);
_region_init(region_index, pparts->start, pparts->size, pparts->attr);
num_partitions--;
} else {
/* clear the left mpu entries */
_region_init(region_index, 0, 0, 0);
}
pparts++;
}
}
/**
* @brief remove MPU regions for the memory partitions of the memory domain
*
* @param mem_domain the target memory domain
*/
void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain)
{
ARG_UNUSED(mem_domain);
int region_index = get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
for (; region_index >= 0; region_index--) {
_region_init(region_index, 0, 0, 0);
}
}
/**
* @brief reset MPU region for a single memory partition
*
* @param domain the target memory domain
* @param partition_id memory partition id
*/
void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain, uint32_t part_id)
{
ARG_UNUSED(domain);
int region_index = get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
LOG_DBG("disable region 0x%x", region_index + part_id);
/* Disable region */
_region_init(region_index + part_id, 0, 0, 0);
}
/**
* @brief get the maximum number of free regions for memory domain partitions
*/
int arc_core_mpu_get_max_domain_partition_regions(void)
{
return get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION) + 1;
}
/**
* @brief validate the given buffer is user accessible or not
*/
int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
{
/*
* For ARC MPU, smaller region number takes priority.
* we can stop the iteration immediately once we find the
* matched region that grants permission or denies access.
*
*/
for (int r_index = 0; r_index < get_num_regions(); r_index++) {
if (!_is_enabled_region(r_index) || !_is_in_region(r_index, (uint32_t)addr, size)) {
continue;
}
if (_is_user_accessible_region(r_index, write)) {
return 0;
} else {
return -EPERM;
}
}
return -EPERM;
}
#endif /* CONFIG_USERSPACE */
/* ARC MPU Driver Initial Setup */
/*
* @brief MPU default initialization and configuration
*
* This function provides the default configuration mechanism for the Memory
* Protection Unit (MPU).
*/
static int arc_mpu_init(const struct device *arg)
{
ARG_UNUSED(arg);
uint32_t num_regions = get_num_regions();
if (mpu_config.num_regions > num_regions) {
__ASSERT(0, "Request to configure: %u regions (supported: %u)\n",
mpu_config.num_regions, num_regions);
return -EINVAL;
}
/* Disable MPU */
arc_core_mpu_disable();
/*
* the MPU regions are filled in the reverse order.
* According to ARCv2 ISA, the MPU region with smaller
* index has higher priority. The static background MPU
* regions in mpu_config will be in the bottom. Then
* the special type regions will be above.
*/
int r_index = num_regions - mpu_config.num_regions;
/* clear all the regions first */
for (uint32_t i = 0U; i < r_index; i++) {
_region_init(i, 0, 0, 0);
}
/* configure the static regions */
for (uint32_t i = 0U; i < mpu_config.num_regions; i++) {
_region_init(r_index, mpu_config.mpu_regions[i].base,
mpu_config.mpu_regions[i].size, mpu_config.mpu_regions[i].attr);
r_index++;
}
/* default region: no read, write and execute */
arc_core_mpu_default(0);
/* Enable MPU */
arc_core_mpu_enable();
return 0;
}
SYS_INIT(arc_mpu_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_COMMON_INTERNAL_H_ */

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@@ -1,163 +0,0 @@
/*
* Copyright (c) 2019 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V2_INTERNAL_H_
#define ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V2_INTERNAL_H_
#define AUX_MPU_EN_ENABLE BIT(30)
#define AUX_MPU_EN_DISABLE ~BIT(30)
/*
* The size of the region is a 5-bit field, the three MSB bits are
* represented in [11:9] and the two LSB bits are represented in [1:0].
* Together these fields specify the size of the region in bytes:
* 00000-00011 Reserved
* 0x4 32 0x5 64 0x6 128 0x7 256
* 0x8 512 0x9 1k 0xA 2K 0xB 4K
* 0xC 8K 0xD 16K 0xE 32K 0xF 64K
* 0x10 128K 0x11 256K 0x12 512K 0x13 1M
* 0x14 2M 0x15 4M 0x16 8M 0x17 16M
* 0x18 32M 0x19 64M 0x1A 128M 0x1B 256M
* 0x1C 512M 0x1D 1G 0x1E 2G 0x1F 4G
*
* Bit ... 12 11 10 9 8 3 2 1 0
* ------+------------+------+---+-----------+
* ... | SIZE[11:9] | ATTR | R | SIZE[1:0] |
* ------+------------+------+---+-----------+
*/
/* arrange size into proper bit field in RDP aux reg*/
#define AUX_MPU_RDP_REGION_SIZE(size) (((size - 1) & BIT_MASK(2)) | \
(((size - 1) & (BIT_MASK(3) << 2)) << 7))
/* recover size from bit fields in RDP aux reg*/
#define AUX_MPU_RDP_SIZE_SHIFT(rdp) ((rdp & BIT_MASK(2)) | (((rdp >> 9) & BIT_MASK(3)) << 2))
#define AUX_MPU_RDB_VALID_MASK BIT(0)
#define AUX_MPU_RDP_ATTR_MASK (BIT_MASK(6) << 3)
#define AUX_MPU_RDP_SIZE_MASK ((BIT_MASK(3) << 9) | BIT_MASK(2))
/* For MPU version 2, the minimum protection region size is 2048 bytes */
#if CONFIG_ARC_MPU_VER == 2
#define ARC_FEATURE_MPU_ALIGNMENT_BITS 11
/* For MPU version 3, the minimum protection region size is 32 bytes */
#else
#define ARC_FEATURE_MPU_ALIGNMENT_BITS 5
#endif
/**
* This internal function initializes a MPU region
*/
static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size,
uint32_t region_attr)
{
index = index * 2U;
if (size > 0) {
uint8_t bits = find_msb_set(size) - 1;
if (bits < ARC_FEATURE_MPU_ALIGNMENT_BITS) {
bits = ARC_FEATURE_MPU_ALIGNMENT_BITS;
}
if (BIT(bits) < size) {
bits++;
}
region_attr &= ~(AUX_MPU_RDP_SIZE_MASK);
region_attr |= AUX_MPU_RDP_REGION_SIZE(bits);
region_addr |= AUX_MPU_RDB_VALID_MASK;
} else {
region_addr = 0U;
}
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDP0 + index, region_attr);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDB0 + index, region_addr);
}
/**
* This internal function is utilized by the MPU driver to parse the intent
* type (i.e. THREAD_STACK_REGION) and return the correct region index.
*/
static inline int get_region_index_by_type(uint32_t type)
{
/*
* The new MPU regions are allocated per type after the statically
* configured regions. The type is one-indexed rather than
* zero-indexed.
*
* For ARC MPU v2, the smaller index has higher priority, so the
* index is allocated in reverse order. Static regions start from
* the biggest index, then thread related regions.
*
*/
switch (type) {
case THREAD_STACK_USER_REGION:
return get_num_regions() - mpu_config.num_regions - THREAD_STACK_REGION;
case THREAD_STACK_REGION:
case THREAD_APP_DATA_REGION:
case THREAD_DOMAIN_PARTITION_REGION:
/*
* Start domain partition region from stack guard region
* since stack guard is not supported.
*/
return get_num_regions() - mpu_config.num_regions - type + 1;
default:
__ASSERT(0, "Unsupported type");
return -EINVAL;
}
}
/**
* This internal function checks if region is enabled or not
*/
static inline bool _is_enabled_region(uint32_t r_index)
{
return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDB0 + r_index * 2U)
& AUX_MPU_RDB_VALID_MASK) == AUX_MPU_RDB_VALID_MASK);
}
/**
* This internal function check if the given buffer in in the region
*/
static inline bool _is_in_region(uint32_t r_index, uint32_t start, uint32_t size)
{
uint32_t r_addr_start;
uint32_t r_addr_end;
uint32_t r_size_lshift;
r_addr_start = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDB0 + r_index * 2U)
& (~AUX_MPU_RDB_VALID_MASK);
r_size_lshift = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDP0 + r_index * 2U)
& AUX_MPU_RDP_SIZE_MASK;
r_size_lshift = AUX_MPU_RDP_SIZE_SHIFT(r_size_lshift);
r_addr_end = r_addr_start + (1 << (r_size_lshift + 1));
if (start >= r_addr_start && (start + size) <= r_addr_end) {
return true;
}
return false;
}
/**
* This internal function check if the region is user accessible or not
*/
static inline bool _is_user_accessible_region(uint32_t r_index, int write)
{
uint32_t r_ap;
r_ap = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDP0 + r_index * 2U);
r_ap &= AUX_MPU_RDP_ATTR_MASK;
if (write) {
return ((r_ap & (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW)) ==
(AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW));
}
return ((r_ap & (AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR)) ==
(AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR));
}
#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V2_INTERNAL_H_ */

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@@ -1,896 +0,0 @@
/*
* Copyright (c) 2019 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V4_INTERNAL_H_
#define ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V4_INTERNAL_H_
#define AUX_MPU_RPER_SID1 0x10000
/* valid mask: SID1+secure+valid */
#define AUX_MPU_RPER_VALID_MASK ((0x1) | AUX_MPU_RPER_SID1 | AUX_MPU_ATTR_S)
#define AUX_MPU_RPER_ATTR_MASK (0x1FF)
/* For MPU version 4, the minimum protection region size is 32 bytes */
#define ARC_FEATURE_MPU_ALIGNMENT_BITS 5
#define CALC_REGION_END_ADDR(start, size) \
(start + size - (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS))
/* ARC MPU version 4 does not support mpu region overlap in hardware
* so if we want to allocate MPU region dynamically, e.g. thread stack,
* memory domain from a background region, a dynamic region splitting
* approach is designed. pls see comments in
* _dynamic_region_allocate_and_init
* But this approach has an impact on performance of thread switch.
* As a trade off, we can use the default mpu region as the background region
* to avoid the dynamic region splitting. This will give more privilege to
* codes in kernel mode which can access the memory region not covered by
* explicit mpu entry. Considering memory protection is mainly used to
* isolate malicious codes in user mode, it makes sense to get better
* thread switch performance through default mpu region.
* CONFIG_MPU_GAP_FILLING is used to turn this on/off.
*
*/
#if defined(CONFIG_MPU_GAP_FILLING)
#if defined(CONFIG_USERSPACE) && defined(CONFIG_MPU_STACK_GUARD)
/* 1 for stack guard , 1 for user thread, 1 for split */
#define MPU_REGION_NUM_FOR_THREAD 3
#elif defined(CONFIG_USERSPACE) || defined(CONFIG_MPU_STACK_GUARD)
/* 1 for stack guard or user thread stack , 1 for split */
#define MPU_REGION_NUM_FOR_THREAD 2
#else
#define MPU_REGION_NUM_FOR_THREAD 0
#endif
#define MPU_DYNAMIC_REGION_AREAS_NUM 2
/**
* @brief internal structure holding information of
* memory areas where dynamic MPU programming is allowed.
*/
struct dynamic_region_info {
uint8_t index;
uint32_t base;
uint32_t size;
uint32_t attr;
};
static uint8_t dynamic_regions_num;
static uint8_t dynamic_region_index;
/**
* Global array, holding the MPU region index of
* the memory region inside which dynamic memory
* regions may be configured.
*/
static struct dynamic_region_info dyn_reg_info[MPU_DYNAMIC_REGION_AREAS_NUM];
#endif /* CONFIG_MPU_GAP_FILLING */
static uint8_t static_regions_num;
#ifdef CONFIG_ARC_NORMAL_FIRMWARE
/* \todo through secure service to access mpu */
static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size,
uint32_t region_attr)
{
}
static inline void _region_set_attr(uint32_t index, uint32_t attr)
{
}
static inline uint32_t _region_get_attr(uint32_t index)
{
return 0;
}
static inline uint32_t _region_get_start(uint32_t index)
{
return 0;
}
static inline void _region_set_start(uint32_t index, uint32_t start)
{
}
static inline uint32_t _region_get_end(uint32_t index)
{
return 0;
}
static inline void _region_set_end(uint32_t index, uint32_t end)
{
}
/**
* This internal function probes the given addr's MPU index.if not
* in MPU, returns error
*/
static inline int _mpu_probe(uint32_t addr)
{
return -EINVAL;
}
/**
* This internal function checks if MPU region is enabled or not
*/
static inline bool _is_enabled_region(uint32_t r_index)
{
return false;
}
/**
* This internal function check if the region is user accessible or not
*/
static inline bool _is_user_accessible_region(uint32_t r_index, int write)
{
return false;
}
#else /* CONFIG_ARC_NORMAL_FIRMWARE */
/* the following functions are prepared for SECURE_FRIMWARE */
static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size,
uint32_t region_attr)
{
if (size < (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS)) {
size = (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS);
}
if (region_attr) {
region_attr &= AUX_MPU_RPER_ATTR_MASK;
region_attr |= AUX_MPU_RPER_VALID_MASK;
}
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RSTART, region_addr);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_REND,
CALC_REGION_END_ADDR(region_addr, size));
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, region_attr);
}
static inline void _region_set_attr(uint32_t index, uint32_t attr)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, attr |
AUX_MPU_RPER_VALID_MASK);
}
static inline uint32_t _region_get_attr(uint32_t index)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
return z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER);
}
static inline uint32_t _region_get_start(uint32_t index)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
return z_arc_v2_aux_reg_read(_ARC_V2_MPU_RSTART);
}
static inline void _region_set_start(uint32_t index, uint32_t start)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RSTART, start);
}
static inline uint32_t _region_get_end(uint32_t index)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
return z_arc_v2_aux_reg_read(_ARC_V2_MPU_REND) +
(1 << ARC_FEATURE_MPU_ALIGNMENT_BITS);
}
static inline void _region_set_end(uint32_t index, uint32_t end)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_REND, end -
(1 << ARC_FEATURE_MPU_ALIGNMENT_BITS));
}
/**
* This internal function probes the given addr's MPU index.if not
* in MPU, returns error
*/
static inline int _mpu_probe(uint32_t addr)
{
uint32_t val;
z_arc_v2_aux_reg_write(_ARC_V2_MPU_PROBE, addr);
val = z_arc_v2_aux_reg_read(_ARC_V2_MPU_INDEX);
/* if no match or multiple regions match, return error */
if (val & 0xC0000000) {
return -EINVAL;
} else {
return val;
}
}
/**
* This internal function checks if MPU region is enabled or not
*/
static inline bool _is_enabled_region(uint32_t r_index)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index);
return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER) &
AUX_MPU_RPER_VALID_MASK) == AUX_MPU_RPER_VALID_MASK);
}
/**
* This internal function check if the region is user accessible or not
*/
static inline bool _is_user_accessible_region(uint32_t r_index, int write)
{
uint32_t r_ap;
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index);
r_ap = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER);
r_ap &= AUX_MPU_RPER_ATTR_MASK;
if (write) {
return ((r_ap & (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW)) ==
(AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW));
}
return ((r_ap & (AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR)) ==
(AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR));
}
#endif /* CONFIG_ARC_NORMAL_FIRMWARE */
/**
* This internal function checks the area given by (start, size)
* and returns the index if the area match one MPU entry
*/
static inline int _get_region_index(uint32_t start, uint32_t size)
{
int index = _mpu_probe(start);
if (index > 0 && index == _mpu_probe(start + size - 1)) {
return index;
}
return -EINVAL;
}
#if defined(CONFIG_MPU_GAP_FILLING)
/**
* This internal function allocates a dynamic MPU region and returns
* the index or error
*/
static inline int _dynamic_region_allocate_index(void)
{
if (dynamic_region_index >= get_num_regions()) {
LOG_ERR("no enough mpu entries %d", dynamic_region_index);
return -EINVAL;
}
return dynamic_region_index++;
}
/* @brief allocate and init a dynamic MPU region
*
* This internal function performs the allocation and initialization of
* a dynamic MPU region
*
* @param base region base
* @param size region size
* @param attr region attribute
* @return <0 failure, >0 allocated dynamic region index
*/
static int _dynamic_region_allocate_and_init(uint32_t base, uint32_t size,
uint32_t attr)
{
int u_region_index = _get_region_index(base, size);
int region_index;
LOG_DBG("Region info: base 0x%x size 0x%x attr 0x%x", base, size, attr);
if (u_region_index == -EINVAL) {
/* no underlying region */
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
/* a new region */
_region_init(region_index, base, size, attr);
}
return region_index;
}
/*
* The new memory region is to be placed inside the underlying
* region, possibly splitting the underlying region into two.
*/
uint32_t u_region_start = _region_get_start(u_region_index);
uint32_t u_region_end = _region_get_end(u_region_index);
uint32_t u_region_attr = _region_get_attr(u_region_index);
uint32_t end = base + size;
if ((base == u_region_start) && (end == u_region_end)) {
/* The new region overlaps entirely with the
* underlying region. In this case we simply
* update the partition attributes of the
* underlying region with those of the new
* region.
*/
_region_init(u_region_index, base, size, attr);
region_index = u_region_index;
} else if (base == u_region_start) {
/* The new region starts exactly at the start of the
* underlying region; the start of the underlying
* region needs to be set to the end of the new region.
*/
_region_set_start(u_region_index, base + size);
_region_set_attr(u_region_index, u_region_attr);
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
_region_init(region_index, base, size, attr);
}
} else if (end == u_region_end) {
/* The new region ends exactly at the end of the
* underlying region; the end of the underlying
* region needs to be set to the start of the
* new region.
*/
_region_set_end(u_region_index, base);
_region_set_attr(u_region_index, u_region_attr);
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
_region_init(region_index, base, size, attr);
}
} else {
/* The new region lies strictly inside the
* underlying region, which needs to split
* into two regions.
*/
_region_set_end(u_region_index, base);
_region_set_attr(u_region_index, u_region_attr);
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
_region_init(region_index, base, size, attr);
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
_region_init(region_index, base + size,
u_region_end - end, u_region_attr);
}
}
}
return region_index;
}
/* @brief reset the dynamic MPU regions
*
* This internal function performs the reset of dynamic MPU regions
*/
static void _mpu_reset_dynamic_regions(void)
{
uint32_t i;
uint32_t num_regions = get_num_regions();
for (i = static_regions_num; i < num_regions; i++) {
_region_init(i, 0, 0, 0);
}
for (i = 0U; i < dynamic_regions_num; i++) {
_region_init(
dyn_reg_info[i].index,
dyn_reg_info[i].base,
dyn_reg_info[i].size,
dyn_reg_info[i].attr);
}
/* dynamic regions are after static regions */
dynamic_region_index = static_regions_num;
}
/**
* @brief configure the base address and size for an MPU region
*
* @param type MPU region type
* @param base base address in RAM
* @param size size of the region
*/
static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size)
{
uint32_t region_attr = get_region_attr_by_type(type);
return _dynamic_region_allocate_and_init(base, size, region_attr);
}
#else
/**
* This internal function is utilized by the MPU driver to parse the intent
* type (i.e. THREAD_STACK_REGION) and return the correct region index.
*/
static inline int get_region_index_by_type(uint32_t type)
{
/*
* The new MPU regions are allocated per type after the statically
* configured regions. The type is one-indexed rather than
* zero-indexed.
*
* For ARC MPU v2, the smaller index has higher priority, so the
* index is allocated in reverse order. Static regions start from
* the biggest index, then thread related regions.
*
*/
switch (type) {
case THREAD_STACK_USER_REGION:
return static_regions_num + THREAD_STACK_REGION;
case THREAD_STACK_REGION:
case THREAD_APP_DATA_REGION:
case THREAD_STACK_GUARD_REGION:
return static_regions_num + type;
case THREAD_DOMAIN_PARTITION_REGION:
#if defined(CONFIG_MPU_STACK_GUARD)
return static_regions_num + type;
#else
/*
* Start domain partition region from stack guard region
* since stack guard is not enabled.
*/
return static_regions_num + type - 1;
#endif
default:
__ASSERT(0, "Unsupported type");
return -EINVAL;
}
}
/**
* @brief configure the base address and size for an MPU region
*
* @param type MPU region type
* @param base base address in RAM
* @param size size of the region
*/
static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size)
{
int region_index = get_region_index_by_type(type);
uint32_t region_attr = get_region_attr_by_type(type);
LOG_DBG("Region info: 0x%x 0x%x", base, size);
if (region_attr == 0U || region_index < 0) {
return -EINVAL;
}
_region_init(region_index, base, size, region_attr);
return 0;
}
#endif
/* ARC Core MPU Driver API Implementation for ARC MPUv3 */
/**
* @brief enable the MPU
*/
void arc_core_mpu_enable(void)
{
#ifdef CONFIG_ARC_SECURE_FIRMWARE
/* the default region:
* secure:0x8000, SID:0x10000, KW:0x100 KR:0x80
*/
#define MPU_ENABLE_ATTR 0x18180
#else
#define MPU_ENABLE_ATTR 0
#endif
arc_core_mpu_default(MPU_ENABLE_ATTR);
}
/**
* @brief disable the MPU
*/
void arc_core_mpu_disable(void)
{
/* MPU is always enabled, use default region to
* simulate MPU disable
*/
arc_core_mpu_default(REGION_ALL_ATTR | AUX_MPU_ATTR_S |
AUX_MPU_RPER_SID1);
}
/**
* @brief configure the thread's mpu regions
*
* @param thread the target thread
*/
void arc_core_mpu_configure_thread(struct k_thread *thread)
{
#if defined(CONFIG_MPU_GAP_FILLING)
/* the mpu entries of ARC MPUv4 are divided into 2 parts:
* static entries: global mpu entries, not changed in context switch
* dynamic entries: MPU entries changed in context switch and
* memory domain configure, including:
* MPU entries for user thread stack
* MPU entries for stack guard
* MPU entries for mem domain
* MPU entries for other thread specific regions
* before configuring thread specific mpu entries, need to reset dynamic
* entries
*/
_mpu_reset_dynamic_regions();
#endif
#if defined(CONFIG_MPU_STACK_GUARD)
uint32_t guard_start;
/* Set location of guard area when the thread is running in
* supervisor mode. For a supervisor thread, this is just low
* memory in the stack buffer. For a user thread, it only runs
* in supervisor mode when handling a system call on the privilege
* elevation stack.
*/
#if defined(CONFIG_USERSPACE)
if ((thread->base.user_options & K_USER) != 0U) {
guard_start = thread->arch.priv_stack_start;
} else
#endif
{
guard_start = thread->stack_info.start;
}
guard_start -= Z_ARC_STACK_GUARD_SIZE;
if (_mpu_configure(THREAD_STACK_GUARD_REGION, guard_start,
Z_ARC_STACK_GUARD_SIZE) < 0) {
LOG_ERR("thread %p's stack guard failed", thread);
return;
}
#endif /* CONFIG_MPU_STACK_GUARD */
#if defined(CONFIG_USERSPACE)
/* configure stack region of user thread */
if (thread->base.user_options & K_USER) {
LOG_DBG("configure user thread %p's stack", thread);
if (_mpu_configure(THREAD_STACK_USER_REGION,
(uint32_t)thread->stack_info.start,
thread->stack_info.size) < 0) {
LOG_ERR("thread %p's stack failed", thread);
return;
}
}
#if defined(CONFIG_MPU_GAP_FILLING)
uint32_t num_partitions;
struct k_mem_partition *pparts;
struct k_mem_domain *mem_domain = thread->mem_domain_info.mem_domain;
/* configure thread's memory domain */
if (mem_domain) {
LOG_DBG("configure thread %p's domain: %p",
thread, mem_domain);
num_partitions = mem_domain->num_partitions;
pparts = mem_domain->partitions;
} else {
num_partitions = 0U;
pparts = NULL;
}
for (uint32_t i = 0; i < num_partitions; i++) {
if (pparts->size) {
if (_dynamic_region_allocate_and_init(pparts->start,
pparts->size, pparts->attr) < 0) {
LOG_ERR(
"thread %p's mem region: %p failed",
thread, pparts);
return;
}
}
pparts++;
}
#else
arc_core_mpu_configure_mem_domain(thread);
#endif
#endif
}
/**
* @brief configure the default region
*
* @param region_attr region attribute of default region
*/
void arc_core_mpu_default(uint32_t region_attr)
{
#ifdef CONFIG_ARC_NORMAL_FIRMWARE
/* \todo through secure service to access mpu */
#else
z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, region_attr);
#endif
}
/**
* @brief configure the MPU region
*
* @param index MPU region index
* @param base base address
* @param size region size
* @param region_attr region attribute
*/
int arc_core_mpu_region(uint32_t index, uint32_t base, uint32_t size,
uint32_t region_attr)
{
if (index >= get_num_regions()) {
return -EINVAL;
}
region_attr &= AUX_MPU_RPER_ATTR_MASK;
_region_init(index, base, size, region_attr);
return 0;
}
#if defined(CONFIG_USERSPACE)
/**
* @brief configure MPU regions for the memory partitions of the memory domain
*
* @param thread the thread which has memory domain
*/
#if defined(CONFIG_MPU_GAP_FILLING)
void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
{
arc_core_mpu_configure_thread(thread);
}
#else
void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
{
uint32_t region_index;
uint32_t num_partitions;
uint32_t num_regions;
struct k_mem_partition *pparts;
struct k_mem_domain *mem_domain = NULL;
if (thread) {
mem_domain = thread->mem_domain_info.mem_domain;
}
if (mem_domain) {
LOG_DBG("configure domain: %p", mem_domain);
num_partitions = mem_domain->num_partitions;
pparts = mem_domain->partitions;
} else {
LOG_DBG("disable domain partition regions");
num_partitions = 0U;
pparts = NULL;
}
num_regions = get_num_regions();
region_index = get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
while (num_partitions && region_index < num_regions) {
if (pparts->size > 0) {
LOG_DBG("set region 0x%x 0x%lx 0x%x",
region_index, pparts->start, pparts->size);
_region_init(region_index, pparts->start,
pparts->size, pparts->attr);
region_index++;
}
pparts++;
num_partitions--;
}
while (region_index < num_regions) {
/* clear the left mpu entries */
_region_init(region_index, 0, 0, 0);
region_index++;
}
}
#endif
/**
* @brief remove MPU regions for the memory partitions of the memory domain
*
* @param mem_domain the target memory domain
*/
void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain)
{
uint32_t num_partitions;
struct k_mem_partition *pparts;
int index;
if (mem_domain) {
LOG_DBG("configure domain: %p", mem_domain);
num_partitions = mem_domain->num_partitions;
pparts = mem_domain->partitions;
} else {
LOG_DBG("disable domain partition regions");
num_partitions = 0U;
pparts = NULL;
}
for (uint32_t i = 0; i < num_partitions; i++) {
if (pparts->size) {
index = _get_region_index(pparts->start,
pparts->size);
if (index > 0) {
#if defined(CONFIG_MPU_GAP_FILLING)
_region_set_attr(index,
REGION_KERNEL_RAM_ATTR);
#else
_region_init(index, 0, 0, 0);
#endif
}
}
pparts++;
}
}
/**
* @brief reset MPU region for a single memory partition
*
* @param partition_id memory partition id
*/
void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain,
uint32_t partition_id)
{
struct k_mem_partition *partition = &domain->partitions[partition_id];
int region_index = _get_region_index(partition->start,
partition->size);
if (region_index < 0) {
return;
}
LOG_DBG("remove region 0x%x", region_index);
#if defined(CONFIG_MPU_GAP_FILLING)
_region_set_attr(region_index, REGION_KERNEL_RAM_ATTR);
#else
_region_init(region_index, 0, 0, 0);
#endif
}
/**
* @brief get the maximum number of free regions for memory domain partitions
*/
int arc_core_mpu_get_max_domain_partition_regions(void)
{
#if defined(CONFIG_MPU_GAP_FILLING)
/* consider the worst case: each partition requires split */
return (get_num_regions() - MPU_REGION_NUM_FOR_THREAD) / 2;
#else
return get_num_regions() -
get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION) - 1;
#endif
}
/**
* @brief validate the given buffer is user accessible or not
*/
int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
{
int r_index;
int key = arch_irq_lock();
/*
* For ARC MPU v4, overlapping is not supported.
* we can stop the iteration immediately once we find the
* matched region that grants permission or denies access.
*/
r_index = _mpu_probe((uint32_t)addr);
/* match and the area is in one region */
if (r_index >= 0 && r_index == _mpu_probe((uint32_t)addr + (size - 1))) {
if (_is_user_accessible_region(r_index, write)) {
r_index = 0;
} else {
r_index = -EPERM;
}
} else {
r_index = -EPERM;
}
arch_irq_unlock(key);
return r_index;
}
#endif /* CONFIG_USERSPACE */
/* ARC MPU Driver Initial Setup */
/*
* @brief MPU default initialization and configuration
*
* This function provides the default configuration mechanism for the Memory
* Protection Unit (MPU).
*/
static int arc_mpu_init(const struct device *arg)
{
ARG_UNUSED(arg);
uint32_t num_regions;
uint32_t i;
num_regions = get_num_regions();
/* ARC MPU supports up to 16 Regions */
if (mpu_config.num_regions > num_regions) {
__ASSERT(0,
"Request to configure: %u regions (supported: %u)\n",
mpu_config.num_regions, num_regions);
return -EINVAL;
}
static_regions_num = 0U;
/* Disable MPU */
arc_core_mpu_disable();
for (i = 0U; i < mpu_config.num_regions; i++) {
/* skip empty region */
if (mpu_config.mpu_regions[i].size == 0) {
continue;
}
#if defined(CONFIG_MPU_GAP_FILLING)
_region_init(static_regions_num,
mpu_config.mpu_regions[i].base,
mpu_config.mpu_regions[i].size,
mpu_config.mpu_regions[i].attr);
/* record the static region which can be split */
if (mpu_config.mpu_regions[i].attr & REGION_DYNAMIC) {
if (dynamic_regions_num >=
MPU_DYNAMIC_REGION_AREAS_NUM) {
LOG_ERR("not enough dynamic regions %d",
dynamic_regions_num);
return -EINVAL;
}
dyn_reg_info[dynamic_regions_num].index = i;
dyn_reg_info[dynamic_regions_num].base =
mpu_config.mpu_regions[i].base;
dyn_reg_info[dynamic_regions_num].size =
mpu_config.mpu_regions[i].size;
dyn_reg_info[dynamic_regions_num].attr =
mpu_config.mpu_regions[i].attr;
dynamic_regions_num++;
}
static_regions_num++;
#else
/* dynamic region will be covered by default mpu setting
* no need to configure
*/
if (!(mpu_config.mpu_regions[i].attr & REGION_DYNAMIC)) {
_region_init(static_regions_num,
mpu_config.mpu_regions[i].base,
mpu_config.mpu_regions[i].size,
mpu_config.mpu_regions[i].attr);
static_regions_num++;
}
#endif
}
for (i = static_regions_num; i < num_regions; i++) {
_region_init(i, 0, 0, 0);
}
/* Enable MPU */
arc_core_mpu_enable();
return 0;
}
SYS_INIT(arc_mpu_init, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V4_INTERNAL_H_ */

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