release: bump version to Zephyr 1.14.2

Update version to 1.14.2

Signed-off-by: Anas Nashif <anas.nashif@intel.com>

.buildkite/daily.yml

@@ -1,32 +0,0 @@
-steps:
-  - command:
-    - .buildkite/run.sh
-    env:
-      ZEPHYR_TOOLCHAIN_VARIANT: "zephyr"
-      ZEPHYR_SDK_INSTALL_DIR: "/opt/sdk/zephyr-sdk-0.12.2"
-    parallelism: 400
-    timeout_in_minutes: 210
-    retry:
-      manual: true
-    plugins:
-      - docker#v3.5.0:
-          image: "zephyrprojectrtos/ci:v0.11.13"
-          propagate-environment: true
-          volumes:
-            - "/var/lib/buildkite-agent/git-mirrors:/var/lib/buildkite-agent/git-mirrors"
-            - "/var/lib/buildkite-agent/zephyr-module-cache:/var/lib/buildkite-agent/zephyr-module-cache"
-            - "/var/lib/buildkite-agent/zephyr-ccache:/root/.ccache"
-          workdir: "/workdir/zephyr"
-    agents:
-    - "queue=default"
-
-  - wait: ~
-    continue_on_failure: true
-
-  - plugins:
-      - junit-annotate#v1.7.0:
-          artifacts: twister-*.xml
-
-notify:
-  - email: "builds+int+399+7809482394022958124@lists.zephyrproject.org"
-    if: build.state != "passed"

.buildkite/hooks/post-command

@@ -1,8 +0,0 @@
-#!/bin/bash
-# Copyright (c) 2020 Linaro Limited
-#
-# SPDX-License-Identifier: Apache-2.0
-
-# report disk usage:
-echo "--- $0 disk usage"
-df -h

.buildkite/hooks/pre-command

@@ -1,44 +0,0 @@
-#!/bin/bash
-# Copyright (c) 2020 Linaro Limited
-#
-# SPDX-License-Identifier: Apache-2.0
-
-# Save off where we started so we can go back there
-WORKDIR=${PWD}
-
-echo "--- $0 disk usage"
-df -h
-du -hs /var/lib/buildkite-agent/*
-docker images -a
-docker system df -v
-
-if [ -n "${BUILDKITE_PULL_REQUEST_BASE_BRANCH}" ]; then
-   git fetch -v origin ${BUILDKITE_PULL_REQUEST_BASE_BRANCH}
-   git checkout FETCH_HEAD
-   git config --local user.email "builds@zephyrproject.org"
-   git config --local user.name "Zephyr CI"
-   git merge --no-edit "${BUILDKITE_COMMIT}" || {
-       local merge_result=$?
-       echo "Merge failed: ${merge_result}"
-       git merge --abort
-       exit $merge_result
-   }
-fi
-
-mkdir -p /var/lib/buildkite-agent/zephyr-ccache/
-
-# create cache dirs, no-op if they already exist
-mkdir -p /var/lib/buildkite-agent/zephyr-module-cache/modules
-mkdir -p /var/lib/buildkite-agent/zephyr-module-cache/tools
-mkdir -p /var/lib/buildkite-agent/zephyr-module-cache/bootloader
-
-# Clean cache - if it already exists
-cd /var/lib/buildkite-agent/zephyr-module-cache
-find -type f -not -path "*/.git/*" -not -name ".git" -delete
-
-# Remove any stale locks
-find -name index.lock -delete
-
-# return from where we started so we can find pipeline files from
-# git repo
-cd ${WORKDIR}

.buildkite/pipeline.yml

@@ -1,28 +0,0 @@
-steps:
-  - command:
-    - .buildkite/run.sh
-    env:
-      ZEPHYR_TOOLCHAIN_VARIANT: "zephyr"
-      ZEPHYR_SDK_INSTALL_DIR: "/opt/sdk/zephyr-sdk-0.12.2"
-    parallelism: 20
-    timeout_in_minutes: 180
-    retry:
-      manual: true
-    plugins:
-      - docker#v3.5.0:
-          image: "zephyrprojectrtos/ci:v0.11.13"
-          propagate-environment: true
-          volumes:
-            - "/var/lib/buildkite-agent/git-mirrors:/var/lib/buildkite-agent/git-mirrors"
-            - "/var/lib/buildkite-agent/zephyr-module-cache:/var/lib/buildkite-agent/zephyr-module-cache"
-            - "/var/lib/buildkite-agent/zephyr-ccache:/root/.ccache"
-          workdir: "/workdir/zephyr"
-    agents:
-    - "queue=default"
-
-  - wait: ~
-    continue_on_failure: true
-
-  - plugins:
-      - junit-annotate#v1.7.0:
-          artifacts: twister-*.xml

.buildkite/run.sh

@@ -1,75 +0,0 @@
-#!/bin/bash
-# Copyright (c) 2020 Linaro Limited
-#
-# SPDX-License-Identifier: Apache-2.0
-set -eE
-
-function cleanup()
-{
-	# Rename twister junit xml for use with junit-annotate-buildkite-plugin
-	# create dummy file if twister did nothing
-	if [ ! -f twister-out/twister.xml ]; then
-	   touch twister-out/twister.xml
-	fi
-	mv twister-out/twister.xml twister-${BUILDKITE_JOB_ID}.xml
-	buildkite-agent artifact upload twister-${BUILDKITE_JOB_ID}.xml
-
-
-	# Upload test_file to get list of tests that are build/run
-	if [ -f test_file.txt ]; then
-		buildkite-agent artifact upload test_file.txt
-	fi
-
-	# ccache stats
-	echo "--- ccache stats at finish"
-	ccache -s
-
-	# disk usage
-	echo "--- disk usage at finish"
-	df -h
-}
-
-trap cleanup ERR
-
-echo "--- run $0"
-
-git log -n 5 --oneline --decorate --abbrev=12
-
-# Setup module cache
-cd /workdir
-ln -s /var/lib/buildkite-agent/zephyr-module-cache/modules
-ln -s /var/lib/buildkite-agent/zephyr-module-cache/tools
-ln -s /var/lib/buildkite-agent/zephyr-module-cache/bootloader
-cd /workdir/zephyr
-
-export JOB_NUM=$((${BUILDKITE_PARALLEL_JOB}+1))
-
-# ccache stats
-echo ""
-echo "--- ccache stats at start"
-ccache -s
-
-
-if [ -n "${DAILY_BUILD}" ]; then
-   TWISTER_OPTIONS=" --inline-logs -N --build-only --all --retry-failed 3 -v "
-   echo "--- DAILY BUILD"
-   west init -l .
-   west update 1> west.update.log || west update 1> west.update-2.log
-   west forall -c 'git reset --hard HEAD'
-   source zephyr-env.sh
-   ./scripts/twister --subset ${JOB_NUM}/${BUILDKITE_PARALLEL_JOB_COUNT} ${TWISTER_OPTIONS}
-else
-   if [ -n "${BUILDKITE_PULL_REQUEST_BASE_BRANCH}" ]; then
-      ./scripts/ci/run_ci.sh  -c -b ${BUILDKITE_PULL_REQUEST_BASE_BRANCH} -r origin \
-	   -m ${JOB_NUM} -M ${BUILDKITE_PARALLEL_JOB_COUNT} -p ${BUILDKITE_PULL_REQUEST}
-   else
-       ./scripts/ci/run_ci.sh -c -b ${BUILDKITE_BRANCH} -r origin \
-	   -m ${JOB_NUM} -M ${BUILDKITE_PARALLEL_JOB_COUNT};
-   fi
-fi
-
-TWISTER_EXIT_STATUS=$?
-
-cleanup
-
-exit ${TWISTER_EXIT_STATUS}

.checkpatch.conf

@@ -1,7 +1,9 @@
+--mailback
+--no-tree
 --emacs
 --summary-file
 --show-types
---max-line-length=100
+--max-line-length=80
 --min-conf-desc-length=1
 --typedefsfile=scripts/checkpatch/typedefsfile
 
@@ -10,21 +12,10 @@
 --ignore SPLIT_STRING
 --ignore VOLATILE
 --ignore CONFIG_EXPERIMENTAL
---ignore PREFER_KERNEL_TYPES
---ignore PREFER_SECTION
 --ignore AVOID_EXTERNS
 --ignore NETWORKING_BLOCK_COMMENT_STYLE
 --ignore DATE_TIME
 --ignore MINMAX
 --ignore CONST_STRUCT
 --ignore FILE_PATH_CHANGES
---ignore SPDX_LICENSE_TAG
---ignore C99_COMMENT_TOLERANCE
---ignore REPEATED_WORD
---ignore UNDOCUMENTED_DT_STRING
---ignore DT_SPLIT_BINDING_PATCH
---ignore DT_SCHEMA_BINDING_PATCH
---ignore TRAILING_SEMICOLON
---ignore COMPLEX_MACRO
---ignore MULTISTATEMENT_MACRO_USE_DO_WHILE
 --exclude ext

.clang-format

@@ -65,12 +65,18 @@ ExperimentalAutoDetectBinPacking: false
 #FixNamespaceComments: false # Unknown to clang-format-4.0
 
 # Taken from:
-#   git grep -h '^#define [^[:space:]]*FOR_EACH[^[:space:]]*(' include/ \
-#   | sed "s,^#define \([^[:space:]]*FOR_EACH[^[:space:]]*\)(.*$,  - '\1'," \
+#   git grep -h '^#define [^[:space:]]*for_each[^[:space:]]*(' include/ \
+#   | sed "s,^#define \([^[:space:]]*for_each[^[:space:]]*\)(.*$,  - '\1'," \
 #   | sort | uniq
 ForEachMacros:
   - 'FOR_EACH'
-  - 'FOR_EACH_FIXED_ARG'
+  - 'for_each_linux_bus'
+  - 'for_each_linux_driver'
+  - 'metal_bitmap_for_each_clear_bit'
+  - 'metal_bitmap_for_each_set_bit'
+  - 'metal_for_each_page_size_down'
+  - 'metal_for_each_page_size_up'
+  - 'metal_list_for_each'
   - 'RB_FOR_EACH'
   - 'RB_FOR_EACH_CONTAINER'
   - 'SYS_DLIST_FOR_EACH_CONTAINER'
@@ -85,11 +91,11 @@ ForEachMacros:
   - 'SYS_SLIST_FOR_EACH_CONTAINER_SAFE'
   - 'SYS_SLIST_FOR_EACH_NODE'
   - 'SYS_SLIST_FOR_EACH_NODE_SAFE'
+  - '_WAIT_Q_FOR_EACH'
   - 'Z_GENLIST_FOR_EACH_CONTAINER'
   - 'Z_GENLIST_FOR_EACH_CONTAINER_SAFE'
   - 'Z_GENLIST_FOR_EACH_NODE'
   - 'Z_GENLIST_FOR_EACH_NODE_SAFE'
-  - '_WAIT_Q_FOR_EACH'
 
 #IncludeBlocks: Preserve # Unknown to clang-format-5.0
 IncludeCategories:

.editorconfig

@@ -9,12 +9,6 @@ charset = utf-8
 end_of_line = lf
 insert_final_newline = true
 trim_trailing_whitespace = true
-max_line_length = 80
-
-# Assembly
-[*.S]
-indent_style = tab
-indent_size = 8
 
 # C
 [*.{c,h}]
@@ -32,7 +26,7 @@ indent_style = tab
 indent_size = 8
 
 # YAML
-[*.{yml,yaml}]
+[*.yml]
 indent_style = space
 indent_size = 2
 
@@ -60,16 +54,3 @@ indent_size = 2
 # Makefile
 [Makefile]
 indent_style = tab
-
-# Device tree
-[*.{dts,dtsi,overlay}]
-indent_style = tab
-indent_size = 8
-
-# Git commit messages
-[COMMIT_EDITMSG]
-max_line_length = 72
-
-# Kconfig
-[Kconfig*]
-indent_style=tab

.gitattributes

@@ -3,7 +3,3 @@
 .gitattributes export-ignore
 .gitignore export-ignore
 .mailmap export-ignore
-
-# Tell linguist that generated test pattern files should not be included in the
-# language statistics.
-*.pat linguist-generated=true

.github/ISSUE_TEMPLATE/bug_report.md

@@ -24,11 +24,10 @@ A clear and concise description of what you expected to happen.
 **Impact**
 What impact does this issue have on your progress (e.g., annoyance, showstopper)
 
-**Logs and console output**
-If applicable, add console logs or other types of debug information
-e.g Wireshark capture or Logic analyzer capture (upload in zip archive).
-copy-and-paste text and put a code fence (\`\`\`) before and after, to help
-explain the issue. (if unable to obtain text log, add a screenshot)
+**Screenshots or console output**
+If applicable, add a screenshot (drag-and-drop an image), or console logs
+(cut-and-paste text and put a code fence (\`\`\`) before and after, to help
+explain the issue.
 
 **Environment (please complete the following information):**
  - OS: (e.g. Linux, MacOS, Windows)

.github/ISSUE_TEMPLATE/enhancement.md

@@ -2,7 +2,7 @@
 name: Enhancement
 about: Suggest enhancements to existing features
 title: ''
-labels: Enhancement
+labels: enhancement
 assignees: ''
 
 ---

.github/ISSUE_TEMPLATE/hardware_support.md

@@ -1,19 +0,0 @@
----
-name: Hardware Support
-about: Suggest adding hardware support
-title: ''
-labels: Hardware Support
-assignees: ''
-
----
-
-**Is this request related to a missing driver support for a particular hardware platform, SoC or board? Please describe.**
-Describe in details the hardware support being requested and why this support benefits Zephyr.
-
-**Describe why you are asking for this support?**
-Describe why you are asking for this support instead of contributing it directly to the tree
-
-If this is a new board or SoC, please state whether you are willing to maintain the Zephyr support for it if it is included in the main tree
-
-**Additional context**
-Add any other context or graphics (drag-and-drop an image) about the hardware here.

.github/labeler.yml

@@ -1,161 +0,0 @@
-"Release Notes":
-  - "doc/releases/**/*"
-"area: Modem":
-  - "drivers/modem/**/*"
-"area: PWM":
-  - "drivers/pwm/**/*"
-"area: Watchdog":
-  - "drivers/watchdog/**/*"
-"area: Sensors":
-  - "drivers/sensors/**/*"
-"area: ADC":
-  - "drivers/adc/**/*"
-"area: Counter":
-  - "drivers/counter/**/*"
-"area: CAN":
-  - "include/drivers/can.h"
-  - "include/canbus/*/**"
-  - "drivers/can/**/*"
-  - "subsys/canbus/*/**"
-"area: EEPROM":
-  - "include/drivers/eeprom.h"
-  - "drivers/eeprom/**/*"
-"area: Timer":
-  - "drivers/timer/**/*"
-"area: I2S":
-  - "drivers/i2s/**/*"
-"area: C Library":
-  - "lib/libc/**/*"
-"area: Devicetree":
-  - "dts/**/*"
-  - "**/*.dts"
-  - "**/*.dtsi"
-  - "include/devicetree.h"
-  - "include/devicetree/*"
-  - "doc/guides/dts/**/*"
-"area: Devicetree Binding":
-  - "include/dt-bindings/**/*"
-  - "dts/bindings/**/*"
-"area: Devicetree Tooling":
-  - "scripts/dts/**/*"
-"area: I2C":
-  - "drivers/i2c/**/*"
-"area: SPI":
-  - "drivers/spi/**/*"
-"area: Boards":
-  - "boards/**/*"
-"area: POSIX":
-  - "lib/posix/**/*"
-"area: native port":
-  - "arch/posix/**/*"
-  - "include/arch/posix/**/*"
-  - "soc/posix/**/*"
-  - "**/*native_posix*"
-"area: X86":
-  - "arch/x86/**/*"
-  - "include/arch/x86/**/*"
-"area: ARM":
-  - "arch/arm/**/*"
-  - "include/arch/arm/**/*"
-"area: ARM_64":
-  - "arch/arm/core/aarch64/**/*"
-  - "include/arch/arm/aarch64/**/*"
-"area: NIOS2":
-  - "arch/nios2/**/*"
-  - "include/arch/nios2/**/*"
-"area: Xtensa":
-  - "arch/xtensa/**/*"
-  - "include/arch/xtensa/**/*"
-"area: RISCv32/64":
-  - "arch/risv/**/*"
-  - "include/arch/riscv/**/*"
-"area: ARC":
-  - "arch/arc/**/*"
-  - "include/arch/arc/**/*"
-"area: Networking":
-  - "subsys/net/**/*"
-  - "samples/net/**/*"
-  - "tests/net/**/*"
-  - "include/net/**/*"
-  - "include/drivers/ieee802154/**/*"
-  - "drivers/ethernet/**/*"
-  - "drivers/ieee802154/**/*"
-  - "drivers/wifi/**/*"
-  - "drivers/ptp_clock/**/*"
-  - "drivers/net/**/*"
-"area: Logging":
-  - "subsys/logging/**/*"
-"area: Shell":
-  - "subsys/shell/**/*"
-"area: Console":
-  - "subsys/console/**/*"
-"area: Test Framework":
-  - "subsys/testsuite/**/*"
-"area: Settings":
-  - "subsys/settings/**/*"
-"area: File System":
-  - "subsys/fs/**/*"
-"area: Storage":
-  - "subsys/storage/**/*"
-"area: Bluetooth":
-  - "subsys/bluetooth/**/*"
-  - "**/*bluetooth*"
-"area: Bluetooth Mesh":
-  - "subsys/bluetooth/mesh/**/*"
-"area: Bluetooth Controller":
-  - "subsys/bluetooth/controller/**/*"
-"area: Bluetooth Host":
-  - "subsys/bluetooth/host/**/*"
-  - "subsys/bluetooth/services/**/*"
-"area: API":
-  - "include/**/*"
-"area: Samples":
-  - "samples/**/*"
-"area: Tests":
-  - "tests/**/*"
-"area: Kernel":
-  - "kernel/**/*"
-  - "tests/kernel/**/*"
-"area: Documentation":
-  - "**/*.rst"
-  - "**/*.md"
-"area: Build System":
-  - "cmake/**/*"
-  - "CmakeLists.txt"
-"area: Kconfig":
-  - "scripts/kconfig/**/*"
-  - "Kconfig"
-  - "Kconfig.zephyr"
-"area: Twister":
-  - "scripts/twister"
-  - "scripts/pylib/twister/**/*"
-"area: Modules":
-  - "west.yml"
-  - "modules/**/*"
-"area: Shields":
-  - "boards/shields/**"
-  - "samples/shields/**"
-"platform: NXP":
-  - "boards/arm/frdm*/**"
-  - "boards/arm/hexiwear*/**"
-  - "boards/arm/lpcxpresso*/**"
-  - "boards/arm/*imx*/**"
-  - "drivers/**/*imx*"
-  - "drivers/**/*mcux*"
-  - "dts/arm/nxp/*/*"
-  - "dts/bindings/**/nxp*"
-  - "soc/arm/nxp*/**"
-"platform: STM32":
-  - "boards/arm/nucleo_*/**"
-  - "boards/arm/*stm32*/**"
-  - "drivers/**/*stm32*"
-  - "dts/arm/st/*/*"
-  - "include/drivers/*/*stm32*"
-  - "soc/arm/st_stm32/**"
-"platform: SiLabs":
-  - "boards/arm/efr32_*/**/*"
-  - "boards/arm/efm32_*/**/*"
-  - "drivers/**/*gecko*"
-  - "dts/arm/silabs/**/*"
-  - "dts/bindings/**/silabs,gecko*"
-  - "soc/arm/silabs_exx32/**/*"

.github/workflows/backport.yml

@@ -1,16 +0,0 @@
-name: Backport
-on:
-  pull_request_target:
-    types:
-      - closed
-      - labeled
-
-jobs:
-  backport:
-    runs-on: ubuntu-18.04
-    name: Backport
-    steps:
-      - name: Backport
-        uses: zephyrproject-rtos/action-backport@v1.1.99
-        with:
-          github_token: ${{ secrets.GITHUB_TOKEN }}

.github/workflows/compliance.yml

@@ -1,84 +0,0 @@
-name: Compliance
-
-on: pull_request
-
-jobs:
-  compliance_job:
-    runs-on: ubuntu-latest
-    name: Run compliance checks on patch series (PR)
-    steps:
-    - name: Update PATH for west
-      run: |
-        echo "$HOME/.local/bin" >> $GITHUB_PATH
-
-    - name: Checkout the code
-      uses: actions/checkout@v2
-      with:
-        ref: ${{ github.event.pull_request.head.sha }}
-        fetch-depth: 0
-
-    - name: cache-pip
-      uses: actions/cache@v1
-      with:
-        path: ~/.cache/pip
-        key: ${{ runner.os }}-doc-pip
-
-    - name: Install python dependencies
-      run: |
-        pip3 install setuptools
-        pip3 install wheel
-        pip3 install python-magic junitparser==1.6.3 gitlint pylint pykwalify
-        pip3 install west
-
-    - name: west setup
-      env:
-        BASE_REF: ${{ github.base_ref }}
-      run: |
-        git config --global user.email "you@example.com"
-        git config --global user.name "Your Name"
-        git remote -v
-        git rebase origin/${BASE_REF}
-        # debug
-        git log  --pretty=oneline | head -n 10
-        west init -l . || true
-        west update
-
-    - name: Run Compliance Tests
-      continue-on-error: true
-      id: compliance
-      env:
-        BASE_REF: ${{ github.base_ref }}
-      run: |
-        export ZEPHYR_BASE=$PWD
-        # debug
-        ls -la
-        git log  --pretty=oneline | head -n 10
-        ./scripts/ci/check_compliance.py -m Codeowners -m Devicetree -m Gitlint -m Identity -m Nits -m pylint -m checkpatch -m Kconfig -c origin/${BASE_REF}..
-
-    - name: upload-results
-      uses: actions/upload-artifact@master
-      continue-on-error: True
-      with:
-        name: compliance.xml
-        path: compliance.xml
-
-    - name: check-warns
-      run: |
-        if [[ ! -s "compliance.xml" ]]; then
-          exit 1;
-        fi
-
-        for file in Nits.txt checkpatch.txt Identity.txt Gitlint.txt pylint.txt Devicetree.txt Kconfig.txt Codeowners.txt; do
-          if [[ -s $file ]]; then
-            errors=$(cat $file)
-            errors="${errors//'%'/'%25'}"
-            errors="${errors//$'\n'/'%0A'}"
-            errors="${errors//$'\r'/'%0D'}"
-            echo "::error file=${file}::$errors"
-            exit=1
-          fi
-        done
-
-        if [ ${exit} == 1 ]; then
-          exit 1;
-        fi

.github/workflows/conflict.yml

@@ -1,14 +0,0 @@
-name: Conflict Finder
-
-on:
-  push:
-    branches-ignore:
-      - '**'
-jobs:
-  conflict:
-    runs-on: ubuntu-latest
-    steps:
-      - uses: mschilde/auto-label-merge-conflicts@master
-        with:
-          CONFLICT_LABEL_NAME: "has conflicts"
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

.github/workflows/daily_test_version.yml

@@ -1,38 +0,0 @@
-# Copyright (c) 2020 Intel Corp.
-# SPDX-License-Identifier: Apache-2.0
-
-name: Publish commit for daily testing
-
-on:
-  schedule:
-    - cron:  '50 22 * * *'
-  push:
-    branches:
-      - refs/tags/*
-
-jobs:
-  get_version:
-    runs-on: ubuntu-latest
-    if: github.repository == 'zephyrproject-rtos/zephyr'
-
-    steps:
-    - name: Configure AWS Credentials
-      uses: aws-actions/configure-aws-credentials@v1
-      with:
-        aws-access-key-id: ${{ secrets.AWS_ACCESS_KEY_ID_TESTING }}
-        aws-secret-access-key: ${{ secrets.AWS_SECRET_ACCESS_KEY_TESTING }}
-        aws-region: us-east-1
-
-    - name: install-pip
-      run: |
-        pip3 install gitpython
-
-    - name: checkout
-      uses: actions/checkout@v2
-      with:
-        fetch-depth: 0
-
-    - name: Upload to AWS S3
-      run: |
-        python3 scripts/ci/version_mgr.py --update .
-        aws s3 cp versions.json s3://testing.zephyrproject.org/daily_tests/versions.json

.github/workflows/devicetree_checks.yml

@@ -1,64 +0,0 @@
-# Copyright (c) 2020 Linaro Limited.
-# Copyright (c) 2020 Nordic Semiconductor ASA
-# SPDX-License-Identifier: Apache-2.0
-
-name: Devicetree script tests
-
-on:
-  push:
-    paths:
-    - 'scripts/dts/**'
-    - '.github/workflows/devicetree_checks.yml'
-  pull_request:
-    paths:
-    - 'scripts/dts/**'
-    - '.github/workflows/devicetree_checks.yml'
-
-jobs:
-  devicetree-checks:
-    name: Devicetree script tests
-    runs-on: ${{ matrix.os }}
-    strategy:
-      matrix:
-        python-version: [3.6, 3.7, 3.8]
-        os: [ubuntu-latest, macos-latest, windows-latest]
-    steps:
-    - name: checkout
-      uses: actions/checkout@v2
-    - name: Set up Python ${{ matrix.python-version }}
-      uses: actions/setup-python@v1
-      with:
-        python-version: ${{ matrix.python-version }}
-    - name: cache-pip-linux
-      if: startsWith(runner.os, 'Linux')
-      uses: actions/cache@v1
-      with:
-        path: ~/.cache/pip
-        key: ${{ runner.os }}-pip-${{ matrix.python-version }}
-        restore-keys: |
-          ${{ runner.os }}-pip-${{ matrix.python-version }}
-    - name: cache-pip-mac
-      if: startsWith(runner.os, 'macOS')
-      uses: actions/cache@v1
-      with:
-        path: ~/Library/Caches/pip
-        # Trailing '-' was just to get a different cache name
-        key: ${{ runner.os }}-pip-${{ matrix.python-version }}-
-        restore-keys: |
-          ${{ runner.os }}-pip-${{ matrix.python-version }}-
-    - name: cache-pip-win
-      if: startsWith(runner.os, 'Windows')
-      uses: actions/cache@v1
-      with:
-        path: ~\AppData\Local\pip\Cache
-        key: ${{ runner.os }}-pip-${{ matrix.python-version }}
-        restore-keys: |
-          ${{ runner.os }}-pip-${{ matrix.python-version }}
-    - name: install python dependencies
-      run: |
-        pip3 install wheel
-        pip3 install pytest pyyaml
-    - name: run pytest
-      working-directory: scripts/dts
-      run: |
-        python -m pytest testdtlib.py testedtlib.py

.github/workflows/doc-build.yml

@@ -3,31 +3,16 @@
 
 name: Documentation GitHub Workflow
 
-on:
-  pull_request:
-    paths:
-    - 'Makefile'
-    - 'doc/**'
-    - '**.rst'
-    - 'include/**'
-    - 'kernel/include/kernel_arch_interface.h'
-    - 'lib/libc/**'
-    - 'subsys/testsuite/ztest/include/**'
-    - 'tests/**'
-    - '.known-issues/doc/**'
-    - '**/Kconfig*'
-    - 'west.yml'
-    - '.github/workflows/doc-build.yml'
+on: [pull_request]
 
 jobs:
-  doc-build:
-    name: "Documentation Build"
+  build:
     runs-on: ubuntu-latest
 
     steps:
     - name: Update PATH for west
       run: |
-        echo "$HOME/.local/bin" >> $GITHUB_PATH
+        echo "::add-path::$HOME/.local/bin"
 
     - name: checkout
       uses: actions/checkout@v2
@@ -44,10 +29,11 @@ jobs:
 
     - name: install-pip
       run: |
-        pip3 install setuptools wheel
-        pip3 install -r scripts/requirements-base.txt
-        pip3 install -r scripts/requirements-doc.txt
-        pip3 install west==0.9.0
+        pip3 install setuptools
+        pip3 install 'breathe>=4.9.1,<4.15.0' 'docutils>=0.14' \
+                     'sphinx>=1.7.5,<3.0' sphinx_rtd_theme sphinx-tabs \
+                     sphinxcontrib-svg2pdfconverter 'west>=0.6.2'
+        pip3 install pyelftools
 
     - name: west setup
       run: |

.github/workflows/doc-publish.yml

@@ -1,116 +0,0 @@
-# Copyright (c) 2020 Linaro Limited.
-# SPDX-License-Identifier: Apache-2.0
-
-name: Doc build for Release or Daily
-
-# Either a daily based on schedule/cron or only on tag push
-on:
-  schedule:
-    - cron:  '50 22 * * *'
-  push:
-    tags:
-      # only publish v* tags, do not care about zephyr-v* which point to the
-      # same commit
-      - 'v*'
-
-jobs:
-  doc-publish:
-    name: Publish Documentation
-    runs-on: ubuntu-latest
-    if: github.repository == 'zephyrproject-rtos/zephyr'
-
-    steps:
-    - name: Update PATH for west
-      run: |
-        echo "$HOME/.local/bin" >> $GITHUB_PATH
-
-    - name: Determine tag
-      id: tag
-      run: |
-        # We expect to get here either due to a schedule event in which
-        # case we are doing a daily build of the docs, or because a new
-        # tag was pushed, in which case we are building docs for a release
-        if [ ${GITHUB_EVENT_NAME} == "schedule" ]; then
-           echo ::set-output name=TYPE::daily;
-           echo ::set-output name=RELEASE::latest;
-        elif [ ${GITHUB_EVENT_NAME} == "push" ]; then
-           # If push due to a tag GITHUB_REF will look like refs/tags/TAG-FOO
-           # chop of 'refs/tags' so RELEASE=TAG-FOO
-           echo ::set-output name=TYPE::release;
-           echo ::set-output name=RELEASE::${GITHUB_REF/refs\/tags\//};
-        else
-           exit 1
-        fi
-
-    - name: Configure AWS Credentials
-      uses: aws-actions/configure-aws-credentials@v1
-      with:
-        aws-access-key-id: ${{ secrets.AWS_ACCESS_KEY_ID }}
-        aws-secret-access-key: ${{ secrets.AWS_SECRET_ACCESS_KEY }}
-        aws-region: us-east-1
-
-    - name: checkout
-      uses: actions/checkout@v2
-
-    - name: install-pkgs
-      run: |
-        sudo apt-get install -y ninja-build doxygen
-
-    - name: cache-pip
-      uses: actions/cache@v1
-      with:
-        path: ~/.cache/pip
-        key: ${{ runner.os }}-doc-pip
-
-    - name: install-pip
-      run: |
-        pip3 install setuptools
-        pip3 install -r scripts/requirements-base.txt
-        pip3 install -r scripts/requirements-doc.txt
-
-    - name: west setup
-      run: |
-        west init -l . || true
-
-    - name: build-docs
-      env:
-        DOC_TAG: ${{ steps.tag.outputs.TYPE }}
-      run: |
-        source zephyr-env.sh
-        make DOC_TAG=${DOC_TAG} htmldocs
-
-    - name: check-warns
-      run: |
-        if [ -s doc/_build/doc.warnings ]; then
-           docwarn=$(cat doc/_build/doc.warnings)
-           docwarn="${docwarn//'%'/'%25'}"
-           docwarn="${docwarn//$'\n'/'%0A'}"
-           docwarn="${docwarn//$'\r'/'%0D'}"
-           # We treat doc warnings as errors
-           echo "::error file=doc.warnings::$docwarn"
-           exit 1
-        fi
-
-    - name: Upload to AWS S3
-      env:
-        RELEASE: ${{ steps.tag.outputs.RELEASE }}
-      run: |
-        echo "DOC_RELEASE=[$RELEASE]"
-        if [ "$RELEASE" == "latest" ]; then
-           export
-           echo "publish latest docs"
-           aws s3 sync  --quiet doc/_build/html s3://docs.zephyrproject.org/latest --delete
-           echo "success sync of latest docs"
-        else
-           # we want just the version, without the leading 'v'
-           DOC_RELEASE=${RELEASE:1}
-           echo "publish release docs: ${DOC_RELEASE}"
-           aws s3 sync  --quiet doc/_build/html s3://docs.zephyrproject.org/${DOC_RELEASE}
-           echo "success sync of rel docs"
-        fi
-        if [ -d doc/_build/doxygen/html ]; then
-           API_RELEASE=${RELEASE:1}
-           echo "publish doxygen to apidoc/${API_RELEASE}"
-           aws s3 sync  --quiet doc/_build/doxygen/html s3://docs.zephyrproject.org/apidoc/${API_RELEASE} --delete
-           echo "success publish of doxygen"
-        fi

.github/workflows/issue_count.yml

@@ -1,53 +0,0 @@
-name: Issue Tracker
-
-on:
-  issues:
-    types: [opened, labeled, closed]
-
-env:
-  OUTPUT_FILE_NAME: IssuesReport.md
-  COMMITTER_EMAIL: actions@github.com
-  COMMITTER_NAME: github-actions
-  COMMITTER_USERNAME: github-actions
-
-
-jobs:
-  track-issues:
-    name: "Collect Issue Stats"
-    runs-on: ubuntu-latest
-
-    steps:
-    - name: Download configuration file
-      run: |
-        wget -q https://raw.githubusercontent.com/$GITHUB_REPOSITORY/master/.github/workflows/issues-report-config.json
-
-    - name: install-packages
-      run: |
-        sudo apt-get install discount
-
-    - uses: brcrista/summarize-issues@v3
-      with:
-        title: 'Issues Report for ${{ github.repository }}'
-        configPath: 'issues-report-config.json'
-        outputPath: ${{ env.OUTPUT_FILE_NAME }}
-        token: ${{ secrets.GITHUB_TOKEN }}
-
-    - name: upload-stats
-      uses: actions/upload-artifact@master
-      continue-on-error: True
-      with:
-        name: ${{ env.OUTPUT_FILE_NAME }}
-        path: ${{ env.OUTPUT_FILE_NAME }}
-
-    - name: Configure AWS Credentials
-      uses: aws-actions/configure-aws-credentials@v1
-      with:
-        aws-access-key-id: ${{ secrets.AWS_ACCESS_KEY_ID_TESTING }}
-        aws-secret-access-key: ${{ secrets.AWS_SECRET_ACCESS_KEY_TESTING }}
-        aws-region: us-east-1
-
-    - name: Post Results
-      run: |
-        mkd2html IssuesReport.md IssuesReport.html
-        aws s3 cp --quiet IssuesReport.html s3://testing.zephyrproject.org/issues/$GITHUB_REPOSITORY/index.html
-

.github/workflows/issues-report-config.json

@@ -1,37 +0,0 @@
-[
-  {
-    "section": "High Priority Bugs",
-    "labels": ["bug", "priority: high"],
-    "threshold": 0
-  },
-  {
-    "section": "Medium Priority Bugs",
-    "labels": ["bug", "priority: medium"],
-    "threshold": 20
-  },
-  {
-    "section": "Low Priority Bugs",
-    "labels": ["bug", "priority: low"],
-    "threshold": 100
-  },
-  {
-    "section": "Enhancements",
-    "labels": ["Enhancement"],
-    "threshold": 500
-  },
-  {
-    "section": "Features",
-    "labels": ["Feature"],
-    "threshold": 100
-  },
-  {
-    "section": "Questions",
-    "labels": ["question"],
-    "threshold": 100
-  },
-  {
-    "section": "Static Analysis",
-    "labels": ["Coverity"],
-    "threshold": 100
-  }
-]

.github/workflows/labeler.yml

@@ -1,12 +0,0 @@
-name: 'Pull Request Labeler'
-on:
-  - pull_request_target
-
-jobs:
-  labeler:
-    name: Pull Request Labeler
-    runs-on: ubuntu-latest
-    steps:
-      - uses: actions/labeler@v2.1.1
-        with:
-          repo-token: '${{ secrets.GITHUB_TOKEN }}'

.github/workflows/manifest.yml

@@ -1,28 +0,0 @@
-name: Manifest
-on:
-  pull_request_target:
-    paths:
-      - 'west.yml'
-
-jobs:
-  contribs:
-    runs-on: ubuntu-latest
-    name: Manifest
-    steps:
-      - name: Checkout the code
-        uses: actions/checkout@v2
-        with:
-          path: zephyrproject/zephyr
-          ref: ${{ github.event.pull_request.head.sha }}
-          fetch-depth: 0
-
-      - name: Manifest
-        uses: zephyrproject-rtos/action-manifest@main
-        with:
-          github-token: ${{ secrets.GITHUB_TOKEN }}
-          manifest-path: 'west.yml'
-          checkout-path: 'zephyrproject/zephyr'
-          label-prefix: 'manifest-'
-          verbosity-level: '1'
-          labels: 'manifest, west'
-          dnm-labels: 'DNM'

.github/workflows/release.yml

@@ -1,61 +0,0 @@
-name: Create a Release
-
-on:
-  push:
-    tags:
-      - 'v*'
-
-jobs:
-  release:
-    runs-on: ubuntu-latest
-    steps:
-      - uses: actions/checkout@v2
-        with:
-          fetch-depth: 0
-
-      - name: Get the version
-        id: get_version
-        run: echo ::set-output name=VERSION::${GITHUB_REF#refs/tags/}
-
-      - name: REUSE Compliance Check
-        uses: fsfe/reuse-action@v1
-        with:
-          args: spdx -o zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
-
-      - name: upload-results
-        uses: actions/upload-artifact@master
-        continue-on-error: True
-        with:
-          name: zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
-          path: zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
-
-      - name: Get Diff since last tag
-        run: |
-          oldtag=$(git describe --abbrev=0 ${{ github.ref }}^)
-          echo "Changes since ${oldtag}:" > release-notes.txt
-          echo "" >> release-notes.txt
-          echo "" >> release-notes.txt
-          git shortlog ${oldtag}..${{ github.ref }} >> release-notes.txt
-
-      - name: Create Release
-        id: create_release
-        uses: actions/create-release@v1
-        env:
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
-        with:
-          tag_name: ${{ github.ref }}
-          release_name: Zephyr ${{ github.ref }}
-          body_path: release-notes.txt
-          draft: true
-          prerelease: true
-
-      - name: Upload Release Assets
-        id: upload-release-asset
-        uses: actions/upload-release-asset@v1
-        env:
-          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
-        with:
-          upload_url: ${{ steps.create_release.outputs.upload_url }}
-          asset_path: zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
-          asset_name: zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
-          asset_content_type: text/plain

.github/workflows/stale_issue.yml

@@ -1,23 +0,0 @@
-name: "Close stale pull requests/issues"
-on:
-  schedule:
-  - cron: "16 00 * * *"
-
-jobs:
-  stale:
-    name: Find Stale issues and PRs
-    runs-on: ubuntu-latest
-    if: github.repository == 'zephyrproject-rtos/zephyr'
-    steps:
-    - uses: actions/stale@v3
-      with:
-        repo-token: ${{ secrets.GITHUB_TOKEN }}
-        stale-pr-message: 'This pull request has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this pull request will automatically be closed in 14 days. Note, that you can always re-open a closed pull request at any time.'
-        stale-issue-message: 'This issue has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this issue will automatically be closed in 14 days. Note, that you can always re-open a closed issue at any time.'
-        days-before-stale: 60
-        days-before-close: 14
-        stale-issue-label: 'Stale'
-        stale-pr-label: 'Stale'
-        exempt-pr-labels: 'Blocked,In progress'
-        exempt-issue-labels: 'In progress,Enhancement,Feature,Feature Request,RFC,Meta'
-        operations-per-run: 400

.github/workflows/twister_tests.yml

@@ -1,52 +0,0 @@
-# Copyright (c) 2020 Intel Corporation.
-# SPDX-License-Identifier: Apache-2.0
-
-name: Twister TestSuite
-
-on:
-  push:
-    paths:
-    - 'scripts/pylib/twister/**'
-    - 'scripts/twister'
-    - 'scripts/tests/twister/**'
-    - '.github/workflows/twister_tests.yml'
-  pull_request:
-    paths:
-    - 'scripts/pylib/twister/**'
-    - 'scripts/twister'
-    - 'scripts/tests/twister/**'
-    - '.github/workflows/twister_tests.yml'
-
-jobs:
-  twister-tests:
-    name: Twister Unit Tests
-    runs-on: ${{ matrix.os }}
-    strategy:
-      matrix:
-        python-version: [3.6, 3.7, 3.8]
-        os: [ubuntu-latest]
-    steps:
-    - name: checkout
-      uses: actions/checkout@v2
-    - name: Set up Python ${{ matrix.python-version }}
-      uses: actions/setup-python@v1
-      with:
-        python-version: ${{ matrix.python-version }}
-    - name: cache-pip-linux
-      if: startsWith(runner.os, 'Linux')
-      uses: actions/cache@v1
-      with:
-        path: ~/.cache/pip
-        key: ${{ runner.os }}-pip-${{ matrix.python-version }}
-        restore-keys: |
-          ${{ runner.os }}-pip-${{ matrix.python-version }}
-    - name: install-packages
-      run: |
-        pip3 install pytest colorama pyyaml ply mock
-    - name: Run pytest
-      env:
-        ZEPHYR_BASE: ./
-        ZEPHYR_TOOLCHAIN_VARIANT: zephyr
-      run: |
-        echo "Run twister tests"
-        PYTHONPATH=./scripts/tests pytest ./scripts/tests/twister

.github/workflows/west_cmds.yml

@@ -1,69 +0,0 @@
-# Copyright (c) 2020 Linaro Limited.
-# SPDX-License-Identifier: Apache-2.0
-
-name: Zephyr West Command Tests
-
-on:
-  push:
-    paths:
-    - 'scripts/west-commands.yml'
-    - 'scripts/west_commands/**'
-    - '.github/workflows/west_cmds.yml'
-  pull_request:
-    paths:
-    - 'scripts/west-commands.yml'
-    - 'scripts/west_commands/**'
-    - '.github/workflows/west_cmds.yml'
-
-jobs:
-  west-commnads:
-    name: West Command Tests
-    runs-on: ${{ matrix.os }}
-    strategy:
-      matrix:
-        python-version: [3.6, 3.7, 3.8]
-        os: [ubuntu-latest, macos-latest, windows-latest]
-    steps:
-    - name: checkout
-      uses: actions/checkout@v2
-    - name: Set up Python ${{ matrix.python-version }}
-      uses: actions/setup-python@v1
-      with:
-        python-version: ${{ matrix.python-version }}
-    - name: cache-pip-linux
-      if: startsWith(runner.os, 'Linux')
-      uses: actions/cache@v1
-      with:
-        path: ~/.cache/pip
-        key: ${{ runner.os }}-pip-${{ matrix.python-version }}
-        restore-keys: |
-          ${{ runner.os }}-pip-${{ matrix.python-version }}
-    - name: cache-pip-mac
-      if: startsWith(runner.os, 'macOS')
-      uses: actions/cache@v1
-      with:
-        path: ~/Library/Caches/pip
-        # Trailing '-' was just to get a different cache name
-        key: ${{ runner.os }}-pip-${{ matrix.python-version }}-
-        restore-keys: |
-          ${{ runner.os }}-pip-${{ matrix.python-version }}-
-    - name: cache-pip-win
-      if: startsWith(runner.os, 'Windows')
-      uses: actions/cache@v1
-      with:
-        path: ~\AppData\Local\pip\Cache
-        key: ${{ runner.os }}-pip-${{ matrix.python-version }}
-        restore-keys: |
-          ${{ runner.os }}-pip-${{ matrix.python-version }}
-    - name: install pytest
-      run: |
-        pip3 install wheel
-        pip3 install pytest west pyelftools canopen progress mypy intelhex psutil
-    - name: run pytest-win
-      if: runner.os == 'Windows'
-      run: |
-        python ./scripts/west_commands/run_tests.py
-    - name: run pytest-mac-linux
-      if: runner.os != 'Windows'
-      run: |
-        ./scripts/west_commands/run_tests.py

.gitignore

@@ -8,8 +8,6 @@
 *.swo
 *~
 build*/
-!doc/guides/build
-!tests/drivers/build_all
 cscope.*
 .dir
 
@@ -32,11 +30,11 @@ doc/samples
 doc/latex
 doc/themes/zephyr-docs-theme
 sanity-out*
-twister-out*
 bsim_bt_out
 scripts/grub
 doc/reference/kconfig/*.rst
 doc/doc.warnings
+tags
 .*project
 .settings
 .envrc
@@ -47,7 +45,5 @@ hide-defaults-note
 GPATH
 GRTAGS
 GTAGS
-TAGS
-tags
 
 .idea

.gitlint

@@ -13,7 +13,7 @@ debug = false
 extra-path=scripts/gitlint
 
 [title-max-length-no-revert]
-line-length=75
+line-length=72
 
 [body-min-line-count]
 min-line-count=1

.known-issues/doc/bluetooth.conf

@@ -0,0 +1,68 @@
+#
+# Bluetooth unnamed struct definition
+#
+# FIXME: all these should match the relative filename
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]$
+^[ \t]*$
+^[ \t]*\^$
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]$
+^[ \t]*$
+^[ \t]*\^$
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]$
+^.*bt_conn_info.__unnamed__.*$
+^[- \t]*\^$
+#
+# bt_gatt_discover_params unnamed struct definition
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*bt_gatt_discover_params.__unnamed__.*
+^[- \t]*\^
+#
+# Bluetooth GATT unnamed struct definition
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*bt_gatt_read_params.__unnamed__.*
+^[- \t]*\^
+#
+# Bluetooth mesh unnamed struct definition
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*bt_mesh_model.__unnamed__.*
+^[- \t]*\^
+#
+# Bluetooth mesh pub struct definition
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]mesh[/\\]access.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*bt_mesh_model_pub.*
+^[- \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*bt_mesh_model_pub.*
+^[- \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*bt_mesh_model_pub.*
+^[- \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*bt_mesh_model_pub.*
+^[- \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*bt_mesh_model_pub.*
+^[- \t]*\^

.known-issues/doc/display.conf

@@ -0,0 +1,15 @@
+#
+# Display
+#
+#
+# include
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]display_api.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*mb_image.__unnamed__
+^[- \t]*\^

.known-issues/doc/duplicate.conf

@@ -1,39 +1,6 @@
 #
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]file_system[/\\]index.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
-^Declaration is \'.*\'\.$
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]file_system[/\\]index.rst):(?P<lineno>[0-9]+): WARNING: Duplicate declaration(.*)
 #
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]peripherals[/\\]dma.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
-^Declaration is \'.*\'\.$
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]peripherals[/\\]dma.rst):(?P<lineno>[0-9]+): WARNING: Duplicate declaration(.*)
 #
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]audio[/\\]dmic.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
-^Declaration is \'.*\'\.$
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking[/\\]net_if.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
-^Declaration is \'.*\'\.$
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking[/\\]ieee802154.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
-^Declaration is \'.*\'\.$
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking[/\\]sockets.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
-^Declaration is \'.*\'\.$
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]uuid.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
-^Declaration is \'.*\'\.$
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]sdp.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
-^Declaration is \'.*\'\.$
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]rfcomm.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
-^Declaration is \'.*\'\.$
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]hci_raw.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
-^Declaration is \'.*\'\.$
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]hci_drivers.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
-^Declaration is \'.*\'\.$
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]gatt.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
-^Declaration is \'.*\'\.$
-#
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]gap.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
-^Declaration is \'.*\'\.$
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]peripherals[/\\]sensor.rst):(?P<lineno>[0-9]+): WARNING: Duplicate declaration(.*)

.known-issues/doc/misc.conf

@@ -1,14 +1,15 @@
-# multiple section 'index'
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]custom-doxygen[/\\]mainpage.md):[0-9]+: warning: multiple use of section label 'index' for main page, \(first occurrence: .*$
 #
-^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]gatt.rst):(?P<lineno>[0-9]+): WARNING: Error in declarator$
-^[ \t]*If.*:$
-^[ \t]*Invalid C declaration: .* \[error at [0-9]+\]$
-^[ \t]*ATOMIC_DEFINE.*$
-^[- \t]*\^$
-^[ \t]*If.*:$
-^[ \t]*Error in declarator or parameters$
-^[ \t]*Invalid C declaration: .* \[error at [0-9]+\]$
-^[ \t]*ATOMIC_DEFINE.*$
-^[- \t]*\^$
-^[ \t]*$
+# Display
+#
+#
+# include
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]misc_api.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*json_obj_descr.__unnamed__
+^[- \t]*\^

.known-issues/doc/networking.conf

@@ -0,0 +1,70 @@
+#
+# Networking
+#
+#
+# include/net/net_ip.h warnings
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*in[_6]+addr.in[46]_u
+^[- \t]*\^
+#
+# include/net/net_mgmt.h
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*net_mgmt_event_callback.__unnamed__
+^[- \t]*\^
+#
+# include/net/buf.h
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*net_buf.__unnamed__
+^[- \t]*\^
+#
+# include/net/ieee802154.h
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*ieee802154_req_params.__unnamed__
+^[- \t]*\^
+#
+# include/net/net_context.h
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking[/\\]net_context.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*net_context.options
+^[- \t]*\^
+#
+# include/net/net_stats.h
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking[/\\]net_stats.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*net_stats_tc.[a-z]+
+^[- \t]*\^
+#
+# stray duplicate definition warnings
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking[/\\]net_if.rst):(?P<lineno>[0-9]+): WARNING: Duplicate declaration(.*)

.known-issues/doc/uart.conf

@@ -0,0 +1,31 @@
+#
+# UART unnamed struct definition
+#doc/api/peripherals/uart.rst
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]peripherals[/\\]uart.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*uart_device_config.__unnamed__.*
+^[- \t]*\^
+#
+^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]peripherals[/\\]uart.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
+^[ \t]*
+^[ \t]*\^
+^(?P=filename):(?P=lineno): WARNING: Invalid definition: Expected end of definition. \[error at [0-9]+]
+^.*uart_event.data
+^[- \t]*\^

.mailmap

@@ -20,13 +20,3 @@ Felipe Neves <ryukokki.felipe@gmail.com> <ryukokki.felipe@gmail.com>
 Amir Kaplan <amir.kaplan@intel.com> <amir.kaplan@intel.com>
 Anas Nashif <anas.nashif@intel.com> <anas.nashif@intel.com>
 Ruud Derwig <Ruud.Derwig@synopsys.com> <Ruud.Derwig@synopsys.com>
-Flavio Arieta Netto <flavio@exati.com.br>
-Nishikant Nayak <nishikantax.nayak@intel.com>
-Justin Watson <jwatson5@gmail.com>
-Johann Fischer <j.fischer@phytec.de>
-Jun Li <jun.r.li@intel.com>
-Xiaorui Hu <xiaorui.hu@linaro.org>
-Yannis Damigos <giannis.damigos@gmail.com> <ydamigos@iccs.gr>
-Vinayak Kariappa Chettimada <vinayak.kariappa.chettimada@nordicsemi.no> <vinayak.kariappa.chettimada@nordicsemi.no> <vich@nordicsemi.no> <vinayak.kariappa@gmail.com>
-Sean Nyekjaer <sean@geanix.com> <sean.nyekjaer@prevas.dk>
-Sean Nyekjaer <sean@geanix.com> <sean@nyekjaer.dk>

.shippable.yml

@@ -0,0 +1,79 @@
+language: c
+
+compiler: gcc
+
+env:
+    global:
+        - SDK=0.10.3
+        - ZEPHYR_SDK_INSTALL_DIR=/opt/sdk/zephyr-sdk-0.10.3
+        - ZEPHYR_TOOLCHAIN_VARIANT=zephyr
+        - MATRIX_BUILDS="5"
+    matrix:
+        - MATRIX_BUILD="1"
+        - MATRIX_BUILD="2"
+        - MATRIX_BUILD="3"
+        - MATRIX_BUILD="4"
+        - MATRIX_BUILD="5"
+
+build:
+    cache: false
+    cache_dir_list:
+        - ${SHIPPABLE_BUILD_DIR}/ccache
+    pre_ci_boot:
+        image_name: zephyrprojectrtos/ci
+        image_tag: v0.8.2
+        pull: true
+        options: "-e HOME=/home/buildslave --privileged=true --tty --net=bridge --user buildslave"
+
+    ci:
+      - export CCACHE_DIR=${SHIPPABLE_BUILD_DIR}/ccache/.ccache
+      - >
+        if [ "$IS_PULL_REQUEST" = "true" ]; then
+          ./scripts/ci/run_ci.sh -c -b ${PULL_REQUEST_BASE_BRANCH} -r origin -m ${MATRIX_BUILD} -M ${MATRIX_BUILDS} -p ${PULL_REQUEST};
+        else
+          ./scripts/ci/run_ci.sh -c -b ${BRANCH} -r origin -m ${MATRIX_BUILD} -M ${MATRIX_BUILDS};
+        fi;
+      - ccache -s
+    on_failure:
+      - >
+        if [ "$IS_PULL_REQUEST" = "true" ]; then
+          ./scripts/ci/run_ci.sh -f -b ${PULL_REQUEST_BASE_BRANCH} -r origin -m ${MATRIX_BUILD} -M ${MATRIX_BUILDS} -p ${PULL_REQUEST};
+        else
+          ./scripts/ci/run_ci.sh -f -b ${BRANCH} -r origin -m ${MATRIX_BUILD} -M ${MATRIX_BUILDS};
+        fi;
+    on_success:
+      - >
+        if [ "$IS_PULL_REQUEST" = "true" ]; then
+          ./scripts/ci/run_ci.sh -s -b ${PULL_REQUEST_BASE_BRANCH} -r origin -m ${MATRIX_BUILD} -M ${MATRIX_BUILDS} -p ${PULL_REQUEST};
+        else
+          ./scripts/ci/run_ci.sh -s -b ${BRANCH} -r origin -m ${MATRIX_BUILD} -M ${MATRIX_BUILDS};
+        fi;
+branches:
+  only:
+    - master
+    - v*-branch
+    - topic-*
+integrations:
+  notifications:
+    - integrationName: slack_integration
+      type: slack
+      recipients:
+        - "#ci"
+      branches:
+        only:
+          - master
+      on_success: never
+      on_failure: never
+    - integrationName: email
+      type: email
+      recipients:
+        - builds@zephyrproject.org
+      branches:
+        only:
+          - master
+          - net
+          - bluetooth
+          - arm
+          - v1.14-branch
+      on_success: never
+      on_failure: never

CODEOWNERS

@@ -1,628 +1,307 @@
 # CODEOWNERS for autoreview assigning in github
 
-# https://help.github.com/en/articles/about-code-owners#codeowners-syntax
-
-# Order is important; for each modified file, the last matching
-# pattern takes the most precedence.
-# That is, with the last pattern being
-# *.rst                                     @nashif
-# if only .rst files are being modified, only nashif is
-# automatically requested for review, but you can manually
-# add others as needed.
+# Order is important; the last matching pattern takes the most
+# precedence.
 
 # Do not use wildcard on all source yet
 # *                                        @galak @nashif
 
-/.known-issues/                           @nashif
-/.github/				  @nashif
-/.github/workflows/                       @galak @nashif
-/.buildkite/				  @galak
-/MAINTAINERS.yml                          @ioannisg @MaureenHelm
-/arch/arc/                                @abrodkin @ruuddw
-/arch/arm/                                @MaureenHelm @galak @ioannisg
-/arch/arm/core/aarch32/cortex_m/cmse/     @ioannisg
-/arch/arm/core/aarch64/                   @carlocaione
-/arch/arm/include/aarch32/cortex_m/cmse.h @ioannisg
-/arch/arm/include/aarch64/                @carlocaione
-/arch/arm/core/aarch32/cortex_a_r/        @MaureenHelm @galak @ioannisg @bbolen @stephanosio
-/arch/common/                             @ioannisg @andyross
-/soc/arc/snps_*/                          @abrodkin @ruuddw
-/soc/nios2/                               @nashif
-/soc/arm/                                 @MaureenHelm @galak @ioannisg
+/.github/                                 @nashif @galak
+/.known-issues/                           @inakypg @nashif
+/arch/arc/                                @vonhust @ruuddw
+/arch/arm/                                @MaureenHelm @galak
+/arch/arm/core/cortex_m/cmse/             @ioannisg
+arch/arm/include/cortex_m/cmse.h          @ioannisg
+/soc/arm/                                 @MaureenHelm @galak
 /soc/arm/arm/mps2/                        @fvincenzo
-/soc/arm/atmel_sam/common/*_sam4l_*.c     @nandojve
-/soc/arm/atmel_sam/sam3x/                 @ioannisg
-/soc/arm/atmel_sam/sam4e/                 @nandojve
-/soc/arm/atmel_sam/sam4l/                 @nandojve
 /soc/arm/atmel_sam/sam4s/                 @fallrisk
-/soc/arm/atmel_sam/same70/                @nandojve
-/soc/arm/atmel_sam/samv71/                @nandojve
-/soc/arm/cypress/                         @nandojve
-/soc/arm/bcm*/                            @sbranden
-/soc/arm/infineon_xmc/                    @parthitce
 /soc/arm/nxp*/                            @MaureenHelm
 /soc/arm/nordic_nrf/                      @ioannisg
-/soc/arm/nuvoton/                         @ssekar15
-/soc/arm/nuvoton_npcx/                    @MulinChao
-/soc/arm/qemu_cortex_a53/                 @carlocaione
-/soc/arm/quicklogic_eos_s3/               @kowalewskijan @kgugala
-/soc/arm/silabs_exx32/efm32pg1b/          @rdmeneze
-/soc/arm/silabs_exx32/efr32mg21/          @l-alfred
 /soc/arm/st_stm32/                        @erwango
-/soc/arm/st_stm32/*/power.c               @FRASTM
-/soc/arm/st_stm32/stm32mp1/               @arnopo
-/soc/arm/ti_simplelink/cc13x2_cc26x2/     @bwitherspoon
+/soc/arm/st_stm32/stm32f4/                @rsalveti @idlethread
 /soc/arm/ti_simplelink/cc32xx/            @vanti
 /soc/arm/ti_simplelink/msp432p4xx/        @Mani-Sadhasivam
-/soc/arm/xilinx_zynqmp/                   @stephanosio
-/soc/xtensa/intel_s1000/                  @sathishkuttan @dcpleung
-/arch/x86/                                @jhedberg @nashif @jenmwms @aasthagr
-/arch/nios2/                              @nashif
-/arch/posix/                              @aescolar @daor-oti
-/arch/riscv/                              @kgugala @pgielda
-/soc/posix/                               @aescolar @daor-oti
-/soc/riscv/                               @kgugala @pgielda
-/soc/riscv/openisa*/                      @MaureenHelm
-/soc/x86/                                 @dcpleung @nashif @jenmwms @aasthagr
-/arch/xtensa/                             @dcpleung @andyross @nashif
-/soc/xtensa/                              @dcpleung @andyross @nashif
-/arch/sparc/                              @martin-aberg
-/soc/sparc/                               @martin-aberg
-/boards/arc/                              @abrodkin @ruuddw
+/soc/xtensa/intel_s1000/                  @sathishkuttan @dcpleung @rgundi
+/arch/nios2/                              @andrewboie @ramakrishnapallala
+/arch/posix/                              @aescolar
+/arch/riscv32/                            @kgugala @pgielda @nategraff-sifive
+/soc/posix/                               @aescolar
+/soc/riscv32/                             @kgugala @pgielda @nategraff-sifive
+/arch/x86/                                @andrewboie @ramakrishnapallala
+/arch/x86/core/                           @andrewboie
+/arch/x86/core/crt0.S                     @ramakrishnapallala @nashif
+/soc/x86/                                 @andrewboie @ramakrishnapallala
+/soc/x86/intel_quark/quark_d2000/         @nashif
+/soc/x86/intel_quark/quark_se/            @nashif
+/soc/x86/intel_quark/quark_x1000/         @nashif
+/arch/xtensa/                             @andrewboie @rgundi @andyross
+/soc/xtensa/                              @andrewboie @rgundi @andyross
+/boards/arc/                              @vonhust @ruuddw
+/boards/arc/arduino_101_sss/              @nashif
+/boards/arc/em_starterkit/                @vonhust
+/boards/arc/quark_se_c1000_ss_devboard/   @nashif
 /boards/arm/                              @MaureenHelm @galak
 /boards/arm/96b_argonkey/                 @avisconti
-/boards/arm/96b_avenger96/                @Mani-Sadhasivam
-/boards/arm/96b_carbon/                   @idlethread
-/boards/arm/96b_meerkat96/                @Mani-Sadhasivam
+/boards/arm/96b_carbon/                   @rsalveti @idlethread
 /boards/arm/96b_nitrogen/                 @idlethread
 /boards/arm/96b_neonkey/                  @Mani-Sadhasivam
 /boards/arm/96b_stm32_sensor_mez/         @Mani-Sadhasivam
-/boards/arm/96b_wistrio/                  @Mani-Sadhasivam
-/boards/arm/arduino_due/                  @ioannisg
-/boards/arm/cc1352r1_launchxl/            @bwitherspoon
-/boards/arm/cc26x2r1_launchxl/            @bwitherspoon
 /boards/arm/cc3220sf_launchxl/            @vanti
-/boards/arm/cy8*                          @nandojve
+/boards/arm/curie_ble/                    @jhedberg
 /boards/arm/disco_l475_iot1/              @erwango
-/boards/arm/efm32pg_stk3401a/             @rdmeneze
-/boards/arm/faze/                         @mbittan @simonguinot
 /boards/arm/frdm*/                        @MaureenHelm
 /boards/arm/frdm*/doc/                    @MaureenHelm @MeganHansen
-/boards/arm/google_*/                     @jackrosenthal
 /boards/arm/hexiwear*/                    @MaureenHelm
 /boards/arm/hexiwear*/doc/                @MaureenHelm @MeganHansen
-/boards/arm/ip_k66f/                      @parthitce
 /boards/arm/lpcxpresso*/                  @MaureenHelm
 /boards/arm/lpcxpresso*/doc/              @MaureenHelm @MeganHansen
-/boards/arm/mimx8mm_evk/                  @Mani-Sadhasivam
 /boards/arm/mimxrt*/                      @MaureenHelm
 /boards/arm/mimxrt*/doc/                  @MaureenHelm @MeganHansen
 /boards/arm/mps2_an385/                   @fvincenzo
 /boards/arm/msp_exp432p401r_launchxl/     @Mani-Sadhasivam
-/boards/arm/npcx7m6fb_evb/                @MulinChao
-/boards/arm/nrf*/                         @carlescufi @lemrey @ioannisg
-/boards/arm/nucleo*/                      @erwango @ABOSTM @FRASTM
-/boards/arm/nucleo_f401re/                @idlethread
-/boards/arm/nuvoton_pfm_m487/             @ssekar15
-/boards/arm/qemu_cortex_a53/              @carlocaione
-/boards/arm/qemu_cortex_r*/               @stephanosio
-/boards/arm/qemu_cortex_m*/               @ioannisg
-/boards/arm/quick_feather/                @kowalewskijan @kgugala
-/boards/arm/rak5010_nrf52840/             @gpaquet85
-/boards/arm/xmc45_relax_kit/              @parthitce
-/boards/arm/sam4e_xpro/                   @nandojve
-/boards/arm/sam4l_ek/                     @nandojve
+/boards/arm/nrf51_blenano/                @rsalveti
+/boards/arm/nrf51_pca10028/               @carlescufi
+/boards/arm/nrf52_pca10040/               @carlescufi
+/boards/arm/nrf52_pca20020/               @tkln
+/boards/arm/nrf52810_pca10040/            @carlescufi
+/boards/arm/nrf52840_pca10056/            @carlescufi
+/boards/arm/nrf52840_pca10059/            @lemrey
+/boards/arm/nrf9160_pca10090/             @ioannisg
+/boards/arm/nucleo*/                      @erwango
+/boards/arm/nucleo_f401re/                @rsalveti @idlethread
 /boards/arm/sam4s_xplained/               @fallrisk
-/boards/arm/sam_e70_xplained/             @nandojve
-/boards/arm/sam_v71_xult/                 @nandojve
 /boards/arm/v2m_beetle/                   @fvincenzo
 /boards/arm/olimexino_stm32/              @ydamigos
-/boards/arm/sensortile_box/               @avisconti
-/boards/arm/steval_fcu001v1/              @Navin-Sankar
-/boards/arm/stm32l1_disco/                @karlp
-/boards/arm/stm32*_disco/                 @erwango @ABOSTM @FRASTM
+/boards/arm/stm32*_disco/                 @erwango
 /boards/arm/stm32f3_disco/                @ydamigos
-/boards/arm/stm32*_eval/                  @erwango @ABOSTM @FRASTM
-/boards/common/                           @mbolivar-nordic
-/boards/deprecated.cmake                  @tejlmand
-/boards/nios2/                            @nashif
-/boards/nios2/altera_max10/               @nashif
-/boards/arm/stm32_min_dev/                @cbsiddharth
-/boards/posix/                            @aescolar @daor-oti
-/boards/posix/nrf52_bsim/                 @aescolar @wopu-ot
-/boards/riscv/                            @kgugala @pgielda
-/boards/riscv/rv32m1_vega/                @MaureenHelm
+/boards/arm/stm32*_eval/                  @erwango
+/boards/nios2/                            @ramakrishnapallala
+/boards/nios2/altera_max10/               @ramakrishnapallala
+/boards/posix/                            @aescolar
+/boards/riscv32/                          @kgugala @pgielda @nategraff-sifive
 /boards/shields/                          @erwango
-/boards/shields/atmel_rf2xx/              @nandojve
-/boards/shields/esp_8266/                 @nandojve
-/boards/shields/inventek_eswifi/          @nandojve
-/boards/x86/                              @dcpleung @nashif @jenmwms @aasthagr
+/boards/x86/                              @andrewboie @nashif
+/boards/x86/arduino_101/                  @nashif
+/boards/x86/galileo/                      @nashif
+/boards/x86/quark_d2000_crb/              @nashif
+/boards/x86/quark_se_c1000_devboard/      @nashif
 /boards/xtensa/                           @nashif @dcpleung
 /boards/xtensa/intel_s1000_crb/           @sathishkuttan @dcpleung
-/boards/xtensa/odroid_go/                 @ydamigos
-/boards/sparc/                            @martin-aberg
 # All cmake related files
-/cmake/                                   @tejlmand @nashif
-/cmake/*/arcmwdt/                         @abrodkin @evgeniy-paltsev @tejlmand
-/CMakeLists.txt                           @tejlmand @nashif
+/cmake/                                   @SebastianBoe @nashif
+/cmake/compiler/xcc/                      @nashif
+/cmake/toolchain/xcc/                     @nashif
+/CMakeLists.txt                           @SebastianBoe @nashif
 /doc/                                     @dbkinder
 /doc/guides/coccinelle.rst                @himanshujha199640 @JuliaLawall
 /doc/CMakeLists.txt                       @carlescufi
 /doc/scripts/                             @carlescufi
-/doc/guides/bluetooth/                    @joerchan @jhedberg @Vudentz
-/doc/guides/dts/                          @galak @mbolivar-nordic
-/doc/reference/bluetooth/                 @joerchan @jhedberg @Vudentz
-/doc/reference/devicetree/                @galak @mbolivar-nordic
-/doc/reference/resource_management/       @pabigot
-/doc/reference/networking/can*            @alexanderwachter
-/doc/security/                            @ceolin @d3zd3z
-/drivers/debug/                           @nashif
-/drivers/*/*sam4l*                        @nandojve
-/drivers/*/*cc13xx_cc26xx*                @bwitherspoon
-/drivers/*/*litex*                        @mateusz-holenko @kgugala @pgielda
+/doc/guides/bluetooth/                    @sjanc @jhedberg @Vudentz
+/doc/reference/bluetooth/                 @sjanc @jhedberg @Vudentz
 /drivers/*/*mcux*                         @MaureenHelm
-/drivers/*/*stm32*                        @erwango @ABOSTM @FRASTM
-/drivers/*/*native_posix*                 @aescolar @daor-oti
-/drivers/*/*lpc11u6x*                     @mbittan @simonguinot
-/drivers/*/*npcx*                         @MulinChao
+/drivers/*/*qmsi*                         @nashif
+/drivers/*/*stm32*                        @erwango
+/drivers/*/*native_posix*                 @aescolar
 /drivers/adc/                             @anangl
-/drivers/adc/adc_stm32.c                  @cybertale
-/drivers/bluetooth/                       @joerchan @jhedberg @Vudentz
+/drivers/bluetooth/                       @sjanc @jhedberg @Vudentz
 /drivers/can/                             @alexanderwachter
-/drivers/can/*mcp2515*                    @karstenkoenig
-/drivers/clock_control/*nrf*              @nordic-krch
-/drivers/clock_control/*esp32*            @extremegtx
+/drivers/clock_control/*stm32f4*          @rsalveti @idlethread
 /drivers/counter/                         @nordic-krch
-/drivers/console/ipm_console.c            @finikorg
-/drivers/console/semihost_console.c       @luozhongyao
-/drivers/counter/counter_cmos.c           @dcpleung
-/drivers/counter/maxim_ds3231.c           @pabigot
-/drivers/crypto/*nrf_ecb*                 @maciekfabia @anangl
-/drivers/console/*mux*                    @jukkar
 /drivers/display/                         @vanwinkeljan
-/drivers/display/display_framebuf.c       @dcpleung
-/drivers/dac/                             @martinjaeger
-/drivers/dma/*dw*                         @tbursztyka
-/drivers/dma/*sam0*                       @Sizurka
-/drivers/dma/dma_stm32*                   @cybertale @lowlander
-/drivers/dma/*pl330*                      @raveenp
-/drivers/dma/*iproc_pax*                  @raveenp
-/drivers/ec_host_cmd_periph/              @jettr
-/drivers/edac/                            @finikorg
-/drivers/eeprom/                          @henrikbrixandersen
-/drivers/eeprom/eeprom_stm32.c            @KwonTae-young
-/drivers/entropy/*rv32m1*                 @MaureenHelm
-/drivers/entropy/*gecko*                  @chrta
-/drivers/entropy/*litex*                  @mateusz-holenko @kgugala @pgielda
-/drivers/espi/                            @albertofloyd @franciscomunoz @scottwcpg
 /drivers/ethernet/                        @jukkar @tbursztyka @pfalcon
-/drivers/ethernet/*stm32*                 @Nukersson @lochej
-/drivers/ethernet/*w5500*                 @parthitce
-/drivers/flash/                           @nashif @nvlsianpu
-/drivers/flash/*nrf*                      @nvlsianpu
-/drivers/flash/*spi_nor*                  @pabigot
-/drivers/gpio/                            @mnkp @pabigot
-/drivers/gpio/*ht16k33*                   @henrikbrixandersen
-/drivers/gpio/*lmp90xxx*                  @henrikbrixandersen
-/drivers/gpio/*stm32*                     @erwango
-/drivers/gpio/*sx1509b*                   @pabigot
+/drivers/flash/                           @nashif
+/drivers/flash/*stm32*                    @superna9999
+/drivers/gpio/*stm32*                     @rsalveti @idlethread
 /drivers/hwinfo/                          @alexanderwachter
 /drivers/i2s/i2s_ll_stm32*                @avisconti
-/drivers/i2c/i2c_common.c                 @sjg20
-/drivers/i2c/i2c_emul.c                   @sjg20
-/drivers/i2c/i2c_ite_it8xxx2.c            @GTLin08
-/drivers/i2c/i2c_shell.c                  @nashif
-/drivers/i2c/Kconfig.i2c_emul             @sjg20
-/drivers/i2c/Kconfig.it8xxx2              @GTLin08
-/drivers/i2c/slave/*eeprom*               @henrikbrixandersen
-/drivers/i2s/*litex*                      @mateusz-holenko @kgugala @pgielda
 /drivers/ieee802154/                      @jukkar @tbursztyka
-/drivers/ieee802154/ieee802154_rf2xx*     @jukkar @tbursztyka @nandojve
-/drivers/ieee802154/ieee802154_cc13xx*    @bwitherspoon @cfriedt
-/drivers/interrupt_controller/            @dcpleung @nashif
-/drivers/interrupt_controller/intc_gic.c  @stephanosio
-/drivers/ipm/ipm_mhu*                     @karl-zh
-/drivers/ipm/Kconfig.nrfx                 @masz-nordic @ioannisg
-/drivers/ipm/Kconfig.nrfx_ipc_channel     @masz-nordic @ioannisg
-/drivers/ipm/ipm_intel_adsp.c             @finikorg
-/drivers/ipm/ipm_cavs_idc*                @dcpleung
-/drivers/ipm/ipm_nrfx_ipc.c               @masz-nordic @ioannisg
-/drivers/ipm/ipm_nrfx_ipc.h               @masz-nordic @ioannisg
-/drivers/ipm/ipm_stm32_ipcc.c             @arnopo
-/drivers/kscan/                           @albertofloyd @franciscomunoz @scottwcpg
+/drivers/interrupt_controller/            @andrewboie
 /drivers/led/                             @Mani-Sadhasivam
-/drivers/led_strip/                       @mbolivar-nordic
-/drivers/lora/                            @Mani-Sadhasivam
-/drivers/memc/                            @gmarull
-/drivers/modem/*gsm*                      @jukkar
-/drivers/modem/hl7800.c                   @rerickson1
-/drivers/modem/Kconfig.hl7800             @rerickson1
-/drivers/pcie/                            @dcpleung @nashif @jhedberg
-/drivers/peci/                            @albertofloyd @franciscomunoz @scottwcpg
-/drivers/pinmux/*hsdk*                    @iriszzw
-/drivers/pinmux/*it8xxx2*                 @ite
-/drivers/psci/                            @carlocaione
-/drivers/ps2/                             @albertofloyd @franciscomunoz @scottwcpg
-/drivers/pwm/*rv32m1*                     @henrikbrixandersen
-/drivers/pwm/*sam0*                       @nzmichaelh
-/drivers/pwm/*stm32*                      @gmarull
-/drivers/pwm/*xlnx*                       @henrikbrixandersen
-/drivers/pwm/pwm_capture.c                @henrikbrixandersen
-/drivers/pwm/pwm_shell.c                  @henrikbrixandersen
-/drivers/regulator/                       @pabigot
-/drivers/sensor/                          @MaureenHelm
-/drivers/sensor/ams_iAQcore/              @alexanderwachter
-/drivers/sensor/ens210/                   @alexanderwachter
+/drivers/led_strip/                       @mbolivar
+/drivers/modem/                           @mike-scott
+/drivers/pci/                             @gnuless
+/drivers/pinmux/stm32/                    @rsalveti @idlethread
+/drivers/sensor/                          @bogdan-davidoaia @MaureenHelm
 /drivers/sensor/hts*/                     @avisconti
 /drivers/sensor/lis*/                     @avisconti
 /drivers/sensor/lps*/                     @avisconti
 /drivers/sensor/lsm*/                     @avisconti
-/drivers/sensor/mpr/                      @sven-hm
-/drivers/sensor/st*/                      @avisconti
-/drivers/serial/uart_altera_jtag_hal.c    @nashif
-/drivers/serial/*ns16550*                 @dcpleung @nashif @jenmwms @aasthagr
-/drivers/serial/*nrfx*                    @Mierunski @anangl
-/drivers/serial/uart_liteuart.c           @mateusz-holenko @kgugala @pgielda
-/drivers/serial/Kconfig.mcux_iuart        @Mani-Sadhasivam
-/drivers/serial/uart_mcux_iuart.c         @Mani-Sadhasivam
-/drivers/serial/Kconfig.rtt               @carlescufi @pkral78
-/drivers/serial/uart_rtt.c                @carlescufi @pkral78
-/drivers/serial/Kconfig.xlnx              @wjliang
-/drivers/serial/uart_xlnx_ps.c            @wjliang
-/drivers/serial/uart_xlnx_uartlite.c      @henrikbrixandersen
-/drivers/serial/*xmc4xxx*                 @parthitce
-/drivers/serial/*nuvoton*                 @ssekar15
-/drivers/serial/*apbuart*                 @martin-aberg
-/drivers/net/                             @jukkar @tbursztyka
-/drivers/ptp_clock/                       @jukkar
+/drivers/serial/uart_altera_jtag_hal.c    @ramakrishnapallala
+/drivers/net/slip.c                       @jukkar @tbursztyka
 /drivers/spi/                             @tbursztyka
-/drivers/spi/spi_rv32m1_lpspi*            @karstenkoenig
-/drivers/timer/apic_timer.c               @dcpleung @nashif
-/drivers/timer/arm_arch_timer.c           @carlocaione
+/drivers/spi/spi_ll_stm32.*               @superna9999
 /drivers/timer/cortex_m_systick.c         @ioannisg
-/drivers/timer/altera_avalon_timer_hal.c  @nashif
-/drivers/timer/riscv_machine_timer.c      @kgugala @pgielda
-/drivers/timer/ite_it8xxx2_timer.c        @ite
-/drivers/timer/xlnx_psttc_timer*          @wjliang @stephanosio
-/drivers/timer/cc13x2_cc26x2_rtc_timer.c  @vanti
-/drivers/timer/cavs_timer.c               @dcpleung
-/drivers/timer/stm32_lptim_timer.c        @FRASTM
-/drivers/timer/leon_gptimer.c             @martin-aberg
-/drivers/usb/                             @jfischer-no @finikorg
+/drivers/timer/altera_avalon_timer_hal.c  @ramakrishnapallala
+/drivers/timer/riscv_machine_timer.c      @nategraff-sifive @kgugala @pgielda
+/drivers/usb/                             @jfischer-phytec-iot @finikorg
 /drivers/usb/device/usb_dc_stm32.c        @ydamigos @loicpoulain
-/drivers/video/                           @loicpoulain
-/drivers/i2c/i2c_ll_stm32*                @ydamigos
-/drivers/i2c/i2c_rv32m1_lpi2c*            @henrikbrixandersen
-/drivers/i2c/*sam0*                       @Sizurka
-/drivers/i2c/i2c_dw*                      @dcpleung
-/drivers/*/*xec*                          @franciscomunoz @albertofloyd @scottwcpg
-/drivers/watchdog/*gecko*                 @oanerer
-/drivers/watchdog/*sifive*                @katsuster
-/drivers/watchdog/wdt_handlers.c          @dcpleung @nashif
+/drivers/i2c/i2c_ll_stm32*                @ldts @ydamigos
+/drivers/watchdog/wdt_handlers.c          @andrewboie
 /drivers/wifi/                            @jukkar @tbursztyka @pfalcon
-/drivers/wifi/esp/                        @mniestroj
-/drivers/wifi/eswifi/                     @loicpoulain @nandojve
-/drivers/wifi/winc1500/                   @kludentwo
-/drivers/virtualization/		  @tbursztyka
-/dts/arc/                                 @abrodkin @ruuddw @iriszzw
-/dts/arm/atmel/sam4e*                     @nandojve
-/dts/arm/atmel/sam4l*                     @nandojve
-/dts/arm/atmel/samr21.dtsi                @benpicco
-/dts/arm/atmel/sam*5*.dtsi                @benpicco
-/dts/arm/atmel/same70*                    @nandojve
-/dts/arm/atmel/samv71*                    @nandojve
-/dts/arm/atmel/                           @galak
-/dts/arm/broadcom/                        @sbranden
-/dts/arm/infineon/                        @parthitce
-/dts/arm/qemu-virt/                       @carlocaione
-/dts/arm/quicklogic/                      @wtatarski @kowalewskijan @kgugala
+/drivers/wifi/eswifi/                     @loicpoulain
 /dts/arm/st/                              @erwango
-/dts/arm/ti/cc13?2*                       @bwitherspoon
-/dts/arm/ti/cc26?2*                       @bwitherspoon
-/dts/arm/ti/cc3235*                       @vanti
 /dts/arm/nordic/                          @ioannisg @carlescufi
-/dts/arm/nuvoton/                         @ssekar15
-/dts/arm/nuvoton/npcx/                    @MulinChao
 /dts/arm/nxp/                             @MaureenHelm
-/dts/arm/microchip/                       @franciscomunoz @albertofloyd @scottwcpg
-/dts/arm/silabs/efm32_pg_1b.dtsi          @rdmeneze
-/dts/arm/silabs/efm32gg11b*               @oanerer
-/dts/arm/silabs/efm32_jg_pg*              @chrta
-/dts/arm/silabs/efr32bg13p*               @mnkp
-/dts/arm/silabs/efm32jg12b*               @chrta
-/dts/arm/silabs/efm32pg12b*               @chrta
-/dts/arm/silabs/efm32pg1b*                @rdmeneze
-/dts/arm/silabs/efr32mg21*                @l-alfred
-/dts/riscv/                               @kgugala @pgielda
-/dts/riscv/it8xxx2.dtsi                   @ite
-/dts/riscv/microsemi-miv.dtsi             @galak
-/dts/riscv/rv32m1*                        @MaureenHelm
-/dts/riscv/riscv32-litex-vexriscv.dtsi    @mateusz-holenko @kgugala @pgielda
-/dts/arm/armv7-r.dtsi                     @bbolen @stephanosio
-/dts/arm/armv8-a.dtsi                     @carlocaione
-/dts/arm/xilinx/                          @bbolen @stephanosio
-/dts/x86/                                 @jhedberg
-/dts/xtensa/xtensa.dtsi                   @ydamigos
-/dts/xtensa/intel/                        @dcpleung
-/dts/sparc/                               @martin-aberg
 /dts/bindings/                            @galak
 /dts/bindings/can/                        @alexanderwachter
-/dts/bindings/i2c/zephyr*i2c-emul.yaml    @sjg20
-/dts/bindings/adc/st*stm32-adc.yaml       @cybertale
-/dts/bindings/modem/*hl7800.yaml          @rerickson1
-/dts/bindings/serial/ns16550.yaml         @dcpleung @nashif
-/dts/bindings/wifi/*esp.yaml              @mniestroj
-/dts/bindings/*/*npcx*                    @MulinChao
 /dts/bindings/*/nordic*                   @anangl
 /dts/bindings/*/nxp*                      @MaureenHelm
-/dts/bindings/*/openisa*                  @MaureenHelm
-/dts/bindings/*/st*                       @erwango
-/dts/bindings/sensor/ams*                 @alexanderwachter
-/dts/bindings/*/sifive*                   @mateusz-holenko @kgugala @pgielda
-/dts/bindings/*/litex*                    @mateusz-holenko @kgugala @pgielda
-/dts/bindings/*/vexriscv*                 @mateusz-holenko @kgugala @pgielda
-/dts/bindings/psci/*                      @carlocaione
-/dts/posix/                               @aescolar @vanwinkeljan @daor-oti
-/dts/bindings/sensor/*bme680*             @BoschSensortec
-/dts/bindings/sensor/st*                  @avisconti
-/include/                                 @nashif @carlescufi @galak @MaureenHelm
-/include/drivers/*/*litex*                @mateusz-holenko @kgugala @pgielda
-/include/drivers/adc.h                    @anangl
-/include/drivers/can.h                    @alexanderwachter
-/include/drivers/counter.h                @nordic-krch
-/include/drivers/dac.h                    @martinjaeger
-/include/drivers/display.h                @vanwinkeljan
-/include/drivers/espi.h                   @albertofloyd @franciscomunoz @scottwcpg
-/include/drivers/bluetooth/               @joerchan @jhedberg @Vudentz
-/include/drivers/flash.h                  @nashif @carlescufi @galak @MaureenHelm @nvlsianpu
-/include/drivers/i2c_emul.h               @sjg20
-/include/drivers/led/ht16k33.h            @henrikbrixandersen
-/include/drivers/interrupt_controller/    @dcpleung @nashif
-/include/drivers/interrupt_controller/gic.h @stephanosio
-/include/drivers/modem/hl7800.h           @rerickson1
-/include/drivers/pcie/                    @dcpleung
-/include/drivers/hwinfo.h                 @alexanderwachter
-/include/drivers/led.h                    @Mani-Sadhasivam
-/include/drivers/led_strip.h              @mbolivar-nordic
-/include/drivers/sensor.h                 @MaureenHelm
-/include/drivers/spi.h                    @tbursztyka
-/include/drivers/lora.h                   @Mani-Sadhasivam
-/include/drivers/peci.h                   @albertofloyd @franciscomunoz @scottwcpg
-/include/drivers/psci.h                   @carlocaione
-/include/app_memory/                      @dcpleung
-/include/arch/arc/                        @abrodkin @ruuddw
-/include/arch/arc/arch.h                  @abrodkin @ruuddw
-/include/arch/arc/v2/irq.h                @abrodkin @ruuddw
-/include/arch/arm/aarch32/                @MaureenHelm @galak @ioannisg
-/include/arch/arm/aarch32/cortex_a_r/     @stephanosio
-/include/arch/arm/aarch64/                @carlocaione
-/include/arch/arm/arm-smccc.h             @carlocaione
-/include/arch/arm/aarch32/irq.h           @carlocaione
-/include/arch/nios2/                      @nashif
-/include/arch/nios2/arch.h                @nashif
-/include/arch/posix/                      @aescolar @daor-oti
-/include/arch/riscv/                      @kgugala @pgielda
-/include/arch/x86/                        @jhedberg @dcpleung
-/include/arch/common/                     @andyross @nashif
-/include/arch/xtensa/                     @andyross @dcpleung
-/include/arch/sparc/                      @martin-aberg
-/include/sys/atomic.h                     @andyross
-/include/bluetooth/                       @joerchan @jhedberg @Vudentz
-/include/cache.h                          @carlocaione @andyross
-/include/canbus/                          @alexanderwachter
-/include/tracing/                         @nashif
-/include/debug/                           @nashif
-/include/debug/coredump.h                 @dcpleung
-/include/debug/gdbstub.h                  @ceolin
-/include/device.h                         @tbursztyka @nashif
-/include/devicetree.h                     @galak
+/ext/fs/                                  @nashif @ramakrishnapallala
+/ext/hal/cmsis/                           @MaureenHelm @galak
+/ext/hal/libmetal/                        @galak
+/ext/hal/nordic/                          @carlescufi @anangl
+/ext/hal/nxp/                             @MaureenHelm
+/ext/hal/qmsi/                            @nashif
+/ext/hal/st/stm32cube/                    @erwango
+/ext/hal/ti/simplelink/                   @vanti
+/ext/lib/crypto/mbedtls/                  @nashif
+/ext/lib/crypto/tinycrypt/                @ceolin
+/include/adc.h                            @anangl
+/include/app_memory/                      @andrewboie
+/include/arch/arc/                        @vonhust @ruuddw
+/include/arch/arc/arch.h                  @andrewboie
+/include/arch/arc/v2/irq.h                @andrewboie
+/include/arch/arm/                        @MaureenHelm @galak
+/include/arch/arm/cortex_m/irq.h          @andrewboie
+/include/arch/nios2/                      @andrewboie
+/include/arch/nios2/arch.h                @andrewboie
+/include/arch/posix/                      @aescolar
+/include/arch/riscv32/                    @nategraff-sifive @kgugala @pgielda
+/include/arch/x86/                        @andrewboie @ramakrishnapallala
+/include/arch/x86/arch.h                  @andrewboie
+/include/arch/xtensa/                     @andrewboie
+/include/atomic.h                         @andrewboie @andyross
+/include/bluetooth/                       @sjanc @jhedberg @Vudentz
+/include/cache.h                          @andrewboie @andyross
+/include/can.h                            @alexanderwachter
+/include/counter.h                        @nordic-krch
+/include/device.h                         @ramakrishnapallala @nashif
+/include/display.h                        @vanwinkeljan
 /include/display/                         @vanwinkeljan
-/include/dt-bindings/clock/kinetis_mcg.h  @henrikbrixandersen
-/include/dt-bindings/clock/kinetis_scg.h  @henrikbrixandersen
-/include/dt-bindings/dma/stm32_dma.h      @cybertale
-/include/dt-bindings/pcie/                @dcpleung
-/include/dt-bindings/usb/usb.h            @galak @finikorg
-/include/emul.h                           @sjg20
-/include/fs/                              @nashif @nvlsianpu @de-nordic @pabigot
-/include/init.h                           @nashif @andyross
-/include/irq.h                            @dcpleung @nashif @andyross
-/include/irq_offload.h                    @dcpleung @nashif @andyross
-/include/kernel.h                         @dcpleung @nashif @andyross
-/include/kernel_version.h                 @dcpleung @nashif @andyross
-/include/linker/app_smem*.ld              @dcpleung @nashif
-/include/linker/                          @dcpleung @nashif @andyross
+/include/drivers/bluetooth/               @sjanc @jhedberg @Vudentz
+/include/drivers/modem/                   @mike-scott
+/include/drivers/ioapic.h                 @andrewboie
+/include/drivers/loapic.h                 @andrewboie
+/include/drivers/mvic.h                   @andrewboie
+/include/fs.h                             @nashif @ramakrishnapallala
+/include/fs/                              @nashif @ramakrishnapallala
+/include/hwinfo.h                         @alexanderwachter
+/include/init.h                           @andrewboie @andyross
+/include/irq.h                            @andrewboie @andyross
+/include/irq_offload.h                    @andrewboie @andyross
+/include/kernel.h                         @andrewboie @andyross
+/include/kernel_version.h                 @andrewboie @andyross
+/include/led.h                            @Mani-Sadhasivam
+/include/led_strip.h                      @mbolivar
+/include/linker/app_smem*.ld              @andrewboie
+/include/linker/linker-defs.h             @andrewboie @andyross
+/include/linker/linker-tool-gcc.h         @andrewboie @andyross
+/include/linker/linker-tool.h             @andrewboie @andyross
+/include/linker/section_tags.h            @andrewboie @andyross
+/include/linker/sections.h                @andrewboie @andyross
 /include/logging/                         @nordic-krch
-/include/lorawan/lorawan.h                @Mani-Sadhasivam
-/include/mgmt/osdp.h                      @cbsiddharth
+/include/misc/                            @andrewboie @andyross
 /include/net/                             @jukkar @tbursztyka @pfalcon
 /include/net/buf.h                        @jukkar @jhedberg @tbursztyka @pfalcon
-/include/net/coap*.h                      @jukkar @rlubos
-/include/net/lwm2m*.h                     @jukkar @rlubos
-/include/net/mqtt.h                       @jukkar @rlubos
 /include/posix/                           @pfalcon
-/include/power/power.h                    @pabigot @nashif @ceolin
-/include/ptp_clock.h                      @jukkar
-/include/shared_irq.h                     @dcpleung @nashif @andyross
-/include/shell/                           @jakub-uC @nordic-krch
-/include/sw_isr_table.h                   @dcpleung @nashif @andyross
-/include/sys_clock.h                      @dcpleung @nashif @andyross
-/include/sys/sys_io.h                     @dcpleung @nashif @andyross
-/include/sys/kobject.h                    @dcpleung @nashif
-/include/toolchain.h                      @dcpleung @andyross @nashif
-/include/toolchain/                       @dcpleung @nashif @andyross
-/include/zephyr.h                         @dcpleung @nashif @andyross
-/kernel/                                  @dcpleung @nashif @andyross
-/lib/fnmatch/                             @carlescufi
+/include/power.h                          @ramakrishnapallala @nashif
+/include/sensor.h                         @bogdan-davidoaia
+/include/shared_irq.h                     @andrewboie @andyross
+/include/shell/                           @jarz-nordic @nordic-krch
+/include/spi.h                            @tbursztyka
+/include/sw_isr_table.h                   @andrewboie @andyross
+/include/sys_clock.h                      @andrewboie @andyross
+/include/sys_io.h                         @andrewboie @andyross
+/include/toolchain.h                      @andrewboie @andyross @nashif
+/include/toolchain/                       @andrewboie @andyross
+/include/zephyr.h                         @andrewboie @andyross
+/kernel/                                  @andrewboie @andyross
 /lib/gui/                                 @vanwinkeljan
-/lib/open-amp/                            @arnopo
-/lib/os/                                  @dcpleung @nashif @andyross
+/lib/os/                                  @andrewboie @andyross
 /lib/posix/                               @pfalcon
-/lib/cmsis_rtos_v2/                       @nashif
-/lib/cmsis_rtos_v1/                       @nashif
-/lib/libc/                                @nashif
-/modules/                                 @nashif
-/modules/Kconfig.tfm                      @ioannisg @microbuilder
-/kernel/device.c                          @andyross @nashif
-/kernel/idle.c                            @andyross @nashif
-/samples/                                 @nashif
-/samples/basic/minimal/                   @carlescufi
-/samples/basic/servo_motor/boards/*microbit* @jhe
-/samples/bluetooth/                       @jhedberg @Vudentz @joerchan
-/samples/boards/intel_s1000_crb/          @sathishkuttan @dcpleung @nashif
+/lib/libc/                                @nashif @andrewboie
+/kernel/device.c                          @andrewboie @andyross @nashif
+/kernel/idle.c                            @andrewboie @andyross @nashif
+/samples/basic/servo_motor/*microbit*     @jhe
+/samples/bluetooth/                       @sjanc @jhedberg @Vudentz
+/samples/boards/intel_s1000_crb/          @sathishkuttan @rgundi @nashif
 /samples/display/                         @vanwinkeljan
-/samples/drivers/can/                     @alexanderwachter
-/samples/drivers/clock_control_litex/     @mateusz-holenko @kgugala @pgielda
-/samples/drivers/display/                 @vanwinkeljan
-/samples/drivers/ht16k33/                 @henrikbrixandersen
-/samples/drivers/lora/                    @Mani-Sadhasivam
-/samples/drivers/counter/maxim_ds3231/    @pabigot
-/samples/lorawan/                         @Mani-Sadhasivam
+/samples/drivers/CAN/                     @alexanderwachter
+/samples/gui/                             @vanwinkeljan
 /samples/net/                             @jukkar @tbursztyka @pfalcon
-/samples/net/cloud/tagoio_http_post/      @nandojve
 /samples/net/dns_resolve/                 @jukkar @tbursztyka @pfalcon
-/samples/net/lwm2m_client/                @rlubos
+/samples/net/lwm2m_client/                @mike-scott
 /samples/net/mqtt_publisher/              @jukkar @tbursztyka
-/samples/net/sockets/coap_*/              @rlubos
+/samples/net/sockets/coap_client/         @rveerama1
+/samples/net/sockets/coap_server/         @rveerama1
 /samples/net/sockets/                     @jukkar @tbursztyka @pfalcon
-/samples/net/*civetweb*                   @Nukersson
-/samples/sensor/                          @MaureenHelm
-/samples/shields/                         @avisconti
-/samples/subsys/logging/                  @nordic-krch @jakub-uC
-/samples/subsys/shell/                    @jakub-uC @nordic-krch
-/samples/subsys/mgmt/mcumgr/smp_svr/      @aunsbjerg @nvlsianpu
-/samples/subsys/mgmt/updatehub/           @nandojve @otavio
-/samples/subsys/mgmt/osdp/                @cbsiddharth
-/samples/subsys/usb/                      @jfischer-no @finikorg
-/samples/subsys/power/                    @nashif @pabigot @ceolin
-/samples/tfm_integration/                 @ioannisg @microbuilder
-/samples/userspace/                       @dcpleung @nashif
+/samples/sensor/                          @bogdan-davidoaia
+/samples/subsys/logging/                  @nordic-krch @jarz-nordic
+/samples/subsys/shell/                    @jarz-nordic @nordic-krch
+/samples/subsys/usb/                      @jfischer-phytec-iot @finikorg
+/samples/subsys/power/                    @ramakrishnapallala @pizi-nordic
 /scripts/coccicheck                       @himanshujha199640 @JuliaLawall
 /scripts/coccinelle/                      @himanshujha199640 @JuliaLawall
-/scripts/coredump/                        @dcpleung
-/scripts/kconfig/                         @ulfalizer
-/scripts/pylib/twister/expr_parser.py     @nashif
-/scripts/schemas/twister/                 @nashif
-/scripts/gen_app_partitions.py            @dcpleung @nashif
-/scripts/get_maintainer.py                @nashif
-/scripts/dts/                             @mbolivar-nordic @galak
-/scripts/release/                         @nashif
-/scripts/ci/                              @nashif
-/arch/x86/gen_gdt.py                      @dcpleung @nashif
-/arch/x86/gen_idt.py                      @dcpleung @nashif
-/scripts/gen_kobject_list.py              @dcpleung @nashif
-/scripts/gen_syscalls.py                  @dcpleung @nashif
-/scripts/list_boards.py                   @mbolivar-nordic
-/scripts/net/                             @jukkar
-/scripts/process_gperf.py                 @dcpleung @nashif
-/scripts/gen_relocate_app.py              @dcpleung
-/scripts/requirements*.txt                @mbolivar-nordic @galak @nashif
-/scripts/tests/twister/                   @aasthagr
-/scripts/tests/build/test_subfolder_list.py @rmstoi
-/scripts/tracing/                         @nashif
-/scripts/pylib/twister/                   @nashif
-/scripts/twister                          @nashif
+/scripts/elf_helper.py                    @andrewboie
+/scripts/sanity_chk/expr_parser.py        @andrewboie @nashif
+/scripts/gen_app_partitions.py            @andrewboie
+/arch/x86/gen_gdt.py                      @andrewboie
+/arch/x86/gen_idt.py                      @andrewboie
+/scripts/gen_kobject_list.py              @andrewboie
+/arch/x86/gen_mmu_x86.py                  @andrewboie
+/scripts/gen_priv_stacks.py               @agross-linaro
+/scripts/gen_syscall_header.py            @andrewboie
+/scripts/gen_syscalls.py                  @andrewboie
+/scripts/process_gperf.py                 @andrewboie
+/scripts/sanity_chk/                      @andrewboie @nashif
+/scripts/sanitycheck                      @andrewboie @nashif
 /scripts/series-push-hook.sh              @erwango
-/scripts/west_commands/                   @mbolivar-nordic
-/scripts/west-commands.yml                @mbolivar-nordic
+/scripts/west_commands/                   @mbolivar
+/scripts/west-commands.yml                @mbolivar
 /scripts/zephyr_module.py                 @tejlmand
-/scripts/user_wordsize.py                 @cfriedt
-/scripts/valgrind.supp                    @aescolar @daor-oti
-/share/zephyr-package/                    @tejlmand
-/share/zephyrunittest-package/            @tejlmand
-/subsys/bluetooth/                        @joerchan @jhedberg @Vudentz
-/subsys/bluetooth/controller/             @carlescufi @cvinayak @thoh-ot @kruithofa
-/subsys/bluetooth/mesh/                   @jhedberg @trond-snekvik @joerchan @Vudentz
-/subsys/canbus/                           @alexanderwachter
-/subsys/cpp/                              @pabigot @vanwinkeljan
-/subsys/debug/                            @nashif
-/subsys/debug/coredump/                   @dcpleung
-/subsys/debug/gdbstub/                    @ceolin
-/subsys/debug/gdbstub.c                   @ceolin
-/subsys/dfu/                              @nvlsianpu
-/subsys/tracing/                          @nashif
-/subsys/debug/asan_hacks.c                @vanwinkeljan @aescolar @daor-oti
-/subsys/demand_paging/                    @dcpleung @nashif
-/subsys/disk/disk_access_spi_sdhc.c       @JunYangNXP
-/subsys/disk/disk_access_sdhc.h           @JunYangNXP
-/subsys/disk/disk_access_usdhc.c          @JunYangNXP
-/subsys/disk/disk_access_stm32_sdmmc.c    @anthonybrandon
-/subsys/emul/                             @sjg20
-/subsys/fb/                               @jfischer-no
+/subsys/bluetooth/                        @sjanc @jhedberg @Vudentz
+/subsys/bluetooth/controller/             @carlescufi @cvinayak @thoh-ot
 /subsys/fs/                               @nashif
 /subsys/fs/fcb/                           @nvlsianpu
-/subsys/fs/fuse_fs_access.c               @vanwinkeljan
-/subsys/fs/littlefs_fs.c                  @pabigot
 /subsys/fs/nvs/                           @Laczen
-/subsys/ipc/                              @ioannisg
 /subsys/logging/                          @nordic-krch
-/subsys/logging/log_backend_net.c         @nordic-krch @jukkar
-/subsys/lorawan/                          @Mani-Sadhasivam
-/subsys/mgmt/ec_host_cmd/                 @jettr
-/subsys/mgmt/mcumgr/                      @carlescufi @nvlsianpu
-/subsys/mgmt/hawkbit/                     @Navin-Sankar
-/subsys/mgmt/mcumgr/smp_udp.c             @aunsbjerg
-/subsys/mgmt/updatehub/                   @nandojve @otavio
-/subsys/mgmt/osdp/                        @cbsiddharth
 /subsys/net/buf.c                         @jukkar @jhedberg @tbursztyka @pfalcon
 /subsys/net/ip/                           @jukkar @tbursztyka @pfalcon
 /subsys/net/lib/                          @jukkar @tbursztyka @pfalcon
-/subsys/net/lib/dns/                      @jukkar @tbursztyka @pfalcon @cfriedt
-/subsys/net/lib/lwm2m/                    @rlubos
-/subsys/net/lib/config/                   @jukkar @tbursztyka @pfalcon
-/subsys/net/lib/mqtt/                     @jukkar @tbursztyka @rlubos
-/subsys/net/lib/coap/                     @rlubos
-/subsys/net/lib/sockets/socketpair.c      @cfriedt
+/subsys/net/lib/dns/                      @jukkar @tbursztyka @pfalcon
+/subsys/net/lib/http/                     @jukkar @tbursztyka
+/subsys/net/lib/lwm2m/                    @mike-scott
+/subsys/net/lib/mqtt/                     @jukkar @tbursztyka
+/subsys/net/lib/coap/                     @rveerama1
 /subsys/net/lib/sockets/                  @jukkar @tbursztyka @pfalcon
-/subsys/net/lib/tls_credentials/          @rlubos
-/subsys/net/l2/                           @jukkar @tbursztyka
-/subsys/net/l2/canbus/                    @alexanderwachter @jukkar
-/subsys/net/*/openthread/                 @rlubos
-/subsys/power/                            @nashif @pabigot @ceolin
-/subsys/random/                           @dleach02
+/subsys/power/                            @ramakrishnapallala @pizi-nordic
 /subsys/settings/                         @nvlsianpu
-/subsys/shell/                            @jakub-uC @nordic-krch
-/subsys/stats/                            @nvlsianpu
+/subsys/shell/                            @jarz-nordic @nordic-krch
 /subsys/storage/                          @nvlsianpu
 /subsys/testsuite/                        @nashif
-/subsys/timing/                           @nashif @dcpleung
-/subsys/usb/                              @jfischer-no @finikorg
-/subsys/usb/class/dfu/usb_dfu.c           @nvlsianpu
-/tests/                                   @nashif
+/subsys/usb/                              @jfischer-phytec-iot @finikorg
 /tests/application_development/libcxx/    @pabigot
-/tests/arch/arm/                          @ioannisg @stephanosio
-/tests/benchmarks/cmsis_dsp/              @stephanosio
-/tests/boards/native_posix/               @aescolar @daor-oti
-/tests/boards/intel_s1000_crb/            @dcpleung @sathishkuttan
-/tests/bluetooth/                         @joerchan @jhedberg @Vudentz
-/tests/bluetooth/bsim_bt/                 @joerchan @jhedberg @Vudentz @aescolar @wopu-ot
+/tests/boards/native_posix/               @aescolar
+/tests/boards/intel_s1000_crb/            @rgundi @dcpleung @sathishkuttan
+/tests/bluetooth/                         @sjanc @jhedberg @Vudentz
 /tests/posix/                             @pfalcon
 /tests/crypto/                            @ceolin
 /tests/crypto/mbedtls/                    @nashif @ceolin
 /tests/drivers/can/                       @alexanderwachter
-/tests/drivers/counter/                   @nordic-krch
-/tests/drivers/counter/maxim_ds3231_api/  @pabigot
-/tests/drivers/eeprom/                    @henrikbrixandersen @sjg20
-/tests/drivers/flash_simulator/           @nvlsianpu
-/tests/drivers/gpio/                      @mnkp @pabigot
 /tests/drivers/hwinfo/                    @alexanderwachter
 /tests/drivers/spi/                       @tbursztyka
 /tests/drivers/uart/uart_async_api/       @Mierunski
-/tests/kernel/                            @dcpleung @andyross @nashif
+/tests/kernel/                            @andrewboie @andyross @nashif
 /tests/lib/                               @nashif
-/tests/lib/cmsis_dsp/                     @stephanosio
 /tests/net/                               @jukkar @tbursztyka @pfalcon
 /tests/net/buf/                           @jukkar @jhedberg @tbursztyka @pfalcon
 /tests/net/lib/                           @jukkar @tbursztyka @pfalcon
 /tests/net/lib/http_header_fields/        @jukkar @tbursztyka
 /tests/net/lib/mqtt_packet/               @jukkar @tbursztyka
-/tests/net/lib/coap/                      @rlubos
-/tests/net/socket/socketpair/             @cfriedt
+/tests/net/lib/coap/                      @rveerama1
 /tests/net/socket/                        @jukkar @tbursztyka @pfalcon
-/tests/subsys/debug/coredump/             @dcpleung
-/tests/subsys/fs/                         @nashif @nvlsianpu @de-nordic @pabigot
+/tests/subsys/fs/                         @nashif @ramakrishnapallala
 /tests/subsys/settings/                   @nvlsianpu
-/tests/subsys/shell/                      @jakub-uC @nordic-krch
+
 # Get all docs reviewed
-*.rst                                     @nashif
-/doc/reference/kernel/                    @andyross @nashif
-*posix*.rst                               @aescolar @daor-oti
+*.rst                                     @dbkinder

Kconfig

@@ -1,8 +1,10 @@
-# General configuration options
+# Kconfig - general configuration options
 
+#
 # Copyright (c) 2014-2015 Wind River Systems, Inc.
+#
 # SPDX-License-Identifier: Apache-2.0
-
+#
 mainmenu "Zephyr Kernel Configuration"
 
 source "Kconfig.zephyr"

Kconfig.zephyr

@@ -1,39 +1,44 @@
-# General configuration options
+# Kconfig - general configuration options
 
+#
 # Copyright (c) 2014-2015 Wind River Systems, Inc.
 # Copyright (c) 2016 Intel Corporation
+#
 # SPDX-License-Identifier: Apache-2.0
-
-
-# Include Kconfig.defconfig files first so that they can override defaults and
-# other symbol/choice properties by adding extra symbol/choice definitions.
-# After merging all definitions for a symbol/choice, Kconfig picks the first
-# property (e.g. the first default) with a satisfied condition.
 #
-# Shield defaults should have precedence over board defaults, which should have
-# precedence over SoC defaults, so include them in that order.
+
+source "$(CMAKE_BINARY_DIR)/Kconfig.modules"
+
+# Include these first so that any properties (e.g. defaults) below can be
+# overriden in *.defconfig files (by defining symbols in multiple locations).
+# After merging all the symbol definitions, Kconfig picks the first property
+# (e.g. the first default) with a satisfied condition.
 #
-# $ARCH and $BOARD_DIR will be glob patterns when building documentation.
-source "$(KCONFIG_BINARY_DIR)/Kconfig.shield.defconfig"
+# Board defaults should be parsed before SoC defaults, because boards usually
+# overrides SoC values.
+#
+# Note: $ARCH and $BOARD_DIR might be glob patterns.
 source "$(BOARD_DIR)/Kconfig.defconfig"
-source "$(KCONFIG_BINARY_DIR)/Kconfig.soc.defconfig"
 
-menu "Modules"
-
-source "modules/Kconfig"
-
-endmenu
+source "$(SOC_DIR)/$(ARCH)/*/Kconfig.defconfig"
 
 source "boards/Kconfig"
-source "soc/Kconfig"
+
+source "$(SOC_DIR)/Kconfig"
+
 source "arch/Kconfig"
+
 source "kernel/Kconfig"
+
 source "dts/Kconfig"
+
 source "drivers/Kconfig"
+
 source "lib/Kconfig"
+
 source "subsys/Kconfig"
 
-osource "$(TOOLCHAIN_KCONFIG_DIR)/Kconfig"
+source "ext/Kconfig"
 
 menu "Build and Link Features"
 
@@ -52,7 +57,7 @@ config LINKER_ORPHAN_SECTION_PLACE
 config LINKER_ORPHAN_SECTION_WARN
 	bool "Warn"
 	help
-	  Linker places the orphan sections in output and issues
+	  Linker places the orphan sections in ouput and issues
 	  warning about those sections.
 
 config LINKER_ORPHAN_SECTION_ERROR
@@ -63,13 +68,13 @@ config LINKER_ORPHAN_SECTION_ERROR
 endchoice
 
 config CODE_DATA_RELOCATION
-	bool "Relocate code/data sections"
-	depends on ARM
-	help
+       bool "Relocate code/data sections"
+       depends on ARM
+       help
 	  When selected this will relocate .text, data and .bss sections from
 	  the specified files and places it in the required memory region. The
 	  files should be specified in the CMakeList.txt file with
-	  a cmake API zephyr_code_relocate().
+	  a cmake API zephyr_code_relocation().
 
 config HAS_FLASH_LOAD_OFFSET
 	bool
@@ -77,24 +82,17 @@ config HAS_FLASH_LOAD_OFFSET
 	  This option is selected by targets having a FLASH_LOAD_OFFSET
 	  and FLASH_LOAD_SIZE.
 
-if HAS_FLASH_LOAD_OFFSET
-
-config USE_DT_CODE_PARTITION
-	bool "Link application into /chosen/zephyr,code-partition from devicetree"
+config USE_CODE_PARTITION
+	bool "link into code-partition"
+	depends on HAS_FLASH_LOAD_OFFSET
 	help
-	  When enabled, the application will be linked into the flash partition
-	  selected by the zephyr,code-partition property in /chosen in devicetree.
-	  When this is disabled, the flash load offset and size can be set manually
-	  below.
-
-# Workaround for not being able to have commas in macro arguments
-DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
+	  When selected application will be linked into chosen code-partition.
 
 config FLASH_LOAD_OFFSET
-	# Only user-configurable when USE_DT_CODE_PARTITION is disabled
-	hex "Kernel load offset" if !USE_DT_CODE_PARTITION
-	default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) if USE_DT_CODE_PARTITION
+	hex "Kernel load offset"
+	default $(dt_hex_val,DT_CODE_PARTITION_OFFSET) if USE_CODE_PARTITION
 	default 0
+	depends on HAS_FLASH_LOAD_OFFSET
 	help
 	  This option specifies the byte offset from the beginning of flash that
 	  the kernel should be loaded into. Changing this value from zero will
@@ -104,10 +102,10 @@ config FLASH_LOAD_OFFSET
 	  If unsure, leave at the default value 0.
 
 config FLASH_LOAD_SIZE
-	# Only user-configurable when USE_DT_CODE_PARTITION is disabled
-	hex "Kernel load size" if !USE_DT_CODE_PARTITION
-	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) if USE_DT_CODE_PARTITION
+	hex "Kernel load size"
+	default $(dt_hex_val,DT_CODE_PARTITION_SIZE) if USE_CODE_PARTITION
 	default 0
+	depends on HAS_FLASH_LOAD_OFFSET
 	help
 	  If non-zero, this option specifies the size, in bytes, of the flash
 	  area that the Zephyr image will be allowed to occupy.  If zero, the
@@ -116,17 +114,15 @@ config FLASH_LOAD_SIZE
 
 	  If unsure, leave at the default value 0.
 
-endif # HAS_FLASH_LOAD_OFFSET
-
-config ROM_START_OFFSET
+config TEXT_SECTION_OFFSET
 	hex
-	prompt "ROM start offset" if !BOOTLOADER_MCUBOOT
+	prompt "TEXT section offset" if !BOOTLOADER_MCUBOOT
 	default 0x200 if BOOTLOADER_MCUBOOT
 	default 0
 	help
 	  If the application is built for chain-loading by a bootloader this
 	  variable is required to be set to value that leaves sufficient
-	  space between the beginning of the image and the start of the first
+	  space between the beginning of the image and the start of the .text
 	  section to store an image header or any other metadata.
 	  In the particular case of the MCUboot bootloader this reserves enough
 	  space to store the image header, which should also meet vector table
@@ -153,30 +149,47 @@ config CUSTOM_LINKER_SCRIPT
 	  linker script and avoid having to change the script provided by
 	  Zephyr.
 
+config CUSTOM_RODATA_LD
+	bool "Include custom-rodata.ld"
+	help
+	  Include a customized linker script fragment for inserting additional
+	  data and linker directives into the rodata section.
+
+config CUSTOM_RWDATA_LD
+	bool "Include custom-rwdata.ld"
+	help
+	  Include a customized linker script fragment for inserting additional
+	  data and linker directives into the data section.
+
+config CUSTOM_SECTIONS_LD
+	bool "Include custom-sections.ld"
+	help
+	  Include a customized linker script fragment for inserting additional
+	  arbitrary sections.
+
+config LINK_WHOLE_ARCHIVE
+	bool "Allow linking with --whole-archive"
+	help
+	  This options allows linking external libraries with the
+	  --whole-archive option to keep all symbols.
+
 config KERNEL_ENTRY
 	string "Kernel entry symbol"
 	default "__start"
 	help
 	  Code entry symbol, to be set at linking phase.
 
-config LINKER_SORT_BY_ALIGNMENT
-	bool "Sort input sections by alignment"
+config CHECK_LINK_MAP
+	bool "Check linker map"
 	default y
 	help
-	  This turns on the linker flag to sort sections by alignment
-	  in decreasing size of symbols. This helps to minimize
-	  padding between symbols.
+	  Run a linker address generation validity checker at the end of the
+	  build.
 
 endmenu
 
 menu "Compiler Options"
 
-config CODING_GUIDELINE_CHECK
-	bool "Enforce coding guideline rules"
-	help
-	  Use available compiler flags to check coding guideline rules during
-	  the build.
-
 config NATIVE_APPLICATION
 	bool "Build as a native host application"
 	help
@@ -231,28 +244,6 @@ config COMPILER_OPT
 
 endmenu
 
-choice
-	prompt "Error checking behavior for CHECK macro"
-	default RUNTIME_ERROR_CHECKS
-
-config ASSERT_ON_ERRORS
-	bool "Assert on all errors"
-	help
-	  Assert on errors covered with the CHECK macro.
-
-config NO_RUNTIME_CHECKS
-	bool "No runtime error checks"
-	help
-	  Do not do any runtime checks or asserts when using the CHECK macro.
-
-config RUNTIME_ERROR_CHECKS
-	bool "Enable runtime error checks"
-	help
-	  Always perform runtime checks covered with the CHECK macro. This
-	  option is the default and the only option used during testing.
-
-endchoice
-
 menu "Build Options"
 
 config KERNEL_BIN_NAME
@@ -273,14 +264,6 @@ config OUTPUT_DISASSEMBLY
 	help
 	  Create an .lst file with the assembly listing of the firmware.
 
-config OUTPUT_DISASSEMBLE_ALL
-	bool "Disassemble all sections with source. Fill zeros."
-	default n
-	depends on OUTPUT_DISASSEMBLY
-	help
-	  The .lst file will contain complete disassembly of the firmware
-	  not just those expected to contain instructions including zeros
-
 config OUTPUT_PRINT_MEMORY_USAGE
 	bool "Print memory usage to stdout"
 	default y
@@ -295,60 +278,40 @@ config OUTPUT_PRINT_MEMORY_USAGE
 	  ram_report and
 	  https://sourceware.org/binutils/docs/ld/MEMORY.html
 
-config CLEANUP_INTERMEDIATE_FILES
-	bool "Remove all intermediate files"
-	help
-	  Delete intermediate files to save space and cleanup clutter resulting
-	  from the build process.
-
-config BUILD_NO_GAP_FILL
-	bool "Don't fill gaps in generated hex/bin/s19 files."
-
 config BUILD_OUTPUT_HEX
 	bool "Build a binary in HEX format"
 	help
-	  Build an Intel HEX binary zephyr/zephyr.hex in the build directory.
-	  The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
+	  Build a binary in HEX format. This will build a zephyr.hex file need
+	  by some platforms.
 
 config BUILD_OUTPUT_BIN
 	bool "Build a binary in BIN format"
 	default y
 	help
-	  Build a "raw" binary zephyr/zephyr.bin in the build directory.
-	  The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
-
-config BUILD_OUTPUT_EFI
-	bool "Build as an EFI application"
-	default n
-	depends on X86_64
-	help
-	  Build as an EFI application.
-
-	  This works by creating a "zephyr.efi" EFI binary containing a zephyr
-	  image extracted from a built zephyr.elf file.  EFI applications are
-	  relocatable, and cannot be placed at specific locations in memory.
-	  Instead, the stub code will copy the embedded zephyr sections to the
-	  appropriate locations at startup, clear any zero-filled (BSS, etc...)
-	  areas, then jump into the 64 bit entry point.
+	  Build a binary in BIN format. This will build a zephyr.bin file need
+	  by some platforms.
 
 config BUILD_OUTPUT_EXE
 	bool "Build a binary in ELF format with .exe extension"
 	help
-	  Build an ELF binary that can run in the host system at
-	  zephyr/zephyr.exe in the build directory.
-	  The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
+	  Build a binary in ELF format that can run in the host system. This
+	  will build a zephyr.exe file.
 
 config BUILD_OUTPUT_S19
 	bool "Build a binary in S19 format"
 	help
-	  Build an S19 binary zephyr/zephyr.s19 in the build directory.
-	  The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
+	  Build a binary in S19 format. This will build a zephyr.s19 file need
+	  by some platforms.
+
+config BUILD_NO_GAP_FILL
+	bool "Don't fill gaps in generated hex/bin/s19 files."
+	depends on BUILD_OUTPUT_HEX || BUILD_OUTPUT_BIN || BUILD_OUTPUT_S19
 
 config BUILD_OUTPUT_STRIPPED
 	bool "Build a stripped binary"
 	help
-	  Build a stripped binary zephyr/zephyr.strip in the build directory.
-	  The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
+	  Build a stripped binary. This will build a zephyr.stripped file need
+	  by some platforms.
 
 config APPLICATION_DEFINED_SYSCALL
 	bool "Scan application folder for any syscall definition"
@@ -356,19 +319,6 @@ config APPLICATION_DEFINED_SYSCALL
 	  Scan additional folders inside application source folder
 	  for application defined syscalls.
 
-config MAKEFILE_EXPORTS
-	bool "Generate build metadata files named Makefile.exports"
-	help
-	  Generates a file with build information that can be read by
-	  third party Makefile-based build systems.
-
-config DEPRECATED_ZEPHYR_INT_TYPES
-	bool "Allow the use of the deprecated zephyr integer types"
-	help
-	  Allows the use of the deprecated Zephyr integer typedefs defined in
-	  Zephyr 2.3 and previous versions.  These types are:
-	  u8_t, u16_t, u32_t, u64_t, s8_t, s16_t, s32_t, and s64_t.
-
 endmenu
 endmenu
 
@@ -395,16 +345,9 @@ config BOOTLOADER_SRAM_SIZE
 	  - Zephyr is a !XIP image, which implicitly assumes existence of a
 	  bootloader that loads the Zephyr !XIP image onto SRAM.
 
-config MCUBOOT
-	bool
-	help
-	  Hidden option used to indicate that the current image is MCUBoot
-
 config BOOTLOADER_MCUBOOT
 	bool "MCUboot bootloader support"
-	select USE_DT_CODE_PARTITION
-	imply INIT_ARCH_HW_AT_BOOT if ARCH_SUPPORTS_ARCH_HW_INIT
-	depends on !MCUBOOT
+	select USE_CODE_PARTITION
 	help
 	  This option signifies that the target uses MCUboot as a bootloader,
 	  or in other words that the image is to be chain-loaded by MCUboot.
@@ -412,65 +355,12 @@ config BOOTLOADER_MCUBOOT
 	  order for the image generated to be bootable using the MCUboot open
 	  source bootloader. Currently this includes:
 
-	    * Setting ROM_START_OFFSET to a default value that allows space
+	    * Setting TEXT_SECTION_OFFSET to a default value that allows space
 	      for the MCUboot image header
-	    * Activating SW_VECTOR_RELAY_CLIENT on Cortex-M0
-	      (or Armv8-M baseline) targets with no built-in vector relocation
-	      mechanisms
-
-	  By default, this option instructs Zephyr to initialize the core
-	  architecture HW registers during boot, when this is supported by
-	  the application. This removes the need by MCUboot to reset
-	  the core registers' state itself.
-
-if BOOTLOADER_MCUBOOT
-
-config MCUBOOT_SIGNATURE_KEY_FILE
-	string "Path to the mcuboot signing key file"
-	default ""
-	help
-	  The file contains a key pair whose public half is verified
-	  by your target's MCUboot image. The file is in PEM format.
-
-	  If set to a non-empty value, the build system tries to
-	  sign the final binaries using a 'west sign -t imgtool' command.
-	  The signed binaries are placed in the build directory
-	  at zephyr/zephyr.signed.bin and zephyr/zephyr.signed.hex.
-
-	  The file names can be customized with CONFIG_KERNEL_BIN_NAME.
-	  The existence of bin and hex files depends on CONFIG_BUILD_OUTPUT_BIN
-	  and CONFIG_BUILD_OUTPUT_HEX.
-
-	  This option should contain an absolute path to the same file
-	  as the BOOT_SIGNATURE_KEY_FILE option in your MCUboot
-	  .config. (The MCUboot config option is used for the MCUboot
-	  bootloader image; this option is for your application which
-	  is to be loaded by MCUboot. The MCUboot config option can be
-	  a relative path from the MCUboot repository root; this option's
-	  behavior is undefined for relative paths.)
-
-	  If left empty, you must sign the Zephyr binaries manually.
-
-config MCUBOOT_EXTRA_IMGTOOL_ARGS
-	string "Extra arguments to pass to imgtool"
-	default ""
-	help
-	  If CONFIG_MCUBOOT_SIGNATURE_KEY_FILE is a non-empty string,
-	  you can use this option to pass extra options to imgtool.
-	  For example, you could set this to "--version 1.2".
-
-config MCUBOOT_GENERATE_CONFIRMED_IMAGE
-	bool "Also generate a padded, confirmed image"
-	help
-	  The signed, padded, and confirmed binaries are placed in the build
-	  directory at zephyr/zephyr.signed.confirmed.bin and
-	  zephyr/zephyr.signed.confirmed.hex.
-
-	  The file names can be customized with CONFIG_KERNEL_BIN_NAME.
-	  The existence of bin and hex files depends on CONFIG_BUILD_OUTPUT_BIN
-	  and CONFIG_BUILD_OUTPUT_HEX.
-
-endif # BOOTLOADER_MCUBOOT
+	    * Activating SW_VECTOR_RELAY on Cortex-M0 (or Armv8-M baseline)
+	      targets with no built-in vector relocation mechanisms
+	    * Including dts/common/mcuboot.overlay when building the Device
+	      Tree in order to place and link the image at the slot0 offset
 
 config BOOTLOADER_ESP_IDF
 	bool "ESP-IDF bootloader support"
@@ -480,40 +370,37 @@ config BOOTLOADER_ESP_IDF
 	  inside the build folder.
 	  At flash time, the bootloader will be flashed with the zephyr image
 
-config BOOTLOADER_BOSSA
-	bool "BOSSA bootloader support"
-	select USE_DT_CODE_PARTITION
-	depends on SOC_FAMILY_SAM0
-
+config REALMODE
+	bool "boot from x86 real mode"
+	depends on X86
 	help
-	  Signifies that the target uses a BOSSA compatible bootloader.  If CDC
-	  ACM USB support is also enabled then the board will reboot into the
-	  bootloader automatically when bossac is run.
+	  This option enabled Zephyr to start in x86 real mode, instead of
+	  protected mode.
 
-config BOOTLOADER_BOSSA_DEVICE_NAME
-	string "BOSSA CDC ACM device name"
-	depends on BOOTLOADER_BOSSA && CDC_ACM_DTE_RATE_CALLBACK_SUPPORT
-	default "CDC_ACM_0"
+config BOOTLOADER_KEXEC
+	bool "Boot using Linux kexec() system call"
+	depends on X86
 	help
-	  Sets the CDC ACM port to watch for reboot commands.
+	  This option signifies that Linux boots the kernel using kexec system call
+	  and utility. This method is used to boot the kernel over the network.
 
-choice
-	prompt "BOSSA bootloader variant"
-	depends on BOOTLOADER_BOSSA
-
-config BOOTLOADER_BOSSA_ARDUINO
-	bool "Arduino"
+config BOOTLOADER_UNKNOWN
+	bool "Generic boot loader support"
+	depends on X86
 	help
-	  Select the Arduino variant of the BOSSA bootloader.  Uses 0x07738135
-	  as the magic value to enter the bootloader.
+	  This option signifies that the target has a generic bootloader
+	  or that it supports multiple ways of booting and it isn't clear
+	  at build time which method is to be used. When this option is enabled
+	  the board may have to do extra work to ensure a proper startup.
 
-config BOOTLOADER_BOSSA_ADAFRUIT_UF2
-	bool "Adafruit UF2"
+config BOOTLOADER_CONTEXT_RESTORE
+	bool "Boot loader has context restore support"
+	default y
+	depends on SYS_POWER_DEEP_SLEEP_STATES && BOOTLOADER_CONTEXT_RESTORE_SUPPORTED
 	help
-	  Select the Adafruit UF2 variant of the BOSSA bootloader.  Uses
-	  0xf01669ef as the magic value to enter the bootloader.
-
-endchoice
+	  This option signifies that the target has a bootloader
+	  that restores CPU context upon resuming from deep sleep
+	  power state.
 
 config REBOOT
 	bool "Reboot functionality"
@@ -532,14 +419,3 @@ config MISRA_SANE
 	  arrays are not permitted (and gcc will enforce this).
 
 endmenu
-
-menu "Compatibility"
-
-config COMPAT_INCLUDES
-	bool "Suppress warnings when using header shims"
-	default y
-	help
-	  Suppress any warnings from the pre-processor when including
-	  deprecated header files.
-
-endmenu

Makefile

@@ -2,29 +2,24 @@
 # Top level makefile for documentation build
 #
 
+ifndef ZEPHYR_BASE
+$(error The ZEPHYR_BASE environment variable must be set)
+endif
+
 BUILDDIR ?= doc/_build
 DOC_TAG ?= development
 SPHINXOPTS ?= -q
-KCONFIG_TURBO_MODE ?= 0
 
 # Documentation targets
 # ---------------------------------------------------------------------------
-
-.PHONY: clean htmldocs htmldocs-fast pdfdocs doxygen
-
-htmldocs-fast:
-	${MAKE} htmldocs KCONFIG_TURBO_MODE=1
-
-htmldocs pdfdocs doxygen: configure
-	cmake --build ${BUILDDIR} -- $@  # -v # VERBOSE=1
-
-# Run CMake every time cause it's quick and re-configures TURBO_MODE if
-# needed
-.PHONY: configure
-configure:
-	cmake -GNinja  -B${BUILDDIR} -Sdoc/ -DDOC_TAG=${DOC_TAG} \
-		-DSPHINXOPTS=${SPHINXOPTS} \
-		-DKCONFIG_TURBO_MODE=${KCONFIG_TURBO_MODE}
-
 clean:
 	rm -rf ${BUILDDIR}
+
+htmldocs:
+	mkdir -p ${BUILDDIR} && cmake -GNinja -DDOC_TAG=${DOC_TAG} -DSPHINXOPTS=${SPHINXOPTS} -B${BUILDDIR} -Hdoc/ && ninja -C ${BUILDDIR} htmldocs
+
+htmldocs-fast:
+	mkdir -p ${BUILDDIR} && cmake -GNinja -DKCONFIG_TURBO_MODE=1 -DDOC_TAG=${DOC_TAG} -DSPHINXOPTS=${SPHINXOPTS} -B${BUILDDIR} -Hdoc/ && ninja -C ${BUILDDIR} htmldocs
+
+pdfdocs:
+	mkdir -p ${BUILDDIR} && cmake -GNinja -DDOC_TAG=${DOC_TAG} -DSPHINXOPTS=${SPHINXOPTS} -B${BUILDDIR} -Hdoc/ && ninja -C ${BUILDDIR} pdfdocs

README.rst

@@ -1,3 +1,4 @@
+
 .. raw:: html
 
    <a href="https://www.zephyrproject.org">
@@ -8,9 +9,8 @@
 
    <a href="https://bestpractices.coreinfrastructure.org/projects/74"><img
    src="https://bestpractices.coreinfrastructure.org/projects/74/badge"></a>
-   <a href="https://buildkite.com/zephyr/zephyr">
    <img
-   src="https://badge.buildkite.com/f5bd0dc88306cee17c9b38e78d11bb74a6291e3f40e7d13f31.svg?branch=master"></a>
+   src="https://api.shippable.com/projects/58ffb2b8baa5e307002e1d79/badge?branch=master">
 
 
 The Zephyr Project is a scalable real-time operating system (RTOS) supporting
@@ -32,56 +32,102 @@ Intel x86, ARC, Nios II, Tensilica Xtensa, and RISC-V, and a large number of
 Getting Started
 ***************
 
-Welcome to Zephyr! See the `Introduction to Zephyr`_ for a high-level overview,
-and the documentation's `Getting Started Guide`_ to start developing.
+To start developing Zephyr applications refer to the `Getting Started Guide`_
+in the `Zephyr Documentation`_ pages.
+A brief introduction to Zephyr can be found in the  `Zephyr Introduction`_
+page.
 
 Community Support
 *****************
 
-Community support is provided via mailing lists and Slack; see the Resources
-below for details.
+The Zephyr Project Developer Community includes developers from member
+organizations and the general community all joining in the development of
+software within the Zephyr Project. Members contribute and discuss ideas,
+submit bugs and bug fixes, and provide training. They also help those in need
+through the community's forums such as mailing lists and IRC channels. Anyone
+can join the developer community and the community is always willing to help
+its members and the User Community to get the most out of the Zephyr Project.
 
-.. _project-resources:
+Welcome to the Zephyr community!
 
 Resources
 *********
 
-Here's a quick summary of resources to help you find your way around:
+Here's a quick summary of resources to find your way around the Zephyr Project
+support systems:
 
-* **Help**: `Asking for Help Tips`_
-* **Documentation**: http://docs.zephyrproject.org (`Getting Started Guide`_)
-* **Source Code**: https://github.com/zephyrproject-rtos/zephyr is the main
-  repository; https://elixir.bootlin.com/zephyr/latest/source contains a
-  searchable index
-* **Releases**: https://github.com/zephyrproject-rtos/zephyr/releases
-* **Samples and example code**: see `Sample and Demo Code Examples`_
-* **Mailing Lists**: users@lists.zephyrproject.org and
-  devel@lists.zephyrproject.org are the main user and developer mailing lists,
-  respectively. You can join the developer's list and search its archives at
-  `Zephyr Development mailing list`_. The other `Zephyr mailing list
-  subgroups`_ have their own archives and sign-up pages.
-* **Nightly CI Build Status**: https://lists.zephyrproject.org/g/builds
-  The builds@lists.zephyrproject.org mailing list archives the CI
-  (shippable) nightly build results.
-* **Chat**: Zephyr's Slack workspace is https://zephyrproject.slack.com.  Use
-  this `Slack Invite`_ to register.
-* **Contributing**: see the `Contribution Guide`_
-* **Wiki**: `Zephyr GitHub wiki`_
-* **Issues**: https://github.com/zephyrproject-rtos/zephyr/issues
-* **Security Issues**: Email vulnerabilities@zephyrproject.org to report
-  security issues; also see our `Security`_ documentation. Security issues are
-  tracked separately at https://zephyrprojectsec.atlassian.net.
-* **Zephyr Project Website**: https://zephyrproject.org
+* **Zephyr Project Website**: The https://zephyrproject.org website is the
+  central source of information about the Zephyr Project. On this site, you'll
+  find background and current information about the project as well as all the
+  relevant links to project material.
 
-.. _Slack Invite: https://tinyurl.com/y5glwylp
-.. _supported boards: http://docs.zephyrproject.org/latest/boards/index.html
+* **Releases**: Source code for Zephyr kernel releases are available at
+  https://zephyrproject.org/developers/#downloads. On this page,
+  you'll find release information, and links to download or clone source
+  code from our GitHub repository.  You'll also find links for the Zephyr
+  SDK, a moderated collection of tools and libraries used to develop your
+  applications.
+
+* **Source Code in GitHub**: Zephyr Project source code is maintained on a
+  public GitHub repository at https://github.com/zephyrproject-rtos/zephyr.
+  You'll find information about getting access to the repository and how to
+  contribute to the project in this `Contribution Guide`_ document.
+
+* **Samples Code**: In addition to the kernel source code, there are also
+  many documented `Sample and Demo Code Examples`_ that can help show you
+  how to use Zephyr services and subsystems.
+
+* **Documentation**: Extensive Project technical documentation is developed
+  along with the Zephyr kernel itself, and can be found at
+  http://docs.zephyrproject.org.  Additional documentation is maintained in
+  the `Zephyr GitHub wiki`_.
+
+* **Cross-reference**: Source code cross-reference for the Zephyr
+  kernel and samples code is available at
+  https://elixir.bootlin.com/zephyr/latest/source.
+
+* **Issue Reporting and Tracking**: Requirements and Issue tracking is done in
+  the Github issues system: https://github.com/zephyrproject-rtos/zephyr/issues.
+  You can browse through the reported issues and submit issues of your own.
+
+* **Security-related Issue Reporting and Tracking**: For security-related
+  inquiries or reporting suspected security-related bugs in the Zephyr OS,
+  please send email to vulnerabilities@zephyrproject.org.  We will assess and
+  fix flaws according to our security policy outlined in the Zephyr Project
+  `Security Overview`_.
+
+  Security related issue tracking is done in JIRA.  The location of this JIRA
+  is https://zephyrprojectsec.atlassian.net.
+
+* **Mailing List**: The `Zephyr Development mailing list`_ is perhaps the most convenient
+  way to track developer discussions and to ask your own support questions to
+  the Zephyr project community.  There are also specific `Zephyr mailing list
+  subgroups`_ for announcements, builds, marketing, and Technical
+  Steering Committee notes, for example.
+  You can read through the message archives to follow
+  past posts and discussions, a good thing to do to discover more about the
+  Zephyr project.
+
+* **Chatting**: You can chat online with the Zephyr project developer
+  community and other users in two ways:
+
+  * On `Slack`_: Zephyr has dedicated channels on Slack. To register, use the
+    following `Slack Invite`_.
+
+  * IRC channel #zephyrproject on the freenode.net IRC server. You can use the
+    http://webchat.freenode.net web client or use a client-side application such
+    as pidgin (Note that all discussions have moved to Slack, although we still
+    have many developers still available on the IRC channel).
+
+.. _Slack Invite: https://tinyurl.com/yarkuemx
+.. _Slack: https://zephyrproject.slack.com
+.. _supported boards: http://docs.zephyrproject.org/latest/boards
 .. _Zephyr Documentation: http://docs.zephyrproject.org
-.. _Introduction to Zephyr: http://docs.zephyrproject.org/latest/introduction/index.html
+.. _Zephyr Introduction: http://docs.zephyrproject.org/latest/introduction/index.html
 .. _Getting Started Guide: http://docs.zephyrproject.org/latest/getting_started/index.html
 .. _Contribution Guide: http://docs.zephyrproject.org/latest/contribute/index.html
 .. _Zephyr GitHub wiki: https://github.com/zephyrproject-rtos/zephyr/wiki
 .. _Zephyr Development mailing list: https://lists.zephyrproject.org/g/devel
 .. _Zephyr mailing list subgroups: https://lists.zephyrproject.org/g/main/subgroups
 .. _Sample and Demo Code Examples: http://docs.zephyrproject.org/latest/samples/index.html
-.. _Security: http://docs.zephyrproject.org/latest/security/index.html
-.. _Asking for Help Tips: https://docs.zephyrproject.org/latest/guides/getting-help.html
+.. _Security Overview: http://docs.zephyrproject.org/latest/security/index.html

VERSION

@@ -1,5 +1,5 @@
-VERSION_MAJOR = 2
-VERSION_MINOR = 5
-PATCHLEVEL = 0
+VERSION_MAJOR = 1
+VERSION_MINOR = 14
+PATCHLEVEL = 2
 VERSION_TWEAK = 0
 EXTRAVERSION =

arch/CMakeLists.txt

@@ -2,10 +2,5 @@
 
 add_definitions(-D__ZEPHYR_SUPERVISOR__)
 
-include_directories(
-  ${ZEPHYR_BASE}/kernel/include
-  ${ARCH_DIR}/${ARCH}/include
-  )
-
 add_subdirectory(common)
 add_subdirectory(${ARCH_DIR}/${ARCH} arch/${ARCH})

arch/Kconfig

@@ -1,116 +1,66 @@
-# General architecture configuration options
+# Kconfig - general architecture configuration options
 
+#
 # Copyright (c) 2014-2015 Wind River Systems, Inc.
 # Copyright (c) 2015 Intel Corporation
 # Copyright (c) 2016 Cadence Design Systems, Inc.
+#
 # SPDX-License-Identifier: Apache-2.0
+#
 
 # Include these first so that any properties (e.g. defaults) below can be
-# overridden (by defining symbols in multiple locations)
+# overriden (by defining symbols in multiple locations)
 
 # Note: $ARCH might be a glob pattern
 source "$(ARCH_DIR)/$(ARCH)/Kconfig"
 
-# Architecture symbols
-#
-# Should be 'select'ed by low-level symbols like SOC_SERIES_* or, lacking that,
-# by SOC_*.
+choice
+	prompt "Architecture"
+	default X86
 
 config ARC
-	bool
-	select ARCH_IS_SET
+	bool "ARC architecture"
 	select HAS_DTS
-	imply XIP
-	select ARCH_HAS_THREAD_LOCAL_STORAGE
-	help
-	  ARC architecture
 
 config ARM
-	bool
-	select ARCH_IS_SET
-	select ARCH_SUPPORTS_COREDUMP if CPU_CORTEX_M
+	bool "ARM architecture"
+	select ARCH_HAS_THREAD_ABORT
 	select HAS_DTS
-	# FIXME: current state of the code for all ARM requires this, but
-	# is really only necessary for Cortex-M with ARM MPU!
-	select GEN_PRIV_STACKS
-	select ARCH_HAS_THREAD_LOCAL_STORAGE if ARM64 || CPU_CORTEX_R || CPU_CORTEX_M
-	help
-	  ARM architecture
-
-config SPARC
-	bool
-	select ARCH_IS_SET
-	select USE_SWITCH
-	select USE_SWITCH_SUPPORTED
-	select BIG_ENDIAN
-	select ATOMIC_OPERATIONS_BUILTIN if SPARC_CASA
-	select ATOMIC_OPERATIONS_C if !SPARC_CASA
-	select ARCH_HAS_THREAD_LOCAL_STORAGE
-	help
-	  SPARC architecture
 
 config X86
-	bool
-	select ARCH_IS_SET
+	bool "x86 architecture"
 	select ATOMIC_OPERATIONS_BUILTIN
 	select HAS_DTS
-	select ARCH_SUPPORTS_COREDUMP
-	select CPU_HAS_MMU
-	select ARCH_MEM_DOMAIN_DATA if USERSPACE && !X86_COMMON_PAGE_TABLE
-	select ARCH_MEM_DOMAIN_SYNCHRONOUS_API if USERSPACE
-	select ARCH_HAS_GDBSTUB if !X86_64
-	select ARCH_HAS_TIMING_FUNCTIONS
-	select ARCH_HAS_THREAD_LOCAL_STORAGE
-	select ARCH_HAS_DEMAND_PAGING
-	help
-	  x86 architecture
+
+config X86_64
+	bool "x86_64 architecture"
+	select ATOMIC_OPERATIONS_BUILTIN
+	select SCHED_IPI_SUPPORTED
 
 config NIOS2
-	bool
-	select ARCH_IS_SET
+	bool "Nios II Gen 2 architecture"
 	select ATOMIC_OPERATIONS_C
 	select HAS_DTS
-	imply XIP
-	select ARCH_HAS_TIMING_FUNCTIONS
-	help
-	  Nios II Gen 2 architecture
 
-config RISCV
-	bool
-	select ARCH_IS_SET
+config RISCV32
+	bool "RISCV32 architecture"
 	select HAS_DTS
-	select ARCH_HAS_THREAD_LOCAL_STORAGE
-	imply XIP
-	help
-	  RISCV architecture
 
 config XTENSA
-	bool
-	select ARCH_IS_SET
+	bool "Xtensa architecture"
 	select HAS_DTS
-	select USE_SWITCH
-	select USE_SWITCH_SUPPORTED
-	help
-	  Xtensa architecture
 
 config ARCH_POSIX
-	bool
-	select ARCH_IS_SET
-	select HAS_DTS
+	bool "POSIX (native) architecture"
 	select ATOMIC_OPERATIONS_BUILTIN
 	select ARCH_HAS_CUSTOM_SWAP_TO_MAIN
 	select ARCH_HAS_CUSTOM_BUSY_WAIT
 	select ARCH_HAS_THREAD_ABORT
 	select NATIVE_APPLICATION
 	select HAS_COVERAGE_SUPPORT
-	help
-	  POSIX (native) architecture
 
-config ARCH_IS_SET
-	bool
-	help
-	  Helper symbol to detect SoCs forgetting to select one of the arch
-	  symbols above. See the top-level CMakeLists.txt.
+endchoice
+
 
 menu "General Architecture Options"
 
@@ -123,51 +73,37 @@ module-str = mpu
 source "subsys/logging/Kconfig.template.log_config"
 
 config BIG_ENDIAN
-	bool
-	help
-	  This option tells the build system that the target system is big-endian.
-	  Little-endian architecture is the default and should leave this option
-	  unselected.  This option is selected by arch/$ARCH/Kconfig,
-	  soc/**/Kconfig, or boards/**/Kconfig and the user should generally avoid
-	  modifying it.  The option is used to select linker script OUTPUT_FORMAT
-	  and command line option for gen_isr_tables.py.
-
-config 64BIT
-	bool
-	help
-	  This option tells the build system that the target system is
-	  using a 64-bit address space, meaning that pointer and long types
-	  are 64 bits wide. This option is selected by arch/$ARCH/Kconfig,
-	  soc/**/Kconfig, or boards/**/Kconfig and the user should generally
-	  avoid modifying it.
-
-# Workaround for not being able to have commas in macro arguments
-DT_CHOSEN_Z_SRAM := zephyr,sram
-
-config SRAM_SIZE
-	int "SRAM Size in kB"
-	default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_SRAM),0,K)
-	help
-	  The SRAM size in kB. The default value comes from /chosen/zephyr,sram in
-	  devicetree. The user should generally avoid changing it via menuconfig or
-	  in configuration files.
-
-config SRAM_BASE_ADDRESS
-	hex "SRAM Base Address"
-	default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_SRAM))
-	help
-	  The SRAM base address. The default value comes from from
-	  /chosen/zephyr,sram in devicetree. The user should generally avoid
-	  changing it via menuconfig or in configuration files.
+       bool
+       help
+         This option tells the build system that the target system is
+         big-endian.  Little-endian architecture is the default and
+         should leave this option unselected.  This option is selected
+         by arch/$ARCH/Kconfig, soc/**/Kconfig, or boards/**/Kconfig
+         and the user should generally avoid modifying it.  The option
+         is used to select linker script OUTPUT_FORMAT and command
+         line option for gen_isr_tables.py.
 
 if ARC || ARM || NIOS2 || X86
 
-# Workaround for not being able to have commas in macro arguments
-DT_CHOSEN_Z_FLASH := zephyr,flash
+config SRAM_SIZE
+	int "SRAM Size in kB"
+	default $(dt_int_val,DT_SRAM_SIZE)
+	help
+	  This option specifies the size of the SRAM in kB.  It is normally set by
+	  the board's defconfig file and the user should generally avoid modifying
+	  it via the menu configuration.
+
+config SRAM_BASE_ADDRESS
+	hex "SRAM Base Address"
+	default $(dt_hex_val,DT_SRAM_BASE_ADDRESS)
+	help
+	  This option specifies the base address of the SRAM on the board.  It is
+	  normally set by the board's defconfig file and the user should generally
+	  avoid modifying it via the menu configuration.
 
 config FLASH_SIZE
 	int "Flash Size in kB"
-	default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K) if (XIP && ARM) || !ARM
+	default $(dt_int_val,DT_FLASH_SIZE) if (XIP && ARM) || !ARM
 	help
 	  This option specifies the size of the flash in kB.  It is normally set by
 	  the board's defconfig file and the user should generally avoid modifying
@@ -175,7 +111,7 @@ config FLASH_SIZE
 
 config FLASH_BASE_ADDRESS
 	hex "Flash Base Address"
-	default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) if (XIP && ARM) || !ARM
+	default $(dt_hex_val,DT_FLASH_BASE_ADDRESS) if (XIP && ARM) || !ARM
 	help
 	  This option specifies the base address of the flash on the board. It is
 	  normally set by the board's defconfig file and the user should generally
@@ -228,9 +164,6 @@ config HW_STACK_PROTECTION
 config USERSPACE
 	bool "User mode threads"
 	depends on ARCH_HAS_USERSPACE
-	depends on RUNTIME_ERROR_CHECKS
-	depends on SRAM_REGION_PERMISSIONS
-	select THREAD_STACK_INFO
 	help
 	  When enabled, threads may be created or dropped down to user mode,
 	  which has significantly restricted permissions and must interact
@@ -251,44 +184,31 @@ config PRIVILEGED_STACK_SIZE
 	  This option sets the privileged stack region size that will be used
 	  in addition to the user mode thread stack.  During normal execution,
 	  this region will be inaccessible from user mode.  During system calls,
-	  this region will be utilized by the system call. This value must be
-	  a multiple of the minimum stack alignment.
+	  this region will be utilized by the system call.
+
+config PRIVILEGED_STACK_TEXT_AREA
+	int "Privileged stacks text area"
+	default 512 if COVERAGE_GCOV
+	default 256
+	depends on ARCH_HAS_USERSPACE
+	help
+	  Stack text area size for privileged stacks.
 
 config KOBJECT_TEXT_AREA
 	int "Size if kobject text area"
 	default 512 if COVERAGE_GCOV
 	default 512 if NO_OPTIMIZATIONS
-	default 512 if STACK_CANARIES && RISCV
 	default 256
 	depends on ARCH_HAS_USERSPACE
 	help
 	  Size of kernel object text area. Used in linker script.
 
-config GEN_PRIV_STACKS
-	bool
-	help
-	  Selected if the architecture requires that privilege elevation stacks
-	  be allocated in a separate memory area. This is typical of arches
-	  whose MPUs require regions to be power-of-two aligned/sized.
-
-	  FIXME: This should be removed and replaced with checks against
-	  CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT, but both ARM and ARC
-	  changes will be necessary for this.
-
 config STACK_GROWS_UP
 	bool "Stack grows towards higher memory addresses"
 	help
 	  Select this option if the architecture has upward growing thread
 	  stacks. This is not common.
 
-config NO_UNUSED_STACK_INSPECTION
-	bool
-	help
-	  Selected if the architecture will generate a fault if unused stack
-	  memory is examined, which is the region between the current stack
-	  pointer and the deepest available address in the current stack
-	  region.
-
 config MAX_THREAD_BYTES
 	int "Bytes to use when tracking object thread permissions"
 	default 2
@@ -303,26 +223,40 @@ config DYNAMIC_OBJECTS
 	bool "Allow kernel objects to be allocated at runtime"
 	depends on USERSPACE
 	help
-	  Enabling this option allows for kernel objects to be requested from
-	  the calling thread's resource pool, at a slight cost in performance
-	  due to the supplemental run-time tables required to validate such
-	  objects.
+	Enabling this option allows for kernel objects to be requested from
+	the calling thread's resource pool, at a slight cost in performance
+	due to the supplemental run-time tables required to validate such
+	objects.
 
-	  Objects allocated in this way can be freed with a supervisor-only
-	  API call, or when the number of references to that object drops to
-	  zero.
+	Objects allocated in this way can be freed with a supervisor-only
+	API call, or when the number of references to that object drops to
+	zero.
+
+config SIMPLE_FATAL_ERROR_HANDLER
+	bool "Simple system fatal error handler"
+	default y if !MULTITHREADING
+	help
+	  Provides an implementation of _SysFatalErrorHandler() that hard hangs
+	  instead of aborting the faulting thread, and does not print anything,
+	  for footprint-concerned systems. Only enable this option if you do not
+	  want debug capabilities in case of system fatal error.
+
+if ARCH_HAS_NOCACHE_MEMORY_SUPPORT
 
 config NOCACHE_MEMORY
 	bool "Support for uncached memory"
-	depends on ARCH_HAS_NOCACHE_MEMORY_SUPPORT
 	help
 	  Add a "nocache" read-write memory section that is configured to
 	  not be cached. This memory section can be used to perform DMA
 	  transfers when cache coherence issues are not optimal or can not
 	  be solved using cache maintenance operations.
 
-menu "Interrupt Configuration"
+endif # ARCH_HAS_NOCACHE_MEMORY_SUPPORT
 
+menu "Interrupt Configuration"
+#
+# Interrupt related configs
+#
 config DYNAMIC_INTERRUPTS
 	bool "Enable installation of IRQs at runtime"
 	help
@@ -359,16 +293,6 @@ config GEN_SW_ISR_TABLE
 	  _isr_table_entry containing the interrupt service routine and supplied
 	  parameter.
 
-config ARCH_SW_ISR_TABLE_ALIGN
-	int "Alignment size of a software ISR table"
-	default 0
-	depends on GEN_SW_ISR_TABLE
-	help
-	  This option controls alignment size of generated
-	  _sw_isr_table.  Some architecture needs a software ISR table
-	  to be aligned to architecture specific size.  The default
-	  size is 0 for no alignment.
-
 config GEN_IRQ_START_VECTOR
 	int
 	default 0
@@ -381,52 +305,20 @@ config GEN_IRQ_START_VECTOR
 	  This is a hidden option which needs to be set per architecture and
 	  left alone.
 
+
 config IRQ_OFFLOAD
 	bool "Enable IRQ offload"
-	depends on TEST
 	help
 	  Enable irq_offload() API which allows functions to be synchronously
-	  run in interrupt context. Only useful for test cases that need
-	  to validate the correctness of kernel objects in IRQ context.
-
-
-config EXTRA_EXCEPTION_INFO
-	bool "Collect extra exception info"
-	depends on ARCH_HAS_EXTRA_EXCEPTION_INFO
-	help
-	  This option enables the collection of extra information, such as
-	  register state, when a fault occurs. This information can be useful
-	  to collect for post-mortem analysis and debug of issues.
+	  run in interrupt context. Mainly useful for test cases.
 
 endmenu # Interrupt configuration
 
-config INIT_ARCH_HW_AT_BOOT
-	bool "Initialize internal architecture state at boot"
-	depends on ARCH_SUPPORTS_ARCH_HW_INIT
-	help
-	  This option instructs Zephyr to force the initialization
-	  of the internal architectural state (for example ARCH-level
-	  HW registers and system control blocks) during boot to
-	  the reset values as specified by the corresponding
-	  architecture manual. The option is useful when the Zephyr
-	  firmware image is chain-loaded, for example, by a debugger
-	  or a bootloader, and we need to guarantee that the internal
-	  states of the architecture core blocks are restored to the
-	  reset values (as specified by the architecture).
-
-	  Note: the functionality is architecture-specific. For the
-	  implementation details refer to each architecture where
-	  this feature is supported.
-
 endmenu
 
 #
 # Architecture Capabilities
 #
-
-config ARCH_HAS_TIMING_FUNCTIONS
-	bool
-
 config ARCH_HAS_TRUSTED_EXECUTION
 	bool
 
@@ -445,31 +337,6 @@ config ARCH_HAS_NOCACHE_MEMORY_SUPPORT
 config ARCH_HAS_RAMFUNC_SUPPORT
 	bool
 
-config ARCH_HAS_NESTED_EXCEPTION_DETECTION
-	bool
-
-config ARCH_SUPPORTS_COREDUMP
-	bool
-
-config ARCH_SUPPORTS_ARCH_HW_INIT
-	bool
-
-config ARCH_HAS_EXTRA_EXCEPTION_INFO
-	bool
-
-config ARCH_HAS_GDBSTUB
-	bool
-
-config ARCH_HAS_COHERENCE
-	bool
-	help
-	  When selected, the architecture supports the
-	  arch_mem_coherent() API and can link into incoherent/cached
-	  memory using the ".cached" linker section.
-
-config ARCH_HAS_THREAD_LOCAL_STORAGE
-	bool
-
 #
 # Other architecture related options
 #
@@ -478,7 +345,60 @@ config ARCH_HAS_THREAD_ABORT
 	bool
 
 #
-# Hidden CPU family configs
+# Hidden PM feature configs which are to be selected by
+# individual SoC.
+#
+config HAS_SYS_POWER_STATE_SLEEP_1
+	# Hidden
+	bool
+	help
+	  This option signifies that the target supports the SYS_POWER_STATE_SLEEP_1
+	  configuration option.
+
+config HAS_SYS_POWER_STATE_SLEEP_2
+	# Hidden
+	bool
+	help
+	  This option signifies that the target supports the SYS_POWER_STATE_SLEEP_2
+	  configuration option.
+
+config HAS_SYS_POWER_STATE_SLEEP_3
+	# Hidden
+	bool
+	help
+	  This option signifies that the target supports the SYS_POWER_STATE_SLEEP_3
+	  configuration option.
+
+config HAS_SYS_POWER_STATE_DEEP_SLEEP_1
+	# Hidden
+	bool
+	help
+	  This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_1
+	  configuration option.
+
+config HAS_SYS_POWER_STATE_DEEP_SLEEP_2
+	# Hidden
+	bool
+	help
+	  This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_2
+	  configuration option.
+
+config HAS_SYS_POWER_STATE_DEEP_SLEEP_3
+	# Hidden
+	bool
+	help
+	  This option signifies that the target supports the SYS_POWER_STATE_DEEP_SLEEP_3
+	  configuration option.
+
+config BOOTLOADER_CONTEXT_RESTORE_SUPPORTED
+	# Hidden
+	bool
+	help
+	  This option signifies that the target has options of bootloaders
+	  that support context restore upon resume from deep sleep
+
+
+# End hidden CPU family configs
 #
 
 config CPU_HAS_TEE
@@ -488,354 +408,63 @@ config CPU_HAS_TEE
 	  Execution Environment (e.g. when it has a security attribution
 	  unit).
 
-config CPU_HAS_DCLS
-	bool
-	help
-	  This option is enabled when the processor hardware is configured in
-	  Dual-redundant Core Lock-step (DCLS) topology.
-
 config CPU_HAS_FPU
 	bool
 	help
 	  This option is enabled when the CPU has hardware floating point
 	  unit.
 
-config CPU_HAS_FPU_DOUBLE_PRECISION
-	bool
-	select CPU_HAS_FPU
-	help
-	  When enabled, this indicates that the CPU has a double floating point
-	  precision unit.
-
 config CPU_HAS_MPU
 	bool
+	# Omit prompt to signify "hidden" option
 	help
 	  This option is enabled when the CPU has a Memory Protection Unit (MPU).
 
-config CPU_HAS_MMU
+config MEMORY_PROTECTION
 	bool
+	# Omit prompt to signify "hidden" option
 	help
-	  This hidden option is selected when the CPU has a Memory Management Unit
-	  (MMU).
+	  This option is enabled when Memory Protection features are supported.
+	  Memory protection support is currently available on ARC, ARM, and x86
+	  architectures.
 
-config ARCH_HAS_DEMAND_PAGING
-	bool
-	help
-	  This hidden configuration should be selected by the architecture if
-	  demand paging is supported.
-
-config ARCH_HAS_RESERVED_PAGE_FRAMES
-	bool
-	help
-	  This hidden configuration should be selected by the architecture if
-	  certain RAM page frames need to be marked as reserved and never used for
-	  memory mappings. The architecture will need to implement
-	  arch_reserved_pages_update().
-
-config ARCH_MAPS_ALL_RAM
-	bool
-	help
-	  This hidden option is selected by the architecture to inform the kernel
-	  that all RAM is mapped at boot, and not just the bounds of the Zephyr image.
-	  If RAM starts at 0x0, the first page must remain un-mapped to catch NULL
-	  pointer dereferences. With this enabled, the kernel will not assume that
-	  virtual memory addresses past the kernel image are available for mappings,
-	  but instead takes into account an entire RAM mapping instead.
-
-	  This is typically set by architectures which need direct access to all memory.
-	  It is the architecture's responsibility to mark reserved memory regions
-	  as such in arch_reserved_pages_update().
-
-	  Although the kernel will not disturb this RAM mapping by re-mapping the associated
-	  virtual addresses elsewhere, this is limited to only management of the
-	  virtual address space. The kernel's page frame ontology will not consider
-	  this mapping at all; non-kernel pages will be considered free (unless marked
-	  as reserved) and Z_PAGE_FRAME_MAPPED will not be set.
-
-menuconfig MMU
-	bool "Enable MMU features"
-	depends on CPU_HAS_MMU
-	help
-	  This option is enabled when the CPU's memory management unit is active
-	  and the arch_mem_map() API is available.
-
-if MMU
-config MMU_PAGE_SIZE
-	hex "Size of smallest granularity MMU page"
-	default 0x1000
-	help
-	  Size of memory pages. Varies per MMU but 4K is common. For MMUs that
-	  support multiple page sizes, put the smallest one here.
-
-config KERNEL_VM_BASE
-	hex "Virtual address space base address"
-	default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_SRAM))
-	help
-	  Define the base of the kernel's address space.
-
-	  By default, this is the same as the DT_CHOSEN_Z_SRAM physical base SRAM
-	  address from DTS, in which case RAM will be identity-mapped. Some
-	  architectures may require RAM to be mapped in this way; they may have
-	  just one RAM region and doing this makes linking much simpler, as
-	  at least when the kernel boots all virtual RAM addresses are the same
-	  as their physical address (demand paging at runtime may later modify
-	  this for non-pinned page frames).
-
-	  Otherwise, if RAM isn't identity-mapped:
-	  1. It is the architecture's responsibility to transition the
-	  instruction pointer to virtual addresses at early boot before
-	  entering the kernel at z_cstart().
-	  2. The underlying architecture may impose constraints on the bounds of
-	  the kernel's address space, such as not overlapping physical RAM
-	  regions if RAM is not identity-mapped, or the virtual and physical
-	  base addresses being aligned to some common value (which allows
-	  double-linking of paging structures to make the instruction pointer
-	  transition simpler).
-
-	  Zephyr does not implement a split address space and if multiple
-	  page tables are in use, they all have the same virtual-to-physical
-	  mappings (with potentially different permissions).
-
-config KERNEL_VM_OFFSET
-	hex "Kernel offset within address space"
-	default 0
-	help
-	  Offset that the kernel image begins within its address space,
-	  if this is not the same offset from the beginning of RAM.
-
-	  Some care may need to be taken in selecting this value. In certain
-	  build-time cases, or when a physical address cannot be looked up
-	  in page tables, the equation:
-
-	      virt = phys + ((KERNEL_VM_BASE + KERNEL_VM_OFFSET) -
-	                     SRAM_BASE_ADDRESS)
-
-	  Will be used to convert between physical and virtual addresses for
-	  memory that is mapped at boot.
-
-	  This uncommon and is only necessary if the beginning of VM and
-	  physical memory have dissimilar alignment.
-
-config KERNEL_VM_SIZE
-	hex "Size of kernel address space in bytes"
-	default 0x800000
-	help
-	  Size of the kernel's address space. Constraining this helps control
-	  how much total memory can be used for page tables.
-
-	  The difference between KERNEL_VM_BASE and KERNEL_VM_SIZE indicates the
-	  size of the virtual region for runtime memory mappings. This is needed
-	  for mapping driver MMIO regions, as well as special RAM mapping use-cases
-	  such as VSDO pages, memory mapped thread stacks, and anonymous memory
-	  mappings. The kernel itself will be mapped in here as well at boot.
-
-	  Systems with very large amounts of memory (such as 512M or more)
-	  will want to use a 64-bit build of Zephyr, there are no plans to
-	  implement a notion of "high" memory in Zephyr to work around physical
-	  RAM size larger than the defined bounds of the virtual address space.
-
-config DEMAND_PAGING
-	bool "Enable demand paging [EXPERIMENTAL]"
-	depends on ARCH_HAS_DEMAND_PAGING
-	help
-	  Enable demand paging. Requires architecture support in how the kernel
-	  is linked and the implementation of an eviction algorithm and a
-	  backing store for evicted pages.
-
-if DEMAND_PAGING
-config DEMAND_PAGING_ALLOW_IRQ
-	bool "Allow interrupts during page-ins/outs"
-	help
-	  Allow interrupts to be serviced while pages are being evicted or
-	  retrieved from the backing store. This is much better for system
-	  latency, but any code running in interrupt context that page faults
-	  will cause a kernel panic. Such code must work with exclusively pinned
-	  code and data pages.
-
-	  The scheduler is still disabled during this operation.
-
-	  If this option is disabled, the page fault servicing logic
-	  runs with interrupts disabled for the entire operation. However,
-	  ISRs may also page fault.
-endif	# DEMAND_PAGING
-endif   # MMU
-
-menuconfig MPU
-	bool "Enable MPU features"
-	depends on CPU_HAS_MPU
-	help
-	  This option, when enabled, indicates to the core kernel that an MPU
-	  is enabled.
-
-if MPU
 config MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT
 	bool
+	# Omit prompt to signify "hidden" option
 	help
 	  This option is enabled when the MPU requires a power of two alignment
 	  and size for MPU regions.
 
 config MPU_REQUIRES_NON_OVERLAPPING_REGIONS
 	bool
+	# Omit prompt to signify "hidden" option
 	help
 	  This option is enabled when the MPU requires the active (i.e. enabled)
 	  MPU regions to be non-overlapping with each other.
 
-config MPU_GAP_FILLING
-	bool "Force MPU to be filling in background memory regions"
-	depends on MPU_REQUIRES_NON_OVERLAPPING_REGIONS
-	default y if !USERSPACE
-	help
-	  This Kconfig option instructs the MPU driver to enforce
-	  a full kernel SRAM partitioning, when it programs the
-	  dynamic MPU regions (user thread stack, PRIV stack guard
-	  and application memory domains) during context-switch. We
-	  allow this to be a configurable option, in order to be able
-	  to switch the option off and have an increased number of MPU
-	  regions available for application memory domain programming.
-
-	  Notes:
-	  An increased number of MPU regions should only be required,
-	  when building with USERSPACE support. As a result, when we
-	  build without USERSPACE support, gap filling should always
-	  be required.
-
-	  When the option is switched off, access to memory areas not
-	  covered by explicit MPU regions is restricted to privileged
-	  code on an ARCH-specific basis. Refer to ARCH-specific
-	  documentation for more information on how this option is
-	  used.
-
-endif # MPU
-
-config SRAM_REGION_PERMISSIONS
-	bool "Assign appropriate permissions to kernel areas in SRAM"
-	depends on MMU || MPU
-	default y
-	help
-	  This option indicates that memory protection hardware
-	  is present, enabled, and regions have been configured at boot for memory
-	  ranges within the kernel image.
-
-	  If this option is turned on, certain areas of the kernel image will
-	  have the following access policies applied for all threads, including
-	  supervisor threads:
-
-	  1) All program text will be have read-only, execute memory permission
-	  2) All read-only data will have read-only permission, and execution
-	     disabled if the hardware supports it.
-	  3) All other RAM addresses will have read-write permission, and
-	     execution disabled if the hardware supports it.
-
-	  Options such as USERSPACE or HW_STACK_PROTECTION may additionally
-	  impose additional policies on the memory map, which may be global
-	  or local to the current running thread.
-
-	  This option may consume additional memory to satisfy memory protection
-	  hardware alignment constraints.
-
-	  If this option is disabled, the entire kernel will have default memory
-	  access permissions set, typically read/write/execute. It may be desirable
-	  to turn this off on MMU systems which are using the MMU for demand
-	  paging, do not need memory protection, and would rather not use up
-	  RAM for the alignment between regions.
-
-menu "Floating Point Options"
-
-config FPU
-	bool "Enable floating point unit (FPU)"
+menuconfig FLOAT
+	bool "Floating point"
 	depends on CPU_HAS_FPU
-	depends on ARC || ARM || RISCV || SPARC || X86
 	help
-	  This option enables the hardware Floating Point Unit (FPU), in order to
-	  support using the floating point registers and instructions.
+	  This option allows threads to use the floating point registers.
+	  By default, only a single thread may use the registers.
 
-	  When this option is enabled, by default, threads may use the floating
-	  point registers only in an exclusive manner, and this usually means that
-	  only one thread may perform floating point operations.
+	  Disabling this option means that any thread that uses a
+	  floating point register will get a fatal exception.
 
-	  If it is necessary for multiple threads to perform concurrent floating
-	  point operations, the "FPU register sharing" option must be enabled to
-	  preserve the floating point registers across context switches.
+if FLOAT
 
-	  Note that this option cannot be selected for the platforms that do not
-	  include a hardware floating point unit; the floating point support for
-	  those platforms is dependent on the availability of the toolchain-
-	  provided software floating point library.
-
-config FPU_SHARING
-	bool "FPU register sharing"
-	depends on FPU && MULTITHREADING
-	default y if ARM && ARMV7_M_ARMV8_M_FP
+config FP_SHARING
+	bool "Floating point register sharing"
 	help
-	  This option enables preservation of the hardware floating point registers
-	  across context switches to allow multiple threads to perform concurrent
-	  floating point operations.
+	  This option allows multiple threads to use the floating point
+	  registers.
 
-	  Note that on Cortex-M processors with the floating point extension we
-	  enable by default the FPU register sharing mode, as some GCC compilers
-	  may activate a floating point context by generating FP instructions for
-	  any thread, and that context must be preserved when switching such
-	  threads in and out. The developers can still disable the FP sharing
-	  mode in their application projects, and switch to Unshared FP registers
-	  mode, if it is guaranteed that the image code does not generate FP
-	  instructions outside the single thread context that is allowed to do so.
+endif # FLOAT
 
-endmenu
-
-menu "Cache Options"
-
-config CACHE_MANAGEMENT
-	bool "Enable cache management features"
-	help
-	  This links in the cache management functions (for d-cache and i-cache
-	  where possible).
-
-config DCACHE_LINE_SIZE_DETECT
-	bool "Detect d-cache line size at runtime"
-	depends on CACHE_MANAGEMENT
-	help
-	  This option enables querying some architecture-specific hardware for
-	  finding the d-cache line size at the expense of taking more memory and
-	  code and a slightly increased boot time.
-
-	  If the CPU's d-cache line size is known in advance, disable this option and
-	  manually enter the value for DCACHE_LINE_SIZE or set it in the DT
-	  using the 'd-cache-line-size' property.
-
-config DCACHE_LINE_SIZE
-	int "d-cache line size" if !DCACHE_LINE_SIZE_DETECT
-	depends on CACHE_MANAGEMENT
-	default 0
-	help
-	  Size in bytes of a CPU d-cache line. If this is set to 0 the value is
-	  obtained from the 'd-cache-line-size' DT property instead if present.
-
-
-	  Detect automatically at runtime by selecting DCACHE_LINE_SIZE_DETECT.
-
-config ICACHE_LINE_SIZE_DETECT
-	bool "Detect i-cache line size at runtime"
-	depends on CACHE_MANAGEMENT
-	help
-	  This option enables querying some architecture-specific hardware for
-	  finding the i-cache line size at the expense of taking more memory and
-	  code and a slightly increased boot time.
-
-	  If the CPU's i-cache line size is known in advance, disable this option and
-	  manually enter the value for ICACHE_LINE_SIZE or set it in the DT
-	  using the 'i-cache-line-size' property.
-
-config ICACHE_LINE_SIZE
-	int "i-cache line size" if !ICACHE_LINE_SIZE_DETECT
-	depends on CACHE_MANAGEMENT
-	default 0
-	help
-	  Size in bytes of a CPU i-cache line. If this is set to 0 the value is
-	  obtained from the 'i-cache-line-size' DT property instead if present.
-
-	  Detect automatically at runtime by selecting ICACHE_LINE_SIZE_DETECT.
-
-endmenu
+#
+# End hidden PM feature configs
+#
 
 config ARCH
 	string

arch/arc/CMakeLists.txt

@@ -10,10 +10,4 @@ zephyr_cc_option(-g3 -gdwarf-2)
 # See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63691
 zephyr_cc_option(-fno-delete-null-pointer-checks)
 
-zephyr_cc_option_ifdef(CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS -munaligned-access)
-
-# Instruct compiler to use register R26 as thread pointer
-# for thread local storage.
-zephyr_cc_option_ifdef(CONFIG_THREAD_LOCAL_STORAGE -mtp-regno=26)
-
 add_subdirectory(core)

arch/arc/Kconfig

@@ -1,7 +1,10 @@
-# ARC options
+# ARC EM4 options
 
-# Copyright (c) 2014, 2019 Wind River Systems, Inc.
+#
+# Copyright (c) 2014 Wind River Systems, Inc.
+#
 # SPDX-License-Identifier: Apache-2.0
+#
 
 menu "ARC Options"
 	depends on ARC
@@ -9,72 +12,37 @@ menu "ARC Options"
 config ARCH
 	default "arc"
 
-choice
-	prompt "ARC core family"
-	default CPU_ARCEM
+menu "ARC EM4 processor options"
 
-config CPU_ARCEM
-	bool "ARC EM cores"
+config	CPU_ARCEM4
+	bool
+	default y
 	select CPU_ARCV2
 	select ATOMIC_OPERATIONS_C
 	help
-	  This option signifies the use of an ARC EM CPU
+	  This option signifies the use of an ARC EM4 CPU
 
-config CPU_ARCHS
-	bool "ARC HS cores"
-	select CPU_ARCV2
-	# FIXME: ATOMIC_OPERATIONS_BUILTIN still has some problem in arcmwdt
-	# toolchain, so choosing ATOMIC_OPERATIONS_C instead.
-	select ATOMIC_OPERATIONS_C if "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "arcmwdt"
-	select ATOMIC_OPERATIONS_BUILTIN if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "arcmwdt"
-	help
-	  This option signifies the use of an ARC HS CPU
-
-endchoice
-
-config CPU_EM4
-	bool
-	help
-	  If y, the SoC uses an ARC EM4 CPU
-
-config CPU_EM4_DMIPS
-	bool
-	help
-	  If y, the SoC uses an ARC EM4 DMIPS CPU
-
-config CPU_EM4_FPUS
-	bool
-	help
-	  If y, the SoC uses an ARC EM4 DMIPS CPU with the single-precision
-	  floating-point extension
-
-config CPU_EM4_FPUDA
-	bool
-	help
-	  If y, the SoC uses an ARC EM4 DMIPS CPU with single-precision
-	  floating-point and double assist instructions
-
-config CPU_EM6
-	bool
-	help
-	  If y, the SoC uses an ARC EM6 CPU
-
-config FP_FPU_DA
-	bool
+endmenu
 
 menu "ARCv2 Family Options"
 
-config CPU_ARCV2
+config	CPU_ARCV2
 	bool
 	select ARCH_HAS_STACK_PROTECTION if ARC_HAS_STACK_CHECKING || ARC_MPU
 	select ARCH_HAS_USERSPACE if ARC_MPU
-	select USE_SWITCH
-	select USE_SWITCH_SUPPORTED
 	default y
 	help
 	  This option signifies the use of a CPU of the ARCv2 family.
 
-config NUM_IRQ_PRIO_LEVELS
+config	DATA_ENDIANNESS_LITTLE
+	bool
+	default y
+	help
+	  This is driven by the processor implementation, since it is fixed in
+	  hardware. The BSP should set this value to 'n' if the data is
+	  implemented as big endian.
+
+config	NUM_IRQ_PRIO_LEVELS
 	int "Number of supported interrupt priority levels"
 	range 1 16
 	help
@@ -83,7 +51,7 @@ config NUM_IRQ_PRIO_LEVELS
 
 	  The BSP must provide a valid default for proper operation.
 
-config NUM_IRQS
+config	NUM_IRQS
 	int "Upper limit of interrupt numbers/IDs used"
 	range 17 256
 	help
@@ -94,7 +62,7 @@ config NUM_IRQS
 	  The BSP must provide a valid default. This drives the size of the
 	  vector table.
 
-config RGF_NUM_BANKS
+config	RGF_NUM_BANKS
 	int "Number of General Purpose Register Banks"
 	depends on CPU_ARCV2
 	range 1 2
@@ -117,21 +85,7 @@ config ARC_FIRQ
 	  If FIRQ is disabled, the handle of interrupts with highest priority
 	  will be same with other interrupts.
 
-config ARC_FIRQ_STACK
-	bool "Enable separate firq stack"
-	depends on ARC_FIRQ && RGF_NUM_BANKS > 1
-	help
-	  Use separate stack for FIRQ handing. When the fast irq is also a direct
-	  irq, this will get the minimal interrupt latency.
-
-config ARC_FIRQ_STACK_SIZE
-	int "FIRQ stack size"
-	depends on ARC_FIRQ_STACK
-	default 1024
-	help
-	  The size of firq stack.
-
-config ARC_HAS_STACK_CHECKING
+config 	ARC_HAS_STACK_CHECKING
 	bool "ARC has STACK_CHECKING"
 	default y
 	help
@@ -139,24 +93,16 @@ config ARC_HAS_STACK_CHECKING
 	  checking stack accesses and raising an exception when a stack
 	  overflow or underflow is detected.
 
-config ARC_CONNECT
-	bool "ARC has ARC connect"
-	select SCHED_IPI_SUPPORTED
-	help
-	  ARC is configured with ARC CONNECT which is a hardware for connecting
-	  multi cores.
-
-config ARC_STACK_CHECKING
+config  ARC_STACK_CHECKING
 	bool
-	select NO_UNUSED_STACK_INSPECTION
 	help
 	  Use ARC STACK_CHECKING to do stack protection
 
-config ARC_STACK_PROTECTION
+config	ARC_STACK_PROTECTION
 	bool
 	default y if HW_STACK_PROTECTION
 	select ARC_STACK_CHECKING if ARC_HAS_STACK_CHECKING
-	select MPU_STACK_GUARD if (!ARC_STACK_CHECKING && ARC_MPU && ARC_MPU_VER !=2)
+	select MPU_STACK_GUARD if (!ARC_STACK_CHECKING && ARC_MPU)
 	select THREAD_STACK_INFO
 	help
 	  This option enables either:
@@ -168,16 +114,7 @@ config ARC_STACK_PROTECTION
 	  selection of the ARC stack checking is
 	  prioritized over the MPU-based stack guard.
 
-config ARC_USE_UNALIGNED_MEM_ACCESS
-	bool "Enable unaligned access in HW"
-	default y if CPU_ARCHS
-	depends on (CPU_ARCEM && !ARC_HAS_SECURE) || CPU_ARCHS
-	help
-	  ARC EM cores w/o secure shield 2+2 mode support might be configured
-	  to support unaligned memory access which is then disabled by default.
-	  Enable unaligned access in hardware and make software to use it.
-
-config FAULT_DUMP
+config	FAULT_DUMP
 	int "Fault dump level"
 	default 2
 	range 0 2
@@ -192,6 +129,9 @@ config FAULT_DUMP
 
 	  0: Off.
 
+config	XIP
+	default y if !UART_NSIM
+
 config GEN_ISR_TABLES
 	default y
 
@@ -209,66 +149,12 @@ config CODE_DENSITY
 	help
 	  Enable code density option to get better code density
 
-config ARC_HAS_ACCL_REGS
-	bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6)"
-	default y if FPU
-	help
-	  Depending on the configuration, CPU can contain accumulator reg-pair
-	  (also referred to as r58:r59). These can also be used by gcc as GPR so
-	  kernel needs to save/restore per process
-
 config ARC_HAS_SECURE
-	bool "ARC has SecureShield"
-	select CPU_HAS_TEE
-	select ARCH_HAS_TRUSTED_EXECUTION
+	bool
+	#  a hidden option
 	help
 	  This option is enabled when ARC core supports secure mode
 
-config SJLI_TABLE_SIZE
-	int "SJLI table size"
-	depends on ARC_SECURE_FIRMWARE
-	default 8
-	help
-	  The size of sjli (Secure Jump and Link Indexed) table. The
-	  code in normal mode call secure services in secure mode through
-	  sjli instruction.
-
-config ARC_SECURE_FIRMWARE
-	bool "Generate Secure Firmware"
-	depends on ARC_HAS_SECURE
-	default y if TRUSTED_EXECUTION_SECURE
-	help
-	  This option indicates that we are building a Zephyr image that
-	  is intended to execute in secure mode. The option is only
-	  applicable to ARC processors that implement the SecureShield.
-
-	  This option enables Zephyr to include code that executes in
-	  secure mode, as well as to exclude code that is designed to
-	  execute only in normal mode.
-
-	  Code executing in secure mode has access to both the secure
-	  and normal resources of the ARC processors.
-
-config ARC_NORMAL_FIRMWARE
-	bool "Generate Normal Firmware"
-	depends on !ARC_SECURE_FIRMWARE
-	depends on ARC_HAS_SECURE
-	default y if TRUSTED_EXECUTION_NONSECURE
-	help
-	  This option indicates that we are building a Zephyr image that
-	  is intended to execute in normal mode. Execution of this
-	  image is triggered by secure firmware that executes in secure
-	  mode. The option is only applicable to ARC processors that
-	  implement the SecureShield.
-
-	  This option enables Zephyr to include code that executes in
-	  normal mode only, as well as to exclude code that is
-	  designed to execute only in secure mode.
-
-	  Code executing in normal mode has no access to secure
-	  resources of the ARC processors, and, therefore, it shall avoid
-	  accessing them.
-
 menu "ARC MPU Options"
 depends on CPU_HAS_MPU
 
@@ -282,27 +168,35 @@ source "arch/arc/core/mpu/Kconfig"
 
 endmenu
 
-config DCACHE_LINE_SIZE
+config CACHE_LINE_SIZE_DETECT
+	bool "Detect d-cache line size at runtime"
+	help
+	  This option enables querying the d-cache build register for finding
+	  the d-cache line size at the expense of taking more memory and code
+	  and a slightly increased boot time.
+
+	  If the CPU's d-cache line size is known in advance, disable this
+	  option and manually enter the value for CACHE_LINE_SIZE.
+
+config CACHE_LINE_SIZE
+	int "Cache line size" if !CACHE_LINE_SIZE_DETECT
 	default 32
-
-config ARC_EXCEPTION_STACK_SIZE
-	int "ARC exception handling stack size"
-	default 768
 	help
-	  Size in bytes of exception handling stack which is at the top of
-	  interrupt stack to get smaller memory footprint because exception
-	  is not frequent. To reduce the impact on interrupt handling,
-	  especially nested interrupt, it cannot be too large.
+	  Size in bytes of a CPU d-cache line.
+
+	  Detect automatically at runtime by selecting CACHE_LINE_SIZE_DETECT.
+
+config ARCH_CACHE_FLUSH_DETECT
+	bool
+
+config CACHE_FLUSHING
+	bool "Enable d-cache flushing mechanism"
+	help
+	  This links in the sys_cache_flush() function, which provides a
+	  way to flush multiple lines of the d-cache.
+	  If the d-cache is present, set this to y.
+	  If the d-cache is NOT present, set this to n.
 
 endmenu
 
-config ARC_EXCEPTION_DEBUG
-	bool "Unhandled exception debugging information"
-	default n
-	depends on PRINTK || LOG
-	help
-	  Print human-readable information about exception vectors, cause codes,
-	  and parameters, at a cost of code/data size for the human-readable
-	  strings.
-
 endmenu

arch/arc/core/CMakeLists.txt

@@ -2,40 +2,28 @@
 
 zephyr_library()
 
-if(CONFIG_COVERAGE)
-  zephyr_compile_options($<TARGET_PROPERTY:compiler,coverage>)
-  zephyr_link_libraries($<TARGET_PROPERTY:linker,coverage>)
-endif()
-
 zephyr_library_sources(
-  thread.c
-  thread_entry_wrapper.S
-  cpu_idle.S
-  fatal.c
-  fault.c
-  fault_s.S
-  irq_manage.c
-  timestamp.c
-  isr_wrapper.S
-  regular_irq.S
-  switch.S
-  prep_c.c
-  reset.S
-  vector_table.c
-  )
+	thread.c
+	thread_entry_wrapper.S
+	cpu_idle.S
+	fatal.c
+	fault.c
+	fault_s.S
+	irq_manage.c
+	cache.c
+	timestamp.c
+	isr_wrapper.S
+	regular_irq.S
+	swap.S
+	sys_fatal_error_handler.c
+	prep_c.c
+	reset.S
+	vector_table.c
+	)
 
-zephyr_library_sources_ifdef(CONFIG_CACHE_MANAGEMENT cache.c)
 zephyr_library_sources_ifdef(CONFIG_ARC_FIRQ fast_irq.S)
 
-zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c)
-
-zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)
-zephyr_library_sources_ifdef(CONFIG_ARC_CONNECT arc_connect.c)
-zephyr_library_sources_ifdef(CONFIG_ARC_CONNECT arc_smp.c)
-
-zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c)
-
+zephyr_library_sources_if_kconfig(irq_offload.c)
+zephyr_library_sources_ifdef(CONFIG_ATOMIC_OPERATIONS_CUSTOM atomic.c)
 add_subdirectory_ifdef(CONFIG_ARC_CORE_MPU mpu)
-add_subdirectory_ifdef(CONFIG_ARC_SECURE_FIRMWARE secureshield)
-
-zephyr_linker_sources(ROM_START SORT_KEY 0x0vectors vector_table.ld)
+zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)

arch/arc/core/arc_connect.c

@@ -1,449 +0,0 @@
-/*
- * Copyright (c) 2019 Synopsys.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/**
- * @file
- * @brief ARCv2 ARC CONNECT driver
- *
- */
-
-#include <kernel.h>
-#include <arch/cpu.h>
-#include <spinlock.h>
-
-
-static struct k_spinlock arc_connect_spinlock;
-
-#define LOCKED(lck) for (k_spinlock_key_t __i = {},			\
-					  __key = k_spin_lock(lck);	\
-			!__i.key;					\
-			k_spin_unlock(lck, __key), __i.key = 1)
-
-
-/* Generate an inter-core interrupt to the target core */
-void z_arc_connect_ici_generate(uint32_t core)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_GENERATE_IRQ, core);
-	}
-}
-
-/* Acknowledge the inter-core interrupt raised by core */
-void z_arc_connect_ici_ack(uint32_t core)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_GENERATE_ACK, core);
-	}
-}
-
-/* Read inter-core interrupt status */
-uint32_t z_arc_connect_ici_read_status(uint32_t core)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_READ_STATUS, core);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/* Check the source of inter-core interrupt */
-uint32_t z_arc_connect_ici_check_src(void)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_CHECK_SOURCE, 0);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/* Clear the inter-core interrupt */
-void z_arc_connect_ici_clear(void)
-{
-	uint32_t cpu, c;
-
-	LOCKED(&arc_connect_spinlock) {
-
-		z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_CHECK_SOURCE, 0);
-		cpu = z_arc_connect_cmd_readback(); /* 1,2,4,8... */
-	/*
-	 * In rare case, multiple concurrent ICIs sent to same target can
-	 * possibly be coalesced by MCIP into 1 asserted IRQ, so @cpu can be
-	 * "vectored" (multiple bits sets) as opposed to typical single bit
-	 */
-		while (cpu) {
-			c = find_lsb_set(cpu) - 1;
-			z_arc_connect_cmd(
-				ARC_CONNECT_CMD_INTRPT_GENERATE_ACK, c);
-			cpu &= ~(1U << c);
-		}
-	}
-}
-
-/* Reset the cores in core_mask */
-void z_arc_connect_debug_reset(uint32_t core_mask)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_RESET,
-			0, core_mask);
-	}
-}
-
-/* Halt the cores in core_mask */
-void z_arc_connect_debug_halt(uint32_t core_mask)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_HALT,
-			0, core_mask);
-	}
-}
-
-/* Run the cores in core_mask */
-void z_arc_connect_debug_run(uint32_t core_mask)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_RUN,
-			0, core_mask);
-	}
-}
-
-/* Set core mask */
-void z_arc_connect_debug_mask_set(uint32_t core_mask, uint32_t mask)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_SET_MASK,
-			mask, core_mask);
-	}
-}
-
-/* Read core mask */
-uint32_t z_arc_connect_debug_mask_read(uint32_t core_mask)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_READ_MASK,
-			0, core_mask);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/*
- * Select cores that should be halted if the core issuing the command is halted
- */
-void z_arc_connect_debug_select_set(uint32_t core_mask)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_SET_SELECT,
-			0, core_mask);
-	}
-}
-
-/* Read the select value */
-uint32_t z_arc_connect_debug_select_read(void)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_DEBUG_READ_SELECT, 0);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/* Read the status, halt or run of all cores in the system */
-uint32_t z_arc_connect_debug_en_read(void)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_DEBUG_READ_EN, 0);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/* Read the last command sent */
-uint32_t z_arc_connect_debug_cmd_read(void)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_DEBUG_READ_CMD, 0);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/* Read the value of internal MCD_CORE register */
-uint32_t z_arc_connect_debug_core_read(void)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_DEBUG_READ_CORE, 0);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/* Clear global free running counter */
-void z_arc_connect_gfrc_clear(void)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_CLEAR, 0);
-	}
-}
-
-/* Read total 64 bits of global free running counter */
-uint64_t z_arc_connect_gfrc_read(void)
-{
-	uint32_t low;
-	uint32_t high;
-	uint32_t key;
-
-	/*
-	 * each core has its own arc connect interface, i.e.,
-	 * CMD/READBACK. So several concurrent commands to ARC
-	 * connect are of if they are trying to access different
-	 * sub-components. For GFRC, HW allows simultaneously accessing to
-	 * counters. So an irq lock is enough.
-	 */
-	key = arch_irq_lock();
-
-	z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_READ_LO, 0);
-	low = z_arc_connect_cmd_readback();
-
-	z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_READ_HI, 0);
-	high = z_arc_connect_cmd_readback();
-
-	arch_irq_unlock(key);
-
-	return (((uint64_t)high) << 32) | low;
-}
-
-/* Enable global free running counter */
-void z_arc_connect_gfrc_enable(void)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_ENABLE, 0);
-	}
-}
-
-/* Disable global free running counter */
-void z_arc_connect_gfrc_disable(void)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_DISABLE, 0);
-	}
-}
-
-/* Disable global free running counter */
-void z_arc_connect_gfrc_core_set(uint32_t core_mask)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd_data(ARC_CONNECT_CMD_GFRC_SET_CORE,
-			0, core_mask);
-	}
-}
-
-/* Set the relevant cores to halt global free running counter */
-uint32_t z_arc_connect_gfrc_halt_read(void)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_READ_HALT, 0);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/* Read the internal CORE register */
-uint32_t z_arc_connect_gfrc_core_read(void)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_READ_CORE, 0);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/* Enable interrupt distribute unit */
-void z_arc_connect_idu_enable(void)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_ENABLE, 0);
-	}
-}
-
-/* Disable interrupt distribute unit */
-void z_arc_connect_idu_disable(void)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_DISABLE, 0);
-	}
-}
-
-/* Read enable status of interrupt distribute unit */
-uint32_t z_arc_connect_idu_read_enable(void)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_ENABLE, 0);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/*
- * Set the triggering mode and distribution mode for the specified common
- * interrupt
- */
-void z_arc_connect_idu_set_mode(uint32_t irq_num,
-	uint16_t trigger_mode, uint16_t distri_mode)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd_data(ARC_CONNECT_CMD_IDU_SET_MODE,
-			irq_num, (distri_mode | (trigger_mode << 4)));
-	}
-}
-
-/* Read the internal MODE register of the specified common interrupt */
-uint32_t z_arc_connect_idu_read_mode(uint32_t irq_num)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_MODE, irq_num);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/*
- * Set the target cores to receive the specified common interrupt
- * when it is triggered
- */
-void z_arc_connect_idu_set_dest(uint32_t irq_num, uint32_t core_mask)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd_data(ARC_CONNECT_CMD_IDU_SET_DEST,
-			irq_num, core_mask);
-	}
-}
-
-/* Read the internal DEST register of the specified common interrupt */
-uint32_t z_arc_connect_idu_read_dest(uint32_t irq_num)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_DEST, irq_num);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/* Assert the specified common interrupt */
-void z_arc_connect_idu_gen_cirq(uint32_t irq_num)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_GEN_CIRQ, irq_num);
-	}
-}
-
-/* Acknowledge the specified common interrupt */
-void z_arc_connect_idu_ack_cirq(uint32_t irq_num)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_ACK_CIRQ, irq_num);
-	}
-}
-
-/* Read the internal STATUS register of the specified common interrupt */
-uint32_t z_arc_connect_idu_check_status(uint32_t irq_num)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_CHECK_STATUS, irq_num);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/* Read the internal SOURCE register of the specified common interrupt */
-uint32_t z_arc_connect_idu_check_source(uint32_t irq_num)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_CHECK_SOURCE, irq_num);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/* Mask or unmask the specified common interrupt */
-void z_arc_connect_idu_set_mask(uint32_t irq_num, uint32_t mask)
-{
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd_data(ARC_CONNECT_CMD_IDU_SET_MASK,
-			irq_num, mask);
-	}
-}
-
-/* Read the internal MASK register of the specified common interrupt */
-uint32_t z_arc_connect_idu_read_mask(uint32_t irq_num)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_MASK, irq_num);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-}
-
-/*
- * Check if it is the first-acknowledging core to the common interrupt
- * if IDU is programmed in the first-acknowledged mode
- */
-uint32_t z_arc_connect_idu_check_first(uint32_t irq_num)
-{
-	uint32_t ret = 0;
-
-	LOCKED(&arc_connect_spinlock) {
-		z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_CHECK_FIRST, irq_num);
-		ret = z_arc_connect_cmd_readback();
-	}
-
-	return ret;
-
-}

arch/arc/core/arc_smp.c

@@ -1,162 +0,0 @@
-/*
- * Copyright (c) 2019 Synopsys.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/**
- * @file
- * @brief codes required for ARC multicore and Zephyr smp support
- *
- */
-#include <device.h>
-#include <kernel.h>
-#include <kernel_structs.h>
-#include <ksched.h>
-#include <soc.h>
-#include <init.h>
-
-
-#ifndef IRQ_ICI
-#define IRQ_ICI 19
-#endif
-
-#define ARCV2_ICI_IRQ_PRIORITY 1
-
-volatile struct {
-	arch_cpustart_t fn;
-	void *arg;
-} arc_cpu_init[CONFIG_MP_NUM_CPUS];
-
-/*
- * arc_cpu_wake_flag is used to sync up master core and slave cores
- * Slave core will spin for arc_cpu_wake_flag until master core sets
- * it to the core id of slave core. Then, slave core clears it to notify
- * master core that it's waken
- *
- */
-volatile uint32_t arc_cpu_wake_flag;
-
-volatile char *arc_cpu_sp;
-/*
- * _curr_cpu is used to record the struct of _cpu_t of each cpu.
- * for efficient usage in assembly
- */
-volatile _cpu_t *_curr_cpu[CONFIG_MP_NUM_CPUS];
-
-/* Called from Zephyr initialization */
-void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
-		    arch_cpustart_t fn, void *arg)
-{
-	_curr_cpu[cpu_num] = &(_kernel.cpus[cpu_num]);
-	arc_cpu_init[cpu_num].fn = fn;
-	arc_cpu_init[cpu_num].arg = arg;
-
-	/* set the initial sp of target sp through arc_cpu_sp
-	 * arc_cpu_wake_flag will protect arc_cpu_sp that
-	 * only one slave cpu can read it per time
-	 */
-	arc_cpu_sp = Z_THREAD_STACK_BUFFER(stack) + sz;
-
-	arc_cpu_wake_flag = cpu_num;
-
-	/* wait slave cpu to start */
-	while (arc_cpu_wake_flag != 0) {
-		;
-	}
-}
-
-/* the C entry of slave cores */
-void z_arc_slave_start(int cpu_num)
-{
-	arch_cpustart_t fn;
-
-#ifdef CONFIG_SMP
-	z_icache_setup();
-	z_irq_setup();
-
-	z_arc_connect_ici_clear();
-	z_irq_priority_set(IRQ_ICI, ARCV2_ICI_IRQ_PRIORITY, 0);
-	irq_enable(IRQ_ICI);
-#endif
-	/* call the function set by arch_start_cpu */
-	fn = arc_cpu_init[cpu_num].fn;
-
-	fn(arc_cpu_init[cpu_num].arg);
-}
-
-#ifdef CONFIG_SMP
-
-static void sched_ipi_handler(const void *unused)
-{
-	ARG_UNUSED(unused);
-
-	z_arc_connect_ici_clear();
-	z_sched_ipi();
-}
-
-/* arch implementation of sched_ipi */
-void arch_sched_ipi(void)
-{
-	uint32_t i;
-
-	/* broadcast sched_ipi request to other cores
-	 * if the target is current core, hardware will ignore it
-	 */
-	for (i = 0; i < CONFIG_MP_NUM_CPUS; i++) {
-		z_arc_connect_ici_generate(i);
-	}
-}
-
-static int arc_smp_init(const struct device *dev)
-{
-	ARG_UNUSED(dev);
-	struct arc_connect_bcr bcr;
-
-	/* necessary master core init */
-	_curr_cpu[0] = &(_kernel.cpus[0]);
-
-	bcr.val = z_arc_v2_aux_reg_read(_ARC_V2_CONNECT_BCR);
-
-	if (bcr.ipi) {
-	/* register ici interrupt, just need master core to register once */
-		z_arc_connect_ici_clear();
-		IRQ_CONNECT(IRQ_ICI, ARCV2_ICI_IRQ_PRIORITY,
-		    sched_ipi_handler, NULL, 0);
-
-		irq_enable(IRQ_ICI);
-	} else {
-		__ASSERT(0,
-			"ARC connect has no inter-core interrupt\n");
-		return -ENODEV;
-	}
-
-	if (bcr.dbg) {
-	/* configure inter-core debug unit if available */
-		uint32_t core_mask = (1 << CONFIG_MP_NUM_CPUS) - 1;
-		z_arc_connect_debug_select_set(core_mask);
-		/* Debugger halt cores at conditions */
-		z_arc_connect_debug_mask_set(core_mask,	(ARC_CONNECT_CMD_DEBUG_MASK_SH
-			| ARC_CONNECT_CMD_DEBUG_MASK_BH | ARC_CONNECT_CMD_DEBUG_MASK_AH
-			| ARC_CONNECT_CMD_DEBUG_MASK_H));
-
-	}
-
-	if (bcr.gfrc) {
-		/* global free running count init */
-		z_arc_connect_gfrc_enable();
-
-		/* when all cores halt, gfrc halt */
-		z_arc_connect_gfrc_core_set((1 << CONFIG_MP_NUM_CPUS) - 1);
-		z_arc_connect_gfrc_clear();
-	} else {
-		__ASSERT(0,
-			"ARC connect has no global free running counter\n");
-		return -ENODEV;
-	}
-
-	return 0;
-}
-
-SYS_INIT(arc_smp_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
-#endif

arch/arc/core/atomic.S

@@ -0,0 +1,422 @@
+/*
+ * Copyright (c) 2014 Wind River Systems, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief ARC atomic operations library
+ *
+ * This library provides routines to perform a number of atomic operations
+ * on a memory location: add, subtract, increment, decrement, bitwise OR,
+ * bitwise NOR, bitwise AND, bitwise NAND, set, clear and compare-and-swap.
+ *
+ * This requires the processor to support LLOCK and SCOND instructions,
+ * where they are not supported on ARC EM family processors.
+ */
+
+#include <toolchain.h>
+#include <linker/sections.h>
+
+/* exports */
+
+GTEXT(atomic_set)
+GTEXT(atomic_get)
+GTEXT(atomic_add)
+GTEXT(atomic_nand)
+GTEXT(atomic_and)
+GTEXT(atomic_or)
+GTEXT(atomic_xor)
+GTEXT(atomic_clear)
+GTEXT(atomic_dec)
+GTEXT(atomic_inc)
+GTEXT(atomic_sub)
+GTEXT(atomic_cas)
+
+	.section .TEXT._Atomic, "ax"
+	.balign  2
+
+/**
+ *
+ * @brief Atomically clear a memory location
+ *
+ * This routine atomically clears the contents of <target> and returns the old
+ * value that was in <target>.
+ *
+ * This routine can be used from both task and interrupt level.
+ *
+ * @return Contents of <target> before the atomic operation
+ *
+ * ERRNO: N/A
+ *
+ * atomic_val_t atomic_clear
+ *    (
+ *    atomic_t *target	/@ memory location to clear @/
+ *    )
+ */
+
+SECTION_SUBSEC_FUNC(TEXT, atomic_clear_set, atomic_clear)
+	mov_s r1, 0
+	/* fall through into atomic_set */
+
+/**
+ *
+ * @brief Atomically set a memory location
+ *
+ * This routine atomically sets the contents of <target> to <value> and returns
+ * the old value that was in <target>.
+ *
+ * This routine can be used from both task and interrupt level.
+ *
+ * @return Contents of <target> before the atomic operation
+ *
+ * ERRNO: N/A
+ *
+ * atomic_val_t atomic_set
+ *    (
+ *    atomic_t *target,	/@ memory location to set @/
+ *    atomic_val_t value	/@ set with this value @/
+ *    )
+ *
+ */
+
+SECTION_SUBSEC_FUNC(TEXT, atomic_clear_set, atomic_set)
+
+	ex r1, [r0]		/* swap new value with old value */
+
+	j_s.d [blink]
+	mov_s r0, r1		/* return old value */
+
+/**
+ *
+ * @brief Get the value of a shared memory atomically
+ *
+ * This routine atomically retrieves the value in *target
+ *
+ * atomic_val_t atomic_get
+ *     (
+ *     atomic_t *target    /@ address of atom to be retrieved @/
+ *     )
+ *
+ * RETURN: value read from address target.
+ *
+ */
+
+SECTION_FUNC(TEXT, atomic_get)
+	ld_s r0, [r0, 0]
+	j_s [blink]
+
+/**
+ *
+ * @brief Atomically increment a memory location
+ *
+ * This routine atomically increments the value in <target>.  The operation is
+ * done using unsigned integer arithmetic.  Various CPU architectures may impose
+ * restrictions with regards to the alignment and cache attributes of the
+ * atomic_t type.
+ *
+ * This routine can be used from both task and interrupt level.
+ *
+ * @return Contents of <target> before the atomic operation
+ *
+ * ERRNO: N/A
+ *
+ * atomic_val_t atomic_inc
+ *    (
+ *    atomic_t *target,	/@ memory location to increment @/
+ *    )
+ *
+ */
+
+SECTION_SUBSEC_FUNC(TEXT, atomic_inc_add, atomic_inc)
+	mov_s r1, 1
+	/* fall through into atomic_add */
+
+/**
+ *
+ * @brief Atomically add a value to a memory location
+ *
+ * This routine atomically adds the contents of <target> and <value>, placing
+ * the result in <target>. The operation is done using signed integer arithmetic.
+ * Various CPU architectures may impose restrictions with regards to the
+ * alignment and cache attributes of the atomic_t type.
+ *
+ * This routine can be used from both task and interrupt level.
+ *
+ * @return Contents of <target> before the atomic operation
+ *
+ * ERRNO: N/A
+ *
+ * atomic_val_t atomic_add
+ *    (
+ *    atomic_t *target,	/@ memory location to add to @/
+ *    atomic_val_t value	/@ value to add @/
+ *    )
+ */
+
+SECTION_SUBSEC_FUNC(TEXT, atomic_inc_add, atomic_add)
+
+	llock r2, [r0]	/* load old value and mark exclusive access */
+	add_s r3, r1, r2
+	scond r3, [r0]	/* try to store new value */
+
+	/* STATUS32.Z = 1 if successful */
+
+	bne_s atomic_add  /* if store is not successful, retry */
+
+	j_s.d [blink]
+	mov_s r0, r2		/* return old value */
+
+/**
+ *
+ * @brief Atomically decrement a memory location
+ *
+ * This routine atomically decrements the value in <target>.  The operation is
+ * done using unsigned integer arithmetic.  Various CPU architectures may impose
+ * restrictions with regards to the alignment and cache attributes of the
+ * atomic_t type.
+ *
+ * This routine can be used from both task and interrupt level.
+ *
+ * @return Contents of <target> before the atomic operation
+ *
+ * ERRNO: N/A
+ *
+ * atomic_val_t atomic_dec
+ *    (
+ *    atomic_t *target,	/@ memory location to decrement @/
+ *    )
+ *
+ */
+
+SECTION_SUBSEC_FUNC(TEXT, atomic_dec_sub, atomic_dec)
+	mov_s r1, 1
+	/* fall through into atomic_sub */
+
+/**
+ *
+ * @brief Atomically subtract a value from a memory location
+ *
+ * This routine atomically subtracts <value> from the contents of <target>,
+ * placing the result in <target>.  The operation is done using signed integer
+ * arithmetic. Various CPU architectures may impose restrictions with regards to
+ * the alignment and cache attributes of the atomic_t type.
+ *
+ * This routine can be used from both task and interrupt level.
+ *
+ * @return Contents of <target> before the atomic operation
+ *
+ * ERRNO: N/A
+ *
+ * atomic_val_t atomic_sub
+ *    (
+ *    atomic_t *target,	/@ memory location to subtract from @/
+ *    atomic_val_t value	/@ value to subtract @/
+ *    )
+ *
+ */
+
+SECTION_SUBSEC_FUNC(TEXT, atomic_dec_sub, atomic_sub)
+
+	llock r2, [r0]	/* load old value and mark exclusive access */
+	sub r3, r2, r1
+	scond r3, [r0]	/* try to store new value */
+
+	/* STATUS32.Z = 1 if successful */
+
+	bne_s atomic_sub  /* if store is not successful, retry */
+
+	j_s.d [blink]
+	mov_s r0, r2		/* return old value */
+
+/**
+ *
+ * @brief Atomically perform a bitwise NAND on a memory location
+ *
+ * This routine atomically performs a bitwise NAND operation of the contents of
+ * <target> and <value>, placing the result in <target>.
+ * Various CPU architectures may impose restrictions with regards to the
+ * alignment and cache attributes of the atomic_t type.
+ *
+ * This routine can be used from both task and interrupt level.
+ *
+ * @return Contents of <target> before the atomic operation
+ *
+ * ERRNO: N/A
+ *
+ * atomic_val_t atomic_nand
+ *    (
+ *    atomic_t *target,	/@ memory location to NAND @/
+ *    atomic_val_t value	/@ NAND with this value @/
+ *    )
+ *
+ */
+
+SECTION_FUNC(TEXT, atomic_nand)
+
+	llock r2, [r0]	/* load old value and mark exclusive access */
+	and r3, r1, r2
+	not r3, r3
+	scond r3, [r0]	/* try to store new value */
+
+	/* STATUS32.Z = 1 if successful */
+
+	bne_s atomic_nand  /* if store is not successful, retry */
+
+	j_s.d [blink]
+	mov_s r0, r2		/* return old value */
+
+/**
+ *
+ * @brief Atomically perform a bitwise AND on a memory location
+ *
+ * This routine atomically performs a bitwise AND operation of the contents of
+ * <target> and <value>, placing the result in <target>.
+ * Various CPU architectures may impose restrictions with regards to the
+ * alignment and cache attributes of the atomic_t type.
+ *
+ * This routine can be used from both task and interrupt level.
+ *
+ * @return Contents of <target> before the atomic operation
+ *
+ * ERRNO: N/A
+ *
+ * atomic_val_t atomic_and
+ *    (
+ *    atomic_t *target,	/@ memory location to AND @/
+ *    atomic_val_t value	/@ AND with this value @/
+ *    )
+ *
+ */
+
+SECTION_FUNC(TEXT, atomic_and)
+
+	llock r2, [r0]	/* load old value and mark exclusive access */
+	and r3, r1, r2
+	scond r3, [r0]	/* try to store new value */
+
+	/* STATUS32.Z = 1 if successful */
+
+	bne_s atomic_and  /* if store is not successful, retry */
+
+	j_s.d [blink]
+	mov_s r0, r2		/* return old value */
+
+/**
+ *
+ * @brief Atomically perform a bitwise OR on memory location
+ *
+ * This routine atomically performs a bitwise OR operation of the contents of
+ * <target> and <value>, placing the result in <target>.
+ * Various CPU architectures may impose restrictions with regards to the
+ * alignment and cache attributes of the atomic_t type.
+ *
+ * This routine can be used from both task and interrupt level.
+ *
+ * @return Contents of <target> before the atomic operation
+ *
+ * ERRNO: N/A
+ *
+ * atomic_val_t atomic_or
+ *    (
+ *    atomic_t *target,	/@ memory location to OR @/
+ *    atomic_val_t value	/@ OR with this value @/
+ *    )
+ *
+ */
+
+SECTION_FUNC(TEXT, atomic_or)
+
+	llock r2, [r0]	/* load old value and mark exclusive access */
+	or r3, r1, r2
+	scond r3, [r0]	/* try to store new value */
+
+	/* STATUS32.Z = 1 if successful */
+
+	bne_s atomic_or  /* if store is not successful, retry */
+
+	j_s.d [blink]
+	mov_s r0, r2		/* return old value */
+
+/**
+ *
+ * @brief Atomically perform a bitwise XOR on a memory location
+ *
+ * This routine atomically performs a bitwise XOR operation of the contents of
+ * <target> and <value>, placing the result in <target>.
+ * Various CPU architectures may impose restrictions with regards to the
+ * alignment and cache attributes of the atomic_t type.
+ *
+ * This routine can be used from both task and interrupt level.
+ *
+ * @return Contents of <target> before the atomic operation
+ *
+ * ERRNO: N/A
+ *
+ * atomic_val_t atomic_xor
+ *    (
+ *    atomic_t *target,	/@ memory location to XOR @/
+ *    atomic_val_t value	/@ XOR with this value @/
+ *    )
+ *
+ */
+
+SECTION_FUNC(TEXT, atomic_xor)
+
+	llock r2, [r0]	/* load old value and mark exclusive access */
+	xor r3, r1, r2
+	scond r3, [r0]	/* try to store new value */
+
+	/* STATUS32.Z = 1 if successful */
+
+	bne_s atomic_xor  /* if store is not successful, retry */
+
+	j_s.d [blink]
+	mov_s r0, r2		/* return old value */
+
+/**
+ *
+ * @brief Atomically compare-and-swap the contents of a memory location
+ *
+ * This routine performs an atomic compare-and-swap. testing that the contents of
+ * <target> contains <oldValue>, and if it does, setting the value of <target>
+ * to <newValue>. Various CPU architectures may impose restrictions with regards
+ * to the alignment and cache attributes of the atomic_t type.
+ *
+ * This routine can be used from both task and interrupt level.
+ *
+ * @return 1 if the swap is actually executed, 0 otherwise.
+ *
+ * ERRNO: N/A
+ *
+ * int atomic_cas
+ *    (
+ *    atomic_t *target,	    /@ memory location to compare-and-swap @/
+ *    atomic_val_t oldValue,	/@ compare to this value @/
+ *    atomic_val_t newValue,	/@ swap with this value @/
+ *    )
+ *
+ */
+
+SECTION_FUNC(TEXT, atomic_cas)
+
+	llock r3, [r0]	/* load old value and mark exclusive access */
+	cmp_s r1, r3
+
+	bne_s nanoAtomicCas_fail
+
+	scond r2, [r0]	/* try to store new value */
+
+	/* STATUS32.Z = 1 if successful */
+
+	bne_s atomic_cas  /* if store is not successful, retry */
+
+	j_s.d [blink]
+	mov_s r0, 1		/* return TRUE */
+
+	/* failed comparison */
+nanoAtomicCas_fail:
+	scond r1, [r0]	/* write old value to clear the access lock */
+	j_s.d [blink]
+	mov_s r0, 0	/* return FALSE */

arch/arc/core/cache.c

@@ -15,18 +15,26 @@
 
 #include <kernel.h>
 #include <arch/cpu.h>
-#include <sys/util.h>
+#include <misc/util.h>
 #include <toolchain.h>
 #include <cache.h>
 #include <linker/linker-defs.h>
 #include <arch/arc/v2/aux_regs.h>
 #include <kernel_internal.h>
-#include <sys/__assert.h>
+#include <misc/__assert.h>
 #include <init.h>
 #include <stdbool.h>
 
-#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
-size_t sys_cache_line_size;
+#if defined(CONFIG_CACHE_FLUSHING)
+
+#if (CONFIG_CACHE_LINE_SIZE == 0) && !defined(CONFIG_CACHE_LINE_SIZE_DETECT)
+#error Cannot use this implementation with a cache line size of 0
+#endif
+
+#if defined(CONFIG_CACHE_LINE_SIZE_DETECT)
+#define DCACHE_LINE_SIZE sys_cache_line_size
+#else
+#define DCACHE_LINE_SIZE CONFIG_CACHE_LINE_SIZE
 #endif
 
 #define DC_CTRL_DC_ENABLE            0x0  /* enable d-cache */
@@ -49,40 +57,54 @@ static bool dcache_available(void)
 	return (val == 0) ? false : true;
 }
 
-static void dcache_dc_ctrl(uint32_t dcache_en_mask)
+static void dcache_dc_ctrl(u32_t dcache_en_mask)
 {
 	if (dcache_available()) {
 		z_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, dcache_en_mask);
 	}
 }
 
-void arch_dcache_enable(void)
+static void dcache_enable(void)
 {
 	dcache_dc_ctrl(DC_CTRL_DC_ENABLE);
 }
 
-static void arch_dcache_flush(void *start_addr_ptr, size_t size)
+
+/**
+ *
+ * @brief Flush multiple d-cache lines to memory
+ *
+ * No alignment is required for either <start_addr> or <size>, but since
+ * dcache_flush_mlines() iterates on the d-cache lines, a cache line
+ * alignment for both is optimal.
+ *
+ * The d-cache line size is specified either via the CONFIG_CACHE_LINE_SIZE
+ * kconfig option or it is detected at runtime.
+ *
+ * @param start_addr the pointer to start the multi-line flush
+ * @param size the number of bytes that are to be flushed
+ *
+ * @return N/A
+ */
+static void dcache_flush_mlines(u32_t start_addr, u32_t size)
 {
-	size_t line_size = sys_dcache_line_size_get();
-	uintptr_t start_addr = (uintptr_t)start_addr_ptr;
-	uintptr_t end_addr;
+	u32_t end_addr;
 	unsigned int key;
 
-	if (!dcache_available() || (size == 0U) || line_size == 0U) {
+	if (!dcache_available() || (size == 0U)) {
 		return;
 	}
 
-	end_addr = start_addr + size;
+	end_addr = start_addr + size - 1;
+	start_addr &= (u32_t)(~(DCACHE_LINE_SIZE - 1));
 
-	start_addr = ROUND_DOWN(start_addr, line_size);
-
-	key = arch_irq_lock(); /* --enter critical section-- */
+	key = irq_lock(); /* --enter critical section-- */
 
 	do {
 		z_arc_v2_aux_reg_write(_ARC_V2_DC_FLDL, start_addr);
-		__builtin_arc_nop();
-		__builtin_arc_nop();
-		__builtin_arc_nop();
+		__asm__ volatile("nop_s");
+		__asm__ volatile("nop_s");
+		__asm__ volatile("nop_s");
 		/* wait for flush completion */
 		do {
 			if ((z_arc_v2_aux_reg_read(_ARC_V2_DC_CTRL) &
@@ -90,59 +112,42 @@ static void arch_dcache_flush(void *start_addr_ptr, size_t size)
 				break;
 			}
 		} while (1);
-		start_addr += line_size;
-	} while (start_addr < end_addr);
+		start_addr += DCACHE_LINE_SIZE;
+	} while (start_addr <= end_addr);
 
-	arch_irq_unlock(key); /* --exit critical section-- */
+	irq_unlock(key); /* --exit critical section-- */
 
 }
 
-static void arch_dcache_invd(void *start_addr_ptr, size_t size)
+
+/**
+ *
+ * @brief Flush d-cache lines to main memory
+ *
+ * No alignment is required for either <virt> or <size>, but since
+ * sys_cache_flush() iterates on the d-cache lines, a d-cache line alignment for
+ * both is optimal.
+ *
+ * The d-cache line size is specified either via the CONFIG_CACHE_LINE_SIZE
+ * kconfig option or it is detected at runtime.
+ *
+ * @param start_addr the pointer to start the multi-line flush
+ * @param size the number of bytes that are to be flushed
+ *
+ * @return N/A
+ */
+
+void sys_cache_flush(vaddr_t start_addr, size_t size)
 {
-	size_t line_size = sys_dcache_line_size_get();
-	uintptr_t start_addr = (uintptr_t)start_addr_ptr;
-	uintptr_t end_addr;
-	unsigned int key;
-
-	if (!dcache_available() || (size == 0U) || line_size == 0U) {
-		return;
-	}
-	end_addr = start_addr + size;
-	start_addr = ROUND_DOWN(start_addr, line_size);
-
-	key = arch_irq_lock(); /* -enter critical section- */
-
-	do {
-		z_arc_v2_aux_reg_write(_ARC_V2_DC_IVDL, start_addr);
-		__builtin_arc_nop();
-		__builtin_arc_nop();
-		__builtin_arc_nop();
-		start_addr += line_size;
-	} while (start_addr < end_addr);
-	irq_unlock(key); /* -exit critical section- */
+	dcache_flush_mlines((u32_t)start_addr, (u32_t)size);
 }
 
-int arch_dcache_range(void *addr, size_t size, int op)
-{
-	if (op == K_CACHE_INVD) {
-		/*
-		 * TODO: On invalidate we can contextually flush by setting the
-		 * DC_CTRL_INVALID_FLUSH bit
-		 */
-		arch_dcache_invd(addr, size);
-	} else if (op == K_CACHE_WB) {
-		arch_dcache_flush(addr, size);
-	} else {
-		return -ENOTSUP;
-	}
 
-	return 0;
-}
-
-#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
+#if defined(CONFIG_CACHE_LINE_SIZE_DETECT)
+size_t sys_cache_line_size;
 static void init_dcache_line_size(void)
 {
-	uint32_t val;
+	u32_t val;
 
 	val = z_arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
 	__ASSERT((val&0xff) != 0U, "d-cache is not present");
@@ -150,20 +155,15 @@ static void init_dcache_line_size(void)
 	val *= 16U;
 	sys_cache_line_size = (size_t) val;
 }
-
-size_t arch_dcache_line_size_get(void)
-{
-	return sys_cache_line_size;
-}
 #endif
 
-static int init_dcache(const struct device *unused)
+static int init_dcache(struct device *unused)
 {
 	ARG_UNUSED(unused);
 
-	arch_dcache_enable();
+	dcache_enable();
 
-#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
+#if defined(CONFIG_CACHE_LINE_SIZE_DETECT)
 	init_dcache_line_size();
 #endif
 
@@ -171,3 +171,6 @@ static int init_dcache(const struct device *unused)
 }
 
 SYS_INIT(init_dcache, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
+
+#endif /* CONFIG_CACHE_FLUSHING */
+

arch/arc/core/cpu_idle.S

@@ -17,12 +17,12 @@
 #include <linker/sections.h>
 #include <arch/cpu.h>
 
-GTEXT(arch_cpu_idle)
-GTEXT(arch_cpu_atomic_idle)
-GDATA(z_arc_cpu_sleep_mode)
+GTEXT(k_cpu_idle)
+GTEXT(k_cpu_atomic_idle)
+GDATA(k_cpu_sleep_mode)
 
-SECTION_VAR(BSS, z_arc_cpu_sleep_mode)
-	.align 4
+SECTION_VAR(BSS, k_cpu_sleep_mode)
+	.balign 4
 	.word 0
 
 /*
@@ -33,15 +33,15 @@ SECTION_VAR(BSS, z_arc_cpu_sleep_mode)
  * void nanCpuIdle(void)
  */
 
-SECTION_FUNC(TEXT, arch_cpu_idle)
+SECTION_FUNC(TEXT, k_cpu_idle)
 
 #ifdef CONFIG_TRACING
 	push_s blink
-	jl    sys_trace_idle
+	jl    z_sys_trace_idle
 	pop_s blink
 #endif
 
-	ld r1, [z_arc_cpu_sleep_mode]
+	ld r1, [k_cpu_sleep_mode]
 	or r1, r1, (1 << 4) /* set IRQ-enabled bit */
 	sleep r1
 	j_s [blink]
@@ -52,17 +52,17 @@ SECTION_FUNC(TEXT, arch_cpu_idle)
  *
  * This function exits with interrupts restored to <key>.
  *
- * void arch_cpu_atomic_idle(unsigned int key)
+ * void k_cpu_atomic_idle(unsigned int key)
  */
-SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
+SECTION_FUNC(TEXT, k_cpu_atomic_idle)
 
 #ifdef CONFIG_TRACING
 	push_s blink
-	jl    sys_trace_idle
+	jl    z_sys_trace_idle
 	pop_s blink
 #endif
 
-	ld r1, [z_arc_cpu_sleep_mode]
+	ld r1, [k_cpu_sleep_mode]
 	or r1, r1, (1 << 4) /* set IRQ-enabled bit */
 	sleep r1
 	j_s.d [blink]

arch/arc/core/fast_irq.S

@@ -16,13 +16,19 @@
 #include <kernel_structs.h>
 #include <offsets_short.h>
 #include <toolchain.h>
-#include <linker/sections.h>
 #include <arch/cpu.h>
 #include <swap_macros.h>
 
 GTEXT(_firq_enter)
 GTEXT(_firq_exit)
 
+GDATA(exc_nest_count)
+#if CONFIG_RGF_NUM_BANKS == 1
+GDATA(saved_r0)
+#else
+GDATA(saved_sp)
+#endif
+
 /**
  *
  * @brief Work to be done before handing control to a FIRQ ISR
@@ -54,10 +60,12 @@ SECTION_FUNC(TEXT, _firq_enter)
  * This has already been done by _isr_wrapper.
  */
 #ifdef CONFIG_ARC_STACK_CHECKING
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
+#ifdef CONFIG_ARC_HAS_SECURE
 	lr r2, [_ARC_V2_SEC_STAT]
 	bclr r2, r2, _ARC_V2_SEC_STAT_SSC_BIT
-	sflag r2
+	/* sflag r2 */
+	/* sflag instruction is not supported in current ARC GNU */
+	.long 0x00bf302f
 #else
 	/* disable stack checking */
 	lr r2, [_ARC_V2_STATUS32]
@@ -77,56 +85,38 @@ SECTION_FUNC(TEXT, _firq_enter)
 	lr r25, [_ARC_V2_LP_END]
 #endif
 
-	/* check whether irq stack is used */
-	_check_and_inc_int_nest_counter r0, r1
+	ld r1, [exc_nest_count]
+	add r0, r1, 1
+	st r0, [exc_nest_count]
+	cmp r1, 0
 
-	bne.d firq_nest
-	mov_s r0, sp
+	bgt.d  firq_nest
+	mov r0, sp
 
-	_get_curr_cpu_irq_stack sp
+	mov r1, _kernel
+	ld sp, [r1, _kernel_offset_to_irq_stack]
 #if CONFIG_RGF_NUM_BANKS != 1
 	b firq_nest_1
 firq_nest:
-	/*
-	 * because firq and rirq share the same interrupt stack,
-	 * switch back to original register bank to get correct sp.
-	 * to get better firq latency, an approach is to prepare
-	 * separate interrupt stack for firq and do not do thread
-	 * switch in firq.
-	 */
-	lr r1, [_ARC_V2_STATUS32]
-	and r1, r1, ~_ARC_V2_STATUS32_RB(7)
-	kflag r1
+	mov r1, ilink
+	lr r0, [_ARC_V2_STATUS32]
+	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
+	kflag r0
 
-	/* here use _ARC_V2_USER_SP and ilink to exchange sp
-	 * save original value of _ARC_V2_USER_SP and ilink into
-	 * the stack of interrupted context first, then restore them later
-	 */
-	push ilink
-	PUSHAX ilink, _ARC_V2_USER_SP
+	st sp, [saved_sp]
 
-	/* sp here is the sp of interrupted context */
-	sr sp, [_ARC_V2_USER_SP]
-	/* here, bank 0 sp must go back to the value before push and
-	 * PUSHAX as we will switch to bank1, the pop and POPAX later will
-	 * change bank1's sp, not bank0's sp
-	 */
-	add sp, sp, 8
-
-	/* switch back to banked reg, only ilink can be used */
 	lr ilink, [_ARC_V2_STATUS32]
 	or ilink, ilink, _ARC_V2_STATUS32_RB(1)
 	kflag ilink
-	lr sp, [_ARC_V2_USER_SP]
-
-	POPAX ilink, _ARC_V2_USER_SP
-	pop ilink
+	mov r0, sp
+	ld sp, [saved_sp]
+	mov ilink, r1
 firq_nest_1:
 #else
 firq_nest:
 #endif
 	push_s r0
-	j _isr_demux
+	j @_isr_demux
 
 
 
@@ -145,86 +135,98 @@ SECTION_FUNC(TEXT, _firq_exit)
 	sr r24, [_ARC_V2_LP_START]
 	sr r25, [_ARC_V2_LP_END]
 #endif
-	_dec_int_nest_counter r0, r1
+	/* check if we're a nested interrupt: if so, let the interrupted
+	 * interrupt handle the reschedule */
+	mov	r1, exc_nest_count
+	ld	r0, [r1]
+	sub	r0, r0, 1
+	st	r0, [r1]
+/* see comments in _rirq_exit */
+	lr 	r0, [_ARC_V2_AUX_IRQ_ACT]
+	and 	r0, r0, 0xffff
+	ffs	r1, r0
+	fls	r2, r0
+	cmp 	r1, r2
+	jne	_firq_no_reschedule
 
-	_check_nest_int_by_irq_act r0, r1
+#ifdef CONFIG_STACK_SENTINEL
+	bl z_check_stack_sentinel
+#endif
 
-	jne _firq_no_switch
+#ifdef CONFIG_PREEMPT_ENABLED
 
-	/* sp is struct k_thread **old of z_arc_switch_in_isr
-	 * which is a wrapper of z_get_next_switch_handle.
-	 * r0 contains the 1st thread in ready queue. if
-	 * it equals _current(r2) ,then do swap, or no swap.
-	 */
-	_get_next_switch_handle
+	mov_s r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
 
-	cmp r0, r2
-	bne _firq_switch
+	/* Check if the current thread (in r2) is the cached thread */
+	ld_s r0, [r1, _kernel_offset_to_ready_q_cache]
+	brne r0, r2, _firq_reschedule
 
-	/* fall to no switch */
+	/* fall to no rescheduling */
 
-.align 4
-_firq_no_switch:
-	/* restore interrupted context' sp */
+#endif /* CONFIG_PREEMPT_ENABLED */
+
+.balign 4
+_firq_no_reschedule:
 	pop sp
+
 	/*
 	 * Keeping this code block close to those that use it allows using brxx
 	 * instruction instead of a pair of cmp and bxx
 	 */
 #if CONFIG_RGF_NUM_BANKS == 1
-	_pop_irq_stack_frame
+	add sp,sp,4 /* don't need r0 from stack */
+	pop_s r1
+	pop_s r2
+	pop_s r3
+	pop r4
+	pop r5
+	pop r6
+	pop r7
+	pop r8
+	pop r9
+	pop r10
+	pop r11
+	pop_s r12
+	pop_s r13
+	pop_s blink
+	pop_s r0
+	sr r0, [_ARC_V2_LP_END]
+	pop_s r0
+	sr r0, [_ARC_V2_LP_START]
+	pop_s r0
+	mov lp_count,r0
+#ifdef CONFIG_CODE_DENSITY
+	pop_s r0
+	sr r0, [_ARC_V2_EI_BASE]
+	pop_s r0
+	sr r0, [_ARC_V2_LDI_BASE]
+	pop_s r0
+	sr r0, [_ARC_V2_JLI_BASE]
+#endif
+	ld r0,[saved_r0]
+	add sp,sp,8 /* don't need ilink & status32_po from stack */
 #endif
 	rtie
 
-.align 4
-_firq_switch:
-	/* restore interrupted context' sp */
+#ifdef CONFIG_PREEMPT_ENABLED
+
+.balign 4
+_firq_reschedule:
 	pop sp
 
 #if CONFIG_RGF_NUM_BANKS != 1
-/*
- * save r0, r2 in irq stack for a while, as they will be changed by register
- * bank switch
- */
-	_get_curr_cpu_irq_stack r1
-	st r0, [r1, -4]
-	st r2, [r1, -8]
-
 	/*
 	 * We know there is no interrupted interrupt of lower priority at this
 	 * point, so when switching back to register bank 0, it will contain the
 	 * registers from the interrupted thread.
 	 */
-#if defined(CONFIG_USERSPACE)
-/* when USERSPACE is configured, here need to consider the case where firq comes
- * out in user mode, according to ARCv2 ISA and nsim, the following micro ops
- * will be executed:
- *	sp<-reg bank1'sp
- *      switch between sp and _ARC_V2_USER_SP
- * then:
- *      sp is the sp of kernel stack of interrupted thread
- *      _ARC_V2_USER_SP is reg bank1'sp
- *      the sp of user stack of interrupted thread is reg bank0'sp
- * if firq comes out in kernel mode, the following micro ops will be executed:
- *      sp<-reg bank'sp
- * so, sw needs to do necessary handling to set up the correct sp
- */
-	lr r0, [_ARC_V2_AUX_IRQ_ACT]
-	bbit0 r0, 31, _firq_from_kernel
-	aex sp, [_ARC_V2_USER_SP]
-	lr r0, [_ARC_V2_STATUS32]
-	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
-	kflag r0
-	aex sp, [_ARC_V2_USER_SP]
-	b _firq_create_irq_stack_frame
-_firq_from_kernel:
-#endif
+
 	/* chose register bank #0 */
 	lr r0, [_ARC_V2_STATUS32]
 	and r0, r0, ~_ARC_V2_STATUS32_RB(7)
 	kflag r0
 
-_firq_create_irq_stack_frame:
 	/* we're back on the outgoing thread's stack */
 	_create_irq_stack_frame
 
@@ -237,56 +239,79 @@ _firq_create_irq_stack_frame:
 	st_s r0, [sp, ___isf_t_status32_OFFSET]
 
 	st ilink, [sp, ___isf_t_pc_OFFSET] /* ilink into pc */
-/*
- * load r0, r2 from irq stack
- */
-	_get_curr_cpu_irq_stack r1
-	ld r0, [r1, -4]
-	ld r2, [r1, -8]
 #endif
-	/* r2 is old thread */
-	_irq_store_old_thread_callee_regs
+
+	mov_s r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
+
+	_save_callee_saved_regs
 
 	st _CAUSE_FIRQ, [r2, _thread_offset_to_relinquish_cause]
 
-	/* mov new thread (r0) to r2 */
+	ld_s r2, [r1, _kernel_offset_to_ready_q_cache]
+	st_s r2, [r1, _kernel_offset_to_current]
 
-	mov r2, r0
-	_load_new_thread_callee_regs
+#ifdef CONFIG_ARC_STACK_CHECKING
+	_load_stack_check_regs
+#endif
+	/*
+	 * _load_callee_saved_regs expects incoming thread in r2.
+	 * _load_callee_saved_regs restores the stack pointer.
+	 */
+	_load_callee_saved_regs
 
-	breq r3, _CAUSE_RIRQ, _firq_switch_from_rirq
-	nop_s
-	breq r3, _CAUSE_FIRQ, _firq_switch_from_firq
-	nop_s
+#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
+	push_s r2
+	mov r0, r2
+	bl configure_mpu_thread
+	pop_s r2
+#endif
+
+#if defined(CONFIG_USERSPACE)
+/*
+ * see comments in regular_irq.S
+ */
+	lr r0, [_ARC_V2_AUX_IRQ_ACT]
+	bclr r0, r0, 31
+	sr r0, [_ARC_V2_AUX_IRQ_ACT]
+#endif
+	ld r3, [r2, _thread_offset_to_relinquish_cause]
+
+	breq r3, _CAUSE_RIRQ, _firq_return_from_rirq
+	nop
+	breq r3, _CAUSE_FIRQ, _firq_return_from_firq
+	nop
 
 	/* fall through */
 
-.align 4
-_firq_switch_from_coop:
+.balign 4
+_firq_return_from_coop:
 
-	_set_misc_regs_irq_switch_from_coop
+	ld r3, [r2, _thread_offset_to_intlock_key]
+	st  0, [r2, _thread_offset_to_intlock_key]
 
 	/* pc into ilink */
 	pop_s r0
 	mov ilink, r0
 
 	pop_s r0 /* status32 into r0 */
+	/*
+	 * There are only two interrupt lock states: locked and unlocked. When
+	 * entering z_swap(), they are always locked, so the IE bit is unset in
+	 * status32. If the incoming thread had them locked recursively, it
+	 * means that the IE bit should stay unset. The only time the bit
+	 * has to change is if they were not locked recursively.
+	 */
+	and.f r3, r3, (1 << 4)
+	or.nz r0, r0, _ARC_V2_STATUS32_IE
 	sr r0, [_ARC_V2_STATUS32_P0]
 
-#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
-	push_s blink
-
-	bl z_thread_mark_switched_in
-
-	pop_s blink
-#endif
+	ld r0, [r2, _thread_offset_to_return_value]
 	rtie
 
-.align 4
-_firq_switch_from_rirq:
-_firq_switch_from_firq:
-
-	_set_misc_regs_irq_switch_from_irq
+.balign 4
+_firq_return_from_rirq:
+_firq_return_from_firq:
 
 	_pop_irq_stack_frame
 
@@ -294,12 +319,7 @@ _firq_switch_from_firq:
 	sr ilink, [_ARC_V2_STATUS32_P0]
 	ld ilink, [sp, -8] /* pc into ilink */
 
-#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
-	push_s blink
-
-	bl z_thread_mark_switched_in
-
-	pop_s blink
-#endif
 	/* LP registers are already restored, just switch back to bank 0 */
 	rtie
+
+#endif /* CONFIG_PREEMPT_ENABLED */

arch/arc/core/fatal.c

@@ -12,57 +12,81 @@
  * ARCv2 CPUs.
  */
 
-#include <kernel.h>
+#include <kernel_structs.h>
 #include <offsets_short.h>
+#include <toolchain.h>
 #include <arch/cpu.h>
-#include <logging/log.h>
-#include <kernel_arch_data.h>
-#include <arch/arc/v2/exc.h>
+#include <misc/printk.h>
+#include <logging/log_ctrl.h>
 
-LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
-
-#ifdef CONFIG_ARC_EXCEPTION_DEBUG
-static void dump_arc_esf(const z_arch_esf_t *esf)
+/**
+ *
+ * @brief Kernel fatal error handler
+ *
+ * This routine is called when fatal error conditions are detected by software
+ * and is responsible only for reporting the error. Once reported, it then
+ * invokes the user provided routine z_SysFatalErrorHandler() which is
+ * responsible for implementing the error handling policy.
+ *
+ * The caller is expected to always provide a usable ESF. In the event that the
+ * fatal error does not have a hardware generated ESF, the caller should either
+ * create its own or use a pointer to the global default ESF <_default_esf>.
+ *
+ * @return This function does not return.
+ */
+void z_NanoFatalErrorHandler(unsigned int reason, const NANO_ESF *pEsf)
 {
-	LOG_ERR(" r0: 0x%08x  r1: 0x%08x  r2: 0x%08x  r3: 0x%08x",
-		esf->r0, esf->r1, esf->r2, esf->r3);
-	LOG_ERR(" r4: 0x%08x  r5: 0x%08x  r6: 0x%08x  r7: 0x%08x",
-		esf->r4, esf->r5, esf->r6, esf->r7);
-	LOG_ERR(" r8: 0x%08x  r9: 0x%08x r10: 0x%08x r11: 0x%08x",
-		esf->r8, esf->r9, esf->r10, esf->r11);
-	LOG_ERR("r12: 0x%08x r13: 0x%08x  pc: 0x%08x",
-		esf->r12, esf->r13, esf->pc);
-	LOG_ERR(" blink: 0x%08x status32: 0x%08x", esf->blink, esf->status32);
-	LOG_ERR("lp_end: 0x%08x lp_start: 0x%08x lp_count: 0x%08x",
-		esf->lp_end, esf->lp_start, esf->lp_count);
-}
+	LOG_PANIC();
+
+	switch (reason) {
+	case _NANO_ERR_HW_EXCEPTION:
+		break;
+
+#if defined(CONFIG_STACK_CANARIES) || defined(CONFIG_ARC_STACK_CHECKING) \
+	|| defined(CONFIG_STACK_SENTINEL) || defined(CONFIG_MPU_STACK_GUARD)
+	case _NANO_ERR_STACK_CHK_FAIL:
+		printk("***** Stack Check Fail! *****\n");
+		break;
 #endif
 
-void z_arc_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
-{
-#ifdef CONFIG_ARC_EXCEPTION_DEBUG
-	if (esf != NULL) {
-		dump_arc_esf(esf);
+	case _NANO_ERR_ALLOCATION_FAIL:
+		printk("**** Kernel Allocation Failure! ****\n");
+		break;
+
+	case _NANO_ERR_KERNEL_OOPS:
+		printk("***** Kernel OOPS! *****\n");
+		break;
+
+	case _NANO_ERR_KERNEL_PANIC:
+		printk("***** Kernel Panic! *****\n");
+		break;
+
+	default:
+		printk("**** Unknown Fatal Error %d! ****\n", reason);
+		break;
 	}
-#endif /* CONFIG_ARC_EXCEPTION_DEBUG */
 
-	z_fatal_error(reason, esf);
+	printk("Current thread ID = %p\n",  k_current_get());
+
+	if (reason == _NANO_ERR_HW_EXCEPTION) {
+		printk("Faulting instruction address = 0x%lx\n",
+		z_arc_v2_aux_reg_read(_ARC_V2_ERET));
+	}
+
+	/*
+	 * Now that the error has been reported, call the user implemented
+	 * policy
+	 * to respond to the error.  The decisions as to what responses are
+	 * appropriate to the various errors are something the customer must
+	 * decide.
+	 */
+
+	z_SysFatalErrorHandler(reason, pEsf);
 }
 
-FUNC_NORETURN void arch_syscall_oops(void *ssf_ptr)
+FUNC_NORETURN void z_arch_syscall_oops(void *ssf_ptr)
 {
-	/* TODO: convert ssf_ptr contents into an esf, they are not the same */
-	ARG_UNUSED(ssf_ptr);
-
-	z_arc_fatal_error(K_ERR_KERNEL_OOPS, NULL);
-	CODE_UNREACHABLE;
-}
-
-FUNC_NORETURN void arch_system_halt(unsigned int reason)
-{
-	ARG_UNUSED(reason);
-
-	__asm__("brk");
-
+	LOG_PANIC();
+	z_SysFatalErrorHandler(_NANO_ERR_KERNEL_OOPS, ssf_ptr);
 	CODE_UNREACHABLE;
 }

arch/arc/core/fault.c

@@ -16,398 +16,174 @@
 #include <inttypes.h>
 
 #include <kernel.h>
-#include <kernel_internal.h>
 #include <kernel_structs.h>
+#include <misc/printk.h>
 #include <exc_handle.h>
-#include <logging/log.h>
-LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
+#include <logging/log_ctrl.h>
+
+u32_t arc_exc_saved_sp;
 
 #ifdef CONFIG_USERSPACE
-Z_EXC_DECLARE(z_arc_user_string_nlen);
+Z_EXC_DECLARE(z_arch_user_string_nlen);
 
 static const struct z_exc_handle exceptions[] = {
-	Z_EXC_HANDLE(z_arc_user_string_nlen)
+	Z_EXC_HANDLE(z_arch_user_string_nlen)
 };
 #endif
 
 #if defined(CONFIG_MPU_STACK_GUARD)
+
+#define IS_MPU_GUARD_VIOLATION(guard_start, fault_addr, stack_ptr) \
+	((fault_addr >= guard_start) && \
+	(fault_addr < (guard_start + STACK_GUARD_SIZE)) && \
+	(stack_ptr <= (guard_start + STACK_GUARD_SIZE)))
+
 /**
  * @brief Assess occurrence of current thread's stack corruption
  *
- * This function performs an assessment whether a memory fault (on a given
- * memory address) is the result of a stack overflow of the current thread.
+ * This function performs an assessment whether a memory fault (on a
+ * given memory address) is the result of stack memory corruption of
+ * the current thread.
  *
- * When called, we know at this point that we received an ARC
- * protection violation, with any cause code, with the protection access
- * error either "MPU" or "Secure MPU". In other words, an MPU fault of
- * some kind. Need to determine whether this is a general MPU access
- * exception or the specific case of a stack overflow.
+ * Thread stack corruption for supervisor threads or user threads in
+ * privilege mode (when User Space is supported) is reported upon an
+ * attempt to access the stack guard area (if MPU Stack Guard feature
+ * is supported). Additionally the current thread stack pointer
+ * must be pointing inside or below the guard area.
+ *
+ * Thread stack corruption for user threads in user mode is reported,
+ * if the current stack pointer is pointing below the start of the current
+ * thread's stack.
+ *
+ * Notes:
+ * - we assume a fully descending stack,
+ * - we assume a stacking error has occurred,
+ * - the function shall be called when handling MPU privilege violation
+ *
+ * If stack corruption is detected, the function returns the lowest
+ * allowed address where the Stack Pointer can safely point to, to
+ * prevent from errors when un-stacking the corrupted stack frame
+ * upon exception return.
  *
  * @param fault_addr memory address on which memory access violation
  *                   has been reported.
  * @param sp stack pointer when exception comes out
- * @retval True if this appears to be a stack overflow
- * @retval False if this does not appear to be a stack overflow
+ *
+ * @return The lowest allowed stack frame pointer, if error is a
+ *         thread stack corruption, otherwise return 0.
  */
-static bool z_check_thread_stack_fail(const uint32_t fault_addr, uint32_t sp)
+static u32_t z_check_thread_stack_fail(const u32_t fault_addr, u32_t sp)
 {
 	const struct k_thread *thread = _current;
-	uint32_t guard_end, guard_start;
 
 	if (!thread) {
-		/* TODO: Under what circumstances could we get here ? */
-		return false;
+		return 0;
 	}
-
-#ifdef CONFIG_USERSPACE
-	if ((thread->base.user_options & K_USER) != 0) {
-		if ((z_arc_v2_aux_reg_read(_ARC_V2_ERSTATUS) &
-		     _ARC_V2_STATUS32_U) != 0) {
-			/* Normal user mode context. There is no specific
-			 * "guard" installed in this case, instead what's
-			 * happening is that the stack pointer is crashing
-			 * into the privilege mode stack buffer which
-			 * immediately precededs it.
-			 */
-			guard_end = thread->stack_info.start;
-			guard_start = (uint32_t)thread->stack_obj;
-		} else {
-			/* Special case: handling a syscall on privilege stack.
-			 * There is guard memory reserved immediately before
-			 * it.
-			 */
-			guard_end = thread->arch.priv_stack_start;
-			guard_start = guard_end - Z_ARC_STACK_GUARD_SIZE;
-		}
-	} else
-#endif /* CONFIG_USERSPACE */
-	{
-		/* Supervisor thread */
-		guard_end = thread->stack_info.start;
-		guard_start = guard_end - Z_ARC_STACK_GUARD_SIZE;
-	}
-
-	 /* treat any MPU exceptions within the guard region as a stack
-	  * overflow.As some instrustions
-	  * (like enter_s {r13-r26, fp, blink}) push a collection of
-	  * registers on to the stack. In this situation, the fault_addr
-	  * will less than guard_end, but sp will greater than guard_end.
-	  */
-	if (fault_addr < guard_end && fault_addr >= guard_start) {
-		return true;
-	}
-
-	return false;
-}
+#if defined(CONFIG_USERSPACE)
+	if (thread->arch.priv_stack_start) {
+		/* User thread */
+		if (z_arc_v2_aux_reg_read(_ARC_V2_ERSTATUS)
+			& _ARC_V2_STATUS32_U) {
+			/* Thread's user stack corruption */
+#ifdef CONFIG_ARC_HAS_SECURE
+			sp = z_arc_v2_aux_reg_read(_ARC_V2_SEC_U_SP);
+#else
+			sp = z_arc_v2_aux_reg_read(_ARC_V2_USER_SP);
 #endif
-
-#ifdef CONFIG_ARC_EXCEPTION_DEBUG
-/* For EV_ProtV, the numbering/semantics of the parameter are consistent across
- * several codes, although not all combination will be reported.
- *
- * These codes and parameters do not have associated* names in
- * the technical manual, just switch on the values in Table 6-5
- */
-static const char *get_protv_access_err(uint32_t parameter)
-{
-	switch (parameter) {
-	case 0x1:
-		return "code protection scheme";
-	case 0x2:
-		return "stack checking scheme";
-	case 0x4:
-		return "MPU";
-	case 0x8:
-		return "MMU";
-	case 0x10:
-		return "NVM";
-	case 0x24:
-		return "Secure MPU";
-	case 0x44:
-		return "Secure MPU with SID mismatch";
-	default:
-		return "unknown";
-	}
-}
-
-static void dump_protv_exception(uint32_t cause, uint32_t parameter)
-{
-	switch (cause) {
-	case 0x0:
-		LOG_ERR("Instruction fetch violation (%s)",
-			get_protv_access_err(parameter));
-		break;
-	case 0x1:
-		LOG_ERR("Memory read protection violation (%s)",
-			get_protv_access_err(parameter));
-		break;
-	case 0x2:
-		LOG_ERR("Memory write protection violation (%s)",
-			get_protv_access_err(parameter));
-		break;
-	case 0x3:
-		LOG_ERR("Memory read-modify-write violation (%s)",
-			get_protv_access_err(parameter));
-		break;
-	case 0x10:
-		LOG_ERR("Normal vector table in secure memory");
-		break;
-	case 0x11:
-		LOG_ERR("NS handler code located in S memory");
-		break;
-	case 0x12:
-		LOG_ERR("NSC Table Range Violation");
-		break;
-	default:
-		LOG_ERR("unknown");
-		break;
-	}
-}
-
-static void dump_machine_check_exception(uint32_t cause, uint32_t parameter)
-{
-	switch (cause) {
-	case 0x0:
-		LOG_ERR("double fault");
-		break;
-	case 0x1:
-		LOG_ERR("overlapping TLB entries");
-		break;
-	case 0x2:
-		LOG_ERR("fatal TLB error");
-		break;
-	case 0x3:
-		LOG_ERR("fatal cache error");
-		break;
-	case 0x4:
-		LOG_ERR("internal memory error on instruction fetch");
-		break;
-	case 0x5:
-		LOG_ERR("internal memory error on data fetch");
-		break;
-	case 0x6:
-		LOG_ERR("illegal overlapping MPU entries");
-		if (parameter == 0x1) {
-			LOG_ERR(" - jump and branch target");
+			if (sp <= (u32_t)thread->stack_obj) {
+				return (u32_t)thread->stack_obj;
+			}
+		} else {
+			/* User thread in privilege mode */
+			if (IS_MPU_GUARD_VIOLATION(
+			thread->arch.priv_stack_start - STACK_GUARD_SIZE,
+			fault_addr, sp)) {
+				/* Thread's privilege stack corruption */
+				return thread->arch.priv_stack_start;
+			}
 		}
-		break;
-	case 0x10:
-		LOG_ERR("secure vector table not located in secure memory");
-		break;
-	case 0x11:
-		LOG_ERR("NSC jump table not located in secure memory");
-		break;
-	case 0x12:
-		LOG_ERR("secure handler code not located in secure memory");
-		break;
-	case 0x13:
-		LOG_ERR("NSC target address not located in secure memory");
-		break;
-	case 0x80:
-		LOG_ERR("uncorrectable ECC or parity error in vector memory");
-		break;
-	default:
-		LOG_ERR("unknown");
-		break;
-	}
-}
-
-static void dump_privilege_exception(uint32_t cause, uint32_t parameter)
-{
-	switch (cause) {
-	case 0x0:
-		LOG_ERR("Privilege violation");
-		break;
-	case 0x1:
-		LOG_ERR("disabled extension");
-		break;
-	case 0x2:
-		LOG_ERR("action point hit");
-		break;
-	case 0x10:
-		switch (parameter) {
-		case 0x1:
-			LOG_ERR("N to S return using incorrect return mechanism");
-			break;
-		case 0x2:
-			LOG_ERR("N to S return with incorrect operating mode");
-			break;
-		case 0x3:
-			LOG_ERR("IRQ/exception return fetch from wrong mode");
-			break;
-		case 0x4:
-			LOG_ERR("attempt to halt secure processor in NS mode");
-			break;
-		case 0x20:
-			LOG_ERR("attempt to access secure resource from normal mode");
-			break;
-		case 0x40:
-			LOG_ERR("SID violation on resource access (APEX/UAUX/key NVM)");
-			break;
-		default:
-			LOG_ERR("unknown");
-			break;
+	} else {
+		/* Supervisor thread */
+		if (IS_MPU_GUARD_VIOLATION((u32_t)thread->stack_obj,
+			fault_addr, sp)) {
+			/* Supervisor thread stack corruption */
+			return (u32_t)thread->stack_obj + STACK_GUARD_SIZE;
 		}
-		break;
-	case 0x13:
-		switch (parameter) {
-		case 0x20:
-			LOG_ERR("attempt to access secure APEX feature from NS mode");
-			break;
-		case 0x40:
-			LOG_ERR("SID violation on access to APEX feature");
-			break;
-		default:
-			LOG_ERR("unknown");
-			break;
-		}
-		break;
-	default:
-		LOG_ERR("unknown");
-		break;
 	}
+#else /* CONFIG_USERSPACE */
+	if (IS_MPU_GUARD_VIOLATION(thread->stack_info.start,
+			fault_addr, sp)) {
+		/* Thread stack corruption */
+		return thread->stack_info.start + STACK_GUARD_SIZE;
+	}
+#endif /* CONFIG_USERSPACE */
+
+	return 0;
 }
 
-static void dump_exception_info(uint32_t vector, uint32_t cause, uint32_t parameter)
-{
-	if (vector >= 0x10 && vector <= 0xFF) {
-		LOG_ERR("interrupt %u", vector);
-		return;
-	}
-
-	/* Names are exactly as they appear in Designware ARCv2 ISA
-	 * Programmer's reference manual for easy searching
-	 */
-	switch (vector) {
-	case ARC_EV_RESET:
-		LOG_ERR("Reset");
-		break;
-	case ARC_EV_MEM_ERROR:
-		LOG_ERR("Memory Error");
-		break;
-	case ARC_EV_INS_ERROR:
-		LOG_ERR("Instruction Error");
-		break;
-	case ARC_EV_MACHINE_CHECK:
-		LOG_ERR("EV_MachineCheck");
-		dump_machine_check_exception(cause, parameter);
-		break;
-	case ARC_EV_TLB_MISS_I:
-		LOG_ERR("EV_TLBMissI");
-		break;
-	case ARC_EV_TLB_MISS_D:
-		LOG_ERR("EV_TLBMissD");
-		break;
-	case ARC_EV_PROT_V:
-		LOG_ERR("EV_ProtV");
-		dump_protv_exception(cause, parameter);
-		break;
-	case ARC_EV_PRIVILEGE_V:
-		LOG_ERR("EV_PrivilegeV");
-		dump_privilege_exception(cause, parameter);
-		break;
-	case ARC_EV_SWI:
-		LOG_ERR("EV_SWI");
-		break;
-	case ARC_EV_TRAP:
-		LOG_ERR("EV_Trap");
-		break;
-	case ARC_EV_EXTENSION:
-		LOG_ERR("EV_Extension");
-		break;
-	case ARC_EV_DIV_ZERO:
-		LOG_ERR("EV_DivZero");
-		break;
-	case ARC_EV_DC_ERROR:
-		LOG_ERR("EV_DCError");
-		break;
-	case ARC_EV_MISALIGNED:
-		LOG_ERR("EV_Misaligned");
-		break;
-	case ARC_EV_VEC_UNIT:
-		LOG_ERR("EV_VecUnit");
-		break;
-	default:
-		LOG_ERR("unknown");
-		break;
-	}
-}
-#endif /* CONFIG_ARC_EXCEPTION_DEBUG */
+#endif
 
 /*
  * @brief Fault handler
  *
  * This routine is called when fatal error conditions are detected by hardware
  * and is responsible only for reporting the error. Once reported, it then
- * invokes the user provided routine k_sys_fatal_error_handler() which is
+ * invokes the user provided routine z_SysFatalErrorHandler() which is
  * responsible for implementing the error handling policy.
  */
-void _Fault(z_arch_esf_t *esf, uint32_t old_sp)
+void _Fault(NANO_ESF *esf)
 {
-	uint32_t vector, cause, parameter;
-	uint32_t exc_addr = z_arc_v2_aux_reg_read(_ARC_V2_EFA);
-	uint32_t ecr = z_arc_v2_aux_reg_read(_ARC_V2_ECR);
+	u32_t vector, code, parameter;
+	u32_t exc_addr = z_arc_v2_aux_reg_read(_ARC_V2_EFA);
+	u32_t ecr = z_arc_v2_aux_reg_read(_ARC_V2_ECR);
+
+	LOG_PANIC();
 
 #ifdef CONFIG_USERSPACE
 	for (int i = 0; i < ARRAY_SIZE(exceptions); i++) {
-		uint32_t start = (uint32_t)exceptions[i].start;
-		uint32_t end = (uint32_t)exceptions[i].end;
+		u32_t start = (u32_t)exceptions[i].start;
+		u32_t end = (u32_t)exceptions[i].end;
 
 		if (esf->pc >= start && esf->pc < end) {
-			esf->pc = (uint32_t)(exceptions[i].fixup);
+			esf->pc = (u32_t)(exceptions[i].fixup);
 			return;
 		}
 	}
 #endif
 
 	vector = Z_ARC_V2_ECR_VECTOR(ecr);
-	cause =  Z_ARC_V2_ECR_CODE(ecr);
+	code =  Z_ARC_V2_ECR_CODE(ecr);
 	parameter = Z_ARC_V2_ECR_PARAMETER(ecr);
 
-	/* exception raised by kernel */
-	if (vector == ARC_EV_TRAP && parameter == _TRAP_S_CALL_RUNTIME_EXCEPT) {
-		/*
-		 * in user mode software-triggered system fatal exceptions only allow
-		 * K_ERR_KERNEL_OOPS and K_ERR_STACK_CHK_FAIL
-		 */
-#ifdef CONFIG_USERSPACE
-		if ((esf->status32 & _ARC_V2_STATUS32_U) &&
-			esf->r0 != K_ERR_STACK_CHK_FAIL) {
-			esf->r0 = K_ERR_KERNEL_OOPS;
-		}
-#endif
 
-		z_arc_fatal_error(esf->r0, esf);
+	/* exception raised by kernel */
+	if (vector == 0x9 && parameter == _TRAP_S_CALL_RUNTIME_EXCEPT) {
+		z_NanoFatalErrorHandler(esf->r0, esf);
 		return;
 	}
 
-	LOG_ERR("***** Exception vector: 0x%x, cause code: 0x%x, parameter 0x%x",
-		vector, cause, parameter);
-	LOG_ERR("Address 0x%x", exc_addr);
-#ifdef CONFIG_ARC_EXCEPTION_DEBUG
-	dump_exception_info(vector, cause, parameter);
-#endif
-
+	printk("Exception vector: 0x%x, cause code: 0x%x, parameter 0x%x\n",
+	       vector, code, parameter);
+	printk("Address 0x%x\n", exc_addr);
 #ifdef CONFIG_ARC_STACK_CHECKING
-	/* Vector 6 = EV_ProV. Regardless of cause, parameter 2 means stack
+	/* Vector 6 = EV_ProV. Regardless of code, parameter 2 means stack
 	 * check violation
 	 * stack check and mpu violation can come out together, then
 	 * parameter = 0x2 | [0x4 | 0x8 | 0x1]
 	 */
-	if (vector == ARC_EV_PROT_V && parameter & 0x2) {
-		z_arc_fatal_error(K_ERR_STACK_CHK_FAIL, esf);
+	if (vector == 6U && parameter & 0x2) {
+		z_NanoFatalErrorHandler(_NANO_ERR_STACK_CHK_FAIL, esf);
 		return;
 	}
 #endif
 
 #ifdef CONFIG_MPU_STACK_GUARD
-	if (vector == ARC_EV_PROT_V && ((parameter == 0x4) ||
-					(parameter == 0x24))) {
-		if (z_check_thread_stack_fail(exc_addr, old_sp)) {
-			z_arc_fatal_error(K_ERR_STACK_CHK_FAIL, esf);
+	if (vector == 0x6 && ((parameter == 0x4) || (parameter == 0x24))) {
+		if (z_check_thread_stack_fail(exc_addr, arc_exc_saved_sp)) {
+			z_NanoFatalErrorHandler(_NANO_ERR_STACK_CHK_FAIL, esf);
 			return;
 		}
 	}
 #endif
-	z_arc_fatal_error(K_ERR_CPU_EXCEPTION, esf);
+	z_NanoFatalErrorHandler(_NANO_ERR_HW_EXCEPTION, esf);
 }

arch/arc/core/fault_s.S

@@ -19,6 +19,7 @@
 #include <syscall.h>
 
 GTEXT(_Fault)
+GTEXT(z_do_kernel_oops)
 GTEXT(__reset)
 GTEXT(__memory_error)
 GTEXT(__instruction_error)
@@ -37,28 +38,11 @@ GTEXT(__ev_maligned)
 GTEXT(z_irq_do_offload);
 #endif
 
-.macro _save_exc_regs_into_stack
-#ifdef CONFIG_ARC_HAS_SECURE
-	/* ERSEC_STAT is IOW/RAZ in normal mode */
-	lr r0,[_ARC_V2_ERSEC_STAT]
-	st_s r0, [sp, ___isf_t_sec_stat_OFFSET]
-#endif
-	lr r0,[_ARC_V2_ERET]
-	st_s r0, [sp, ___isf_t_pc_OFFSET]
-	lr r0,[_ARC_V2_ERSTATUS]
-	st_s r0, [sp, ___isf_t_status32_OFFSET]
-.endm
+GDATA(exc_nest_count)
+GDATA(arc_exc_saved_sWWp)
 
-/*
- * The exception handling will use top part of interrupt stack to
- * get smaller memory footprint, because exception is not frequent.
- * To reduce the impact on interrupt handling, especially nested interrupt
- * the top part of interrupt stack cannot be too large, so add a check
- * here
- */
-#if CONFIG_ARC_EXCEPTION_STACK_SIZE > (CONFIG_ISR_STACK_SIZE >> 1)
-#error "interrupt stack size is too small"
-#endif
+/* the necessary stack size for exception handling */
+#define EXCEPTION_STACK_SIZE 384
 
 /*
  * @brief Fault handler installed in the fault and reserved vectors
@@ -78,15 +62,15 @@ SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_dc_error)
 SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_maligned)
 
 _exc_entry:
+	st sp, [arc_exc_saved_sp]
 	/*
 	 * re-use the top part of interrupt stack as exception
 	 * stack. If this top part is used by interrupt handling,
 	 * and exception is raised, then here it's guaranteed that
 	 * exception handling has necessary stack to use
 	 */
-	mov ilink, sp
-	_get_curr_cpu_irq_stack sp
-	sub sp, sp, (CONFIG_ISR_STACK_SIZE - CONFIG_ARC_EXCEPTION_STACK_SIZE)
+	mov_s sp, _interrupt_stack
+	add sp, sp, EXCEPTION_STACK_SIZE
 
 	/*
 	 * save caller saved registers
@@ -99,30 +83,33 @@ _exc_entry:
 	 */
 	_create_irq_stack_frame
 
-	_save_exc_regs_into_stack
+#ifdef CONFIG_ARC_HAS_SECURE
+	lr r0,[_ARC_V2_ERSEC_STAT]
+	st_s r0, [sp, ___isf_t_sec_stat_OFFSET]
+#endif
+	lr r0,[_ARC_V2_ERSTATUS]
+	st_s r0, [sp, ___isf_t_status32_OFFSET]
+	lr r0,[_ARC_V2_ERET]
+	st_s r0, [sp, ___isf_t_pc_OFFSET] /* eret into pc */
 
 	/* sp is parameter of _Fault */
-	mov_s r0, sp
-	/* ilink is the thread's original sp */
-	mov r1, ilink
+	mov r0, sp
 	jl _Fault
 
 _exc_return:
-/* the exception cause must be fixed in exception handler when exception returns
- * directly, or exception will be repeated.
- *
- * If thread switch is raised in exception handler, the context of old thread will
- * not be saved, i.e., it cannot be recovered, because we don't know where the
- * exception comes out,  thread context?irq_context?nest irq context?
- */
 
-	_get_next_switch_handle
+#ifdef CONFIG_PREEMPT_ENABLED
+	mov_s r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
 
+	/* check if the current thread needs to be rescheduled */
+	ld_s r0, [r1, _kernel_offset_to_ready_q_cache]
 	breq r0, r2, _exc_return_from_exc
 
-	mov_s r2, r0
+	ld_s r2, [r1, _kernel_offset_to_ready_q_cache]
+	st_s r2, [r1, _kernel_offset_to_current]
 
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
+#ifdef CONFIG_ARC_HAS_SECURE
 	/*
 	 * sync up the ERSEC_STAT.ERM and SEC_STAT.IRM.
 	 * use a fake interrupt return to simulate an exception turn.
@@ -131,66 +118,34 @@ _exc_return:
 	 */
 	lr r3,[_ARC_V2_ERSEC_STAT]
 	btst r3, 31
-	bset.nz r3, r3, _ARC_V2_SEC_STAT_IRM_BIT
-	bclr.z r3, r3, _ARC_V2_SEC_STAT_IRM_BIT
-	sflag r3
-#endif
-	/* clear AE bit to forget this was an exception, and go to
-	 * register bank0 (if exception is raised in firq with 2 reg
-	 * banks, then we may be bank1)
-	 */
-#if defined(CONFIG_ARC_FIRQ) && CONFIG_RGF_NUM_BANKS != 1
-	/* save r2 in ilink because of the possible following reg
-	 * bank switch
-	 */
-	mov ilink, r2
+	bset.nz r3, r3, 3
+	bclr.z r3, r3, 3
+	/* sflag r3 */
+	/* sflag instruction is not supported in current ARC GNU */
+	.long 0x00ff302f
 #endif
+	/* clear AE bit to forget this was an exception */
 	lr r3, [_ARC_V2_STATUS32]
-	and r3,r3,(~(_ARC_V2_STATUS32_AE | _ARC_V2_STATUS32_RB(7)))
+	and r3,r3,(~_ARC_V2_STATUS32_AE)
 	kflag r3
-	/* pretend lowest priority interrupt happened to use common handler
-	 * if exception is raised in irq, i.e., _ARC_V2_AUX_IRQ_ACT !=0,
-	 * ignore irq handling, we cannot return to irq handling which may
-	 * raise exception again. The ignored interrupts will be re-triggered
-	 * if not cleared, or re-triggered by interrupt sources, or just missed
-	 */
-
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	mov_s r3, (1 << (ARC_N_IRQ_START_LEVEL - 1))
-#else
-	mov_s r3, (1 << (CONFIG_NUM_IRQ_PRIO_LEVELS - 1))
-#endif
-
-#ifdef CONFIG_ARC_NORMAL_FIRMWARE
-	push_s r2
-	mov_s r0, _ARC_V2_AUX_IRQ_ACT
-	mov_s r1, r3
-	mov_s r6, ARC_S_CALL_AUX_WRITE
-	sjli SJLI_CALL_ARC_SECURE
-	pop_s r2
-#else
+	/* pretend lowest priority interrupt happened to use common handler */
+	lr r3, [_ARC_V2_AUX_IRQ_ACT]
+	or r3,r3,(1<<(CONFIG_NUM_IRQ_PRIO_LEVELS-1)) /* use lowest */
 	sr r3, [_ARC_V2_AUX_IRQ_ACT]
-#endif
 
-#if defined(CONFIG_ARC_FIRQ) && CONFIG_RGF_NUM_BANKS != 1
-	mov r2, ilink
+	/* Assumption: r2 has current thread */
+	b _rirq_common_interrupt_swap
 #endif
 
-	/* Assumption: r2 has next thread */
-	b _rirq_newthread_switch
-
 _exc_return_from_exc:
-	/* exception handler may change return address.
-	 * reload it
-	 */
 	ld_s r0, [sp, ___isf_t_pc_OFFSET]
 	sr r0, [_ARC_V2_ERET]
 
 	_pop_irq_stack_frame
-	mov sp, ilink
+	ld sp, [arc_exc_saved_sp]
 	rtie
 
-/* separated entry for trap which may be used by irq_offload, USERPSACE */
+
 SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_trap)
 	/* get the id of trap_s */
 	lr ilink, [_ARC_V2_ECR]
@@ -203,8 +158,8 @@ SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_trap)
 	cmp r6, ilink
 	blo valid_syscall_id
 
-	mov_s r0, r6
-	mov_s r6, K_SYSCALL_BAD
+	mov r0, r6
+	mov r6, K_SYSCALL_BAD
 
 valid_syscall_id:
 	/* create a sys call frame
@@ -212,18 +167,20 @@ valid_syscall_id:
 	 * ok to use them later
 	 */
 	_create_irq_stack_frame
+#ifdef CONFIG_ARC_HAS_SECURE
+	lr r0, [_ARC_V2_ERSEC_STAT]
+	st_s r0, [sp, ___isf_t_sec_stat_OFFSET]
+#endif
+	lr r0, [_ARC_V2_ERET]
+	st_s r0, [sp, ___isf_t_pc_OFFSET] /* eret into pc */
+	lr r0, [_ARC_V2_ERSTATUS]
+	st_s r0, [sp, ___isf_t_status32_OFFSET]
 
-	_save_exc_regs_into_stack
-
-	/* exc return and do sys call in kernel mode,
-	 * so need to clear U bit, r0 is already loaded
-	 * with ERSTATUS in _save_exc_regs_into_stack
-	 */
 
 	bclr r0, r0, _ARC_V2_STATUS32_U_BIT
 	sr r0, [_ARC_V2_ERSTATUS]
 
-	mov_s r0, _arc_do_syscall
+	mov r0, _arc_do_syscall
 	sr r0, [_ARC_V2_ERET]
 
 	rtie
@@ -241,15 +198,25 @@ _do_non_syscall_trap:
 	/* save caller saved registers */
 	_create_irq_stack_frame
 
-	_save_exc_regs_into_stack
+#ifdef CONFIG_ARC_HAS_SECURE
+	lr r0,[_ARC_V2_ERSEC_STAT]
+	st_s r0, [sp, ___isf_t_sec_stat_OFFSET]
+#endif
+	lr r0,[_ARC_V2_ERSTATUS]
+	st_s r0, [sp, ___isf_t_status32_OFFSET]
+	lr r0,[_ARC_V2_ERET]
+	st_s r0, [sp, ___isf_t_pc_OFFSET] /* eret into pc */
 
-	/* check whether irq stack is used */
-	_check_and_inc_int_nest_counter r0, r1
+	ld r1, [exc_nest_count]
+	add r0, r1, 1
+	st r0, [exc_nest_count]
+	cmp r1, 0
 
-	bne.d exc_nest_handle
-	mov_s r0, sp
+	bgt.d  exc_nest_handle
+	mov r0, sp
 
-	_get_curr_cpu_irq_stack sp
+	mov r1, _kernel
+	ld sp, [r1, _kernel_offset_to_irq_stack]
 exc_nest_handle:
 	push_s r0
 
@@ -257,11 +224,59 @@ exc_nest_handle:
 
 	pop sp
 
-	_dec_int_nest_counter r0, r1
+	mov	r1, exc_nest_count
+	ld	r0, [r1]
+	sub	r0, r0, 1
+	cmp	r0, 0
+	bne.d	_exc_return_from_exc
+	st 	r0, [r1]
 
+#ifdef CONFIG_PREEMPT_ENABLED
+	mov_s r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
+
+	/* check if the current thread needs to be rescheduled */
+	ld_s r0, [r1, _kernel_offset_to_ready_q_cache]
+	breq r0, r2, _exc_return_from_irqoffload_trap
+
+	_save_callee_saved_regs
+
+	st _CAUSE_RIRQ, [r2, _thread_offset_to_relinquish_cause]
+	/* note: Ok to use _CAUSE_RIRQ since everything is saved */
+
+	ld_s r2, [r1, _kernel_offset_to_ready_q_cache]
+	st_s r2, [r1, _kernel_offset_to_current]
+
+#ifdef CONFIG_ARC_HAS_SECURE
+	/*
+	 * sync up the ERSEC_STAT.ERM and SEC_STAT.IRM.
+	 * use a fake interrupt return to simulate an exception turn.
+	 * ERM and IRM record which mode the cpu should return, 1: secure
+	 * 0: normal
+	 */
+	lr r3,[_ARC_V2_ERSEC_STAT]
+	btst r3, 31
+	bset.nz r3, r3, 3
+	bclr.z r3, r3, 3
+	/* sflag r3 */
+	/* sflag instruction is not supported in current ARC GNU */
+	.long 0x00ff302f
+#endif
+	/* clear AE bit to forget this was an exception */
+	lr r3, [_ARC_V2_STATUS32]
+	and r3,r3,(~_ARC_V2_STATUS32_AE)
+	kflag r3
+	/* pretend lowest priority interrupt happened to use common handler */
+	lr r3, [_ARC_V2_AUX_IRQ_ACT]
+	or r3,r3,(1<<(CONFIG_NUM_IRQ_PRIO_LEVELS-1)) /* use lowest */
+	sr r3, [_ARC_V2_AUX_IRQ_ACT]
+
+	/* Assumption: r2 has current thread */
+	b _rirq_common_interrupt_swap
+#endif
+
+_exc_return_from_irqoffload_trap:
 	_pop_irq_stack_frame
-
-	/* ERSTATUS, ERET are not changed, so ok to rtie */
 	rtie
 #endif /* CONFIG_IRQ_OFFLOAD */
 	b _exc_entry

arch/arc/core/irq_manage.c

@@ -19,69 +19,12 @@
 
 #include <kernel.h>
 #include <arch/cpu.h>
-#include <sys/__assert.h>
+#include <misc/__assert.h>
 #include <toolchain.h>
 #include <linker/sections.h>
 #include <sw_isr_table.h>
 #include <irq.h>
-#include <sys/printk.h>
-
-
-/*
- * storage space for the interrupt stack of fast_irq
- */
-#if defined(CONFIG_ARC_FIRQ_STACK)
-#if defined(CONFIG_SMP)
-K_KERNEL_STACK_ARRAY_DEFINE(_firq_interrupt_stack, CONFIG_MP_NUM_CPUS,
-			    CONFIG_ARC_FIRQ_STACK_SIZE);
-#else
-K_KERNEL_STACK_DEFINE(_firq_interrupt_stack, CONFIG_ARC_FIRQ_STACK_SIZE);
-#endif
-
-/*
- * @brief Set the stack pointer for firq handling
- *
- * @return N/A
- */
-void z_arc_firq_stack_set(void)
-{
-#ifdef CONFIG_SMP
-	char *firq_sp = Z_KERNEL_STACK_BUFFER(
-		  _firq_interrupt_stack[z_arc_v2_core_id()]) +
-		  CONFIG_ARC_FIRQ_STACK_SIZE;
-#else
-	char *firq_sp = Z_KERNEL_STACK_BUFFER(_firq_interrupt_stack) +
-		  CONFIG_ARC_FIRQ_STACK_SIZE;
-#endif
-
-/* the z_arc_firq_stack_set must be called when irq diasbled, as
- * it can be called not only in the init phase but also other places
- */
-	unsigned int key = arch_irq_lock();
-
-	__asm__ volatile (
-/* only ilink will not be banked, so use ilink as channel
- * between 2 banks
- */
-	"mov %%ilink, %0\n\t"
-	"lr %0, [%1]\n\t"
-	"or %0, %0, %2\n\t"
-	"kflag %0\n\t"
-	"mov %%sp, %%ilink\n\t"
-/* switch back to bank0, use ilink to avoid the pollution of
- * bank1's gp regs.
- */
-	"lr %%ilink, [%1]\n\t"
-	"and %%ilink, %%ilink, %3\n\t"
-	"kflag %%ilink\n\t"
-	:
-	: "r"(firq_sp), "i"(_ARC_V2_STATUS32),
-	  "i"(_ARC_V2_STATUS32_RB(1)),
-	  "i"(~_ARC_V2_STATUS32_RB(7))
-	);
-	arch_irq_unlock(key);
-}
-#endif
+#include <misc/printk.h>
 
 /*
  * @brief Enable an interrupt line
@@ -93,9 +36,12 @@ void z_arc_firq_stack_set(void)
  * @return N/A
  */
 
-void arch_irq_enable(unsigned int irq)
+void z_arch_irq_enable(unsigned int irq)
 {
+	unsigned int key = irq_lock();
+
 	z_arc_v2_irq_unit_int_enable(irq);
+	irq_unlock(key);
 }
 
 /*
@@ -107,20 +53,12 @@ void arch_irq_enable(unsigned int irq)
  * @return N/A
  */
 
-void arch_irq_disable(unsigned int irq)
+void z_arch_irq_disable(unsigned int irq)
 {
-	z_arc_v2_irq_unit_int_disable(irq);
-}
+	unsigned int key = irq_lock();
 
-/**
- * @brief Return IRQ enable state
- *
- * @param irq IRQ line
- * @return interrupt enable state, true or false
- */
-int arch_irq_is_enabled(unsigned int irq)
-{
-	return z_arc_v2_irq_unit_int_enabled(irq);
+	z_arc_v2_irq_unit_int_disable(irq);
+	irq_unlock(key);
 }
 
 /*
@@ -137,23 +75,16 @@ int arch_irq_is_enabled(unsigned int irq)
  * @return N/A
  */
 
-void z_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
+void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags)
 {
 	ARG_UNUSED(flags);
 
+	unsigned int key = irq_lock();
+
 	__ASSERT(prio < CONFIG_NUM_IRQ_PRIO_LEVELS,
 		 "invalid priority %d for irq %d", prio, irq);
-/* 0 -> CONFIG_NUM_IRQ_PRIO_LEVELS allocted to secure world
- * left prio levels allocated to normal world
- */
-#if defined(CONFIG_ARC_SECURE_FIRMWARE)
-	prio = prio < ARC_N_IRQ_START_LEVEL ?
-		prio : (ARC_N_IRQ_START_LEVEL - 1);
-#elif defined(CONFIG_ARC_NORMAL_FIRMWARE)
-	prio = prio < ARC_N_IRQ_START_LEVEL ?
-		 ARC_N_IRQ_START_LEVEL : prio;
-#endif
 	z_arc_v2_irq_unit_prio_set(irq, prio);
+	irq_unlock(key);
 }
 
 /*
@@ -165,16 +96,19 @@ void z_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
  * @return N/A
  */
 
-void z_irq_spurious(const void *unused)
+void z_irq_spurious(void *unused)
 {
 	ARG_UNUSED(unused);
-	z_fatal_error(K_ERR_SPURIOUS_IRQ, NULL);
+	printk("z_irq_spurious(). Spinning...\n");
+	for (;;) {
+		;
+	}
 }
 
 #ifdef CONFIG_DYNAMIC_INTERRUPTS
-int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
-			     void (*routine)(const void *parameter),
-			     const void *parameter, uint32_t flags)
+int z_arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
+			      void (*routine)(void *parameter), void *parameter,
+			      u32_t flags)
 {
 	z_isr_install(irq, routine, parameter);
 	z_irq_priority_set(irq, priority, flags);

arch/arc/core/irq_offload.c

@@ -12,7 +12,7 @@
 #include <irq_offload.h>
 
 static irq_offload_routine_t offload_routine;
-static const void *offload_param;
+static void *offload_param;
 
 /* Called by trap_s exception handler */
 void z_irq_do_offload(void)
@@ -20,9 +20,11 @@ void z_irq_do_offload(void)
 	offload_routine(offload_param);
 }
 
-void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
+void irq_offload(irq_offload_routine_t routine, void *parameter)
 {
+	unsigned int key;
 
+	key = irq_lock();
 	offload_routine = routine;
 	offload_param = parameter;
 
@@ -30,4 +32,6 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
 		:
 		: [id] "i"(_TRAP_S_SCALL_IRQ_OFFLOAD) : );
 
+	irq_unlock(key);
 }
+

arch/arc/core/isr_wrapper.S

@@ -24,8 +24,28 @@
 GTEXT(_isr_wrapper)
 GTEXT(_isr_demux)
 
-#if defined(CONFIG_PM)
-GTEXT(z_pm_save_idle_exit)
+GDATA(exc_nest_count)
+SECTION_VAR(BSS, exc_nest_count)
+	.balign 4
+	.word 0
+
+
+#if CONFIG_RGF_NUM_BANKS == 1
+GDATA(saved_r0)
+
+SECTION_VAR(BSS, saved_r0)
+	.balign 4
+	.word 0
+#else
+GDATA(saved_sp)
+
+SECTION_VAR(BSS, saved_sp)
+	.balign 4
+	.word 0
+#endif
+
+#if defined(CONFIG_SYS_POWER_MANAGEMENT)
+GTEXT(z_sys_power_save_idle_exit)
 #endif
 
 /*
@@ -35,38 +55,47 @@ _rirq_enter/_firq_enter: they are jump points.
 The flow is the following:
 
 ISR -> _isr_wrapper -- + -> _rirq_enter -> _isr_demux -> ISR -> _rirq_exit
-			 |
-			 + -> _firq_enter -> _isr_demux -> ISR -> _firq_exit
+                       |
+                       + -> _firq_enter -> _isr_demux -> ISR -> _firq_exit
 
 Context switch explanation:
 
 The context switch code is spread in these files:
 
-	isr_wrapper.s, switch.s, swap_macros.h, fast_irq.s, regular_irq.s
+  isr_wrapper.s, swap.s, swap_macros.s, fast_irq.s, regular_irq.s
 
 IRQ stack frame layout:
 
-	high address
+  high address
 
-	status32
-		pc
-	lp_count
-	lp_start
-	lp_end
-	blink
-	 r13
-	 ...
-	sp ->    r0
+           status32
+              pc
+           lp_count
+           lp_start
+            lp_end
+            blink
+             r13
+             ...
+    sp ->    r0
 
-	low address
+  low address
+
+Registers not taken into account in the current implementation.
+          jli_base
+          ldi_base
+          ei_base
+          accl
+          acch
 
 The context switch code adopts this standard so that it is easier to follow:
 
-	- r2 contains _kernel.current ASAP, and the incoming thread when we
-		transition from outgoing thread to incoming thread
+  - r1 contains _kernel ASAP and is not overwritten over the lifespan of
+    the functions.
+  - r2 contains _kernel.current ASAP, and the incoming thread when we
+    transition from outgoing thread to incoming thread
 
 Not loading _kernel into r0 allows loading _kernel without stomping on
-the parameter in r0 in arch_switch().
+the parameter in r0 in z_swap().
 
 
 ARCv2 processors have two kinds of interrupts: fast (FIRQ) and regular. The
@@ -98,49 +127,47 @@ done upfront, and the rest is done when needed:
 
 o RIRQ
 
-	All needed registers to run C code in the ISR are saved automatically
-	on the outgoing thread's stack: loop, status32, pc, and the caller-
-	saved GPRs. That stack frame layout is pre-determined. If returning
-	to a thread, the stack is popped and no registers have to be saved by
-	the kernel. If a context switch is required, the callee-saved GPRs
-	are then saved in the thread's stack.
+  All needed regisers to run C code in the ISR are saved automatically
+  on the outgoing thread's stack: loop, status32, pc, and the caller-
+  saved GPRs. That stack frame layout is pre-determined. If returning
+  to a thread, the stack is popped and no registers have to be saved by
+  the kernel. If a context switch is required, the callee-saved GPRs
+  are then saved in the thread control structure (TCS).
 
 o FIRQ
 
-	First, a FIRQ can be interrupting a lower-priority RIRQ: if this is
-	the case, the FIRQ does not take a scheduling decision and leaves it
-	the RIRQ to handle. This limits the amount of code that has to run at
-	interrupt-level.
+  First, a FIRQ can be interrupting a lower-priority RIRQ: if this is the case,
+  the FIRQ does not take a scheduling decision and leaves it the RIRQ to
+  handle. This limits the amount of code that has to run at interrupt-level.
 
-	CONFIG_RGF_NUM_BANKS==1 case:
-	Registers are saved on the stack frame just as they are for RIRQ.
-	Context switch can happen just as it does in the RIRQ case, however,
-	if the FIRQ interrupted a RIRQ, the FIRQ will return from interrupt
-	and let the RIRQ do the context switch. At entry, one register is
-	needed in order to have code to save other registers. r0 is saved
-	first in the stack and restored later
+  CONFIG_RGF_NUM_BANKS==1 case:
+  Registers are saved on the stack frame just as they are for RIRQ.
+  Context switch can happen just as it does in the RIRQ case, however,
+  if the FIRQ interrupted a RIRQ, the FIRQ will return from interrupt and
+  let the RIRQ do the context switch.  At entry, one register is needed in order
+  to have code to save other registers. r0 is saved first in a global called
+  saved_r0.
 
-	CONFIG_RGF_NUM_BANKS!=1 case:
-	During early initialization, the sp in the 2nd register bank is made to
-	refer to _firq_stack. This allows for the FIRQ handler to use its own
-	stack. GPRs are banked, loop registers are saved in unused callee saved
-	regs upon interrupt entry. If returning to a thread, loop registers are
-	restored and the CPU switches back to bank 0 for the GPRs. If a context
-	switch is needed, at this point only are all the registers saved.
-	First, a  stack frame with the same layout as the automatic RIRQ one is
-	created and then the callee-saved GPRs are saved in the stack.
-	status32_p0 and ilink are saved in this case, not status32 and pc.
-	To create the stack frame, the FIRQ handling code must first go back to
-	using bank0 of registers, since that is where the registers containing
-	the exiting thread are saved. Care must be taken not to touch any
-	register before saving them: the only one usable at that point is the
-	stack pointer.
+  CONFIG_RGF_NUM_BANKS!=1 case:
+  During early initialization, the sp in the 2nd register bank is made to
+  refer to _firq_stack. This allows for the FIRQ handler to use its own stack.
+  GPRs are banked, loop registers are saved in unused callee saved regs upon
+  interrupt entry. If returning to a thread, loop registers are restored and the
+  CPU switches back to bank 0 for the GPRs. If a context switch is
+  needed, at this point only are all the registers saved. First, a
+  stack frame with the same layout as the automatic RIRQ one is created
+  and then the callee-saved GPRs are saved in the TCS. status32_p0 and
+  ilink are saved in this case, not status32 and pc.
+  To create the stack frame, the FIRQ handling code must first go back to using
+  bank0 of registers, since that is where the registers containing the exiting
+  thread are saved. Care must be taken not to touch any register before saving
+  them: the only one usable at that point is the stack pointer.
 
 o coop
 
-	When a coop context switch is done, the callee-saved registers are
-	saved in the stack. The other GPRs do not need to be saved, since the
-	compiler has already placed them on the stack.
+  When a coop context switch is done, the callee-saved registers are
+  saved in the TCS. The other GPRs do not need to be saved, since the
+  compiler has already placed them on the stack.
 
 For restoring the contexts, there are six cases. In all cases, the
 callee-saved registers of the incoming thread have to be restored. Then, there
@@ -148,87 +175,111 @@ are specifics for each case:
 
 From coop:
 
-	o to coop
+  o to coop
 
-		Do a normal function call return.
+    Restore interrupt lock level and do a normal function call return.
 
-	o to any irq
+  o to any irq
 
-	The incoming interrupted thread has an IRQ stack frame containing the
-	caller-saved registers that has to be popped. status32 has to be
-	restored, then we jump to the interrupted instruction.
+    The incoming interrupted thread has an IRQ stack frame containing the
+    caller-saved registers that has to be popped. status32 has to be restored,
+    then we jump to the interrupted instruction.
 
 From FIRQ:
 
-	When CONFIG_RGF_NUM_BANKS==1, context switch is done as it is for RIRQ.
-	When CONFIG_RGF_NUM_BANKS!=1, the processor is put back to using bank0,
-	not bank1 anymore, because it had to save the outgoing context from
-	bank0, and now has to load the incoming one into bank0.
+  When CONFIG_RGF_NUM_BANKS==1, context switch is done as it is for RIRQ.
+  When CONFIG_RGF_NUM_BANKS!=1, the processor is put back to using bank0,
+  not bank1 anymore, because it had to save the outgoing context from bank0,
+  and now has to load the incoming one
+  into bank0.
 
-	o to coop
+  o to coop
 
-	The address of the returning instruction from arch_switch() is loaded
-	in ilink and the saved status32 in status32_p0.
+    The address of the returning instruction from z_swap() is loaded in ilink and
+    the saved status32 in status32_p0, taking care to adjust the interrupt lock
+    state desired in status32_p0. The return value is put in r0.
 
-	o to any irq
+  o to any irq
 
-	The IRQ has saved the caller-saved registers in a stack frame, which
-	must be popped, and status32 and pc loaded in status32_p0 and ilink.
+    The IRQ has saved the caller-saved registers in a stack frame, which must be
+    popped, and statu32 and pc loaded in status32_p0 and ilink.
 
 From RIRQ:
 
-	o to coop
+  o to coop
 
-	The interrupt return mechanism in the processor expects a stack frame,
-	but the outgoing context did not create one. A fake one is created
-	here, with only the relevant values filled in: pc, status32.
+    The interrupt return mechanism in the processor expects a stack frame, but
+    the outgoing context did not create one. A fake one is created here, with
+    only the relevant values filled in: pc, status32 and the return value in r0.
 
-	There is a discrepancy between the ABI from the ARCv2 docs,
-	including the way the processor pushes GPRs in pairs in the IRQ stack
-	frame, and the ABI GCC uses. r13 should be a callee-saved register,
-	but GCC treats it as caller-saved. This means that the processor pushes
-	it in the stack frame along with r12, but the compiler does not save it
-	before entering a function. So, it is saved as part of the callee-saved
-	registers, and restored there, but the processor restores it _a second
-	time_ when popping the IRQ stack frame. Thus, the correct value must
-	also be put in the fake stack frame when returning to a thread that
-	context switched out cooperatively.
+    There is a discrepancy between the ABI from the ARCv2 docs, including the
+    way the processor pushes GPRs in pairs in the IRQ stack frame, and the ABI
+    GCC uses. r13 should be a callee-saved register, but GCC treats it as
+    caller-saved. This means that the processor pushes it in the stack frame
+    along with r12, but the compiler does not save it before entering a
+    function. So, it is saved as part of the callee-saved registers, and
+    restored there, but the processor restores it _a second time_ when popping
+    the IRQ stack frame. Thus, the correct value must also be put in the fake
+    stack frame when returning to a thread that context switched out
+    cooperatively.
 
-	o to any irq
+  o to any irq
 
-	Both types of IRQs already have an IRQ stack frame: simply return from
-	interrupt.
+    Both types of IRQs already have an IRQ stack frame: simply return from
+    interrupt.
  */
 
 SECTION_FUNC(TEXT, _isr_wrapper)
-#ifdef CONFIG_ARC_FIRQ
+#if CONFIG_ARC_FIRQ
 #if CONFIG_RGF_NUM_BANKS == 1
-/* free r0 here, use r0 to check whether irq is firq.
- * for rirq,  as sp will not change and r0 already saved, this action
- * in fact is useless
- * for firq,  r0 will be restored later
- */
-	push r0
+	st r0,[saved_r0]
 #endif
 	lr r0, [_ARC_V2_AUX_IRQ_ACT]
 	ffs r0, r0
 	cmp r0, 0
 #if CONFIG_RGF_NUM_BANKS == 1
 	bnz rirq_path
-	pop r0
 	/* 1-register bank FIRQ handling must save registers on stack */
-	_create_irq_stack_frame
-	lr r0, [_ARC_V2_STATUS32_P0]
-	st_s r0, [sp, ___isf_t_status32_OFFSET]
-	st ilink, [sp, ___isf_t_pc_OFFSET]
-
-	mov_s r3, _firq_exit
-	mov_s r2, _firq_enter
+	lr r0,[_ARC_V2_STATUS32_P0]
+	push_s r0
+	mov r0,ilink
+	push_s r0
+#ifdef CONFIG_CODE_DENSITY
+	lr r0, [_ARC_V2_JLI_BASE]
+	push_s r0
+	lr r0, [_ARC_V2_LDI_BASE]
+	push_s r0
+	lr r0, [_ARC_V2_EI_BASE]
+	push_s r0
+#endif
+	mov r0,lp_count
+	push_s r0
+	lr r0, [_ARC_V2_LP_START]
+	push_s r0
+	lr r0, [_ARC_V2_LP_END]
+	push_s r0
+	push_s blink
+	push_s r13
+	push_s r12
+	push r11
+	push r10
+	push r9
+	push r8
+	push r7
+	push r6
+	push r5
+	push r4
+	push_s r3
+	push_s r2
+	push_s r1
+	ld r0,[saved_r0]
+	push_s r0
+	mov r3, _firq_exit
+	mov r2, _firq_enter
 	j_s [r2]
 rirq_path:
-	add sp, sp, 4
-	mov_s r3, _rirq_exit
-	mov_s r2, _rirq_enter
+	mov r3, _rirq_exit
+	mov r2, _rirq_enter
 	j_s [r2]
 #else
 	mov.z r3, _firq_exit
@@ -238,48 +289,61 @@ rirq_path:
 	j_s [r2]
 #endif
 #else
-	mov_s r3, _rirq_exit
-	mov_s r2, _rirq_enter
+	mov r3, _rirq_exit
+	mov r2, _rirq_enter
 	j_s [r2]
 #endif
 
-/* r0, r1, and r3 will be used in exit_tickless_idle macro */
+#if defined(CONFIG_TRACING)
+GTEXT(z_sys_trace_isr_enter)
+
+.macro log_interrupt_k_event
+	clri r0 /* do not interrupt event logger operations */
+	push_s r0
+	push_s blink
+	jl z_sys_trace_isr_enter
+	pop_s blink
+	pop_s r0
+	seti r0
+.endm
+#else
+	#define log_interrupt_k_event
+#endif
+
+#if defined(CONFIG_SYS_POWER_MANAGEMENT)
 .macro exit_tickless_idle
-#if defined(CONFIG_PM)
 	clri r0 /* do not interrupt exiting tickless idle operations */
+	push_s r1
+	push_s r0
 	mov_s r1, _kernel
-	ld_s r3, [r1, _kernel_offset_to_idle] /* requested idle duration */
-	breq r3, 0, _skip_pm_save_idle_exit
+	ld_s r0, [r1, _kernel_offset_to_idle] /* requested idle duration */
+	breq r0, 0, _skip_sys_power_save_idle_exit
 
 	st 0, [r1, _kernel_offset_to_idle] /* zero idle duration */
 	push_s blink
-	jl z_pm_save_idle_exit
+	jl z_sys_power_save_idle_exit
 	pop_s blink
 
-_skip_pm_save_idle_exit:
+_skip_sys_power_save_idle_exit:
+	pop_s r0
+	pop_s r1
 	seti r0
-#endif
 .endm
+#else
+	#define exit_tickless_idle
+#endif
 
 /* when getting here, r3 contains the interrupt exit stub to call */
 SECTION_FUNC(TEXT, _isr_demux)
 	push_s r3
 
-/* according to ARCv2 ISA, r25, r30, r58, r59 are caller-saved
- * scratch registers, possibly used by interrupt handlers
- */
-	push r25
-	push r30
-#ifdef CONFIG_ARC_HAS_ACCL_REGS
-	push r58
-	push r59
-#endif
-
-#ifdef CONFIG_TRACING_ISR
-	bl sys_trace_isr_enter
+#ifdef CONFIG_EXECUTION_BENCHMARKING
+	bl read_timer_start_of_isr
 #endif
 	/* cannot be done before this point because we must be able to run C */
+	/* r0 is available to be stomped here, and exit_tickless_idle uses it */
 	exit_tickless_idle
+	log_interrupt_k_event
 
 	lr r0, [_ARC_V2_ICAUSE]
 	/* handle software triggered interrupt */
@@ -290,26 +354,21 @@ irq_hint_handled:
 
 	sub r0, r0, 16
 
-	mov_s r1, _sw_isr_table
+	mov r1, _sw_isr_table
 	add3 r0, r1, r0   /* table entries are 8-bytes wide */
 
 	ld_s r1, [r0, 4] /* ISR into r1 */
+#ifdef CONFIG_EXECUTION_BENCHMARKING
+	push_s r0
+	push_s r1
+	bl read_timer_end_of_isr
+	pop_s r1
+	pop_s r0
+#endif
 	jl_s.d [r1]
 	ld_s r0, [r0] /* delay slot: ISR parameter into r0  */
 
-#ifdef CONFIG_TRACING_ISR
-	bl sys_trace_isr_exit
-#endif
-
-#ifdef CONFIG_ARC_HAS_ACCL_REGS
-	pop r59
-	pop r58
-#endif
-
-	pop r30
-	pop r25
-
 	/* back from ISR, jump to exit stub */
 	pop_s r3
 	j_s [r3]
-	nop_s
+	nop

arch/arc/core/mpu/CMakeLists.txt

@@ -2,5 +2,5 @@
 
 zephyr_library()
 
-zephyr_library_sources_ifdef(CONFIG_ARC_CORE_MPU arc_core_mpu.c)
-zephyr_library_sources_ifdef(CONFIG_ARC_MPU arc_mpu.c)
+zephyr_library_sources_if_kconfig(arc_core_mpu.c)
+zephyr_library_sources_if_kconfig(arc_mpu.c)

arch/arc/core/mpu/Kconfig

@@ -1,8 +1,10 @@
-# Memory Protection Unit (MPU) configuration options
+# Kconfig - Memory Protection Unit (MPU) configuration options
 
+#
 # Copyright (c) 2017 Synopsys
+#
 # SPDX-License-Identifier: Apache-2.0
-
+#
 config ARC_MPU_VER
 	int "ARC MPU version"
 	range 2 4
@@ -18,21 +20,16 @@ config ARC_CORE_MPU
 
 config MPU_STACK_GUARD
 	bool "Thread Stack Guards"
-	depends on ARC_CORE_MPU && ARC_MPU_VER !=2
+	depends on ARC_CORE_MPU
 	help
 	  Enable thread stack guards via MPU. ARC supports built-in stack protection.
-	  If your core supports that, it is preferred over MPU stack guard.
-	  For ARC_MPU_VER == 2, it requires 2048 extra bytes and a strong start address
-	  alignment, this will bring big waste of memory, so no support for it.
+	  If your core supports that, it is preferred over MPU stack guard
 
 config ARC_MPU
 	bool "ARC MPU Support"
-	select MPU
-	select SRAM_REGION_PERMISSIONS
 	select ARC_CORE_MPU
 	select THREAD_STACK_INFO
-	select GEN_PRIV_STACKS if ARC_MPU_VER = 2
+	select MEMORY_PROTECTION
 	select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if ARC_MPU_VER = 2
-	select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if ARC_MPU_VER = 3
 	help
 	  Target has ARC MPU (currently only works for EMSK 2.2/2.3 ARCEM7D)

arch/arc/core/mpu/arc_core_mpu.c

@@ -9,7 +9,6 @@
 #include <kernel.h>
 #include <soc.h>
 #include <arch/arc/v2/mpu/arc_core_mpu.h>
-#include <kernel_structs.h>
 
 /*
  * @brief Configure MPU for the thread
@@ -27,15 +26,52 @@ void configure_mpu_thread(struct k_thread *thread)
 
 #if defined(CONFIG_USERSPACE)
 
-int arch_mem_domain_max_partitions_get(void)
+int z_arch_mem_domain_max_partitions_get(void)
 {
 	return arc_core_mpu_get_max_domain_partition_regions();
 }
 
+/*
+ * Reset MPU region for a single memory partition
+ */
+void z_arch_mem_domain_partition_remove(struct k_mem_domain *domain,
+				       u32_t partition_id)
+{
+	arc_core_mpu_disable();
+	arc_core_mpu_remove_mem_partition(domain, partition_id);
+	arc_core_mpu_enable();
+}
+
+/*
+ * Configure MPU memory domain
+ */
+void z_arch_mem_domain_configure(struct k_thread *thread)
+{
+	arc_core_mpu_disable();
+	arc_core_mpu_configure_mem_domain(thread);
+	arc_core_mpu_enable();
+}
+
+/*
+ * Destroy MPU regions for the mem domain
+ */
+void z_arch_mem_domain_destroy(struct k_mem_domain *domain)
+{
+	arc_core_mpu_disable();
+	arc_core_mpu_remove_mem_domain(domain);
+	arc_core_mpu_enable();
+}
+
+void _arch_mem_domain_partition_add(struct k_mem_domain *domain,
+				    u32_t partition_id)
+{
+	/* No-op on this architecture */
+}
+
 /*
  * Validate the given buffer is user accessible or not
  */
-int arch_buffer_validate(void *addr, size_t size, int write)
+int z_arch_buffer_validate(void *addr, size_t size, int write)
 {
 	return arc_core_mpu_buffer_validate(addr, size, write);
 }

arch/arc/core/mpu/arc_mpu.c

@@ -21,20 +21,20 @@ LOG_MODULE_REGISTER(mpu);
  * @brief Get the number of supported MPU regions
  *
  */
-static inline uint8_t get_num_regions(void)
+static inline u8_t get_num_regions(void)
 {
-	uint32_t num = z_arc_v2_aux_reg_read(_ARC_V2_MPU_BUILD);
+	u32_t num = z_arc_v2_aux_reg_read(_ARC_V2_MPU_BUILD);
 
 	num = (num & 0xFF00U) >> 8U;
 
-	return (uint8_t)num;
+	return (u8_t)num;
 }
 
 /**
  * This internal function is utilized by the MPU driver to parse the intent
  * type (i.e. THREAD_STACK_REGION) and return the correct parameter set.
  */
-static inline uint32_t get_region_attr_by_type(uint32_t type)
+static inline u32_t get_region_attr_by_type(u32_t type)
 {
 	switch (type) {
 	case THREAD_STACK_USER_REGION:

arch/arc/core/mpu/arc_mpu_v2_internal.h

@@ -16,28 +16,32 @@
 #define AUX_MPU_RDP_ATTR_MASK (0x1FC)
 #define AUX_MPU_RDP_SIZE_MASK (0xE03)
 
+#define _ARC_V2_MPU_EN   (0x409)
+#define _ARC_V2_MPU_RDB0 (0x422)
+#define _ARC_V2_MPU_RDP0 (0x423)
+
 /* For MPU version 2, the minimum protection region size is 2048 bytes */
 #define ARC_FEATURE_MPU_ALIGNMENT_BITS 11
 
 /**
  * This internal function initializes a MPU region
  */
-static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size,
-				uint32_t region_attr)
+static inline void _region_init(u32_t index, u32_t region_addr, u32_t size,
+				u32_t region_attr)
 {
+	u8_t bits = find_msb_set(size) - 1;
+
 	index = index * 2U;
 
+	if (bits < ARC_FEATURE_MPU_ALIGNMENT_BITS) {
+		bits = ARC_FEATURE_MPU_ALIGNMENT_BITS;
+	}
+
+	if ((1 << bits) < size) {
+		bits++;
+	}
+
 	if (size > 0) {
-		uint8_t bits = find_msb_set(size) - 1;
-
-		if (bits < ARC_FEATURE_MPU_ALIGNMENT_BITS) {
-			bits = ARC_FEATURE_MPU_ALIGNMENT_BITS;
-		}
-
-		if ((1 << bits) < size) {
-			bits++;
-		}
-
 		region_attr &= ~(AUX_MPU_RDP_SIZE_MASK);
 		region_attr |= AUX_MPU_RDP_REGION_SIZE(bits);
 		region_addr |= AUX_MPU_RDB_VALID_MASK;
@@ -53,7 +57,7 @@ static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t s
  * This internal function is utilized by the MPU driver to parse the intent
  * type (i.e. THREAD_STACK_REGION) and return the correct region index.
  */
-static inline int get_region_index_by_type(uint32_t type)
+static inline int get_region_index_by_type(u32_t type)
 {
 	/*
 	 * The new MPU regions are allocated per type after the statically
@@ -71,12 +75,18 @@ static inline int get_region_index_by_type(uint32_t type)
 		       - THREAD_STACK_REGION;
 	case THREAD_STACK_REGION:
 	case THREAD_APP_DATA_REGION:
+	case THREAD_STACK_GUARD_REGION:
+		return get_num_regions() - mpu_config.num_regions - type;
 	case THREAD_DOMAIN_PARTITION_REGION:
+#if defined(CONFIG_MPU_STACK_GUARD)
+		return get_num_regions() - mpu_config.num_regions - type;
+#else
 		/*
 		 * Start domain partition region from stack guard region
-		 * since stack guard is not supported.
+		 * since stack guard is not enabled.
 		 */
 		return get_num_regions() - mpu_config.num_regions - type + 1;
+#endif
 	default:
 		__ASSERT(0, "Unsupported type");
 		return -EINVAL;
@@ -86,7 +96,7 @@ static inline int get_region_index_by_type(uint32_t type)
 /**
  * This internal function checks if region is enabled or not
  */
-static inline bool _is_enabled_region(uint32_t r_index)
+static inline bool _is_enabled_region(u32_t r_index)
 {
 	return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDB0 + r_index * 2U)
 		 & AUX_MPU_RDB_VALID_MASK) == AUX_MPU_RDB_VALID_MASK);
@@ -95,11 +105,11 @@ static inline bool _is_enabled_region(uint32_t r_index)
 /**
  * This internal function check if the given buffer in in the region
  */
-static inline bool _is_in_region(uint32_t r_index, uint32_t start, uint32_t size)
+static inline bool _is_in_region(u32_t r_index, u32_t start, u32_t size)
 {
-	uint32_t r_addr_start;
-	uint32_t r_addr_end;
-	uint32_t r_size_lshift;
+	u32_t r_addr_start;
+	u32_t r_addr_end;
+	u32_t r_size_lshift;
 
 	r_addr_start = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDB0 + r_index * 2U)
 		       & (~AUX_MPU_RDB_VALID_MASK);
@@ -118,9 +128,9 @@ static inline bool _is_in_region(uint32_t r_index, uint32_t start, uint32_t size
 /**
  * This internal function check if the region is user accessible or not
  */
-static inline bool _is_user_accessible_region(uint32_t r_index, int write)
+static inline bool _is_user_accessible_region(u32_t r_index, int write)
 {
-	uint32_t r_ap;
+	u32_t r_ap;
 
 	r_ap = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDP0 + r_index * 2U);
 
@@ -142,10 +152,10 @@ static inline bool _is_user_accessible_region(uint32_t r_index, int write)
  * @param base base address in RAM
  * @param size size of the region
  */
-static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size)
+static inline int _mpu_configure(u8_t type, u32_t base, u32_t size)
 {
-	int32_t region_index =  get_region_index_by_type(type);
-	uint32_t region_attr = get_region_attr_by_type(type);
+	s32_t region_index =  get_region_index_by_type(type);
+	u32_t region_attr = get_region_attr_by_type(type);
 
 	LOG_DBG("Region info: 0x%x 0x%x", base, size);
 
@@ -191,13 +201,52 @@ void arc_core_mpu_disable(void)
  */
 void arc_core_mpu_configure_thread(struct k_thread *thread)
 {
+
+#if defined(CONFIG_MPU_STACK_GUARD)
+#if defined(CONFIG_USERSPACE)
+	if ((thread->base.user_options & K_USER) != 0) {
+		/* the areas before and after the user stack of thread is
+		 * kernel only. These area can be used as stack guard.
+		 * -----------------------
+		 * |  kernel only area   |
+		 * |---------------------|
+		 * |  user stack         |
+		 * |---------------------|
+		 * |privilege stack guard|
+		 * |---------------------|
+		 * |  privilege stack    |
+		 * -----------------------
+		 */
+		if (_mpu_configure(THREAD_STACK_GUARD_REGION,
+			thread->arch.priv_stack_start - STACK_GUARD_SIZE,
+			STACK_GUARD_SIZE) < 0) {
+			LOG_ERR("thread %p's stack guard failed", thread);
+			return;
+		}
+	} else {
+		if (_mpu_configure(THREAD_STACK_GUARD_REGION,
+			thread->stack_info.start - STACK_GUARD_SIZE,
+			STACK_GUARD_SIZE) < 0) {
+			LOG_ERR("thread %p's stack guard failed", thread);
+			return;
+		}
+	}
+#else
+	if (_mpu_configure(THREAD_STACK_GUARD_REGION,
+		thread->stack_info.start - STACK_GUARD_SIZE,
+		STACK_GUARD_SIZE) < 0) {
+		LOG_ERR("thread %p's stack guard failed", thread);
+		return;
+	}
+#endif
+#endif
+
 #if defined(CONFIG_USERSPACE)
 	/* configure stack region of user thread */
 	if (thread->base.user_options & K_USER) {
 		LOG_DBG("configure user thread %p's stack", thread);
 		if (_mpu_configure(THREAD_STACK_USER_REGION,
-				   (uint32_t)thread->stack_info.start,
-				   thread->stack_info.size) < 0) {
+		(u32_t)thread->stack_obj, thread->stack_info.size) < 0) {
 			LOG_ERR("user thread %p's stack failed", thread);
 			return;
 		}
@@ -214,9 +263,9 @@ void arc_core_mpu_configure_thread(struct k_thread *thread)
  *
  * @param region_attr region attribute of default region
  */
-void arc_core_mpu_default(uint32_t region_attr)
+void arc_core_mpu_default(u32_t region_attr)
 {
-	uint32_t val =  z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) &
+	u32_t val =  z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) &
 		    (~AUX_MPU_RDP_ATTR_MASK);
 
 	region_attr &= AUX_MPU_RDP_ATTR_MASK;
@@ -231,8 +280,8 @@ void arc_core_mpu_default(uint32_t region_attr)
  * @param base    base address
  * @param region_attr region attribute
  */
-int arc_core_mpu_region(uint32_t index, uint32_t base, uint32_t size,
-			 uint32_t region_attr)
+int arc_core_mpu_region(u32_t index, u32_t base, u32_t size,
+			 u32_t region_attr)
 {
 	if (index >= get_num_regions()) {
 		return -EINVAL;
@@ -256,7 +305,7 @@ void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
 {
 	int region_index =
 		get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
-	uint32_t num_partitions;
+	u32_t num_partitions;
 	struct k_mem_partition *pparts;
 	struct k_mem_domain *mem_domain = NULL;
 
@@ -276,7 +325,7 @@ void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
 
 	for (; region_index >= 0; region_index--) {
 		if (num_partitions) {
-			LOG_DBG("set region 0x%x 0x%lx 0x%x",
+			LOG_DBG("set region 0x%x 0x%x 0x%x",
 				region_index, pparts->start, pparts->size);
 			_region_init(region_index, pparts->start,
 			 pparts->size, pparts->attr);
@@ -313,7 +362,7 @@ void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain)
  * @param partition_id  memory partition id
  */
 void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain,
-			uint32_t part_id)
+			u32_t part_id)
 {
 	ARG_UNUSED(domain);
 
@@ -348,7 +397,7 @@ int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
 	 */
 	for (r_index = 0; r_index < get_num_regions(); r_index++) {
 		if (!_is_enabled_region(r_index) ||
-		    !_is_in_region(r_index, (uint32_t)addr, size)) {
+		    !_is_in_region(r_index, (u32_t)addr, size)) {
 			continue;
 		}
 
@@ -370,12 +419,12 @@ int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
  * This function provides the default configuration mechanism for the Memory
  * Protection Unit (MPU).
  */
-static int arc_mpu_init(const struct device *arg)
+static int arc_mpu_init(struct device *arg)
 {
 	ARG_UNUSED(arg);
 
-	uint32_t num_regions;
-	uint32_t i;
+	u32_t num_regions;
+	u32_t i;
 
 	num_regions = get_num_regions();
 

arch/arc/core/mpu/arc_mpu_v3_internal.h

@@ -12,29 +12,22 @@
 
 #define AUX_MPU_RPER_ATTR_MASK (0x1FF)
 
+#define _ARC_V2_MPU_EN   (0x409)
+
+/* aux regs added in MPU version 3 */
+#define _ARC_V2_MPU_INDEX       (0x448) /* MPU index */
+#define _ARC_V2_MPU_RSTART      (0x449) /* MPU region start address */
+#define _ARC_V2_MPU_REND        (0x44A) /* MPU region end address */
+#define _ARC_V2_MPU_RPER        (0x44B) /* MPU region permission register */
+#define _ARC_V2_MPU_PROBE       (0x44C) /* MPU probe register */
+
+
 /* For MPU version 3, the minimum protection region size is 32 bytes */
 #define ARC_FEATURE_MPU_ALIGNMENT_BITS 5
 
 #define CALC_REGION_END_ADDR(start, size) \
 	(start + size - (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS))
 
-/* ARC MPU version 3 does not support mpu region overlap in hardware
- * so if we want to allocate MPU region dynamically, e.g. thread stack,
- * memory domain from a background region, a dynamic region splitting
- * approach is designed. pls see comments in
- *          _dynamic_region_allocate_and_init
- * But this approach has an impact on performance of thread switch.
- * As a trade off, we can use the default mpu region as the background region
- * to avoid the dynamic region splitting. This will give more privilege to
- * codes in kernel mode which can access the memory region not covered by
- * explicit mpu entry. Considering  memory protection is mainly used to
- * isolate malicious codes in user mode, it makes sense to get better
- * thread switch performance through default mpu region.
- * CONFIG_MPU_GAP_FILLING is used to turn this on/off.
- *
- */
-#if defined(CONFIG_MPU_GAP_FILLING)
-
 #if defined(CONFIG_USERSPACE) && defined(CONFIG_MPU_STACK_GUARD)
 /* 1 for stack guard , 1 for user thread, 1 for split */
 #define MPU_REGION_NUM_FOR_THREAD 3
@@ -45,21 +38,22 @@
 #define MPU_REGION_NUM_FOR_THREAD 0
 #endif
 
-#define MPU_DYNAMIC_REGION_AREAS_NUM 2
-
 /**
  * @brief internal structure holding information of
  * memory areas where dynamic MPU programming is allowed.
  */
 struct dynamic_region_info {
-	uint8_t index;
-	uint32_t base;
-	uint32_t size;
-	uint32_t attr;
+	u8_t index;
+	u32_t base;
+	u32_t size;
+	u32_t attr;
 };
 
-static uint8_t dynamic_regions_num;
-static uint8_t dynamic_region_index;
+#define MPU_DYNAMIC_REGION_AREAS_NUM 2
+
+static u8_t static_regions_num;
+static u8_t dynamic_regions_num;
+static u8_t dynamic_region_index;
 
 /**
  * Global array, holding the MPU region index of
@@ -67,74 +61,9 @@ static uint8_t dynamic_region_index;
  * regions may be configured.
  */
 static struct dynamic_region_info dyn_reg_info[MPU_DYNAMIC_REGION_AREAS_NUM];
-#endif /* CONFIG_MPU_GAP_FILLING */
 
-static uint8_t static_regions_num;
-
-#ifdef CONFIG_ARC_NORMAL_FIRMWARE
-/* \todo through secure service to access mpu */
-static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size,
-				uint32_t region_attr)
-{
-}
-
-static inline void _region_set_attr(uint32_t index, uint32_t attr)
-{
-
-}
-
-static inline uint32_t _region_get_attr(uint32_t index)
-{
-	return 0;
-}
-
-static inline uint32_t _region_get_start(uint32_t index)
-{
-	return 0;
-}
-
-static inline void _region_set_start(uint32_t index, uint32_t start)
-{
-
-}
-
-static inline uint32_t _region_get_end(uint32_t index)
-{
-	return 0;
-}
-
-static inline void _region_set_end(uint32_t index, uint32_t end)
-{
-}
-
-/**
- * This internal function probes the given addr's MPU index.if not
- * in MPU, returns error
- */
-static inline int _mpu_probe(uint32_t addr)
-{
-	return -EINVAL;
-}
-
-/**
- * This internal function checks if MPU region is enabled or not
- */
-static inline bool _is_enabled_region(uint32_t r_index)
-{
-	return false;
-}
-
-/**
- * This internal function check if the region is user accessible or not
- */
-static inline bool _is_user_accessible_region(uint32_t r_index, int write)
-{
-	return false;
-}
-#else /* CONFIG_ARC_NORMAL_FIRMWARE */
-/* the following functions are prepared for SECURE_FRIMWARE */
-static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size,
-				uint32_t region_attr)
+static inline void _region_init(u32_t index, u32_t region_addr, u32_t size,
+				u32_t region_attr)
 {
 	if (size < (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS)) {
 		size = (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS);
@@ -148,38 +77,38 @@ static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t s
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_RSTART, region_addr);
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_REND,
-			CALC_REGION_END_ADDR(region_addr, size));
+			      CALC_REGION_END_ADDR(region_addr, size));
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, region_attr);
 }
 
-static inline void _region_set_attr(uint32_t index, uint32_t attr)
+static inline void _region_set_attr(u32_t index, u32_t attr)
 {
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, attr |
 				 AUX_MPU_RPER_VALID_MASK);
 }
 
-static inline uint32_t _region_get_attr(uint32_t index)
+static inline u32_t _region_get_attr(u32_t index)
 {
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
 
 	return z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER);
 }
 
-static inline uint32_t _region_get_start(uint32_t index)
+static inline u32_t _region_get_start(u32_t index)
 {
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
 
 	return z_arc_v2_aux_reg_read(_ARC_V2_MPU_RSTART);
 }
 
-static inline void _region_set_start(uint32_t index, uint32_t start)
+static inline void _region_set_start(u32_t index, u32_t start)
 {
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_RSTART, start);
 }
 
-static inline uint32_t _region_get_end(uint32_t index)
+static inline u32_t _region_get_end(u32_t index)
 {
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
 
@@ -187,7 +116,7 @@ static inline uint32_t _region_get_end(uint32_t index)
 		(1 << ARC_FEATURE_MPU_ALIGNMENT_BITS);
 }
 
-static inline void _region_set_end(uint32_t index, uint32_t end)
+static inline void _region_set_end(u32_t index, u32_t end)
 {
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_REND, end -
@@ -198,9 +127,9 @@ static inline void _region_set_end(uint32_t index, uint32_t end)
  * This internal function probes the given addr's MPU index.if not
  * in MPU, returns error
  */
-static inline int _mpu_probe(uint32_t addr)
+static inline int _mpu_probe(u32_t addr)
 {
-	uint32_t val;
+	u32_t val;
 
 	z_arc_v2_aux_reg_write(_ARC_V2_MPU_PROBE, addr);
 	val = z_arc_v2_aux_reg_read(_ARC_V2_MPU_INDEX);
@@ -213,54 +142,6 @@ static inline int _mpu_probe(uint32_t addr)
 	}
 }
 
-/**
- * This internal function checks if MPU region is enabled or not
- */
-static inline bool _is_enabled_region(uint32_t r_index)
-{
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index);
-	return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER) &
-		 AUX_MPU_RPER_VALID_MASK) == AUX_MPU_RPER_VALID_MASK);
-}
-
-/**
- * This internal function check if the region is user accessible or not
- */
-static inline bool _is_user_accessible_region(uint32_t r_index, int write)
-{
-	uint32_t r_ap;
-
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index);
-	r_ap = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER);
-	r_ap &= AUX_MPU_RPER_ATTR_MASK;
-
-	if (write) {
-		return ((r_ap & (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW)) ==
-			(AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW));
-	}
-
-	return ((r_ap & (AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR)) ==
-		(AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR));
-}
-
-#endif /* CONFIG_ARC_NORMAL_FIRMWARE */
-
-/**
- * This internal function checks the area given by (start, size)
- * and returns the index if the area match one MPU entry
- */
-static inline int _get_region_index(uint32_t start, uint32_t size)
-{
-	int index = _mpu_probe(start);
-
-	if (index > 0 && index == _mpu_probe(start + size - 1)) {
-		return index;
-	}
-
-	return -EINVAL;
-}
-
-#if defined(CONFIG_MPU_GAP_FILLING)
 /**
  * This internal function allocates a dynamic MPU region and returns
  * the index or error
@@ -275,6 +156,51 @@ static inline int _dynamic_region_allocate_index(void)
 	return dynamic_region_index++;
 }
 
+/**
+ * This internal function checks if MPU region is enabled or not
+ */
+static inline bool _is_enabled_region(u32_t r_index)
+{
+	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index);
+	return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER) &
+		 AUX_MPU_RPER_VALID_MASK) == AUX_MPU_RPER_VALID_MASK);
+}
+
+/**
+ * This internal function checks the area given by (start, size)
+ * and returns the index if the area match one MPU entry
+ */
+static inline int _get_region_index(u32_t start, u32_t size)
+{
+	int index = _mpu_probe(start);
+
+	if (index > 0 && index == _mpu_probe(start + size - 1)) {
+		return index;
+	}
+
+	return -EINVAL;
+}
+
+/**
+ * This internal function check if the region is user accessible or not
+ */
+static inline bool _is_user_accessible_region(u32_t r_index, int write)
+{
+	u32_t r_ap;
+
+	z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index);
+	r_ap = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER);
+	r_ap &= AUX_MPU_RPER_ATTR_MASK;
+
+	if (write) {
+		return ((r_ap & (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW)) ==
+			(AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW));
+	}
+
+	return ((r_ap & (AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR)) ==
+		(AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR));
+}
+
 /* @brief allocate and init a dynamic MPU region
  *
  * This internal function performs the allocation and initialization of
@@ -285,8 +211,8 @@ static inline int _dynamic_region_allocate_index(void)
  * @param attr region attribute
  * @return  <0 failure, >0  allocated dynamic region index
  */
-static int _dynamic_region_allocate_and_init(uint32_t base, uint32_t size,
-	 uint32_t attr)
+static int _dynamic_region_allocate_and_init(u32_t base, u32_t size,
+	 u32_t attr)
 {
 	int u_region_index = _get_region_index(base, size);
 	int region_index;
@@ -311,10 +237,10 @@ static int _dynamic_region_allocate_and_init(uint32_t base, uint32_t size,
 	 * region, possibly splitting the underlying region into two.
 	 */
 
-	uint32_t u_region_start = _region_get_start(u_region_index);
-	uint32_t u_region_end = _region_get_end(u_region_index);
-	uint32_t u_region_attr = _region_get_attr(u_region_index);
-	uint32_t end = base + size;
+	u32_t u_region_start = _region_get_start(u_region_index);
+	u32_t u_region_end = _region_get_end(u_region_index);
+	u32_t u_region_attr = _region_get_attr(u_region_index);
+	u32_t end = base + size;
 
 
 	if ((base == u_region_start) && (end == u_region_end)) {
@@ -387,8 +313,8 @@ static int _dynamic_region_allocate_and_init(uint32_t base, uint32_t size,
  */
 static void _mpu_reset_dynamic_regions(void)
 {
-	uint32_t i;
-	uint32_t num_regions = get_num_regions();
+	u32_t i;
+	u32_t num_regions = get_num_regions();
 
 	for (i = static_regions_num; i < num_regions; i++) {
 		_region_init(i, 0, 0, 0);
@@ -413,75 +339,12 @@ static void _mpu_reset_dynamic_regions(void)
  * @param   base    base address in RAM
  * @param   size    size of the region
  */
-static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size)
+static inline int _mpu_configure(u8_t type, u32_t base, u32_t size)
 {
-	uint32_t region_attr = get_region_attr_by_type(type);
+	u32_t region_attr = get_region_attr_by_type(type);
 
 	return _dynamic_region_allocate_and_init(base, size, region_attr);
 }
-#else
-/**
- * This internal function is utilized by the MPU driver to parse the intent
- * type (i.e. THREAD_STACK_REGION) and return the correct region index.
- */
-static inline int get_region_index_by_type(uint32_t type)
-{
-	/*
-	 * The new MPU regions are allocated per type after the statically
-	 * configured regions. The type is one-indexed rather than
-	 * zero-indexed.
-	 *
-	 * For ARC MPU v2, the smaller index has higher priority, so the
-	 * index is allocated in reverse order. Static regions start from
-	 * the biggest index, then thread related regions.
-	 *
-	 */
-	switch (type) {
-	case THREAD_STACK_USER_REGION:
-		return static_regions_num + THREAD_STACK_REGION;
-	case THREAD_STACK_REGION:
-	case THREAD_APP_DATA_REGION:
-	case THREAD_STACK_GUARD_REGION:
-		return static_regions_num + type;
-	case THREAD_DOMAIN_PARTITION_REGION:
-#if defined(CONFIG_MPU_STACK_GUARD)
-		return static_regions_num + type;
-#else
-		/*
-		 * Start domain partition region from stack guard region
-		 * since stack guard is not enabled.
-		 */
-		return static_regions_num + type - 1;
-#endif
-	default:
-		__ASSERT(0, "Unsupported type");
-		return -EINVAL;
-	}
-}
-
-/**
- * @brief configure the base address and size for an MPU region
- *
- * @param   type    MPU region type
- * @param   base    base address in RAM
- * @param   size    size of the region
- */
-static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size)
-{
-	int region_index =  get_region_index_by_type(type);
-	uint32_t region_attr = get_region_attr_by_type(type);
-
-	LOG_DBG("Region info: 0x%x 0x%x", base, size);
-
-	if (region_attr == 0U || region_index < 0) {
-		return -EINVAL;
-	}
-
-	_region_init(region_index, base, size, region_attr);
-
-	return 0;
-}
-#endif
 
 /* ARC Core MPU Driver API Implementation for ARC MPUv3 */
 
@@ -490,14 +353,7 @@ static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size)
  */
 void arc_core_mpu_enable(void)
 {
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-/* the default region:
- * secure:0x8000, SID:0x10000, KW:0x100 KR:0x80
- */
-#define MPU_ENABLE_ATTR	0x18180
-#else
-#define MPU_ENABLE_ATTR	0
-#endif
+#define MPU_ENABLE_ATTR   0
 	arc_core_mpu_default(MPU_ENABLE_ATTR);
 }
 
@@ -509,8 +365,7 @@ void arc_core_mpu_disable(void)
 	/* MPU is always enabled, use default region to
 	 * simulate MPU disable
 	 */
-	arc_core_mpu_default(REGION_ALL_ATTR | AUX_MPU_ATTR_S |
-				AUX_MPU_RPER_SID1);
+	arc_core_mpu_default(REGION_ALL_ATTR);
 }
 
 /**
@@ -520,7 +375,6 @@ void arc_core_mpu_disable(void)
  */
 void arc_core_mpu_configure_thread(struct k_thread *thread)
 {
-#if defined(CONFIG_MPU_GAP_FILLING)
 /* the mpu entries of ARC MPUv3 are divided into 2 parts:
  * static entries: global mpu entries, not changed in context switch
  * dynamic entries: MPU entries changed in context switch and
@@ -533,50 +387,60 @@ void arc_core_mpu_configure_thread(struct k_thread *thread)
  * entries
  */
 	_mpu_reset_dynamic_regions();
-#endif
 #if defined(CONFIG_MPU_STACK_GUARD)
-	uint32_t guard_start;
-
-	/* Set location of guard area when the thread is running in
-	 * supervisor mode. For a supervisor thread, this is just low
-	 * memory in the stack buffer. For a user thread, it only runs
-	 * in supervisor mode when handling a system call on the privilege
-	 * elevation stack.
-	 */
 #if defined(CONFIG_USERSPACE)
 	if ((thread->base.user_options & K_USER) != 0U) {
-		guard_start = thread->arch.priv_stack_start;
-	} else
-#endif
-	{
-		guard_start = thread->stack_info.start;
+		/* the areas before and after the user stack of thread is
+		 * kernel only. These area can be used as stack guard.
+		 * -----------------------
+		 * |  kernel only area   |
+		 * |---------------------|
+		 * |  user stack         |
+		 * |---------------------|
+		 * |privilege stack guard|
+		 * |---------------------|
+		 * |  privilege stack    |
+		 * -----------------------
+		 */
+		if (_mpu_configure(THREAD_STACK_GUARD_REGION,
+			thread->arch.priv_stack_start - STACK_GUARD_SIZE,
+			STACK_GUARD_SIZE) < 0) {
+			LOG_ERR("thread %p's stack guard failed", thread);
+			return;
+		}
+	} else {
+		if (_mpu_configure(THREAD_STACK_GUARD_REGION,
+			thread->stack_info.start - STACK_GUARD_SIZE,
+			STACK_GUARD_SIZE) < 0) {
+			LOG_ERR("thread %p's stack guard failed", thread);
+			return;
+		}
 	}
-	guard_start -= Z_ARC_STACK_GUARD_SIZE;
-
-	if (_mpu_configure(THREAD_STACK_GUARD_REGION, guard_start,
-		Z_ARC_STACK_GUARD_SIZE) < 0) {
+#else
+	if (_mpu_configure(THREAD_STACK_GUARD_REGION,
+		thread->stack_info.start - STACK_GUARD_SIZE,
+		STACK_GUARD_SIZE) < 0) {
 		LOG_ERR("thread %p's stack guard failed", thread);
 		return;
 	}
-#endif /* CONFIG_MPU_STACK_GUARD */
+#endif
+#endif
 
 #if defined(CONFIG_USERSPACE)
+	u32_t num_partitions;
+	struct k_mem_partition *pparts;
+	struct k_mem_domain *mem_domain = thread->mem_domain_info.mem_domain;
+
 	/* configure stack region of user thread */
 	if (thread->base.user_options & K_USER) {
 		LOG_DBG("configure user thread %p's stack", thread);
 		if (_mpu_configure(THREAD_STACK_USER_REGION,
-				   (uint32_t)thread->stack_info.start,
-				   thread->stack_info.size) < 0) {
+		(u32_t)thread->stack_obj, thread->stack_info.size) < 0) {
 			LOG_ERR("thread %p's stack failed", thread);
 			return;
 		}
 	}
 
-#if defined(CONFIG_MPU_GAP_FILLING)
-	uint32_t num_partitions;
-	struct k_mem_partition *pparts;
-	struct k_mem_domain *mem_domain = thread->mem_domain_info.mem_domain;
-
 	/* configure thread's memory domain */
 	if (mem_domain) {
 		LOG_DBG("configure thread %p's domain: %p",
@@ -588,7 +452,7 @@ void arc_core_mpu_configure_thread(struct k_thread *thread)
 		pparts = NULL;
 	}
 
-	for (uint32_t i = 0; i < num_partitions; i++) {
+	for (u32_t i = 0; i < num_partitions; i++) {
 		if (pparts->size) {
 			if (_dynamic_region_allocate_and_init(pparts->start,
 				pparts->size, pparts->attr) < 0) {
@@ -600,9 +464,6 @@ void arc_core_mpu_configure_thread(struct k_thread *thread)
 		}
 		pparts++;
 	}
-#else
-	arc_core_mpu_configure_mem_domain(thread);
-#endif
 #endif
 }
 
@@ -611,13 +472,14 @@ void arc_core_mpu_configure_thread(struct k_thread *thread)
  *
  * @param region_attr region attribute of default region
  */
-void arc_core_mpu_default(uint32_t region_attr)
+void arc_core_mpu_default(u32_t region_attr)
 {
-#ifdef CONFIG_ARC_NORMAL_FIRMWARE
-/* \todo through secure service to access mpu */
-#else
-	z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, region_attr);
-#endif
+	u32_t val =  z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) &
+		    (~AUX_MPU_RPER_ATTR_MASK);
+
+	region_attr &= AUX_MPU_RPER_ATTR_MASK;
+
+	z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, region_attr | val);
 }
 
 /**
@@ -628,8 +490,8 @@ void arc_core_mpu_default(uint32_t region_attr)
  * @param size  region size
  * @param region_attr region attribute
  */
-int arc_core_mpu_region(uint32_t index, uint32_t base, uint32_t size,
-			 uint32_t region_attr)
+int arc_core_mpu_region(u32_t index, u32_t base, u32_t size,
+			 u32_t region_attr)
 {
 	if (index >= get_num_regions()) {
 		return -EINVAL;
@@ -648,56 +510,10 @@ int arc_core_mpu_region(uint32_t index, uint32_t base, uint32_t size,
  *
  * @param thread the thread which has memory domain
  */
-#if defined(CONFIG_MPU_GAP_FILLING)
 void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
 {
 	arc_core_mpu_configure_thread(thread);
 }
-#else
-void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
-{
-	uint32_t region_index;
-	uint32_t num_partitions;
-	uint32_t num_regions;
-	struct k_mem_partition *pparts;
-	struct k_mem_domain *mem_domain = NULL;
-
-	if (thread) {
-		mem_domain = thread->mem_domain_info.mem_domain;
-	}
-
-	if (mem_domain) {
-		LOG_DBG("configure domain: %p", mem_domain);
-		num_partitions = mem_domain->num_partitions;
-		pparts = mem_domain->partitions;
-	} else {
-		LOG_DBG("disable domain partition regions");
-		num_partitions = 0U;
-		pparts = NULL;
-	}
-
-	num_regions = get_num_regions();
-	region_index = get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
-
-	while (num_partitions && region_index < num_regions) {
-		if (pparts->size > 0) {
-			LOG_DBG("set region 0x%x 0x%lx 0x%x",
-				region_index, pparts->start, pparts->size);
-			_region_init(region_index, pparts->start,
-				     pparts->size, pparts->attr);
-			region_index++;
-		}
-		pparts++;
-		num_partitions--;
-	}
-
-	while (region_index < num_regions) {
-		/* clear the left mpu entries */
-		_region_init(region_index, 0, 0, 0);
-		region_index++;
-	}
-}
-#endif
 
 /**
  * @brief remove MPU regions for the memory partitions of the memory domain
@@ -706,7 +522,7 @@ void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
  */
 void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain)
 {
-	uint32_t num_partitions;
+	u32_t num_partitions;
 	struct k_mem_partition *pparts;
 	int index;
 
@@ -720,17 +536,13 @@ void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain)
 		pparts = NULL;
 	}
 
-	for (uint32_t i = 0; i < num_partitions; i++) {
+	for (u32_t i = 0; i < num_partitions; i++) {
 		if (pparts->size) {
 			index = _get_region_index(pparts->start,
 			 pparts->size);
 			if (index > 0) {
-#if defined(CONFIG_MPU_GAP_FILLING)
 				_region_set_attr(index,
-				REGION_KERNEL_RAM_ATTR);
-#else
-				_region_init(index, 0, 0, 0);
-#endif
+				 REGION_KERNEL_RAM_ATTR);
 			}
 		}
 		pparts++;
@@ -743,7 +555,7 @@ void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain)
  * @param partition_id  memory partition id
  */
 void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain,
-			uint32_t partition_id)
+			u32_t partition_id)
 {
 	struct k_mem_partition *partition = &domain->partitions[partition_id];
 
@@ -755,11 +567,7 @@ void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain,
 	}
 
 	LOG_DBG("remove region 0x%x", region_index);
-#if defined(CONFIG_MPU_GAP_FILLING)
 	_region_set_attr(region_index, REGION_KERNEL_RAM_ATTR);
-#else
-	_region_init(region_index, 0, 0, 0);
-#endif
 }
 
 /**
@@ -767,13 +575,8 @@ void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain,
  */
 int arc_core_mpu_get_max_domain_partition_regions(void)
 {
-#if defined(CONFIG_MPU_GAP_FILLING)
 	/* consider the worst case: each partition requires split */
 	return (get_num_regions() - MPU_REGION_NUM_FOR_THREAD) / 2;
-#else
-	return get_num_regions() -
-	       get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION) - 1;
-#endif
 }
 
 /**
@@ -782,28 +585,24 @@ int arc_core_mpu_get_max_domain_partition_regions(void)
 int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
 {
 	int r_index;
-	int key = arch_irq_lock();
+
 
 	/*
 	 * For ARC MPU v3, overlapping is not supported.
 	 * we can stop the iteration immediately once we find the
 	 * matched region that grants permission or denies access.
 	 */
-	r_index = _mpu_probe((uint32_t)addr);
+	r_index = _mpu_probe((u32_t)addr);
 	/*  match and the area is in one region */
-	if (r_index >= 0 && r_index == _mpu_probe((uint32_t)addr + (size - 1))) {
+	if (r_index >= 0 && r_index == _mpu_probe((u32_t)addr + (size - 1))) {
 		if (_is_user_accessible_region(r_index, write)) {
-			r_index = 0;
+			return 0;
 		} else {
-			r_index = -EPERM;
+			return -EPERM;
 		}
-	} else {
-		r_index = -EPERM;
 	}
 
-	arch_irq_unlock(key);
-
-	return r_index;
+	return -EPERM;
 }
 #endif /* CONFIG_USERSPACE */
 
@@ -814,11 +613,11 @@ int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
  * This function provides the default configuration mechanism for the Memory
  * Protection Unit (MPU).
  */
-static int arc_mpu_init(const struct device *arg)
+static int arc_mpu_init(struct device *arg)
 {
 	ARG_UNUSED(arg);
-	uint32_t num_regions;
-	uint32_t i;
+	u32_t num_regions;
+	u32_t i;
 
 	num_regions = get_num_regions();
 
@@ -830,27 +629,20 @@ static int arc_mpu_init(const struct device *arg)
 		return -EINVAL;
 	}
 
-	static_regions_num = 0;
-
 	/* Disable MPU */
 	arc_core_mpu_disable();
 
 	for (i = 0U; i < mpu_config.num_regions; i++) {
-		/* skip empty region */
-		if (mpu_config.mpu_regions[i].size == 0) {
-			continue;
-		}
-#if defined(CONFIG_MPU_GAP_FILLING)
-		_region_init(static_regions_num,
+		_region_init(i,
 			     mpu_config.mpu_regions[i].base,
 			     mpu_config.mpu_regions[i].size,
 			     mpu_config.mpu_regions[i].attr);
 
 		/* record the static region which can be split */
 		if (mpu_config.mpu_regions[i].attr & REGION_DYNAMIC) {
-			if (dynamic_regions_num >=
+			if (dynamic_regions_num >
 			MPU_DYNAMIC_REGION_AREAS_NUM) {
-				LOG_ERR("not enough dynamic regions %d",
+				LOG_ERR("no enough dynamic regions %d",
 				 dynamic_regions_num);
 				return -EINVAL;
 			}
@@ -865,22 +657,11 @@ static int arc_mpu_init(const struct device *arg)
 
 			dynamic_regions_num++;
 		}
-		static_regions_num++;
-#else
-		/* dynamic region will be covered by default mpu setting
-		 * no need to configure
-		 */
-		if (!(mpu_config.mpu_regions[i].attr & REGION_DYNAMIC)) {
-			_region_init(static_regions_num,
-			     mpu_config.mpu_regions[i].base,
-			     mpu_config.mpu_regions[i].size,
-			     mpu_config.mpu_regions[i].attr);
-			static_regions_num++;
-		}
-#endif
 	}
 
-	for (i = static_regions_num; i < num_regions; i++) {
+	static_regions_num = mpu_config.num_regions;
+
+	for (; i < num_regions; i++) {
 		_region_init(i, 0, 0, 0);
 	}
 

arch/arc/core/offsets/offsets.c

@@ -22,12 +22,13 @@
  * completeness.
  */
 
-#include <kernel.h>
-#include <kernel_arch_data.h>
 #include <gen_offset.h>
+#include <kernel_structs.h>
 #include <kernel_offsets.h>
 
+GEN_OFFSET_SYM(_thread_arch_t, intlock_key);
 GEN_OFFSET_SYM(_thread_arch_t, relinquish_cause);
+GEN_OFFSET_SYM(_thread_arch_t, return_value);
 #ifdef CONFIG_ARC_STACK_CHECKING
 GEN_OFFSET_SYM(_thread_arch_t, k_stack_base);
 GEN_OFFSET_SYM(_thread_arch_t, k_stack_top);
@@ -37,11 +38,6 @@ GEN_OFFSET_SYM(_thread_arch_t, u_stack_top);
 #endif
 #endif
 
-#ifdef CONFIG_USERSPACE
-GEN_OFFSET_SYM(_thread_arch_t, priv_stack_start);
-#endif
-
-
 /* ARCv2-specific IRQ stack frame structure member offsets */
 GEN_OFFSET_SYM(_isf_t, r0);
 GEN_OFFSET_SYM(_isf_t, r1);
@@ -100,11 +96,9 @@ GEN_OFFSET_SYM(_callee_saved_stack_t, user_sp);
 #endif
 #endif
 GEN_OFFSET_SYM(_callee_saved_stack_t, r30);
-#ifdef CONFIG_ARC_HAS_ACCL_REGS
+#ifdef CONFIG_FP_SHARING
 GEN_OFFSET_SYM(_callee_saved_stack_t, r58);
 GEN_OFFSET_SYM(_callee_saved_stack_t, r59);
-#endif
-#ifdef CONFIG_FPU_SHARING
 GEN_OFFSET_SYM(_callee_saved_stack_t, fpu_status);
 GEN_OFFSET_SYM(_callee_saved_stack_t, fpu_ctrl);
 #ifdef CONFIG_FP_FPU_DA

arch/arc/core/prep_c.c

@@ -46,7 +46,7 @@ static void disable_icache(void)
 		return; /* skip if i-cache is not present */
 	}
 	z_arc_v2_aux_reg_write(_ARC_V2_IC_IVIC, 0);
-	__builtin_arc_nop();
+	__asm__ __volatile__ ("nop");
 	z_arc_v2_aux_reg_write(_ARC_V2_IC_CTRL, 1);
 }
 
@@ -73,6 +73,38 @@ static void invalidate_dcache(void)
 }
 #endif
 
+/**
+ *
+ * @brief Adjust the vector table base
+ *
+ * Set the vector table base if the value found in the
+ * _ARC_V2_IRQ_VECT_BASE auxiliary register is different from the
+ * _VectorTable known by software. It is important to do this very early
+ * so that exception vectors can be handled.
+ *
+ * @return N/A
+ */
+
+static void adjust_vector_table_base(void)
+{
+#ifdef CONFIG_ARC_HAS_SECURE
+#undef _ARC_V2_IRQ_VECT_BASE
+#define _ARC_V2_IRQ_VECT_BASE _ARC_V2_IRQ_VECT_BASE_S
+#endif
+	extern struct vector_table _VectorTable;
+	unsigned int vbr;
+	/* if the compiled-in vector table is different
+	 * from the base address known by the ARC CPU,
+	 * set the vector base to the compiled-in address.
+	 */
+	vbr = z_arc_v2_aux_reg_read(_ARC_V2_IRQ_VECT_BASE);
+	vbr &= 0xfffffc00;
+	if (vbr != (unsigned int)&_VectorTable) {
+		z_arc_v2_aux_reg_write(_ARC_V2_IRQ_VECT_BASE,
+					(unsigned int)&_VectorTable);
+	}
+}
+
 extern FUNC_NORETURN void z_cstart(void);
 /**
  *
@@ -86,6 +118,7 @@ extern FUNC_NORETURN void z_cstart(void);
 void _PrepC(void)
 {
 	z_icache_setup();
+	adjust_vector_table_base();
 	z_bss_zero();
 	z_data_copy();
 	z_cstart();

arch/arc/core/regular_irq.S

@@ -17,176 +17,24 @@
 #include <kernel_structs.h>
 #include <offsets_short.h>
 #include <toolchain.h>
-#include <linker/sections.h>
 #include <arch/cpu.h>
 #include <swap_macros.h>
 
 GTEXT(_rirq_enter)
 GTEXT(_rirq_exit)
-GTEXT(_rirq_newthread_switch)
+GTEXT(_rirq_common_interrupt_swap)
+GDATA(exc_nest_count)
 
-/*
+#if 0 /* TODO: when FIRQ is not present, all would be regular */
+#define NUM_REGULAR_IRQ_PRIO_LEVELS CONFIG_NUM_IRQ_PRIO_LEVELS
+#else
+#define NUM_REGULAR_IRQ_PRIO_LEVELS (CONFIG_NUM_IRQ_PRIO_LEVELS-1)
+#endif
+/* note: the above define assumes that prio 0 IRQ is for FIRQ, and
+ * that all others are regular interrupts.
+ * TODO: Revist this if FIRQ becomes configurable.
+ */
 
-===========================================================
- RETURN FROM INTERRUPT TO COOPERATIVE THREAD
-===========================================================
-
-That's a special case because:
- 1. We return from IRQ handler to a cooperative thread
- 2. During IRQ handling context switch did happen
- 3. Returning to a thread which previously gave control
-    to another thread because of:
-     - Calling k_sleep()
-     - Explicitly yielding
-     - Bumping into locked sync primitive etc
-
-What (3) means is before passing control to another thread our thread
-in question:
- a. Stashed all precious caller-saved registers on its stack
- b. Pushed return address to the top of the stack as well
-
-That's how thread's stack looks like right before jumping to another thread:
------------------------------>8---------------------------------
-PRE-CONTEXT-SWITCH STACK
-
-  lower_addr, let's say: 0x1000
-
-         --------------------------------------
-  SP ->  | Return address; PC (Program Counter), in fact value taken from
-         | BLINK register in arch_switch()
-         --------------------------------------
-         | STATUS32 value, we explicitly save it here for later usage, read-on
-         --------------------------------------
-         | Caller-saved registers: some of R0-R12
-         --------------------------------------
-         |...
-         |...
-
-  higher_addr, let's say: 0x2000
------------------------------>8---------------------------------
-
-When context gets switched the kernel saves callee-saved registers in the
-thread's stack right on top of pre-switch contents so that's what we have:
------------------------------>8---------------------------------
-POST-CONTEXT-SWITCH STACK
-
-  lower_addr, let's say: 0x1000
-
-         --------------------------------------
-SP ->    | Callee-saved registers: see struct _callee_saved_stack{}
-         |  |- R13
-         |  |- R14
-         |  | ...
-         |  \- FP
-         |   ...
-         --------------------------------------
-         | Return address; PC (Program Counter)
-         --------------------------------------
-         | STATUS32 value
-         --------------------------------------
-         | Caller-saved registers: some of R0-R12
-         --------------------------------------
-         |...
-         |...
-
-  higher_addr, let's say: 0x2000
------------------------------>8---------------------------------
-
-So how do we return in such a complex scenario.
-
-First we restore callee-saved regs with help of _load_callee_saved_regs().
-Now we're back to PRE-CONTEXT-SWITCH STACK (see above).
-
-Logically our next step is to load return address from the top of the stack
-and jump to that address to continue execution of the desired thread, but
-we're still in interrupt handling mode and the only way to return to normal
-execution mode is to execute "rtie" instruction. And here we need to deal
-with peculiarities of return from IRQ on ARCv2 cores.
-
-Instead of simple jump to a return address stored in the tip of thread's stack
-(with subsequent interrupt enable) ARCv2 core additionally automatically
-restores some registers from stack. Most important ones are
-PC ("Program Counter") which holds address of the next instruction to execute
-and STATUS32 which holds imortant flags including global interrupt enable,
-zero, carry etc.
-
-To make things worse depending on ARC core configuration and run-time setup
-of certain features different set of registers will be restored.
-
-Typically those same registers are automatically saved on stack on entry to
-an interrupt, but remember we're returning to the thread which was
-not interrupted by interrupt and so on its stack there're no automatically
-saved registers, still inevitably on RTIE execution register restoration
-will happen. So if we do nothing special we'll end-up with that:
------------------------------>8---------------------------------
-  lower_addr, let's say: 0x1000
-
-         --------------------------------------
-    #    | Return address; PC (Program Counter)
-    |    --------------------------------------
-    |    | STATUS32 value
-    |    --------------------------------------
-    |
- sizeof(_irq_stack_frame)
-    |
-    |    | Caller-saved registers: R0-R12
-    V    --------------------------------------
-         |...
-  SP ->  | < Some data on thread's stack>
-         |...
-
-  higher_addr, let's say: 0x2000
------------------------------>8---------------------------------
-
-I.e. we'll go much deeper down the stack over needed return address, read
-some value from unexpected location in stack and will try to jump there.
-Nobody knows were we end-up then.
-
-To work-around that problem we need to mimic existance of IRQ stack frame
-of which we really only need return address obviously to return where we
-need to. For that we just shift SP so that it points sizeof(_irq_stack_frame)
-above like that:
------------------------------>8---------------------------------
-  lower_addr, let's say: 0x1000
-
-  SP ->  |
-    A    | < Some unrelated data >
-    |    |
-    |
- sizeof(_irq_stack_frame)
-    |
-    |    --------------------------------------
-    |    | Return address; PC (Program Counter)
-    |    --------------------------------------
-    #    | STATUS32 value
-         --------------------------------------
-         | Caller-saved registers: R0-R12
-         --------------------------------------
-         |...
-         | < Some data on thread's stack>
-         |...
-
-  higher_addr, let's say: 0x2000
------------------------------>8---------------------------------
-
-Indeed R0-R13 "restored" from IRQ stack frame will contain garbage but
-it makes no difference because we're returning to execution of code as if
-we're returning from yet another function call and so we will restore
-all needed registers from the stack.
-
-One other important remark here is R13.
-
-CPU hardware automatically save/restore registers in pairs and since we
-wanted to save/restore R12 in IRQ stack frame as a caller-saved register we
-just happen to do that for R13 as well. But given compiler treats it as
-a callee-saved register we save/restore it separately in _callee_saved_stack
-structure. And when we restore callee-saved registers from stack we among
-other registers recover R13. But later on return from IRQ with RTIE
-instruction, R13 will be "restored" again from fake IRQ stack frame and
-if we don't copy correct R13 value to fake IRQ stack frame R13 value
-will be corrupted.
-
-*/
 
 /**
  *
@@ -203,22 +51,32 @@ will be corrupted.
 
 SECTION_FUNC(TEXT, _rirq_enter)
 
-/* the ISR will be handled in separate interrupt stack,
- * so stack checking must be diabled, or exception will
- * be caused
- */
-	_disable_stack_checking r2
+
+#ifdef CONFIG_ARC_STACK_CHECKING
+#ifdef CONFIG_ARC_HAS_SECURE
+	lr r2, [_ARC_V2_SEC_STAT]
+	bclr r2, r2, _ARC_V2_SEC_STAT_SSC_BIT
+	/* sflag r2 */
+	/* sflag instruction is not supported in current ARC GNU */
+	.long 0x00bf302f
+#else
+	/* disable stack checking */
+	lr r2, [_ARC_V2_STATUS32]
+	bclr r2, r2, _ARC_V2_STATUS32_SC_BIT
+	kflag r2
+#endif
+#endif
 	clri
+	ld r1, [exc_nest_count]
+	add r0, r1, 1
+	st r0, [exc_nest_count]
+	cmp r1, 0
 
-	/* check whether irq stack is used, if
-	 * not switch to isr stack
-	 */
-	_check_and_inc_int_nest_counter r0, r1
+	bgt.d  rirq_nest
+	mov r0, sp
 
-	bne.d rirq_nest
-	mov_s r0, sp
-
-	_get_curr_cpu_irq_stack sp
+	mov r1, _kernel
+	ld sp, [r1, _kernel_offset_to_irq_stack]
 rirq_nest:
 	push_s r0
 
@@ -238,65 +96,140 @@ SECTION_FUNC(TEXT, _rirq_exit)
 
 	pop sp
 
-	_dec_int_nest_counter r0, r1
-
-	_check_nest_int_by_irq_act r0, r1
-
-	jne _rirq_no_switch
-
-	/* sp is struct k_thread **old of z_arc_switch_in_isr
-	 * which is a wrapper of z_get_next_switch_handle.
-	 * r0 contains the 1st thread in ready queue. if
-	 * it equals _current(r2) ,then do swap, or no swap.
+	mov	r1, exc_nest_count
+	ld	r0, [r1]
+	sub	r0, r0, 1
+	st	r0, [r1]
+	/*
+	 * using exc_nest_count to decide whether is nest int is not reliable.
+	 * a better option is to use IRQ_ACT
+	 * A case is:  a high priority int preempts a low priority int before
+	 * rirq_enter/firq_enter, then in _rirq_exit/_firq_exit, it will see
+	 * exc_nest_cout is 0, this will lead to possible thread switch, but
+	 * a low priority int is still pending.
+	 *
+	 * If multi bits in IRQ_ACT are set, i.e. last bit != fist bit, it's
+	 * in nest interrupt
 	 */
-	_get_next_switch_handle
+	lr 	r0, [_ARC_V2_AUX_IRQ_ACT]
+	and 	r0, r0, 0xffff
+	ffs	r1, r0
+	fls	r2, r0
+	cmp	r1, r2
+	jne	_rirq_return_from_rirq
 
-	cmp r0, r2
-	beq _rirq_no_switch
-
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	/* here need to remember SEC_STAT.IRM bit */
-	lr r3, [_ARC_V2_SEC_STAT]
-	push_s r3
+#ifdef CONFIG_STACK_SENTINEL
+	bl z_check_stack_sentinel
 #endif
 
-	/* r2 is old thread */
-	_irq_store_old_thread_callee_regs
+#ifdef CONFIG_PREEMPT_ENABLED
+
+	mov r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
+
+	/*
+	 * Lock interrupts to ensure kernel queues do not change from this
+	 * point on until return from interrupt.
+	 */
+
+	/*
+	 * Both (a)reschedule and (b)non-reschedule cases need to load the
+	 * current thread's stack, but don't have to use it until the decision
+	 * is taken: load the delay slots with the 'load stack pointer'
+	 * instruction.
+	 *
+	 * a) needs to load it to save outgoing context.
+	 * b) needs to load it to restore the interrupted context.
+	 */
+
+	/* check if the current thread needs to be rescheduled */
+	ld_s r0, [r1, _kernel_offset_to_ready_q_cache]
+	cmp_s r0, r2
+	beq _rirq_no_reschedule
+
+	/* cached thread to run is in r0, fall through */
+
+.balign 4
+_rirq_reschedule:
+
+	/* _save_callee_saved_regs expects outgoing thread in r2 */
+	_save_callee_saved_regs
 
 	st _CAUSE_RIRQ, [r2, _thread_offset_to_relinquish_cause]
 
-	/* mov new thread (r0) to r2 */
+	/* incoming thread is in r0: it becomes the new 'current' */
 	mov r2, r0
+	st_s r2, [r1, _kernel_offset_to_current]
 
-/* _rirq_newthread_switch required by exception handling */
-.align 4
-_rirq_newthread_switch:
+.balign 4
+_rirq_common_interrupt_swap:
+	/* r2 contains pointer to new thread */
 
-	_load_new_thread_callee_regs
+#ifdef CONFIG_ARC_STACK_CHECKING
+	_load_stack_check_regs
+#endif
+	/*
+	 * _load_callee_saved_regs expects incoming thread in r2.
+	 * _load_callee_saved_regs restores the stack pointer.
+	 */
+	_load_callee_saved_regs
 
-	breq r3, _CAUSE_RIRQ, _rirq_switch_from_rirq
-	nop_s
-	breq r3, _CAUSE_FIRQ, _rirq_switch_from_firq
-	nop_s
+#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
+	push_s r2
+	mov r0, r2
+	bl configure_mpu_thread
+	pop_s r2
+#endif
+
+#if defined(CONFIG_USERSPACE)
+/*
+ * when USERSPACE is enabled, according to ARCv2 ISA, SP will be switched
+ * if interrupt comes out in user mode, and will be recorded in bit 31
+ * (U bit) of IRQ_ACT. when interrupt exits, SP will be switched back
+ * according to U bit.
+ *
+ * For the case that context switches in interrupt, the target sp must be
+ * thread's kernel stack, no need to do hardware sp switch. so, U bit should
+ * be cleared.
+ */
+	lr r0, [_ARC_V2_AUX_IRQ_ACT]
+	bclr r0, r0, 31
+	sr r0, [_ARC_V2_AUX_IRQ_ACT]
+#endif
+
+	ld r3, [r2, _thread_offset_to_relinquish_cause]
+
+	breq r3, _CAUSE_RIRQ, _rirq_return_from_rirq
+	nop
+	breq r3, _CAUSE_FIRQ, _rirq_return_from_firq
+	nop
 
 	/* fall through */
 
-.align 4
-_rirq_switch_from_coop:
-
-	/* for a cooperative switch, it's not in irq, so
-	 * need to set some regs for irq return
-	 */
-	_set_misc_regs_irq_switch_from_coop
+.balign 4
+_rirq_return_from_coop:
 
 	/*
-	 * See verbose explanation of
-	 * RETURN FROM INTERRUPT TO COOPERATIVE THREAD above
+	 * status32, sec_stat (when CONFIG_ARC_HAS_SECURE is enabled) and pc
+	 * (blink) are already on the stack in the right order
 	 */
+	ld_s r0, [sp, ___isf_t_status32_OFFSET - ___isf_t_pc_OFFSET]
+
+	/* update status32.ie (explanation in firq_exit:_firq_return_from_coop) */
+
+	ld r3, [r2, _thread_offset_to_intlock_key]
+	st  0, [r2, _thread_offset_to_intlock_key]
+	cmp r3, 0
+	or.ne r0, r0, _ARC_V2_STATUS32_IE
+
+	st_s r0, [sp, ___isf_t_status32_OFFSET - ___isf_t_pc_OFFSET]
 
 	/* carve fake stack */
 	sub sp, sp, ___isf_t_pc_OFFSET
 
+	/* update return value on stack */
+	ld r0, [r2, _thread_offset_to_return_value]
+	st_s r0, [sp, ___isf_t_r0_OFFSET]
 
 	/* reset zero-overhead loops */
 	st 0, [sp, ___isf_t_lp_end_OFFSET]
@@ -309,29 +242,19 @@ _rirq_switch_from_coop:
 	 */
 	st_s r13, [sp, ___isf_t_r13_OFFSET]
 
-#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
-	push_s blink
+	/* stack now has the IRQ stack frame layout, pointing to r0 */
 
-	bl z_thread_mark_switched_in
+	/* fall through to rtie instruction */
 
-	pop_s blink
-#endif
-	/* stack now has the IRQ stack frame layout, pointing to sp */
 	/* rtie will pop the rest from the stack */
-	rtie
-
-.align 4
-_rirq_switch_from_firq:
-_rirq_switch_from_rirq:
-
-	_set_misc_regs_irq_switch_from_irq
-
-#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
-	push_s blink
-
-	bl z_thread_mark_switched_in
-
-	pop_s blink
-#endif
-_rirq_no_switch:
+
+	/* fall through to rtie instruction */
+
+#endif /* CONFIG_PREEMPT_ENABLED */
+
+.balign 4
+_rirq_return_from_firq:
+_rirq_return_from_rirq:
+_rirq_no_reschedule:
+
 	rtie

arch/arc/core/reset.S

@@ -14,16 +14,14 @@
 #include <toolchain.h>
 #include <linker/sections.h>
 #include <arch/cpu.h>
-#include <swap_macros.h>
 
-GDATA(z_interrupt_stacks)
-GDATA(z_main_stack)
-GDATA(_VectorTable)
+GDATA(_interrupt_stack)
+GDATA(_main_stack)
 
 /* use one of the available interrupt stacks during init */
 
 
-#define INIT_STACK z_interrupt_stacks
+#define INIT_STACK _interrupt_stack
 #define INIT_STACK_SIZE CONFIG_ISR_STACK_SIZE
 
 GTEXT(__reset)
@@ -45,57 +43,35 @@ GTEXT(__start)
 
 SECTION_FUNC(TEXT,__reset)
 SECTION_FUNC(TEXT,__start)
+
 	/* lock interrupts: will get unlocked when switch to main task
 	 * also make sure the processor in the correct status
 	 */
-	mov_s r0, 0
+	mov r0, 0
 	kflag r0
-
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	sflag r0
-#endif
-
 #if defined(CONFIG_BOOT_TIME_MEASUREMENT) && defined(CONFIG_ARCV2_TIMER)
 	/*
 	 * ARCV2 timer (timer0) is a free run timer, let it start to count
 	 * here.
 	 */
-	mov_s r0, 0xffffffff
+	mov r0, 0xffffffff
 	sr r0, [_ARC_V2_TMR0_LIMIT]
-	mov_s r0, 0
+	mov r0, 0
 	sr r0, [_ARC_V2_TMR0_COUNT]
 #endif
 	/* interrupt related init */
-#ifndef CONFIG_ARC_NORMAL_FIRMWARE
-	/* IRQ_ACT and IRQ_CTRL should be initialized and set in secure mode */
 	sr r0, [_ARC_V2_AUX_IRQ_ACT]
 	sr r0, [_ARC_V2_AUX_IRQ_CTRL]
-#endif
 	sr r0, [_ARC_V2_AUX_IRQ_HINT]
 
-	/* set the vector table base early,
-	 * so that exception vectors can be handled.
-	 */
-	mov_s r0, _VectorTable
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	sr r0, [_ARC_V2_IRQ_VECT_BASE_S]
-#else
-	sr r0, [_ARC_V2_IRQ_VECT_BASE]
-#endif
+	/* \todo: MPU init, gp for small data? */
 
-#if defined(CONFIG_USERSPACE)
+#if CONFIG_USERSPACE
 	lr r0, [_ARC_V2_STATUS32]
 	bset r0, r0, _ARC_V2_STATUS32_US_BIT
 	kflag r0
 #endif
-
-#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
-	lr r0, [_ARC_V2_STATUS32]
-	bset r0, r0, _ARC_V2_STATUS32_AD_BIT
-	kflag r0
-#endif
-
-	mov_s r1, 1
+	mov r1, 1
 
 invalidate_and_disable_icache:
 
@@ -106,9 +82,9 @@ invalidate_and_disable_icache:
 	mov_s r2, 0
 	sr r2, [_ARC_V2_IC_IVIC]
 	/* writing to IC_IVIC needs 3 NOPs */
-	nop_s
-	nop_s
-	nop_s
+	nop
+	nop
+	nop
 	sr r1, [_ARC_V2_IC_CTRL]
 
 invalidate_dcache:
@@ -121,65 +97,9 @@ invalidate_dcache:
 
 done_cache_invalidate:
 
-/*
- * Init ARC internal architecture state
- * Force to initialize internal architecture state to reset values
- * For scenarios where board hardware is not re-initialized between tests,
- * some settings need to be restored to its default initial states as a
- * substitution of normal hardware reset sequence.
- */
-#ifdef CONFIG_INIT_ARCH_HW_AT_BOOT
-	/* Set MPU (v3) registers to default */
-#if CONFIG_ARC_MPU_VER == 3
-	/* Set default reset value to _ARC_V2_MPU_EN register */
-#define ARC_MPU_EN_RESET_VALUE 0x400181C0
-	mov_s r1, ARC_MPU_EN_RESET_VALUE
-	sr r1, [_ARC_V2_MPU_EN]
-	/* Get MPU region numbers */
-	lr r3, [_ARC_V2_MPU_BUILD]
-	lsr_s r3, r3, 8
-	and r3, r3, 0xff
-	mov_s r1, 0
-	mov_s r2, 0
-	/* Set all MPU regions by iterating index */
-mpu_regions_reset:
-	brge r2, r3, done_mpu_regions_reset
-	sr r2, [_ARC_V2_MPU_INDEX]
-	sr r1, [_ARC_V2_MPU_RSTART]
-	sr r1, [_ARC_V2_MPU_REND]
-	sr r1, [_ARC_V2_MPU_RPER]
-	add_s r2, r2, 1
-	b_s mpu_regions_reset
-done_mpu_regions_reset:
-#endif
-#endif
-
-#if defined(CONFIG_SMP) || CONFIG_MP_NUM_CPUS  > 1
-	_get_cpu_id r0
-	breq r0, 0, _master_core_startup
-
-/*
- * Non-masters wait for master core (core 0) to boot enough
- */
-_slave_core_wait:
-#if CONFIG_MP_NUM_CPUS == 1
-	kflag	1
-#endif
-	ld r1, [arc_cpu_wake_flag]
-	brne r0, r1, _slave_core_wait
-
-	ld sp, [arc_cpu_sp]
-	/* signal master core that slave core runs */
-	st 0, [arc_cpu_wake_flag]
-
-#if defined(CONFIG_ARC_FIRQ_STACK)
-	push r0
-	jl z_arc_firq_stack_set
-	pop r0
-#endif
-	j z_arc_slave_start
-
-_master_core_startup:
+#if defined(CONFIG_SYS_POWER_DEEP_SLEEP_STATES) && \
+	!defined(CONFIG_BOOTLOADER_CONTEXT_RESTORE)
+        jl @_sys_resume_from_deep_sleep
 #endif
 
 #ifdef CONFIG_INIT_STACKS
@@ -188,21 +108,17 @@ _master_core_startup:
 	 * FIRQ stack when CONFIG_INIT_STACKS is enabled before switching to
 	 * one of them for the rest of the early boot
 	 */
-	mov_s sp, z_main_stack
+	mov sp, _main_stack
 	add sp, sp, CONFIG_MAIN_STACK_SIZE
 
-	mov_s r0, z_interrupt_stacks
+	mov_s r0, _interrupt_stack
 	mov_s r1, 0xaa
 	mov_s r2, CONFIG_ISR_STACK_SIZE
 	jl memset
 
 #endif /* CONFIG_INIT_STACKS */
 
-	mov_s sp, INIT_STACK
+	mov sp, INIT_STACK
 	add sp, sp, INIT_STACK_SIZE
 
-#if defined(CONFIG_ARC_FIRQ_STACK)
-	jl z_arc_firq_stack_set
-#endif
-
-	j _PrepC
+	j @_PrepC

arch/arc/core/secureshield/CMakeLists.txt

@@ -1,12 +0,0 @@
-#
-# Copyright (c) 2018 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier: Apache-2.0
-
-zephyr_library()
-
-zephyr_library_sources(
-  arc_sjli.c
-  arc_secure.S
-  secure_sys_services.c
-  )

arch/arc/core/secureshield/arc_secure.S

@@ -1,122 +0,0 @@
-/*
- * Copyright (c) 2018 Synopsys.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#include <toolchain.h>
-#include <linker/sections.h>
-#include <arch/cpu.h>
-
-.macro clear_scratch_regs
-	mov r1, 0
-	mov r2, 0
-	mov r3, 0
-	mov r4, 0
-	mov r5, 0
-	mov r6, 0
-	mov r7, 0
-	mov r8, 0
-	mov r9, 0
-	mov r10, 0
-	mov r11, 0
-	mov r12, 0
-.endm
-
-.macro clear_callee_regs
-	mov r25, 0
-	mov r24, 0
-	mov r23, 0
-	mov r22, 0
-	mov r21, 0
-	mov r20, 0
-	mov r19, 0
-	mov r18, 0
-	mov r17, 0
-	mov r16, 0
-
-	mov r15, 0
-	mov r14, 0
-	mov r13, 0
-.endm
-
-GTEXT(arc_go_to_normal)
-GTEXT(_arc_do_secure_call)
-GDATA(arc_s_call_table)
-
-
-SECTION_FUNC(TEXT, _arc_do_secure_call)
-	/* r0-r5: arg1-arg6, r6 is call id */
-	/* the call id should be checked */
-	/* disable normal interrupt happened when processor in secure mode ? */
-	/* seti (0x30 | (ARC_N_IRQ_START_LEVEL-1)) */
-	breq r6, ARC_S_CALL_CLRI, _s_clri
-	breq r6, ARC_S_CALL_SETI, _s_seti
-	push_s blink
-	mov	blink, arc_s_call_table
-	ld.as r6, [blink, r6]
-
-	jl	[r6]
-
-	/*
-	 * no need to clear callee regs, as they will be saved and restored
-	 * automatically
-	 */
-	clear_scratch_regs
-
-	mov r29, 0
-	mov r30, 0
-
-
-_arc_do_secure_call_exit:
-	pop_s blink
-
-	j [blink]
-	/* enable normal interrupt */
-	/*
-	 * j.d [blink]
-	 * seti (0x30 | (CONFIG_NUM_IRQ_PRIO_LEVELS - 1))
-	 */
-
-_s_clri:
-	lr r0, [_ARC_V2_STATUS32]
-	and r0, r0, 0x1e
-	asr r0, r0
-	or r0, r0, 0x30
-	mov r6, (0x30 | (ARC_N_IRQ_START_LEVEL-1))
-
-	j.d [blink]
-	seti r6
-
-_s_seti:
-	btst r0, 4
-	jnz __seti_0
-	mov r0, (CONFIG_NUM_IRQ_PRIO_LEVELS - 1)
-	lr r6, [_ARC_V2_STATUS32]
-	and r6, r6, 0x1e
-	asr r6, r6
-	cmp r0, r6
-	mov.hs r0, r6
-__seti_0:
-	and r0, r0, 0xf
-	brhs r0, ARC_N_IRQ_START_LEVEL, __seti_1
-	mov r0, ARC_N_IRQ_START_LEVEL
-__seti_1:
-	or r0, r0, 0x30
-
-	j.d [blink]
-	seti r0
-
-
-SECTION_FUNC(TEXT, arc_go_to_normal)
-	clear_callee_regs
-	clear_scratch_regs
-
-	mov fp, 0
-	mov r29, 0
-	mov r30, 0
-	mov blink, 0
-
-	jl [r0]
-	/* should not come here */
-	kflag 1
-

arch/arc/core/secureshield/arc_sjli.c

@@ -1,68 +0,0 @@
-/*
- * Copyright (c) 2018 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <device.h>
-#include <kernel.h>
-#include <errno.h>
-#include <zephyr/types.h>
-#include <init.h>
-#include <toolchain.h>
-
-#include <arch/arc/v2/secureshield/arc_secure.h>
-
-static void _default_sjli_entry(void);
-/*
- * sjli vector table must be in instruction space
- * \todo: how to let user to install customized sjli entry easily, e.g.
- *  through macros or with the help of compiler?
- */
-const static uint32_t _sjli_vector_table[CONFIG_SJLI_TABLE_SIZE] = {
-	[0] = (uint32_t)_arc_do_secure_call,
-	[1 ... (CONFIG_SJLI_TABLE_SIZE - 1)] = (uint32_t)_default_sjli_entry,
-};
-
-/*
- * @brief default entry of sjli call
- *
- */
-static void _default_sjli_entry(void)
-{
-	printk("default sjli entry\n");
-}
-
-/*
- * @brief initializaiton of sjli related functions
- *
- */
-static void sjli_table_init(void)
-{
-	/* install SJLI table */
-	z_arc_v2_aux_reg_write(_ARC_V2_NSC_TABLE_BASE, _sjli_vector_table);
-	z_arc_v2_aux_reg_write(_ARC_V2_NSC_TABLE_TOP,
-		(_sjli_vector_table + CONFIG_SJLI_TABLE_SIZE));
-}
-
-/*
- * @brief initializaiton of secureshield related functions.
- */
-static int arc_secureshield_init(const struct device *arg)
-{
-	sjli_table_init();
-
-	/* set nic bit to enable seti/clri and
-	 * sleep/wevt in normal mode.
-	 * If not set, direct call of seti/clri etc. will raise exception.
-	 * Then, these seti/clri instructions should be replaced with secure
-	 * secure services (sjli call)
-	 *
-	 */
-	__asm__ volatile("sflag  0x20");
-
-	return 0;
-}
-
-SYS_INIT(arc_secureshield_init, PRE_KERNEL_1,
-		CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);

arch/arc/core/secureshield/secure_sys_services.c

@@ -1,89 +0,0 @@
-/*
- * Copyright (c) 2018 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#include <errno.h>
-#include <kernel.h>
-#include <arch/cpu.h>
-#include <zephyr/types.h>
-#include <soc.h>
-#include <toolchain.h>
-
-#include <arch/arc/v2/secureshield/arc_secure.h>
-
-#define IRQ_PRIO_MASK (0xffff << ARC_N_IRQ_START_LEVEL)
-/*
- * @brief read secure auxiliary regs on behalf of normal mode
- *
- * @param aux_reg  address of aux reg
- *
- * Some aux regs require secure privilege, this function implements
- * an secure service to access secure aux regs. Check should be done
- * to decide whether the access is valid.
- */
-static int32_t arc_s_aux_read(uint32_t aux_reg)
-{
-	return -1;
-}
-
-/*
- * @brief write secure auxiliary regs on behalf of normal mode
- *
- * @param aux_reg address of aux reg
- * @param val, the val to write
- *
- *  Some aux regs require secure privilege, this function implements
- * an secure service to access secure aux regs. Check should be done
- * to decide whether the access is valid.
- */
-static int32_t arc_s_aux_write(uint32_t aux_reg, uint32_t val)
-{
-	if (aux_reg == _ARC_V2_AUX_IRQ_ACT) {
-		/* 0 -> CONFIG_NUM_IRQ_PRIO_LEVELS allocated to secure world
-		 * left prio levels allocated to normal world
-		 */
-		val &= IRQ_PRIO_MASK;
-		z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_ACT, val |
-		(z_arc_v2_aux_reg_read(_ARC_V2_AUX_IRQ_ACT) &
-			(~IRQ_PRIO_MASK)));
-
-		return  0;
-	}
-
-	return -1;
-}
-
-/*
- * @brief allocate interrupt for normal world
- *
- * @param intno, the interrupt to be allocated to normal world
- *
- * By default, most interrupts are configured to be secure in initialization.
- * If normal world wants to use an interrupt, through this secure service to
- * apply one. Necessary check should be done to decide whether the apply is
- * valid
- */
-static int32_t arc_s_irq_alloc(uint32_t intno)
-{
-	z_arc_v2_irq_uinit_secure_set(intno, 0);
-	return 0;
-}
-
-
-/*
- * \todo, to access MPU from normal mode, secure mpu service should be
- * created. In the secure mpu service, the parameters should be checked
- * (e.g., not overwrite the mpu regions for secure world)that operations
- * are valid
- */
-
-
-/*
- * \todo, how to add secure service easily
- */
-const _arc_s_call_handler_t arc_s_call_table[ARC_S_CALL_LIMIT] = {
-	[ARC_S_CALL_AUX_READ] = (_arc_s_call_handler_t)arc_s_aux_read,
-	[ARC_S_CALL_AUX_WRITE] = (_arc_s_call_handler_t)arc_s_aux_write,
-	[ARC_S_CALL_IRQ_ALLOC] = (_arc_s_call_handler_t)arc_s_irq_alloc,
-};

arch/arc/core/swap.S

@@ -0,0 +1,248 @@
+/*
+ * Copyright (c) 2014-2015 Wind River Systems, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief Thread context switching
+ *
+ * This module implements the routines necessary for thread context switching
+ * on ARCv2 CPUs.
+ *
+ * See isr_wrapper.S for details.
+ */
+
+#include <kernel_structs.h>
+#include <offsets_short.h>
+#include <toolchain.h>
+#include <arch/cpu.h>
+#include <v2/irq.h>
+#include <swap_macros.h>
+
+GTEXT(__swap)
+GDATA(_k_neg_eagain)
+GDATA(_kernel)
+
+/**
+ *
+ * @brief Initiate a cooperative context switch
+ *
+ * The __swap() routine is invoked by various kernel services to effect
+ * a cooperative context switch.  Prior to invoking __swap(), the caller
+ * disables interrupts via irq_lock() and the return 'key' is passed as a
+ * parameter to __swap(). The key is in fact the value stored in the register
+ * operand of a CLRI instruction.
+ *
+ * It stores the intlock key parameter into current->intlock_key.
+
+ * Given that __swap() is called to effect a cooperative context switch,
+ * the caller-saved integer registers are saved on the stack by the function
+ * call preamble to __swap(). This creates a custom stack frame that will be
+ * popped when returning from __swap(), but is not suitable for handling a
+ * return from an exception. Thus, the fact that the thread is pending because
+ * of a cooperative call to __swap() has to be recorded via the _CAUSE_COOP code
+ * in the relinquish_cause of the thread's k_thread structure. The
+ * _IrqExit()/_FirqExit() code will take care of doing the right thing to
+ * restore the thread status.
+ *
+ * When __swap() is invoked, we know the decision to perform a context switch or
+ * not has already been taken and a context switch must happen.
+ *
+ * @return may contain a return value setup by a call to
+ * z_set_thread_return_value()
+ *
+ * C function prototype:
+ *
+ * unsigned int __swap (unsigned int key);
+ *
+ */
+
+SECTION_FUNC(TEXT, __swap)
+
+#ifdef CONFIG_EXECUTION_BENCHMARKING
+	mov r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
+	_save_callee_saved_regs
+	push_s r31
+
+	bl read_timer_start_of_swap
+
+	pop_s r31
+	mov r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
+	_load_callee_saved_regs
+	st sp, [r2, _thread_offset_to_sp]
+#endif
+
+	/* interrupts are locked, interrupt key is in r0 */
+
+	mov r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
+
+	/* save intlock key */
+	st r0, [r2, _thread_offset_to_intlock_key]
+	st _CAUSE_COOP, [r2, _thread_offset_to_relinquish_cause]
+
+	/*
+         * Carve space for the return value. Setting it to a default of
+         * -EAGAIN eliminates the need for the timeout code to set it.
+         * If another value is ever needed, it can be modified with
+         * z_set_thread_return_value().
+         */
+	ld r3, [_k_neg_eagain]
+	st r3, [r2, _thread_offset_to_return_value]
+
+	/*
+	 * Save status32 and blink on the stack before the callee-saved registers.
+	 * This is the same layout as the start of an IRQ stack frame.
+	 */
+	lr r3, [_ARC_V2_STATUS32]
+	push_s r3
+
+#ifdef CONFIG_ARC_HAS_SECURE
+	lr r3, [_ARC_V2_SEC_STAT]
+	push_s r3
+#endif
+
+#ifdef CONFIG_ARC_STACK_CHECKING
+#ifdef CONFIG_ARC_HAS_SECURE
+	bclr r3, r3, _ARC_V2_SEC_STAT_SSC_BIT
+	/* sflag r3 */
+	/* sflag instruction is not supported in current ARC GNU */
+	.long 0x00ff302f
+#else
+	/* disable stack checking during swap */
+	bclr r3, r3, _ARC_V2_STATUS32_SC_BIT
+	kflag r3
+#endif
+#endif
+
+	push_s blink
+
+	_save_callee_saved_regs
+
+	/* get the cached thread to run */
+	ld_s r2, [r1, _kernel_offset_to_ready_q_cache]
+
+	/* entering here, r2 contains the new current thread */
+#ifdef CONFIG_ARC_STACK_CHECKING
+	_load_stack_check_regs
+#endif
+	/* XXX - can be moved to delay slot of _CAUSE_RIRQ ? */
+	st_s r2, [r1, _kernel_offset_to_current]
+
+	_load_callee_saved_regs
+
+#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
+	push_s r2
+	mov r0, r2
+	bl configure_mpu_thread
+	pop_s r2
+#endif
+
+	ld r3, [r2, _thread_offset_to_relinquish_cause]
+
+	breq r3, _CAUSE_RIRQ, _swap_return_from_rirq
+	nop
+	breq r3, _CAUSE_FIRQ, _swap_return_from_firq
+	nop
+
+	/* fall through to _swap_return_from_coop */
+
+.balign 4
+_swap_return_from_coop:
+
+	ld r1, [r2, _thread_offset_to_intlock_key]
+	st  0, [r2, _thread_offset_to_intlock_key]
+	ld r0, [r2, _thread_offset_to_return_value]
+
+	lr ilink, [_ARC_V2_STATUS32]
+	bbit1 ilink, _ARC_V2_STATUS32_AE_BIT, _return_from_exc
+
+	pop_s blink /* pc into blink */
+#ifdef CONFIG_ARC_HAS_SECURE
+	pop_s r3    /* pop SEC_STAT */
+	/* sflag r3 */
+	/* sflag instruction is not supported in current ARC GNU */
+	.long 0x00ff302f
+#endif
+#ifdef CONFIG_EXECUTION_BENCHMARKING
+	b _capture_value_for_benchmarking
+#endif
+return_loc:
+
+	pop_s r3    /* status32 into r3 */
+	kflag r3    /* write status32 */
+
+	j_s.d [blink] /* always execute delay slot */
+	seti r1       /* delay slot */
+
+
+.balign 4
+_swap_return_from_rirq:
+_swap_return_from_firq:
+
+	lr r3, [_ARC_V2_STATUS32]
+	bbit1 r3, _ARC_V2_STATUS32_AE_BIT, _return_from_exc_irq
+
+	/* pretend interrupt happened to use rtie instruction */
+
+#ifdef CONFIG_ARC_HAS_SECURE
+	lr r3, [_ARC_V2_SEC_STAT]
+	/* set SEC_STAT.IRM = SECURE for interrupt return */
+	bset r3, r3, 3
+	/* sflag r3 */
+	/* sflag instruction is not supported in current ARC GNU */
+	.long 0x00ff302f
+#endif
+
+	lr r3, [_ARC_V2_AUX_IRQ_ACT]
+	brne r3, 0, _swap_already_in_irq
+
+	/* use lowest interrupt priority */
+	or r3, r3, (1<<(CONFIG_NUM_IRQ_PRIO_LEVELS-1))
+	sr r3, [_ARC_V2_AUX_IRQ_ACT]
+
+_swap_already_in_irq:
+	rtie
+
+.balign 4
+_return_from_exc_irq:
+	_pop_irq_stack_frame
+	sub_s sp, sp, ___isf_t_status32_OFFSET - ___isf_t_pc_OFFSET + 4
+
+_return_from_exc:
+
+	/* put the return address to eret */
+	ld ilink, [sp] /* pc into ilink */
+	sr ilink, [_ARC_V2_ERET]
+
+	/* SEC_STAT is bypassed when CONFIG_ARC_HAS_SECURE */
+
+	/* put status32 into estatus */
+	ld ilink, [sp, ___isf_t_status32_OFFSET - ___isf_t_pc_OFFSET]
+	sr ilink, [_ARC_V2_ERSTATUS]
+	add_s sp, sp, ___isf_t_status32_OFFSET - ___isf_t_pc_OFFSET + 4
+
+	rtie
+
+
+#ifdef CONFIG_EXECUTION_BENCHMARKING
+	.balign 4
+_capture_value_for_benchmarking:
+	mov r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
+	_save_callee_saved_regs
+	push_s blink
+
+	bl read_timer_end_of_swap
+
+	pop_s blink
+	mov r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
+	_load_callee_saved_regs
+	st sp, [r2, _thread_offset_to_sp]
+	b return_loc
+#endif /* CONFIG_EXECUTION_BENCHMARKING */

arch/arc/core/switch.S

@@ -1,160 +0,0 @@
-/*
- * Copyright (c) 2019 Synopsys.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/**
- * @file
- * @brief Thread context switching
- *
- * This module implements the routines necessary for thread context switching
- * on ARCv2 CPUs.
- *
- * See isr_wrapper.S for details.
- */
-
-#include <kernel_structs.h>
-#include <offsets_short.h>
-#include <toolchain.h>
-#include <linker/sections.h>
-#include <arch/cpu.h>
-#include <v2/irq.h>
-#include <swap_macros.h>
-
-GTEXT(z_arc_switch)
-
-/**
- *
- * @brief Initiate a cooperative context switch
- *
- * The arch_switch routine is invoked by various kernel services to effect
- * a cooperative context switch. Prior to invoking arch_switch, the caller
- * disables interrupts via irq_lock()
-
- * Given that arch_switch() is called to effect a cooperative context switch,
- * the caller-saved integer registers are saved on the stack by the function
- * call preamble to arch_switch. This creates a custom stack frame that will
- * be popped when returning from arch_switch, but is not suitable for handling
- * a return from an exception. Thus, the fact that the thread is pending because
- * of a cooperative call to arch_switch() has to be recorded via the
- * _CAUSE_COOP code in the relinquish_cause of the thread's k_thread structure.
- * The _rirq_exit()/_firq_exit() code will take care of doing the right thing
- * to restore the thread status.
- *
- * When arch_switch() is invoked, we know the decision to perform a context
- * switch or not has already been taken and a context switch must happen.
- *
- *
- * C function prototype:
- *
- * void arch_switch(void *switch_to, void **switched_from);
- *
- */
-
-SECTION_FUNC(TEXT, z_arc_switch)
-
-	/*
-	 * r0 = new_thread->switch_handle = switch_to thread,
-	 * r1 = &old_thread->switch_handle
-	 * get old_thread from r1
-	 */
-
-	sub r2, r1, ___thread_t_switch_handle_OFFSET
-
-
-	st _CAUSE_COOP, [r2, _thread_offset_to_relinquish_cause]
-
-	/*
-	 * Save status32 and blink on the stack before the callee-saved registers.
-	 * This is the same layout as the start of an IRQ stack frame.
-	 */
-	lr r3, [_ARC_V2_STATUS32]
-	push_s r3
-
-#ifdef CONFIG_ARC_HAS_SECURE
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	lr r3, [_ARC_V2_SEC_STAT]
-#else
-	mov_s r3, 0
-#endif
-	push_s r3
-#endif
-
-	push_s blink
-
-	_store_old_thread_callee_regs
-
-/* disable stack checking here, as sp will be changed to target
- * thread'sp
- */
-	_disable_stack_checking r3
-
-	mov_s r2, r0
-
-	_load_new_thread_callee_regs
-
-	breq r3, _CAUSE_RIRQ, _switch_return_from_rirq
-	nop_s
-	breq r3, _CAUSE_FIRQ, _switch_return_from_firq
-	nop_s
-
-	/* fall through to _switch_return_from_coop */
-
-.align 4
-_switch_return_from_coop:
-
-	pop_s blink /* pc into blink */
-#ifdef CONFIG_ARC_HAS_SECURE
-	pop_s r3    /* pop SEC_STAT */
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	sflag r3
-#endif
-#endif
-	pop_s r3    /* status32 into r3 */
-	kflag r3    /* write status32 */
-
-#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
-	push_s blink
-
-	bl z_thread_mark_switched_in
-
-	pop_s blink
-#endif
-	j_s [blink]
-
-
-.align 4
-_switch_return_from_rirq:
-_switch_return_from_firq:
-
-	_set_misc_regs_irq_switch_from_irq
-
-	/* use lowest interrupt priority to simulate
-	 * a interrupt return to load left regs of new
-	 * thread
-	 */
-
-	lr r3, [_ARC_V2_AUX_IRQ_ACT]
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	or r3, r3, (1 << (ARC_N_IRQ_START_LEVEL - 1))
-#else
-	or r3, r3, (1 << (CONFIG_NUM_IRQ_PRIO_LEVELS - 1))
-#endif
-
-#ifdef CONFIG_ARC_NORMAL_FIRMWARE
-	mov_s r0, _ARC_V2_AUX_IRQ_ACT
-	mov_s r1, r3
-	mov_s r6, ARC_S_CALL_AUX_WRITE
-	sjli SJLI_CALL_ARC_SECURE
-#else
-	sr r3, [_ARC_V2_AUX_IRQ_ACT]
-#endif
-#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
-	push_s blink
-
-	bl z_thread_mark_switched_in
-
-	pop_s blink
-#endif
-	rtie

arch/arc/core/sys_fatal_error_handler.c

@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2014 Wind River Systems, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief ARCv2 system fatal error handler
+ *
+ * This module provides the z_SysFatalErrorHandler() routine for ARCv2 BSPs.
+ */
+
+#include <kernel.h>
+#include <toolchain.h>
+#include <linker/sections.h>
+#include <kernel_structs.h>
+#include <misc/printk.h>
+
+/**
+ *
+ * @brief Fatal error handler
+ *
+ * This routine implements the corrective action to be taken when the system
+ * detects a fatal error.
+ *
+ * This sample implementation attempts to abort the current thread and allow
+ * the system to continue executing, which may permit the system to continue
+ * functioning with degraded capabilities.
+ *
+ * System designers may wish to enhance or substitute this sample
+ * implementation to take other actions, such as logging error (or debug)
+ * information to a persistent repository and/or rebooting the system.
+ *
+ * @param reason the fatal error reason
+ * @param pEsf pointer to exception stack frame
+ *
+ * @return N/A
+ */
+__weak void z_SysFatalErrorHandler(unsigned int reason,
+						const NANO_ESF *pEsf)
+{
+	ARG_UNUSED(pEsf);
+
+#if !defined(CONFIG_SIMPLE_FATAL_ERROR_HANDLER)
+#if defined(CONFIG_STACK_SENTINEL)
+	if (reason == _NANO_ERR_STACK_CHK_FAIL) {
+		goto hang_system;
+	}
+#endif
+	if (reason == _NANO_ERR_KERNEL_PANIC) {
+		goto hang_system;
+	}
+
+	if (z_is_thread_essential()) {
+		printk("Fatal fault in essential thread! Spinning...\n");
+		goto hang_system;
+	}
+
+	printk("Fatal fault in thread %p! Aborting.\n", _current);
+
+	k_thread_abort(_current);
+
+	return;
+
+hang_system:
+#else
+	ARG_UNUSED(reason);
+#endif
+
+	for (;;) {
+		k_cpu_idle();
+	}
+}

arch/arc/core/thread.c

@@ -12,9 +12,13 @@
  */
 
 #include <kernel.h>
-#include <ksched.h>
+#include <toolchain.h>
+#include <kernel_structs.h>
 #include <offsets_short.h>
 #include <wait_q.h>
+#ifdef CONFIG_INIT_STACKS
+#include <string.h>
+#endif /* CONFIG_INIT_STACKS */
 
 #ifdef CONFIG_USERSPACE
 #include <arch/arc/v2/mpu/arc_core_mpu.h>
@@ -22,229 +26,254 @@
 
 /*  initial stack frame */
 struct init_stack_frame {
-	uint32_t pc;
+	u32_t pc;
 #ifdef CONFIG_ARC_HAS_SECURE
-	uint32_t sec_stat;
+	u32_t sec_stat;
 #endif
-	uint32_t status32;
-	uint32_t r3;
-	uint32_t r2;
-	uint32_t r1;
-	uint32_t r0;
+	u32_t status32;
+	u32_t r3;
+	u32_t r2;
+	u32_t r1;
+	u32_t r0;
 };
 
-#ifdef CONFIG_USERSPACE
-struct user_init_stack_frame {
-	struct init_stack_frame iframe;
-	uint32_t user_sp;
-};
-
-static bool is_user(struct k_thread *thread)
-{
-	return (thread->base.user_options & K_USER) != 0;
-}
-#endif
-
-/* Set all stack-related architecture variables for the provided thread */
-static void setup_stack_vars(struct k_thread *thread)
-{
-#ifdef CONFIG_USERSPACE
-	if (is_user(thread)) {
-#ifdef CONFIG_GEN_PRIV_STACKS
-		thread->arch.priv_stack_start =
-			(uint32_t)z_priv_stack_find(thread->stack_obj);
-#else
-		thread->arch.priv_stack_start =	(uint32_t)(thread->stack_obj);
-#endif /* CONFIG_GEN_PRIV_STACKS */
-		thread->arch.priv_stack_start += Z_ARC_STACK_GUARD_SIZE;
-	} else {
-		thread->arch.priv_stack_start = 0;
-	}
-#endif /* CONFIG_USERSPACE */
-
-#ifdef CONFIG_ARC_STACK_CHECKING
-#ifdef CONFIG_USERSPACE
-	if (is_user(thread)) {
-		thread->arch.k_stack_top = thread->arch.priv_stack_start;
-		thread->arch.k_stack_base = (thread->arch.priv_stack_start +
-					     CONFIG_PRIVILEGED_STACK_SIZE);
-		thread->arch.u_stack_top = thread->stack_info.start;
-		thread->arch.u_stack_base = (thread->stack_info.start +
-					     thread->stack_info.size);
-	} else
-#endif /* CONFIG_USERSPACE */
-	{
-		thread->arch.k_stack_top = (uint32_t)thread->stack_info.start;
-		thread->arch.k_stack_base = (uint32_t)(thread->stack_info.start +
-						    thread->stack_info.size);
-#ifdef CONFIG_USERSPACE
-		thread->arch.u_stack_top = 0;
-		thread->arch.u_stack_base = 0;
-#endif /* CONFIG_USERSPACE */
-	}
-#endif /* CONFIG_ARC_STACK_CHECKING */
-}
-
-/* Get the initial stack frame pointer from the thread's stack buffer. */
-static struct init_stack_frame *get_iframe(struct k_thread *thread,
-					   char *stack_ptr)
-{
-#ifdef CONFIG_USERSPACE
-	if (is_user(thread)) {
-		/* Initial stack frame for a user thread is slightly larger;
-		 * we land in z_user_thread_entry_wrapper on the privilege
-		 * stack, and pop off an additional value for the user
-		 * stack pointer.
-		 */
-		struct user_init_stack_frame *uframe;
-
-		uframe = Z_STACK_PTR_TO_FRAME(struct user_init_stack_frame,
-					      thread->arch.priv_stack_start +
-					      CONFIG_PRIVILEGED_STACK_SIZE);
-		uframe->user_sp = (uint32_t)stack_ptr;
-		return &uframe->iframe;
-	}
-#endif
-	return Z_STACK_PTR_TO_FRAME(struct init_stack_frame, stack_ptr);
-}
-
-/*
- * Pre-populate values in the registers inside _callee_saved_stack struct
- * so these registers have pre-defined values when new thread begins
- * execution. For example, setting up the thread pointer for thread local
- * storage here so the thread starts with thread pointer already set up.
- */
-static inline void arch_setup_callee_saved_regs(struct k_thread *thread,
-						uintptr_t stack_ptr)
-{
-	_callee_saved_stack_t *regs = UINT_TO_POINTER(stack_ptr);
-
-	ARG_UNUSED(regs);
-
-#ifdef CONFIG_THREAD_LOCAL_STORAGE
-	/* R26 is used for thread pointer */
-	regs->r26 = thread->tls;
-#endif
-}
-
 /*
+ * @brief Initialize a new thread from its stack space
+ *
+ * The thread control structure is put at the lower address of the stack. An
+ * initial context, to be "restored" by __return_from_coop(), is put at
+ * the other end of the stack, and thus reusable by the stack when not
+ * needed anymore.
+ *
  * The initial context is a basic stack frame that contains arguments for
  * z_thread_entry() return address, that points at z_thread_entry()
  * and status register.
+ *
+ * <options> is currently unused.
+ *
+ * @param pStackmem the pointer to aligned stack memory
+ * @param stackSize the stack size in bytes
+ * @param pEntry thread entry point routine
+ * @param parameter1 first param to entry point
+ * @param parameter2 second param to entry point
+ * @param parameter3 third param to entry point
+ * @param priority thread priority
+ * @param options thread options: K_ESSENTIAL
+ *
+ * @return N/A
  */
-void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
-		     char *stack_ptr, k_thread_entry_t entry,
-		     void *p1, void *p2, void *p3)
+void z_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
+		 size_t stackSize, k_thread_entry_t pEntry,
+		 void *parameter1, void *parameter2, void *parameter3,
+		 int priority, unsigned int options)
 {
-	struct init_stack_frame *iframe;
+	char *pStackMem = Z_THREAD_STACK_BUFFER(stack);
+	Z_ASSERT_VALID_PRIO(priority, pEntry);
 
-	setup_stack_vars(thread);
+	char *stackEnd;
+	char *stackAdjEnd;
+	struct init_stack_frame *pInitCtx;
 
-	/* Set up initial stack frame */
-	iframe = get_iframe(thread, stack_ptr);
+#if CONFIG_USERSPACE
 
-#ifdef CONFIG_USERSPACE
-	/* enable US bit, US is read as zero in user mode. This will allow user
+	size_t stackAdjSize;
+	size_t offset = 0;
+
+/* adjust stack and stack size */
+#if CONFIG_ARC_MPU_VER == 2
+	stackAdjSize = Z_ARC_MPUV2_SIZE_ALIGN(stackSize);
+#elif CONFIG_ARC_MPU_VER == 3
+	stackAdjSize = STACK_SIZE_ALIGN(stackSize);
+#endif
+	stackEnd = pStackMem + stackAdjSize;
+
+#if CONFIG_STACK_POINTER_RANDOM
+	offset = stackAdjSize - stackSize;
+#endif
+
+	if (options & K_USER) {
+		thread->arch.priv_stack_start =
+			(u32_t)(stackEnd + STACK_GUARD_SIZE);
+
+		stackAdjEnd = (char *)STACK_ROUND_DOWN(stackEnd +
+				Z_ARCH_THREAD_STACK_RESERVED);
+
+		/* reserve 4 bytes for the start of user sp */
+		stackAdjEnd -= 4;
+		(*(u32_t *)stackAdjEnd) = STACK_ROUND_DOWN(
+			(u32_t)stackEnd - offset);
+
+#ifdef CONFIG_THREAD_USERSPACE_LOCAL_DATA
+		/* reserve stack space for the userspace local data struct */
+		thread->userspace_local_data =
+			(struct _thread_userspace_local_data *)
+			STACK_ROUND_DOWN(stackEnd -
+			sizeof(*thread->userspace_local_data) - offset);
+		/* update the start of user sp */
+		(*(u32_t *)stackAdjEnd) = (u32_t) thread->userspace_local_data;
+#endif
+
+	} else {
+	/* for kernel thread, the privilege stack is merged into thread stack */
+	/* if MPU_STACK_GUARD is enabled, reserve the the stack area
+	 * |---------------------|    |----------------|
+	 * |  user stack         |    | stack guard    |
+	 * |---------------------| to |----------------|
+	 * |  stack guard        |    | kernel thread  |
+	 * |---------------------|    | stack          |
+	 * |  privilege stack    |    |                |
+	 * ---------------------------------------------
+	 */
+		pStackMem += STACK_GUARD_SIZE;
+		stackAdjSize = stackAdjSize + CONFIG_PRIVILEGED_STACK_SIZE;
+		stackEnd += Z_ARCH_THREAD_STACK_RESERVED;
+
+		thread->arch.priv_stack_start = 0;
+
+#ifdef CONFIG_THREAD_USERSPACE_LOCAL_DATA
+		/* reserve stack space for the userspace local data struct */
+		stackAdjEnd = (char *)STACK_ROUND_DOWN(stackEnd
+			- sizeof(*thread->userspace_local_data) - offset);
+		thread->userspace_local_data =
+			(struct _thread_userspace_local_data *)stackAdjEnd;
+#else
+		stackAdjEnd = (char *)STACK_ROUND_DOWN(stackEnd - offset);
+#endif
+	}
+
+	z_new_thread_init(thread, pStackMem, stackAdjSize, priority, options);
+
+	/* carve the thread entry struct from the "base" of
+		the privileged stack */
+	pInitCtx = (struct init_stack_frame *)(
+		stackAdjEnd - sizeof(struct init_stack_frame));
+
+	/* fill init context */
+	pInitCtx->status32 = 0U;
+	if (options & K_USER) {
+		pInitCtx->pc = ((u32_t)z_user_thread_entry_wrapper);
+	} else {
+		pInitCtx->pc = ((u32_t)z_thread_entry_wrapper);
+	}
+
+	/*
+	 * enable US bit, US is read as zero in user mode. This will allow use
 	 * mode sleep instructions, and it enables a form of denial-of-service
 	 * attack by putting the processor in sleep mode, but since interrupt
 	 * level/mask can't be set from user space that's not worse than
 	 * executing a loop without yielding.
 	 */
-	iframe->status32 = _ARC_V2_STATUS32_US;
-	if (is_user(thread)) {
-		iframe->pc = (uint32_t)z_user_thread_entry_wrapper;
+	pInitCtx->status32 |= _ARC_V2_STATUS32_US;
+#else /* For no USERSPACE feature */
+	pStackMem += Z_ARCH_THREAD_STACK_RESERVED;
+	stackEnd = pStackMem + stackSize;
+
+	z_new_thread_init(thread, pStackMem, stackSize, priority, options);
+
+	stackAdjEnd = stackEnd;
+
+	pInitCtx = (struct init_stack_frame *)(
+		STACK_ROUND_DOWN(stackAdjEnd) -
+		sizeof(struct init_stack_frame));
+
+	pInitCtx->status32 = 0U;
+	pInitCtx->pc = ((u32_t)z_thread_entry_wrapper);
+#endif
+
+#ifdef CONFIG_ARC_HAS_SECURE
+	pInitCtx->sec_stat = z_arc_v2_aux_reg_read(_ARC_V2_SEC_STAT);
+#endif
+
+	pInitCtx->r0 = (u32_t)pEntry;
+	pInitCtx->r1 = (u32_t)parameter1;
+	pInitCtx->r2 = (u32_t)parameter2;
+	pInitCtx->r3 = (u32_t)parameter3;
+
+/* stack check configuration */
+#ifdef CONFIG_ARC_STACK_CHECKING
+#ifdef CONFIG_ARC_HAS_SECURE
+	pInitCtx->sec_stat |= _ARC_V2_SEC_STAT_SSC;
+#else
+	pInitCtx->status32 |= _ARC_V2_STATUS32_SC;
+#endif
+#ifdef CONFIG_USERSPACE
+	if (options & K_USER) {
+		thread->arch.u_stack_top = (u32_t)pStackMem;
+		thread->arch.u_stack_base = (u32_t)stackEnd;
+		thread->arch.k_stack_top =
+			 (u32_t)(stackEnd + STACK_GUARD_SIZE);
+		thread->arch.k_stack_base = (u32_t)
+		(stackEnd + Z_ARCH_THREAD_STACK_RESERVED);
 	} else {
-		iframe->pc = (uint32_t)z_thread_entry_wrapper;
+		thread->arch.k_stack_top = (u32_t)pStackMem;
+		thread->arch.k_stack_base = (u32_t)stackEnd;
+		thread->arch.u_stack_top = 0;
+		thread->arch.u_stack_base = 0;
 	}
 #else
-	iframe->status32 = 0;
-	iframe->pc = ((uint32_t)z_thread_entry_wrapper);
-#endif /* CONFIG_USERSPACE */
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	iframe->sec_stat = z_arc_v2_aux_reg_read(_ARC_V2_SEC_STAT);
+	thread->arch.k_stack_top = (u32_t) pStackMem;
+	thread->arch.k_stack_base = (u32_t) stackEnd;
 #endif
-	iframe->r0 = (uint32_t)entry;
-	iframe->r1 = (uint32_t)p1;
-	iframe->r2 = (uint32_t)p2;
-	iframe->r3 = (uint32_t)p3;
-
-#ifdef CONFIG_ARC_STACK_CHECKING
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	iframe->sec_stat |= _ARC_V2_SEC_STAT_SSC;
-#else
-	iframe->status32 |= _ARC_V2_STATUS32_SC;
-#endif /* CONFIG_ARC_SECURE_FIRMWARE */
-#endif /* CONFIG_ARC_STACK_CHECKING */
-#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
-	iframe->status32 |= _ARC_V2_STATUS32_AD;
 #endif
-	/* Set required thread members */
-	thread->switch_handle = thread;
+	/*
+	 * seti instruction in the end of the z_swap() will
+	 * enable the interrupts based on intlock_key
+	 * value.
+	 *
+	 * intlock_key is constructed based on ARCv2 ISA Programmer's
+	 * Reference Manual CLRI instruction description:
+	 * dst[31:6] dst[5] dst[4]       dst[3:0]
+	 *    26'd0    1    STATUS32.IE  STATUS32.E[3:0]
+	 */
+	thread->arch.intlock_key = 0x30 | (_ARC_V2_DEF_IRQ_LEVEL & 0xf);
 	thread->arch.relinquish_cause = _CAUSE_COOP;
 	thread->callee_saved.sp =
-		(uint32_t)iframe - ___callee_saved_stack_t_SIZEOF;
-
-	arch_setup_callee_saved_regs(thread, thread->callee_saved.sp);
+		(u32_t)pInitCtx - ___callee_saved_stack_t_SIZEOF;
 
 	/* initial values in all other regs/k_thread entries are irrelevant */
 }
 
-void *z_arch_get_next_switch_handle(struct k_thread **old_thread)
-{
-	*old_thread =  _current;
-
-	return z_get_next_switch_handle(*old_thread);
-}
 
 #ifdef CONFIG_USERSPACE
-FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry,
-					void *p1, void *p2, void *p3)
+
+FUNC_NORETURN void z_arch_user_mode_enter(k_thread_entry_t user_entry,
+	void *p1, void *p2, void *p3)
 {
-	setup_stack_vars(_current);
+
+	/*
+	 * adjust the thread stack layout
+	 * |----------------|    |---------------------|
+	 * | stack guard    |    |  user stack         |
+	 * |----------------| to |---------------------|
+	 * | kernel thread  |    |  stack guard        |
+	 * | stack          |    |---------------------|
+	 * |                |    |  privilege stack    |
+	 * ---------------------------------------------
+	 */
+	_current->stack_info.start = (u32_t)_current->stack_obj;
+	_current->stack_info.size -= CONFIG_PRIVILEGED_STACK_SIZE;
+
+	_current->arch.priv_stack_start =
+			(u32_t)(_current->stack_info.start +
+				_current->stack_info.size + STACK_GUARD_SIZE);
+
+#ifdef CONFIG_ARC_STACK_CHECKING
+	_current->arch.k_stack_top = _current->arch.priv_stack_start;
+	_current->arch.k_stack_base = _current->arch.priv_stack_start +
+				CONFIG_PRIVILEGED_STACK_SIZE;
+	_current->arch.u_stack_top = _current->stack_info.start;
+	_current->arch.u_stack_base = _current->stack_info.start +
+				_current->stack_info.size;
+#endif
 
 	/* possible optimizaiton: no need to load mem domain anymore */
 	/* need to lock cpu here ? */
 	configure_mpu_thread(_current);
 
 	z_arc_userspace_enter(user_entry, p1, p2, p3,
-			      (uint32_t)_current->stack_info.start,
-			      (_current->stack_info.size -
-			       _current->stack_info.delta), _current);
+			     (u32_t)_current->stack_obj,
+			     _current->stack_info.size);
 	CODE_UNREACHABLE;
 }
+
 #endif
-
-#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
-int arch_float_disable(struct k_thread *thread)
-{
-	unsigned int key;
-
-	/* Ensure a preemptive context switch does not occur */
-
-	key = irq_lock();
-
-	/* Disable all floating point capabilities for the thread */
-	thread->base.user_options &= ~K_FP_REGS;
-
-	irq_unlock(key);
-
-	return 0;
-}
-
-
-int arch_float_enable(struct k_thread *thread)
-{
-	unsigned int key;
-
-	/* Ensure a preemptive context switch does not occur */
-
-	key = irq_lock();
-
-	/* Enable all floating point capabilities for the thread */
-	thread->base.user_options |= K_FP_REGS;
-
-	irq_unlock(key);
-
-	return 0;
-}
-#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */

arch/arc/core/thread_entry_wrapper.S

@@ -13,23 +13,20 @@
 
 #include <toolchain.h>
 #include <linker/sections.h>
-#include <v2/irq.h>
 
 GTEXT(z_thread_entry_wrapper)
-GTEXT(z_thread_entry_wrapper1)
 
 /*
  * @brief Wrapper for z_thread_entry
  *
  * The routine pops parameters for the z_thread_entry from stack frame, prepared
- * by the arch_new_thread() routine.
+ * by the z_new_thread() routine.
  *
  * @return N/A
  */
 
 SECTION_FUNC(TEXT, z_thread_entry_wrapper)
-	seti _ARC_V2_INIT_IRQ_LOCK_KEY
-z_thread_entry_wrapper1:
+
 	pop_s r3
 	pop_s r2
 	pop_s r1

arch/arc/core/timestamp.c

@@ -23,17 +23,17 @@
  *
  * @return 64-bit time stamp value
  */
-uint64_t z_tsc_read(void)
+u64_t z_tsc_read(void)
 {
 	unsigned int key;
-	uint64_t t;
-	uint32_t count;
+	u64_t t;
+	u32_t count;
 
-	key = arch_irq_lock();
-	t = (uint64_t)z_tick_get();
+	key = irq_lock();
+	t = (u64_t)z_tick_get();
 	count = z_arc_v2_aux_reg_read(_ARC_V2_TMR0_COUNT);
-	arch_irq_unlock(key);
-	t *= k_ticks_to_cyc_floor64(1);
-	t += (uint64_t)count;
+	irq_unlock(key);
+	t *= (u64_t)sys_clock_hw_cycles_per_tick();
+	t += (u64_t)count;
 	return t;
 }

arch/arc/core/tls.c

@@ -1,42 +0,0 @@
-/*
- * Copyright (c) 2020 Intel Corporation
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <kernel.h>
-#include <kernel_structs.h>
-#include <kernel_internal.h>
-#include <kernel_tls.h>
-#include <sys/util.h>
-
-size_t arch_tls_stack_setup(struct k_thread *new_thread, char *stack_ptr)
-{
-	/*
-	 * TLS area for ARC has some data fields following by
-	 * thread data and bss. These fields are supposed to be
-	 * used by toolchain and OS TLS code to aid in locating
-	 * the TLS data/bss. Zephyr currently has no use for
-	 * this so we can simply skip these. However, since GCC
-	 * is generating code assuming these fields are there,
-	 * we simply skip them when setting the TLS pointer.
-	 */
-
-	/*
-	 * Since we are populating things backwards,
-	 * setup the TLS data/bss area first.
-	 */
-	stack_ptr -= z_tls_data_size();
-	z_tls_copy(stack_ptr);
-
-	/* Skip two pointers due to toolchain */
-	stack_ptr -= sizeof(uintptr_t) * 2;
-
-	/*
-	 * Set thread TLS pointer which is used in
-	 * context switch to point to TLS area.
-	 */
-	new_thread->tls = POINTER_TO_UINT(stack_ptr);
-
-	return (z_tls_data_size() + (sizeof(uintptr_t) * 2));
-}

arch/arc/core/userspace.S

@@ -11,47 +11,46 @@
 #include <arch/cpu.h>
 #include <syscall.h>
 #include <swap_macros.h>
-#include <v2/irq.h>
 
 .macro clear_scratch_regs
-	mov_s r1, 0
-	mov_s r2, 0
-	mov_s r3, 0
-	mov_s r4, 0
-	mov_s r5, 0
-	mov_s r6, 0
-	mov_s r7, 0
-	mov_s r8, 0
-	mov_s r9, 0
-	mov_s r10, 0
-	mov_s r11, 0
-	mov_s r12, 0
+	mov r1, 0
+	mov r2, 0
+	mov r3, 0
+	mov r4, 0
+	mov r5, 0
+	mov r6, 0
+	mov r7, 0
+	mov r8, 0
+	mov r9, 0
+	mov r10, 0
+	mov r11, 0
+	mov r12, 0
 .endm
 
 .macro clear_callee_regs
-	mov_s r25, 0
-	mov_s r24, 0
-	mov_s r23, 0
-	mov_s r22, 0
-	mov_s r21, 0
-	mov_s r20, 0
-	mov_s r19, 0
-	mov_s r18, 0
-	mov_s r17, 0
-	mov_s r16, 0
+	mov r25, 0
+	mov r24, 0
+	mov r23, 0
+	mov r22, 0
+	mov r21, 0
+	mov r20, 0
+	mov r19, 0
+	mov r18, 0
+	mov r17, 0
+	mov r16, 0
 
-	mov_s r15, 0
-	mov_s r14, 0
-	mov_s r13, 0
+	mov r15, 0
+	mov r14, 0
+	mov r13, 0
 .endm
 
 GTEXT(z_arc_userspace_enter)
 GTEXT(_arc_do_syscall)
 GTEXT(z_user_thread_entry_wrapper)
-GTEXT(arch_user_string_nlen)
-GTEXT(z_arc_user_string_nlen_fault_start)
-GTEXT(z_arc_user_string_nlen_fault_end)
-GTEXT(z_arc_user_string_nlen_fixup)
+GTEXT(z_arch_user_string_nlen)
+GTEXT(z_arch_user_string_nlen_fault_start)
+GTEXT(z_arch_user_string_nlen_fault_end)
+GTEXT(z_arch_user_string_nlen_fixup)
 /*
  * @brief Wrapper for z_thread_entry in the case of user thread
  * The init parameters are in privileged stack
@@ -59,7 +58,6 @@ GTEXT(z_arc_user_string_nlen_fixup)
  * @return N/A
  */
 SECTION_FUNC(TEXT, z_user_thread_entry_wrapper)
-	seti _ARC_V2_INIT_IRQ_LOCK_KEY
 	pop_s r3
 	pop_s r2
 	pop_s r1
@@ -67,7 +65,7 @@ SECTION_FUNC(TEXT, z_user_thread_entry_wrapper)
 /* the start of user sp is in r5 */
 	pop r5
 /* start of privilege stack in blink */
-	mov_s blink, sp
+	mov blink, sp
 
 	st.aw r0, [r5, -4]
 	st.aw r1, [r5, -4]
@@ -93,16 +91,25 @@ SECTION_FUNC(TEXT, z_arc_userspace_enter)
 	/*
 	 * In ARCv2, the U bit can only be set through exception return
 	 */
+#ifdef CONFIG_ARC_STACK_CHECKING
 	/* disable stack checking as the stack should be initialized */
-	_disable_stack_checking blink
-
+#ifdef CONFIG_ARC_HAS_SECURE
+	lr blink, [_ARC_V2_SEC_STAT]
+	bclr blink, blink, _ARC_V2_SEC_STAT_SSC_BIT
+	/* sflag blink */
+	/* sflag instruction is not supported in current ARC GNU */
+	.long 0x07ff302f
+#else
+	lr blink, [_ARC_V2_STATUS32]
+	bclr blink, blink, _ARC_V2_STATUS32_SC_BIT
+	kflag blink
+#endif
+#endif
 	/* the end of user stack in r5 */
 	add r5, r4, r5
-	/* get start of privilege stack, r6 points to current thread */
-	ld blink, [r6, _thread_offset_to_priv_stack_start]
-	add blink, blink, CONFIG_PRIVILEGED_STACK_SIZE
-
-	mov_s sp, r5
+	/* start of privilege stack */
+	add blink, r5, CONFIG_PRIVILEGED_STACK_SIZE+STACK_GUARD_SIZE
+	mov sp, r5
 
 	push_s r0
 	push_s r1
@@ -111,64 +118,62 @@ SECTION_FUNC(TEXT, z_arc_userspace_enter)
 
 	mov r5, sp /* skip r0, r1, r2, r3 */
 
-/* to avoid the leakage of kernel info, the thread stack needs to be
- * re-initialized
- */
 #ifdef CONFIG_INIT_STACKS
-	mov_s r0, 0xaaaaaaaa
+	mov r0, 0xaaaaaaaa
 #else
-	mov_s r0, 0x0
+	mov r0, 0x0
 #endif
 _clear_user_stack:
 	st.ab r0, [r4, 4]
 	cmp r4, r5
 	jlt _clear_user_stack
 
-/* reload the stack checking regs as the original kernel stack
- * becomes user stack
- */
 #ifdef CONFIG_ARC_STACK_CHECKING
-/* current thread in r6, SMP case is also considered */
-	mov r2, r6
+	mov r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
 
 	_load_stack_check_regs
 
-	_enable_stack_checking r0
+#ifdef CONFIG_ARC_HAS_SECURE
+	lr r0, [_ARC_V2_SEC_STAT]
+	bset r0, r0, _ARC_V2_SEC_STAT_SSC_BIT
+	/* sflag r0 */
+	/* sflag instruction is not supported in current ARC GNU */
+	.long 0x003f302f
+#else
+	lr r0, [_ARC_V2_STATUS32]
+	bset r0, r0, _ARC_V2_STATUS32_SC_BIT
+	kflag r0
+#endif
 #endif
 
-/* the following codes are used to switch from kernel mode
- * to user mode by fake exception, because U bit can only be set
- * by exception
- */
 _arc_go_to_user_space:
 	lr r0, [_ARC_V2_STATUS32]
 	bset r0, r0, _ARC_V2_STATUS32_U_BIT
 
-	mov_s r1, z_thread_entry_wrapper1
+	mov r1, z_thread_entry_wrapper
+
+	/* fake exception return */
+	kflag _ARC_V2_STATUS32_AE
 
 	sr r0, [_ARC_V2_ERSTATUS]
 	sr r1, [_ARC_V2_ERET]
 
-	/* fake exception return */
-	lr r0, [_ARC_V2_STATUS32]
-	bset r0, r0, _ARC_V2_STATUS32_AE_BIT
-	kflag r0
-
-/* when exception returns from kernel to user, sp and _ARC_V2_USER_SP
- * /_ARC_V2_SECU_SP will be switched
- */
-#if defined(CONFIG_ARC_HAS_SECURE) && defined(CONFIG_ARC_SECURE_FIRMWARE)
+#ifdef CONFIG_ARC_HAS_SECURE
 	lr r0, [_ARC_V2_SEC_STAT]
 	/* the mode returns from exception return is secure mode */
 	bset r0, r0, 31
 	sr r0, [_ARC_V2_ERSEC_STAT]
 	sr r5, [_ARC_V2_SEC_U_SP]
 #else
+	/* when exception returns from kernel to user, sp and _ARC_V2_USER_SP
+	 * will be switched
+	 */
 	sr r5, [_ARC_V2_USER_SP]
 #endif
-	mov_s sp, blink
+	mov sp, blink
 
-	mov_s r0, 0
+	mov r0, 0
 
 	clear_callee_regs
 
@@ -179,6 +184,11 @@ _arc_go_to_user_space:
 	mov r30, 0
 	mov blink, 0
 
+#ifdef CONFIG_EXECUTION_BENCHMARKING
+	b _capture_value_for_benchmarking_userspace
+return_loc_userspace_enter:
+#endif /* CONFIG_EXECUTION_BENCHMARKING */
+
 	rtie
 
 /**
@@ -206,7 +216,7 @@ SECTION_FUNC(TEXT, _arc_do_syscall)
 
 	mov r7, sp
 
-	mov_s blink, _k_syscall_table
+	mov blink, _k_syscall_table
 	ld.as r6, [blink, r6]
 
 	jl [r6]
@@ -222,25 +232,25 @@ SECTION_FUNC(TEXT, _arc_do_syscall)
 	bset r0, r0, _ARC_V2_STATUS32_AE_BIT
 	kflag r0
 
-
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
+#ifdef CONFIG_ARC_HAS_SECURE
 	ld_s r0, [sp, ___isf_t_sec_stat_OFFSET]
-	sr r0,[_ARC_V2_ERSEC_STAT]
+	sr r0, [_ARC_V2_ERSEC_STAT]
 #endif
 	ld_s r0, [sp, ___isf_t_status32_OFFSET]
-	sr r0,[_ARC_V2_ERSTATUS]
+	sr r0, [_ARC_V2_ERSTATUS]
 
 	ld_s r0, [sp, ___isf_t_pc_OFFSET] /* eret into pc */
-	sr r0,[_ARC_V2_ERET]
+	sr r0, [_ARC_V2_ERET]
 
 	_pop_irq_stack_frame
 
 	rtie
 
+
 /*
- * size_t arch_user_string_nlen(const char *s, size_t maxsize, int *err_arg)
+ * size_t z_arch_user_string_nlen(const char *s, size_t maxsize, int *err_arg)
  */
-SECTION_FUNC(TEXT, arch_user_string_nlen)
+SECTION_FUNC(TEXT, z_arch_user_string_nlen)
 	/* int err; */
 	sub_s sp,sp,0x4
 
@@ -259,11 +269,11 @@ SECTION_FUNC(TEXT, arch_user_string_nlen)
 	mov lp_count, r1
 
 strlen_loop:
-z_arc_user_string_nlen_fault_start:
+z_arch_user_string_nlen_fault_start:
 	/* is the byte at ++r12 a NULL? if so, we're done. Might fault! */
 	ldb.aw r1, [r12, 1]
 
-z_arc_user_string_nlen_fault_end:
+z_arch_user_string_nlen_fault_end:
 	brne_s r1, 0, not_null
 
 strlen_done:
@@ -271,7 +281,7 @@ strlen_done:
 	mov_s r1, 0
 	st_s r1, [sp, 0]
 
-z_arc_user_string_nlen_fixup:
+z_arch_user_string_nlen_fixup:
 	/* *err_arg = err; Pop stack and return */
 	ld_s r1, [sp, 0]
 	add_s sp, sp, 4
@@ -288,3 +298,20 @@ inc_len:
 	/* increment length measurement, loop again */
 	add_s r0, r0, 1
 	b_s strlen_loop
+
+#ifdef CONFIG_EXECUTION_BENCHMARKING
+	.balign 4
+_capture_value_for_benchmarking_userspace:
+	mov r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
+	_save_callee_saved_regs
+	push_s blink
+
+	bl read_timer_end_of_userspace_enter
+
+	pop_s blink
+	mov r1, _kernel
+	ld_s r2, [r1, _kernel_offset_to_current]
+	_load_callee_saved_regs
+	b return_loc_userspace_enter
+#endif

arch/arc/core/vector_table.c

@@ -28,39 +28,40 @@
 #include "vector_table.h"
 
 struct vector_table {
-	uint32_t reset;
-	uint32_t memory_error;
-	uint32_t instruction_error;
-	uint32_t ev_machine_check;
-	uint32_t ev_tlb_miss_i;
-	uint32_t ev_tlb_miss_d;
-	uint32_t ev_prot_v;
-	uint32_t ev_privilege_v;
-	uint32_t ev_swi;
-	uint32_t ev_trap;
-	uint32_t ev_extension;
-	uint32_t ev_div_zero;
-	uint32_t ev_dc_error;
-	uint32_t ev_maligned;
-	uint32_t unused_1;
-	uint32_t unused_2;
+	u32_t reset;
+	u32_t memory_error;
+	u32_t instruction_error;
+	u32_t ev_machine_check;
+	u32_t ev_tlb_miss_i;
+	u32_t ev_tlb_miss_d;
+	u32_t ev_prot_v;
+	u32_t ev_privilege_v;
+	u32_t ev_swi;
+	u32_t ev_trap;
+	u32_t ev_extension;
+	u32_t ev_div_zero;
+	u32_t ev_dc_error;
+	u32_t ev_maligned;
+	u32_t unused_1;
+	u32_t unused_2;
 };
 
 struct vector_table _VectorTable Z_GENERIC_SECTION(.exc_vector_table) = {
-	(uint32_t)__reset,
-	(uint32_t)__memory_error,
-	(uint32_t)__instruction_error,
-	(uint32_t)__ev_machine_check,
-	(uint32_t)__ev_tlb_miss_i,
-	(uint32_t)__ev_tlb_miss_d,
-	(uint32_t)__ev_prot_v,
-	(uint32_t)__ev_privilege_v,
-	(uint32_t)__ev_swi,
-	(uint32_t)__ev_trap,
-	(uint32_t)__ev_extension,
-	(uint32_t)__ev_div_zero,
-	(uint32_t)__ev_dc_error,
-	(uint32_t)__ev_maligned,
+	(u32_t)__reset,
+	(u32_t)__memory_error,
+	(u32_t)__instruction_error,
+	(u32_t)__ev_machine_check,
+	(u32_t)__ev_tlb_miss_i,
+	(u32_t)__ev_tlb_miss_d,
+	(u32_t)__ev_prot_v,
+	(u32_t)__ev_privilege_v,
+	(u32_t)__ev_swi,
+	(u32_t)__ev_trap,
+	(u32_t)__ev_extension,
+	(u32_t)__ev_div_zero,
+	(u32_t)__ev_dc_error,
+	(u32_t)__ev_maligned,
 	0,
 	0
 };
+

arch/arc/core/vector_table.ld

@@ -1,11 +0,0 @@
-/*
- * Copyright (c) 2019 Nordic Semiconductor ASA
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-/* when !XIP, .text is in RAM, and vector table must be at its very start */
-
-KEEP(*(.exc_vector_table))
-KEEP(*(".exc_vector_table.*"))
-KEEP(*(_IRQ_VECTOR_TABLE_SECTION_SYMS))

arch/arc/include/kernel_arch_data.h

@@ -20,87 +20,91 @@
 #ifndef ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_DATA_H_
 #define ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_DATA_H_
 
-#include <toolchain.h>
-#include <linker/sections.h>
-#include <arch/cpu.h>
-#include <vector_table.h>
-
-#ifndef _ASMLANGUAGE
-#include <kernel.h>
-#include <zephyr/types.h>
-#include <sys/util.h>
-#include <sys/dlist.h>
-
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#include <toolchain.h>
+#include <linker/sections.h>
+#include <arch/cpu.h>
+#include <vector_table.h>
+#include <kernel_arch_thread.h>
+
+#ifndef _ASMLANGUAGE
+#include <kernel.h>
+#include <kernel_internal.h>
+#include <zephyr/types.h>
+#include <misc/util.h>
+#include <misc/dlist.h>
+#endif
+
+#ifndef _ASMLANGUAGE
 #ifdef CONFIG_ARC_HAS_SECURE
 struct _irq_stack_frame {
-	uint32_t lp_end;
-	uint32_t lp_start;
-	uint32_t lp_count;
+	u32_t lp_end;
+	u32_t lp_start;
+	u32_t lp_count;
 #ifdef CONFIG_CODE_DENSITY
 	/*
 	 * Currently unsupported. This is where those registers are
 	 * automatically pushed on the stack by the CPU when taking a regular
 	 * IRQ.
 	 */
-	uint32_t ei_base;
-	uint32_t ldi_base;
-	uint32_t jli_base;
+	u32_t ei_base;
+	u32_t ldi_base;
+	u32_t jli_base;
 #endif
-	uint32_t r0;
-	uint32_t r1;
-	uint32_t r2;
-	uint32_t r3;
-	uint32_t r4;
-	uint32_t r5;
-	uint32_t r6;
-	uint32_t r7;
-	uint32_t r8;
-	uint32_t r9;
-	uint32_t r10;
-	uint32_t r11;
-	uint32_t r12;
-	uint32_t r13;
-	uint32_t blink;
-	uint32_t pc;
-	uint32_t sec_stat;
-	uint32_t status32;
+	u32_t r0;
+	u32_t r1;
+	u32_t r2;
+	u32_t r3;
+	u32_t r4;
+	u32_t r5;
+	u32_t r6;
+	u32_t r7;
+	u32_t r8;
+	u32_t r9;
+	u32_t r10;
+	u32_t r11;
+	u32_t r12;
+	u32_t r13;
+	u32_t blink;
+	u32_t pc;
+	u32_t sec_stat;
+	u32_t status32;
 };
 #else
 struct _irq_stack_frame {
-	uint32_t r0;
-	uint32_t r1;
-	uint32_t r2;
-	uint32_t r3;
-	uint32_t r4;
-	uint32_t r5;
-	uint32_t r6;
-	uint32_t r7;
-	uint32_t r8;
-	uint32_t r9;
-	uint32_t r10;
-	uint32_t r11;
-	uint32_t r12;
-	uint32_t r13;
-	uint32_t blink;
-	uint32_t lp_end;
-	uint32_t lp_start;
-	uint32_t lp_count;
+	u32_t r0;
+	u32_t r1;
+	u32_t r2;
+	u32_t r3;
+	u32_t r4;
+	u32_t r5;
+	u32_t r6;
+	u32_t r7;
+	u32_t r8;
+	u32_t r9;
+	u32_t r10;
+	u32_t r11;
+	u32_t r12;
+	u32_t r13;
+	u32_t blink;
+	u32_t lp_end;
+	u32_t lp_start;
+	u32_t lp_count;
 #ifdef CONFIG_CODE_DENSITY
 	/*
 	 * Currently unsupported. This is where those registers are
 	 * automatically pushed on the stack by the CPU when taking a regular
 	 * IRQ.
 	 */
-	uint32_t ei_base;
-	uint32_t ldi_base;
-	uint32_t jli_base;
+	u32_t ei_base;
+	u32_t ldi_base;
+	u32_t jli_base;
 #endif
-	uint32_t pc;
-	uint32_t status32;
+	u32_t pc;
+	u32_t status32;
 };
 #endif
 
@@ -110,47 +114,43 @@ typedef struct _irq_stack_frame _isf_t;
 
 /* callee-saved registers pushed on the stack, not in k_thread */
 struct _callee_saved_stack {
-	uint32_t r13;
-	uint32_t r14;
-	uint32_t r15;
-	uint32_t r16;
-	uint32_t r17;
-	uint32_t r18;
-	uint32_t r19;
-	uint32_t r20;
-	uint32_t r21;
-	uint32_t r22;
-	uint32_t r23;
-	uint32_t r24;
-	uint32_t r25;
-	uint32_t r26;
-	uint32_t fp; /* r27 */
+	u32_t r13;
+	u32_t r14;
+	u32_t r15;
+	u32_t r16;
+	u32_t r17;
+	u32_t r18;
+	u32_t r19;
+	u32_t r20;
+	u32_t r21;
+	u32_t r22;
+	u32_t r23;
+	u32_t r24;
+	u32_t r25;
+	u32_t r26;
+	u32_t fp; /* r27 */
 
 #ifdef CONFIG_USERSPACE
 #ifdef CONFIG_ARC_HAS_SECURE
-	uint32_t user_sp;
-	uint32_t kernel_sp;
+	u32_t user_sp;
+	u32_t kernel_sp;
 #else
-	uint32_t user_sp;
+	u32_t user_sp;
 #endif
 #endif
 	/* r28 is the stack pointer and saved separately */
 	/* r29 is ILINK and does not need to be saved */
-	uint32_t r30;
-
-#ifdef CONFIG_ARC_HAS_ACCL_REGS
-	uint32_t r58;
-	uint32_t r59;
-#endif
-
-#ifdef CONFIG_FPU_SHARING
-	uint32_t fpu_status;
-	uint32_t fpu_ctrl;
+	u32_t r30;
+#ifdef CONFIG_FP_SHARING
+	u32_t r58;
+	u32_t r59;
+	u32_t fpu_status;
+	u32_t fpu_ctrl;
 #ifdef CONFIG_FP_FPU_DA
-	uint32_t dpfp2h;
-	uint32_t dpfp2l;
-	uint32_t dpfp1h;
-	uint32_t dpfp1l;
+	u32_t dpfp2h;
+	u32_t dpfp2l;
+	u32_t dpfp1h;
+	u32_t dpfp1l;
 #endif
 
 #endif
@@ -162,10 +162,30 @@ struct _callee_saved_stack {
 
 typedef struct _callee_saved_stack _callee_saved_stack_t;
 
+struct _kernel_arch {
+
+	char *rirq_sp; /* regular IRQ stack pointer base */
+
+	/*
+	 * FIRQ stack pointer is installed once in the second bank's SP, so
+	 * there is no need to track it in _kernel.
+	 */
+
+};
+
+typedef struct _kernel_arch _kernel_arch_t;
+
+#endif /* _ASMLANGUAGE */
+
+/* stacks */
+
+#define STACK_ALIGN_SIZE 4
+
+#define STACK_ROUND_UP(x) ROUND_UP(x, STACK_ALIGN_SIZE)
+#define STACK_ROUND_DOWN(x) ROUND_DOWN(x, STACK_ALIGN_SIZE)
+
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* _ASMLANGUAGE */
-
 #endif /* ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_DATA_H_ */

arch/arc/include/kernel_arch_func.h

@@ -20,24 +20,27 @@
 #ifndef ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_FUNC_H_
 #define ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_FUNC_H_
 
-#if !defined(_ASMLANGUAGE)
+#ifdef __cplusplus
+extern "C" {
+#endif
 
-#include <kernel_arch_data.h>
+#if !defined(_ASMLANGUAGE)
 
 #ifdef CONFIG_CPU_ARCV2
 #include <v2/cache.h>
 #include <v2/irq.h>
 #endif
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-static ALWAYS_INLINE void arch_kernel_init(void)
+static ALWAYS_INLINE void kernel_arch_init(void)
 {
 	z_irq_setup();
 }
 
+static ALWAYS_INLINE void
+z_set_thread_return_value(struct k_thread *thread, unsigned int value)
+{
+	thread->arch.return_value = value;
+}
 
 /**
  *
@@ -48,38 +51,23 @@ static ALWAYS_INLINE void arch_kernel_init(void)
  */
 static ALWAYS_INLINE int Z_INTERRUPT_CAUSE(void)
 {
-	uint32_t irq_num = z_arc_v2_aux_reg_read(_ARC_V2_ICAUSE);
+	u32_t irq_num = z_arc_v2_aux_reg_read(_ARC_V2_ICAUSE);
 
 	return irq_num;
 }
 
-static inline bool arch_is_in_isr(void)
-{
-	return z_arc_v2_irq_unit_is_in_isr();
-}
+#define z_is_in_isr	z_arc_v2_irq_unit_is_in_isr
 
 extern void z_thread_entry_wrapper(void);
 extern void z_user_thread_entry_wrapper(void);
 
 extern void z_arc_userspace_enter(k_thread_entry_t user_entry, void *p1,
-		 void *p2, void *p3, uint32_t stack, uint32_t size,
-		 struct k_thread *thread);
+		 void *p2, void *p3, u32_t stack, u32_t size);
 
-extern void z_arc_fatal_error(unsigned int reason, const z_arch_esf_t *esf);
-
-extern void arch_sched_ipi(void);
-
-extern void z_arc_switch(void *switch_to, void **switched_from);
-
-static inline void arch_switch(void *switch_to, void **switched_from)
-{
-	z_arc_switch(switch_to, switched_from);
-}
+#endif /* _ASMLANGUAGE */
 
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* _ASMLANGUAGE */
-
 #endif /* ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_FUNC_H_ */

arch/arc/include/kernel_arch_thread.h

@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief Per-arch thread definition
+ *
+ * This file contains definitions for
+ *
+ *  struct _thread_arch
+ *  struct _callee_saved
+ *  struct _caller_saved
+ *
+ * necessary to instantiate instances of struct k_thread.
+ */
+
+#ifndef ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_THREAD_H_
+#define ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_THREAD_H_
+
+/*
+ * Reason a thread has relinquished control: threads can only be in the NONE
+ * or COOP state, threads can be one in the four.
+ */
+#define _CAUSE_NONE 0
+#define _CAUSE_COOP 1
+#define _CAUSE_RIRQ 2
+#define _CAUSE_FIRQ 3
+
+#ifndef _ASMLANGUAGE
+#include <zephyr/types.h>
+
+struct _caller_saved {
+	/*
+	 * Saved on the stack as part of handling a regular IRQ or by the
+	 * kernel when calling the FIRQ return code.
+	 */
+};
+
+typedef struct _caller_saved _caller_saved_t;
+
+struct _callee_saved {
+	u32_t sp; /* r28 */
+};
+typedef struct _callee_saved _callee_saved_t;
+
+struct _thread_arch {
+
+	/* interrupt key when relinquishing control */
+	u32_t intlock_key;
+
+	/* one of the _CAUSE_xxxx definitions above */
+	int relinquish_cause;
+
+	/* return value from z_swap */
+	unsigned int return_value;
+
+#ifdef CONFIG_ARC_STACK_CHECKING
+	/* High address of stack region, stack grows downward from this
+	 * location. Usesd for hardware stack checking
+	 */
+	u32_t k_stack_base;
+	u32_t k_stack_top;
+#ifdef CONFIG_USERSPACE
+	u32_t u_stack_base;
+	u32_t u_stack_top;
+#endif
+#endif
+
+#ifdef CONFIG_USERSPACE
+	u32_t priv_stack_start;
+#endif
+};
+
+typedef struct _thread_arch _thread_arch_t;
+
+#endif /* _ASMLANGUAGE */
+
+#endif /* ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_THREAD_H_ */

arch/arc/include/offsets_short_arch.h

@@ -17,9 +17,15 @@
 
 /* threads */
 
+#define _thread_offset_to_intlock_key \
+	(___thread_t_arch_OFFSET + ___thread_arch_t_intlock_key_OFFSET)
+
 #define _thread_offset_to_relinquish_cause \
 	(___thread_t_arch_OFFSET + ___thread_arch_t_relinquish_cause_OFFSET)
 
+#define _thread_offset_to_return_value \
+	(___thread_t_arch_OFFSET + ___thread_arch_t_return_value_OFFSET)
+
 #define _thread_offset_to_k_stack_base \
 	(___thread_t_arch_OFFSET + ___thread_arch_t_k_stack_base_OFFSET)
 
@@ -32,9 +38,6 @@
 #define _thread_offset_to_u_stack_top \
 	(___thread_t_arch_OFFSET + ___thread_arch_t_u_stack_top_OFFSET)
 
-#define _thread_offset_to_priv_stack_start \
-	(___thread_t_arch_OFFSET + ___thread_arch_t_priv_stack_start_OFFSET)
-
 #define _thread_offset_to_sp \
 	(___thread_t_callee_saved_OFFSET + ___callee_saved_t_sp_OFFSET)
 

arch/arc/include/swap_macros.h

@@ -13,11 +13,14 @@
 #include <offsets_short.h>
 #include <toolchain.h>
 #include <arch/cpu.h>
-#include <arch/arc/tool-compat.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 #ifdef _ASMLANGUAGE
 
-/* save callee regs of current thread in r2 */
+/* entering this macro, current is in r2 */
 .macro _save_callee_saved_regs
 
 	sub_s sp, sp, ___callee_saved_stack_t_SIZEOF
@@ -41,33 +44,20 @@
 
 #ifdef CONFIG_USERSPACE
 #ifdef CONFIG_ARC_HAS_SECURE
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
 	lr r13, [_ARC_V2_SEC_U_SP]
-	st_s r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
+	st r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
 	lr r13, [_ARC_V2_SEC_K_SP]
-	st_s r13, [sp, ___callee_saved_stack_t_kernel_sp_OFFSET]
+	st r13, [sp, ___callee_saved_stack_t_kernel_sp_OFFSET]
 #else
 	lr r13, [_ARC_V2_USER_SP]
-	st_s r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
-	lr r13, [_ARC_V2_KERNEL_SP]
-	st_s r13, [sp, ___callee_saved_stack_t_kernel_sp_OFFSET]
-#endif /* CONFIG_ARC_SECURE_FIRMWARE */
-#else
-	lr r13, [_ARC_V2_USER_SP]
-	st_s r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
+	st r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
 #endif
 #endif
 	st r30, [sp, ___callee_saved_stack_t_r30_OFFSET]
 
-#ifdef CONFIG_ARC_HAS_ACCL_REGS
+#ifdef CONFIG_FP_SHARING
 	st r58, [sp, ___callee_saved_stack_t_r58_OFFSET]
 	st r59, [sp, ___callee_saved_stack_t_r59_OFFSET]
-#endif
-
-#ifdef CONFIG_FPU_SHARING
-	ld_s r13, [r2, ___thread_base_t_user_options_OFFSET]
-	/* K_FP_REGS is bit 1 */
-	bbit0 r13, 1, 1f
 	lr r13, [_ARC_V2_FPU_STATUS]
 	st_s r13, [sp, ___callee_saved_stack_t_fpu_status_OFFSET]
 	lr r13, [_ARC_V2_FPU_CTRL]
@@ -83,27 +73,21 @@
 	lr r13, [_ARC_V2_FPU_DPFP2H]
 	st_s r13, [sp, ___callee_saved_stack_t_dpfp2h_OFFSET]
 #endif
-1 :
+
 #endif
 
 	/* save stack pointer in struct k_thread */
 	st sp, [r2, _thread_offset_to_sp]
 .endm
 
-/* load the callee regs of thread (in r2)*/
+/* entering this macro, current is in r2 */
 .macro _load_callee_saved_regs
 	/* restore stack pointer from struct k_thread */
 	ld sp, [r2, _thread_offset_to_sp]
 
-#ifdef CONFIG_ARC_HAS_ACCL_REGS
+#ifdef CONFIG_FP_SHARING
 	ld r58, [sp, ___callee_saved_stack_t_r58_OFFSET]
 	ld r59, [sp, ___callee_saved_stack_t_r59_OFFSET]
-#endif
-
-#ifdef CONFIG_FPU_SHARING
-	ld_s r13, [r2, ___thread_base_t_user_options_OFFSET]
-	/* K_FP_REGS is bit 1 */
-	bbit0 r13, 1, 2f
 
 	ld_s r13, [sp, ___callee_saved_stack_t_fpu_status_OFFSET]
 	sr r13, [_ARC_V2_FPU_STATUS]
@@ -120,22 +104,15 @@
 	ld_s r13, [sp, ___callee_saved_stack_t_dpfp2h_OFFSET]
 	sr r13, [_ARC_V2_FPU_DPFP2H]
 #endif
-2 :
+
 #endif
 
 #ifdef CONFIG_USERSPACE
 #ifdef CONFIG_ARC_HAS_SECURE
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	ld_s r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
+	ld r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
 	sr r13, [_ARC_V2_SEC_U_SP]
-	ld_s r13, [sp, ___callee_saved_stack_t_kernel_sp_OFFSET]
+	ld r13, [sp, ___callee_saved_stack_t_kernel_sp_OFFSET]
 	sr r13, [_ARC_V2_SEC_K_SP]
-#else
-	ld_s r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
-	sr r13, [_ARC_V2_USER_SP]
-	ld_s r13, [sp, ___callee_saved_stack_t_kernel_sp_OFFSET]
-	sr r13, [_ARC_V2_KERNEL_SP]
-#endif /* CONFIG_ARC_SECURE_FIRMWARE */
 #else
 	ld_s r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
 	sr r13, [_ARC_V2_USER_SP]
@@ -163,7 +140,6 @@
 
 .endm
 
-/* discard callee regs */
 .macro _discard_callee_saved_regs
 	add_s sp, sp, ___callee_saved_stack_t_SIZEOF
 .endm
@@ -260,18 +236,18 @@
 	 * The pc and status32 values will still be on the stack. We cannot
 	 * pop them yet because the callers of _pop_irq_stack_frame must reload
 	 * status32 differently depending on the execution context they are
-	 * running in (arch_switch(), firq or exception).
+	 * running in (z_swap(), firq or exception).
 	 */
 	add_s sp, sp, ___isf_t_SIZEOF
 
 .endm
 
 /*
- * To use this macro, r2 should have the value of thread struct pointer to
+ * To use this macor, r2 should have the value of thread struct pointer to
  * _kernel.current. r3 is a scratch reg.
  */
 .macro _load_stack_check_regs
-#if defined(CONFIG_ARC_SECURE_FIRMWARE)
+#ifdef CONFIG_ARC_HAS_SECURE
 	ld r3, [r2, _thread_offset_to_k_stack_base]
 	sr r3, [_ARC_V2_S_KSTACK_BASE]
 	ld r3, [r2, _thread_offset_to_k_stack_top]
@@ -293,233 +269,13 @@
 	ld r3, [r2, _thread_offset_to_u_stack_top]
 	sr r3, [_ARC_V2_USTACK_TOP]
 #endif
-#endif /* CONFIG_ARC_SECURE_FIRMWARE */
-.endm
-
-/* check and increase the interrupt nest counter
- * after increase, check whether nest counter == 1
- * the result will be EQ bit of status32
- * two temp regs are needed
- */
-.macro _check_and_inc_int_nest_counter, reg1, reg2
-#ifdef CONFIG_SMP
-	_get_cpu_id MACRO_ARG(reg1)
-	ld.as MACRO_ARG(reg1), [_curr_cpu, MACRO_ARG(reg1)]
-	ld MACRO_ARG(reg2), [MACRO_ARG(reg1), ___cpu_t_nested_OFFSET]
-#else
-	mov MACRO_ARG(reg1), _kernel
-	ld MACRO_ARG(reg2), [MACRO_ARG(reg1), _kernel_offset_to_nested]
-#endif
-	add MACRO_ARG(reg2), MACRO_ARG(reg2), 1
-#ifdef CONFIG_SMP
-	st MACRO_ARG(reg2), [MACRO_ARG(reg1), ___cpu_t_nested_OFFSET]
-#else
-	st MACRO_ARG(reg2), [MACRO_ARG(reg1), _kernel_offset_to_nested]
-#endif
-	cmp MACRO_ARG(reg2), 1
-.endm
-
-/* decrease interrupt stack nest counter
- * the counter > 0, interrupt stack is used, or
- * not used
- */
-.macro _dec_int_nest_counter, reg1, reg2
-#ifdef CONFIG_SMP
-	_get_cpu_id MACRO_ARG(reg1)
-	ld.as MACRO_ARG(reg1), [_curr_cpu, MACRO_ARG(reg1)]
-	ld MACRO_ARG(reg2), [MACRO_ARG(reg1), ___cpu_t_nested_OFFSET]
-#else
-	mov MACRO_ARG(reg1), _kernel
-	ld MACRO_ARG(reg2), [MACRO_ARG(reg1), _kernel_offset_to_nested]
-#endif
-	sub MACRO_ARG(reg2), MACRO_ARG(reg2), 1
-#ifdef CONFIG_SMP
-	st MACRO_ARG(reg2), [MACRO_ARG(reg1), ___cpu_t_nested_OFFSET]
-#else
-	st MACRO_ARG(reg2), [MACRO_ARG(reg1), _kernel_offset_to_nested]
-#endif
-.endm
-
-/* If multi bits in IRQ_ACT are set, i.e. last bit != fist bit, it's
- * in nest interrupt. The result will be EQ bit of status32
- * need two temp reg to do this
- */
-.macro _check_nest_int_by_irq_act, reg1, reg2
-	lr MACRO_ARG(reg1), [_ARC_V2_AUX_IRQ_ACT]
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	and MACRO_ARG(reg1), MACRO_ARG(reg1), ((1 << ARC_N_IRQ_START_LEVEL) - 1)
-#else
-	and MACRO_ARG(reg1), MACRO_ARG(reg1), 0xffff
-#endif
-	ffs MACRO_ARG(reg2), MACRO_ARG(reg1)
-	fls MACRO_ARG(reg1), MACRO_ARG(reg1)
-	cmp MACRO_ARG(reg1), MACRO_ARG(reg2)
-.endm
-
-
-/* macro to get id of current cpu
- * the result will be in reg (a reg)
- */
-.macro _get_cpu_id, reg
-	lr MACRO_ARG(reg), [_ARC_V2_IDENTITY]
-	xbfu MACRO_ARG(reg), MACRO_ARG(reg), 0xe8
-.endm
-
-/* macro to get the interrupt stack of current cpu
- * the result will be in irq_sp (a reg)
- */
-.macro _get_curr_cpu_irq_stack, irq_sp
-#ifdef CONFIG_SMP
-	_get_cpu_id MACRO_ARG(irq_sp)
-	ld.as MACRO_ARG(irq_sp), [_curr_cpu, MACRO_ARG(irq_sp)]
-	ld MACRO_ARG(irq_sp), [MACRO_ARG(irq_sp), ___cpu_t_irq_stack_OFFSET]
-#else
-	mov MACRO_ARG(irq_sp), _kernel
-	ld MACRO_ARG(irq_sp), [MACRO_ARG(irq_sp), _kernel_offset_to_irq_stack]
-#endif
-.endm
-
-/* macro to push aux reg through reg */
-.macro PUSHAX, reg, aux
-	lr MACRO_ARG(reg), [MACRO_ARG(aux)]
-	st.a MACRO_ARG(reg), [sp, -4]
-.endm
-
-/* macro to pop aux reg through reg */
-.macro POPAX, reg, aux
-	ld.ab MACRO_ARG(reg), [sp, 4]
-	sr MACRO_ARG(reg), [MACRO_ARG(aux)]
-.endm
-
-
-/* macro to store old thread call regs */
-.macro _store_old_thread_callee_regs
-
-	_save_callee_saved_regs
-#ifdef CONFIG_SMP
-	/* save old thread into switch handle which is required by
-	 * wait_for_switch
-	 */
-	st r2, [r2, ___thread_t_switch_handle_OFFSET]
-#endif
-.endm
-
-/* macro to store old thread call regs  in interrupt*/
-.macro _irq_store_old_thread_callee_regs
-#if defined(CONFIG_USERSPACE)
-/*
- * when USERSPACE is enabled, according to ARCv2 ISA, SP will be switched
- * if interrupt comes out in user mode, and will be recorded in bit 31
- * (U bit) of IRQ_ACT. when interrupt exits, SP will be switched back
- * according to U bit.
- *
- * need to remember the user/kernel status of interrupted thread, will be
- * restored when thread switched back
- *
- */
-	lr r1, [_ARC_V2_AUX_IRQ_ACT]
-	and r3, r1, 0x80000000
-	push_s r3
-
-	bclr r1, r1, 31
-	sr r1, [_ARC_V2_AUX_IRQ_ACT]
-#endif
-	_store_old_thread_callee_regs
-.endm
-
-/* macro to load new thread callee regs */
-.macro _load_new_thread_callee_regs
-#ifdef CONFIG_ARC_STACK_CHECKING
-	_load_stack_check_regs
-#endif
-	/*
-	 * _load_callee_saved_regs expects incoming thread in r2.
-	 * _load_callee_saved_regs restores the stack pointer.
-	 */
-	_load_callee_saved_regs
-
-#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
-	push_s r2
-	bl configure_mpu_thread
-	pop_s r2
-#endif
-
-	ld r3, [r2, _thread_offset_to_relinquish_cause]
-.endm
-
-
-/* when switch to thread caused by coop, some status regs need to set */
-.macro _set_misc_regs_irq_switch_from_coop
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	/* must return to secure mode, so set IRM bit to 1 */
-	lr r0, [_ARC_V2_SEC_STAT]
-	bset r0, r0, _ARC_V2_SEC_STAT_IRM_BIT
-	sflag r0
-#endif
-.endm
-
-/* when switch to thread caused by irq, some status regs need to set */
-.macro _set_misc_regs_irq_switch_from_irq
-#if defined(CONFIG_USERSPACE)
-/*
- * need to recover the user/kernel status of interrupted thread
- */
-	pop_s r3
-	lr r2, [_ARC_V2_AUX_IRQ_ACT]
-	or r2, r2, r3
-	sr r2, [_ARC_V2_AUX_IRQ_ACT]
-#endif
-
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	/* here need to recover SEC_STAT.IRM bit */
-	pop_s r3
-	sflag r3
-#endif
-.endm
-
-/* macro to get next switch handle in assembly */
-.macro _get_next_switch_handle
-	push_s r2
-	mov r0, sp
-	bl z_arch_get_next_switch_handle
-	pop_s  r2
-.endm
-
-/* macro to disable stack checking in assembly, need a GPR
- * to do this
- */
-.macro _disable_stack_checking, reg
-#ifdef CONFIG_ARC_STACK_CHECKING
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	lr MACRO_ARG(reg), [_ARC_V2_SEC_STAT]
-	bclr MACRO_ARG(reg), MACRO_ARG(reg), _ARC_V2_SEC_STAT_SSC_BIT
-	sflag MACRO_ARG(reg)
-
-#else
-	lr MACRO_ARG(reg), [_ARC_V2_STATUS32]
-	bclr MACRO_ARG(reg), MACRO_ARG(reg), _ARC_V2_STATUS32_SC_BIT
-	kflag MACRO_ARG(reg)
-#endif
-#endif
-.endm
-
-/* macro to enable stack checking in assembly, need a GPR
- * to do this
- */
-.macro _enable_stack_checking, reg
-#ifdef CONFIG_ARC_STACK_CHECKING
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-	lr MACRO_ARG(reg), [_ARC_V2_SEC_STAT]
-	bset MACRO_ARG(reg), MACRO_ARG(reg), _ARC_V2_SEC_STAT_SSC_BIT
-	sflag MACRO_ARG(reg)
-#else
-	lr MACRO_ARG(reg), [_ARC_V2_STATUS32]
-	bset MACRO_ARG(reg), MACRO_ARG(reg), _ARC_V2_STATUS32_SC_BIT
-	kflag MACRO_ARG(reg)
-#endif
-#endif
+#endif /* CONFIG_ARC_HAS_SECURE */
 .endm
 
 #endif /* _ASMLANGUAGE */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /*  ZEPHYR_ARCH_ARC_INCLUDE_SWAP_MACROS_H_ */

arch/arc/include/tracing_arch.h

@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2016 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief Kernel event logger support for ARM
+ */
+
+#ifndef ZEPHYR_ARCH_ARC_INCLUDE_TRACING_ARCH_H_
+#define ZEPHYR_ARCH_ARC_INCLUDE_TRACING_ARCH_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Get the identification of the current interrupt.
+ *
+ * This routine obtain the key of the interrupt that is currently processed
+ * if it is called from a ISR context.
+ *
+ * @return The key of the interrupt that is currently being processed.
+ */
+int z_sys_current_irq_key_get(void)
+{
+	return Z_INTERRUPT_CAUSE();
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ZEPHYR_ARCH_ARC_INCLUDE_TRACING_ARCH_H_ */

arch/arc/include/v2/cache.h

@@ -17,12 +17,12 @@
 
 #include <arch/cpu.h>
 
-#ifndef _ASMLANGUAGE
-
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#ifndef _ASMLANGUAGE
+
 /* i-cache defines for IC_CTRL register */
 #define IC_CACHE_ENABLE   0x00
 #define IC_CACHE_DISABLE  0x01
@@ -36,11 +36,11 @@ extern "C" {
  */
 static ALWAYS_INLINE void z_icache_setup(void)
 {
-	uint32_t icache_config = (
+	u32_t icache_config = (
 		IC_CACHE_DIRECT | /* direct mapping (one-way assoc.) */
 		IC_CACHE_ENABLE   /* i-cache enabled */
 	);
-	uint32_t val;
+	u32_t val;
 
 	val = z_arc_v2_aux_reg_read(_ARC_V2_I_CACHE_BUILD);
 	val &= 0xff;
@@ -50,10 +50,10 @@ static ALWAYS_INLINE void z_icache_setup(void)
 	}
 }
 
+#endif /* _ASMLANGUAGE */
+
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* _ASMLANGUAGE */
-
 #endif /* ZEPHYR_ARCH_ARC_INCLUDE_V2_CACHE_H_ */

arch/arc/include/v2/irq.h

@@ -15,8 +15,6 @@
 #ifndef ZEPHYR_ARCH_ARC_INCLUDE_V2_IRQ_H_
 #define ZEPHYR_ARCH_ARC_INCLUDE_V2_IRQ_H_
 
-#include <arch/cpu.h>
-
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -30,22 +28,13 @@ extern "C" {
 #define _ARC_V2_AUX_IRQ_CTRL_32_REGS 16
 
 
-#ifdef CONFIG_ARC_SECURE_FIRMWARE
-#define _ARC_V2_DEF_IRQ_LEVEL (ARC_N_IRQ_START_LEVEL - 1)
-#else
-#define _ARC_V2_DEF_IRQ_LEVEL (CONFIG_NUM_IRQ_PRIO_LEVELS - 1)
-#endif
-
+#define _ARC_V2_DEF_IRQ_LEVEL (CONFIG_NUM_IRQ_PRIO_LEVELS-1)
 #define _ARC_V2_WAKE_IRQ_LEVEL _ARC_V2_DEF_IRQ_LEVEL
 
-/*
- * INIT_IRQ_LOCK_KEY is init interrupt level setting of a thread.
- * It's configured by seti instruction when a thread starts to run
- *, i.e., z_thread_entry_wrapper and z_user_thread_entry_wrapper
- */
-#define _ARC_V2_INIT_IRQ_LOCK_KEY (0x10 | _ARC_V2_DEF_IRQ_LEVEL)
-
 #ifndef _ASMLANGUAGE
+
+extern K_THREAD_STACK_DEFINE(_interrupt_stack, CONFIG_ISR_STACK_SIZE);
+
 /*
  * z_irq_setup
  *
@@ -53,7 +42,7 @@ extern "C" {
  */
 static ALWAYS_INLINE void z_irq_setup(void)
 {
-	uint32_t aux_irq_ctrl_value = (
+	u32_t aux_irq_ctrl_value = (
 		_ARC_V2_AUX_IRQ_CTRL_LOOP_REGS | /* save lp_xxx registers */
 #ifdef CONFIG_CODE_DENSITY
 		_ARC_V2_AUX_IRQ_CTRL_LP | /* save code density registers */
@@ -62,14 +51,11 @@ static ALWAYS_INLINE void z_irq_setup(void)
 		_ARC_V2_AUX_IRQ_CTRL_14_REGS     /* save r0 -> r13 (caller-saved) */
 	);
 
-	z_arc_cpu_sleep_mode = _ARC_V2_WAKE_IRQ_LEVEL;
-
-#ifdef CONFIG_ARC_NORMAL_FIRMWARE
-	/* normal mode cannot write irq_ctrl, ignore it */
-	aux_irq_ctrl_value = aux_irq_ctrl_value;
-#else
+	k_cpu_sleep_mode = _ARC_V2_WAKE_IRQ_LEVEL;
 	z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_CTRL, aux_irq_ctrl_value);
-#endif
+
+	_kernel.irq_stack =
+		Z_THREAD_STACK_BUFFER(_interrupt_stack) + CONFIG_ISR_STACK_SIZE;
 }
 
 #endif /* _ASMLANGUAGE */

arch/arc/include/vector_table.h

@@ -21,6 +21,10 @@
 #ifndef ZEPHYR_ARCH_ARC_INCLUDE_VECTOR_TABLE_H_
 #define ZEPHYR_ARCH_ARC_INCLUDE_VECTOR_TABLE_H_
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define EXC_EV_TRAP	0x9
 
 #ifdef _ASMLANGUAGE
@@ -51,10 +55,6 @@ GTEXT(_isr_wrapper)
 
 #else
 
-#ifdef __cplusplus
-extern "C" {
-#endif
-
 extern void __reset(void);
 extern void __memory_error(void);
 extern void __instruction_error(void);
@@ -70,10 +70,10 @@ extern void __ev_div_zero(void);
 extern void __ev_dc_error(void);
 extern void __ev_maligned(void);
 
+#endif /* _ASMLANGUAGE */
+
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* _ASMLANGUAGE */
-
 #endif /* ZEPHYR_ARCH_ARC_INCLUDE_VECTOR_TABLE_H_ */

arch/arm/CMakeLists.txt

@@ -1,11 +1,25 @@
 # SPDX-License-Identifier: Apache-2.0
 
-if(CONFIG_ARM64)
-  set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf64-littleaarch64)
+set(ARCH_FOR_cortex-m0        armv6s-m        )
+set(ARCH_FOR_cortex-m0plus    armv6s-m        )
+set(ARCH_FOR_cortex-m3        armv7-m         )
+set(ARCH_FOR_cortex-m4        armv7e-m        )
+set(ARCH_FOR_cortex-m23       armv8-m.base    )
+set(ARCH_FOR_cortex-m33       armv8-m.main+dsp)
+set(ARCH_FOR_cortex-m33+nodsp armv8-m.main    )
 
-  add_subdirectory(core/aarch64)
-else()
-  set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-littlearm)
-
-  add_subdirectory(core/aarch32)
+if(ARCH_FOR_${GCC_M_CPU})
+    set(ARCH_FLAG -march=${ARCH_FOR_${GCC_M_CPU}})
 endif()
+
+zephyr_compile_options(
+  -mabi=aapcs
+  ${ARCH_FLAG}
+  )
+
+zephyr_ld_options(
+  -mabi=aapcs
+  ${ARCH_FLAG}
+  )
+
+add_subdirectory(core)

arch/arm/Kconfig

@@ -1,49 +1,18 @@
-# ARM architecture configuration options
+# Kconfig - ARM architecture configuration options
 
+#
 # Copyright (c) 2014-2015 Wind River Systems, Inc.
+#
 # SPDX-License-Identifier: Apache-2.0
+#
+
 
 menu "ARM Options"
 	depends on ARM
 
+source "arch/arm/core/Kconfig"
+
 config ARCH
 	default "arm"
 
-config ARM64
-	bool
-	select 64BIT
-
-config CPU_CORTEX
-	bool
-	help
-	  This option signifies the use of a CPU of the Cortex family.
-
-config ARM_CUSTOM_INTERRUPT_CONTROLLER
-	bool
-	depends on !CPU_CORTEX_M
-	help
-	  This option indicates that the ARM CPU is connected to a custom (i.e.
-	  non-GIC) interrupt controller.
-
-	  A number of Cortex-A and Cortex-R cores (Cortex-A5, Cortex-R4/5, ...)
-	  allow interfacing to a custom external interrupt controller and this
-	  option must be selected when such cores are connected to an interrupt
-	  controller that is not the ARM Generic Interrupt Controller (GIC).
-
-	  When this option is selected, the architecture interrupt control
-	  functions are mapped to the SoC interrupt control interface, which is
-	  implemented at the SoC level.
-
-	  N.B. This option is only applicable to the Cortex-A and Cortex-R
-	       family cores. The Cortex-M family cores are always equipped with
-	       the ARM Nested Vectored Interrupt Controller (NVIC).
-
-if !ARM64
-rsource "core/aarch32/Kconfig"
-endif
-
-if ARM64
-rsource "core/aarch64/Kconfig"
-endif
-
 endmenu

arch/arm/core/CMakeLists.txt

@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_library()
+
+zephyr_compile_options_ifdef(CONFIG_COVERAGE_GCOV
+  -ftest-coverage
+  -fprofile-arcs
+  -fno-inline
+  )
+
+zephyr_library_sources(
+  exc_exit.S
+  irq_init.c
+  swap.c
+  swap_helper.S
+  fault.c
+  irq_manage.c
+  thread.c
+  cpu_idle.S
+  fault_s.S
+  fatal.c
+  sys_fatal_error_handler.c
+  thread_abort.c
+)
+
+zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr_wrapper.S)
+zephyr_library_sources_ifdef(CONFIG_CPLUSPLUS __aeabi_atexit.c)
+zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c)
+zephyr_library_sources_ifdef(CONFIG_CPU_CORTEX_M0 irq_relay.S)
+zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)
+
+add_subdirectory_ifdef(CONFIG_CPU_CORTEX_M cortex_m)
+add_subdirectory_ifdef(CONFIG_ARM_MPU cortex_m/mpu)
+add_subdirectory_ifdef(CONFIG_CPU_CORTEX_M_HAS_CMSE cortex_m/cmse)
+add_subdirectory_ifdef(CONFIG_ARM_SECURE_FIRMWARE cortex_m/tz)