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71 Commits

Author SHA1 Message Date
Gerard Marull-Paretas
52e06334fb ci: manifest: do not persist git credentials
With this setting enabled, Git credentials are not kept after checkout.
Credentials are not necessary after the checkout step, since we do not
do any further manual push/pull operations.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-02-25 07:18:16 -05:00
Anas Nashif
8be935fe5c doc: 2.5.1 release notes
Add release notes placeholder for 2.5.1 release.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-08-03 15:32:18 -04:00
Anas Nashif
37139f93d9 release: Bump release to 2.5.1-rc1
Increase version to 2.5.1-rc1.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-08-03 15:32:18 -04:00
Daniel Leung
3b369ee0c1 tests: schedule_api: lengthen interval for slicing reset test
When calculating the expected interval for threads other than
the first one, the test uses ms->ticks->cycles conversion to
figure out the bound of cycles permitted. Both lower and upper
bound conversions are using the k_*_to_*_floor32(). When
numbers involved are not wholly divisible, decimal points are
being truncated, resulting in incorrect intervals, and thus
failing tests. So change the calculation to appropriate
floor() or ceil() based on the boundary.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-07-20 20:05:00 -04:00
Vinayak Kariappa Chettimada
82db759ce0 Bluetooth: controller: Fix missing encryption procedure state check
Fix a missing encryption procedure state check which allowed
out of order receive of START_ENC_RSP PDU, which made the
controller to believe its already in an encryption procedure
in progress state.

Fixes #34392.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-07-17 08:11:24 -04:00
Joakim Andersson
5a430eea41 Bluetooth: host: Fix L2CAP sent callback on disconnected channel
When receiving the L2CAP sent callbacks the dynamic L2CAP channel may
have been disconnected already. The user of the dynamic channel should
have received the disconnected and released callbacks for this channel
to release any resources for the data being sent, so simply ignoring
this sent callback is enough.

Fix sent callbacks by providing the CID to the callback instead of a
pointer to potentially released memory, and lookup the CID to check that
it is still valid.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2021-06-29 13:27:03 -04:00
Joakim Andersson
79d575bf35 Bluetooth: controller: Check length field of scan response data
Check the length field of the scan response data.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2021-06-11 16:57:07 +02:00
Dong Wang
dabf237584 interrupt_controller: ioapic: support more device power states
do nothing when enter or resume from DEVICE_PM_LOW_POWER_STATE

Signed-off-by: Dong Wang <dong.d.wang@intel.com>
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-05-14 16:00:43 -04:00
Martí Bolívar
4e8b382e03 soc: nrf: fix NRF_DT_CHECK_GPIO_CTLR_IS_SOC
This was merged by mistake without being tested and is not working
properly. We need to avoid doing a BUILD_ASSERT() when the relevant
property is missing, because we can't use DT_GPIO_CTLR() on an
undefined property. Handle this with COND_CODE_1().

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-04-22 17:17:08 -04:00
Luiz Augusto von Dentz
b02636053a Bluetooth: ATT: Add documentation for chan_send
chan_send does restore buffer state in case of an error which is
different than how bt_l2cap_send_cb works as it does always unref in
case of an error.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2021-04-22 17:16:49 -04:00
Luiz Augusto von Dentz
66f77f9d92 Bluetooth: ATT: Fix crash if bt_l2cap_send_cb fails
This fixes a regression introduced by
10841b9a14 as it did remove a call to
net_buf_ref which was used not only to keep a reference for resending
but also to prevent bt_l2cap_send_cb to unref the buffer in case it
fails.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2021-04-22 17:16:49 -04:00
Vinayak Kariappa Chettimada
9e3c7b995f Bluetooth: controller: Fix flash driver sync regression
Fix flash driver sync regression introduced due to changed
default ULL_HIGH in the commit 30634334a8 ("Bluetooth:
controller: Fix ULL_HIGH priority to be lower than LLL").

Fixes #33862.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-13 19:53:20 +02:00
Vinayak Kariappa Chettimada
f642feba06 Bluetooth: controller: Increased thread context operation queue count
When ticker job is disabled inside radio events then all
advertising, scanning, and slave latency cancel ticker
operations will be deferred, requiring increased ticker
thread context operation queue count.

Relates to #32430.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-13 19:53:20 +02:00
Vinayak Kariappa Chettimada
f9dd4c24e5 Bluetooth: controller: Facilitate reuse of BT_CTLR_MAX_CONNECTABLE
Minor rearrange order of definition BT_CTLR_MAX_CONNECTABLE
to better reuse it.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-13 19:53:20 +02:00
Vinayak Kariappa Chettimada
fc47320d93 Bluetooth: controller: Consistent use of internal BT_CTLR_ADV_SET
Consistently use the internal BT_CTLR_ADV_SET value in the
controller's implementation.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-13 19:53:20 +02:00
Kumar Gala
ec0aa8331a drivers: uart: uart_cmsdk_apb: fix interrupt handling
The CMSDK uart interrupts for TX and RX can either be treated as a
signel interrupt line or distinct interrupts for TX & RX.  In the case
that they were distinct we didn't get the ifdef correct based on DTS.

If we have 2 interrupts in DTS we assume they are for TX & RX and thus
build the interrupt support for distinct TX & RX ISRs.

Also, cleanup handling of UART_2..UART_4 to be similar to how
UART_0/UART_1 code is using DT_INST_IRQN(x).

Fixes #30770
Fixes #25601

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-04-08 11:15:29 -05:00
Gustavo Romero
92e005122a tests: Add test to check uart_irq_is_pending
Add test to check if uart_irq_is_pending() correctly returns 0 (meaning
there are no more RX and TX pending interrupts) when all RX and TX data
is processed.

Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
2021-04-07 12:04:47 -05:00
Gustavo Romero
bd0fe17fa0 drivers: uart: uart_cmsdk_apb: Fix uart_irq_is_pending
Currently CMSDK uart_irq_is_pending does not use RX and TX interrupt
bits found in INTSTATUS register to check for pending interrutps but
rather it checks for pending interrupts indirectly by checking if RX and
TX buffers are, respectively, full and empty, i.e. it checks bits 0 and
1 in STATE register instead of bits meant for interrupt status found in
INTSTATUS register.

That is particularly problematic because although a RX interrupt implies
a RX buffer full and a TX interrupt implies a TX buffer empty, the
converse is not true. For instance, a TX buffer might be empty for all
data was processed (sent to serial line) already and no further data was
pushed into TX buffer so it remained empty, without generating any
additional TX interrupt. In that case the current uart_irq_is_pending
implementation reports that there are pending interrupts because of the
following logic:

/* Return true if rx buffer full or tx buffer empty */
return (UART_STRUCT(dev)->state & (UART_RX_BF | UART_TX_BF))
                                != UART_TX_BF;

which will return 1 (true) if STATE[0] = 0 (TX buffer is empty), since
UART_TX_BF = 1, so STATE[0] != UART_TX_BF, which is true (assuming here
for the sake of simplicity that UART_RX_BF = 0, i.e. RX buffer is empty
too).

One of the common uses of uart_irq_is_pending is in ISR in contructs
like the following:

while (uart_irq_update(dev) && uart_irq_is_pending(dev)) {
  if (uart_irq_rx_ready(dev) == 0) { // RX buffer is empty
    continue;
  }
  // RX buffer is full, process RX data
}

So the ISR can be called due to a RX interrupt. Upon finishing
processing the RX data uart_irq_is_pending is called to check for any
pending IRQs and if it happens that TX buffer is empty (like in the case
that TX interrupt is totally disabled) execution gets stuck in the while
loop because TX buffer will never transition to full again, i.e. it will
never have a chance to have STATE[0] = 1, so STATE[0] != UART_TX_BF is
always true.

This commit fixes that undesirable and problematic behavior by making
uart_irq_is_pending use the proper bits in the interrupt status register
(INTSTATUS) to determine if there is indeed any pending interrupts.

That, on the other hand, requires that the pending interrupt flags are
not clearly automatically when calling the ISR, otherwise
uart_irq_is_pending() will return immediatly false on the first call
without any data being really processed inside the ISR. Thus, because
both RX and TX buffer (FIFO) are only 1 byte long, that commit clears
the proper interrupts flags precisely when data is processed (fifo_read
and fifo_fill) or when the interrupts are disabled (irq_rx_disable and
irq_tx_disable).

Finally, that commits also takes the chance to update some comments,
specially regarding the need to "prime" when enabling the TX interrupts
(in uart_cmsdk_apb_irq_tx_enable()). The need to "prime" can be verified
in the CMSDK UART reference implementation in Verilog mentioned in the
"Arm Cortex-M System Design Kit" [0], on p. 4-8, section 4.3,
in cmsdk_apb_uart.v. In that implementation it's also possible to verify
that the FIFO is only 1 byte long, justifying the semantics that if
buffers are not full (STATE[0] or STATE[1] = 0) they are _completly_
empty, holding no data at all.

[0] https://documentation-service.arm.com/static/5e8f1c777100066a414f770b

Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
2021-04-07 12:04:47 -05:00
Gustavo Romero
fe3f71bdad boards: arm: mps2-an521: Fix DT memory regions
Currently RAM region specified in the DT for board mps2-an512 to store
data (not to run code) is set to start at 0x3000_0000 and a 16M
contiguous space is assumed. However, at that address there is no such
contiguous space of 16M, rather only a 128K area is available. As a
consequence large applications linked with Zephyr might end up using
memory regions that are not valid, specially at runtime when the stack
grows, causing a BusFault.

Application Note 512 only specifies a 16M contiguous space available
starting at 0x8000_0000 (please see 'Table 3-4: SSRAM2 and SSRAM3
address mapping' and 'Table 3-6: External PSRAM mapping to Code Memory',
on pages 3-7 and 3-8, respectively), which resides in the PSRAM
(external RAM).

The AN521 also specifies a 4M contiguous space available starting at
0x3800_0000 which can be used as RAM for data storage and which is not
currently described in the DT.

The current DT also defines a 224M flash region (to run code) which
doesn't effectively exist, because most of it is reserved (~148M).

That commit fixes the incorrect definition of region 0x3000_0000 (16M)
and hence defines a new region called 'sram2_3' that maps to region
0x3800_0000 (4M) which is used as RAM to store data, and fixes the flash
region defining a new region 'sram1' (4M) from where code is executed
(starting at 0x1000_0000). The board has no real flash memory, rather an
auxilary HW populates the appropriate memory regions from images found
in a MicroSD card.

That commit also defines the missing PSRAM (16M) region ('psram') which
can be used by large programs as a general purpose RAM.

Finally, it also fixes the DT for the non-secure memory regions to
reflect the fixes described above for the secure memory regions.

Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
2021-04-07 12:03:48 -05:00
Vinayak Kariappa Chettimada
14bd22db75 Bluetooth: controller: Fix race in create connection cancel
Fix race conditional when create connection cancel is called
and actually a connection did get setup while initiator is
being stopped.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Vinayak Kariappa Chettimada
d72a1078b2 Bluetooth: controller: Conditional compile adv addr used by initiator
Conditional compile adv_addr which is only used by
controller when supporting initiator/central role.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Vinayak Kariappa Chettimada
8da72d16b7 Bluetooth: controller: Move initiated flag into role specific union
Move the initiated bit flag into role specific union, so that
other role specific bit flags can share bit space in the LLL
context structure.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Vinayak Kariappa Chettimada
1e320a352f Bluetooth: controller: Fix PHY Update procedure checks
Fix PHY update procedure to check transaction violations.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Vinayak Kariappa Chettimada
6eb998bd78 Bluetooth: controller: Fix ping procedure checks
Fix ping procedure to check transaction violations.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Vinayak Kariappa Chettimada
26e335cc42 Bluetooth: controller: Fix data length update procedure checks
Fix data legnth update procedure to check transaction
violations.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Vinayak Kariappa Chettimada
871ab25c2f Bluetooth: controller: Fix reject extended indication checks
Fix reject extended indication PDU dispatch to check
transaction violations.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Vinayak Kariappa Chettimada
cd0ed04627 Bluetooth: controller: Fix unknown control PDU checks
Fix unknown control procedure handling to check transaction
violations.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Vinayak Kariappa Chettimada
2f580e1930 Bluetooth: controller: Fix Feature Exchange checks
Fix Feature Exchange procedure to check transaction
violations.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Vinayak Kariappa Chettimada
651afd7c39 Bluetooth: controller: Add control procedure lock
Add control procedure lock flag to detection procedure
transaction violations.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Vinayak Kariappa Chettimada
ef7cbbfb60 Bluetooth: controller: Fix interval check in CONNECT_IND PDU
Check for interval value in received CONNECT_IND PDU and
ignore connection setup.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Vinayak Kariappa Chettimada
d87cc6f51a Bluetooth: controller: Fix channel map check in CONNECT_IND PDU
Fix the leak of node rx buffer used to generate the
connection complete and CSA#2 event introduced in the
commit 4a5f263e5a ("Bluetooth: controller: split: Validate
chan map and hop value") and the
commit 94d5f0854e ("Bluetooth: controller: fixing error
re. all zero chmap in conn-ind").

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Vinayak Kariappa Chettimada
860bb75a69 Bluetooth: controller: Fix dev assert in CPR implementation
Replace a development assertion in the implementation of
Connection Parameter Request Procedure with an internal
comment and handle transaction violation be ignoring the
PDU.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Vinayak Kariappa Chettimada
ff3659ca51 Bluetooth: controller: Remove redundant connection initiated check
Remove the redundant connection initiated check as the event
is closed on connection initiated and it is sufficient to
check in the prepare_cb function to abort any events in the
pipeline after the connection has been initiated.

Relates to commit 5ce5dc055e ("Bluetooth: controller:
Avoid race between ULL and LLL when initiating conn") and
commit 18f5fb99c1 ("Bluetooth: controller: Remove use of
lll_stop").

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-04-06 09:56:38 -04:00
Wolfgang Puffitsch
c8d190e318 Bluetooth: controller: Remove use of lll_stop
Remove use of lll_stop and lll_is_stop and rely on "initiated" flag in
lll_conn struct instead.

Signed-off-by: Wolfgang Puffitsch <wopu@demant.com>
2021-04-06 09:56:38 -04:00
Wolfgang Puffitsch
0dfa18307e Bluetooth: controller: Avoid race between ULL and LLL when initiating conn
Use an "initiated" flag in the lll_conn struct to guard the processing
of PDUs related to connection initiation (CONNECT_IND,
AUX_CONNECT_RSP). This avoids races between ULL and LLL when creating
a connection.

Signed-off-by: Wolfgang Puffitsch <wopu@demant.com>
2021-04-06 09:56:38 -04:00
Eugeniy Paltsev
6c2ae13e9a linker-defs: Fix sorting order of objects by priority
Commit 0a7b65e tweaked the CREATE_OBJ_LEVEL macro in such a way
that it would break the expected sorting order.

For example if you had 2, 19, 20, 30 as the level, we'd end up sort
these to be 19, 2, 20, 30.

Fix this by adding aditional "_" symbol after the init level counter.
That allows to keep correct sort order (for both GNU and MWDT
toolchains) and distinguish init level counter from section suffix
(for MWDT toolchain).

Fixes zephyrproject-rtos#33464

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-25 22:28:53 -04:00
Andriy Gelman
c418c9aecf drivers: can: Fix sample point calculation
CAN_SYNC_SEG and ts1 are in common units. Both need to be scaled by 1000
to calculate the sample point.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2021-03-22 16:12:31 -04:00
Johan Hedberg
61682bd6d9 Bluetooth: L2CAP: Fix missing buffer length check for sdu_len
We should verify that the buffer has sufficient data before attempting
to parse the SDU length field. If we get a too short packet just
disconnect the channel.

Fixes #32497

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2021-03-22 13:09:58 -04:00
Vinayak Kariappa Chettimada
0249a62662 Bluetooth: controller: Fix regression in ctrl tx queue handling
Fix control Tx buffer leak into data Tx pool that happens
after a cross-over control procedure response was paused due
to currently active encryption setup procedure, and a new
control Tx PDU in addition to the paused one is enqueued
thereafter.

When the control tx PDUs is resumed but not yet enqueued
towards the radio, if there is a new control Tx PDU enqueued
then the paused control Tx PDU is not set as the head of the
control PDUs in the Tx queue. This caused the paused control
Tx PDU to be associated with data Tx pool, hence causing the
incorrect release into data Tx pool.

Relates to the commit bff76b4cce ("Bluetooth: controller:
split: Fix control tx queue handling") and to the
commit 6991d09977 ("Bluetooth: controller: Fix control tx
queue handling").

Fixes #32898.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-03-19 07:33:19 -04:00
Luiz Augusto von Dentz
550939e441 Bluetooth: L2CAP: Fix not including all DCIDs
The order of Destination CIDs shall correspond the order of Source CIDs
including its amount so errors that don't result in all connection being
refused shall not break the order of CIDs.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2021-03-18 08:39:31 -04:00
Luiz Augusto von Dentz
56c712d2ca Bluetooth: L2CAP: Fix invalid BT_L2CAP_ECRED_CONN_RSP
For errors that means all connections have been refused there is no need
to add dcids since none will be valid.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2021-03-18 08:39:31 -04:00
Luiz Augusto von Dentz
ab2476d88e Bluetooth: L2CAP: Fix not checking for L2CAP_ECRED_CHAN_MAX
When receiving L2CAP_CREDIT_BASED_CONNECTION_REQ the remote may request
more channels than allowed so this checks if amount of channel surpasses
the maximum channels (5) and return an error.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2021-03-18 08:39:31 -04:00
Joakim Andersson
1626b87d92 Bluetooth: host: Overwrite existing bond when IRK has been updated
Overwrite the existing bond when the IRK of the existing bond could not
resolve the RPA of the peer. This would happen if the peer has deleted
the bond and replaced the IRK that was used.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2021-03-18 08:39:19 -04:00
Joakim Andersson
500c4f2cd3 Bluetooth: host: Refactor update_keys_check to operate on keys as input
Refactor update_keys_check helper function to operate on input keys
input. This allows the function to be re-used on a keys structure that
is not the current connection keys.

This also avoids the helper function changing the connection state.
The conn->le.keys pointer should at this point always have been
assigned, as central when sending the pairing request, and as peripheral
when receiving the pairing request at the very latest.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2021-03-18 08:39:19 -04:00
Marcin Niestroj
0fa47361c8 net: offload: fix device and driver names generated by DT device macros
Generated device and driver names have changed with commits [1] and [2],
but net offload drivers missed the conversion. Update net offload DT
device macros now.

[1] commit 8c1bef535b ("device: support generating defines from
  devicetree nodes with no label")
[2] commit f91e9fba51 ("device: fix potential truncation of DT-derived
  device names")

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-03-16 08:19:03 -04:00
Erwan Gouriou
6cf2fdc5d1 samples/driver: watchdog: wwdg sample should run with west
A different configuration is applied when running this test
using west or using twister.
Both will use the disco_l475_iot1 overlay, but the extra config
for clock bus tunning is applied only when using twister and
samples is failed when run with west.
Move this extra config from sample.yaml to board .conf file so
it is applied in both cases.

Fixes #32376

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-02-24 09:05:57 -05:00
Jukka Rissanen
343a26d1ae net: mgmt: Use proper coop thread priority value
If user sets CONFIG_NUM_PREEMPT_PRIORITIES=0, then the priority
of the net_mgmt thread will be -1 which is the same as idle thread.
This will trigger assert in kernel as then the minimum coop priority
is -2 in this case. Remove the net_mgmt thread priority setting from
Kconfig file as it is low value and set the coop thread priority
the same way as other network threads are doing it.

Fixes #32375

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2021-02-24 09:05:25 -05:00
Erwan Gouriou
7179e1d6a9 boards: stm32f1: Remove useless CONFIG_CLOCK_STM32_PLL_XTPRE=n
CLOCK_STM32_PLL_XTPRE Kconfig symbol default value is n.
Then there is no need to explicitly set it to 'n' in stm32f1 boards



Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-02-19 09:42:33 -05:00
Erwan Gouriou
664df1e75c drivers/clock_control: stm32f1: Reinstanciate CLOCK_STM32_PLL_XTPRE
This reverts commit "drivers/clock_control: Remove useless
CLOCK_STM32_PLL_XTPRE config" 9be1f7e22f.

Fixes #32382

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-02-19 09:42:33 -05:00
Alexander Wachter
cb97dd13ff ztest: fix z_assert_within() bounds
zassert_within should also compare on equality instead
of only greater/lower.
example:
zassert_within(1,1,0); // should return true
zassert_within(1,2,1); // should return true

Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
2021-02-19 07:10:39 -05:00
Andy Ross
0e64b47a5d tests/timer_api: Correct precision and fix correctness mistakes
Correct a bunch of precision/analysis errors in this test:

* Test items weren't consistent about tick alignment and resetting of
  the timestamp, so put these steps into init_timer_data() and call
  that immediately before k_timer_start().

* Many items would calculate the initial timestamp AFTER
  k_timer_start(), leading to an extra (third!) point where the timer
  computation could alias by an extra tick.  Always do this
  consistently before the timer is started (via init_timer-data()).

* Tickless systems with high tick rates can easily advance the system
  uptime while the timer ISR is running, so the system can't expect
  perfect accuracy even there (this test was originally written for
  ticked systmes where the ISR was by definition happening "at the
  same time").

  (Unfortunately our most popular high tick rate tickless system,
  nRF5, also has a clock that doesn't divide milliseconds exactly, so
  it had a special path through all these precision comparisons and
  avoided the bugs.  We finally found it on a x86 HPET system with 10
  kHz ticks.)

* The interval validation was placing a minimum bound on the interval
  time but not a maximum (this mistake was what had hidden the failure
  to reset the timestamp mentioned above).

Longer term, the millisecond precision math in these tests is at this
point an out of control complexity explosion.  We should look at
reworking the core OS tests of k_timer to use tick precision (which is
by definition exact) pervasively and leave the millisecond stuff to a
separate layer testing the alternative/legacy APIs.

Fixes #31964 (probably -- that was reported against up_squared, on
which I had trouble reproducing, but it was a common failure on
ehl_crb).

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-02-19 07:10:20 -05:00
Jukka Rissanen
18ddabc335 net: tls: Allow access to TLS socket in userspace
If userspace is enabled, then the TLS context needs to be
made a NET_SOCKET kernel object. Without this the userspace
cannot access TLS sockets.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2021-02-19 07:10:08 -05:00
Peter Bigot
c6921d2026 drivers/i2c: stm32_v1: remove unused variable
A recent patch removed use of the cfg structure, but left a pointer to
it defined which causes build failures.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-02-19 07:09:56 -05:00
Erwan Gouriou
4c46e0072d drivers/i2c: stm32_v1: TX IRQ enable called twice in a row
On I2C V1 parts, LL_I2C_EnableIT_TX() translates to EVT and BUF
IRQ enabling.
In stm32_i2c_msg_write function, LL_I2C_EnableIT_TX is called right
after stm32_i2c_enable_transfer_interrupts which already enables BUF
IRQ, which starts the transfer.
As a consequence it could happen that transfer is already complete
at the time LL_I2C_EnableIT_TX is called. This case is not expected
by remaining part of the code which loops forever waiting for BUF IRQ
to be raised.
Remove the superfluous LL_I2C_EnableIT_TX call.

Fixes: #32265

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-02-19 07:09:36 -05:00
Andrzej Puzdrowski
dd0f451c23 drivers/flash/soc_flash_nrf: suspend POFWARN before engage
nRF52840, nRF52810, nRF52811 and nRF52805 are affected by anomaly 242.
This patch introduces workaround for this anomaly as follow:
Power-fail comparator is disabled before any attempt to erase or write.
Either erase or write is not proceed if EVENT_POFWARN is
already asserted.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-02-19 07:09:25 -05:00
Andrzej Puzdrowski
eb3d194475 drivers/flash/soc_flash_nrf: support in-progress abort
Introduce support for situation when synchronization back-end
aborts operation before it is done. synchronization API will
transfer operation return code to the driver shim back.

Additionally:
FLASH_OP_ONGOING value was switched to be positive in order to
not been mislead with a negative error code.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-02-19 07:09:25 -05:00
Jose Alberto Meza
b4b2903e5a samples: drivers: espi: Showcase OOB Rx asynchronous handling
Add example to handle OOB host responses asynchronously.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-02-19 07:09:07 -05:00
Jose Alberto Meza
dfabe3ed34 samples: drivers: espi: Remove magic number
Define macro for number of times the temperatures will
be retrieved.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-02-19 07:09:07 -05:00
Jose Alberto Meza
acb8a1f0cf drivers: espi: xec: Add support for host-initiated traffic
Keep OOB Rx channel and interrupt always enabled.

Send callback when packet is received in OOB Rx channel
if asynchronous host-initiated handling is enabled.

Note that driver doesn't perform any buffering from packets,
so access to OOB Rx channel is gated by client's driver
packet retrieval.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-02-19 07:09:07 -05:00
Jose Alberto Meza
cdfd0a9a8d drivers: espi: config: Support for host-initiated eSPI traffic
Currently assumption is all OOB traffic over eSPI bus is always client
initiated.
Add option for systems where host can initiate OOB traffic.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-02-19 07:09:07 -05:00
Antonis Sioutas
a36d098117 drivers: counter: stm32: Fix alarm time calculation
The calculated alarm time starts from 2000 but the gmtime_r needs as
input the time from epoch (1970). This causes the alarm time to be
miscalculated due to leap years, as 2000 is a leap year and 1970 is not.
To fix the issue, the 2000 timestamp can be added to the input time of
gmtime_r.

Fixes #32260

Signed-off-by: Antonis Sioutas <antonis.si510@gmail.com>
2021-02-19 07:08:53 -05:00
Vinayak Kariappa Chettimada
73a3eba539 tests: Bluetooth: bsim: Enable LL/CON/INI/BV-24-C EDTT test
Enable the LL/CON/INI/BV-24-C [Network Privacy - Connection
Establishment using resolving list, initiator, Ignore
Identity Address, with address resolution disabled] EDTT
test.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-02-19 07:08:43 -05:00
Vinayak Kariappa Chettimada
8ff077a65a Bluetooth: controller: Fix network privacy with resolution disabled
When address resolution is disabled, an identity address has
been added into the resolving list with peer IRK, and device
privacy has not been selected for the peer device then
connection indication shall not be sent to the peer that is
advertising using its identity address.

Fixes #24731.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2021-02-19 07:08:43 -05:00
Torsten Rasmussen
116425ccbe cmake: improved handling of output and byproducts in CMake
Fixes: #23449

This commit adds additional OUTPUT and BYPRODUCTS to custom command
and targets in the Zephyr build system.

This ensures that files produced during the build will be removed again
when invoking ninja clean / make clean.

The generated syscalls headers include folder is added to the syscall
target using ADDITIONAL_CLEAN_FILES property.
However, this property is new in CMake 3.15, so will not work when using
older CMake with ninja.

For CMake versions <=3.15 the ADDITIONAL_MAKE_CLEAN_FILES property is
used. However, this only supports Makefile generator.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-02-19 07:08:24 -05:00
Erwan Gouriou
ca83ca0065 drivers/uart: stm32: Fix comparisons to have constants on right side
Fixes: "WARNING:CONSTANT_COMPARISON: Comparisons should place the
constant on the right side of the test"

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-02-19 07:08:13 -05:00
Erwan Gouriou
213d348b92 drivers/uart: stm32: Report 9bits transactions as not supported
STM32 uart driver doesn't support 9bits transactions in any case,
so remove case were it was declared as supported.

Fixes #31799

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-02-19 07:08:13 -05:00
Alexandre Bourdiol
205c16afa6 test: arch: arm: arm_interrupt: clear FPSCR register in ISR
Clear Floating Point Status and Control Register (FPSCR),
to prevent from having the interrupt line set to pending again,
in case FPU IRQ is selected by the test as "Available IRQ line"

Fixes #31982

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-02-19 07:07:59 -05:00
Johann Fischer
af67c16b9f usb: bluetooth: fix OUT buffer handling
acl_read_cb does not handle incoming (ACL) data
if BT_CTLR_TX_BUFFER_SIZE is greater than
USB_MAX_FS_BULK_MPS - BT_HCI_ACL_HDR_SIZE.

Since the host adjusts the data according to
the BT_CTLR_TX_BUFFER_SIZE and does not use ZLP
we cannot start usb_transfer over the possible length of
the whole packet, with or without USB_TRANS_NO_ZLP flag.
But we can read the packet length from the header and
call net_buf_put() when the whole packet is received.

Fixes: #31922

Reported-by: Matias Karhumaa <matias.karhumaa@gmail.com>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-02-17 09:24:22 -05:00
Andy Ross
46d95a23f0 lib/p4wq: Fix race with completed work items
Work items can be legally resubmitted from within their own handler.
Currently the p4wq detects this case by checking their thread field to
see if it's been set to NULL.  But that's a race, because if the item
was NOT resubmitted then it no longer belongs to the queue and may
have been freed or reused or otherwise clobbered legally by user code.

Instead, steal a single bit in the thread struct for this purpose.
This patch adds a K_CALLBACK_STATE bit in user_options and documents
it in such a way (as being intended for "callback manager" utilities)
that it can't be used recursively or otherwise collide.

Fixes #32052

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-02-17 09:24:00 -05:00
Marcin Niestroj
3de4ba01e4 drivers: wifi: esp: fix hostname configuration
By the time hostname configuration was implemented, driver was switching
only between STA and STA+AP modes. After dynamic selection between NONE,
STA, AP and STA+AP was implemented (commit referenced below), hostname
configuration no longer takes effect when ESP chip obtains address over
DHCP (and sends hostname in the DHCP request).

Set hostname each time after enabling STA mode, so that it takes effect
in DHCP requests.

Fixes: 03ce61004b ("drivers: wifi: esp: control CWMODE depending on
  current needs")
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-02-17 09:23:35 -05:00
Matias Karhumaa
6031f04519 Bluetooth: hci_raw: Fix switch fallthrough
Fix apparently accidental switch fallthrough in bt_buf_get_tx().

Signed-off-by: Matias Karhumaa <matias.karhumaa@gmail.com>
2021-02-17 09:23:13 -05:00
9916 changed files with 279122 additions and 722259 deletions

View File

@@ -3,14 +3,14 @@ steps:
- .buildkite/run.sh
env:
ZEPHYR_TOOLCHAIN_VARIANT: "zephyr"
ZEPHYR_SDK_INSTALL_DIR: "/opt/toolchains/zephyr-sdk-0.13.1"
parallelism: 475
ZEPHYR_SDK_INSTALL_DIR: "/opt/sdk/zephyr-sdk-0.12.2"
parallelism: 400
timeout_in_minutes: 210
retry:
manual: true
plugins:
- docker#v3.5.0:
image: "zephyrprojectrtos/ci:v0.18.4"
image: "zephyrprojectrtos/ci:v0.11.13"
propagate-environment: true
volumes:
- "/var/lib/buildkite-agent/git-mirrors:/var/lib/buildkite-agent/git-mirrors"
@@ -27,9 +27,6 @@ steps:
- junit-annotate#v1.7.0:
artifacts: twister-*.xml
- command:
- .buildkite/mergejunit.sh
notify:
- email: "builds+int+399+7809482394022958124@lists.zephyrproject.org"
if: build.state != "passed"

View File

@@ -1,19 +0,0 @@
#!/bin/bash
# Copyright (c) 2021 Linaro Limited
#
# SPDX-License-Identifier: Apache-2.0
set -eE
buildkite-agent artifact download twister-*.xml .
xmls=""
for f in twister-*xml; do [ -s ${f} ] && xmls+="${f} "; done
if [ "${xmls}" ]; then
junitparser merge ${xmls} junit.xml
buildkite-agent artifact upload junit.xml
junit2html junit.xml
buildkite-agent artifact upload junit.xml.html
buildkite-agent annotate --style "info" "Read the <a href=\"artifact://junit.xml.html\">JUnit test report</a>"
fi

View File

@@ -3,14 +3,14 @@ steps:
- .buildkite/run.sh
env:
ZEPHYR_TOOLCHAIN_VARIANT: "zephyr"
ZEPHYR_SDK_INSTALL_DIR: "/opt/toolchains/zephyr-sdk-0.13.1"
ZEPHYR_SDK_INSTALL_DIR: "/opt/sdk/zephyr-sdk-0.12.2"
parallelism: 20
timeout_in_minutes: 180
retry:
manual: true
plugins:
- docker#v3.5.0:
image: "zephyrprojectrtos/ci:v0.18.4"
image: "zephyrprojectrtos/ci:v0.11.13"
propagate-environment: true
volumes:
- "/var/lib/buildkite-agent/git-mirrors:/var/lib/buildkite-agent/git-mirrors"
@@ -26,6 +26,3 @@ steps:
- plugins:
- junit-annotate#v1.7.0:
artifacts: twister-*.xml
- command:
- .buildkite/mergejunit.sh

View File

@@ -24,9 +24,6 @@ function cleanup()
echo "--- ccache stats at finish"
ccache -s
# Cleanup on exit
rm -fr *
# disk usage
echo "--- disk usage at finish"
df -h
@@ -54,7 +51,7 @@ ccache -s
if [ -n "${DAILY_BUILD}" ]; then
TWISTER_OPTIONS=" --inline-logs -M -N --build-only --all --retry-failed 3 -v "
TWISTER_OPTIONS=" --inline-logs -N --build-only --all --retry-failed 3 -v "
echo "--- DAILY BUILD"
west init -l .
west update 1> west.update.log || west update 1> west.update-2.log

View File

@@ -27,5 +27,4 @@
--ignore TRAILING_SEMICOLON
--ignore COMPLEX_MACRO
--ignore MULTISTATEMENT_MACRO_USE_DO_WHILE
--ignore ENOSYS
--exclude ext

View File

@@ -52,7 +52,7 @@ BreakConstructorInitializersBeforeComma: false
#BreakConstructorInitializers: BeforeComma # Unknown to clang-format-4.0
BreakAfterJavaFieldAnnotations: false
BreakStringLiterals: false
ColumnLimit: 100
ColumnLimit: 80
CommentPragmas: '^ IWYU pragma:'
#CompactNamespaces: false # Unknown to clang-format-4.0
ConstructorInitializerAllOnOneLineOrOnePerLine: false

View File

@@ -1,62 +0,0 @@
---
name: External Source Code
about: Submit a proposal to integrate external source code
title: ''
labels: TSC
assignees: ''
---
## Origin
Name of project hosting the original open source code
Provide a link to the source
## Purpose
Brief description of what this software does
## Mode of integration
Describe whether you'd like to integrate this exernal component in the main tree
or as a module, and why. If the mode of integration is a module, suggest a
repository name for the module
## Pull Request
Pull request (if any) with the actual implementation of the integration, be it
in the main tree or as a module (pointing to your own fork for now). Make sure
the PR is correctly labeled as "DNM"
## Description
Long description that will help reviewers discuss suitability of the
component to solve the problem at hand (there may be a better options
available.)
What is its primary functionality (e.g., SQLLite is a lightweight
database)?
What problem are you trying to solve? (e.g., a state store is
required to maintain ...)
Why is this the right component to solve it (e.g., SQLite is small,
easy to use, and has a very liberal license.)
# Dependencies
What other components does this package depend on?
Will the Zephyr project have a direct dependency on the component, or
will it be included via an abstraction layer with this component as a
replaceable implementation?
## Revision
Version or SHA you would like to integrate initially
## License
Please use an SPDX identifier (https://spdx.org/licenses/), such as
``BSD-3-Clause``

22
.github/SECURITY.md vendored
View File

@@ -1,22 +0,0 @@
# Security Policy
## Supported versions
The Zephyr project supports the following versions with security
updates:
- The most recent release, and the release prior to that.
- Active LTS releases.
At this time, with the latest release of v2.5.0, the supported
versions are:
- 1.14.2: Current LTS
- v2.5.0: Prior release
- v2.6.0: Current release
## Reporting process
Please see our [Security Vulnerability
Reporting](https://docs.zephyrproject.org/latest/security/reporting.html)
page for details on the process.

15
.github/labeler.yml vendored
View File

@@ -57,16 +57,16 @@
"area: ARM":
- "arch/arm/**/*"
- "include/arch/arm/**/*"
"area: ARM64":
- "arch/arm64/**/*"
- "include/arch/arm64/**/*"
"area: ARM_64":
- "arch/arm/core/aarch64/**/*"
- "include/arch/arm/aarch64/**/*"
"area: NIOS2":
- "arch/nios2/**/*"
- "include/arch/nios2/**/*"
"area: Xtensa":
- "arch/xtensa/**/*"
- "include/arch/xtensa/**/*"
"area: RISCV":
"area: RISCv32/64":
- "arch/risv/**/*"
- "include/arch/riscv/**/*"
"area: ARC":
@@ -102,8 +102,6 @@
- "**/*bluetooth*"
"area: Bluetooth Mesh":
- "subsys/bluetooth/mesh/**/*"
"area: Bluetooth Audio":
- "subsys/bluetooth/audio/**/*"
"area: Bluetooth Controller":
- "subsys/bluetooth/controller/**/*"
"area: Bluetooth Host":
@@ -137,11 +135,6 @@
"area: Shields":
- "boards/shields/**"
- "samples/shields/**"
"area: Power Management":
- "subsys/pm/**/*"
- "include/pm/**/*"
- "tests/subsys/pm/**/*"
- "samples/subsys/pm/**/*"
"platform: NXP":
- "boards/arm/frdm*/**"
- "boards/arm/hexiwear*/**"

View File

@@ -4,16 +4,13 @@ on:
types:
- closed
- labeled
branches:
- main
jobs:
backport:
runs-on: ubuntu-20.04
runs-on: ubuntu-18.04
name: Backport
steps:
- name: Backport
uses: zephyrproject-rtos/action-backport@v1.1.1-1
uses: zephyrproject-rtos/action-backport@v1.1.99
with:
github_token: ${{ secrets.ZB_GITHUB_TOKEN }}
issue_labels: backport
github_token: ${{ secrets.GITHUB_TOKEN }}

View File

@@ -1,30 +0,0 @@
name: Backport Issue Check
on:
pull_request_target:
branches:
- v*-branch
jobs:
backport:
name: Backport Issue Check
runs-on: ubuntu-20.04
steps:
- name: Check out source code
uses: actions/checkout@v3
- name: Install Python dependencies
run: |
sudo pip3 install -U setuptools wheel pip
pip3 install -U pygithub
- name: Run backport issue checker
env:
GITHUB_TOKEN: ${{ secrets.ZB_GITHUB_TOKEN }}
run: |
./scripts/release/list_backports.py \
-o ${{ github.event.repository.owner.login }} \
-r ${{ github.event.repository.name }} \
-b ${{ github.event.pull_request.base.ref }} \
-p ${{ github.event.pull_request.number }}

View File

@@ -1,29 +0,0 @@
name: Publish Bluetooth Tests Results
on:
workflow_run:
workflows: ["Bluetooth Tests"]
types:
- completed
jobs:
bluetooth-test-results:
name: "Publish Bluetooth Test Results"
runs-on: ubuntu-20.04
if: github.event.workflow_run.conclusion != 'skipped'
steps:
- name: Download artifacts
uses: dawidd6/action-download-artifact@v2
with:
workflow: bluetooth-tests.yaml
run_id: ${{ github.event.workflow_run.id }}
- name: Publish Bluetooth Test Results
uses: EnricoMi/publish-unit-test-result-action@v1
with:
check_name: Bluetooth Test Results
comment_mode: off
commit: ${{ github.event.workflow_run.head_sha }}
event_file: event/event.json
event_name: ${{ github.event.workflow_run.event }}
files: "bluetooth-test-results/**/bsim_results.xml"

View File

@@ -1,67 +0,0 @@
name: Bluetooth Tests
on:
pull_request:
paths:
- "west.yml"
- "subsys/bluetooth/**"
- "tests/bluetooth/bsim_bt/**"
- "boards/posix/**"
- "soc/posix/**"
- "arch/posix/**"
concurrency:
group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
cancel-in-progress: true
jobs:
bluetooth-test:
runs-on: ubuntu-20.04
container:
image: zephyrprojectrtos/ci:v0.18.4
options: '--entrypoint /bin/bash'
env:
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.1
CLANG_ROOT_DIR: /usr/lib/llvm-12
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
EDTT_PATH: ../tools/edtt
bsim_bt_test_results_file: ./bsim_bt_out/bsim_results.xml
steps:
- name: Update PATH for west
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: checkout
uses: actions/checkout@v3
- name: west setup
run: |
west init -l . || true
west config --global update.narrow true
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
- name: Run Bluetooth Tests with BSIM
run: |
export ZEPHYR_BASE=${PWD}
WORK_DIR=${ZEPHYR_BASE}/bsim_bt_out tests/bluetooth/bsim_bt/compile.sh
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bt_test_results_file} \
SEARCH_PATH=tests/bluetooth/bsim_bt/ tests/bluetooth/bsim_bt/run_parallel.sh
- name: Upload Test Results
if: always()
uses: actions/upload-artifact@v3
with:
name: bluetooth-test-results
path: |
./bsim_bt_out/bsim_results.xml
${{ github.event_path }}
- name: Upload Event Details
if: always()
uses: actions/upload-artifact@v3
with:
name: event
path: |
${{ github.event_path }}

View File

@@ -1,138 +0,0 @@
name: Build with Clang/LLVM
on: pull_request_target
concurrency:
group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
cancel-in-progress: true
jobs:
clang-build:
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: zephyrprojectrtos/ci:v0.18.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
strategy:
fail-fast: false
matrix:
platform: ["native_posix"]
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.1
CLANG_ROOT_DIR: /usr/lib/llvm-12
COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
BASE_REF: ${{ github.base_ref }}
outputs:
report_needed: ${{ steps.twister.outputs.report_needed }}
steps:
- name: Clone cached Zephyr repository
continue-on-error: true
run: |
git clone --shared /github/cache/zephyrproject/zephyr .
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
persist-credentials: false
- name: Environment Setup
run: |
pip3 install GitPython
echo "$HOME/.local/bin" >> $GITHUB_PATH
git config --global user.email "bot@zephyrproject.org"
git config --global user.name "Zephyr Bot"
git rebase origin/${BASE_REF}
git log --pretty=oneline | head -n 10
west init -l . || true
west config --global update.narrow true
# In some cases modules are left in a state where they can't be
# updated (i.e. when we cancel a job and the builder is killed),
# So first retry to update, if that does not work, remove all modules
# and start over. (Workaround until we implement more robust module
# west caching).
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west2.log || ( rm -rf ../modules && west update --path-cache /github/cache/zephyrproject)
- name: Check Environment
run: |
cmake --version
${CLANG_ROOT_DIR}/bin/clang --version
gcc --version
ls -la
- name: Prepare ccache timestamp/data
id: ccache_cache_timestamp
shell: cmake -P {0}
run: |
string(TIMESTAMP current_date "%Y-%m-%d-%H;%M;%S" UTC)
string(REPLACE "/" "_" repo ${{github.repository}})
string(REPLACE "-" "_" repo2 ${repo})
file(APPEND $ENV{GITHUB_OUTPUT} "repo=${repo2}\n")
- name: use cache
id: cache-ccache
uses: nashif/action-s3-cache@master
with:
key: ${{ steps.ccache_cache_timestamp.outputs.repo }}-${{ github.ref_name }}-clang-${{ matrix.platform }}-ccache
path: /github/home/.ccache
aws-s3-bucket: ccache.zephyrproject.org
aws-access-key-id: ${{ secrets.CCACHE_S3_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.CCACHE_S3_SECRET_ACCESS_KEY }}
aws-region: us-east-2
- name: ccache stats initial
run: |
test -d github/home/.ccache && rm -rf /github/home/.ccache && mv github/home/.ccache /github/home/.ccache
ccache -M 10G -s
- name: Run Tests with Twister
id: twister
run: |
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=llvm
# check if we need to run a full twister or not based on files changed
python3 ./scripts/ci/test_plan.py --platform ${{ matrix.platform }} -c origin/${BASE_REF}..
# We can limit scope to just what has changed
if [ -s testplan.csv ]; then
echo "report_needed=1" >> $GITHUB_OUTPUT
# Full twister but with options based on changes
./scripts/twister --inline-logs -M -N -v --load-tests testplan.csv --retry-failed 2
else
# if nothing is run, skip reporting step
echo "report_needed=0" >> $GITHUB_OUTPUT
fi
- name: ccache stats post
run: |
ccache -s
- name: Upload Unit Test Results
if: always() && steps.twister.outputs.report_needed != 0
uses: actions/upload-artifact@v3
with:
name: Unit Test Results (Subset ${{ matrix.platform }})
path: twister-out/twister.xml
clang-build-results:
name: "Publish Unit Tests Results"
needs: clang-build
runs-on: ubuntu-20.04
if: (success() || failure() ) && needs.clang-build.outputs.report_needed != 0
steps:
- name: Download Artifacts
uses: actions/download-artifact@v2
with:
path: artifacts
- name: Publish Unit Test Results
uses: EnricoMi/publish-unit-test-result-action@v1
if: always()
with:
check_name: Unit Test Results
github_token: ${{ secrets.GITHUB_TOKEN }}
files: "**/twister.xml"
comment_mode: off

View File

@@ -1,166 +0,0 @@
name: Code Coverage with codecov
on:
schedule:
- cron: '25 */3 * * 1-5'
concurrency:
group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
cancel-in-progress: true
jobs:
codecov:
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: zephyrprojectrtos/ci:v0.18.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
strategy:
fail-fast: false
matrix:
platform: ["native_posix", "qemu_x86", "unit_testing"]
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.1
CLANG_ROOT_DIR: /usr/lib/llvm-12
steps:
- name: Update PATH for west
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: Clone cached Zephyr repository
continue-on-error: true
run: |
git clone --shared /github/cache/zephyrproject/zephyr .
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: checkout
uses: actions/checkout@v3
with:
fetch-depth: 0
- name: west setup
run: |
west init -l . || true
west update 1> west.update.log || west update 1> west.update-2.log
- name: Check Environment
run: |
cmake --version
${CLANG_ROOT_DIR}/bin/clang --version
gcc --version
ls -la
- name: Prepare ccache keys
id: ccache_cache_prop
shell: cmake -P {0}
run: |
string(REPLACE "/" "_" repo ${{github.repository}})
string(REPLACE "-" "_" repo2 ${repo})
file(APPEND $ENV{GITHUB_OUTPUT} "repo=${repo2}\n")
- name: use cache
id: cache-ccache
uses: nashif/action-s3-cache@master
with:
key: ${{ steps.ccache_cache_prop.outputs.repo }}-${{github.event_name}}-${{matrix.platform}}-codecov-ccache
path: /github/home/.ccache
aws-s3-bucket: ccache.zephyrproject.org
aws-access-key-id: ${{ secrets.CCACHE_S3_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.CCACHE_S3_SECRET_ACCESS_KEY }}
aws-region: us-east-2
- name: ccache stats initial
run: |
test -d github/home/.ccache && mv github/home/.ccache /github/home/.ccache
ccache -M 10G -s
- name: Run Tests with Twister (Push)
continue-on-error: true
run: |
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
mkdir -p coverage/reports
./scripts/twister -N -v --filter runnable -p ${{ matrix.platform }} --coverage -T tests
- name: Generate Coverage Report
run: |
mv twister-out/coverage.info lcov.pre.info
lcov -q --remove lcov.pre.info mylib.c --remove lcov.pre.info tests/\* \
--remove lcov.pre.info samples/\* --remove lcov.pre.info ext/\* \
--remove lcov.pre.info *generated* \
-o coverage/reports/${{ matrix.platform }}.info --rc lcov_branch_coverage=1
- name: ccache stats post
run: |
ccache -s
- name: Upload Coverage Results
if: always()
uses: actions/upload-artifact@v3
with:
name: Coverage Data (Subset ${{ matrix.platform }})
path: coverage/reports/${{ matrix.platform }}.info
codecov-results:
name: "Publish Coverage Results"
needs: codecov
runs-on: ubuntu-latest
# the codecov job might be skipped, we don't need to run this job then
if: success() || failure()
steps:
- name: checkout
uses: actions/checkout@v3
with:
fetch-depth: 0
- name: Download Artifacts
uses: actions/download-artifact@v2
with:
path: coverage/reports
- name: Move coverage files
run: |
mv ./coverage/reports/*/*.info ./coverage/reports
ls -la ./coverage/reports
- name: Generate list of coverage files
id: get-coverage-files
shell: cmake -P {0}
run: |
file(GLOB INPUT_FILES_LIST "coverage/reports/*.info")
set(MERGELIST "")
set(FILELIST "")
foreach(ITEM ${INPUT_FILES_LIST})
get_filename_component(f ${ITEM} NAME)
if(FILELIST STREQUAL "")
set(FILELIST "${f}")
else()
set(FILELIST "${FILELIST},${f}")
endif()
endforeach()
foreach(ITEM ${INPUT_FILES_LIST})
get_filename_component(f ${ITEM} NAME)
if(MERGELIST STREQUAL "")
set(MERGELIST "-a ${f}")
else()
set(MERGELIST "${MERGELIST} -a ${f}")
endif()
endforeach()
file(APPEND $ENV{GITHUB_OUTPUT} "mergefiles=${MERGELIST}\n")
file(APPEND $ENV{GITHUB_OUTPUT} "covfiles=${FILELIST}\n")
- name: Merge coverage files
run: |
sudo apt-get install -y lcov
cd ./coverage/reports
lcov ${{ steps.get-coverage-files.outputs.mergefiles }} -o merged.info --rc lcov_branch_coverage=1
- name: Upload coverage to Codecov
if: always()
uses: codecov/codecov-action@v2
with:
directory: ./coverage/reports
env_vars: OS,PYTHON
fail_ci_if_error: false
verbose: true
files: merged.info

View File

@@ -1,60 +0,0 @@
name: Coding Guidelines
on: pull_request
jobs:
compliance_job:
runs-on: ubuntu-20.04
name: Run coding guidelines checks on patch series (PR)
steps:
- name: Checkout the code
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: cache-pip
uses: actions/cache@v3
with:
path: ~/.cache/pip
key: ${{ runner.os }}-doc-pip
- name: Install python dependencies
run: |
pip3 install unidiff
pip3 install wheel
pip3 install sh
- name: Install Packages
run: |
sudo apt-get install ocaml-base-nox
wget https://launchpad.net/~npalix/+archive/ubuntu/coccinelle/+files/coccinelle_1.0.8~20.04npalix1_amd64.deb
sudo dpkg -i coccinelle_1.0.8~20.04npalix1_amd64.deb
- name: Run Coding Guildeines Checks
continue-on-error: true
id: coding_guidelines
env:
BASE_REF: ${{ github.base_ref }}
run: |
export ZEPHYR_BASE=$PWD
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git remote -v
git rebase origin/${BASE_REF}
source zephyr-env.sh
# debug
ls -la
git log --pretty=oneline | head -n 10
./scripts/ci/guideline_check.py --output output.txt -c origin/${BASE_REF}..
- name: check-warns
run: |
if [[ -s "output.txt" ]]; then
errors=$(cat output.txt)
errors="${errors//'%'/'%25'}"
errors="${errors//$'\n'/'%0A'}"
errors="${errors//$'\r'/'%0D'}"
echo "::error file=output.txt::$errors"
exit 1;
fi

View File

@@ -1,26 +1,10 @@
name: Compliance Checks
name: Compliance
on: pull_request
jobs:
maintainer_check:
runs-on: ubuntu-20.04
name: Check MAINTAINERS file
steps:
- name: Checkout the code
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Run Maintainers Script
id: maintainer
env:
BASE_REF: ${{ github.base_ref }}
run: |
python3 ./scripts/get_maintainer.py path CMakeLists.txt
check_compliance:
runs-on: ubuntu-20.04
compliance_job:
runs-on: ubuntu-latest
name: Run compliance checks on patch series (PR)
steps:
- name: Update PATH for west
@@ -28,13 +12,13 @@ jobs:
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: Checkout the code
uses: actions/checkout@v3
uses: actions/checkout@v2
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: cache-pip
uses: actions/cache@v3
uses: actions/cache@v1
with:
path: ~/.cache/pip
key: ${{ runner.os }}-doc-pip
@@ -57,7 +41,7 @@ jobs:
# debug
git log --pretty=oneline | head -n 10
west init -l . || true
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
west update
- name: Run Compliance Tests
continue-on-error: true
@@ -72,7 +56,7 @@ jobs:
./scripts/ci/check_compliance.py -m Codeowners -m Devicetree -m Gitlint -m Identity -m Nits -m pylint -m checkpatch -m Kconfig -c origin/${BASE_REF}..
- name: upload-results
uses: actions/upload-artifact@v3
uses: actions/upload-artifact@master
continue-on-error: True
with:
name: compliance.xml

View File

@@ -8,7 +8,7 @@ jobs:
conflict:
runs-on: ubuntu-latest
steps:
- uses: mschilde/auto-label-merge-conflicts@v2
- uses: mschilde/auto-label-merge-conflicts@master
with:
CONFLICT_LABEL_NAME: "has conflicts"
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}

View File

@@ -12,7 +12,7 @@ on:
jobs:
get_version:
runs-on: ubuntu-20.04
runs-on: ubuntu-latest
if: github.repository == 'zephyrproject-rtos/zephyr'
steps:
@@ -28,7 +28,7 @@ jobs:
pip3 install gitpython
- name: checkout
uses: actions/checkout@v3
uses: actions/checkout@v2
with:
fetch-depth: 0

View File

@@ -6,14 +6,10 @@ name: Devicetree script tests
on:
push:
branches:
- v2.7-branch
paths:
- 'scripts/dts/**'
- '.github/workflows/devicetree_checks.yml'
pull_request:
branches:
- v2.7-branch
paths:
- 'scripts/dts/**'
- '.github/workflows/devicetree_checks.yml'
@@ -25,22 +21,17 @@ jobs:
strategy:
matrix:
python-version: [3.6, 3.7, 3.8]
os: [ubuntu-20.04, macos-11, windows-2022]
exclude:
- os: macos-11
python-version: 3.6
- os: windows-2022
python-version: 3.6
os: [ubuntu-latest, macos-latest, windows-latest]
steps:
- name: checkout
uses: actions/checkout@v3
uses: actions/checkout@v2
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v4
uses: actions/setup-python@v1
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux
if: startsWith(runner.os, 'Linux')
uses: actions/cache@v3
uses: actions/cache@v1
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ matrix.python-version }}
@@ -48,7 +39,7 @@ jobs:
${{ runner.os }}-pip-${{ matrix.python-version }}
- name: cache-pip-mac
if: startsWith(runner.os, 'macOS')
uses: actions/cache@v3
uses: actions/cache@v1
with:
path: ~/Library/Caches/pip
# Trailing '-' was just to get a different cache name
@@ -57,7 +48,7 @@ jobs:
${{ runner.os }}-pip-${{ matrix.python-version }}-
- name: cache-pip-win
if: startsWith(runner.os, 'Windows')
uses: actions/cache@v3
uses: actions/cache@v1
with:
path: ~\AppData\Local\pip\Cache
key: ${{ runner.os }}-pip-${{ matrix.python-version }}
@@ -66,8 +57,8 @@ jobs:
- name: install python dependencies
run: |
pip3 install wheel
pip3 install pytest pyyaml tox
- name: run tox
working-directory: scripts/dts/python-devicetree
pip3 install pytest pyyaml
- name: run pytest
working-directory: scripts/dts
run: |
tox
python -m pytest testdtlib.py testedtlib.py

View File

@@ -1,16 +1,12 @@
# Copyright (c) 2020 Linaro Limited.
# SPDX-License-Identifier: Apache-2.0
name: Documentation Build
name: Documentation GitHub Workflow
on:
schedule:
- cron: '0 */3 * * *'
push:
tags:
- v*
pull_request:
paths:
- 'Makefile'
- 'doc/**'
- '**.rst'
- 'include/**'
@@ -18,144 +14,66 @@ on:
- 'lib/libc/**'
- 'subsys/testsuite/ztest/include/**'
- 'tests/**'
- '.known-issues/doc/**'
- '**/Kconfig*'
- 'west.yml'
- '.github/workflows/doc-build.yml'
- 'scripts/dts/**'
- 'scripts/requirements-doc.txt'
env:
# NOTE: west docstrings will be extracted from the version listed here
WEST_VERSION: 0.11.1
# The latest CMake available directly with apt is 3.18, but we need >=3.20
# so we fetch that through pip.
CMAKE_VERSION: 3.20.5
jobs:
doc-build-html:
name: "Documentation Build (HTML)"
runs-on: ubuntu-20.04
timeout-minutes: 30
concurrency:
group: doc-build-html-${{ github.ref }}
cancel-in-progress: true
doc-build:
name: "Documentation Build"
runs-on: ubuntu-latest
steps:
- name: Update PATH for west
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: checkout
uses: actions/checkout@v3
uses: actions/checkout@v2
- name: install-pkgs
run: |
sudo apt-get install -y ninja-build doxygen graphviz
sudo apt-get install -y ninja-build doxygen
- name: cache-pip
uses: actions/cache@v3
uses: actions/cache@v1
with:
path: ~/.cache/pip
key: pip-${{ hashFiles('scripts/requirements-doc.txt') }}
key: ${{ runner.os }}-doc-pip
- name: install-pip
run: |
sudo pip3 install -U setuptools wheel pip
pip3 install setuptools wheel
pip3 install -r scripts/requirements-base.txt
pip3 install -r scripts/requirements-doc.txt
pip3 install west==${WEST_VERSION}
pip3 install cmake==${CMAKE_VERSION}
pip3 install west==0.9.0
- name: west setup
run: |
west init -l .
west init -l . || true
- name: build-docs
run: |
if [[ "$GITHUB_REF" =~ "refs/tags/v" ]]; then
DOC_TAG="release"
else
DOC_TAG="development"
fi
if [[ "${{ github.event_name }}" == "pull_request" ]]; then
DOC_TARGET="html-fast"
else
DOC_TARGET="html"
fi
DOC_TAG=${DOC_TAG} SPHINXOPTS="-q -W" make -C doc ${DOC_TARGET}
- name: compress-docs
run: |
tar cfJ html-output.tar.xz --directory=doc/_build html
source zephyr-env.sh
make htmldocs
tar cvf htmldocs.tar --directory=./doc/_build html
- name: upload-build
uses: actions/upload-artifact@v3
uses: actions/upload-artifact@master
continue-on-error: True
with:
name: html-output
path: html-output.tar.xz
name: htmldocs.tar
path: htmldocs.tar
- name: process-pr
if: github.event_name == 'pull_request'
- name: check-warns
run: |
REPO_NAME="${{ github.event.repository.name }}"
PR_NUM="${{ github.event.pull_request.number }}"
DOC_URL="https://builds.zephyrproject.io/${REPO_NAME}/pr/${PR_NUM}/docs/"
echo "${PR_NUM}" > pr_num
echo "::notice:: Documentation will be available shortly at: ${DOC_URL}"
- name: upload-pr-number
uses: actions/upload-artifact@v3
if: github.event_name == 'pull_request'
with:
name: pr_num
path: pr_num
doc-build-pdf:
name: "Documentation Build (PDF)"
runs-on: ubuntu-20.04
container: texlive/texlive:latest
timeout-minutes: 30
concurrency:
group: doc-build-pdf-${{ github.ref }}
cancel-in-progress: true
steps:
- name: checkout
uses: actions/checkout@v3
- name: install-pkgs
run: |
apt-get update
apt-get install -y python3-pip ninja-build doxygen graphviz librsvg2-bin
- name: cache-pip
uses: actions/cache@v3
with:
path: ~/.cache/pip
key: pip-${{ hashFiles('scripts/requirements-doc.txt') }}
- name: install-pip
run: |
pip3 install -U setuptools wheel pip
pip3 install -r scripts/requirements-doc.txt
pip3 install west==${WEST_VERSION}
pip3 install cmake==${CMAKE_VERSION}
- name: west setup
run: |
west init -l .
- name: build-docs
run: |
if [[ "$GITHUB_REF" =~ "refs/tags/v" ]]; then
DOC_TAG="release"
else
DOC_TAG="development"
if [ -s doc/_build/doc.warnings ]; then
docwarn=$(cat doc/_build/doc.warnings)
docwarn="${docwarn//'%'/'%25'}"
docwarn="${docwarn//$'\n'/'%0A'}"
docwarn="${docwarn//$'\r'/'%0D'}"
# We treat doc warnings as errors
echo "::error file=doc.warnings::$docwarn"
exit 1
fi
DOC_TAG=${DOC_TAG} SPHINXOPTS="-q -j auto" LATEXMKOPTS="-quiet -halt-on-error" make -C doc pdf
- name: upload-build
uses: actions/upload-artifact@v3
with:
name: pdf-output
path: doc/_build/latex/zephyr.pdf

View File

@@ -1,63 +0,0 @@
# Copyright (c) 2020 Linaro Limited.
# Copyright (c) 2021 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
name: Documentation Publish (Pull Request)
on:
workflow_run:
workflows: ["Documentation Build"]
types:
- completed
jobs:
doc-publish:
name: Publish Documentation
runs-on: ubuntu-20.04
if: |
github.event.workflow_run.event == 'pull_request' &&
github.event.workflow_run.conclusion == 'success' &&
github.repository == 'zephyrproject-rtos/zephyr'
steps:
- name: Download artifacts
uses: dawidd6/action-download-artifact@v2
with:
workflow: doc-build.yml
run_id: ${{ github.event.workflow_run.id }}
- name: Load PR number
run: |
echo "PR_NUM=$(<pr_num/pr_num)" >> $GITHUB_ENV
- name: Check PR number
id: check-pr
uses: carpentries/actions/check-valid-pr@v0.8
with:
pr: ${{ env.PR_NUM }}
sha: ${{ github.event.workflow_run.head_sha }}
- name: Validate PR number
if: steps.check-pr.outputs.VALID != 'true'
run: |
echo "ABORT: PR number validation failed!"
exit 1
- name: Uncompress HTML docs
run: |
tar xf html-output/html-output.tar.xz -C html-output
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v1
with:
aws-access-key-id: ${{ secrets.AWS_BUILDS_ZEPHYR_PR_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_BUILDS_ZEPHYR_PR_SECRET_ACCESS_KEY }}
aws-region: us-east-1
- name: Upload to AWS S3
env:
HEAD_BRANCH: ${{ github.event.workflow_run.head_branch }}
run: |
aws s3 sync --quiet html-output/html \
s3://builds.zephyrproject.org/${{ github.event.repository.name }}/pr/${PR_NUM}/docs \
--delete

View File

@@ -1,33 +1,46 @@
# Copyright (c) 2020 Linaro Limited.
# Copyright (c) 2021 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
name: Documentation Publish
name: Doc build for Release or Daily
# Either a daily based on schedule/cron or only on tag push
on:
workflow_run:
workflows: ["Documentation Build"]
branches:
- main
- v*
types:
- completed
schedule:
- cron: '50 22 * * *'
push:
tags:
# only publish v* tags, do not care about zephyr-v* which point to the
# same commit
- 'v*'
jobs:
doc-publish:
name: Publish Documentation
runs-on: ubuntu-20.04
if: ${{ github.event.workflow_run.conclusion == 'success' }}
runs-on: ubuntu-latest
if: github.repository == 'zephyrproject-rtos/zephyr'
steps:
- name: Download artifacts
uses: dawidd6/action-download-artifact@v2
with:
workflow: doc-build.yml
- name: Uncompress HTML docs
- name: Update PATH for west
run: |
tar xf html-output/html-output.tar.xz -C html-output
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: Determine tag
id: tag
run: |
# We expect to get here either due to a schedule event in which
# case we are doing a daily build of the docs, or because a new
# tag was pushed, in which case we are building docs for a release
if [ ${GITHUB_EVENT_NAME} == "schedule" ]; then
echo ::set-output name=TYPE::daily;
echo ::set-output name=RELEASE::latest;
elif [ ${GITHUB_EVENT_NAME} == "push" ]; then
# If push due to a tag GITHUB_REF will look like refs/tags/TAG-FOO
# chop of 'refs/tags' so RELEASE=TAG-FOO
echo ::set-output name=TYPE::release;
echo ::set-output name=RELEASE::${GITHUB_REF/refs\/tags\//};
else
exit 1
fi
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v1
@@ -36,16 +49,68 @@ jobs:
aws-secret-access-key: ${{ secrets.AWS_SECRET_ACCESS_KEY }}
aws-region: us-east-1
- name: Upload to AWS S3
env:
HEAD_BRANCH: ${{ github.event.workflow_run.head_branch }}
- name: checkout
uses: actions/checkout@v2
- name: install-pkgs
run: |
if [ "${HEAD_BRANCH:0:1}" == "v" ]; then
VERSION=${HEAD_BRANCH:1}
else
VERSION="latest"
sudo apt-get install -y ninja-build doxygen
- name: cache-pip
uses: actions/cache@v1
with:
path: ~/.cache/pip
key: ${{ runner.os }}-doc-pip
- name: install-pip
run: |
pip3 install setuptools
pip3 install -r scripts/requirements-base.txt
pip3 install -r scripts/requirements-doc.txt
- name: west setup
run: |
west init -l . || true
- name: build-docs
env:
DOC_TAG: ${{ steps.tag.outputs.TYPE }}
run: |
source zephyr-env.sh
make DOC_TAG=${DOC_TAG} htmldocs
- name: check-warns
run: |
if [ -s doc/_build/doc.warnings ]; then
docwarn=$(cat doc/_build/doc.warnings)
docwarn="${docwarn//'%'/'%25'}"
docwarn="${docwarn//$'\n'/'%0A'}"
docwarn="${docwarn//$'\r'/'%0D'}"
# We treat doc warnings as errors
echo "::error file=doc.warnings::$docwarn"
exit 1
fi
aws s3 sync --quiet html-output/html s3://docs.zephyrproject.org/${VERSION} --delete
aws s3 sync --quiet html-output/html/doxygen/html s3://docs.zephyrproject.org/apidoc/${VERSION} --delete
aws s3 cp --quiet pdf-output/zephyr.pdf s3://docs.zephyrproject.org/${VERSION}/zephyr.pdf
- name: Upload to AWS S3
env:
RELEASE: ${{ steps.tag.outputs.RELEASE }}
run: |
echo "DOC_RELEASE=[$RELEASE]"
if [ "$RELEASE" == "latest" ]; then
export
echo "publish latest docs"
aws s3 sync --quiet doc/_build/html s3://docs.zephyrproject.org/latest --delete
echo "success sync of latest docs"
else
# we want just the version, without the leading 'v'
DOC_RELEASE=${RELEASE:1}
echo "publish release docs: ${DOC_RELEASE}"
aws s3 sync --quiet doc/_build/html s3://docs.zephyrproject.org/${DOC_RELEASE}
echo "success sync of rel docs"
fi
if [ -d doc/_build/doxygen/html ]; then
API_RELEASE=${RELEASE:1}
echo "publish doxygen to apidoc/${API_RELEASE}"
aws s3 sync --quiet doc/_build/doxygen/html s3://docs.zephyrproject.org/apidoc/${API_RELEASE} --delete
echo "success publish of doxygen"
fi

View File

@@ -1,20 +0,0 @@
name: Error numbers
on:
pull_request:
paths:
- 'lib/libc/minimal/include/errno.h'
jobs:
check-errno:
runs-on: ubuntu-20.04
container:
image: zephyrprojectrtos/ci:v0.18.4
steps:
- name: checkout
uses: actions/checkout@v3
- name: Run errno.py
run: |
export ZEPHYR_BASE=${PWD}
./scripts/ci/errno.py

View File

@@ -1,66 +0,0 @@
name: Footprint Tracking
# Run every 12 hours and on tags
on:
schedule:
- cron: '50 1/12 * * *'
push:
paths:
- 'VERSION'
- '.github/workflows/footprint-tracking.yml'
tags:
# only publish v* tags, do not care about zephyr-v* which point to the
# same commit
- 'v*'
concurrency:
group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
cancel-in-progress: true
jobs:
footprint-tracking:
runs-on: ubuntu-20.04
if: github.repository == 'zephyrproject-rtos/zephyr'
container:
image: zephyrprojectrtos/ci:v0.18.4
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.1
CLANG_ROOT_DIR: /usr/lib/llvm-12
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
steps:
- name: Update PATH for west
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: Install pip packages
run: |
sudo pip3 install -U setuptools wheel pip gitpython
- name: checkout
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: west setup
run: |
west init -l . || true
west config --global update.narrow true
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v1
with:
aws-access-key-id: ${{ secrets.FOOTPRINT_AWS_KEY_ID }}
aws-secret-access-key: ${{ secrets.FOOTPRINT_AWS_ACCESS_KEY }}
aws-region: us-east-1
- name: Record Footprint
env:
BASE_REF: ${{ github.base_ref }}
run: |
export ZEPHYR_BASE=${PWD}
./scripts/footprint/track.py -p scripts/footprint/plan.txt
aws s3 sync --quiet footprint_data/ s3://testing.zephyrproject.org/footprint_data/

View File

@@ -1,63 +0,0 @@
name: Footprint Delta
on: pull_request
concurrency:
group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
cancel-in-progress: true
jobs:
footprint-delta:
runs-on: ubuntu-20.04
if: github.repository == 'zephyrproject-rtos/zephyr'
container:
image: zephyrprojectrtos/ci:v0.18.4
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.1
CLANG_ROOT_DIR: /usr/lib/llvm-12
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
steps:
- name: Update PATH for west
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: checkout
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: west setup
run: |
west init -l . || true
west config --global update.narrow true
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update.log
- name: Detect Changes in Footprint
env:
BASE_REF: ${{ github.base_ref }}
run: |
export ZEPHYR_BASE=${PWD}
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git remote -v
git rebase origin/${BASE_REF}
git checkout -b this_pr
west build -b frdm_k64f tests/benchmarks/footprints -t ram_report
cp build/ram.json ram2.json
west build -b frdm_k64f tests/benchmarks/footprints -t rom_report
cp build/rom.json rom2.json
git checkout origin/${BASE_REF}
west update
west build -p always -b frdm_k64f tests/benchmarks/footprints -t ram_report
west build -b frdm_k64f tests/benchmarks/footprints -t rom_report
cp build/ram.json ram1.json
cp build/rom.json rom1.json
git checkout this_pr
./scripts/footprint/fpdiff.py ram1.json ram2.json
./scripts/footprint/fpdiff.py rom1.json rom2.json

View File

@@ -1,8 +1,8 @@
name: Issue Tracker
on:
schedule:
- cron: '*/10 * * * *'
issues:
types: [opened, labeled, closed]
env:
OUTPUT_FILE_NAME: IssuesReport.md
@@ -14,13 +14,12 @@ env:
jobs:
track-issues:
name: "Collect Issue Stats"
runs-on: ubuntu-20.04
if: github.repository == 'zephyrproject-rtos/zephyr'
runs-on: ubuntu-latest
steps:
- name: Download configuration file
run: |
wget -q https://raw.githubusercontent.com/$GITHUB_REPOSITORY/main/.github/workflows/issues-report-config.json
wget -q https://raw.githubusercontent.com/$GITHUB_REPOSITORY/master/.github/workflows/issues-report-config.json
- name: install-packages
run: |
@@ -34,7 +33,7 @@ jobs:
token: ${{ secrets.GITHUB_TOKEN }}
- name: upload-stats
uses: actions/upload-artifact@v3
uses: actions/upload-artifact@master
continue-on-error: True
with:
name: ${{ env.OUTPUT_FILE_NAME }}
@@ -51,3 +50,4 @@ jobs:
run: |
mkd2html IssuesReport.md IssuesReport.html
aws s3 cp --quiet IssuesReport.html s3://testing.zephyrproject.org/issues/$GITHUB_REPOSITORY/index.html

View File

@@ -4,7 +4,7 @@ on: [pull_request]
jobs:
scancode_job:
runs-on: ubuntu-20.04
runs-on: ubuntu-latest
name: Scan code for licenses
steps:
- name: Checkout the code
@@ -15,7 +15,7 @@ jobs:
with:
directory-to-scan: 'scan/'
- name: Artifact Upload
uses: actions/upload-artifact@v3
uses: actions/upload-artifact@v1
with:
name: scancode
path: ./artifacts

View File

@@ -6,11 +6,11 @@ on:
jobs:
contribs:
runs-on: ubuntu-20.04
runs-on: ubuntu-latest
name: Manifest
steps:
- name: Checkout the code
uses: actions/checkout@v3
uses: actions/checkout@v2
with:
path: zephyrproject/zephyr
ref: ${{ github.event.pull_request.head.sha }}
@@ -18,7 +18,7 @@ jobs:
persist-credentials: false
- name: Manifest
uses: zephyrproject-rtos/action-manifest@2f1ad2908599d4fe747f886f9d733dd7eebae4ef
uses: zephyrproject-rtos/action-manifest@main
with:
github-token: ${{ secrets.GITHUB_TOKEN }}
manifest-path: 'west.yml'

View File

@@ -7,16 +7,15 @@ on:
jobs:
release:
runs-on: ubuntu-20.04
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v3
- uses: actions/checkout@v2
with:
fetch-depth: 0
- name: Get the version
id: get_version
run: |
echo "VERSION=${GITHUB_REF#refs/tags/}" >> $GITHUB_OUTPUT
run: echo ::set-output name=VERSION::${GITHUB_REF#refs/tags/}
- name: REUSE Compliance Check
uses: fsfe/reuse-action@v1
@@ -24,7 +23,7 @@ jobs:
args: spdx -o zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
- name: upload-results
uses: actions/upload-artifact@v3
uses: actions/upload-artifact@master
continue-on-error: True
with:
name: zephyr-${{ steps.get_version.outputs.VERSION }}.spdx

View File

@@ -6,7 +6,7 @@ on:
jobs:
stale:
name: Find Stale issues and PRs
runs-on: ubuntu-20.04
runs-on: ubuntu-latest
if: github.repository == 'zephyrproject-rtos/zephyr'
steps:
- uses: actions/stale@v3

View File

@@ -1,251 +0,0 @@
name: Run tests with twister
on:
push:
branches:
- v2.7-branch
pull_request_target:
branches:
- v2.7-branch
schedule:
# Run at 00:00 on Saturday
- cron: '20 0 * * 6'
concurrency:
group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
cancel-in-progress: true
jobs:
twister-build-prep:
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: zephyrprojectrtos/ci:v0.18.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
outputs:
subset: ${{ steps.output-services.outputs.subset }}
size: ${{ steps.output-services.outputs.size }}
env:
MATRIX_SIZE: 10
PUSH_MATRIX_SIZE: 15
DAILY_MATRIX_SIZE: 80
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.1
CLANG_ROOT_DIR: /usr/lib/llvm-12
TESTS_PER_BUILDER: 700
COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
BASE_REF: ${{ github.base_ref }}
steps:
- name: Clone cached Zephyr repository
if: github.event_name == 'pull_request_target'
continue-on-error: true
run: |
git clone --shared /github/cache/zephyrproject/zephyr .
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
if: github.event_name == 'pull_request_target'
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
persist-credentials: false
- name: Environment Setup
if: github.event_name == 'pull_request_target'
run: |
pip3 install GitPython
git config --global user.email "bot@zephyrproject.org"
git config --global user.name "Zephyr Bot"
git rebase origin/${BASE_REF}
git log --pretty=oneline | head -n 10
west init -l . || true
# no need for west update here
- name: Generate Test Plan with Twister
if: github.event_name == 'pull_request_target'
id: test-plan
run: |
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
# temporary until we have all PRs rebased on top of this commit.
git log -n 500 --oneline | grep -q "run twister using github action" || (
echo "Your branch is not up to date, you need to rebase on top of latest HEAD of main branch"
exit 1
)
python3 ./scripts/ci/test_plan.py -c origin/${BASE_REF}.. --pull-request -t $TESTS_PER_BUILDER
if [ -s .testplan ]; then
cat .testplan >> $GITHUB_ENV
else
echo "TWISTER_NODES=${MATRIX_SIZE}" >> $GITHUB_ENV
fi
rm -f testplan.csv .testplan
- name: Determine matrix size
id: output-services
run: |
if [ "${{github.event_name}}" = "pull_request_target" ]; then
if [ -n "${TWISTER_NODES}" ]; then
subset="[$(seq -s',' 1 ${TWISTER_NODES})]"
else
subset="[$(seq -s',' 1 ${MATRIX_SIZE})]"
fi
size=${TWISTER_NODES}
elif [ "${{github.event_name}}" = "push" ]; then
subset="[$(seq -s',' 1 ${PUSH_MATRIX_SIZE})]"
size=${MATRIX_SIZE}
elif [ "${{github.event_name}}" = "schedule" && "${{github.repository}}" = "zephyrproject-rtos/zephyr" ]; then
subset="[$(seq -s',' 1 ${DAILY_MATRIX_SIZE})]"
size=${DAILY_MATRIX_SIZE}
else
size=0
fi
echo "subset=${subset}" >> $GITHUB_OUTPUT
echo "size=${size}" >> $GITHUB_OUTPUT
twister-build:
runs-on: zephyr-runner-linux-x64-4xlarge
needs: twister-build-prep
if: needs.twister-build-prep.outputs.size != 0
container:
image: zephyrprojectrtos/ci:v0.18.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
strategy:
fail-fast: false
matrix:
subset: ${{fromJSON(needs.twister-build-prep.outputs.subset)}}
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.13.1
CLANG_ROOT_DIR: /usr/lib/llvm-12
TWISTER_COMMON: ' --inline-logs -v -N -M --retry-failed 3 '
DAILY_OPTIONS: ' -M --build-only --all '
PR_OPTIONS: ' --clobber-output --integration '
PUSH_OPTIONS: ' --clobber-output -M '
COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
BASE_REF: ${{ github.base_ref }}
steps:
- name: Clone cached Zephyr repository
continue-on-error: true
run: |
git clone --shared /github/cache/zephyrproject/zephyr .
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
persist-credentials: false
- name: Environment Setup
run: |
pip3 install GitPython
if [ "${{github.event_name}}" = "pull_request_target" ]; then
git config --global user.email "bot@zephyrproject.org"
git config --global user.name "Zephyr Builder"
git rebase origin/${BASE_REF}
git log --pretty=oneline | head -n 10
fi
echo "$HOME/.local/bin" >> $GITHUB_PATH
west init -l . || true
west config --global update.narrow true
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
- name: Check Environment
run: |
cmake --version
${CLANG_ROOT_DIR}/bin/clang --version
gcc --version
ls -la
echo "github.ref: ${{ github.ref }}"
echo "github.base_ref: ${{ github.base_ref }}"
echo "github.ref_name: ${{ github.ref_name }}"
- name: Prepare ccache timestamp/data
id: ccache_cache_timestamp
shell: cmake -P {0}
run: |
string(TIMESTAMP current_date "%Y-%m-%d-%H;%M;%S" UTC)
string(REPLACE "/" "_" repo ${{github.repository}})
string(REPLACE "-" "_" repo2 ${repo})
file(APPEND $ENV{GITHUB_OUTPUT} "repo=${repo2}\n")
- name: use cache
id: cache-ccache
uses: nashif/action-s3-cache@master
with:
key: ${{ steps.ccache_cache_timestamp.outputs.repo }}-${{ github.ref_name }}-${{github.event_name}}-${{ matrix.subset }}-ccache
path: /github/home/.ccache
aws-s3-bucket: ccache.zephyrproject.org
aws-access-key-id: ${{ secrets.CCACHE_S3_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.CCACHE_S3_SECRET_ACCESS_KEY }}
aws-region: us-east-2
- name: ccache stats initial
run: |
test -d github/home/.ccache && rm -rf /github/home/.ccache && mv github/home/.ccache /github/home/.ccache
ccache -M 10G -s
- if: github.event_name == 'push'
name: Run Tests with Twister (Push)
run: |
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
./scripts/twister --subset ${{matrix.subset}}/${{ strategy.job-total }} ${TWISTER_COMMON} ${PUSH_OPTIONS}
- if: github.event_name == 'pull_request_target'
name: Run Tests with Twister (Pull Request)
run: |
rm -f testplan.csv
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
python3 ./scripts/ci/test_plan.py -c origin/${BASE_REF}.. --pull-request
./scripts/twister --subset ${{matrix.subset}}/${{ strategy.job-total }} --load-tests testplan.csv ${TWISTER_COMMON} ${PR_OPTIONS}
- if: github.event_name == 'schedule'
name: Run Tests with Twister (Daily)
run: |
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
./scripts/twister --subset ${{matrix.subset}}/${{ strategy.job-total }} ${TWISTER_COMMON} ${DAILY_OPTIONS}
- name: ccache stats post
run: |
ccache -s
- name: Upload Unit Test Results
if: always()
uses: actions/upload-artifact@v3
with:
name: Unit Test Results (Subset ${{ matrix.subset }})
if-no-files-found: ignore
path: |
twister-out/twister.xml
testplan.csv
twister-test-results:
name: "Publish Unit Tests Results"
needs: twister-build
runs-on: ubuntu-20.04
# the build-and-test job might be skipped, we don't need to run this job then
if: success() || failure()
steps:
- name: Download Artifacts
uses: actions/download-artifact@v2
with:
path: artifacts
- name: Publish Unit Test Results
uses: EnricoMi/publish-unit-test-result-action@v1
with:
check_name: Unit Test Results
github_token: ${{ secrets.GITHUB_TOKEN }}
files: "**/twister.xml"
comment_mode: off

View File

@@ -5,16 +5,12 @@ name: Twister TestSuite
on:
push:
branches:
- v2.7-branch
paths:
- 'scripts/pylib/twister/**'
- 'scripts/twister'
- 'scripts/tests/twister/**'
- '.github/workflows/twister_tests.yml'
pull_request:
branches:
- v2.7-branch
paths:
- 'scripts/pylib/twister/**'
- 'scripts/twister'
@@ -28,17 +24,17 @@ jobs:
strategy:
matrix:
python-version: [3.6, 3.7, 3.8]
os: [ubuntu-20.04]
os: [ubuntu-latest]
steps:
- name: checkout
uses: actions/checkout@v3
uses: actions/checkout@v2
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v4
uses: actions/setup-python@v1
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux
if: startsWith(runner.os, 'Linux')
uses: actions/cache@v3
uses: actions/cache@v1
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ matrix.python-version }}

View File

@@ -5,15 +5,11 @@ name: Zephyr West Command Tests
on:
push:
branches:
- v2.7-branch
paths:
- 'scripts/west-commands.yml'
- 'scripts/west_commands/**'
- '.github/workflows/west_cmds.yml'
pull_request:
branches:
- v2.7-branch
paths:
- 'scripts/west-commands.yml'
- 'scripts/west_commands/**'
@@ -26,22 +22,17 @@ jobs:
strategy:
matrix:
python-version: [3.6, 3.7, 3.8]
os: [ubuntu-20.04, macos-11, windows-2022]
exclude:
- os: macos-11
python-version: 3.6
- os: windows-2022
python-version: 3.6
os: [ubuntu-latest, macos-latest, windows-latest]
steps:
- name: checkout
uses: actions/checkout@v3
uses: actions/checkout@v2
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v4
uses: actions/setup-python@v1
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux
if: startsWith(runner.os, 'Linux')
uses: actions/cache@v3
uses: actions/cache@v1
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ matrix.python-version }}
@@ -49,7 +40,7 @@ jobs:
${{ runner.os }}-pip-${{ matrix.python-version }}
- name: cache-pip-mac
if: startsWith(runner.os, 'macOS')
uses: actions/cache@v3
uses: actions/cache@v1
with:
path: ~/Library/Caches/pip
# Trailing '-' was just to get a different cache name
@@ -58,7 +49,7 @@ jobs:
${{ runner.os }}-pip-${{ matrix.python-version }}-
- name: cache-pip-win
if: startsWith(runner.os, 'Windows')
uses: actions/cache@v3
uses: actions/cache@v1
with:
path: ~\AppData\Local\pip\Cache
key: ${{ runner.os }}-pip-${{ matrix.python-version }}

2
.gitignore vendored
View File

@@ -42,8 +42,6 @@ doc/doc.warnings
.envrc
.vscode
hide-defaults-note
venv
.venv
# Tag files
GPATH

55
.known-issues/README Normal file
View File

@@ -0,0 +1,55 @@
This directory contains configuration files to ignore errors found in
the build and test process which are known to the developers and for
now can be safely ignored.
To use:
$ cd zephyr
$ make SOMETHING >& result
$ scripts/filter-known-issues.py result
It is included in the source tree so if anyone has to submit anything
that triggers some kind of error that is a false positive, it can
include the "ignore me" file, properly documented.
Each file can contain one or more multiline Python regular expressions
(https://docs.python.org/2/library/re.html#regular-expression-syntax)
that match an error message. Multiple regular expressions are
separated by comment blocks (that start with #). Note that an empty
line still is considered part of the multiline regular expression.
For example
---beginning---
#
# This testcase always fails, pending fix ZEP-1234
#
.*/tests/kernel/grumpy .* FAIL
#
# Documentation issue, masks:
#
# /home/e/inaky/z/kernel.git/doc/api/io_interfaces.rst:28: WARNING: Invalid definition: Expected identifier in nested name. [error at 19]
# struct dev_config::@65 dev_config::bits
# -------------------^
#
^(?P<filename>.+/doc/api/io_interfaces.rst):(?P<lineno>[0-9]+): WARNING: Invalid definition: Expected identifier in nested name. \[error at [0-9]+]
^\s+struct dev_config::@[0-9]+ dev_config::bits.*
^\s+-+\^
---end---
Note you want to:
- use relateive paths; instead of
/home/me/mydir/zephyr/something/somewhere.c you will want
^.*/something/somewhere.c (as they will depend on where it is being
built)
- Replace line numbers with [0-9]+, as they will change
- (?P<filename>[-._/\w]+/something/somewhere.c) saves the match on
that file path in a "variable" called 'filename' that later you can
match with (?P=filename) if you want to match multiple lines of the
same error message.
Can get really twisted and interesting in terms of regexps; they are
powerful, so start small :)

View File

@@ -0,0 +1,39 @@
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]file_system[/\\]index.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
^Declaration is \'.*\'\.$
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]peripherals[/\\]dma.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
^Declaration is \'.*\'\.$
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]audio[/\\]dmic.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
^Declaration is \'.*\'\.$
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking[/\\]net_if.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
^Declaration is \'.*\'\.$
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking[/\\]ieee802154.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
^Declaration is \'.*\'\.$
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]networking[/\\]sockets.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
^Declaration is \'.*\'\.$
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]uuid.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
^Declaration is \'.*\'\.$
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]sdp.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
^Declaration is \'.*\'\.$
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]rfcomm.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
^Declaration is \'.*\'\.$
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]hci_raw.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
^Declaration is \'.*\'\.$
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]hci_drivers.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
^Declaration is \'.*\'\.$
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]gatt.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
^Declaration is \'.*\'\.$
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]gap.rst):(?P<lineno>[0-9]+): WARNING: Duplicate C declaration, also defined at (.*)\.$
^Declaration is \'.*\'\.$

View File

@@ -0,0 +1,14 @@
# multiple section 'index'
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]custom-doxygen[/\\]mainpage.md):[0-9]+: warning: multiple use of section label 'index' for main page, \(first occurrence: .*$
#
^(?P<filename>([\-:\\/\w\.])+[/\\]doc[/\\]reference[/\\]bluetooth[/\\]gatt.rst):(?P<lineno>[0-9]+): WARNING: Error in declarator$
^[ \t]*If.*:$
^[ \t]*Invalid C declaration: .* \[error at [0-9]+\]$
^[ \t]*ATOMIC_DEFINE.*$
^[- \t]*\^$
^[ \t]*If.*:$
^[ \t]*Error in declarator or parameters$
^[ \t]*Invalid C declaration: .* \[error at [0-9]+\]$
^[ \t]*ATOMIC_DEFINE.*$
^[- \t]*\^$
^[ \t]*$

6
.known-issues/make.conf Normal file
View File

@@ -0,0 +1,6 @@
#
# When filtering output of the build process, ignore lines that don't
# provide any information that helps the invoker tell if there was an
# error.
#
^make: (Entering|Leaving) directory .*

View File

@@ -0,0 +1,11 @@
#
# When executing test cases, ignore the following messages as they are
# not to be considered hard errors.
#
# Block line when test case cannot run in the HW due to server or connection issues
#
^BLCK0/[-a-z0-9:]+ (.+)#test @[^/]+/[^:]+:[^:]+: evaluation blocked(.*)$
#
# Block line when there is an issue with the YKUSH serial connection
#
^BLCK0/[-a-z0-9:]+ (.+)#test @[^/]+/(?P<board>[^:]+):[^:]+: exception: 400: (?P=board): Cannot find YKUSH serial '[A-Z0-9]+'$

View File

@@ -0,0 +1,18 @@
#
# When executing test cases under TCF, ignore the following messages
# as they are not to be considered hard errors.
#
# TCF is run under make for taking advantage of the jobserver; when
# the testcase execution fail, make will complain, which we can
# ignore ('sommersault' was the old name of the target).
#
^/tmp/tcf-[a-zA-Z0-9]+.mk:[0-9]+: recipe for target ('tcf-jobserver-run'|'sommersault') failed$
#
# More of the same
#
^make: \*\*\* \[(tcf-jobserver-run|sommersault)\] Error 1$
#
# TCF's summary line. We don't need to consider it to determine if the
# run failed or passed.
#
^[A-Z]+0/\S+:\s+\S+\s+@\S+: [0-9]+ tests \([0-9]+ passed, [0-9]+ failed, [0-9]+ blocked, [0-9]+ skipped\).*$

View File

@@ -0,0 +1,4 @@
#
# Skip line when test case is eliminated due to filters
#
^SKIP0/\S+\s+\S+: No targets can be used \(all [0-9]+ selected from [0-9]+ available eliminated by testcase filtering\)$

View File

@@ -30,6 +30,3 @@ Yannis Damigos <giannis.damigos@gmail.com> <ydamigos@iccs.gr>
Vinayak Kariappa Chettimada <vinayak.kariappa.chettimada@nordicsemi.no> <vinayak.kariappa.chettimada@nordicsemi.no> <vich@nordicsemi.no> <vinayak.kariappa@gmail.com>
Sean Nyekjaer <sean@geanix.com> <sean.nyekjaer@prevas.dk>
Sean Nyekjaer <sean@geanix.com> <sean@nyekjaer.dk>
Marc Herbert <marc.herbert@intel.com> <46978960+marc-hb@users.noreply.github.com>
Martin Jäger <martin@libre.solar> <17674105+martinjaeger@users.noreply.github.com>
Armand Ciejak <armand@riedonetworks.com> <armandciejak@users.noreply.github.com>

View File

@@ -53,6 +53,7 @@ set(OFFSETS_H_TARGET offsets_h)
set(SYSCALL_LIST_H_TARGET syscall_list_h_target)
set(DRIVER_VALIDATION_H_TARGET driver_validation_h_target)
set(KOBJ_TYPES_H_TARGET kobj_types_h_target)
set(LINKER_SCRIPT_TARGET linker_script_target)
set(PARSE_SYSCALLS_TARGET parse_syscalls_target)
define_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT BRIEF_DOCS " " FULL_DOCS " ")
@@ -77,8 +78,6 @@ zephyr_include_directories(
${STDINCLUDE}
)
include(${ZEPHYR_BASE}/cmake/linker_script/${ARCH}/linker.cmake OPTIONAL)
# Don't add non-existing include directories, it creates noise and
# warnings in some tooling
foreach(optional_include_dir
@@ -97,11 +96,6 @@ zephyr_compile_definitions(
__ZEPHYR__=1
)
# Ensure that include/toolchain.h includes toolchain/other.h for all off-tree toolchains
if(TOOLCHAIN_USE_CUSTOM)
zephyr_compile_definitions(__TOOLCHAIN_CUSTOM__)
endif()
# @Intent: Set compiler flags to enable buffer overflow checks in libc functions
# @config in CONFIG_NO_OPTIMIZATIONS optional : Optimizations may affect security
zephyr_compile_definitions($<TARGET_PROPERTY:compiler,security_fortify> )
@@ -168,29 +162,17 @@ if(CONFIG_CPLUSPLUS)
# Kconfig choice ensures only one of these CONFIG_STD_CPP* is set.
if(CONFIG_STD_CPP98)
set(STD_CPP_DIALECT_FLAGS $<TARGET_PROPERTY:compiler-cpp,dialect_cpp98>)
list(APPEND CMAKE_CXX_COMPILE_FEATURES ${compile_features_cpp98})
elseif(CONFIG_STD_CPP11)
set(STD_CPP_DIALECT_FLAGS $<TARGET_PROPERTY:compiler-cpp,dialect_cpp11>) # Default in kconfig
list(APPEND CMAKE_CXX_COMPILE_FEATURES ${compile_features_cpp11})
elseif(CONFIG_STD_CPP14)
set(STD_CPP_DIALECT_FLAGS $<TARGET_PROPERTY:compiler-cpp,dialect_cpp14>)
list(APPEND CMAKE_CXX_COMPILE_FEATURES ${compile_features_cpp14})
elseif(CONFIG_STD_CPP17)
set(STD_CPP_DIALECT_FLAGS $<TARGET_PROPERTY:compiler-cpp,dialect_cpp17>)
list(APPEND CMAKE_CXX_COMPILE_FEATURES ${compile_features_cpp17})
elseif(CONFIG_STD_CPP2A)
set(STD_CPP_DIALECT_FLAGS $<TARGET_PROPERTY:compiler-cpp,dialect_cpp2a>)
list(APPEND CMAKE_CXX_COMPILE_FEATURES ${compile_features_cpp20})
elseif(CONFIG_STD_CPP20)
set(STD_CPP_DIALECT_FLAGS $<TARGET_PROPERTY:compiler-cpp,dialect_cpp20>)
list(APPEND CMAKE_CXX_COMPILE_FEATURES ${compile_features_cpp20})
elseif(CONFIG_STD_CPP2B)
set(STD_CPP_DIALECT_FLAGS $<TARGET_PROPERTY:compiler-cpp,dialect_cpp2b>)
list(APPEND CMAKE_CXX_COMPILE_FEATURES ${compile_features_cpp20})
else()
assert(0 "Unreachable code. Expected C++ standard to have been chosen. See Kconfig.zephyr.")
endif()
set(CMAKE_CXX_COMPILE_FEATURES ${CMAKE_CXX_COMPILE_FEATURES} PARENT_SCOPE)
zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:${STD_CPP_DIALECT_FLAGS}>)
endif()
@@ -230,11 +212,6 @@ zephyr_compile_options($<TARGET_PROPERTY:compiler,no_common>)
# @Intent: Set compiler specific flag for production of debug information
zephyr_compile_options($<TARGET_PROPERTY:compiler,debug>)
if(CONFIG_COMPILER_COLOR_DIAGNOSTICS)
# @Intent: Set compiler specific flag for diagnostic messages
zephyr_compile_options($<TARGET_PROPERTY:compiler,diagnostic>)
endif()
zephyr_compile_options(
${TOOLCHAIN_C_FLAGS}
)
@@ -245,12 +222,7 @@ zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:$<TARGET_PROPERTY:asm,required>
# @Intent: Enforce standard integer type correspondance to match Zephyr usage.
# (must be after compiler specific flags)
if(NOT CONFIG_ARCH_POSIX)
# `zephyr_stdint.h` is not included for the POSIX (native) arch because it
# compiles with the host toolchain/headers and there can be conflicts if we
# arbitrarily redefine our own type system (see #37718).
zephyr_compile_options("SHELL: $<TARGET_PROPERTY:compiler,imacros> ${ZEPHYR_BASE}/include/toolchain/zephyr_stdint.h")
endif()
zephyr_compile_options("SHELL: $<TARGET_PROPERTY:compiler,imacros> ${ZEPHYR_BASE}/include/toolchain/zephyr_stdint.h")
# Common toolchain-agnostic assembly flags
zephyr_compile_options(
@@ -370,15 +342,10 @@ endif()
# Declare MPU userspace dependencies before the linker scripts to make
# sure the order of dependencies are met
if(CONFIG_USERSPACE)
add_custom_target(app_smem)
set(APP_SMEM_ALIGNED_DEP app_smem_aligned_linker)
set(APP_SMEM_UNALIGNED_DEP app_smem_unaligned_linker)
endif()
if(CONFIG_USERSPACE)
set(KOBJECT_LINKER_DEP kobject_linker)
endif()
get_property(TOPT GLOBAL PROPERTY TOPT)
set_ifndef( TOPT -Wl,-T) # clang doesn't pick -T for some reason and complains,
# while -Wl,-T works for both, gcc and clang
@@ -607,12 +574,23 @@ add_custom_command(
add_custom_target(${SYSCALL_LIST_H_TARGET} DEPENDS ${syscall_list_h})
# This only works for CMake version >=3.15, but as the property is ignored on
# older CMake versions there is no reason to check for version.
set_property(TARGET ${SYSCALL_LIST_H_TARGET}
APPEND PROPERTY
ADDITIONAL_CLEAN_FILES
${CMAKE_CURRENT_BINARY_DIR}/include/generated/syscalls
)
# Only works with make.
if(${CMAKE_VERSION} VERSION_LESS 3.15)
set_property(DIRECTORY
APPEND PROPERTY
ADDITIONAL_MAKE_CLEAN_FILES
${CMAKE_CURRENT_BINARY_DIR}/include/generated/syscalls
)
endif()
add_custom_target(${PARSE_SYSCALLS_TARGET}
DEPENDS
${syscalls_json}
@@ -706,6 +684,8 @@ add_custom_command(
)
add_custom_target(${OFFSETS_H_TARGET} DEPENDS ${OFFSETS_H_PATH})
zephyr_include_directories(${TOOLCHAIN_INCLUDES})
zephyr_get_include_directories_for_lang(C ZEPHYR_INCLUDES)
add_subdirectory(kernel)
@@ -714,30 +694,6 @@ add_subdirectory(kernel)
get_property(ZEPHYR_LIBS_PROPERTY GLOBAL PROPERTY ZEPHYR_LIBS)
foreach(zephyr_lib ${ZEPHYR_LIBS_PROPERTY})
get_property(lib_type TARGET ${zephyr_lib} PROPERTY TYPE)
# To prevent CMake failure when a driver is enabled, for example: REGULATOR=y
# we disable any Zephyr libraries without sources and adds the `empty_file.c`.
if(${lib_type} STREQUAL STATIC_LIBRARY
AND NOT ${zephyr_lib} STREQUAL app
)
get_property(source_list TARGET ${zephyr_lib} PROPERTY SOURCES)
get_property(lib_imported TARGET ${zephyr_lib} PROPERTY IMPORTED)
if(NOT source_list
AND NOT ${lib_imported}
)
get_property(allow_empty TARGET ${zephyr_lib} PROPERTY ALLOW_EMPTY)
if(NOT "${allow_empty}")
message(WARNING
"No SOURCES given to Zephyr library: ${zephyr_lib}\nExcluding target from build."
)
endif()
target_sources(${zephyr_lib} PRIVATE ${ZEPHYR_BASE}/misc/empty_file.c)
set_property(TARGET ${zephyr_lib} PROPERTY EXCLUDE_FROM_ALL TRUE)
list(REMOVE_ITEM ZEPHYR_LIBS_PROPERTY ${zephyr_lib})
continue()
endif()
endif()
# TODO: Could this become an INTERFACE property of zephyr_interface?
add_dependencies(${zephyr_lib} zephyr_generated_headers)
endforeach()
@@ -748,13 +704,32 @@ if (CONFIG_CODE_DATA_RELOCATION)
set(CODE_RELOCATION_DEP code_relocation_source_lib)
endif() # CONFIG_CODE_DATA_RELOCATION
# Give the linker script targets all of the include directories so
# that cmake can successfully find the linker scripts' header
configure_linker_script(
linker.cmd
""
${APP_SMEM_ALIGNED_DEP}
${CODE_RELOCATION_DEP}
zephyr_generated_headers
)
add_custom_target(
${LINKER_SCRIPT_TARGET}
DEPENDS
linker.cmd
)
# Give the '${LINKER_SCRIPT_TARGET}' target all of the include directories so
# that cmake can successfully find the linker_script's header
# dependencies.
zephyr_get_include_directories_for_lang(C
ZEPHYR_INCLUDE_DIRS
STRIP_PREFIX # Don't use a -I prefix
)
set_property(TARGET
${LINKER_SCRIPT_TARGET}
PROPERTY INCLUDE_DIRECTORIES
${ZEPHYR_INCLUDE_DIRS}
)
if(CONFIG_GEN_ISR_TABLES)
if(CONFIG_GEN_SW_ISR_TABLE)
@@ -791,23 +766,6 @@ if(CONFIG_GEN_ISR_TABLES)
set_property(GLOBAL APPEND PROPERTY GENERATED_KERNEL_SOURCE_FILES isr_tables.c)
endif()
if(CONFIG_HAS_DTS)
# dev_handles.c is generated from ${ZEPHYR_PREBUILT_EXECUTABLE} by
# gen_handles.py
add_custom_command(
OUTPUT dev_handles.c
COMMAND
${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/gen_handles.py
--output-source dev_handles.c
--kernel $<TARGET_FILE:${ZEPHYR_PREBUILT_EXECUTABLE}>
--zephyr-base ${ZEPHYR_BASE}
--start-symbol "$<TARGET_PROPERTY:linker,devices_start_symbol>"
DEPENDS ${ZEPHYR_PREBUILT_EXECUTABLE}
)
set_property(GLOBAL APPEND PROPERTY GENERATED_KERNEL_SOURCE_FILES dev_handles.c)
endif()
if(CONFIG_CODE_DATA_RELOCATION)
# @Intent: Linker script to relocate .text, data and .bss sections
toolchain_ld_relocation()
@@ -831,11 +789,11 @@ if(CONFIG_USERSPACE)
set(GEN_KOBJ_LIST ${ZEPHYR_BASE}/scripts/gen_kobject_list.py)
set(PROCESS_GPERF ${ZEPHYR_BASE}/scripts/process_gperf.py)
set(KOBJECT_HASH_LIST kobject_hash.gperf)
set(KOBJECT_HASH_OUTPUT_SRC_PRE kobject_hash_preprocessed.c)
set(KOBJECT_HASH_OUTPUT_SRC kobject_hash.c)
set(KOBJECT_HASH_OUTPUT_OBJ kobject_hash.c.obj)
set(KOBJECT_HASH_OUTPUT_OBJ_RENAMED kobject_hash_renamed.o)
set(OBJ_LIST kobject_hash.gperf)
set(OUTPUT_SRC_PRE kobject_hash_preprocessed.c)
set(OUTPUT_SRC kobject_hash.c)
set(OUTPUT_OBJ kobject_hash.c.obj)
set(OUTPUT_OBJ_RENAMED kobject_hash_renamed.o)
# Essentially what we are doing here is extracting some information
# out of the nearly finished elf file, generating the source code
@@ -845,134 +803,112 @@ if(CONFIG_USERSPACE)
# Use the script GEN_KOBJ_LIST to scan the kernel binary's
# (${ZEPHYR_PREBUILT_EXECUTABLE}) DWARF information to produce a table of kernel
# objects (KOBJECT_HASH_LIST) which we will then pass to gperf
# objects (OBJ_LIST) which we will then pass to gperf
add_custom_command(
OUTPUT ${KOBJECT_HASH_LIST}
OUTPUT ${OBJ_LIST}
COMMAND
${PYTHON_EXECUTABLE}
${GEN_KOBJ_LIST}
--kernel $<TARGET_FILE:${ZEPHYR_PREBUILT_EXECUTABLE}>
--gperf-output ${KOBJECT_HASH_LIST}
--gperf-output ${OBJ_LIST}
${gen_kobject_list_include_args}
$<$<BOOL:${CMAKE_VERBOSE_MAKEFILE}>:--verbose>
DEPENDS
${ZEPHYR_PREBUILT_EXECUTABLE}
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
)
add_custom_target(
kobj_hash_list
DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${KOBJECT_HASH_LIST}
)
add_custom_target(obj_list DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${OBJ_LIST})
# Use gperf to generate C code (KOBJECT_HASH_OUTPUT_SRC_PRE) which implements a
# perfect hashtable based on KOBJECT_HASH_LIST
# Use gperf to generate C code (OUTPUT_SRC_PRE) which implements a
# perfect hashtable based on OBJ_LIST
add_custom_command(
OUTPUT ${KOBJECT_HASH_OUTPUT_SRC_PRE}
OUTPUT ${OUTPUT_SRC_PRE}
COMMAND
${GPERF}
--output-file ${KOBJECT_HASH_OUTPUT_SRC_PRE}
--multiple-iterations 10
${KOBJECT_HASH_LIST}
DEPENDS kobj_hash_list ${KOBJECT_HASH_LIST}
--output-file ${OUTPUT_SRC_PRE}
${OBJ_LIST}
DEPENDS obj_list ${OBJ_LIST}
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
)
add_custom_target(
kobj_hash_output_src_pre
DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${KOBJECT_HASH_OUTPUT_SRC_PRE}
)
add_custom_target(output_src_pre DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${OUTPUT_SRC_PRE})
# For our purposes the code/data generated by gperf is not optimal.
#
# The script PROCESS_GPERF creates a new c file KOBJECT_HASH_OUTPUT_SRC based on
# KOBJECT_HASH_OUTPUT_SRC_PRE to greatly reduce the amount of code/data generated
# The script PROCESS_GPERF creates a new c file OUTPUT_SRC based on
# OUTPUT_SRC_PRE to greatly reduce the amount of code/data generated
# since we know we are always working with pointer values
add_custom_command(
OUTPUT ${KOBJECT_HASH_OUTPUT_SRC}
OUTPUT ${OUTPUT_SRC}
COMMAND
${PYTHON_EXECUTABLE}
${PROCESS_GPERF}
-i ${KOBJECT_HASH_OUTPUT_SRC_PRE}
-o ${KOBJECT_HASH_OUTPUT_SRC}
-i ${OUTPUT_SRC_PRE}
-o ${OUTPUT_SRC}
-p "struct z_object"
$<$<BOOL:${CMAKE_VERBOSE_MAKEFILE}>:--verbose>
DEPENDS kobj_hash_output_src_pre ${KOBJECT_HASH_OUTPUT_SRC_PRE}
DEPENDS output_src_pre ${OUTPUT_SRC_PRE}
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
)
add_custom_target(
kobj_hash_output_src
DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${KOBJECT_HASH_OUTPUT_SRC}
)
add_custom_target(output_src DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${OUTPUT_SRC})
# We need precise control of where generated text/data ends up in the final
# kernel image. Disable function/data sections and use objcopy to move
# generated data into special section names
add_library(
kobj_hash_output_lib
STATIC ${CMAKE_CURRENT_BINARY_DIR}/${KOBJECT_HASH_OUTPUT_SRC}
add_library(output_lib STATIC
${CMAKE_CURRENT_BINARY_DIR}/${OUTPUT_SRC}
)
set_source_files_properties(${KOBJECT_HASH_OUTPUT_SRC}
PROPERTIES COMPILE_FLAGS
set_source_files_properties(${OUTPUT_SRC} PROPERTIES COMPILE_FLAGS
"${NO_COVERAGE_FLAGS} -fno-function-sections -fno-data-sections")
set_source_files_properties(${KOBJECT_HASH_OUTPUT_SRC}
set_source_files_properties(${OUTPUT_SRC}
PROPERTIES COMPILE_DEFINITIONS "${compile_definitions_interface}")
# Turn off -ffunction-sections, etc.
# NB: Using a library instead of target_compile_options(kobj_hash_output_lib
# NB: Using a library instead of target_compile_options(output_lib
# [...]) because a library's options have precedence
add_library(kobj_hash_output_lib_interface INTERFACE)
add_library(output_lib_interface INTERFACE)
target_link_libraries(kobj_hash_output_lib kobj_hash_output_lib_interface)
target_link_libraries(output_lib output_lib_interface)
foreach(incl ${include_dir_in_interface})
target_include_directories(kobj_hash_output_lib_interface INTERFACE ${incl})
target_include_directories(output_lib_interface INTERFACE ${incl})
endforeach()
foreach(incl ${sys_include_dir_in_interface})
target_include_directories(kobj_hash_output_lib_interface SYSTEM INTERFACE ${incl})
target_include_directories(output_lib_interface SYSTEM INTERFACE ${incl})
endforeach()
set(
KOBJECT_HASH_OUTPUT_OBJ_PATH
${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/kobj_hash_output_lib.dir/${KOBJECT_HASH_OUTPUT_OBJ}
)
set(OUTPUT_OBJ_PATH ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/output_lib.dir/${OUTPUT_OBJ})
add_custom_command(
OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${KOBJECT_HASH_OUTPUT_OBJ_RENAMED}
OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${OUTPUT_OBJ_RENAMED}
COMMAND $<TARGET_PROPERTY:bintools,elfconvert_command>
$<TARGET_PROPERTY:bintools,elfconvert_flag>
$<TARGET_PROPERTY:bintools,elfconvert_flag_section_rename>.data=.kobject_data.data
$<TARGET_PROPERTY:bintools,elfconvert_flag_section_rename>.sdata=.kobject_data.sdata
$<TARGET_PROPERTY:bintools,elfconvert_flag_section_rename>.text=.kobject_data.text
$<TARGET_PROPERTY:bintools,elfconvert_flag_section_rename>.rodata=.kobject_data.rodata
$<TARGET_PROPERTY:bintools,elfconvert_flag_infile>${KOBJECT_HASH_OUTPUT_OBJ_PATH}
$<TARGET_PROPERTY:bintools,elfconvert_flag_outfile>${KOBJECT_HASH_OUTPUT_OBJ_RENAMED}
$<TARGET_PROPERTY:bintools,elfconvert_flag_infile>${OUTPUT_OBJ_PATH}
$<TARGET_PROPERTY:bintools,elfconvert_flag_outfile>${OUTPUT_OBJ_RENAMED}
$<TARGET_PROPERTY:bintools,elfconvert_flag_final>
DEPENDS kobj_hash_output_lib
DEPENDS output_lib
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
COMMAND_EXPAND_LISTS
)
add_custom_target(
kobj_hash_output_obj_renamed
DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${KOBJECT_HASH_OUTPUT_OBJ_RENAMED}
)
add_custom_target(output_obj_renamed DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${OUTPUT_OBJ_RENAMED})
add_library(kobj_hash_output_obj_renamed_lib STATIC IMPORTED GLOBAL)
add_library(output_obj_renamed_lib STATIC IMPORTED GLOBAL)
set_property(
TARGET kobj_hash_output_obj_renamed_lib
TARGET output_obj_renamed_lib
PROPERTY
IMPORTED_LOCATION ${CMAKE_CURRENT_BINARY_DIR}/${KOBJECT_HASH_OUTPUT_OBJ_RENAMED}
IMPORTED_LOCATION ${CMAKE_CURRENT_BINARY_DIR}/${OUTPUT_OBJ_RENAMED}
)
add_dependencies(
kobj_hash_output_obj_renamed_lib
kobj_hash_output_obj_renamed
output_obj_renamed_lib
output_obj_renamed
)
set_property(
GLOBAL APPEND PROPERTY
GENERATED_KERNEL_OBJECT_FILES kobj_hash_output_obj_renamed_lib
)
set_property(GLOBAL APPEND PROPERTY GENERATED_KERNEL_OBJECT_FILES output_obj_renamed_lib)
endif()
# Read global variables into local variables
@@ -987,7 +923,6 @@ set_ifndef(CSTD c99)
zephyr_compile_options(
$<$<COMPILE_LANGUAGE:C>:$<TARGET_PROPERTY:compiler,cstd>${CSTD}>
)
set(CMAKE_C_COMPILE_FEATURES ${compile_features_${CSTD}} PARENT_SCOPE)
# @Intent: Configure linker scripts, i.e. generate linker scripts with variables substituted
toolchain_ld_configure_files()
@@ -995,42 +930,18 @@ toolchain_ld_configure_files()
if(CONFIG_USERSPACE)
set(APP_SMEM_ALIGNED_LD "${PROJECT_BINARY_DIR}/include/generated/app_smem_aligned.ld")
set(APP_SMEM_UNALIGNED_LD "${PROJECT_BINARY_DIR}/include/generated/app_smem_unaligned.ld")
if(CONFIG_LINKER_USE_PINNED_SECTION)
set(APP_SMEM_PINNED_ALIGNED_LD
"${PROJECT_BINARY_DIR}/include/generated/app_smem_pinned_aligned.ld")
set(APP_SMEM_PINNED_UNALIGNED_LD
"${PROJECT_BINARY_DIR}/include/generated/app_smem_pinned_unaligned.ld")
if(NOT CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT)
# The libc partition may hold symbols that are required during boot process,
# for example, stack guard (if enabled). So the libc partition must be pinned
# if not sections are in physical memory at boot, as the paging mechanism is
# only initialized post-kernel.
set_property(TARGET app_smem APPEND PROPERTY pinned_partitions "z_libc_partition")
endif()
get_property(APP_SMEM_PINNED_PARTITION_LIST TARGET app_smem PROPERTY pinned_partitions)
if(APP_SMEM_PINNED_PARTITION_LIST)
list(JOIN APP_SMEM_PINNED_PARTITION_LIST "," APP_SMEM_PINNED_PARTITION_LIST_ARG_CSL)
set(APP_SMEM_PINNED_PARTITION_LIST_ARG "--pinpartitions=${APP_SMEM_PINNED_PARTITION_LIST_ARG_CSL}")
endif()
endif()
set(OBJ_FILE_DIR "${PROJECT_BINARY_DIR}/../")
add_custom_target(
${APP_SMEM_ALIGNED_DEP}
DEPENDS
${APP_SMEM_ALIGNED_LD}
${APP_SMEM_PINNED_ALIGNED_LD}
)
add_custom_target(
${APP_SMEM_UNALIGNED_DEP}
DEPENDS
${APP_SMEM_UNALIGNED_LD}
${APP_SMEM_PINNED_UNALIGNED_LD}
)
if(CONFIG_NEWLIB_LIBC)
@@ -1041,13 +952,11 @@ if(CONFIG_USERSPACE)
endif()
add_custom_command(
OUTPUT ${APP_SMEM_UNALIGNED_LD} ${APP_SMEM_PINNED_UNALIGNED_LD}
OUTPUT ${APP_SMEM_UNALIGNED_LD}
COMMAND ${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/gen_app_partitions.py
-f ${CMAKE_BINARY_DIR}/compile_commands.json
-d ${OBJ_FILE_DIR}
-o ${APP_SMEM_UNALIGNED_LD}
$<$<BOOL:${APP_SMEM_PINNED_UNALIGNED_LD}>:--pinoutput=${APP_SMEM_PINNED_UNALIGNED_LD}>
${APP_SMEM_PINNED_PARTITION_LIST_ARG}
${NEWLIB_PART}
$<TARGET_PROPERTY:zephyr_property_target,COMPILE_OPTIONS>
$<$<BOOL:${CMAKE_VERBOSE_MAKEFILE}>:--verbose>
@@ -1065,7 +974,6 @@ if(CONFIG_USERSPACE)
${CODE_RELOCATION_DEP}
${APP_SMEM_UNALIGNED_DEP}
${APP_SMEM_UNALIGNED_LD}
${APP_SMEM_PINNED_UNALIGNED_LD}
zephyr_generated_headers
)
@@ -1098,13 +1006,11 @@ if(CONFIG_USERSPACE)
add_dependencies( app_smem_unaligned_prebuilt linker_app_smem_unaligned_script ${OFFSETS_LIB})
add_custom_command(
OUTPUT ${APP_SMEM_ALIGNED_LD} ${APP_SMEM_PINNED_ALIGNED_LD}
OUTPUT ${APP_SMEM_ALIGNED_LD}
COMMAND ${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/gen_app_partitions.py
-e $<TARGET_FILE:app_smem_unaligned_prebuilt>
-o ${APP_SMEM_ALIGNED_LD}
$<$<BOOL:${APP_SMEM_PINNED_ALIGNED_LD}>:--pinoutput=${APP_SMEM_PINNED_ALIGNED_LD}>
${APP_SMEM_PINNED_PARTITION_LIST_ARG}
${NEWLIB_PART}
$<TARGET_PROPERTY:zephyr_property_target,COMPILE_OPTIONS>
$<$<BOOL:${CMAKE_VERBOSE_MAKEFILE}>:--verbose>
@@ -1118,174 +1024,21 @@ if(CONFIG_USERSPACE)
)
endif()
if(CONFIG_USERSPACE)
# This CONFIG_USERSPACE block is to create place holders to reserve space
# for the gperf generated structures for zephyr_prebuilt.elf.
# These place holders are there so that the placement of kobjects would be
# the same between linking zephyr_prebuilt.elf and zephyr.elf, as
# the gperf hash table is hashed on the addresses of kobjects.
# The placeholders are generated from app_smem_unaligned_prebuilt.elf.
set(KOBJECT_PREBUILT_HASH_LIST kobject_prebuilt_hash.gperf)
set(KOBJECT_PREBUILT_HASH_OUTPUT_SRC_PRE kobject_prebuilt_hash_preprocessed.c)
set(KOBJECT_PREBUILT_HASH_OUTPUT_SRC kobject_prebuilt_hash.c)
set(KOBJECT_PREBUILT_HASH_OUTPUT_OBJ kobject_prebuilt_hash.c.obj)
add_custom_command(
OUTPUT ${KOBJECT_PREBUILT_HASH_LIST}
COMMAND
${PYTHON_EXECUTABLE}
${GEN_KOBJ_LIST}
--kernel $<TARGET_FILE:app_smem_unaligned_prebuilt>
--gperf-output ${KOBJECT_PREBUILT_HASH_LIST}
${gen_kobject_list_include_args}
$<$<BOOL:${CMAKE_VERBOSE_MAKEFILE}>:--verbose>
DEPENDS
app_smem_unaligned_prebuilt
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
)
add_custom_target(
kobj_prebuilt_hash_list
DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${KOBJECT_PREBUILT_HASH_LIST}
)
add_custom_command(
OUTPUT ${KOBJECT_PREBUILT_HASH_OUTPUT_SRC_PRE}
COMMAND
${GPERF}
--output-file ${KOBJECT_PREBUILT_HASH_OUTPUT_SRC_PRE}
--multiple-iterations 10
${KOBJECT_PREBUILT_HASH_LIST}
DEPENDS kobj_prebuilt_hash_list ${KOBJECT_PREBUILT_HASH_LIST}
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
)
add_custom_target(
kobj_prebuilt_hash_output_src_pre
DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${KOBJECT_PREBUILT_HASH_OUTPUT_SRC_PRE}
)
add_custom_command(
OUTPUT ${KOBJECT_PREBUILT_HASH_OUTPUT_SRC}
COMMAND
${PYTHON_EXECUTABLE}
${PROCESS_GPERF}
-i ${KOBJECT_PREBUILT_HASH_OUTPUT_SRC_PRE}
-o ${KOBJECT_PREBUILT_HASH_OUTPUT_SRC}
-p "struct z_object"
$<$<BOOL:${CMAKE_VERBOSE_MAKEFILE}>:--verbose>
DEPENDS kobj_prebuilt_hash_output_src_pre ${KOBJECT_PREBUILT_HASH_OUTPUT_SRC_PRE}
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
)
add_custom_target(
kobj_prebuilt_hash_output_src
DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${KOBJECT_PREBUILT_HASH_OUTPUT_SRC}
)
add_library(
kobj_prebuilt_hash_output_lib
STATIC ${CMAKE_CURRENT_BINARY_DIR}/${KOBJECT_PREBUILT_HASH_OUTPUT_SRC}
)
set_source_files_properties(${KOBJECT_PREBUILT_HASH_OUTPUT_SRC}
PROPERTIES COMPILE_FLAGS
"${NO_COVERAGE_FLAGS} -fno-function-sections -fno-data-sections")
set_source_files_properties(${KOBJECT_PREBUILT_HASH_OUTPUT_SRC}
PROPERTIES COMPILE_DEFINITIONS "${compile_definitions_interface}")
add_library(kobj_prebuilt_hash_output_lib_interface INTERFACE)
target_link_libraries(
kobj_prebuilt_hash_output_lib
kobj_prebuilt_hash_output_lib_interface
)
foreach(incl ${include_dir_in_interface})
target_include_directories(
kobj_prebuilt_hash_output_lib_interface
INTERFACE ${incl}
)
endforeach()
foreach(incl ${sys_include_dir_in_interface})
target_include_directories(
kobj_prebuilt_hash_output_lib_interface
SYSTEM INTERFACE ${incl}
)
endforeach()
set(
KOBJECT_PREBUILT_HASH_OUTPUT_OBJ_PATH
${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/kobj_prebuilt_hash_output_lib.dir/${KOBJECT_PREBUILT_HASH_OUTPUT_OBJ}
)
set(KOBJECT_LINKER_HEADER_DATA "${PROJECT_BINARY_DIR}/include/generated/linker-kobject-prebuilt-data.h")
add_custom_command(
OUTPUT ${KOBJECT_LINKER_HEADER_DATA}
COMMAND
${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/gen_kobject_placeholders.py
--object ${KOBJECT_PREBUILT_HASH_OUTPUT_OBJ_PATH}
--outdir ${PROJECT_BINARY_DIR}/include/generated
--datapct ${CONFIG_KOBJECT_DATA_AREA_RESERVE_EXTRA_PERCENT}
--rodata ${CONFIG_KOBJECT_RODATA_AREA_EXTRA_BYTES}
$<$<BOOL:${CMAKE_VERBOSE_MAKEFILE}>:--verbose>
DEPENDS
kobj_prebuilt_hash_output_lib
${KOBJECT_PREBUILT_HASH_OUTPUT_OBJ_PATH}
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
)
add_custom_target(
${KOBJECT_LINKER_DEP}
DEPENDS
${KOBJECT_LINKER_HEADER_DATA}
)
endif()
configure_linker_script(
linker_zephyr_prebuilt.cmd
"-DLINKER_ZEPHYR_PREBUILT"
${APP_SMEM_ALIGNED_DEP}
${KOBJECT_LINKER_DEP}
${CODE_RELOCATION_DEP}
zephyr_generated_headers
)
add_custom_target(
linker_zephyr_prebuilt_script_target
DEPENDS
linker_zephyr_prebuilt.cmd
)
set_property(TARGET
linker_zephyr_prebuilt_script_target
PROPERTY INCLUDE_DIRECTORIES
${ZEPHYR_INCLUDE_DIRS}
)
# FIXME: Is there any way to get rid of empty_file.c?
add_executable( ${ZEPHYR_PREBUILT_EXECUTABLE} misc/empty_file.c)
toolchain_ld_link_elf(
TARGET_ELF ${ZEPHYR_PREBUILT_EXECUTABLE}
OUTPUT_MAP ${PROJECT_BINARY_DIR}/${ZEPHYR_PREBUILT_EXECUTABLE}.map
LIBRARIES_PRE_SCRIPT ""
LINKER_SCRIPT ${PROJECT_BINARY_DIR}/linker_zephyr_prebuilt.cmd
LINKER_SCRIPT ${PROJECT_BINARY_DIR}/linker.cmd
DEPENDENCIES ${CODE_RELOCATION_DEP}
)
target_byproducts(TARGET ${ZEPHYR_PREBUILT_EXECUTABLE}
BYPRODUCTS ${PROJECT_BINARY_DIR}/${ZEPHYR_PREBUILT_EXECUTABLE}.map
)
set_property(TARGET
${ZEPHYR_PREBUILT_EXECUTABLE}
PROPERTY LINK_DEPENDS ${PROJECT_BINARY_DIR}/linker_zephyr_prebuilt.cmd
)
add_dependencies(
${ZEPHYR_PREBUILT_EXECUTABLE}
linker_zephyr_prebuilt_script_target
${OFFSETS_LIB}
)
set_property(TARGET ${ZEPHYR_PREBUILT_EXECUTABLE} PROPERTY LINK_DEPENDS ${PROJECT_BINARY_DIR}/linker.cmd)
add_dependencies( ${ZEPHYR_PREBUILT_EXECUTABLE} ${LINKER_SCRIPT_TARGET} ${OFFSETS_LIB})
set(generated_kernel_files ${GKSF} ${GKOF})
if(NOT generated_kernel_files)
@@ -1293,27 +1046,25 @@ if(NOT generated_kernel_files)
# generation stage.
set(logical_target_for_zephyr_elf ${ZEPHYR_PREBUILT_EXECUTABLE})
else()
# The final linker pass uses the same source linker script of the
# previous passes, but this time with a different output
# file and preprocessed with the define LINKER_ZEPHYR_FINAL.
#
# LINKER_PASS2 is deprecated but being kept to avoid breaking
# external projects. It will be removed in the future.
# The second linker pass uses the same source linker script of the
# first pass (LINKER_SCRIPT), but this time with a different output
# file and preprocessed with the define LINKER_PASS2.
configure_linker_script(
linker.cmd
"-DLINKER_ZEPHYR_FINAL;-DLINKER_PASS2"
linker_pass_final.cmd
"-DLINKER_PASS2"
${CODE_RELOCATION_DEP}
${ZEPHYR_PREBUILT_EXECUTABLE}
zephyr_generated_headers
)
set(LINKER_PASS_FINAL_SCRIPT_TARGET linker_pass_final_script_target)
add_custom_target(
linker_zephyr_final_script_target
${LINKER_PASS_FINAL_SCRIPT_TARGET}
DEPENDS
linker.cmd
linker_pass_final.cmd
)
set_property(TARGET
linker_zephyr_final_script_target
${LINKER_PASS_FINAL_SCRIPT_TARGET}
PROPERTY INCLUDE_DIRECTORIES
${ZEPHYR_INCLUDE_DIRS}
)
@@ -1323,12 +1074,15 @@ else()
TARGET_ELF ${ZEPHYR_FINAL_EXECUTABLE}
OUTPUT_MAP ${PROJECT_BINARY_DIR}/${ZEPHYR_FINAL_EXECUTABLE}.map
LIBRARIES_PRE_SCRIPT ${GKOF}
LINKER_SCRIPT ${PROJECT_BINARY_DIR}/linker.cmd
LINKER_SCRIPT ${PROJECT_BINARY_DIR}/linker_pass_final.cmd
LIBRARIES_POST_SCRIPT ""
DEPENDENCIES ${CODE_RELOCATION_DEP}
)
set_property(TARGET ${ZEPHYR_FINAL_EXECUTABLE} PROPERTY LINK_DEPENDS ${PROJECT_BINARY_DIR}/linker.cmd)
add_dependencies( ${ZEPHYR_FINAL_EXECUTABLE} linker_zephyr_final_script_target)
target_byproducts(TARGET ${ZEPHYR_FINAL_EXECUTABLE}
BYPRODUCTS ${PROJECT_BINARY_DIR}/${ZEPHYR_FINAL_EXECUTABLE}.map
)
set_property(TARGET ${ZEPHYR_FINAL_EXECUTABLE} PROPERTY LINK_DEPENDS ${PROJECT_BINARY_DIR}/linker_pass_final.cmd)
add_dependencies( ${ZEPHYR_FINAL_EXECUTABLE} ${LINKER_PASS_FINAL_SCRIPT_TARGET})
# Use the pass2 elf as the final elf
set(logical_target_for_zephyr_elf ${ZEPHYR_FINAL_EXECUTABLE})
@@ -1385,17 +1139,6 @@ if(CONFIG_OUTPUT_PRINT_MEMORY_USAGE)
endif()
endif()
if(NOT CONFIG_EXCEPTIONS)
set(eh_frame_section ".eh_frame")
else()
set(eh_frame_section "")
endif()
set(remove_sections_argument_list "")
foreach(section .comment COMMON ${eh_frame_section})
list(APPEND remove_sections_argument_list
$<TARGET_PROPERTY:bintools,elfconvert_flag_section_remove>${section})
endforeach()
if(CONFIG_BUILD_OUTPUT_HEX OR BOARD_FLASH_RUNNER STREQUAL openocd)
get_property(elfconvert_formats TARGET bintools PROPERTY elfconvert_formats)
if(ihex IN_LIST elfconvert_formats)
@@ -1405,7 +1148,9 @@ if(CONFIG_BUILD_OUTPUT_HEX OR BOARD_FLASH_RUNNER STREQUAL openocd)
$<TARGET_PROPERTY:bintools,elfconvert_flag>
${GAP_FILL}
$<TARGET_PROPERTY:bintools,elfconvert_flag_outtarget>ihex
${remove_sections_argument_list}
$<TARGET_PROPERTY:bintools,elfconvert_flag_section_remove>.comment
$<TARGET_PROPERTY:bintools,elfconvert_flag_section_remove>COMMON
$<TARGET_PROPERTY:bintools,elfconvert_flag_section_remove>.eh_frame
$<TARGET_PROPERTY:bintools,elfconvert_flag_infile>${KERNEL_ELF_NAME}
$<TARGET_PROPERTY:bintools,elfconvert_flag_outfile>${KERNEL_HEX_NAME}
$<TARGET_PROPERTY:bintools,elfconvert_flag_final>
@@ -1427,7 +1172,9 @@ if(CONFIG_BUILD_OUTPUT_BIN)
$<TARGET_PROPERTY:bintools,elfconvert_flag>
${GAP_FILL}
$<TARGET_PROPERTY:bintools,elfconvert_flag_outtarget>binary
${remove_sections_argument_list}
$<TARGET_PROPERTY:bintools,elfconvert_flag_section_remove>.comment
$<TARGET_PROPERTY:bintools,elfconvert_flag_section_remove>COMMON
$<TARGET_PROPERTY:bintools,elfconvert_flag_section_remove>.eh_frame
$<TARGET_PROPERTY:bintools,elfconvert_flag_infile>${KERNEL_ELF_NAME}
$<TARGET_PROPERTY:bintools,elfconvert_flag_outfile>${KERNEL_BIN_NAME}
$<TARGET_PROPERTY:bintools,elfconvert_flag_final>
@@ -1440,21 +1187,6 @@ if(CONFIG_BUILD_OUTPUT_BIN)
endif()
endif()
if(CONFIG_BUILD_OUTPUT_BIN AND CONFIG_BUILD_OUTPUT_UF2)
list(APPEND
post_build_commands
COMMAND ${PYTHON_EXECUTABLE} ${ZEPHYR_BASE}/scripts/uf2conv.py
-c
-f ${CONFIG_BUILD_OUTPUT_UF2_FAMILY_ID}
-b ${CONFIG_FLASH_LOAD_OFFSET}
-o ${KERNEL_UF2_NAME}
${KERNEL_BIN_NAME}
)
list(APPEND
post_build_byproducts
${KERNEL_UF2_NAME}
)
endif()
# Cleanup intermediate files
if(CONFIG_CLEANUP_INTERMEDIATE_FILES)
@@ -1519,8 +1251,8 @@ if(CONFIG_OUTPUT_STAT)
COMMAND $<TARGET_PROPERTY:bintools,readelf_command>
$<TARGET_PROPERTY:bintools,readelf_flag>
$<TARGET_PROPERTY:bintools,readelf_flag_headers>
$<TARGET_PROPERTY:bintools,readelf_flag_infile>${KERNEL_ELF_NAME}
$<TARGET_PROPERTY:bintools,readelf_flag_outfile>${KERNEL_STAT_NAME}
$<TARGET_PROPERTY:bintools,readelf_flag_infile> ${KERNEL_ELF_NAME}
$<TARGET_PROPERTY:bintools,readelf_flag_outfile> ${KERNEL_STAT_NAME}
$<TARGET_PROPERTY:bintools,readelf_flag_final>
)
list(APPEND
@@ -1582,24 +1314,6 @@ list(APPEND
${extra_post_build_byproducts}
)
if(CONFIG_LOG_DICTIONARY_SUPPORT)
set(LOG_DICT_DB_NAME ${PROJECT_BINARY_DIR}/log_dictionary.json)
list(APPEND
post_build_commands
COMMAND
${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/logging/dictionary/database_gen.py
${KERNEL_ELF_NAME}
${LOG_DICT_DB_NAME}
--build ${BUILD_VERSION}
)
list(APPEND
post_build_byproducts
${LOG_DICT_DB_NAME}
)
endif()
# Add post_build_commands to post-process the final .elf file produced by
# either the ZEPHYR_PREBUILT_EXECUTABLE or the KERNEL_ELF executable
# targets above.
@@ -1691,17 +1405,13 @@ if((CMAKE_BUILD_TYPE IN_LIST build_types) AND (NOT NO_BUILD_TYPE_WARNING))
endif()
endif()
# @Intent: Set compiler specific flags for standard C/C++ includes
# @Intent: Set compiler specific flags for standard C includes
# Done at the very end, so any other system includes which may
# be added by Zephyr components were first in list.
# Note, the compile flags are moved, but the system include is still present here.
zephyr_compile_options($<TARGET_PROPERTY:compiler,nostdinc>)
target_include_directories(zephyr_interface SYSTEM INTERFACE $<TARGET_PROPERTY:compiler,nostdinc_include>)
if(NOT CONFIG_LIB_CPLUSPLUS)
zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:$<TARGET_PROPERTY:compiler-cpp,nostdincxx>>)
endif()
# Finally export all build flags from Zephyr
add_subdirectory_ifdef(
CONFIG_MAKEFILE_EXPORTS

View File

@@ -13,19 +13,20 @@
# Do not use wildcard on all source yet
# * @galak @nashif
/.known-issues/ @nashif
/.github/ @nashif
/.github/workflows/ @galak @nashif
/.buildkite/ @galak
/MAINTAINERS.yml @ioannisg @MaureenHelm
/arch/arc/ @abrodkin @ruuddw @evgeniy-paltsev
/arch/arc/ @abrodkin @ruuddw
/arch/arm/ @MaureenHelm @galak @ioannisg
/arch/arm/core/aarch32/cortex_m/cmse/ @ioannisg
/arch/arm/core/aarch64/ @carlocaione
/arch/arm/include/aarch32/cortex_m/cmse.h @ioannisg
/arch/arm/include/aarch64/ @carlocaione
/arch/arm/core/aarch32/cortex_a_r/ @MaureenHelm @galak @ioannisg @bbolen @stephanosio
/arch/arm64/ @carlocaione
/arch/arm64/core/cortex_r/ @povergoing
/arch/common/ @ioannisg @andyross
/soc/arc/snps_*/ @abrodkin @ruuddw @evgeniy-paltsev
/soc/arc/snps_*/ @abrodkin @ruuddw
/soc/nios2/ @nashif
/soc/arm/ @MaureenHelm @galak @ioannisg
/soc/arm/arm/mps2/ @fvincenzo
@@ -39,10 +40,11 @@
/soc/arm/cypress/ @nandojve
/soc/arm/bcm*/ @sbranden
/soc/arm/infineon_xmc/ @parthitce
/soc/arm/nxp*/ @mmahadevan108 @dleach02
/soc/arm/nxp*/ @MaureenHelm
/soc/arm/nordic_nrf/ @ioannisg
/soc/arm/nuvoton_npcx/ @MulinChao @WealianLiao @ChiHuaL
/soc/arm/nuvoton_numicro/ @ssekar15
/soc/arm/nuvoton/ @ssekar15
/soc/arm/nuvoton_npcx/ @MulinChao
/soc/arm/qemu_cortex_a53/ @carlocaione
/soc/arm/quicklogic_eos_s3/ @kowalewskijan @kgugala
/soc/arm/silabs_exx32/efm32pg1b/ @rdmeneze
/soc/arm/silabs_exx32/efr32mg21/ @l-alfred
@@ -53,29 +55,20 @@
/soc/arm/ti_simplelink/cc32xx/ @vanti
/soc/arm/ti_simplelink/msp432p4xx/ @Mani-Sadhasivam
/soc/arm/xilinx_zynqmp/ @stephanosio
/soc/arm/renesas_rcar/ @julien-massot
/soc/xtensa/intel_s1000/ @sathishkuttan @dcpleung
/soc/arm64/ @carlocaione
/soc/arm64/qemu_cortex_a53/ @carlocaione
/soc/arm64/bcm_vk/ @abhishek-brcm
/soc/arm64/nxp_layerscape/ @JiafeiPan
/soc/arm64/xenvm/ @lorc
/soc/arm64/arm/ @povergoing
/soc/arm64/arm/fvp_aemv8a/ @carlocaione
/arch/x86/ @jhedberg @nashif @jenmwms @aasthagr
/arch/nios2/ @nashif
/arch/posix/ @aescolar @daor-oti
/arch/riscv/ @kgugala @pgielda
/soc/posix/ @aescolar @daor-oti
/soc/riscv/ @kgugala @pgielda
/soc/riscv/openisa*/ @dleach02
/soc/riscv/riscv-privilege/andes_v5/ @cwshu @Teng-Shih-Wei
/soc/riscv/openisa*/ @MaureenHelm
/soc/x86/ @dcpleung @nashif @jenmwms @aasthagr
/arch/xtensa/ @dcpleung @andyross @nashif
/soc/xtensa/ @dcpleung @andyross @nashif
/arch/sparc/ @martin-aberg
/soc/sparc/ @martin-aberg
/boards/arc/ @abrodkin @ruuddw @evgeniy-paltsev
/boards/arc/ @abrodkin @ruuddw
/boards/arm/ @MaureenHelm @galak
/boards/arm/96b_argonkey/ @avisconti
/boards/arm/96b_avenger96/ @Mani-Sadhasivam
@@ -86,8 +79,6 @@
/boards/arm/96b_stm32_sensor_mez/ @Mani-Sadhasivam
/boards/arm/96b_wistrio/ @Mani-Sadhasivam
/boards/arm/arduino_due/ @ioannisg
/boards/arm/blackpill_f401ce/ @coderkalyan
/boards/arm/blackpill_f411ce/ @coderkalyan
/boards/arm/cc1352r1_launchxl/ @bwitherspoon
/boards/arm/cc26x2r1_launchxl/ @bwitherspoon
/boards/arm/cc3220sf_launchxl/ @vanti
@@ -95,31 +86,29 @@
/boards/arm/disco_l475_iot1/ @erwango
/boards/arm/efm32pg_stk3401a/ @rdmeneze
/boards/arm/faze/ @mbittan @simonguinot
/boards/arm/frdm*/ @mmahadevan108 @dleach02
/boards/arm/frdm*/doc/ @dleach02 @MeganHansen
/boards/arm/frdm*/ @MaureenHelm
/boards/arm/frdm*/doc/ @MaureenHelm @MeganHansen
/boards/arm/google_*/ @jackrosenthal
/boards/arm/hexiwear*/ @mmahadevan108 @dleach02
/boards/arm/hexiwear*/doc/ @dleach02 @MeganHansen
/boards/arm/ip_k66f/ @parthitce @lmajewski
/boards/arm/legend/ @mbittan @simonguinot
/boards/arm/lpcxpresso*/ @mmahadevan108 @dleach02
/boards/arm/lpcxpresso*/doc/ @dleach02 @MeganHansen
/boards/arm/hexiwear*/ @MaureenHelm
/boards/arm/hexiwear*/doc/ @MaureenHelm @MeganHansen
/boards/arm/ip_k66f/ @parthitce
/boards/arm/lpcxpresso*/ @MaureenHelm
/boards/arm/lpcxpresso*/doc/ @MaureenHelm @MeganHansen
/boards/arm/mimx8mm_evk/ @Mani-Sadhasivam
/boards/arm/mimxrt*/ @mmahadevan108 @dleach02
/boards/arm/mimxrt*/doc/ @dleach02 @MeganHansen
/boards/arm/mimxrt*/ @MaureenHelm
/boards/arm/mimxrt*/doc/ @MaureenHelm @MeganHansen
/boards/arm/mps2_an385/ @fvincenzo
/boards/arm/msp_exp432p401r_launchxl/ @Mani-Sadhasivam
/boards/arm/npcx7m6fb_evb/ @MulinChao @WealianLiao @ChiHuaL
/boards/arm/npcx7m6fb_evb/ @MulinChao
/boards/arm/nrf*/ @carlescufi @lemrey @ioannisg
/boards/arm/nucleo*/ @erwango @ABOSTM @FRASTM
/boards/arm/nucleo_f401re/ @idlethread
/boards/arm/nuvoton_pfm_m487/ @ssekar15
/boards/arm/qemu_cortex_a53/ @carlocaione
/boards/arm/qemu_cortex_r*/ @stephanosio
/boards/arm/qemu_cortex_m*/ @ioannisg
/boards/arm/quick_feather/ @kowalewskijan @kgugala
/boards/arm/rak4631_nrf52840/ @gpaquet85
/boards/arm/rak5010_nrf52840/ @gpaquet85
/boards/arm/ronoth_lodev/ @NorthernDean
/boards/arm/xmc45_relax_kit/ @parthitce
/boards/arm/sam4e_xpro/ @nandojve
/boards/arm/sam4l_ek/ @nandojve
@@ -134,36 +123,24 @@
/boards/arm/stm32*_disco/ @erwango @ABOSTM @FRASTM
/boards/arm/stm32f3_disco/ @ydamigos
/boards/arm/stm32*_eval/ @erwango @ABOSTM @FRASTM
/boards/arm/rcar_h3ulcb/ @julien-massot
/boards/arm/ubx_bmd345eval_nrf52840/ @Navin-Sankar @brec-u-blox
/boards/common/ @mbolivar-nordic
/boards/deprecated.cmake @tejlmand
/boards/nios2/ @nashif
/boards/nios2/altera_max10/ @nashif
/boards/arm/stm32_min_dev/ @sidcha
/boards/arm/stm32_min_dev/ @cbsiddharth
/boards/posix/ @aescolar @daor-oti
/boards/posix/nrf52_bsim/ @aescolar @wopu-ot
/boards/riscv/ @kgugala @pgielda
/boards/riscv/rv32m1_vega/ @dleach02
/boards/riscv/beaglev_starlight_jh7100/ @rajnesh-kanwal
/boards/riscv/adp_xc7k_ae350/ @cwshu @Teng-Shih-Wei
/boards/riscv/rv32m1_vega/ @MaureenHelm
/boards/shields/ @erwango
/boards/shields/atmel_rf2xx/ @nandojve
/boards/shields/esp_8266/ @nandojve
/boards/shields/inventek_eswifi/ @nandojve
/boards/x86/ @dcpleung @nashif @jenmwms @aasthagr
/boards/x86/acrn/ @enjiamai
/boards/xtensa/ @nashif @dcpleung
/boards/xtensa/intel_s1000_crb/ @sathishkuttan @dcpleung
/boards/xtensa/odroid_go/ @ydamigos
/boards/xtensa/nxp_adsp_imx8/ @iuliana-prodan @dbaluta
/boards/sparc/ @martin-aberg
/boards/arm64/qemu_cortex_a53/ @carlocaione
/boards/arm64/bcm958402m2_a72/ @abhishek-brcm
/boards/arm64/nxp_ls1046ardb/ @JiafeiPan
/boards/arm64/xenvm/ @lorc
/boards/arm64/fvp_baser_aemv8r/ @povergoing
/boards/arm64/fvp_base_revc_2xaemv8a/ @carlocaione
# All cmake related files
/cmake/ @tejlmand @nashif
/cmake/*/arcmwdt/ @abrodkin @evgeniy-paltsev @tejlmand
@@ -171,41 +148,37 @@
/doc/ @dbkinder
/doc/guides/coccinelle.rst @himanshujha199640 @JuliaLawall
/doc/CMakeLists.txt @carlescufi
/doc/_scripts/ @carlescufi
/doc/scripts/ @carlescufi
/doc/guides/bluetooth/ @joerchan @jhedberg @Vudentz
/doc/guides/dts/ @galak @mbolivar-nordic
/doc/reference/bluetooth/ @joerchan @jhedberg @Vudentz
/doc/reference/devicetree/ @galak @mbolivar-nordic
/doc/reference/resource_management/ @pabigot
/doc/reference/networking/can* @alexanderwachter
/doc/security/ @ceolin @d3zd3z
/drivers/debug/ @nashif
/drivers/*/*sam4l* @nandojve
/drivers/*/*cc13xx_cc26xx* @bwitherspoon
/drivers/*/*litex* @mateusz-holenko @kgugala @pgielda
/drivers/*/*mcux* @mmahadevan108 @dleach02
/drivers/*/*mcux* @MaureenHelm
/drivers/*/*stm32* @erwango @ABOSTM @FRASTM
/drivers/*/*native_posix* @aescolar @daor-oti
/drivers/*/*lpc11u6x* @mbittan @simonguinot
/drivers/*/*npcx* @MulinChao @WealianLiao @ChiHuaL
/drivers/*/*andes* @cwshu @Teng-Shih-Wei
/drivers/*/*npcx* @MulinChao
/drivers/adc/ @anangl
/drivers/adc/adc_stm32.c @cybertale
/drivers/audio/*nrfx* @anangl
/drivers/bbram/* @yperess @sjg20 @jackrosenthal
/drivers/bluetooth/ @joerchan @jhedberg @Vudentz
/drivers/cache/ @carlocaione
/drivers/syscon/ @carlocaione @yperess
/drivers/can/ @alexanderwachter
/drivers/can/*mcp2515* @karstenkoenig
/drivers/can/*rcar* @julien-massot
/drivers/clock_control/*nrf* @nordic-krch
/drivers/clock_control/*esp32* @extremegtx
/drivers/clock_control/*rcar* @julien-massot
/drivers/counter/ @nordic-krch
/drivers/console/ipm_console.c @finikorg
/drivers/console/semihost_console.c @luozhongyao
/drivers/counter/counter_cmos.c @dcpleung
/drivers/counter/maxim_ds3231.c @pabigot
/drivers/crypto/*nrf_ecb* @maciekfabia @anangl
/drivers/console/*mux* @jukkar
/drivers/display/ @vanwinkeljan
/drivers/display/display_framebuf.c @dcpleung
/drivers/dac/ @martinjaeger
@@ -218,29 +191,23 @@
/drivers/edac/ @finikorg
/drivers/eeprom/ @henrikbrixandersen
/drivers/eeprom/eeprom_stm32.c @KwonTae-young
/drivers/entropy/*b91* @yurvyn
/drivers/entropy/*rv32m1* @dleach02
/drivers/entropy/*rv32m1* @MaureenHelm
/drivers/entropy/*gecko* @chrta
/drivers/entropy/*litex* @mateusz-holenko @kgugala @pgielda
/drivers/espi/ @albertofloyd @franciscomunoz @scottwcpg
/drivers/ethernet/ @tbursztyka @pfalcon
/drivers/ethernet/ @jukkar @tbursztyka @pfalcon
/drivers/ethernet/*stm32* @Nukersson @lochej
/drivers/ethernet/*w5500* @parthitce
/drivers/ethernet/*xlnx_gem* @ibirnbaum
/drivers/ethernet/phy/ @rlubos @tbursztyka @arvinf
/drivers/mdio/ @rlubos @tbursztyka @arvinf
/drivers/flash/ @nashif @nvlsianpu
/drivers/flash/*b91* @yurvyn
/drivers/flash/*nrf* @nvlsianpu
/drivers/fpga/ @tgorochowik @kgugala
/drivers/gpio/ @mnkp
/drivers/gpio/*b91* @yurvyn
/drivers/flash/*spi_nor* @pabigot
/drivers/gpio/ @mnkp @pabigot
/drivers/gpio/*ht16k33* @henrikbrixandersen
/drivers/gpio/*lmp90xxx* @henrikbrixandersen
/drivers/gpio/*stm32* @erwango
/drivers/gpio/*eos_s3* @wtatarski @kowalewskijan @kgugala
/drivers/gpio/*rcar* @julien-massot
/drivers/gpio/*esp32* @glaubermaroto
/drivers/gpio/*sx1509b* @pabigot
/drivers/hwinfo/ @alexanderwachter
/drivers/i2s/i2s_ll_stm32* @avisconti
/drivers/i2c/i2c_common.c @sjg20
/drivers/i2c/i2c_emul.c @sjg20
/drivers/i2c/i2c_ite_it8xxx2.c @GTLin08
@@ -248,19 +215,12 @@
/drivers/i2c/Kconfig.i2c_emul @sjg20
/drivers/i2c/Kconfig.it8xxx2 @GTLin08
/drivers/i2c/slave/*eeprom* @henrikbrixandersen
/drivers/i2c/Kconfig.test @mbolivar-nordic
/drivers/i2c/i2c_test.c @mbolivar-nordic
/drivers/i2c/*rcar* @aaillet
/drivers/i2s/*litex* @mateusz-holenko @kgugala @pgielda
/drivers/i2s/i2s_ll_stm32* @avisconti
/drivers/i2s/*nrfx* @anangl
/drivers/ieee802154/ @rlubos @tbursztyka
/drivers/ieee802154/*b91* @yurvyn
/drivers/ieee802154/ieee802154_rf2xx* @tbursztyka @nandojve
/drivers/ieee802154/ @jukkar @tbursztyka
/drivers/ieee802154/ieee802154_rf2xx* @jukkar @tbursztyka @nandojve
/drivers/ieee802154/ieee802154_cc13xx* @bwitherspoon @cfriedt
/drivers/interrupt_controller/ @dcpleung @nashif
/drivers/interrupt_controller/intc_gic.c @stephanosio
/drivers/interrupt_controller/*esp32* @glaubermaroto
/drivers/ipm/ipm_mhu* @karl-zh
/drivers/ipm/Kconfig.nrfx @masz-nordic @ioannisg
/drivers/ipm/Kconfig.nrfx_ipc_channel @masz-nordic @ioannisg
@@ -269,38 +229,27 @@
/drivers/ipm/ipm_nrfx_ipc.c @masz-nordic @ioannisg
/drivers/ipm/ipm_nrfx_ipc.h @masz-nordic @ioannisg
/drivers/ipm/ipm_stm32_ipcc.c @arnopo
/drivers/ipm/ipm_stm32_hsem.c @cameled
/drivers/kscan/ @VenkatKotakonda @franciscomunoz @scottwcpg
/drivers/kscan/*xec* @franciscomunoz @scottwcpg
/drivers/kscan/*ft5336* @MaureenHelm
/drivers/kscan/*ht16k33* @henrikbrixandersen
/drivers/kscan/ @albertofloyd @franciscomunoz @scottwcpg
/drivers/led/ @Mani-Sadhasivam
/drivers/led_strip/ @mbolivar-nordic
/drivers/lora/ @Mani-Sadhasivam
/drivers/memc/ @gmarull
/drivers/misc/ @tejlmand
/drivers/misc/ft8xx/ @hubertmis
/drivers/modem/hl7800.c @LairdCP/zephyr
/drivers/modem/Kconfig.hl7800 @LairdCP/zephyr
/drivers/modem/*gsm* @jukkar
/drivers/modem/hl7800.c @rerickson1
/drivers/modem/Kconfig.hl7800 @rerickson1
/drivers/pcie/ @dcpleung @nashif @jhedberg
/drivers/peci/ @albertofloyd @franciscomunoz @scottwcpg
/drivers/pinmux/*b91* @yurvyn
/drivers/pinmux/*hsdk* @iriszzw
/drivers/pinmux/*it8xxx2* @ite
/drivers/pinmux/*esp32* @glaubermaroto
/drivers/pm_cpu_ops/ @carlocaione
/drivers/ps2/ @franciscomunoz @scottwcpg
/drivers/ps2/*xec* @franciscomunoz @scottwcpg
/drivers/ps2/*npcx* @MulinChao @WealianLiao @ChiHuaL
/drivers/pwm/*b91* @yurvyn
/drivers/psci/ @carlocaione
/drivers/ps2/ @albertofloyd @franciscomunoz @scottwcpg
/drivers/pwm/*rv32m1* @henrikbrixandersen
/drivers/pwm/*sam0* @nzmichaelh
/drivers/pwm/*stm32* @gmarull
/drivers/pwm/*xlnx* @henrikbrixandersen
/drivers/pwm/pwm_capture.c @henrikbrixandersen
/drivers/pwm/pwm_shell.c @henrikbrixandersen
/drivers/pwm/*gecko* @sun681
/drivers/pwm/*it8xxx2* @RuibinChang
/drivers/regulator/ @pabigot
/drivers/sensor/ @MaureenHelm
/drivers/sensor/ams_iAQcore/ @alexanderwachter
/drivers/sensor/ens210/ @alexanderwachter
@@ -310,7 +259,6 @@
/drivers/sensor/lsm*/ @avisconti
/drivers/sensor/mpr/ @sven-hm
/drivers/sensor/st*/ @avisconti
/drivers/serial/*b91* @yurvyn
/drivers/serial/uart_altera_jtag_hal.c @nashif
/drivers/serial/*ns16550* @dcpleung @nashif @jenmwms @aasthagr
/drivers/serial/*nrfx* @Mierunski @anangl
@@ -323,25 +271,13 @@
/drivers/serial/uart_xlnx_ps.c @wjliang
/drivers/serial/uart_xlnx_uartlite.c @henrikbrixandersen
/drivers/serial/*xmc4xxx* @parthitce
/drivers/serial/*numicro* @ssekar15
/drivers/serial/*nuvoton* @ssekar15
/drivers/serial/*apbuart* @martin-aberg
/drivers/serial/*rcar* @aaillet
/drivers/serial/Kconfig.test @str4t0m
/drivers/serial/serial_test.c @str4t0m
/drivers/serial/*esp32c3* @uLipe
/drivers/serial/*esp32s2* @glaubermaroto
/drivers/disk/ @jfischer-no
/drivers/disk/sdmmc_sdhc.h @JunYangNXP
/drivers/disk/sdmmc_spi.c @JunYangNXP
/drivers/disk/usdhc.c @JunYangNXP
/drivers/disk/sdmmc_stm32.c @anthonybrandon
/drivers/net/ @rlubos @tbursztyka
/drivers/ptp_clock/ @tbursztyka
/drivers/net/ @jukkar @tbursztyka
/drivers/ptp_clock/ @jukkar
/drivers/spi/ @tbursztyka
/drivers/spi/*b91* @yurvyn
/drivers/spi/spi_rv32m1_lpspi* @karstenkoenig
/drivers/timer/apic_timer.c @dcpleung @nashif
/drivers/timer/apic_tsc.c @andyross
/drivers/timer/arm_arch_timer.c @carlocaione
/drivers/timer/cortex_m_systick.c @ioannisg
/drivers/timer/altera_avalon_timer_hal.c @nashif
@@ -352,31 +288,23 @@
/drivers/timer/cavs_timer.c @dcpleung
/drivers/timer/stm32_lptim_timer.c @FRASTM
/drivers/timer/leon_gptimer.c @martin-aberg
/drivers/timer/rcar_cmt_timer.c @julien-massot
/drivers/timer/esp32c3_sys_timer.c @uLipe
/drivers/usb/ @jfischer-no
/drivers/usb/ @jfischer-no @finikorg
/drivers/usb/device/usb_dc_stm32.c @ydamigos @loicpoulain
/drivers/video/ @loicpoulain
/drivers/i2c/*b91* @yurvyn
/drivers/i2c/i2c_ll_stm32* @ydamigos
/drivers/i2c/i2c_rv32m1_lpi2c* @henrikbrixandersen
/drivers/i2c/*sam0* @Sizurka
/drivers/i2c/i2c_dw* @dcpleung
/drivers/i2c/*tca9546a* @kurddt
/drivers/*/*xec* @franciscomunoz @albertofloyd @scottwcpg
/drivers/watchdog/*gecko* @oanerer
/drivers/watchdog/*sifive* @katsuster
/drivers/watchdog/wdt_handlers.c @dcpleung @nashif
/drivers/watchdog/*cc32xx* @pavlohamov
/drivers/watchdog/wdt_ite_it8xxx2.c @RuibinChang
/drivers/watchdog/Kconfig.it8xxx2 @RuibinChang
/drivers/wifi/ @rlubos @tbursztyka @pfalcon
/drivers/wifi/esp_at/ @mniestroj
/drivers/wifi/ @jukkar @tbursztyka @pfalcon
/drivers/wifi/esp/ @mniestroj
/drivers/wifi/eswifi/ @loicpoulain @nandojve
/drivers/wifi/winc1500/ @kludentwo
/drivers/virtualization/ @tbursztyka
/dts/arc/ @abrodkin @ruuddw @iriszzw @evgeniy-paltsev
/dts/arm/acsip/ @NorthernDean
/dts/arc/ @abrodkin @ruuddw @iriszzw
/dts/arm/atmel/sam4e* @nandojve
/dts/arm/atmel/sam4l* @nandojve
/dts/arm/atmel/samr21.dtsi @benpicco
@@ -385,72 +313,58 @@
/dts/arm/atmel/samv71* @nandojve
/dts/arm/atmel/ @galak
/dts/arm/broadcom/ @sbranden
/dts/arm/cypress/ @nandojve
/dts/arm/infineon/ @parthitce
/dts/arm64/ @carlocaione
/dts/arm64/armv8-r.dtsi @povergoing
/dts/arm64/nxp/ @JiafeiPan
/dts/arm/qemu-virt/ @carlocaione
/dts/arm/quicklogic/ @wtatarski @kowalewskijan @kgugala
/dts/arm/seeed/ @str4t0m
/dts/arm/st/ @erwango
/dts/arm/ti/cc13?2* @bwitherspoon
/dts/arm/ti/cc26?2* @bwitherspoon
/dts/arm/ti/cc3235* @vanti
/dts/arm/nordic/ @ioannisg @carlescufi
/dts/arm/nuvoton/ @ssekar15 @MulinChao @WealianLiao @ChiHuaL
/dts/arm/nxp/ @mmahadevan108 @dleach02
/dts/arm/nuvoton/ @ssekar15
/dts/arm/nuvoton/npcx/ @MulinChao
/dts/arm/nxp/ @MaureenHelm
/dts/arm/microchip/ @franciscomunoz @albertofloyd @scottwcpg
/dts/arm/silabs/efm32_pg_1b.dtsi @rdmeneze
/dts/arm/silabs/efm32gg11b* @oanerer
/dts/arm/silabs/efm32_jg_pg* @chrta
/dts/arm/silabs/efr32bg13p* @mnkp
/dts/arm/silabs/efr32xg13p* @mnkp
/dts/arm/silabs/efm32jg12b* @chrta
/dts/arm/silabs/efm32pg12b* @chrta
/dts/arm/silabs/efm32pg1b* @rdmeneze
/dts/arm/silabs/efr32mg21* @l-alfred
/dts/arm/silabs/efr32fg13* @yonsch
/dts/riscv/ @kgugala @pgielda
/dts/riscv/it8xxx2.dtsi @ite
/dts/riscv/microsemi-miv.dtsi @galak
/dts/riscv/rv32m1* @dleach02
/dts/riscv/rv32m1* @MaureenHelm
/dts/riscv/riscv32-litex-vexriscv.dtsi @mateusz-holenko @kgugala @pgielda
/dts/riscv/starfive/ @rajnesh-kanwal
/dts/riscv/andes_v5* @cwshu @Teng-Shih-Wei
/dts/arm/armv*m.dtsi @galak @ioannisg
/dts/arm/armv7-r.dtsi @bbolen @stephanosio
/dts/arm/armv8-a.dtsi @carlocaione
/dts/arm/xilinx/ @bbolen @stephanosio
/dts/arm/renesas/ @julien-massot
/dts/x86/ @jhedberg
/dts/xtensa/xtensa.dtsi @ydamigos
/dts/xtensa/intel/ @dcpleung
/dts/xtensa/espressif/ @glaubermaroto
/dts/xtensa/nxp/ @iuliana-prodan @dbaluta
/dts/sparc/ @martin-aberg
/dts/bindings/ @galak
/dts/bindings/can/ @alexanderwachter
/dts/bindings/i2c/zephyr*i2c-emul.yaml @sjg20
/dts/bindings/adc/st*stm32-adc.yaml @cybertale
/dts/bindings/modem/*hl7800.yaml @LairdCP/zephyr
/dts/bindings/modem/*hl7800.yaml @rerickson1
/dts/bindings/serial/ns16550.yaml @dcpleung @nashif
/dts/bindings/wifi/*esp-at.yaml @mniestroj
/dts/bindings/*/*npcx* @MulinChao @WealianLiao @ChiHuaL
/dts/bindings/*/*psoc6* @nandojve
/dts/bindings/wifi/*esp.yaml @mniestroj
/dts/bindings/*/*npcx* @MulinChao
/dts/bindings/*/nordic* @anangl
/dts/bindings/*/nxp* @mmahadevan108 @dleach02
/dts/bindings/*/openisa* @dleach02
/dts/bindings/*/nxp* @MaureenHelm
/dts/bindings/*/openisa* @MaureenHelm
/dts/bindings/*/st* @erwango
/dts/bindings/sensor/ams* @alexanderwachter
/dts/bindings/*/sifive* @mateusz-holenko @kgugala @pgielda
/dts/bindings/*/litex* @mateusz-holenko @kgugala @pgielda
/dts/bindings/*/vexriscv* @mateusz-holenko @kgugala @pgielda
/dts/bindings/*/andes* @cwshu @Teng-Shih-Wei
/dts/bindings/pm_cpu_ops/* @carlocaione
/dts/bindings/ethernet/*gem.yaml @ibirnbaum
/dts/bindings/psci/* @carlocaione
/dts/posix/ @aescolar @vanwinkeljan @daor-oti
/dts/bindings/sensor/*bme680* @BoschSensortec
/dts/bindings/sensor/st* @avisconti
/dts/common/ @galak
/include/ @nashif @carlescufi @galak @MaureenHelm
/include/drivers/*/*litex* @mateusz-holenko @kgugala @pgielda
/include/drivers/adc.h @anangl
@@ -465,7 +379,7 @@
/include/drivers/led/ht16k33.h @henrikbrixandersen
/include/drivers/interrupt_controller/ @dcpleung @nashif
/include/drivers/interrupt_controller/gic.h @stephanosio
/include/drivers/modem/hl7800.h @LairdCP/zephyr
/include/drivers/modem/hl7800.h @rerickson1
/include/drivers/pcie/ @dcpleung
/include/drivers/hwinfo.h @alexanderwachter
/include/drivers/led.h @Mani-Sadhasivam
@@ -474,16 +388,15 @@
/include/drivers/spi.h @tbursztyka
/include/drivers/lora.h @Mani-Sadhasivam
/include/drivers/peci.h @albertofloyd @franciscomunoz @scottwcpg
/include/drivers/pm_cpu_ops.h @carlocaione
/include/drivers/pm_cpu_ops/ @carlocaione
/include/drivers/psci.h @carlocaione
/include/app_memory/ @dcpleung
/include/arch/arc/ @abrodkin @ruuddw @evgeniy-paltsev
/include/arch/arc/arch.h @abrodkin @ruuddw @evgeniy-paltsev
/include/arch/arc/v2/irq.h @abrodkin @ruuddw @evgeniy-paltsev
/include/arch/arc/ @abrodkin @ruuddw
/include/arch/arc/arch.h @abrodkin @ruuddw
/include/arch/arc/v2/irq.h @abrodkin @ruuddw
/include/arch/arm/aarch32/ @MaureenHelm @galak @ioannisg
/include/arch/arm/aarch32/cortex_a_r/ @stephanosio
/include/arch/arm64/ @carlocaione
/include/arch/arm64/cortex_r/ @povergoing
/include/arch/arm/aarch64/ @carlocaione
/include/arch/arm/arm-smccc.h @carlocaione
/include/arch/arm/aarch32/irq.h @carlocaione
/include/arch/nios2/ @nashif
/include/arch/nios2/arch.h @nashif
@@ -495,7 +408,6 @@
/include/arch/sparc/ @martin-aberg
/include/sys/atomic.h @andyross
/include/bluetooth/ @joerchan @jhedberg @Vudentz
/include/bluetooth/audio/ @joerchan @jhedberg @Vudentz @Thalley @asbjornsabo
/include/cache.h @carlocaione @andyross
/include/canbus/ @alexanderwachter
/include/tracing/ @nashif
@@ -507,12 +419,11 @@
/include/display/ @vanwinkeljan
/include/dt-bindings/clock/kinetis_mcg.h @henrikbrixandersen
/include/dt-bindings/clock/kinetis_scg.h @henrikbrixandersen
/include/dt-bindings/ethernet/xlnx_gem.h @ibirnbaum
/include/dt-bindings/dma/stm32_dma.h @cybertale
/include/dt-bindings/pcie/ @dcpleung
/include/dt-bindings/pwm/*it8xxx2* @RuibinChang
/include/dt-bindings/usb/usb.h @galak
/include/drivers/emul.h @sjg20
/include/fs/ @nashif @nvlsianpu @de-nordic
/include/dt-bindings/usb/usb.h @galak @finikorg
/include/emul.h @sjg20
/include/fs/ @nashif @nvlsianpu @de-nordic @pabigot
/include/init.h @nashif @andyross
/include/irq.h @dcpleung @nashif @andyross
/include/irq_offload.h @dcpleung @nashif @andyross
@@ -522,15 +433,15 @@
/include/linker/ @dcpleung @nashif @andyross
/include/logging/ @nordic-krch
/include/lorawan/lorawan.h @Mani-Sadhasivam
/include/mgmt/osdp.h @sidcha
/include/net/ @rlubos @tbursztyka @pfalcon
/include/net/buf.h @jhedberg @tbursztyka @pfalcon @rlubos
/include/net/coap*.h @rlubos
/include/net/lwm2m*.h @rlubos
/include/net/mqtt.h @rlubos
/include/mgmt/osdp.h @cbsiddharth
/include/net/ @jukkar @tbursztyka @pfalcon
/include/net/buf.h @jukkar @jhedberg @tbursztyka @pfalcon
/include/net/coap*.h @jukkar @rlubos
/include/net/lwm2m*.h @jukkar @rlubos
/include/net/mqtt.h @jukkar @rlubos
/include/posix/ @pfalcon
/include/pm/pm.h @nashif @ceolin
/include/drivers/ptp_clock.h @tbursztyka
/include/power/power.h @pabigot @nashif @ceolin
/include/ptp_clock.h @jukkar
/include/shared_irq.h @dcpleung @nashif @andyross
/include/shell/ @jakub-uC @nordic-krch
/include/sw_isr_table.h @dcpleung @nashif @andyross
@@ -541,19 +452,16 @@
/include/toolchain/ @dcpleung @nashif @andyross
/include/zephyr.h @dcpleung @nashif @andyross
/kernel/ @dcpleung @nashif @andyross
/lib/util/ @carlescufi @jakub-uC
/lib/util/fnmatch/ @carlescufi @jakub-uC
/lib/util/getopt/ @jakub-uC
/lib/fnmatch/ @carlescufi
/lib/gui/ @vanwinkeljan
/lib/open-amp/ @arnopo
/lib/os/ @dcpleung @nashif @andyross
/lib/os/cbprintf_packaged.c @npitre
/lib/posix/ @pfalcon
/subsys/portability/ @nashif
/lib/cmsis_rtos_v2/ @nashif
/lib/cmsis_rtos_v1/ @nashif
/lib/libc/ @nashif
/lib/libc/arcmwdt/ @abrodkin @ruuddw @evgeniy-paltsev
/modules/ @nashif
/modules/trusted-firmware-m/ @ioannisg @microbuilder
/modules/Kconfig.tfm @ioannisg @microbuilder
/kernel/device.c @andyross @nashif
/kernel/idle.c @andyross @nashif
/samples/ @nashif
@@ -561,22 +469,21 @@
/samples/basic/servo_motor/boards/*microbit* @jhe
/samples/bluetooth/ @jhedberg @Vudentz @joerchan
/samples/boards/intel_s1000_crb/ @sathishkuttan @dcpleung @nashif
/samples/subsys/display/ @vanwinkeljan
/samples/compression/ @Navin-Sankar
/samples/display/ @vanwinkeljan
/samples/drivers/can/ @alexanderwachter
/samples/drivers/clock_control_litex/ @mateusz-holenko @kgugala @pgielda
/samples/drivers/display/ @vanwinkeljan
/samples/drivers/eeprom/ @henrikbrixandersen
/samples/drivers/ht16k33/ @henrikbrixandersen
/samples/drivers/lora/ @Mani-Sadhasivam
/samples/subsys/lorawan/ @Mani-Sadhasivam
/samples/net/ @rlubos @tbursztyka @pfalcon
/samples/drivers/counter/maxim_ds3231/ @pabigot
/samples/lorawan/ @Mani-Sadhasivam
/samples/net/ @jukkar @tbursztyka @pfalcon
/samples/net/cloud/tagoio_http_post/ @nandojve
/samples/net/dns_resolve/ @rlubos @tbursztyka @pfalcon
/samples/net/dns_resolve/ @jukkar @tbursztyka @pfalcon
/samples/net/lwm2m_client/ @rlubos
/samples/net/mqtt_publisher/ @rlubos
/samples/net/mqtt_publisher/ @jukkar @tbursztyka
/samples/net/sockets/coap_*/ @rlubos
/samples/net/sockets/ @rlubos @tbursztyka @pfalcon
/samples/net/sockets/ @jukkar @tbursztyka @pfalcon
/samples/net/*civetweb* @Nukersson
/samples/sensor/ @MaureenHelm
/samples/shields/ @avisconti
@@ -584,18 +491,15 @@
/samples/subsys/shell/ @jakub-uC @nordic-krch
/samples/subsys/mgmt/mcumgr/smp_svr/ @aunsbjerg @nvlsianpu
/samples/subsys/mgmt/updatehub/ @nandojve @otavio
/samples/subsys/mgmt/osdp/ @sidcha
/samples/subsys/usb/ @jfischer-no
/samples/subsys/pm/ @nashif @ceolin
/samples/subsys/mgmt/osdp/ @cbsiddharth
/samples/subsys/usb/ @jfischer-no @finikorg
/samples/subsys/power/ @nashif @pabigot @ceolin
/samples/tfm_integration/ @ioannisg @microbuilder
/samples/userspace/ @dcpleung @nashif
/scripts/release/bug_bash.py @cfriedt
/scripts/coccicheck @himanshujha199640 @JuliaLawall
/scripts/coccinelle/ @himanshujha199640 @JuliaLawall
/scripts/coredump/ @dcpleung
/scripts/footprint/ @nashif
/scripts/kconfig/ @ulfalizer
/scripts/logging/dictionary/ @dcpleung
/scripts/pylib/twister/expr_parser.py @nashif
/scripts/schemas/twister/ @nashif
/scripts/gen_app_partitions.py @dcpleung @nashif
@@ -606,9 +510,9 @@
/arch/x86/gen_gdt.py @dcpleung @nashif
/arch/x86/gen_idt.py @dcpleung @nashif
/scripts/gen_kobject_list.py @dcpleung @nashif
/scripts/gen_kobject_placeholders.py @dcpleung
/scripts/gen_syscalls.py @dcpleung @nashif
/scripts/list_boards.py @mbolivar-nordic
/scripts/net/ @jukkar
/scripts/process_gperf.py @dcpleung @nashif
/scripts/gen_relocate_app.py @dcpleung
/scripts/requirements*.txt @mbolivar-nordic @galak @nashif
@@ -621,100 +525,101 @@
/scripts/west_commands/ @mbolivar-nordic
/scripts/west-commands.yml @mbolivar-nordic
/scripts/zephyr_module.py @tejlmand
/scripts/uf2conv.py @petejohanson
/scripts/user_wordsize.py @cfriedt
/scripts/valgrind.supp @aescolar @daor-oti
/share/zephyr-package/ @tejlmand
/share/zephyrunittest-package/ @tejlmand
/subsys/bluetooth/ @joerchan @jhedberg @Vudentz
/subsys/bluetooth/audio/ @joerchan @jhedberg @Vudentz @Thalley @asbjornsabo
/subsys/bluetooth/controller/ @carlescufi @cvinayak @thoh-ot @kruithofa
/subsys/bluetooth/mesh/ @jhedberg @trond-snekvik @joerchan @Vudentz
/subsys/canbus/ @alexanderwachter
/subsys/cpp/ @vanwinkeljan
/subsys/cpp/ @pabigot @vanwinkeljan
/subsys/debug/ @nashif
/subsys/debug/coredump/ @dcpleung
/subsys/debug/gdbstub/ @ceolin
/subsys/debug/gdbstub.c @ceolin
/subsys/dfu/ @nvlsianpu
/subsys/disk/ @jfischer-no
/subsys/tracing/ @nashif
/subsys/debug/asan_hacks.c @vanwinkeljan @aescolar @daor-oti
/subsys/demand_paging/ @dcpleung @nashif
/subsys/disk/disk_access_spi_sdhc.c @JunYangNXP
/subsys/disk/disk_access_sdhc.h @JunYangNXP
/subsys/disk/disk_access_usdhc.c @JunYangNXP
/subsys/disk/disk_access_stm32_sdmmc.c @anthonybrandon
/subsys/emul/ @sjg20
/subsys/fb/ @jfischer-no
/subsys/fs/ @nashif
/subsys/fs/fcb/ @nvlsianpu
/subsys/fs/fuse_fs_access.c @vanwinkeljan
/subsys/fs/littlefs_fs.c @pabigot
/subsys/fs/nvs/ @Laczen
/subsys/ipc/ @ioannisg
/subsys/logging/ @nordic-krch
/subsys/logging/log_backend_net.c @nordic-krch @rlubos
/subsys/logging/log_backend_net.c @nordic-krch @jukkar
/subsys/lorawan/ @Mani-Sadhasivam
/subsys/mgmt/ec_host_cmd/ @jettr
/subsys/mgmt/mcumgr/ @carlescufi @nvlsianpu
/subsys/mgmt/hawkbit/ @Navin-Sankar
/subsys/mgmt/mcumgr/smp_udp.c @aunsbjerg
/subsys/mgmt/updatehub/ @nandojve @otavio
/subsys/mgmt/osdp/ @sidcha
/subsys/modbus/ @jfischer-no
/subsys/net/buf.c @jhedberg @tbursztyka @pfalcon @rlubos
/subsys/net/ip/ @rlubos @tbursztyka @pfalcon
/subsys/net/lib/ @rlubos @tbursztyka @pfalcon
/subsys/net/lib/dns/ @rlubos @tbursztyka @pfalcon @cfriedt
/subsys/mgmt/osdp/ @cbsiddharth
/subsys/net/buf.c @jukkar @jhedberg @tbursztyka @pfalcon
/subsys/net/ip/ @jukkar @tbursztyka @pfalcon
/subsys/net/lib/ @jukkar @tbursztyka @pfalcon
/subsys/net/lib/dns/ @jukkar @tbursztyka @pfalcon @cfriedt
/subsys/net/lib/lwm2m/ @rlubos
/subsys/net/lib/config/ @rlubos @tbursztyka @pfalcon
/subsys/net/lib/mqtt/ @rlubos
/subsys/net/lib/config/ @jukkar @tbursztyka @pfalcon
/subsys/net/lib/mqtt/ @jukkar @tbursztyka @rlubos
/subsys/net/lib/coap/ @rlubos
/subsys/net/lib/sockets/socketpair.c @cfriedt
/subsys/net/lib/sockets/ @rlubos @tbursztyka @pfalcon
/subsys/net/lib/sockets/ @jukkar @tbursztyka @pfalcon
/subsys/net/lib/tls_credentials/ @rlubos
/subsys/net/l2/ @rlubos @tbursztyka
/subsys/net/l2/canbus/ @alexanderwachter
/subsys/net/l2/ @jukkar @tbursztyka
/subsys/net/l2/canbus/ @alexanderwachter @jukkar
/subsys/net/*/openthread/ @rlubos
/subsys/pm/ @nashif @ceolin
/subsys/power/ @nashif @pabigot @ceolin
/subsys/random/ @dleach02
/subsys/settings/ @nvlsianpu
/subsys/shell/ @jakub-uC @nordic-krch
/subsys/stats/ @nvlsianpu
/subsys/storage/ @nvlsianpu
/subsys/task_wdt/ @martinjaeger
/subsys/testsuite/ @nashif
/subsys/timing/ @nashif @dcpleung
/subsys/usb/ @jfischer-no
/subsys/usb/ @jfischer-no @finikorg
/subsys/usb/class/dfu/usb_dfu.c @nvlsianpu
/tests/ @nashif
/tests/application_development/libcxx/ @pabigot
/tests/arch/arm/ @ioannisg @stephanosio
/tests/benchmarks/cmsis_dsp/ @stephanosio
/tests/boards/native_posix/ @aescolar @daor-oti
/tests/boards/intel_s1000_crb/ @dcpleung @sathishkuttan
/tests/bluetooth/ @joerchan @jhedberg @Vudentz
/tests/bluetooth/bsim_bt/ @joerchan @jhedberg @Vudentz @aescolar @wopu-ot
/tests/bluetooth/bsim_bt/bsim_test_audio/ @joerchan @jhedberg @Vudentz @aescolar @wopu-ot @Thalley @asbjornsabo
/tests/posix/ @pfalcon
/tests/crypto/ @ceolin
/tests/crypto/mbedtls/ @nashif @ceolin
/tests/drivers/can/ @alexanderwachter
/tests/drivers/counter/ @nordic-krch
/tests/drivers/counter/maxim_ds3231_api/ @pabigot
/tests/drivers/eeprom/ @henrikbrixandersen @sjg20
/tests/drivers/flash_simulator/ @nvlsianpu
/tests/drivers/gpio/ @mnkp
/tests/drivers/gpio/ @mnkp @pabigot
/tests/drivers/hwinfo/ @alexanderwachter
/tests/drivers/spi/ @tbursztyka
/tests/drivers/uart/uart_async_api/ @Mierunski
/tests/kernel/ @dcpleung @andyross @nashif
/tests/lib/ @nashif
/tests/lib/cmsis_dsp/ @stephanosio
/tests/net/ @rlubos @tbursztyka @pfalcon
/tests/net/buf/ @jhedberg @tbursztyka @pfalcon
/tests/net/lib/ @rlubos @tbursztyka @pfalcon
/tests/net/lib/http_header_fields/ @rlubos @tbursztyka
/tests/net/lib/mqtt_packet/ @rlubos
/tests/net/ @jukkar @tbursztyka @pfalcon
/tests/net/buf/ @jukkar @jhedberg @tbursztyka @pfalcon
/tests/net/lib/ @jukkar @tbursztyka @pfalcon
/tests/net/lib/http_header_fields/ @jukkar @tbursztyka
/tests/net/lib/mqtt_packet/ @jukkar @tbursztyka
/tests/net/lib/coap/ @rlubos
/tests/net/socket/socketpair/ @cfriedt
/tests/net/socket/ @rlubos @tbursztyka @pfalcon
/tests/net/socket/ @jukkar @tbursztyka @pfalcon
/tests/subsys/debug/coredump/ @dcpleung
/tests/subsys/fs/ @nashif @nvlsianpu @de-nordic
/tests/subsys/fs/ @nashif @nvlsianpu @de-nordic @pabigot
/tests/subsys/settings/ @nvlsianpu
/tests/subsys/shell/ @jakub-uC @nordic-krch
# Get all docs reviewed

View File

@@ -14,19 +14,9 @@
# precedence over SoC defaults, so include them in that order.
#
# $ARCH and $BOARD_DIR will be glob patterns when building documentation.
# This loads custom shields defconfigs (from BOARD_ROOT)
osource "$(KCONFIG_BINARY_DIR)/Kconfig.shield.defconfig"
# This loads Zephyr base shield defconfigs
source "boards/shields/*/Kconfig.defconfig"
source "$(KCONFIG_BINARY_DIR)/Kconfig.shield.defconfig"
source "$(BOARD_DIR)/Kconfig.defconfig"
# This loads custom SoC root defconfigs
osource "$(KCONFIG_BINARY_DIR)/Kconfig.soc.defconfig"
# This loads Zephyr base SoC root defconfigs
osource "soc/$(ARCH)/*/Kconfig.defconfig"
# This loads the toolchain defconfigs
osource "$(TOOLCHAIN_KCONFIG_DIR)/Kconfig.defconfig"
source "$(KCONFIG_BINARY_DIR)/Kconfig.soc.defconfig"
menu "Modules"
@@ -72,6 +62,15 @@ config LINKER_ORPHAN_SECTION_ERROR
endchoice
config CODE_DATA_RELOCATION
bool "Relocate code/data sections"
depends on ARM
help
When selected this will relocate .text, data and .bss sections from
the specified files and places it in the required memory region. The
files should be specified in the CMakeList.txt file with
a cmake API zephyr_code_relocate().
config HAS_FLASH_LOAD_OFFSET
bool
help
@@ -134,36 +133,8 @@ config ROM_START_OFFSET
alignment requirements on most ARM targets, although some targets
may require smaller or larger values.
config LD_LINKER_SCRIPT_SUPPORTED
bool
default y
choice LINKER_SCRIPT
prompt "Linker script"
default LD_LINKER_TEMPLATE if LD_LINKER_SCRIPT_SUPPORTED
config LD_LINKER_TEMPLATE
bool "LD template"
depends on LD_LINKER_SCRIPT_SUPPORTED
help
Select this option to use the LD linker script templates.
The templates are pre-processed by the C pre-processor to create the
final LD linker script.
config CMAKE_LINKER_GENERATOR
bool "CMake generator"
depends on ARM
help
Select this option to use the Zephyr CMake linker script generator.
The linker configuration is written in CMake and the final linker
script will be generated by the toolchain specific linker generator.
For LD based linkers, this will be the ld generator, for ARMClang /
armlink based linkers it will be the scatter generator.
endchoice
config HAVE_CUSTOM_LINKER_SCRIPT
bool "Custom linker script provided"
bool "Custom linker scripts provided"
help
Set this option if you have a custom linker script which needed to
be define in CUSTOM_LINKER_SCRIPT.
@@ -196,66 +167,6 @@ config LINKER_SORT_BY_ALIGNMENT
in decreasing size of symbols. This helps to minimize
padding between symbols.
config SRAM_VECTOR_TABLE
bool "Place the vector table in SRAM instead of flash"
help
The option specifies that the vector table should be placed at the
start of SRAM instead of the start of flash.
config HAS_SRAM_OFFSET
bool
help
This option is selected by targets that require SRAM_OFFSET.
config SRAM_OFFSET
hex "Kernel SRAM offset" if HAS_SRAM_OFFSET
default 0
help
This option specifies the byte offset from the beginning of SRAM
where the kernel begins. Changing this value from zero will affect
the Zephyr image's link, and will decrease the total amount of
SRAM available for use by application code.
If unsure, leave at the default value 0.
menu "Linker Sections"
config LINKER_USE_BOOT_SECTION
bool "Enable Usage of Boot Linker Section"
help
If enabled, the symbols which are needed for the boot process
will be put into another linker section reserved for these
symbols.
Requires that boot sections exist in the architecture, SoC,
board or custom linker script.
config LINKER_USE_PINNED_SECTION
bool "Enable Usage of Pinned Linker Section"
help
If enabled, the symbols which need to be pinned in memory
will be put into another linker section reserved for pinned
symbols. During boot, the corresponding memory will be marked
as pinned.
Requires that pinned sections exist in the architecture, SoC,
board or custom linker script.
config LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT
bool "Generic sections are present at boot" if DEMAND_PAGING && LINKER_USE_PINNED_SECTION
default y
help
When disabled, the linker sections other than the boot and
pinned sections will be marked as not present in the page
tables. This allows kernel to pull in data pages on demand
as required by current execution context when demand paging
is enabled. There is no need to load all code and data into
memory at once.
If unsure, say Y.
endmenu # "Linker Sections"
endmenu
menu "Compiler Options"
@@ -308,12 +219,6 @@ config NO_OPTIMIZATIONS
endchoice
config COMPILER_COLOR_DIAGNOSTICS
bool "Enable colored diganostics"
default y
help
Compiler diagnostic messages are colorized.
config COMPILER_OPT
string "Custom compiler options"
help
@@ -324,14 +229,6 @@ config COMPILER_OPT
and can be used to change compiler optimization, warning and error
messages, and so on.
config MISRA_SANE
bool "MISRA standards compliance features"
help
Causes the source code to build in "MISRA" mode, which
disallows some otherwise-permitted features of the C
standard for safety reasons. Specifically variable length
arrays are not permitted (and gcc will enforce this).
endmenu
choice
@@ -447,47 +344,6 @@ config BUILD_OUTPUT_S19
Build an S19 binary zephyr/zephyr.s19 in the build directory.
The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
config BUILD_OUTPUT_UF2
bool "Build a binary in UF2 format"
depends on BUILD_OUTPUT_BIN
help
Build a UF2 binary zephyr/zephyr.uf2 in the build directory.
The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
if BUILD_OUTPUT_UF2
config BUILD_OUTPUT_UF2_FAMILY_ID
string "UF2 device family ID"
default "0x1c5f21b0" if SOC_ESP32
default "0xada52840" if SOC_NRF52840_QIAA
default "0x4fb2d5bd" if SOC_SERIES_IMX_RT
default "0x2abc77ec" if SOC_SERIES_LPC55XXX
default "0x68ed2b88" if SOC_SERIES_SAMD21
default "0x55114460" if SOC_SERIES_SAMD51
default "0x647824b6" if SOC_SERIES_STM32F0X
default "0x5d1a0a2e" if SOC_SERIES_STM32F2X
default "0x6b846188" if SOC_SERIES_STM32F3X
default "0x53b80f00" if SOC_SERIES_STM32F7X
default "0x300f5633" if SOC_SERIES_STM32G0X
default "0x4c71240a" if SOC_SERIES_STM32G4X
default "0x6db66082" if SOC_SERIES_STM32H7X
default "0x202e3a91" if SOC_SERIES_STM32L0X
default "0x1e1f432d" if SOC_SERIES_STM32L1X
default "0x00ff6919" if SOC_SERIES_STM32L4X
default "0x04240bdf" if SOC_SERIES_STM32L5X
default "0x70d16653" if SOC_SERIES_STM32WBX
default "0x5ee21072" if SOC_STM32F103XE
default "0x57755a57" if SOC_STM32F401XC || SOC_STM32F401XE
default "0x6d0922fa" if SOC_STM32F407XE
default "0x8fb060fe" if SOC_STM32F407XG
help
UF2 bootloaders only accept UF2 files with a matching family ID.
This can be either a hex, e.g. 0x68ed2b88, or well-known family
name string. If the SoC in use is known by UF2, the Family ID will
be pre-filled with the known value.
endif # BUILD_OUTPUT_UF2
config BUILD_OUTPUT_STRIPPED
bool "Build a stripped binary"
help
@@ -506,6 +362,13 @@ config MAKEFILE_EXPORTS
Generates a file with build information that can be read by
third party Makefile-based build systems.
config DEPRECATED_ZEPHYR_INT_TYPES
bool "Allow the use of the deprecated zephyr integer types"
help
Allows the use of the deprecated Zephyr integer typedefs defined in
Zephyr 2.3 and previous versions. These types are:
u8_t, u16_t, u32_t, u64_t, s8_t, s16_t, s32_t, and s64_t.
endmenu
endmenu
@@ -578,43 +441,16 @@ config MCUBOOT_SIGNATURE_KEY_FILE
The existence of bin and hex files depends on CONFIG_BUILD_OUTPUT_BIN
and CONFIG_BUILD_OUTPUT_HEX.
This option should contain a path to the same file as the
BOOT_SIGNATURE_KEY_FILE option in your MCUboot .config. The path
may be absolute or relative to the west workspace topdir. (The MCUboot
config option is used for the MCUboot bootloader image; this option is
for your application which is to be loaded by MCUboot. The MCUboot
config option can be a relative path from the MCUboot repository
root.)
This option should contain an absolute path to the same file
as the BOOT_SIGNATURE_KEY_FILE option in your MCUboot
.config. (The MCUboot config option is used for the MCUboot
bootloader image; this option is for your application which
is to be loaded by MCUboot. The MCUboot config option can be
a relative path from the MCUboot repository root; this option's
behavior is undefined for relative paths.)
If left empty, you must sign the Zephyr binaries manually.
config MCUBOOT_ENCRYPTION_KEY_FILE
string "Path to the mcuboot encryption key file"
default ""
depends on MCUBOOT_SIGNATURE_KEY_FILE != ""
help
The file contains the public key that is used to encrypt the
ephemeral key that encrypts the image. The corresponding
private key is hard coded in the MCUboot source code and is
used to decrypt the ephemeral key that is embedded in the
image. The file is in PEM format.
If set to a non-empty value, the build system tries to
sign and encrypt the final binaries using a 'west sign -t imgtool'
command. The binaries are placed in the build directory at
zephyr/zephyr.signed.encrypted.bin and
zephyr/zephyr.signed.encrypted.hex.
The file names can be customized with CONFIG_KERNEL_BIN_NAME.
The existence of bin and hex files depends on CONFIG_BUILD_OUTPUT_BIN
and CONFIG_BUILD_OUTPUT_HEX.
This option should either be an absolute path or a path relative to
the west workspace topdir.
Example: './bootloader/mcuboot/enc-rsa2048-pub.pem'
If left empty, you must encrypt the Zephyr binaries manually.
config MCUBOOT_EXTRA_IMGTOOL_ARGS
string "Extra arguments to pass to imgtool"
default ""
@@ -638,7 +474,7 @@ endif # BOOTLOADER_MCUBOOT
config BOOTLOADER_ESP_IDF
bool "ESP-IDF bootloader support"
depends on SOC_ESP32 || SOC_ESP32S2
depends on SOC_ESP32
help
This option will trigger the compilation of the ESP-IDF bootloader
inside the build folder.
@@ -647,6 +483,7 @@ config BOOTLOADER_ESP_IDF
config BOOTLOADER_BOSSA
bool "BOSSA bootloader support"
select USE_DT_CODE_PARTITION
depends on SOC_FAMILY_SAM0
help
Signifies that the target uses a BOSSA compatible bootloader. If CDC
@@ -664,13 +501,6 @@ choice
prompt "BOSSA bootloader variant"
depends on BOOTLOADER_BOSSA
config BOOTLOADER_BOSSA_LEGACY
bool "Legacy"
help
Select the Legacy variant of the BOSSA bootloader. This is defined
for compatibility mode only. The recommendation is use newer
versions like Arduino or Adafruit UF2.
config BOOTLOADER_BOSSA_ARDUINO
bool "Arduino"
help
@@ -685,6 +515,22 @@ config BOOTLOADER_BOSSA_ADAFRUIT_UF2
endchoice
config REBOOT
bool "Reboot functionality"
select SYSTEM_CLOCK_DISABLE
help
Enable the sys_reboot() API. Enabling this can drag in other subsystems
needed to perform a "safe" reboot (e.g. SYSTEM_CLOCK_DISABLE, to stop the
system clock before issuing a reset).
config MISRA_SANE
bool "MISRA standards compliance features"
help
Causes the source code to build in "MISRA" mode, which
disallows some otherwise-permitted features of the C
standard for safety reasons. Specifically variable length
arrays are not permitted (and gcc will enforce this).
endmenu
menu "Compatibility"

View File

@@ -135,34 +135,13 @@ ARM arch:
- galak
- MaureenHelm
- stephanosio
- bbolen
files:
- arch/arm/
- arch/arm/core/offsets/
- include/arch/arm/aarch32/
- include/arch/arm/
- tests/arch/arm/
labels:
- "area: ARM"
ARM64 arch:
status: maintained
maintainers:
- carlocaione
collaborators:
- npitre
- ioannisg
- povergoing
files:
- arch/arm64/
- include/arch/arm64/
- tests/arch/arm64/
- soc/arm64/
- boards/arm64/
- dts/arm64/
labels:
- "area: ARM64"
Bluetooth:
status: maintained
maintainers:
@@ -170,8 +149,6 @@ Bluetooth:
collaborators:
- joerchan
- Vudentz
- Thalley
- asbjornsabo
files:
- doc/reference/bluetooth/
- doc/guides/bluetooth/
@@ -179,12 +156,11 @@ Bluetooth:
- include/bluetooth/
- include/drivers/bluetooth/
- samples/bluetooth/
- subsys/bluetooth/
- subsys/bluetooth/*
- subsys/bluetooth/common/
- subsys/bluetooth/host/
- subsys/bluetooth/services/
- subsys/bluetooth/shell/
- subsys/bluetooth/audio/
- tests/bluetooth/
labels:
- "area: Bluetooth"
@@ -230,31 +206,13 @@ Build system:
labels:
- "area: Build System"
"C++":
status: maintained
maintainers:
- stephanosio
collaborators:
- alexanderwachter
files:
- subsys/cpp/
- tests/subsys/cpp/
- samples/subsys/cpp/
labels:
- "area: C++"
C library:
status: maintained
maintainers:
- stephanosio
status: orphaned
collaborators:
- nashif
- enjiamai
- KangJianX
files:
- lib/libc/
- tests/lib/c_lib/
- tests/lib/newlib/
labels:
- "area: C Library"
@@ -263,29 +221,12 @@ CMSIS API layer:
collaborators:
- nashif
files:
- subsys/portability/cmsis_rtos_v*/
- include/portability/cmsis*
- samples/subsys/portability/cmsis_rtos_v*/
- tests/subsys/portability/cmsis_rtos_v*/
- lib/cmsis_rtos_v*/
labels:
- "area: Portability"
CMSIS-DSP integration:
status: maintained
maintainers:
- stephanosio
collaborators:
- galak
- ioannisg
files:
- modules/Kconfig.cmsis_dsp
- tests/benchmarks/cmsis_dsp/
- tests/lib/cmsis_dsp/
labels:
- "area: CMSIS-DSP"
Common arch:
status: orphaned
status: maintained
collaborators:
- dcpleung
- nashif
@@ -311,7 +252,6 @@ Debug:
- nashif
collaborators:
- dcpleung
- chen-png
files:
- include/debug/
- subsys/debug/
@@ -364,14 +304,10 @@ Devicetree:
- "area: Devicetree"
Disk:
status: maintained
maintainers:
- jfischer-no
status: orphaned
files:
- include/storage/disk_access.h
- include/drivers/disk.h
- drivers/disk/
- subsys/disk/
- include/disk/
labels:
- "area: Disk Access"
@@ -389,7 +325,7 @@ Display drivers:
- include/drivers/display.h
- lib/gui/
- subsys/fb/
- samples/subsys/display/
- samples/display/
labels:
- "area: Display"
@@ -400,15 +336,14 @@ Documentation:
collaborators:
- nashif
- utzig
- mbolivar-nordic
files:
- doc/
- doc/_static/
- doc/_templates/
- doc/_doxygen/
- doc/_scripts/
- doc/*
- doc/static/
- doc/templates/
- doc/custom-doxygen/
- doc/scripts/
- README.rst
- doc/Makefile
- Makefile
labels:
- "area: Documentation"
@@ -432,11 +367,10 @@ Documentation:
- nashif
- lyakh
- lgirdwood
- mengxianglinx
files:
- drivers/audio/
- include/audio/
- samples/subsys/audio/
- samples/audio/
labels:
- "area: Audio"
@@ -447,9 +381,6 @@ Documentation:
collaborators:
- henrikbrixandersen
- karstenkoenig
- nixward
- martinjaeger
- legoabram
files:
- drivers/can/
- include/canbus/
@@ -526,6 +457,7 @@ Documentation:
status: orphaned
files:
- drivers/dma/
- include/dt-bindings/dma/
- tests/drivers/dma/
labels:
- "area: DMA"
@@ -538,7 +470,6 @@ Documentation:
- drivers/eeprom/
- dts/bindings/mtd/*eeprom*
- include/drivers/eeprom.h
- samples/drivers/eeprom/
- tests/drivers/eeprom/
labels:
- "area: EEPROM"
@@ -550,6 +481,7 @@ Documentation:
files:
- drivers/entropy/
- include/drivers/entropy.h
- samples/drivers/entropy/
- tests/drivers/entropy/
labels:
- "area: Crypto / RNG"
@@ -573,6 +505,7 @@ Documentation:
maintainers:
- tbursztyka
collaborators:
- jukkar
- pfalcon
files:
- drivers/ethernet/
@@ -603,6 +536,7 @@ Documentation:
- include/drivers/gpio.h
- include/dt-bindings/gpio/
- tests/drivers/gpio/
- samples/drivers/gpio/
labels:
- "area: GPIO"
@@ -619,7 +553,9 @@ Documentation:
- "area: HWINFO"
"Drivers: I2C":
status: orphaned
status: maintained
maintainers:
- pabigot
files:
- drivers/i2c/
- dts/bindings/i2c/
@@ -645,7 +581,7 @@ Documentation:
maintainers:
- tbursztyka
collaborators:
- rlubos
- jukkar
files:
- drivers/ieee802154/
labels:
@@ -673,11 +609,7 @@ Documentation:
- "area: IPM"
"Drivers: kscan":
status: maintained
maintainers:
- albertofloyd
collaborators:
- VenkatKotakonda
status: orphaned
files:
- drivers/kscan/
- include/drivers/kscan.h
@@ -713,22 +645,18 @@ Documentation:
status: maintained
maintainers:
- Mani-Sadhasivam
collaborators:
- mniestroj
files:
- drivers/lora/
- include/drivers/lora.h
- samples/drivers/lora/
- include/lorawan/
- subsys/lorawan/
- samples/subsys/lorawan/
- samples/lorawan/
labels:
- "area: LoRa"
"Drivers: Modem":
status: maintained
maintainers:
- rerickson1
status: orphaned
files:
- drivers/modem/
labels:
@@ -736,8 +664,6 @@ Documentation:
"Drivers: Neural Networks":
status: orphaned
collaborators:
- nashif
files:
- drivers/neural_net/
labels:
@@ -758,11 +684,7 @@ Documentation:
- "area: PCI"
"Drivers: PECI":
status: maintained
maintainers:
- albertofloyd
collaborators:
- VenkatKotakonda
status: orphaned
files:
- drivers/peci/
- include/drivers/peci.h
@@ -784,24 +706,23 @@ Documentation:
"Drivers: PTP Clock":
status: maintained
maintainers:
- tbursztyka
- jukkar
files:
- drivers/ptp_clock/
- include/drivers/ptp_clock.h
- include/ptp_clock.h
labels:
- "area: Clocks"
"Drivers: PM CPU ops":
"Drivers: PSCI":
status: maintained
maintainers:
- carlocaione
files:
- drivers/pm_cpu_ops/
- include/drivers/pm_cpu_ops/
- include/drivers/pm_cpu_ops.h
- include/arch/arm64/arm-smccc.h
- drivers/psci/
- include/drivers/psci.h
- include/arch/arm/arm-smccc.h
labels:
- "area: PM CPU ops"
- "area: PSCI"
"Drivers: PWM":
status: maintained
@@ -860,8 +781,6 @@ Documentation:
status: maintained
maintainers:
- andyross
collaborators:
- KangJianX
files:
- drivers/timer/
- include/drivers/timer/
@@ -898,7 +817,7 @@ Documentation:
maintainers:
- tbursztyka
collaborators:
- rlubos
- jukkar
- kludentwo
files:
- drivers/wifi/
@@ -925,6 +844,7 @@ Filesystems:
- de-nordic
- Laczen
- nashif
- pabigot
- vanwinkeljan
files:
- include/fs/
@@ -938,22 +858,17 @@ JSON Web Token:
status: orphaned
collaborators:
- mrfuchs
- sir-branch
files:
- subsys/jwt/
- include/data/
- lib/os/json.c
labels:
- "area: JSON"
Kconfig:
status: orphaned
collaborators:
- tejlmand
- nashif
files:
- scripts/kconfig/
- doc/guides/build/kconfig/
- doc/guides/kconfig/
labels:
- "area: Kconfig"
description: >-
@@ -968,7 +883,6 @@ Kernel:
- nashif
- ceolin
- dcpleung
- peter-mitsis
files:
- doc/reference/kernel/
- include/kernel*.h
@@ -992,13 +906,16 @@ Base OS:
- "area: Base OS"
Little FS:
status: orphaned
status: maintained
maintainers:
- pabigot
files:
- subsys/fs/Kconfig.littlefs
- subsys/fs/littlefs_fs.c
- tests/subsys/fs/littlefs/
description: >-
Little FS
labels:
- "area: File System"
@@ -1006,8 +923,6 @@ Logging:
status: maintained
maintainers:
- nordic-krch
collaborators:
- chen-png
files:
- include/logging/
- samples/subsys/logging/
@@ -1022,7 +937,6 @@ MAINTAINERS file:
- MaureenHelm
collaborators:
- ioannisg
- nashif
files:
- MAINTAINERS.yml
labels:
@@ -1042,9 +956,9 @@ MCU Manager:
- "area: mcumgr"
OSDP:
status: orphaned
status: maintained
collaborators:
- sidcha
- cbsiddharth
files:
- subsys/mgmt/osdp/
- include/mgmt/osdp.h
@@ -1074,11 +988,10 @@ Native POSIX and POSIX arch:
Networking:
status: maintained
maintainers:
- rlubos
- jukkar
collaborators:
- tbursztyka
- pfalcon
- mengxianglinx
files:
- drivers/net/
- include/net/
@@ -1099,7 +1012,7 @@ Networking:
maintainers:
- pfalcon
collaborators:
- rlubos
- jukkar
files:
- samples/net/sockets/
- subsys/net/lib/sockets/
@@ -1112,12 +1025,13 @@ Networking:
maintainers:
- jhedberg
collaborators:
- rlubos
- jukkar
- tbursztyka
files:
- include/net/buf.h
- subsys/net/buf.c
- tests/net/buf/
labels:
- "area: Networking"
@@ -1125,17 +1039,20 @@ Networking:
status: maintained
maintainers:
- rlubos
collaborators:
- jukkar
files:
- subsys/net/lib/coap/
- samples/net/sockets/coap_*/
- tests/net/lib/coap/
labels:
- "area: Networking"
"Networking: LWM2M":
status: maintained
maintainers:
- rlubos
collaborators:
- jukkar
files:
- samples/net/lwm2m_client/
- subsys/net/lib/lwm2m/
@@ -1146,6 +1063,8 @@ Networking:
status: maintained
maintainers:
- rlubos
collaborators:
- jukkar
files:
- subsys/net/lib/mqtt/
- tests/net/lib/mqtt_packet/
@@ -1176,8 +1095,6 @@ POSIX API layer:
status: orphaned
collaborators:
- pfalcon
- enjiamai
- KangJianX
files:
- include/posix/
- lib/posix/
@@ -1191,12 +1108,12 @@ Power management:
- ceolin
collaborators:
- nashif
- mengxianglinx
- pabigot
files:
- include/pm/pm.h
- samples/subsys/pm/
- subsys/pm/
- tests/subsys/pm/
- include/power/power.h
- samples/subsys/power/
- subsys/power/
- tests/subsys/power/
labels:
- "area: Power Management"
@@ -1205,7 +1122,6 @@ RISCV arch:
collaborators:
- mgielda
- katsuster
- henrikbrixandersen
files:
- arch/riscv/
- boards/riscv/
@@ -1219,12 +1135,6 @@ Twister:
status: maintained
maintainers:
- nashif
collaborators:
- chen-png
- galak
- PerMac
- enjiamai
- hakehuang
files:
- scripts/twister
- scripts/pylib/twister/
@@ -1271,7 +1181,7 @@ Shields:
- "area: Shields"
SPARC arch:
status: orphaned
status: maintained
collaborators:
- martin-aberg
files:
@@ -1294,45 +1204,23 @@ Synopsys Platforms:
labels:
- "platform: Synopsys"
Nuvoton_NPCX Platforms:
Nuvoton Platforms:
status: maintained
maintainers:
- MulinChao
- ChiHuaL
- WealianLiao
collaborators:
- MulinChao
- ChiHuaL
- WealianLiao
- sjg20
- keith-zephyr
- jackrosenthal
- fabiobaltieri
- yperess
files:
- soc/arm/nuvoton_npcx/
- soc/arm/nuvoton/
- boards/arm/npcx*/
- dts/arm/nuvoton/
- dts/bindings/*/*npcx*
- drivers/*/*_npcx*.c
- dts/bindings/*/nuvoton/*
- drivers/*/*_npcx*
labels:
- "platform: Nuvoton_NPCX"
Nuvoton_Numicro Platforms:
status: orphaned
collaborators:
- ssekar15
files:
- soc/arm/nuvoton_numicro/
- boards/arm/nuvoton_pfm*/
- dts/arm/nuvoton/
- dts/bindings/*/*numicro*
- drivers/*/*_numicro*
labels:
- "platform: Nuvoton_Numicro"
- "platform: Nuvoton"
SiLabs Platforms:
status: orphaned
status: maintained
collaborators:
- chrta
files:
@@ -1347,7 +1235,7 @@ SiLabs Platforms:
Intel Platforms (X86):
status: maintained
maintainers:
- enjiamai
- jenmwms
collaborators:
- jhedberg
- aasthagr
@@ -1374,18 +1262,16 @@ Intel Platforms (Xtensa):
NXP Platforms:
status: maintained
maintainers:
- dleach02
collaborators:
- mmahadevan108
- MaureenHelm
files:
- boards/arm/mimx*/
- boards/arm/frdm_k*/
- boards/arm/lpcxpress*/
- boards/arm/twr_*/
- boards/arm/twr_*
- soc/arm/nxp_*/
- drivers/*/*imx*
- drivers/*/*lpc*.c
- drivers/*/*mcux*.c
- drivers/*/*lpc*
- drivers/*/*mcux*
- dts/arm/nxp/
- dts/bindings/*/nxp*
labels:
@@ -1402,7 +1288,7 @@ Microchip Platforms:
- boards/arm/mec*/
- dts/arm/microchip/
- soc/arm/microchip_mec/
- drivers/*/*mchp*.c
- drivers/*/*mchp*
labels:
- "platform: Microchip"
@@ -1412,7 +1298,7 @@ nRF Platforms:
- ioannisg
files:
- boards/arm/*nrf*/
- drivers/*/*nrfx*.c
- drivers/*/*nrfx*
- soc/arm/nordic_nrf/
- samples/boards/nrf/
- dts/arm/nordic/
@@ -1423,17 +1309,12 @@ STM32 Platforms:
status: maintained
maintainers:
- erwango
collaborators:
- ABOSTM
- FRASTM
files:
- boards/arm/nucleo_*/
- boards/arm/stm32*_disco/
- boards/arm/stm32*_dk*/
- boards/arm/stm32*_eval/
- drivers/*/*stm32*/
- drivers/*/*stm32*.c
- drivers/*/*stm32*.h
- drivers/*/*stm32*
- drivers/*/*/*stm32*
- dts/arm/st/
- dts/bindings/*/*stm32*
@@ -1444,49 +1325,6 @@ STM32 Platforms:
STM32 SOCs, dts files and related drivers. ST nucleo, disco and eval
boards.
Espressif Platforms:
status: maintained
maintainers:
- sylvioalves
- glaubermaroto
- ulipe
files:
- drivers/*/*esp32*.c
- boards/xtensa/esp32*/
- soc/xtensa/esp32*/
- boards/riscv/esp32*/
- soc/riscv/esp32*/
- dts/xtensa/espressif/
- dts/riscv/espressif/
- dts/bindings/*/*esp32*
- samples/boards/esp32*/
labels:
- "platform: ESP32"
ITE Platforms:
status: maintained
maintainers:
- Dino-Li
- GTLin08
- RuibinChang
collaborators:
- Dino-Li
- GTLin08
- RuibinChang
- jackrosenthal
- keith-zephyr
- brockus-zephyr
- yperess
- sjg20
files:
- boards/riscv/it8xxx2_evb/
- drivers/*/*it8xxx2*
- dts/bindings/*/*ite*
- dts/riscv/*it8xxx2*
- soc/riscv/riscv-ite/
labels:
- "platform: ITE"
Storage:
status: maintained
maintainers:
@@ -1518,7 +1356,7 @@ Tracing:
- include/tracing/
- subsys/timing/
- samples/subsys/tracing/
- doc/guides/debug_tools/tracing/
- doc/guides/tracing/
- tests/subsys/tracing/
labels:
- "area: tracing"
@@ -1527,6 +1365,8 @@ USB:
status: maintained
maintainers:
- jfischer-no
collaborators:
- finikorg
files:
- drivers/usb/
- dts/bindings/usb/
@@ -1540,11 +1380,9 @@ USB:
Userspace:
status: maintained
maintainers:
- dcpleung
collaborators:
- dcpleung
- ioannisg
- enjiamai
files:
- doc/reference/usermode/kernelobjects.rst
- include/app_memory/
@@ -1575,17 +1413,16 @@ VFS:
labels:
- "area: File System"
West:
status: maintained
maintainers:
- mbolivar-nordic
collaborators:
- carlescufi
- swinslow
files:
- scripts/west-commands.yml
- scripts/west_commands/
- doc/guides/west/
labels:
- "area: West"
@@ -1613,15 +1450,12 @@ x86 arch:
- nashif
- dcpleung
- ceolin
- enjiamai
- jenmwms
- aasthagr
files:
- arch/x86/
- include/arch/x86/
- tests/arch/x86/
- drivers/interrupt_controller/*intel*
- drivers/interrupt_controller/*ioapic*
- drivers/interrupt_controller/*loapic*
labels:
- "area: X86"

30
Makefile Normal file
View File

@@ -0,0 +1,30 @@
#
# Top level makefile for documentation build
#
BUILDDIR ?= doc/_build
DOC_TAG ?= development
SPHINXOPTS ?= -q
KCONFIG_TURBO_MODE ?= 0
# Documentation targets
# ---------------------------------------------------------------------------
.PHONY: clean htmldocs htmldocs-fast pdfdocs doxygen
htmldocs-fast:
${MAKE} htmldocs KCONFIG_TURBO_MODE=1
htmldocs pdfdocs doxygen: configure
cmake --build ${BUILDDIR} -- $@ # -v # VERBOSE=1
# Run CMake every time cause it's quick and re-configures TURBO_MODE if
# needed
.PHONY: configure
configure:
cmake -GNinja -B${BUILDDIR} -Sdoc/ -DDOC_TAG=${DOC_TAG} \
-DSPHINXOPTS=${SPHINXOPTS} \
-DKCONFIG_TURBO_MODE=${KCONFIG_TURBO_MODE}
clean:
rm -rf ${BUILDDIR}

View File

@@ -2,16 +2,15 @@
<a href="https://www.zephyrproject.org">
<p align="center">
<img src="doc/_static/images/logo-readme.png">
<img src="doc/images/Zephyr-Project.png">
</p>
</a>
<a href="https://bestpractices.coreinfrastructure.org/projects/74"><img
src="https://bestpractices.coreinfrastructure.org/projects/74/badge"></a>
<a
href="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml?query=branch%3Amain">
<a href="https://buildkite.com/zephyr/zephyr">
<img
src="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml/badge.svg?event=push"></a>
src="https://badge.buildkite.com/f5bd0dc88306cee17c9b38e78d11bb74a6291e3f40e7d13f31.svg?branch=master"></a>
The Zephyr Project is a scalable real-time operating system (RTOS) supporting
@@ -28,6 +27,7 @@ Intel x86, ARC, Nios II, Tensilica Xtensa, and RISC-V, and a large number of
.. below included in doc/introduction/introduction.rst
.. start_include_here
Getting Started
***************
@@ -35,12 +35,10 @@ Getting Started
Welcome to Zephyr! See the `Introduction to Zephyr`_ for a high-level overview,
and the documentation's `Getting Started Guide`_ to start developing.
.. start_include_here
Community Support
*****************
Community support is provided via mailing lists and Discord; see the Resources
Community support is provided via mailing lists and Slack; see the Resources
below for details.
.. _project-resources:
@@ -63,9 +61,10 @@ Here's a quick summary of resources to help you find your way around:
`Zephyr Development mailing list`_. The other `Zephyr mailing list
subgroups`_ have their own archives and sign-up pages.
* **Nightly CI Build Status**: https://lists.zephyrproject.org/g/builds
The builds@lists.zephyrproject.org mailing list archives the CI nightly build results.
* **Chat**: Real-time chat happens in Zephyr's Discord Server. Use
this `Discord Invite`_ to register.
The builds@lists.zephyrproject.org mailing list archives the CI
(shippable) nightly build results.
* **Chat**: Zephyr's Slack workspace is https://zephyrproject.slack.com. Use
this `Slack Invite`_ to register.
* **Contributing**: see the `Contribution Guide`_
* **Wiki**: `Zephyr GitHub wiki`_
* **Issues**: https://github.com/zephyrproject-rtos/zephyr/issues
@@ -74,7 +73,7 @@ Here's a quick summary of resources to help you find your way around:
tracked separately at https://zephyrprojectsec.atlassian.net.
* **Zephyr Project Website**: https://zephyrproject.org
.. _Discord Invite: https://chat.zephyrproject.org
.. _Slack Invite: https://tinyurl.com/y5glwylp
.. _supported boards: http://docs.zephyrproject.org/latest/boards/index.html
.. _Zephyr Documentation: http://docs.zephyrproject.org
.. _Introduction to Zephyr: http://docs.zephyrproject.org/latest/introduction/index.html
@@ -85,4 +84,4 @@ Here's a quick summary of resources to help you find your way around:
.. _Zephyr mailing list subgroups: https://lists.zephyrproject.org/g/main/subgroups
.. _Sample and Demo Code Examples: http://docs.zephyrproject.org/latest/samples/index.html
.. _Security: http://docs.zephyrproject.org/latest/security/index.html
.. _Asking for Help Tips: https://docs.zephyrproject.org/latest/getting_started/index.html#asking-for-help
.. _Asking for Help Tips: https://docs.zephyrproject.org/latest/guides/getting-help.html

View File

@@ -1,5 +1,5 @@
VERSION_MAJOR = 2
VERSION_MINOR = 7
PATCHLEVEL = 4
VERSION_MINOR = 5
PATCHLEVEL = 1
VERSION_TWEAK = 0
EXTRAVERSION =
EXTRAVERSION = rc1

View File

@@ -33,33 +33,19 @@ config ARM
# FIXME: current state of the code for all ARM requires this, but
# is really only necessary for Cortex-M with ARM MPU!
select GEN_PRIV_STACKS
select ARCH_HAS_THREAD_LOCAL_STORAGE if CPU_CORTEX_R || CPU_CORTEX_M
select ARCH_HAS_THREAD_LOCAL_STORAGE if ARM64 || CPU_CORTEX_R || CPU_CORTEX_M
help
ARM architecture
config ARM64
bool
select ARCH_IS_SET
select 64BIT
select HAS_DTS
select HAS_ARM_SMCCC
select ARCH_HAS_THREAD_LOCAL_STORAGE
select USE_SWITCH
select USE_SWITCH_SUPPORTED
help
ARM64 (AArch64) architecture
config SPARC
bool
select ARCH_IS_SET
select HAS_DTS
select USE_SWITCH
select USE_SWITCH_SUPPORTED
select BIG_ENDIAN
select ATOMIC_OPERATIONS_BUILTIN if SPARC_CASA
select ATOMIC_OPERATIONS_C if !SPARC_CASA
select ARCH_HAS_THREAD_LOCAL_STORAGE
select ARCH_HAS_EXTRA_EXCEPTION_INFO
help
SPARC architecture
@@ -76,9 +62,6 @@ config X86
select ARCH_HAS_TIMING_FUNCTIONS
select ARCH_HAS_THREAD_LOCAL_STORAGE
select ARCH_HAS_DEMAND_PAGING
select NEED_LIBC_MEM_PARTITION if USERSPACE && TIMING_FUNCTIONS \
&& !BOARD_HAS_TIMING_FUNCTIONS \
&& !SOC_HAS_TIMING_FUNCTIONS
help
x86 architecture
@@ -107,7 +90,6 @@ config XTENSA
select HAS_DTS
select USE_SWITCH
select USE_SWITCH_SUPPORTED
imply ATOMIC_OPERATIONS_ARCH
help
Xtensa architecture
@@ -178,14 +160,14 @@ config SRAM_BASE_ADDRESS
/chosen/zephyr,sram in devicetree. The user should generally avoid
changing it via menuconfig or in configuration files.
if ARC || ARM || ARM64 || NIOS2 || X86
if ARC || ARM || NIOS2 || X86
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
config FLASH_SIZE
int "Flash Size in kB"
default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K) if (XIP && (ARM ||ARM64)) || !ARM
default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K) if (XIP && ARM) || !ARM
help
This option specifies the size of the flash in kB. It is normally set by
the board's defconfig file and the user should generally avoid modifying
@@ -193,13 +175,13 @@ config FLASH_SIZE
config FLASH_BASE_ADDRESS
hex "Flash Base Address"
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) if (XIP && (ARM || ARM64)) || !ARM
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) if (XIP && ARM) || !ARM
help
This option specifies the base address of the flash on the board. It is
normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration.
endif # ARM || ARM64 || ARC || NIOS2 || X86
endif # ARM || ARC || NIOS2 || X86
if ARCH_HAS_TRUSTED_EXECUTION
@@ -253,7 +235,7 @@ config USERSPACE
When enabled, threads may be created or dropped down to user mode,
which has significantly restricted permissions and must interact
with the kernel via system calls. See Zephyr documentation for more
details about this feature.
details about this feature.
If a user thread overflows its stack, this will be caught and the
kernel itself will be shielded from harm. Enabling this option
@@ -273,7 +255,7 @@ config PRIVILEGED_STACK_SIZE
a multiple of the minimum stack alignment.
config KOBJECT_TEXT_AREA
int "Size of kobject text area"
int "Size if kobject text area"
default 512 if COVERAGE_GCOV
default 512 if NO_OPTIMIZATIONS
default 512 if STACK_CANARIES && RISCV
@@ -282,28 +264,6 @@ config KOBJECT_TEXT_AREA
help
Size of kernel object text area. Used in linker script.
config KOBJECT_DATA_AREA_RESERVE_EXTRA_PERCENT
int "Reserve extra kobject data area (in percentage)"
default 100
depends on ARCH_HAS_USERSPACE
help
Multiplication factor used to calculate the size of placeholder to
reserve space for kobject metadata hash table. The hash table is
generated via gperf is highly dependent on the absolute addresses of
kobjects which might change between prebuilts. To reserve enough
space for the hash table during final linking passes to keep
kobjects in same place, the size of reserved space is calculated
from the first prebuilt plus additional space calculated with
this percentage (of the kobject data area in first prebuilt).
config KOBJECT_RODATA_AREA_EXTRA_BYTES
int "Reserve extra bytes for kobject rodata area"
default 16
depends on ARCH_HAS_USERSPACE
help
Reserve a few more bytes for the RODATA region for kobject metadata.
This is to account for the uncertainty of tables generated by gperf.
config GEN_PRIV_STACKS
bool
help
@@ -464,9 +424,6 @@ endmenu
# Architecture Capabilities
#
config ARCH_HAS_SINGLE_THREAD_SUPPORT
bool
config ARCH_HAS_TIMING_FUNCTIONS
bool
@@ -651,7 +608,7 @@ config KERNEL_VM_OFFSET
in page tables, the equation:
virt = phys + ((KERNEL_VM_BASE + KERNEL_VM_OFFSET) -
(SRAM_BASE_ADDRESS + SRAM_OFFSET))
SRAM_BASE_ADDRESS)
Will be used to convert between physical and virtual addresses for
memory that is mapped at boot.
@@ -677,7 +634,7 @@ config KERNEL_VM_SIZE
implement a notion of "high" memory in Zephyr to work around physical
RAM size larger than the defined bounds of the virtual address space.
menuconfig DEMAND_PAGING
config DEMAND_PAGING
bool "Enable demand paging [EXPERIMENTAL]"
depends on ARCH_HAS_DEMAND_PAGING
help
@@ -700,64 +657,6 @@ config DEMAND_PAGING_ALLOW_IRQ
If this option is disabled, the page fault servicing logic
runs with interrupts disabled for the entire operation. However,
ISRs may also page fault.
config DEMAND_PAGING_PAGE_FRAMES_RESERVE
int "Number of page frames reserved for paging"
default 32 if !LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT
default 0
help
This sets the number of page frames that will be reserved for
paging that do not count towards free memory. This is to
ensure that there are some page frames available for paging
code and data. Otherwise, it would be possible to exhaust
all page frames via anonymous memory mappings.
config DEMAND_PAGING_STATS
bool "Gather Demand Paging Statistics"
help
This enables gathering various statistics related to demand paging,
e.g. number of pagefaults. This is useful for tuning eviction
algorithms and optimizing backing store.
Should say N in production system as this is not without cost.
config DEMAND_PAGING_STATS_USING_TIMING_FUNCTIONS
bool "Use Timing Functions to Gather Demand Paging Statistics"
select TIMING_FUNCTIONS_NEED_AT_BOOT
help
Use timing functions to gather various demand paging statistics.
config DEMAND_PAGING_THREAD_STATS
bool "Gather per Thread Demand Paging Statistics"
depends on DEMAND_PAGING_STATS
help
This enables gathering per thread statistics related to demand
paging.
Should say N in production system as this is not without cost.
config DEMAND_PAGING_TIMING_HISTOGRAM
bool "Gather Demand Paging Execution Timing Histogram"
depends on DEMAND_PAGING_STATS
help
This gathers the histogram of execution time on page eviction
selection, and backing store page in and page out.
Should say N in production system as this is not without cost.
config DEMAND_PAGING_TIMING_HISTOGRAM_NUM_BINS
int "Number of bins (buckets) in Demand Paging Timing Histogrm"
depends on DEMAND_PAGING_TIMING_HISTOGRAM
default 10
help
Defines the number of bins (buckets) in the histogram used for
gathering execution timing information for demand paging.
This requires k_mem_paging_eviction_histogram_bounds[] and
k_mem_paging_backing_store_histogram_bounds[] to define
the upper bounds for each bin. See kernel/statistics.c for
information.
endif # DEMAND_PAGING
endif # MMU
@@ -845,6 +744,7 @@ menu "Floating Point Options"
config FPU
bool "Enable floating point unit (FPU)"
depends on CPU_HAS_FPU
depends on ARC || ARM || RISCV || SPARC || X86
help
This option enables the hardware Floating Point Unit (FPU), in order to
support using the floating point registers and instructions.
@@ -865,19 +765,20 @@ config FPU
config FPU_SHARING
bool "FPU register sharing"
depends on FPU && MULTITHREADING
default y if ARM && ARMV7_M_ARMV8_M_FP
help
This option enables preservation of the hardware floating point registers
across context switches to allow multiple threads to perform concurrent
floating point operations.
Note that some compiler configurations may activate a floating point
context by generating FP instructions for any thread, and that
context must be preserved when switching such threads in and out.
The developers can still disable the FP sharing mode in their
application projects, and switch to Unshared FP registers mode,
if it is guaranteed that the image code does not generate FP
instructions outside the single thread context that is allowed
to do so.
Note that on Cortex-M processors with the floating point extension we
enable by default the FPU register sharing mode, as some GCC compilers
may activate a floating point context by generating FP instructions for
any thread, and that context must be preserved when switching such
threads in and out. The developers can still disable the FP sharing
mode in their application projects, and switch to Unshared FP registers
mode, if it is guaranteed that the image code does not generate FP
instructions outside the single thread context that is allowed to do so.
endmenu
@@ -934,23 +835,6 @@ config ICACHE_LINE_SIZE
Detect automatically at runtime by selecting ICACHE_LINE_SIZE_DETECT.
choice CACHE_TYPE
prompt "Cache type"
depends on CACHE_MANAGEMENT
default HAS_ARCH_CACHE
config HAS_ARCH_CACHE
bool "Integrated cache controller"
help
"Integrade on-core cache controller"
config HAS_EXTERNAL_CACHE
bool "External cache controller"
help
"External cache controller or cache management system"
endchoice
endmenu
config ARCH
@@ -987,9 +871,3 @@ config BOARD
The Board is the first location where we search for a linker.ld file,
if not found we look for the linker file in
soc/<arch>/<family>/<series>
config TOOLCHAIN_HAS_BUILTIN_FFS
bool
default y if !(64BIT && RISCV)
help
Hidden option to signal that toolchain has __builtin_ffs*().

View File

@@ -12,15 +12,8 @@ zephyr_cc_option(-fno-delete-null-pointer-checks)
zephyr_cc_option_ifdef(CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS -munaligned-access)
if(CONFIG_ISA_ARCV2)
# Instruct compiler to use register R26 as thread pointer
# for thread local storage.
# For ARCv3 the register is fixed to r30, so we don't need to specify it
zephyr_cc_option_ifdef(CONFIG_THREAD_LOCAL_STORAGE -mtp-regno=26)
endif()
# Instruct compiler to use register R26 as thread pointer
# for thread local storage.
zephyr_cc_option_ifdef(CONFIG_THREAD_LOCAL_STORAGE -mtp-regno=26)
add_subdirectory(core)
if(COMPILER STREQUAL arcmwdt)
add_subdirectory(arcmwdt)
endif()

View File

@@ -9,109 +9,70 @@ menu "ARC Options"
config ARCH
default "arc"
choice
prompt "ARC core family"
default CPU_ARCEM
config CPU_ARCEM
bool
bool "ARC EM cores"
select CPU_ARCV2
select ATOMIC_OPERATIONS_C
help
This option signifies the use of an ARC EM CPU
config CPU_ARCHS
bool
select ATOMIC_OPERATIONS_BUILTIN
bool "ARC HS cores"
select CPU_ARCV2
# FIXME: ATOMIC_OPERATIONS_BUILTIN still has some problem in arcmwdt
# toolchain, so choosing ATOMIC_OPERATIONS_C instead.
select ATOMIC_OPERATIONS_C if "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "arcmwdt"
select ATOMIC_OPERATIONS_BUILTIN if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "arcmwdt"
help
This option signifies the use of an ARC HS CPU
choice
prompt "ARC Instruction Set"
default ISA_ARCV2
config ISA_ARCV2
bool "ARC ISA v2"
select ARCH_HAS_STACK_PROTECTION if ARC_HAS_STACK_CHECKING || (ARC_MPU && ARC_MPU_VER !=2)
select ARCH_HAS_USERSPACE if ARC_MPU
select USE_SWITCH
select USE_SWITCH_SUPPORTED
help
v2 ISA for the ARC-HS & ARC-EM cores
config ISA_ARCV3
bool "ARC ISA v3"
select USE_SWITCH
select USE_SWITCH_SUPPORTED
endchoice
if ISA_ARCV2
config CPU_EM4
bool
select CPU_ARCEM
help
If y, the SoC uses an ARC EM4 CPU
config CPU_EM4_DMIPS
bool
select CPU_ARCEM
help
If y, the SoC uses an ARC EM4 DMIPS CPU
config CPU_EM4_FPUS
bool
select CPU_ARCEM
help
If y, the SoC uses an ARC EM4 DMIPS CPU with the single-precision
floating-point extension
config CPU_EM4_FPUDA
bool
select CPU_ARCEM
help
If y, the SoC uses an ARC EM4 DMIPS CPU with single-precision
floating-point and double assist instructions
config CPU_EM6
bool
select CPU_ARCEM
help
If y, the SoC uses an ARC EM6 CPU
config CPU_HS3X
bool
select CPU_ARCHS
help
If y, the SoC uses an ARC HS3x or HS4x CPU
endif #ISA_ARCV2
if ISA_ARCV3
config CPU_HS6X
bool
select CPU_ARCHS
select 64BIT
help
If y, the SoC uses an ARC HS6x CPU
endif #ISA_ARCV3
config FP_FPU_DA
bool
menu "ARC CPU Options"
menu "ARCv2 Family Options"
config ARC_HAS_ZOL
config CPU_ARCV2
bool
depends on ISA_ARCV2
select ARCH_HAS_STACK_PROTECTION if ARC_HAS_STACK_CHECKING || ARC_MPU
select ARCH_HAS_USERSPACE if ARC_MPU
select USE_SWITCH
select USE_SWITCH_SUPPORTED
default y
help
ARCv2 CPUs have ZOL hardware loop mechanism which the ARCv3 ISA drops.
Architecturally ZOL provides
- LPcc instruction
- LP_COUNT core reg
- LP_START, LP_END aux regs
Disabling this option removes usage of ZOL regs from code
This option signifies the use of a CPU of the ARCv2 family.
config NUM_IRQ_PRIO_LEVELS
int "Number of supported interrupt priority levels"
@@ -135,8 +96,7 @@ config NUM_IRQS
config RGF_NUM_BANKS
int "Number of General Purpose Register Banks"
depends on ARC_FIRQ
depends on NUM_IRQ_PRIO_LEVELS > 1
depends on CPU_ARCV2
range 1 2
default 2
help
@@ -146,15 +106,9 @@ config RGF_NUM_BANKS
If fast interrupts are supported but there is only 1
register bank, the fast interrupt handler must save
and restore general purpose registers.
NOTE: it's required to have more than one interrupt priority level
to use second register bank - otherwise all interrupts will use
same register bank. Such configuration isn't supported in software
and it is not beneficial from the performance point of view.
config ARC_FIRQ
bool "FIRQ enable"
depends on ISA_ARCV2
depends on NUM_IRQ_PRIO_LEVELS > 1
default y
help
Fast interrupts are supported (FIRQ). If FIRQ enabled, for interrupts
@@ -162,10 +116,6 @@ config ARC_FIRQ
other regs will be saved according to the number of register bank;
If FIRQ is disabled, the handle of interrupts with highest priority
will be same with other interrupts.
NOTE: we don't allow the configuration with FIRQ enabled and only one
interrupt priority level (so all interrupts are FIRQ). Such
configuration isn't supported in software and it is not beneficial
from the performance point of view.
config ARC_FIRQ_STACK
bool "Enable separate firq stack"
@@ -183,7 +133,6 @@ config ARC_FIRQ_STACK_SIZE
config ARC_HAS_STACK_CHECKING
bool "ARC has STACK_CHECKING"
depends on ISA_ARCV2
default y
help
ARC is configured with STACK_CHECKING which is a mechanism for
@@ -262,7 +211,6 @@ config CODE_DENSITY
config ARC_HAS_ACCL_REGS
bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6)"
default y if CPU_HS3X
default y if FPU
help
Depending on the configuration, CPU can contain accumulator reg-pair
@@ -271,7 +219,6 @@ config ARC_HAS_ACCL_REGS
config ARC_HAS_SECURE
bool "ARC has SecureShield"
depends on ISA_ARCV2
select CPU_HAS_TEE
select ARCH_HAS_TRUSTED_EXECUTION
help
@@ -340,8 +287,7 @@ config DCACHE_LINE_SIZE
config ARC_EXCEPTION_STACK_SIZE
int "ARC exception handling stack size"
default 768 if !64BIT
default 2048 if 64BIT
default 768
help
Size in bytes of exception handling stack which is at the top of
interrupt stack to get smaller memory footprint because exception
@@ -360,30 +306,3 @@ config ARC_EXCEPTION_DEBUG
strings.
endmenu
config MAIN_STACK_SIZE
default 4096 if 64BIT
config ISR_STACK_SIZE
default 4096 if 64BIT
config SYSTEM_WORKQUEUE_STACK_SIZE
default 4096 if 64BIT
config IDLE_STACK_SIZE
default 1024 if 64BIT
config IPM_CONSOLE_STACK_SIZE
default 2048 if 64BIT
config TEST_EXTRA_STACKSIZE
default 2048 if 64BIT
config CMSIS_THREAD_MAX_STACK_SIZE
default 2048 if 64BIT
config CMSIS_V2_THREAD_MAX_STACK_SIZE
default 2048 if 64BIT
config CMSIS_V2_THREAD_DYNAMIC_STACK_SIZE
default 2048 if 64BIT

View File

@@ -1,5 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
if(CONFIG_ARCMWDT_LIBC OR CONFIG_CPLUSPLUS)
zephyr_sources(arcmwdt-dtr-stubs.c)
endif()

View File

@@ -1,22 +0,0 @@
/*
* Copyright (c) 2021 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <toolchain.h>
__weak void *__dso_handle;
int __cxa_atexit(void (*destructor)(void *), void *objptr, void *dso)
{
ARG_UNUSED(destructor);
ARG_UNUSED(objptr);
ARG_UNUSED(dso);
return 0;
}
int atexit(void (*function)(void))
{
return 0;
}

View File

@@ -2,6 +2,11 @@
zephyr_library()
if(CONFIG_COVERAGE)
zephyr_compile_options($<TARGET_PROPERTY:compiler,coverage>)
zephyr_link_libraries($<TARGET_PROPERTY:linker,coverage>)
endif()
zephyr_library_sources(
thread.c
thread_entry_wrapper.S

View File

@@ -13,10 +13,16 @@
#include <kernel.h>
#include <arch/cpu.h>
#include <spinlock.h>
#include <kernel_internal.h>
static struct k_spinlock arc_connect_spinlock;
#define LOCKED(lck) for (k_spinlock_key_t __i = {}, \
__key = k_spin_lock(lck); \
!__i.key; \
k_spin_unlock(lck, __key), __i.key = 1)
/* Generate an inter-core interrupt to the target core */
void z_arc_connect_ici_generate(uint32_t core)
{

View File

@@ -56,50 +56,23 @@ void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
* arc_cpu_wake_flag will protect arc_cpu_sp that
* only one slave cpu can read it per time
*/
arc_cpu_sp = Z_KERNEL_STACK_BUFFER(stack) + sz;
arc_cpu_sp = Z_THREAD_STACK_BUFFER(stack) + sz;
arc_cpu_wake_flag = cpu_num;
/* wait slave cpu to start */
while (arc_cpu_wake_flag != 0U) {
while (arc_cpu_wake_flag != 0) {
;
}
}
#ifdef CONFIG_SMP
static void arc_connect_debug_mask_update(int cpu_num)
{
uint32_t core_mask = 1 << cpu_num;
core_mask |= z_arc_connect_debug_select_read();
z_arc_connect_debug_select_set(core_mask);
/* Debugger halts cores at all conditions:
* ARC_CONNECT_CMD_DEBUG_MASK_H: Core global halt.
* ARC_CONNECT_CMD_DEBUG_MASK_AH: Actionpoint halt.
* ARC_CONNECT_CMD_DEBUG_MASK_BH: Software breakpoint halt.
* ARC_CONNECT_CMD_DEBUG_MASK_SH: Self halt.
*/
z_arc_connect_debug_mask_set(core_mask, (ARC_CONNECT_CMD_DEBUG_MASK_SH
| ARC_CONNECT_CMD_DEBUG_MASK_BH | ARC_CONNECT_CMD_DEBUG_MASK_AH
| ARC_CONNECT_CMD_DEBUG_MASK_H));
}
#endif
/* the C entry of slave cores */
void z_arc_slave_start(int cpu_num)
{
arch_cpustart_t fn;
#ifdef CONFIG_SMP
struct arc_connect_bcr bcr;
bcr.val = z_arc_v2_aux_reg_read(_ARC_V2_CONNECT_BCR);
if (bcr.dbg) {
/* configure inter-core debug unit if available */
arc_connect_debug_mask_update(cpu_num);
}
z_icache_setup();
z_irq_setup();
z_arc_connect_ici_clear();
@@ -130,7 +103,7 @@ void arch_sched_ipi(void)
/* broadcast sched_ipi request to other cores
* if the target is current core, hardware will ignore it
*/
for (i = 0U; i < CONFIG_MP_NUM_CPUS; i++) {
for (i = 0; i < CONFIG_MP_NUM_CPUS; i++) {
z_arc_connect_ici_generate(i);
}
}
@@ -145,11 +118,6 @@ static int arc_smp_init(const struct device *dev)
bcr.val = z_arc_v2_aux_reg_read(_ARC_V2_CONNECT_BCR);
if (bcr.dbg) {
/* configure inter-core debug unit if available */
arc_connect_debug_mask_update(0);
}
if (bcr.ipi) {
/* register ici interrupt, just need master core to register once */
z_arc_connect_ici_clear();
@@ -163,6 +131,17 @@ static int arc_smp_init(const struct device *dev)
return -ENODEV;
}
if (bcr.dbg) {
/* configure inter-core debug unit if available */
uint32_t core_mask = (1 << CONFIG_MP_NUM_CPUS) - 1;
z_arc_connect_debug_select_set(core_mask);
/* Debugger halt cores at conditions */
z_arc_connect_debug_mask_set(core_mask, (ARC_CONNECT_CMD_DEBUG_MASK_SH
| ARC_CONNECT_CMD_DEBUG_MASK_BH | ARC_CONNECT_CMD_DEBUG_MASK_AH
| ARC_CONNECT_CMD_DEBUG_MASK_H));
}
if (bcr.gfrc) {
/* global free running count init */
z_arc_connect_gfrc_enable();

View File

@@ -63,7 +63,7 @@ void arch_dcache_enable(void)
static void arch_dcache_flush(void *start_addr_ptr, size_t size)
{
size_t line_size = sys_cache_data_line_size_get();
size_t line_size = sys_dcache_line_size_get();
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
unsigned int key;
@@ -99,7 +99,7 @@ static void arch_dcache_flush(void *start_addr_ptr, size_t size)
static void arch_dcache_invd(void *start_addr_ptr, size_t size)
{
size_t line_size = sys_cache_data_line_size_get();
size_t line_size = sys_dcache_line_size_get();
uintptr_t start_addr = (uintptr_t)start_addr_ptr;
uintptr_t end_addr;
unsigned int key;

View File

@@ -16,7 +16,6 @@
#include <toolchain.h>
#include <linker/sections.h>
#include <arch/cpu.h>
#include <arch/arc/asm-compat/assembler.h>
GTEXT(arch_cpu_idle)
GTEXT(arch_cpu_atomic_idle)
@@ -37,12 +36,11 @@ SECTION_VAR(BSS, z_arc_cpu_sleep_mode)
SECTION_FUNC(TEXT, arch_cpu_idle)
#ifdef CONFIG_TRACING
PUSHR blink
push_s blink
jl sys_trace_idle
POPR blink
pop_s blink
#endif
/* z_arc_cpu_sleep_mode is 32 bit despite of platform bittnes */
ld r1, [z_arc_cpu_sleep_mode]
or r1, r1, (1 << 4) /* set IRQ-enabled bit */
sleep r1
@@ -59,12 +57,11 @@ SECTION_FUNC(TEXT, arch_cpu_idle)
SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
#ifdef CONFIG_TRACING
PUSHR blink
push_s blink
jl sys_trace_idle
POPR blink
pop_s blink
#endif
/* z_arc_cpu_sleep_mode is 32 bit despite of platform bittnes */
ld r1, [z_arc_cpu_sleep_mode]
or r1, r1, (1 << 4) /* set IRQ-enabled bit */
sleep r1

View File

@@ -24,19 +24,17 @@ LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_ARC_EXCEPTION_DEBUG
static void dump_arc_esf(const z_arch_esf_t *esf)
{
LOG_ERR(" r0: 0x%" PRIxPTR " r1: 0x%" PRIxPTR " r2: 0x%" PRIxPTR " r3: 0x%" PRIxPTR "",
LOG_ERR(" r0: 0x%08x r1: 0x%08x r2: 0x%08x r3: 0x%08x",
esf->r0, esf->r1, esf->r2, esf->r3);
LOG_ERR(" r4: 0x%" PRIxPTR " r5: 0x%" PRIxPTR " r6: 0x%" PRIxPTR " r7: 0x%" PRIxPTR "",
LOG_ERR(" r4: 0x%08x r5: 0x%08x r6: 0x%08x r7: 0x%08x",
esf->r4, esf->r5, esf->r6, esf->r7);
LOG_ERR(" r8: 0x%" PRIxPTR " r9: 0x%" PRIxPTR " r10: 0x%" PRIxPTR " r11: 0x%" PRIxPTR "",
LOG_ERR(" r8: 0x%08x r9: 0x%08x r10: 0x%08x r11: 0x%08x",
esf->r8, esf->r9, esf->r10, esf->r11);
LOG_ERR("r12: 0x%" PRIxPTR " r13: 0x%" PRIxPTR " pc: 0x%" PRIxPTR "",
LOG_ERR("r12: 0x%08x r13: 0x%08x pc: 0x%08x",
esf->r12, esf->r13, esf->pc);
LOG_ERR(" blink: 0x%" PRIxPTR " status32: 0x%" PRIxPTR "", esf->blink, esf->status32);
#ifdef CONFIG_ARC_HAS_ZOL
LOG_ERR("lp_end: 0x%" PRIxPTR " lp_start: 0x%" PRIxPTR " lp_count: 0x%" PRIxPTR "",
LOG_ERR(" blink: 0x%08x status32: 0x%08x", esf->blink, esf->status32);
LOG_ERR("lp_end: 0x%08x lp_start: 0x%08x lp_count: 0x%08x",
esf->lp_end, esf->lp_start, esf->lp_count);
#endif /* CONFIG_ARC_HAS_ZOL */
}
#endif

View File

@@ -17,7 +17,6 @@
#include <arch/cpu.h>
#include <swap_macros.h>
#include <syscall.h>
#include <arch/arc/asm-compat/assembler.h>
GTEXT(_Fault)
GTEXT(__reset)
@@ -44,10 +43,10 @@ GTEXT(z_irq_do_offload);
lr r0,[_ARC_V2_ERSEC_STAT]
st_s r0, [sp, ___isf_t_sec_stat_OFFSET]
#endif
LRR r0, [_ARC_V2_ERET]
STR r0, sp, ___isf_t_pc_OFFSET
LRR r0, [_ARC_V2_ERSTATUS]
STR r0, sp, ___isf_t_status32_OFFSET
lr r0,[_ARC_V2_ERET]
st_s r0, [sp, ___isf_t_pc_OFFSET]
lr r0,[_ARC_V2_ERSTATUS]
st_s r0, [sp, ___isf_t_status32_OFFSET]
.endm
/*
@@ -85,9 +84,9 @@ _exc_entry:
* and exception is raised, then here it's guaranteed that
* exception handling has necessary stack to use
*/
MOVR ilink, sp
mov ilink, sp
_get_curr_cpu_irq_stack sp
SUBR sp, sp, (CONFIG_ISR_STACK_SIZE - CONFIG_ARC_EXCEPTION_STACK_SIZE)
sub sp, sp, (CONFIG_ISR_STACK_SIZE - CONFIG_ARC_EXCEPTION_STACK_SIZE)
/*
* save caller saved registers
@@ -103,9 +102,9 @@ _exc_entry:
_save_exc_regs_into_stack
/* sp is parameter of _Fault */
MOVR r0, sp
mov_s r0, sp
/* ilink is the thread's original sp */
MOVR r1, ilink
mov r1, ilink
jl _Fault
_exc_return:
@@ -119,9 +118,9 @@ _exc_return:
_get_next_switch_handle
BREQR r0, r2, _exc_return_from_exc
breq r0, r2, _exc_return_from_exc
MOVR r2, r0
mov_s r2, r0
#ifdef CONFIG_ARC_SECURE_FIRMWARE
/*
@@ -146,8 +145,8 @@ _exc_return:
*/
mov ilink, r2
#endif
LRR r3, [_ARC_V2_STATUS32]
ANDR r3, r3, (~(_ARC_V2_STATUS32_AE | _ARC_V2_STATUS32_RB(7)))
lr r3, [_ARC_V2_STATUS32]
and r3,r3,(~(_ARC_V2_STATUS32_AE | _ARC_V2_STATUS32_RB(7)))
kflag r3
/* pretend lowest priority interrupt happened to use common handler
* if exception is raised in irq, i.e., _ARC_V2_AUX_IRQ_ACT !=0,
@@ -159,7 +158,7 @@ _exc_return:
#ifdef CONFIG_ARC_SECURE_FIRMWARE
mov_s r3, (1 << (ARC_N_IRQ_START_LEVEL - 1))
#else
MOVR r3, (1 << (CONFIG_NUM_IRQ_PRIO_LEVELS - 1))
mov_s r3, (1 << (CONFIG_NUM_IRQ_PRIO_LEVELS - 1))
#endif
#ifdef CONFIG_ARC_NORMAL_FIRMWARE
@@ -170,7 +169,7 @@ _exc_return:
sjli SJLI_CALL_ARC_SECURE
pop_s r2
#else
SRR r3, [_ARC_V2_AUX_IRQ_ACT]
sr r3, [_ARC_V2_AUX_IRQ_ACT]
#endif
#if defined(CONFIG_ARC_FIRQ) && CONFIG_RGF_NUM_BANKS != 1
@@ -184,18 +183,18 @@ _exc_return_from_exc:
/* exception handler may change return address.
* reload it
*/
LDR r0, sp, ___isf_t_pc_OFFSET
SRR r0, [_ARC_V2_ERET]
ld_s r0, [sp, ___isf_t_pc_OFFSET]
sr r0, [_ARC_V2_ERET]
_pop_irq_stack_frame
MOVR sp, ilink
mov sp, ilink
rtie
/* separated entry for trap which may be used by irq_offload, USERPSACE */
SECTION_SUBSEC_FUNC(TEXT,__fault,__ev_trap)
/* get the id of trap_s */
LRR ilink, [_ARC_V2_ECR]
ANDR ilink, ilink, 0x3f
lr ilink, [_ARC_V2_ECR]
and ilink, ilink, 0x3f
#ifdef CONFIG_USERSPACE
cmp ilink, _TRAP_S_CALL_SYSTEM_CALL
bne _do_non_syscall_trap
@@ -237,7 +236,7 @@ _do_non_syscall_trap:
* so its entry is different with normal exception handling, it is
* handled in isr stack
*/
CMPR ilink, _TRAP_S_SCALL_IRQ_OFFLOAD
cmp ilink, _TRAP_S_SCALL_IRQ_OFFLOAD
bne _exc_entry
/* save caller saved registers */
_create_irq_stack_frame
@@ -248,15 +247,15 @@ _do_non_syscall_trap:
_check_and_inc_int_nest_counter r0, r1
bne.d exc_nest_handle
MOVR r0, sp
mov_s r0, sp
_get_curr_cpu_irq_stack sp
exc_nest_handle:
PUSHR r0
push_s r0
jl z_irq_do_offload
POPR sp
pop sp
_dec_int_nest_counter r0, r1

View File

@@ -20,7 +20,6 @@
#include <kernel_structs.h>
#include <arch/cpu.h>
#include <swap_macros.h>
#include <arch/arc/asm-compat/assembler.h>
GTEXT(_isr_wrapper)
GTEXT(_isr_demux)
@@ -239,8 +238,8 @@ rirq_path:
j_s [r2]
#endif
#else
MOVR r3, _rirq_exit
MOVR r2, _rirq_enter
mov_s r3, _rirq_exit
mov_s r2, _rirq_enter
j_s [r2]
#endif
@@ -248,15 +247,14 @@ rirq_path:
.macro exit_tickless_idle
#if defined(CONFIG_PM)
clri r0 /* do not interrupt exiting tickless idle operations */
MOVR r1, _kernel
/* z_kernel.idle is 32 bit despite of platform bittnes */
mov_s r1, _kernel
ld_s r3, [r1, _kernel_offset_to_idle] /* requested idle duration */
breq r3, 0, _skip_pm_save_idle_exit
st 0, [r1, _kernel_offset_to_idle] /* zero idle duration */
PUSHR blink
push_s blink
jl z_pm_save_idle_exit
POPR blink
pop_s blink
_skip_pm_save_idle_exit:
seti r0
@@ -265,16 +263,16 @@ _skip_pm_save_idle_exit:
/* when getting here, r3 contains the interrupt exit stub to call */
SECTION_FUNC(TEXT, _isr_demux)
PUSHR r3
push_s r3
/* according to ARCv2 ISA, r25, r30, r58, r59 are caller-saved
* scratch registers, possibly used by interrupt handlers
*/
PUSHR r25
PUSHR r30
push r25
push r30
#ifdef CONFIG_ARC_HAS_ACCL_REGS
PUSHR r58
PUSHR r59
push r58
push r59
#endif
#ifdef CONFIG_TRACING_ISR
@@ -292,30 +290,26 @@ irq_hint_handled:
sub r0, r0, 16
MOVR r1, _sw_isr_table
/* SW ISR table entries are 8-bytes wide for 32bit ISA and
* 16-bytes wide for 64bit ISA */
ASLR r0, r0, (ARC_REGSHIFT + 1)
ADDR r0, r1, r0
/* ISR into r1 */
LDR r1, r0, ARC_REGSZ
mov_s r1, _sw_isr_table
add3 r0, r1, r0 /* table entries are 8-bytes wide */
ld_s r1, [r0, 4] /* ISR into r1 */
jl_s.d [r1]
/* delay slot: ISR parameter into r0 */
LDR r0, r0
ld_s r0, [r0] /* delay slot: ISR parameter into r0 */
#ifdef CONFIG_TRACING_ISR
bl sys_trace_isr_exit
#endif
#ifdef CONFIG_ARC_HAS_ACCL_REGS
POPR r59
POPR r58
pop r59
pop r58
#endif
POPR r30
POPR r25
pop r30
pop r25
/* back from ISR, jump to exit stub */
POPR r3
pop_s r3
j_s [r3]
nop_s

View File

@@ -5,12 +5,11 @@
config ARC_MPU_VER
int "ARC MPU version"
range 2 6
range 2 4
default 2
help
ARC MPU has several versions. For MPU v2, the minimum region is 2048 bytes;
For other versions, the minimum region is 32 bytes; v4 has secure features,
v6 supports up to 32 regions.
For MPU v3, the minimum region is 32 bytes
config ARC_CORE_MPU
bool "ARC Core MPU functionalities"
@@ -32,8 +31,8 @@ config ARC_MPU
select SRAM_REGION_PERMISSIONS
select ARC_CORE_MPU
select THREAD_STACK_INFO
select GEN_PRIV_STACKS if ARC_MPU_VER != 4
select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if ARC_MPU_VER !=4
select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if ARC_MPU_VER = 4
select GEN_PRIV_STACKS if ARC_MPU_VER = 2
select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if ARC_MPU_VER = 2
select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if ARC_MPU_VER = 3
help
Target has ARC MPU (currently only works for EMSK 2.2/2.3 ARCEM7D)

View File

@@ -52,8 +52,8 @@ static inline uint32_t get_region_attr_by_type(uint32_t type)
}
}
#if CONFIG_ARC_MPU_VER == 4
#include "arc_mpu_v4_internal.h"
#else
#include "arc_mpu_common_internal.h"
#if CONFIG_ARC_MPU_VER == 2
#include "arc_mpu_v2_internal.h"
#elif CONFIG_ARC_MPU_VER == 3
#include "arc_mpu_v3_internal.h"
#endif

View File

@@ -1,288 +0,0 @@
/*
* Copyright (c) 2021 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_COMMON_INTERNAL_H_
#define ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_COMMON_INTERNAL_H_
#if CONFIG_ARC_MPU_VER == 2 || CONFIG_ARC_MPU_VER == 3
#include "arc_mpu_v2_internal.h"
#elif CONFIG_ARC_MPU_VER == 6
#include "arc_mpu_v6_internal.h"
#else
#error "Unsupported MPU version"
#endif
/**
* @brief configure the base address and size for an MPU region
*
* @param type MPU region type
* @param base base address in RAM
* @param size size of the region
*/
static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size)
{
int32_t region_index = get_region_index_by_type(type);
uint32_t region_attr = get_region_attr_by_type(type);
LOG_DBG("Region info: 0x%x 0x%x", base, size);
if (region_attr == 0U || region_index < 0) {
return -EINVAL;
}
/*
* For ARC MPU, MPU regions can be overlapped, smaller
* region index has higher priority.
*/
_region_init(region_index, base, size, region_attr);
return 0;
}
/* ARC Core MPU Driver API Implementation for ARC MP */
/**
* @brief enable the MPU
*/
void arc_core_mpu_enable(void)
{
/* Enable MPU */
z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN,
z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) | AUX_MPU_EN_ENABLE);
}
/**
* @brief disable the MPU
*/
void arc_core_mpu_disable(void)
{
/* Disable MPU */
z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN,
z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) & AUX_MPU_EN_DISABLE);
}
/**
* @brief configure the thread's MPU regions
*
* @param thread the target thread
*/
void arc_core_mpu_configure_thread(struct k_thread *thread)
{
#if defined(CONFIG_USERSPACE)
/* configure stack region of user thread */
if (thread->base.user_options & K_USER) {
LOG_DBG("configure user thread %p's stack", thread);
if (_mpu_configure(THREAD_STACK_USER_REGION,
(uint32_t)thread->stack_info.start,
thread->stack_info.size) < 0) {
LOG_ERR("user thread %p's stack failed", thread);
return;
}
}
LOG_DBG("configure thread %p's domain", thread);
arc_core_mpu_configure_mem_domain(thread);
#endif
}
/**
* @brief configure the default region
*
* @param region_attr region attribute of default region
*/
void arc_core_mpu_default(uint32_t region_attr)
{
uint32_t val = z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) & (~AUX_MPU_RDP_ATTR_MASK);
region_attr &= AUX_MPU_RDP_ATTR_MASK;
z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, region_attr | val);
}
/**
* @brief configure the MPU region
*
* @param index MPU region index
* @param base base address
* @param region_attr region attribute
*/
int arc_core_mpu_region(uint32_t index, uint32_t base, uint32_t size, uint32_t region_attr)
{
if (index >= get_num_regions()) {
return -EINVAL;
}
region_attr &= AUX_MPU_RDP_ATTR_MASK;
_region_init(index, base, size, region_attr);
return 0;
}
#if defined(CONFIG_USERSPACE)
/**
* @brief configure MPU regions for the memory partitions of the memory domain
*
* @param thread the thread which has memory domain
*/
void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
{
int region_index = get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
uint32_t num_partitions;
struct k_mem_partition *pparts;
struct k_mem_domain *mem_domain = NULL;
if (thread) {
mem_domain = thread->mem_domain_info.mem_domain;
}
if (mem_domain) {
LOG_DBG("configure domain: %p", mem_domain);
num_partitions = mem_domain->num_partitions;
pparts = mem_domain->partitions;
} else {
LOG_DBG("disable domain partition regions");
num_partitions = 0U;
pparts = NULL;
}
for (; region_index >= 0; region_index--) {
if (num_partitions) {
LOG_DBG("set region 0x%x 0x%lx 0x%x",
region_index, pparts->start, pparts->size);
_region_init(region_index, pparts->start, pparts->size, pparts->attr);
num_partitions--;
} else {
/* clear the left mpu entries */
_region_init(region_index, 0, 0, 0);
}
pparts++;
}
}
/**
* @brief remove MPU regions for the memory partitions of the memory domain
*
* @param mem_domain the target memory domain
*/
void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain)
{
ARG_UNUSED(mem_domain);
int region_index = get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
for (; region_index >= 0; region_index--) {
_region_init(region_index, 0, 0, 0);
}
}
/**
* @brief reset MPU region for a single memory partition
*
* @param domain the target memory domain
* @param partition_id memory partition id
*/
void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain, uint32_t part_id)
{
ARG_UNUSED(domain);
int region_index = get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
LOG_DBG("disable region 0x%x", region_index + part_id);
/* Disable region */
_region_init(region_index + part_id, 0, 0, 0);
}
/**
* @brief get the maximum number of free regions for memory domain partitions
*/
int arc_core_mpu_get_max_domain_partition_regions(void)
{
return get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION) + 1;
}
/**
* @brief validate the given buffer is user accessible or not
*/
int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
{
/*
* For ARC MPU, smaller region number takes priority.
* we can stop the iteration immediately once we find the
* matched region that grants permission or denies access.
*
*/
for (int r_index = 0; r_index < get_num_regions(); r_index++) {
if (!_is_enabled_region(r_index) || !_is_in_region(r_index, (uint32_t)addr, size)) {
continue;
}
if (_is_user_accessible_region(r_index, write)) {
return 0;
} else {
return -EPERM;
}
}
return -EPERM;
}
#endif /* CONFIG_USERSPACE */
/* ARC MPU Driver Initial Setup */
/*
* @brief MPU default initialization and configuration
*
* This function provides the default configuration mechanism for the Memory
* Protection Unit (MPU).
*/
static int arc_mpu_init(const struct device *arg)
{
ARG_UNUSED(arg);
uint32_t num_regions = get_num_regions();
if (mpu_config.num_regions > num_regions) {
__ASSERT(0, "Request to configure: %u regions (supported: %u)\n",
mpu_config.num_regions, num_regions);
return -EINVAL;
}
/* Disable MPU */
arc_core_mpu_disable();
/*
* the MPU regions are filled in the reverse order.
* According to ARCv2 ISA, the MPU region with smaller
* index has higher priority. The static background MPU
* regions in mpu_config will be in the bottom. Then
* the special type regions will be above.
*/
int r_index = num_regions - mpu_config.num_regions;
/* clear all the regions first */
for (uint32_t i = 0U; i < r_index; i++) {
_region_init(i, 0, 0, 0);
}
/* configure the static regions */
for (uint32_t i = 0U; i < mpu_config.num_regions; i++) {
_region_init(r_index, mpu_config.mpu_regions[i].base,
mpu_config.mpu_regions[i].size, mpu_config.mpu_regions[i].attr);
r_index++;
}
/* default region: no read, write and execute */
arc_core_mpu_default(0);
/* Enable MPU */
arc_core_mpu_enable();
return 0;
}
SYS_INIT(arc_mpu_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_COMMON_INTERNAL_H_ */

View File

@@ -6,44 +6,18 @@
#ifndef ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V2_INTERNAL_H_
#define ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V2_INTERNAL_H_
#define AUX_MPU_EN_ENABLE BIT(30)
#define AUX_MPU_EN_DISABLE ~BIT(30)
#define AUX_MPU_RDB_VALID_MASK (0x1)
#define AUX_MPU_EN_ENABLE (0x40000000)
#define AUX_MPU_EN_DISABLE (0xBFFFFFFF)
/*
* The size of the region is a 5-bit field, the three MSB bits are
* represented in [11:9] and the two LSB bits are represented in [1:0].
* Together these fields specify the size of the region in bytes:
* 00000-00011 Reserved
* 0x4 32 0x5 64 0x6 128 0x7 256
* 0x8 512 0x9 1k 0xA 2K 0xB 4K
* 0xC 8K 0xD 16K 0xE 32K 0xF 64K
* 0x10 128K 0x11 256K 0x12 512K 0x13 1M
* 0x14 2M 0x15 4M 0x16 8M 0x17 16M
* 0x18 32M 0x19 64M 0x1A 128M 0x1B 256M
* 0x1C 512M 0x1D 1G 0x1E 2G 0x1F 4G
*
* Bit ... 12 11 10 9 8 3 2 1 0
* ------+------------+------+---+-----------+
* ... | SIZE[11:9] | ATTR | R | SIZE[1:0] |
* ------+------------+------+---+-----------+
*/
/* arrange size into proper bit field in RDP aux reg*/
#define AUX_MPU_RDP_REGION_SIZE(size) (((size - 1) & BIT_MASK(2)) | \
(((size - 1) & (BIT_MASK(3) << 2)) << 7))
/* recover size from bit fields in RDP aux reg*/
#define AUX_MPU_RDP_SIZE_SHIFT(rdp) ((rdp & BIT_MASK(2)) | (((rdp >> 9) & BIT_MASK(3)) << 2))
#define AUX_MPU_RDP_REGION_SIZE(bits) \
(((bits - 1) & 0x3) | (((bits - 1) & 0x1C) << 7))
#define AUX_MPU_RDB_VALID_MASK BIT(0)
#define AUX_MPU_RDP_ATTR_MASK (BIT_MASK(6) << 3)
#define AUX_MPU_RDP_SIZE_MASK ((BIT_MASK(3) << 9) | BIT_MASK(2))
#define AUX_MPU_RDP_ATTR_MASK (0x1FC)
#define AUX_MPU_RDP_SIZE_MASK (0xE03)
/* For MPU version 2, the minimum protection region size is 2048 bytes */
#if CONFIG_ARC_MPU_VER == 2
#define ARC_FEATURE_MPU_ALIGNMENT_BITS 11
/* For MPU version 3, the minimum protection region size is 32 bytes */
#else
#define ARC_FEATURE_MPU_ALIGNMENT_BITS 5
#endif
/**
* This internal function initializes a MPU region
@@ -60,7 +34,7 @@ static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t s
bits = ARC_FEATURE_MPU_ALIGNMENT_BITS;
}
if (BIT(bits) < size) {
if ((1 << bits) < size) {
bits++;
}
@@ -93,7 +67,8 @@ static inline int get_region_index_by_type(uint32_t type)
*/
switch (type) {
case THREAD_STACK_USER_REGION:
return get_num_regions() - mpu_config.num_regions - THREAD_STACK_REGION;
return get_num_regions() - mpu_config.num_regions
- THREAD_STACK_REGION;
case THREAD_STACK_REGION:
case THREAD_APP_DATA_REGION:
case THREAD_DOMAIN_PARTITION_REGION:
@@ -130,14 +105,14 @@ static inline bool _is_in_region(uint32_t r_index, uint32_t start, uint32_t size
& (~AUX_MPU_RDB_VALID_MASK);
r_size_lshift = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDP0 + r_index * 2U)
& AUX_MPU_RDP_SIZE_MASK;
r_size_lshift = AUX_MPU_RDP_SIZE_SHIFT(r_size_lshift);
r_size_lshift = (r_size_lshift & 0x3) | ((r_size_lshift >> 7) & 0x1C);
r_addr_end = r_addr_start + (1 << (r_size_lshift + 1));
if (start >= r_addr_start && (start + size) <= r_addr_end) {
return true;
return 1;
}
return false;
return 0;
}
/**
@@ -160,4 +135,296 @@ static inline bool _is_user_accessible_region(uint32_t r_index, int write)
(AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR));
}
/**
* @brief configure the base address and size for an MPU region
*
* @param type MPU region type
* @param base base address in RAM
* @param size size of the region
*/
static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size)
{
int32_t region_index = get_region_index_by_type(type);
uint32_t region_attr = get_region_attr_by_type(type);
LOG_DBG("Region info: 0x%x 0x%x", base, size);
if (region_attr == 0U || region_index < 0) {
return -EINVAL;
}
/*
* For ARC MPU v2, MPU regions can be overlapped, smaller
* region index has higher priority.
*/
_region_init(region_index, base, size, region_attr);
return 0;
}
/* ARC Core MPU Driver API Implementation for ARC MPUv2 */
/**
* @brief enable the MPU
*/
void arc_core_mpu_enable(void)
{
/* Enable MPU */
z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN,
z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) | AUX_MPU_EN_ENABLE);
}
/**
* @brief disable the MPU
*/
void arc_core_mpu_disable(void)
{
/* Disable MPU */
z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN,
z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) & AUX_MPU_EN_DISABLE);
}
/**
* @brief configure the thread's MPU regions
*
* @param thread the target thread
*/
void arc_core_mpu_configure_thread(struct k_thread *thread)
{
#if defined(CONFIG_USERSPACE)
/* configure stack region of user thread */
if (thread->base.user_options & K_USER) {
LOG_DBG("configure user thread %p's stack", thread);
if (_mpu_configure(THREAD_STACK_USER_REGION,
(uint32_t)thread->stack_info.start,
thread->stack_info.size) < 0) {
LOG_ERR("user thread %p's stack failed", thread);
return;
}
}
LOG_DBG("configure thread %p's domain", thread);
arc_core_mpu_configure_mem_domain(thread);
#endif
}
/**
* @brief configure the default region
*
* @param region_attr region attribute of default region
*/
void arc_core_mpu_default(uint32_t region_attr)
{
uint32_t val = z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) &
(~AUX_MPU_RDP_ATTR_MASK);
region_attr &= AUX_MPU_RDP_ATTR_MASK;
z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, region_attr | val);
}
/**
* @brief configure the MPU region
*
* @param index MPU region index
* @param base base address
* @param region_attr region attribute
*/
int arc_core_mpu_region(uint32_t index, uint32_t base, uint32_t size,
uint32_t region_attr)
{
if (index >= get_num_regions()) {
return -EINVAL;
}
region_attr &= AUX_MPU_RDP_ATTR_MASK;
_region_init(index, base, size, region_attr);
return 0;
}
#if defined(CONFIG_USERSPACE)
/**
* @brief configure MPU regions for the memory partitions of the memory domain
*
* @param thread the thread which has memory domain
*/
void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
{
int region_index =
get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
uint32_t num_partitions;
struct k_mem_partition *pparts;
struct k_mem_domain *mem_domain = NULL;
if (thread) {
mem_domain = thread->mem_domain_info.mem_domain;
}
if (mem_domain) {
LOG_DBG("configure domain: %p", mem_domain);
num_partitions = mem_domain->num_partitions;
pparts = mem_domain->partitions;
} else {
LOG_DBG("disable domain partition regions");
num_partitions = 0U;
pparts = NULL;
}
for (; region_index >= 0; region_index--) {
if (num_partitions) {
LOG_DBG("set region 0x%x 0x%lx 0x%x",
region_index, pparts->start, pparts->size);
_region_init(region_index, pparts->start,
pparts->size, pparts->attr);
num_partitions--;
} else {
/* clear the left mpu entries */
_region_init(region_index, 0, 0, 0);
}
pparts++;
}
}
/**
* @brief remove MPU regions for the memory partitions of the memory domain
*
* @param mem_domain the target memory domain
*/
void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain)
{
ARG_UNUSED(mem_domain);
int region_index =
get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
for (; region_index >= 0; region_index--) {
_region_init(region_index, 0, 0, 0);
}
}
/**
* @brief reset MPU region for a single memory partition
*
* @param domain the target memory domain
* @param partition_id memory partition id
*/
void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain,
uint32_t part_id)
{
ARG_UNUSED(domain);
int region_index =
get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
LOG_DBG("disable region 0x%x", region_index + part_id);
/* Disable region */
_region_init(region_index + part_id, 0, 0, 0);
}
/**
* @brief get the maximum number of free regions for memory domain partitions
*/
int arc_core_mpu_get_max_domain_partition_regions(void)
{
return get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION) + 1;
}
/**
* @brief validate the given buffer is user accessible or not
*/
int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
{
int r_index;
/*
* For ARC MPU v2, smaller region number takes priority.
* we can stop the iteration immediately once we find the
* matched region that grants permission or denies access.
*
*/
for (r_index = 0; r_index < get_num_regions(); r_index++) {
if (!_is_enabled_region(r_index) ||
!_is_in_region(r_index, (uint32_t)addr, size)) {
continue;
}
if (_is_user_accessible_region(r_index, write)) {
return 0;
} else {
return -EPERM;
}
}
return -EPERM;
}
#endif /* CONFIG_USERSPACE */
/* ARC MPU Driver Initial Setup */
/*
* @brief MPU default initialization and configuration
*
* This function provides the default configuration mechanism for the Memory
* Protection Unit (MPU).
*/
static int arc_mpu_init(const struct device *arg)
{
ARG_UNUSED(arg);
uint32_t num_regions;
uint32_t i;
num_regions = get_num_regions();
/* ARC MPU supports up to 16 Regions */
if (mpu_config.num_regions > num_regions) {
__ASSERT(0,
"Request to configure: %u regions (supported: %u)\n",
mpu_config.num_regions, num_regions);
return -EINVAL;
}
/* Disable MPU */
arc_core_mpu_disable();
int r_index;
/*
* the MPU regions are filled in the reverse order.
* According to ARCv2 ISA, the MPU region with smaller
* index has higher priority. The static background MPU
* regions in mpu_config will be in the bottom. Then
* the special type regions will be above.
*
*/
r_index = num_regions - mpu_config.num_regions;
/* clear all the regions first */
for (i = 0U; i < r_index; i++) {
_region_init(i, 0, 0, 0);
}
/* configure the static regions */
for (i = 0U; i < mpu_config.num_regions; i++) {
_region_init(r_index,
mpu_config.mpu_regions[i].base,
mpu_config.mpu_regions[i].size,
mpu_config.mpu_regions[i].attr);
r_index++;
}
/* default region: no read, write and execute */
arc_core_mpu_default(0);
/* Enable MPU */
arc_core_mpu_enable();
return 0;
}
SYS_INIT(arc_mpu_init, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V2_INTERNAL_H_ */

View File

@@ -0,0 +1,896 @@
/*
* Copyright (c) 2019 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V3_INTERNAL_H_
#define ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V3_INTERNAL_H_
#define AUX_MPU_RPER_SID1 0x10000
/* valid mask: SID1+secure+valid */
#define AUX_MPU_RPER_VALID_MASK ((0x1) | AUX_MPU_RPER_SID1 | AUX_MPU_ATTR_S)
#define AUX_MPU_RPER_ATTR_MASK (0x1FF)
/* For MPU version 3, the minimum protection region size is 32 bytes */
#define ARC_FEATURE_MPU_ALIGNMENT_BITS 5
#define CALC_REGION_END_ADDR(start, size) \
(start + size - (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS))
/* ARC MPU version 3 does not support mpu region overlap in hardware
* so if we want to allocate MPU region dynamically, e.g. thread stack,
* memory domain from a background region, a dynamic region splitting
* approach is designed. pls see comments in
* _dynamic_region_allocate_and_init
* But this approach has an impact on performance of thread switch.
* As a trade off, we can use the default mpu region as the background region
* to avoid the dynamic region splitting. This will give more privilege to
* codes in kernel mode which can access the memory region not covered by
* explicit mpu entry. Considering memory protection is mainly used to
* isolate malicious codes in user mode, it makes sense to get better
* thread switch performance through default mpu region.
* CONFIG_MPU_GAP_FILLING is used to turn this on/off.
*
*/
#if defined(CONFIG_MPU_GAP_FILLING)
#if defined(CONFIG_USERSPACE) && defined(CONFIG_MPU_STACK_GUARD)
/* 1 for stack guard , 1 for user thread, 1 for split */
#define MPU_REGION_NUM_FOR_THREAD 3
#elif defined(CONFIG_USERSPACE) || defined(CONFIG_MPU_STACK_GUARD)
/* 1 for stack guard or user thread stack , 1 for split */
#define MPU_REGION_NUM_FOR_THREAD 2
#else
#define MPU_REGION_NUM_FOR_THREAD 0
#endif
#define MPU_DYNAMIC_REGION_AREAS_NUM 2
/**
* @brief internal structure holding information of
* memory areas where dynamic MPU programming is allowed.
*/
struct dynamic_region_info {
uint8_t index;
uint32_t base;
uint32_t size;
uint32_t attr;
};
static uint8_t dynamic_regions_num;
static uint8_t dynamic_region_index;
/**
* Global array, holding the MPU region index of
* the memory region inside which dynamic memory
* regions may be configured.
*/
static struct dynamic_region_info dyn_reg_info[MPU_DYNAMIC_REGION_AREAS_NUM];
#endif /* CONFIG_MPU_GAP_FILLING */
static uint8_t static_regions_num;
#ifdef CONFIG_ARC_NORMAL_FIRMWARE
/* \todo through secure service to access mpu */
static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size,
uint32_t region_attr)
{
}
static inline void _region_set_attr(uint32_t index, uint32_t attr)
{
}
static inline uint32_t _region_get_attr(uint32_t index)
{
return 0;
}
static inline uint32_t _region_get_start(uint32_t index)
{
return 0;
}
static inline void _region_set_start(uint32_t index, uint32_t start)
{
}
static inline uint32_t _region_get_end(uint32_t index)
{
return 0;
}
static inline void _region_set_end(uint32_t index, uint32_t end)
{
}
/**
* This internal function probes the given addr's MPU index.if not
* in MPU, returns error
*/
static inline int _mpu_probe(uint32_t addr)
{
return -EINVAL;
}
/**
* This internal function checks if MPU region is enabled or not
*/
static inline bool _is_enabled_region(uint32_t r_index)
{
return false;
}
/**
* This internal function check if the region is user accessible or not
*/
static inline bool _is_user_accessible_region(uint32_t r_index, int write)
{
return false;
}
#else /* CONFIG_ARC_NORMAL_FIRMWARE */
/* the following functions are prepared for SECURE_FRIMWARE */
static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size,
uint32_t region_attr)
{
if (size < (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS)) {
size = (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS);
}
if (region_attr) {
region_attr &= AUX_MPU_RPER_ATTR_MASK;
region_attr |= AUX_MPU_RPER_VALID_MASK;
}
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RSTART, region_addr);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_REND,
CALC_REGION_END_ADDR(region_addr, size));
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, region_attr);
}
static inline void _region_set_attr(uint32_t index, uint32_t attr)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, attr |
AUX_MPU_RPER_VALID_MASK);
}
static inline uint32_t _region_get_attr(uint32_t index)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
return z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER);
}
static inline uint32_t _region_get_start(uint32_t index)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
return z_arc_v2_aux_reg_read(_ARC_V2_MPU_RSTART);
}
static inline void _region_set_start(uint32_t index, uint32_t start)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RSTART, start);
}
static inline uint32_t _region_get_end(uint32_t index)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
return z_arc_v2_aux_reg_read(_ARC_V2_MPU_REND) +
(1 << ARC_FEATURE_MPU_ALIGNMENT_BITS);
}
static inline void _region_set_end(uint32_t index, uint32_t end)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_REND, end -
(1 << ARC_FEATURE_MPU_ALIGNMENT_BITS));
}
/**
* This internal function probes the given addr's MPU index.if not
* in MPU, returns error
*/
static inline int _mpu_probe(uint32_t addr)
{
uint32_t val;
z_arc_v2_aux_reg_write(_ARC_V2_MPU_PROBE, addr);
val = z_arc_v2_aux_reg_read(_ARC_V2_MPU_INDEX);
/* if no match or multiple regions match, return error */
if (val & 0xC0000000) {
return -EINVAL;
} else {
return val;
}
}
/**
* This internal function checks if MPU region is enabled or not
*/
static inline bool _is_enabled_region(uint32_t r_index)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index);
return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER) &
AUX_MPU_RPER_VALID_MASK) == AUX_MPU_RPER_VALID_MASK);
}
/**
* This internal function check if the region is user accessible or not
*/
static inline bool _is_user_accessible_region(uint32_t r_index, int write)
{
uint32_t r_ap;
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index);
r_ap = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER);
r_ap &= AUX_MPU_RPER_ATTR_MASK;
if (write) {
return ((r_ap & (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW)) ==
(AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW));
}
return ((r_ap & (AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR)) ==
(AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR));
}
#endif /* CONFIG_ARC_NORMAL_FIRMWARE */
/**
* This internal function checks the area given by (start, size)
* and returns the index if the area match one MPU entry
*/
static inline int _get_region_index(uint32_t start, uint32_t size)
{
int index = _mpu_probe(start);
if (index > 0 && index == _mpu_probe(start + size - 1)) {
return index;
}
return -EINVAL;
}
#if defined(CONFIG_MPU_GAP_FILLING)
/**
* This internal function allocates a dynamic MPU region and returns
* the index or error
*/
static inline int _dynamic_region_allocate_index(void)
{
if (dynamic_region_index >= get_num_regions()) {
LOG_ERR("no enough mpu entries %d", dynamic_region_index);
return -EINVAL;
}
return dynamic_region_index++;
}
/* @brief allocate and init a dynamic MPU region
*
* This internal function performs the allocation and initialization of
* a dynamic MPU region
*
* @param base region base
* @param size region size
* @param attr region attribute
* @return <0 failure, >0 allocated dynamic region index
*/
static int _dynamic_region_allocate_and_init(uint32_t base, uint32_t size,
uint32_t attr)
{
int u_region_index = _get_region_index(base, size);
int region_index;
LOG_DBG("Region info: base 0x%x size 0x%x attr 0x%x", base, size, attr);
if (u_region_index == -EINVAL) {
/* no underlying region */
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
/* a new region */
_region_init(region_index, base, size, attr);
}
return region_index;
}
/*
* The new memory region is to be placed inside the underlying
* region, possibly splitting the underlying region into two.
*/
uint32_t u_region_start = _region_get_start(u_region_index);
uint32_t u_region_end = _region_get_end(u_region_index);
uint32_t u_region_attr = _region_get_attr(u_region_index);
uint32_t end = base + size;
if ((base == u_region_start) && (end == u_region_end)) {
/* The new region overlaps entirely with the
* underlying region. In this case we simply
* update the partition attributes of the
* underlying region with those of the new
* region.
*/
_region_init(u_region_index, base, size, attr);
region_index = u_region_index;
} else if (base == u_region_start) {
/* The new region starts exactly at the start of the
* underlying region; the start of the underlying
* region needs to be set to the end of the new region.
*/
_region_set_start(u_region_index, base + size);
_region_set_attr(u_region_index, u_region_attr);
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
_region_init(region_index, base, size, attr);
}
} else if (end == u_region_end) {
/* The new region ends exactly at the end of the
* underlying region; the end of the underlying
* region needs to be set to the start of the
* new region.
*/
_region_set_end(u_region_index, base);
_region_set_attr(u_region_index, u_region_attr);
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
_region_init(region_index, base, size, attr);
}
} else {
/* The new region lies strictly inside the
* underlying region, which needs to split
* into two regions.
*/
_region_set_end(u_region_index, base);
_region_set_attr(u_region_index, u_region_attr);
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
_region_init(region_index, base, size, attr);
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
_region_init(region_index, base + size,
u_region_end - end, u_region_attr);
}
}
}
return region_index;
}
/* @brief reset the dynamic MPU regions
*
* This internal function performs the reset of dynamic MPU regions
*/
static void _mpu_reset_dynamic_regions(void)
{
uint32_t i;
uint32_t num_regions = get_num_regions();
for (i = static_regions_num; i < num_regions; i++) {
_region_init(i, 0, 0, 0);
}
for (i = 0U; i < dynamic_regions_num; i++) {
_region_init(
dyn_reg_info[i].index,
dyn_reg_info[i].base,
dyn_reg_info[i].size,
dyn_reg_info[i].attr);
}
/* dynamic regions are after static regions */
dynamic_region_index = static_regions_num;
}
/**
* @brief configure the base address and size for an MPU region
*
* @param type MPU region type
* @param base base address in RAM
* @param size size of the region
*/
static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size)
{
uint32_t region_attr = get_region_attr_by_type(type);
return _dynamic_region_allocate_and_init(base, size, region_attr);
}
#else
/**
* This internal function is utilized by the MPU driver to parse the intent
* type (i.e. THREAD_STACK_REGION) and return the correct region index.
*/
static inline int get_region_index_by_type(uint32_t type)
{
/*
* The new MPU regions are allocated per type after the statically
* configured regions. The type is one-indexed rather than
* zero-indexed.
*
* For ARC MPU v2, the smaller index has higher priority, so the
* index is allocated in reverse order. Static regions start from
* the biggest index, then thread related regions.
*
*/
switch (type) {
case THREAD_STACK_USER_REGION:
return static_regions_num + THREAD_STACK_REGION;
case THREAD_STACK_REGION:
case THREAD_APP_DATA_REGION:
case THREAD_STACK_GUARD_REGION:
return static_regions_num + type;
case THREAD_DOMAIN_PARTITION_REGION:
#if defined(CONFIG_MPU_STACK_GUARD)
return static_regions_num + type;
#else
/*
* Start domain partition region from stack guard region
* since stack guard is not enabled.
*/
return static_regions_num + type - 1;
#endif
default:
__ASSERT(0, "Unsupported type");
return -EINVAL;
}
}
/**
* @brief configure the base address and size for an MPU region
*
* @param type MPU region type
* @param base base address in RAM
* @param size size of the region
*/
static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size)
{
int region_index = get_region_index_by_type(type);
uint32_t region_attr = get_region_attr_by_type(type);
LOG_DBG("Region info: 0x%x 0x%x", base, size);
if (region_attr == 0U || region_index < 0) {
return -EINVAL;
}
_region_init(region_index, base, size, region_attr);
return 0;
}
#endif
/* ARC Core MPU Driver API Implementation for ARC MPUv3 */
/**
* @brief enable the MPU
*/
void arc_core_mpu_enable(void)
{
#ifdef CONFIG_ARC_SECURE_FIRMWARE
/* the default region:
* secure:0x8000, SID:0x10000, KW:0x100 KR:0x80
*/
#define MPU_ENABLE_ATTR 0x18180
#else
#define MPU_ENABLE_ATTR 0
#endif
arc_core_mpu_default(MPU_ENABLE_ATTR);
}
/**
* @brief disable the MPU
*/
void arc_core_mpu_disable(void)
{
/* MPU is always enabled, use default region to
* simulate MPU disable
*/
arc_core_mpu_default(REGION_ALL_ATTR | AUX_MPU_ATTR_S |
AUX_MPU_RPER_SID1);
}
/**
* @brief configure the thread's mpu regions
*
* @param thread the target thread
*/
void arc_core_mpu_configure_thread(struct k_thread *thread)
{
#if defined(CONFIG_MPU_GAP_FILLING)
/* the mpu entries of ARC MPUv3 are divided into 2 parts:
* static entries: global mpu entries, not changed in context switch
* dynamic entries: MPU entries changed in context switch and
* memory domain configure, including:
* MPU entries for user thread stack
* MPU entries for stack guard
* MPU entries for mem domain
* MPU entries for other thread specific regions
* before configuring thread specific mpu entries, need to reset dynamic
* entries
*/
_mpu_reset_dynamic_regions();
#endif
#if defined(CONFIG_MPU_STACK_GUARD)
uint32_t guard_start;
/* Set location of guard area when the thread is running in
* supervisor mode. For a supervisor thread, this is just low
* memory in the stack buffer. For a user thread, it only runs
* in supervisor mode when handling a system call on the privilege
* elevation stack.
*/
#if defined(CONFIG_USERSPACE)
if ((thread->base.user_options & K_USER) != 0U) {
guard_start = thread->arch.priv_stack_start;
} else
#endif
{
guard_start = thread->stack_info.start;
}
guard_start -= Z_ARC_STACK_GUARD_SIZE;
if (_mpu_configure(THREAD_STACK_GUARD_REGION, guard_start,
Z_ARC_STACK_GUARD_SIZE) < 0) {
LOG_ERR("thread %p's stack guard failed", thread);
return;
}
#endif /* CONFIG_MPU_STACK_GUARD */
#if defined(CONFIG_USERSPACE)
/* configure stack region of user thread */
if (thread->base.user_options & K_USER) {
LOG_DBG("configure user thread %p's stack", thread);
if (_mpu_configure(THREAD_STACK_USER_REGION,
(uint32_t)thread->stack_info.start,
thread->stack_info.size) < 0) {
LOG_ERR("thread %p's stack failed", thread);
return;
}
}
#if defined(CONFIG_MPU_GAP_FILLING)
uint32_t num_partitions;
struct k_mem_partition *pparts;
struct k_mem_domain *mem_domain = thread->mem_domain_info.mem_domain;
/* configure thread's memory domain */
if (mem_domain) {
LOG_DBG("configure thread %p's domain: %p",
thread, mem_domain);
num_partitions = mem_domain->num_partitions;
pparts = mem_domain->partitions;
} else {
num_partitions = 0U;
pparts = NULL;
}
for (uint32_t i = 0; i < num_partitions; i++) {
if (pparts->size) {
if (_dynamic_region_allocate_and_init(pparts->start,
pparts->size, pparts->attr) < 0) {
LOG_ERR(
"thread %p's mem region: %p failed",
thread, pparts);
return;
}
}
pparts++;
}
#else
arc_core_mpu_configure_mem_domain(thread);
#endif
#endif
}
/**
* @brief configure the default region
*
* @param region_attr region attribute of default region
*/
void arc_core_mpu_default(uint32_t region_attr)
{
#ifdef CONFIG_ARC_NORMAL_FIRMWARE
/* \todo through secure service to access mpu */
#else
z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, region_attr);
#endif
}
/**
* @brief configure the MPU region
*
* @param index MPU region index
* @param base base address
* @param size region size
* @param region_attr region attribute
*/
int arc_core_mpu_region(uint32_t index, uint32_t base, uint32_t size,
uint32_t region_attr)
{
if (index >= get_num_regions()) {
return -EINVAL;
}
region_attr &= AUX_MPU_RPER_ATTR_MASK;
_region_init(index, base, size, region_attr);
return 0;
}
#if defined(CONFIG_USERSPACE)
/**
* @brief configure MPU regions for the memory partitions of the memory domain
*
* @param thread the thread which has memory domain
*/
#if defined(CONFIG_MPU_GAP_FILLING)
void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
{
arc_core_mpu_configure_thread(thread);
}
#else
void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
{
uint32_t region_index;
uint32_t num_partitions;
uint32_t num_regions;
struct k_mem_partition *pparts;
struct k_mem_domain *mem_domain = NULL;
if (thread) {
mem_domain = thread->mem_domain_info.mem_domain;
}
if (mem_domain) {
LOG_DBG("configure domain: %p", mem_domain);
num_partitions = mem_domain->num_partitions;
pparts = mem_domain->partitions;
} else {
LOG_DBG("disable domain partition regions");
num_partitions = 0U;
pparts = NULL;
}
num_regions = get_num_regions();
region_index = get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
while (num_partitions && region_index < num_regions) {
if (pparts->size > 0) {
LOG_DBG("set region 0x%x 0x%lx 0x%x",
region_index, pparts->start, pparts->size);
_region_init(region_index, pparts->start,
pparts->size, pparts->attr);
region_index++;
}
pparts++;
num_partitions--;
}
while (region_index < num_regions) {
/* clear the left mpu entries */
_region_init(region_index, 0, 0, 0);
region_index++;
}
}
#endif
/**
* @brief remove MPU regions for the memory partitions of the memory domain
*
* @param mem_domain the target memory domain
*/
void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain)
{
uint32_t num_partitions;
struct k_mem_partition *pparts;
int index;
if (mem_domain) {
LOG_DBG("configure domain: %p", mem_domain);
num_partitions = mem_domain->num_partitions;
pparts = mem_domain->partitions;
} else {
LOG_DBG("disable domain partition regions");
num_partitions = 0U;
pparts = NULL;
}
for (uint32_t i = 0; i < num_partitions; i++) {
if (pparts->size) {
index = _get_region_index(pparts->start,
pparts->size);
if (index > 0) {
#if defined(CONFIG_MPU_GAP_FILLING)
_region_set_attr(index,
REGION_KERNEL_RAM_ATTR);
#else
_region_init(index, 0, 0, 0);
#endif
}
}
pparts++;
}
}
/**
* @brief reset MPU region for a single memory partition
*
* @param partition_id memory partition id
*/
void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain,
uint32_t partition_id)
{
struct k_mem_partition *partition = &domain->partitions[partition_id];
int region_index = _get_region_index(partition->start,
partition->size);
if (region_index < 0) {
return;
}
LOG_DBG("remove region 0x%x", region_index);
#if defined(CONFIG_MPU_GAP_FILLING)
_region_set_attr(region_index, REGION_KERNEL_RAM_ATTR);
#else
_region_init(region_index, 0, 0, 0);
#endif
}
/**
* @brief get the maximum number of free regions for memory domain partitions
*/
int arc_core_mpu_get_max_domain_partition_regions(void)
{
#if defined(CONFIG_MPU_GAP_FILLING)
/* consider the worst case: each partition requires split */
return (get_num_regions() - MPU_REGION_NUM_FOR_THREAD) / 2;
#else
return get_num_regions() -
get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION) - 1;
#endif
}
/**
* @brief validate the given buffer is user accessible or not
*/
int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
{
int r_index;
int key = arch_irq_lock();
/*
* For ARC MPU v3, overlapping is not supported.
* we can stop the iteration immediately once we find the
* matched region that grants permission or denies access.
*/
r_index = _mpu_probe((uint32_t)addr);
/* match and the area is in one region */
if (r_index >= 0 && r_index == _mpu_probe((uint32_t)addr + (size - 1))) {
if (_is_user_accessible_region(r_index, write)) {
r_index = 0;
} else {
r_index = -EPERM;
}
} else {
r_index = -EPERM;
}
arch_irq_unlock(key);
return r_index;
}
#endif /* CONFIG_USERSPACE */
/* ARC MPU Driver Initial Setup */
/*
* @brief MPU default initialization and configuration
*
* This function provides the default configuration mechanism for the Memory
* Protection Unit (MPU).
*/
static int arc_mpu_init(const struct device *arg)
{
ARG_UNUSED(arg);
uint32_t num_regions;
uint32_t i;
num_regions = get_num_regions();
/* ARC MPU supports up to 16 Regions */
if (mpu_config.num_regions > num_regions) {
__ASSERT(0,
"Request to configure: %u regions (supported: %u)\n",
mpu_config.num_regions, num_regions);
return -EINVAL;
}
static_regions_num = 0;
/* Disable MPU */
arc_core_mpu_disable();
for (i = 0U; i < mpu_config.num_regions; i++) {
/* skip empty region */
if (mpu_config.mpu_regions[i].size == 0) {
continue;
}
#if defined(CONFIG_MPU_GAP_FILLING)
_region_init(static_regions_num,
mpu_config.mpu_regions[i].base,
mpu_config.mpu_regions[i].size,
mpu_config.mpu_regions[i].attr);
/* record the static region which can be split */
if (mpu_config.mpu_regions[i].attr & REGION_DYNAMIC) {
if (dynamic_regions_num >=
MPU_DYNAMIC_REGION_AREAS_NUM) {
LOG_ERR("not enough dynamic regions %d",
dynamic_regions_num);
return -EINVAL;
}
dyn_reg_info[dynamic_regions_num].index = i;
dyn_reg_info[dynamic_regions_num].base =
mpu_config.mpu_regions[i].base;
dyn_reg_info[dynamic_regions_num].size =
mpu_config.mpu_regions[i].size;
dyn_reg_info[dynamic_regions_num].attr =
mpu_config.mpu_regions[i].attr;
dynamic_regions_num++;
}
static_regions_num++;
#else
/* dynamic region will be covered by default mpu setting
* no need to configure
*/
if (!(mpu_config.mpu_regions[i].attr & REGION_DYNAMIC)) {
_region_init(static_regions_num,
mpu_config.mpu_regions[i].base,
mpu_config.mpu_regions[i].size,
mpu_config.mpu_regions[i].attr);
static_regions_num++;
}
#endif
}
for (i = static_regions_num; i < num_regions; i++) {
_region_init(i, 0, 0, 0);
}
/* Enable MPU */
arc_core_mpu_enable();
return 0;
}
SYS_INIT(arc_mpu_init, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V3_INTERNAL_H_ */

View File

@@ -1,896 +0,0 @@
/*
* Copyright (c) 2019 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V4_INTERNAL_H_
#define ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V4_INTERNAL_H_
#define AUX_MPU_RPER_SID1 0x10000
/* valid mask: SID1+secure+valid */
#define AUX_MPU_RPER_VALID_MASK ((0x1) | AUX_MPU_RPER_SID1 | AUX_MPU_ATTR_S)
#define AUX_MPU_RPER_ATTR_MASK (0x1FF)
/* For MPU version 4, the minimum protection region size is 32 bytes */
#define ARC_FEATURE_MPU_ALIGNMENT_BITS 5
#define CALC_REGION_END_ADDR(start, size) \
(start + size - (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS))
/* ARC MPU version 4 does not support mpu region overlap in hardware
* so if we want to allocate MPU region dynamically, e.g. thread stack,
* memory domain from a background region, a dynamic region splitting
* approach is designed. pls see comments in
* _dynamic_region_allocate_and_init
* But this approach has an impact on performance of thread switch.
* As a trade off, we can use the default mpu region as the background region
* to avoid the dynamic region splitting. This will give more privilege to
* codes in kernel mode which can access the memory region not covered by
* explicit mpu entry. Considering memory protection is mainly used to
* isolate malicious codes in user mode, it makes sense to get better
* thread switch performance through default mpu region.
* CONFIG_MPU_GAP_FILLING is used to turn this on/off.
*
*/
#if defined(CONFIG_MPU_GAP_FILLING)
#if defined(CONFIG_USERSPACE) && defined(CONFIG_MPU_STACK_GUARD)
/* 1 for stack guard , 1 for user thread, 1 for split */
#define MPU_REGION_NUM_FOR_THREAD 3
#elif defined(CONFIG_USERSPACE) || defined(CONFIG_MPU_STACK_GUARD)
/* 1 for stack guard or user thread stack , 1 for split */
#define MPU_REGION_NUM_FOR_THREAD 2
#else
#define MPU_REGION_NUM_FOR_THREAD 0
#endif
#define MPU_DYNAMIC_REGION_AREAS_NUM 2
/**
* @brief internal structure holding information of
* memory areas where dynamic MPU programming is allowed.
*/
struct dynamic_region_info {
uint8_t index;
uint32_t base;
uint32_t size;
uint32_t attr;
};
static uint8_t dynamic_regions_num;
static uint8_t dynamic_region_index;
/**
* Global array, holding the MPU region index of
* the memory region inside which dynamic memory
* regions may be configured.
*/
static struct dynamic_region_info dyn_reg_info[MPU_DYNAMIC_REGION_AREAS_NUM];
#endif /* CONFIG_MPU_GAP_FILLING */
static uint8_t static_regions_num;
#ifdef CONFIG_ARC_NORMAL_FIRMWARE
/* \todo through secure service to access mpu */
static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size,
uint32_t region_attr)
{
}
static inline void _region_set_attr(uint32_t index, uint32_t attr)
{
}
static inline uint32_t _region_get_attr(uint32_t index)
{
return 0;
}
static inline uint32_t _region_get_start(uint32_t index)
{
return 0;
}
static inline void _region_set_start(uint32_t index, uint32_t start)
{
}
static inline uint32_t _region_get_end(uint32_t index)
{
return 0;
}
static inline void _region_set_end(uint32_t index, uint32_t end)
{
}
/**
* This internal function probes the given addr's MPU index.if not
* in MPU, returns error
*/
static inline int _mpu_probe(uint32_t addr)
{
return -EINVAL;
}
/**
* This internal function checks if MPU region is enabled or not
*/
static inline bool _is_enabled_region(uint32_t r_index)
{
return false;
}
/**
* This internal function check if the region is user accessible or not
*/
static inline bool _is_user_accessible_region(uint32_t r_index, int write)
{
return false;
}
#else /* CONFIG_ARC_NORMAL_FIRMWARE */
/* the following functions are prepared for SECURE_FRIMWARE */
static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size,
uint32_t region_attr)
{
if (size < (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS)) {
size = (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS);
}
if (region_attr) {
region_attr &= AUX_MPU_RPER_ATTR_MASK;
region_attr |= AUX_MPU_RPER_VALID_MASK;
}
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RSTART, region_addr);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_REND,
CALC_REGION_END_ADDR(region_addr, size));
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, region_attr);
}
static inline void _region_set_attr(uint32_t index, uint32_t attr)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, attr |
AUX_MPU_RPER_VALID_MASK);
}
static inline uint32_t _region_get_attr(uint32_t index)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
return z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER);
}
static inline uint32_t _region_get_start(uint32_t index)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
return z_arc_v2_aux_reg_read(_ARC_V2_MPU_RSTART);
}
static inline void _region_set_start(uint32_t index, uint32_t start)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RSTART, start);
}
static inline uint32_t _region_get_end(uint32_t index)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
return z_arc_v2_aux_reg_read(_ARC_V2_MPU_REND) +
(1 << ARC_FEATURE_MPU_ALIGNMENT_BITS);
}
static inline void _region_set_end(uint32_t index, uint32_t end)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_REND, end -
(1 << ARC_FEATURE_MPU_ALIGNMENT_BITS));
}
/**
* This internal function probes the given addr's MPU index.if not
* in MPU, returns error
*/
static inline int _mpu_probe(uint32_t addr)
{
uint32_t val;
z_arc_v2_aux_reg_write(_ARC_V2_MPU_PROBE, addr);
val = z_arc_v2_aux_reg_read(_ARC_V2_MPU_INDEX);
/* if no match or multiple regions match, return error */
if (val & 0xC0000000) {
return -EINVAL;
} else {
return val;
}
}
/**
* This internal function checks if MPU region is enabled or not
*/
static inline bool _is_enabled_region(uint32_t r_index)
{
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index);
return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER) &
AUX_MPU_RPER_VALID_MASK) == AUX_MPU_RPER_VALID_MASK);
}
/**
* This internal function check if the region is user accessible or not
*/
static inline bool _is_user_accessible_region(uint32_t r_index, int write)
{
uint32_t r_ap;
z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index);
r_ap = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER);
r_ap &= AUX_MPU_RPER_ATTR_MASK;
if (write) {
return ((r_ap & (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW)) ==
(AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW));
}
return ((r_ap & (AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR)) ==
(AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR));
}
#endif /* CONFIG_ARC_NORMAL_FIRMWARE */
/**
* This internal function checks the area given by (start, size)
* and returns the index if the area match one MPU entry
*/
static inline int _get_region_index(uint32_t start, uint32_t size)
{
int index = _mpu_probe(start);
if (index > 0 && index == _mpu_probe(start + size - 1)) {
return index;
}
return -EINVAL;
}
#if defined(CONFIG_MPU_GAP_FILLING)
/**
* This internal function allocates a dynamic MPU region and returns
* the index or error
*/
static inline int _dynamic_region_allocate_index(void)
{
if (dynamic_region_index >= get_num_regions()) {
LOG_ERR("no enough mpu entries %d", dynamic_region_index);
return -EINVAL;
}
return dynamic_region_index++;
}
/* @brief allocate and init a dynamic MPU region
*
* This internal function performs the allocation and initialization of
* a dynamic MPU region
*
* @param base region base
* @param size region size
* @param attr region attribute
* @return <0 failure, >0 allocated dynamic region index
*/
static int _dynamic_region_allocate_and_init(uint32_t base, uint32_t size,
uint32_t attr)
{
int u_region_index = _get_region_index(base, size);
int region_index;
LOG_DBG("Region info: base 0x%x size 0x%x attr 0x%x", base, size, attr);
if (u_region_index == -EINVAL) {
/* no underlying region */
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
/* a new region */
_region_init(region_index, base, size, attr);
}
return region_index;
}
/*
* The new memory region is to be placed inside the underlying
* region, possibly splitting the underlying region into two.
*/
uint32_t u_region_start = _region_get_start(u_region_index);
uint32_t u_region_end = _region_get_end(u_region_index);
uint32_t u_region_attr = _region_get_attr(u_region_index);
uint32_t end = base + size;
if ((base == u_region_start) && (end == u_region_end)) {
/* The new region overlaps entirely with the
* underlying region. In this case we simply
* update the partition attributes of the
* underlying region with those of the new
* region.
*/
_region_init(u_region_index, base, size, attr);
region_index = u_region_index;
} else if (base == u_region_start) {
/* The new region starts exactly at the start of the
* underlying region; the start of the underlying
* region needs to be set to the end of the new region.
*/
_region_set_start(u_region_index, base + size);
_region_set_attr(u_region_index, u_region_attr);
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
_region_init(region_index, base, size, attr);
}
} else if (end == u_region_end) {
/* The new region ends exactly at the end of the
* underlying region; the end of the underlying
* region needs to be set to the start of the
* new region.
*/
_region_set_end(u_region_index, base);
_region_set_attr(u_region_index, u_region_attr);
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
_region_init(region_index, base, size, attr);
}
} else {
/* The new region lies strictly inside the
* underlying region, which needs to split
* into two regions.
*/
_region_set_end(u_region_index, base);
_region_set_attr(u_region_index, u_region_attr);
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
_region_init(region_index, base, size, attr);
region_index = _dynamic_region_allocate_index();
if (region_index > 0) {
_region_init(region_index, base + size,
u_region_end - end, u_region_attr);
}
}
}
return region_index;
}
/* @brief reset the dynamic MPU regions
*
* This internal function performs the reset of dynamic MPU regions
*/
static void _mpu_reset_dynamic_regions(void)
{
uint32_t i;
uint32_t num_regions = get_num_regions();
for (i = static_regions_num; i < num_regions; i++) {
_region_init(i, 0, 0, 0);
}
for (i = 0U; i < dynamic_regions_num; i++) {
_region_init(
dyn_reg_info[i].index,
dyn_reg_info[i].base,
dyn_reg_info[i].size,
dyn_reg_info[i].attr);
}
/* dynamic regions are after static regions */
dynamic_region_index = static_regions_num;
}
/**
* @brief configure the base address and size for an MPU region
*
* @param type MPU region type
* @param base base address in RAM
* @param size size of the region
*/
static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size)
{
uint32_t region_attr = get_region_attr_by_type(type);
return _dynamic_region_allocate_and_init(base, size, region_attr);
}
#else
/**
* This internal function is utilized by the MPU driver to parse the intent
* type (i.e. THREAD_STACK_REGION) and return the correct region index.
*/
static inline int get_region_index_by_type(uint32_t type)
{
/*
* The new MPU regions are allocated per type after the statically
* configured regions. The type is one-indexed rather than
* zero-indexed.
*
* For ARC MPU v2, the smaller index has higher priority, so the
* index is allocated in reverse order. Static regions start from
* the biggest index, then thread related regions.
*
*/
switch (type) {
case THREAD_STACK_USER_REGION:
return static_regions_num + THREAD_STACK_REGION;
case THREAD_STACK_REGION:
case THREAD_APP_DATA_REGION:
case THREAD_STACK_GUARD_REGION:
return static_regions_num + type;
case THREAD_DOMAIN_PARTITION_REGION:
#if defined(CONFIG_MPU_STACK_GUARD)
return static_regions_num + type;
#else
/*
* Start domain partition region from stack guard region
* since stack guard is not enabled.
*/
return static_regions_num + type - 1;
#endif
default:
__ASSERT(0, "Unsupported type");
return -EINVAL;
}
}
/**
* @brief configure the base address and size for an MPU region
*
* @param type MPU region type
* @param base base address in RAM
* @param size size of the region
*/
static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size)
{
int region_index = get_region_index_by_type(type);
uint32_t region_attr = get_region_attr_by_type(type);
LOG_DBG("Region info: 0x%x 0x%x", base, size);
if (region_attr == 0U || region_index < 0) {
return -EINVAL;
}
_region_init(region_index, base, size, region_attr);
return 0;
}
#endif
/* ARC Core MPU Driver API Implementation for ARC MPUv3 */
/**
* @brief enable the MPU
*/
void arc_core_mpu_enable(void)
{
#ifdef CONFIG_ARC_SECURE_FIRMWARE
/* the default region:
* secure:0x8000, SID:0x10000, KW:0x100 KR:0x80
*/
#define MPU_ENABLE_ATTR 0x18180
#else
#define MPU_ENABLE_ATTR 0
#endif
arc_core_mpu_default(MPU_ENABLE_ATTR);
}
/**
* @brief disable the MPU
*/
void arc_core_mpu_disable(void)
{
/* MPU is always enabled, use default region to
* simulate MPU disable
*/
arc_core_mpu_default(REGION_ALL_ATTR | AUX_MPU_ATTR_S |
AUX_MPU_RPER_SID1);
}
/**
* @brief configure the thread's mpu regions
*
* @param thread the target thread
*/
void arc_core_mpu_configure_thread(struct k_thread *thread)
{
#if defined(CONFIG_MPU_GAP_FILLING)
/* the mpu entries of ARC MPUv4 are divided into 2 parts:
* static entries: global mpu entries, not changed in context switch
* dynamic entries: MPU entries changed in context switch and
* memory domain configure, including:
* MPU entries for user thread stack
* MPU entries for stack guard
* MPU entries for mem domain
* MPU entries for other thread specific regions
* before configuring thread specific mpu entries, need to reset dynamic
* entries
*/
_mpu_reset_dynamic_regions();
#endif
#if defined(CONFIG_MPU_STACK_GUARD)
uint32_t guard_start;
/* Set location of guard area when the thread is running in
* supervisor mode. For a supervisor thread, this is just low
* memory in the stack buffer. For a user thread, it only runs
* in supervisor mode when handling a system call on the privilege
* elevation stack.
*/
#if defined(CONFIG_USERSPACE)
if ((thread->base.user_options & K_USER) != 0U) {
guard_start = thread->arch.priv_stack_start;
} else
#endif
{
guard_start = thread->stack_info.start;
}
guard_start -= Z_ARC_STACK_GUARD_SIZE;
if (_mpu_configure(THREAD_STACK_GUARD_REGION, guard_start,
Z_ARC_STACK_GUARD_SIZE) < 0) {
LOG_ERR("thread %p's stack guard failed", thread);
return;
}
#endif /* CONFIG_MPU_STACK_GUARD */
#if defined(CONFIG_USERSPACE)
/* configure stack region of user thread */
if (thread->base.user_options & K_USER) {
LOG_DBG("configure user thread %p's stack", thread);
if (_mpu_configure(THREAD_STACK_USER_REGION,
(uint32_t)thread->stack_info.start,
thread->stack_info.size) < 0) {
LOG_ERR("thread %p's stack failed", thread);
return;
}
}
#if defined(CONFIG_MPU_GAP_FILLING)
uint32_t num_partitions;
struct k_mem_partition *pparts;
struct k_mem_domain *mem_domain = thread->mem_domain_info.mem_domain;
/* configure thread's memory domain */
if (mem_domain) {
LOG_DBG("configure thread %p's domain: %p",
thread, mem_domain);
num_partitions = mem_domain->num_partitions;
pparts = mem_domain->partitions;
} else {
num_partitions = 0U;
pparts = NULL;
}
for (uint32_t i = 0; i < num_partitions; i++) {
if (pparts->size) {
if (_dynamic_region_allocate_and_init(pparts->start,
pparts->size, pparts->attr) < 0) {
LOG_ERR(
"thread %p's mem region: %p failed",
thread, pparts);
return;
}
}
pparts++;
}
#else
arc_core_mpu_configure_mem_domain(thread);
#endif
#endif
}
/**
* @brief configure the default region
*
* @param region_attr region attribute of default region
*/
void arc_core_mpu_default(uint32_t region_attr)
{
#ifdef CONFIG_ARC_NORMAL_FIRMWARE
/* \todo through secure service to access mpu */
#else
z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, region_attr);
#endif
}
/**
* @brief configure the MPU region
*
* @param index MPU region index
* @param base base address
* @param size region size
* @param region_attr region attribute
*/
int arc_core_mpu_region(uint32_t index, uint32_t base, uint32_t size,
uint32_t region_attr)
{
if (index >= get_num_regions()) {
return -EINVAL;
}
region_attr &= AUX_MPU_RPER_ATTR_MASK;
_region_init(index, base, size, region_attr);
return 0;
}
#if defined(CONFIG_USERSPACE)
/**
* @brief configure MPU regions for the memory partitions of the memory domain
*
* @param thread the thread which has memory domain
*/
#if defined(CONFIG_MPU_GAP_FILLING)
void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
{
arc_core_mpu_configure_thread(thread);
}
#else
void arc_core_mpu_configure_mem_domain(struct k_thread *thread)
{
uint32_t region_index;
uint32_t num_partitions;
uint32_t num_regions;
struct k_mem_partition *pparts;
struct k_mem_domain *mem_domain = NULL;
if (thread) {
mem_domain = thread->mem_domain_info.mem_domain;
}
if (mem_domain) {
LOG_DBG("configure domain: %p", mem_domain);
num_partitions = mem_domain->num_partitions;
pparts = mem_domain->partitions;
} else {
LOG_DBG("disable domain partition regions");
num_partitions = 0U;
pparts = NULL;
}
num_regions = get_num_regions();
region_index = get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION);
while (num_partitions && region_index < num_regions) {
if (pparts->size > 0) {
LOG_DBG("set region 0x%x 0x%lx 0x%x",
region_index, pparts->start, pparts->size);
_region_init(region_index, pparts->start,
pparts->size, pparts->attr);
region_index++;
}
pparts++;
num_partitions--;
}
while (region_index < num_regions) {
/* clear the left mpu entries */
_region_init(region_index, 0, 0, 0);
region_index++;
}
}
#endif
/**
* @brief remove MPU regions for the memory partitions of the memory domain
*
* @param mem_domain the target memory domain
*/
void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain)
{
uint32_t num_partitions;
struct k_mem_partition *pparts;
int index;
if (mem_domain) {
LOG_DBG("configure domain: %p", mem_domain);
num_partitions = mem_domain->num_partitions;
pparts = mem_domain->partitions;
} else {
LOG_DBG("disable domain partition regions");
num_partitions = 0U;
pparts = NULL;
}
for (uint32_t i = 0; i < num_partitions; i++) {
if (pparts->size) {
index = _get_region_index(pparts->start,
pparts->size);
if (index > 0) {
#if defined(CONFIG_MPU_GAP_FILLING)
_region_set_attr(index,
REGION_KERNEL_RAM_ATTR);
#else
_region_init(index, 0, 0, 0);
#endif
}
}
pparts++;
}
}
/**
* @brief reset MPU region for a single memory partition
*
* @param partition_id memory partition id
*/
void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain,
uint32_t partition_id)
{
struct k_mem_partition *partition = &domain->partitions[partition_id];
int region_index = _get_region_index(partition->start,
partition->size);
if (region_index < 0) {
return;
}
LOG_DBG("remove region 0x%x", region_index);
#if defined(CONFIG_MPU_GAP_FILLING)
_region_set_attr(region_index, REGION_KERNEL_RAM_ATTR);
#else
_region_init(region_index, 0, 0, 0);
#endif
}
/**
* @brief get the maximum number of free regions for memory domain partitions
*/
int arc_core_mpu_get_max_domain_partition_regions(void)
{
#if defined(CONFIG_MPU_GAP_FILLING)
/* consider the worst case: each partition requires split */
return (get_num_regions() - MPU_REGION_NUM_FOR_THREAD) / 2;
#else
return get_num_regions() -
get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION) - 1;
#endif
}
/**
* @brief validate the given buffer is user accessible or not
*/
int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
{
int r_index;
int key = arch_irq_lock();
/*
* For ARC MPU v4, overlapping is not supported.
* we can stop the iteration immediately once we find the
* matched region that grants permission or denies access.
*/
r_index = _mpu_probe((uint32_t)addr);
/* match and the area is in one region */
if (r_index >= 0 && r_index == _mpu_probe((uint32_t)addr + (size - 1))) {
if (_is_user_accessible_region(r_index, write)) {
r_index = 0;
} else {
r_index = -EPERM;
}
} else {
r_index = -EPERM;
}
arch_irq_unlock(key);
return r_index;
}
#endif /* CONFIG_USERSPACE */
/* ARC MPU Driver Initial Setup */
/*
* @brief MPU default initialization and configuration
*
* This function provides the default configuration mechanism for the Memory
* Protection Unit (MPU).
*/
static int arc_mpu_init(const struct device *arg)
{
ARG_UNUSED(arg);
uint32_t num_regions;
uint32_t i;
num_regions = get_num_regions();
/* ARC MPU supports up to 16 Regions */
if (mpu_config.num_regions > num_regions) {
__ASSERT(0,
"Request to configure: %u regions (supported: %u)\n",
mpu_config.num_regions, num_regions);
return -EINVAL;
}
static_regions_num = 0U;
/* Disable MPU */
arc_core_mpu_disable();
for (i = 0U; i < mpu_config.num_regions; i++) {
/* skip empty region */
if (mpu_config.mpu_regions[i].size == 0) {
continue;
}
#if defined(CONFIG_MPU_GAP_FILLING)
_region_init(static_regions_num,
mpu_config.mpu_regions[i].base,
mpu_config.mpu_regions[i].size,
mpu_config.mpu_regions[i].attr);
/* record the static region which can be split */
if (mpu_config.mpu_regions[i].attr & REGION_DYNAMIC) {
if (dynamic_regions_num >=
MPU_DYNAMIC_REGION_AREAS_NUM) {
LOG_ERR("not enough dynamic regions %d",
dynamic_regions_num);
return -EINVAL;
}
dyn_reg_info[dynamic_regions_num].index = i;
dyn_reg_info[dynamic_regions_num].base =
mpu_config.mpu_regions[i].base;
dyn_reg_info[dynamic_regions_num].size =
mpu_config.mpu_regions[i].size;
dyn_reg_info[dynamic_regions_num].attr =
mpu_config.mpu_regions[i].attr;
dynamic_regions_num++;
}
static_regions_num++;
#else
/* dynamic region will be covered by default mpu setting
* no need to configure
*/
if (!(mpu_config.mpu_regions[i].attr & REGION_DYNAMIC)) {
_region_init(static_regions_num,
mpu_config.mpu_regions[i].base,
mpu_config.mpu_regions[i].size,
mpu_config.mpu_regions[i].attr);
static_regions_num++;
}
#endif
}
for (i = static_regions_num; i < num_regions; i++) {
_region_init(i, 0, 0, 0);
}
/* Enable MPU */
arc_core_mpu_enable();
return 0;
}
SYS_INIT(arc_mpu_init, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V4_INTERNAL_H_ */

View File

@@ -1,205 +0,0 @@
/*
* Copyright (c) 2021 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V6_INTERNAL_H_
#define ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V6_INTERNAL_H_
#define AUX_MPU_EN_BANK_MASK BIT(0)
#define AUX_MPU_EN_IC BIT(12)
#define AUX_MPU_EN_DC BIT(13)
#define AUX_MPU_EN_ENABLE BIT(30)
#define AUX_MPU_EN_DISABLE ~BIT(30)
/*
* The size of the region is a 5-bit field, the three MSB bits are
* represented in [11:9] and the two LSB bits are represented in [1:0].
* Together these fields specify the size of the region in bytes:
* 00000-00011 Reserved
* 0x4 32 0x5 64 0x6 128 0x7 256
* 0x8 512 0x9 1k 0xA 2K 0xB 4K
* 0xC 8K 0xD 16K 0xE 32K 0xF 64K
* 0x10 128K 0x11 256K 0x12 512K 0x13 1M
* 0x14 2M 0x15 4M 0x16 8M 0x17 16M
* 0x18 32M 0x19 64M 0x1A 128M 0x1B 256M
* 0x1C 512M 0x1D 1G 0x1E 2G 0x1F 4G
*
* Bit ... 12 11 10 9 8 3 2 1 0
* ------+------------+------+---+-----------+
* ... | SIZE[11:9] | ATTR | R | SIZE[1:0] |
* ------+------------+------+---+-----------+
*/
/* arrange size into proper bit field in RDP aux reg*/
#define AUX_MPU_RDP_REGION_SIZE(size) (((size - 1) & BIT_MASK(2)) | \
(((size - 1) & (BIT_MASK(3) << 2)) << 7))
/* recover size from bit fields in RDP aux reg*/
#define AUX_MPU_RDP_SIZE_SHIFT(rdp) ((rdp & BIT_MASK(2)) | (((rdp >> 9) & BIT_MASK(3)) << 2))
#define AUX_MPU_RDB_VALID_MASK BIT(0)
#define AUX_MPU_RDP_ATTR_MASK (BIT_MASK(6) << 3)
#define AUX_MPU_RDP_SIZE_MASK ((BIT_MASK(3) << 9) | BIT_MASK(2))
/* Global code cacheability that applies to a region
* 0x0: (Default) Code is cacheable in all levels of the cache hierarchy
* 0x1: Code is not cacheable in any level of the cache hierarchy
*/
#define AUX_MPU_RDB_IC BIT(12)
/* Global data cacheability that applies to a region
* 0x0: (Default) Data is cacheable in all levels of the cache hierarchy
* 0x1: Data is not cacheable in any level of the cache hierarchy
*/
#define AUX_MPU_RDB_DC BIT(13)
/* Define a MPU region as non-volatile
* 0x0: (Default) The memory space for this MPU region is treated as a volatile uncached space.
* 0x1: The memory space for this MPU region is non-volatile
*/
#define AUX_MPU_RDB_NV BIT(14)
/* For MPU version 6, the minimum protection region size is 32 bytes */
#define ARC_FEATURE_MPU_ALIGNMENT_BITS 5
#define ARC_FEATURE_MPU_BANK_SIZE 16
/**
* This internal function select a MPU bank
*/
static inline void _bank_select(uint32_t bank)
{
uint32_t val;
val = z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) & (~AUX_MPU_EN_BANK_MASK);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_EN, val | bank);
}
/**
* This internal function initializes a MPU region
*/
static inline void _region_init(uint32_t index, uint32_t region_addr,
uint32_t size, uint32_t region_attr)
{
uint32_t bank = index / ARC_FEATURE_MPU_BANK_SIZE;
index = (index % ARC_FEATURE_MPU_BANK_SIZE) * 2U;
if (size > 0) {
uint8_t bits = find_msb_set(size) - 1;
if (bits < ARC_FEATURE_MPU_ALIGNMENT_BITS) {
bits = ARC_FEATURE_MPU_ALIGNMENT_BITS;
}
if (BIT(bits) < size) {
bits++;
}
/* Clear size bits and IC, DC bits, and set NV bit
* The default value of NV bit is 0 which means the region is volatile and uncached.
* Setting the NV bit here has no effect on mpu v6 but is for the
* forward compatibility to mpu v7. Currently we do not allow to toggle these bits
* until we implement the control of these region properties
* TODO: support uncacheable regions and volatile uncached regions
*/
region_attr &= ~(AUX_MPU_RDP_SIZE_MASK | AUX_MPU_RDB_IC | AUX_MPU_RDB_DC);
region_attr |= AUX_MPU_RDP_REGION_SIZE(bits) | AUX_MPU_RDB_NV;
region_addr |= AUX_MPU_RDB_VALID_MASK;
} else {
region_addr = 0U;
}
_bank_select(bank);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDP0 + index, region_attr);
z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDB0 + index, region_addr);
}
/**
* This internal function is utilized by the MPU driver to parse the intent
* type (i.e. THREAD_STACK_REGION) and return the correct region index.
*/
static inline int get_region_index_by_type(uint32_t type)
{
/*
* The new MPU regions are allocated per type after the statically
* configured regions. The type is one-indexed rather than
* zero-indexed.
*
* For ARC MPU v6, the smaller index has higher priority, so the
* index is allocated in reverse order. Static regions start from
* the biggest index, then thread related regions.
*
*/
switch (type) {
case THREAD_STACK_USER_REGION:
return get_num_regions() - mpu_config.num_regions - THREAD_STACK_REGION;
case THREAD_STACK_REGION:
case THREAD_APP_DATA_REGION:
case THREAD_DOMAIN_PARTITION_REGION:
/*
* Start domain partition region from stack guard region
* since stack guard is not supported.
*/
return get_num_regions() - mpu_config.num_regions - type + 1;
default:
__ASSERT(0, "Unsupported type");
return -EINVAL;
}
}
/**
* This internal function checks if region is enabled or not
*/
static inline bool _is_enabled_region(uint32_t r_index)
{
uint32_t bank = r_index / ARC_FEATURE_MPU_BANK_SIZE;
uint32_t index = (r_index % ARC_FEATURE_MPU_BANK_SIZE) * 2U;
_bank_select(bank);
return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDB0 + index)
& AUX_MPU_RDB_VALID_MASK) == AUX_MPU_RDB_VALID_MASK);
}
/**
* This internal function check if the given buffer in in the region
*/
static inline bool _is_in_region(uint32_t r_index, uint32_t start, uint32_t size)
{
uint32_t r_addr_start;
uint32_t r_addr_end;
uint32_t r_size_lshift;
uint32_t bank = r_index / ARC_FEATURE_MPU_BANK_SIZE;
uint32_t index = (r_index % ARC_FEATURE_MPU_BANK_SIZE) * 2U;
_bank_select(bank);
r_addr_start = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDB0 + index) & (~AUX_MPU_RDB_VALID_MASK);
r_size_lshift = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDP0 + index) & AUX_MPU_RDP_SIZE_MASK;
r_size_lshift = AUX_MPU_RDP_SIZE_SHIFT(r_size_lshift);
r_addr_end = r_addr_start + (1 << (r_size_lshift + 1));
if (start >= r_addr_start && (start + size) <= r_addr_end) {
return true;
}
return false;
}
/**
* This internal function check if the region is user accessible or not
*/
static inline bool _is_user_accessible_region(uint32_t r_index, int write)
{
uint32_t r_ap;
uint32_t bank = r_index / ARC_FEATURE_MPU_BANK_SIZE;
uint32_t index = (r_index % ARC_FEATURE_MPU_BANK_SIZE) * 2U;
_bank_select(bank);
r_ap = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDP0 + index);
r_ap &= AUX_MPU_RDP_ATTR_MASK;
if (write) {
return ((r_ap & (AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW)) ==
(AUX_MPU_ATTR_UW | AUX_MPU_ATTR_KW));
}
return ((r_ap & (AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR)) ==
(AUX_MPU_ATTR_UR | AUX_MPU_ATTR_KR));
}
#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V6_INTERNAL_H_ */

View File

@@ -58,11 +58,9 @@ GEN_OFFSET_SYM(_isf_t, r11);
GEN_OFFSET_SYM(_isf_t, r12);
GEN_OFFSET_SYM(_isf_t, r13);
GEN_OFFSET_SYM(_isf_t, blink);
#ifdef CONFIG_ARC_HAS_ZOL
GEN_OFFSET_SYM(_isf_t, lp_end);
GEN_OFFSET_SYM(_isf_t, lp_start);
GEN_OFFSET_SYM(_isf_t, lp_count);
#endif /* CONFIG_ARC_HAS_ZOL */
#ifdef CONFIG_CODE_DENSITY
GEN_OFFSET_SYM(_isf_t, ei_base);
GEN_OFFSET_SYM(_isf_t, ldi_base);

View File

@@ -85,6 +85,7 @@ extern FUNC_NORETURN void z_cstart(void);
void _PrepC(void)
{
z_icache_setup();
z_bss_zero();
z_data_copy();
z_cstart();

View File

@@ -20,7 +20,6 @@
#include <linker/sections.h>
#include <arch/cpu.h>
#include <swap_macros.h>
#include <arch/arc/asm-compat/assembler.h>
GTEXT(_rirq_enter)
GTEXT(_rirq_exit)
@@ -217,11 +216,11 @@ SECTION_FUNC(TEXT, _rirq_enter)
_check_and_inc_int_nest_counter r0, r1
bne.d rirq_nest
MOVR r0, sp
mov_s r0, sp
_get_curr_cpu_irq_stack sp
rirq_nest:
PUSHR r0
push_s r0
seti
j _isr_demux
@@ -237,7 +236,7 @@ rirq_nest:
SECTION_FUNC(TEXT, _rirq_exit)
clri
POPR sp
pop sp
_dec_int_nest_counter r0, r1
@@ -252,7 +251,7 @@ SECTION_FUNC(TEXT, _rirq_exit)
*/
_get_next_switch_handle
CMPR r0, r2
cmp r0, r2
beq _rirq_no_switch
#ifdef CONFIG_ARC_SECURE_FIRMWARE
@@ -264,11 +263,10 @@ SECTION_FUNC(TEXT, _rirq_exit)
/* r2 is old thread */
_irq_store_old_thread_callee_regs
/* _thread_arch.relinquish_cause is 32 bit despite of platform bittnes */
_st32_huge_offset _CAUSE_RIRQ, r2, _thread_offset_to_relinquish_cause, r2
st _CAUSE_RIRQ, [r2, _thread_offset_to_relinquish_cause]
/* mov new thread (r0) to r2 */
MOVR r2, r0
mov r2, r0
/* _rirq_newthread_switch required by exception handling */
.align 4
@@ -297,13 +295,11 @@ _rirq_switch_from_coop:
*/
/* carve fake stack */
SUBR sp, sp, ___isf_t_pc_OFFSET
sub sp, sp, ___isf_t_pc_OFFSET
#ifdef CONFIG_ARC_HAS_ZOL
/* reset zero-overhead loops */
STR 0, sp, ___isf_t_lp_end_OFFSET
#endif /* CONFIG_ARC_HAS_ZOL */
st 0, [sp, ___isf_t_lp_end_OFFSET]
/*
* r13 is part of both the callee and caller-saved register sets because
@@ -311,14 +307,14 @@ _rirq_switch_from_coop:
* IRQ prologue. r13 thus has to be set to its correct value in the IRQ
* stack frame.
*/
STR r13, sp, ___isf_t_r13_OFFSET
st_s r13, [sp, ___isf_t_r13_OFFSET]
#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
PUSHR blink
push_s blink
bl z_thread_mark_switched_in
POPR blink
pop_s blink
#endif
/* stack now has the IRQ stack frame layout, pointing to sp */
/* rtie will pop the rest from the stack */
@@ -331,11 +327,11 @@ _rirq_switch_from_rirq:
_set_misc_regs_irq_switch_from_irq
#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
PUSHR blink
push_s blink
bl z_thread_mark_switched_in
POPR blink
pop_s blink
#endif
_rirq_no_switch:
rtie

View File

@@ -15,7 +15,6 @@
#include <linker/sections.h>
#include <arch/cpu.h>
#include <swap_macros.h>
#include <arch/arc/asm-compat/assembler.h>
GDATA(z_interrupt_stacks)
GDATA(z_main_stack)
@@ -44,8 +43,8 @@ GTEXT(__start)
* @return N/A
*/
SECTION_SUBSEC_FUNC(TEXT,_reset_and__start,__reset)
SECTION_SUBSEC_FUNC(TEXT,_reset_and__start,__start)
SECTION_FUNC(TEXT,__reset)
SECTION_FUNC(TEXT,__start)
/* lock interrupts: will get unlocked when switch to main task
* also make sure the processor in the correct status
*/
@@ -55,6 +54,17 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_and__start,__start)
#ifdef CONFIG_ARC_SECURE_FIRMWARE
sflag r0
#endif
#if defined(CONFIG_BOOT_TIME_MEASUREMENT) && defined(CONFIG_ARCV2_TIMER)
/*
* ARCV2 timer (timer0) is a free run timer, let it start to count
* here.
*/
mov_s r0, 0xffffffff
sr r0, [_ARC_V2_TMR0_LIMIT]
mov_s r0, 0
sr r0, [_ARC_V2_TMR0_COUNT]
#endif
/* interrupt related init */
#ifndef CONFIG_ARC_NORMAL_FIRMWARE
/* IRQ_ACT and IRQ_CTRL should be initialized and set in secure mode */
@@ -66,17 +76,13 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_and__start,__start)
/* set the vector table base early,
* so that exception vectors can be handled.
*/
MOVR r0, _VectorTable
mov_s r0, _VectorTable
#ifdef CONFIG_ARC_SECURE_FIRMWARE
sr r0, [_ARC_V2_IRQ_VECT_BASE_S]
#else
SRR r0, [_ARC_V2_IRQ_VECT_BASE]
sr r0, [_ARC_V2_IRQ_VECT_BASE]
#endif
lr r0, [_ARC_V2_STATUS32]
bset r0, r0, _ARC_V2_STATUS32_DZ_BIT
kflag r0
#if defined(CONFIG_USERSPACE)
lr r0, [_ARC_V2_STATUS32]
bset r0, r0, _ARC_V2_STATUS32_US_BIT
@@ -89,10 +95,13 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_and__start,__start)
kflag r0
#endif
/* Invalidate icache */
mov_s r1, 1
invalidate_and_disable_icache:
lr r0, [_ARC_V2_I_CACHE_BUILD]
and.f r0, r0, 0xff
bz.nd done_icache_invalidate
bz.nd invalidate_dcache
mov_s r2, 0
sr r2, [_ARC_V2_IC_IVIC]
@@ -100,17 +109,17 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_and__start,__start)
nop_s
nop_s
nop_s
done_icache_invalidate:
sr r1, [_ARC_V2_IC_CTRL]
invalidate_dcache:
/* Invalidate dcache */
lr r3, [_ARC_V2_D_CACHE_BUILD]
and.f r3, r3, 0xff
bz.nd done_dcache_invalidate
bz.nd done_cache_invalidate
mov_s r1, 1
sr r1, [_ARC_V2_DC_IVDC]
done_dcache_invalidate:
done_cache_invalidate:
/*
* Init ARC internal architecture state
@@ -120,8 +129,8 @@ done_dcache_invalidate:
* substitution of normal hardware reset sequence.
*/
#ifdef CONFIG_INIT_ARCH_HW_AT_BOOT
/* Set MPU (v4) registers to default */
#if CONFIG_ARC_MPU_VER == 4
/* Set MPU (v3) registers to default */
#if CONFIG_ARC_MPU_VER == 3
/* Set default reset value to _ARC_V2_MPU_EN register */
#define ARC_MPU_EN_RESET_VALUE 0x400181C0
mov_s r1, ARC_MPU_EN_RESET_VALUE
@@ -159,7 +168,7 @@ _slave_core_wait:
ld r1, [arc_cpu_wake_flag]
brne r0, r1, _slave_core_wait
LDR sp, arc_cpu_sp
ld sp, [arc_cpu_sp]
/* signal master core that slave core runs */
st 0, [arc_cpu_wake_flag]

View File

@@ -21,7 +21,6 @@
#include <arch/cpu.h>
#include <v2/irq.h>
#include <swap_macros.h>
#include <arch/arc/asm-compat/assembler.h>
GTEXT(z_arc_switch)
@@ -61,17 +60,17 @@ SECTION_FUNC(TEXT, z_arc_switch)
* get old_thread from r1
*/
SUBR r2, r1, ___thread_t_switch_handle_OFFSET
sub r2, r1, ___thread_t_switch_handle_OFFSET
/* _thread_arch.relinquish_cause is 32 bit despite of platform bittnes */
_st32_huge_offset _CAUSE_COOP, r2, _thread_offset_to_relinquish_cause, r3
st _CAUSE_COOP, [r2, _thread_offset_to_relinquish_cause]
/*
* Save status32 and blink on the stack before the callee-saved registers.
* This is the same layout as the start of an IRQ stack frame.
*/
LRR r3, [_ARC_V2_STATUS32]
PUSHR r3
lr r3, [_ARC_V2_STATUS32]
push_s r3
#ifdef CONFIG_ARC_HAS_SECURE
#ifdef CONFIG_ARC_SECURE_FIRMWARE
@@ -82,7 +81,7 @@ SECTION_FUNC(TEXT, z_arc_switch)
push_s r3
#endif
PUSHR blink
push_s blink
_store_old_thread_callee_regs
@@ -91,7 +90,7 @@ SECTION_FUNC(TEXT, z_arc_switch)
*/
_disable_stack_checking r3
MOVR r2, r0
mov_s r2, r0
_load_new_thread_callee_regs
@@ -105,22 +104,22 @@ SECTION_FUNC(TEXT, z_arc_switch)
.align 4
_switch_return_from_coop:
POPR blink /* pc into blink */
pop_s blink /* pc into blink */
#ifdef CONFIG_ARC_HAS_SECURE
pop_s r3 /* pop SEC_STAT */
#ifdef CONFIG_ARC_SECURE_FIRMWARE
sflag r3
#endif
#endif
POPR r3 /* status32 into r3 */
pop_s r3 /* status32 into r3 */
kflag r3 /* write status32 */
#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
PUSHR blink
push_s blink
bl z_thread_mark_switched_in
POPR blink
pop_s blink
#endif
j_s [blink]
@@ -136,11 +135,11 @@ _switch_return_from_firq:
* thread
*/
LRR r3, [_ARC_V2_AUX_IRQ_ACT]
lr r3, [_ARC_V2_AUX_IRQ_ACT]
#ifdef CONFIG_ARC_SECURE_FIRMWARE
or r3, r3, (1 << (ARC_N_IRQ_START_LEVEL - 1))
#else
ORR r3, r3, (1 << (CONFIG_NUM_IRQ_PRIO_LEVELS - 1))
or r3, r3, (1 << (CONFIG_NUM_IRQ_PRIO_LEVELS - 1))
#endif
#ifdef CONFIG_ARC_NORMAL_FIRMWARE
@@ -149,13 +148,13 @@ _switch_return_from_firq:
mov_s r6, ARC_S_CALL_AUX_WRITE
sjli SJLI_CALL_ARC_SECURE
#else
SRR r3, [_ARC_V2_AUX_IRQ_ACT]
sr r3, [_ARC_V2_AUX_IRQ_ACT]
#endif
#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
PUSHR blink
push_s blink
bl z_thread_mark_switched_in
POPR blink
pop_s blink
#endif
rtie

View File

@@ -22,15 +22,15 @@
/* initial stack frame */
struct init_stack_frame {
uintptr_t pc;
uint32_t pc;
#ifdef CONFIG_ARC_HAS_SECURE
uint32_t sec_stat;
#endif
uintptr_t status32;
uintptr_t r3;
uintptr_t r2;
uintptr_t r1;
uintptr_t r0;
uint32_t status32;
uint32_t r3;
uint32_t r2;
uint32_t r1;
uint32_t r0;
};
#ifdef CONFIG_USERSPACE
@@ -122,13 +122,8 @@ static inline void arch_setup_callee_saved_regs(struct k_thread *thread,
ARG_UNUSED(regs);
#ifdef CONFIG_THREAD_LOCAL_STORAGE
#ifdef CONFIG_ISA_ARCV2
/* R26 is used for thread pointer for ARCv2 */
/* R26 is used for thread pointer */
regs->r26 = thread->tls;
#else
/* R30 is used for thread pointer for ARCv3 */
regs->r30 = thread->tls;
#endif /* CONFIG_ISA_ARCV2 */
#endif
}
@@ -155,23 +150,23 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
* level/mask can't be set from user space that's not worse than
* executing a loop without yielding.
*/
iframe->status32 = _ARC_V2_STATUS32_US | _ARC_V2_STATUS32_DZ;
iframe->status32 = _ARC_V2_STATUS32_US;
if (is_user(thread)) {
iframe->pc = (uint32_t)z_user_thread_entry_wrapper;
} else {
iframe->pc = (uint32_t)z_thread_entry_wrapper;
}
#else
iframe->status32 = _ARC_V2_STATUS32_DZ;
iframe->pc = ((uintptr_t)z_thread_entry_wrapper);
iframe->status32 = 0;
iframe->pc = ((uint32_t)z_thread_entry_wrapper);
#endif /* CONFIG_USERSPACE */
#ifdef CONFIG_ARC_SECURE_FIRMWARE
iframe->sec_stat = z_arc_v2_aux_reg_read(_ARC_V2_SEC_STAT);
#endif
iframe->r0 = (uintptr_t)entry;
iframe->r1 = (uintptr_t)p1;
iframe->r2 = (uintptr_t)p2;
iframe->r3 = (uintptr_t)p3;
iframe->r0 = (uint32_t)entry;
iframe->r1 = (uint32_t)p1;
iframe->r2 = (uint32_t)p2;
iframe->r3 = (uint32_t)p3;
#ifdef CONFIG_ARC_STACK_CHECKING
#ifdef CONFIG_ARC_SECURE_FIRMWARE
@@ -187,7 +182,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
thread->switch_handle = thread;
thread->arch.relinquish_cause = _CAUSE_COOP;
thread->callee_saved.sp =
(uintptr_t)iframe - ___callee_saved_stack_t_SIZEOF;
(uint32_t)iframe - ___callee_saved_stack_t_SIZEOF;
arch_setup_callee_saved_regs(thread, thread->callee_saved.sp);
@@ -237,7 +232,7 @@ int arch_float_disable(struct k_thread *thread)
}
int arch_float_enable(struct k_thread *thread, unsigned int options)
int arch_float_enable(struct k_thread *thread)
{
unsigned int key;

View File

@@ -14,7 +14,6 @@
#include <toolchain.h>
#include <linker/sections.h>
#include <v2/irq.h>
#include <arch/arc/asm-compat/assembler.h>
GTEXT(z_thread_entry_wrapper)
GTEXT(z_thread_entry_wrapper1)
@@ -31,9 +30,9 @@ GTEXT(z_thread_entry_wrapper1)
SECTION_FUNC(TEXT, z_thread_entry_wrapper)
seti _ARC_V2_INIT_IRQ_LOCK_KEY
z_thread_entry_wrapper1:
POPR r3
POPR r2
POPR r1
POPR r0
pop_s r3
pop_s r2
pop_s r1
pop_s r0
j z_thread_entry
nop

View File

@@ -30,7 +30,7 @@ uint64_t z_tsc_read(void)
uint32_t count;
key = arch_irq_lock();
t = (uint64_t)sys_clock_tick_get();
t = (uint64_t)z_tick_get();
count = z_arc_v2_aux_reg_read(_ARC_V2_TMR0_COUNT);
arch_irq_unlock(key);
t *= k_ticks_to_cyc_floor64(1);

View File

@@ -28,40 +28,39 @@
#include "vector_table.h"
struct vector_table {
uintptr_t reset;
uintptr_t memory_error;
uintptr_t instruction_error;
uintptr_t ev_machine_check;
uintptr_t ev_tlb_miss_i;
uintptr_t ev_tlb_miss_d;
uintptr_t ev_prot_v;
uintptr_t ev_privilege_v;
uintptr_t ev_swi;
uintptr_t ev_trap;
uintptr_t ev_extension;
uintptr_t ev_div_zero;
/* ev_dc_error is unused in ARCv3 and de-facto unused in ARCv2 as well */
uintptr_t ev_dc_error;
uintptr_t ev_maligned;
uintptr_t unused_1;
uintptr_t unused_2;
uint32_t reset;
uint32_t memory_error;
uint32_t instruction_error;
uint32_t ev_machine_check;
uint32_t ev_tlb_miss_i;
uint32_t ev_tlb_miss_d;
uint32_t ev_prot_v;
uint32_t ev_privilege_v;
uint32_t ev_swi;
uint32_t ev_trap;
uint32_t ev_extension;
uint32_t ev_div_zero;
uint32_t ev_dc_error;
uint32_t ev_maligned;
uint32_t unused_1;
uint32_t unused_2;
};
struct vector_table _VectorTable Z_GENERIC_SECTION(.exc_vector_table) = {
(uintptr_t)__reset,
(uintptr_t)__memory_error,
(uintptr_t)__instruction_error,
(uintptr_t)__ev_machine_check,
(uintptr_t)__ev_tlb_miss_i,
(uintptr_t)__ev_tlb_miss_d,
(uintptr_t)__ev_prot_v,
(uintptr_t)__ev_privilege_v,
(uintptr_t)__ev_swi,
(uintptr_t)__ev_trap,
(uintptr_t)__ev_extension,
(uintptr_t)__ev_div_zero,
(uintptr_t)__ev_dc_error,
(uintptr_t)__ev_maligned,
(uint32_t)__reset,
(uint32_t)__memory_error,
(uint32_t)__instruction_error,
(uint32_t)__ev_machine_check,
(uint32_t)__ev_tlb_miss_i,
(uint32_t)__ev_tlb_miss_d,
(uint32_t)__ev_prot_v,
(uint32_t)__ev_privilege_v,
(uint32_t)__ev_swi,
(uint32_t)__ev_trap,
(uint32_t)__ev_extension,
(uint32_t)__ev_div_zero,
(uint32_t)__ev_dc_error,
(uint32_t)__ev_maligned,
0,
0
};

View File

@@ -37,74 +37,70 @@ extern "C" {
#ifdef CONFIG_ARC_HAS_SECURE
struct _irq_stack_frame {
#ifdef CONFIG_ARC_HAS_ZOL
uintptr_t lp_end;
uintptr_t lp_start;
uintptr_t lp_count;
#endif /* CONFIG_ARC_HAS_ZOL */
uint32_t lp_end;
uint32_t lp_start;
uint32_t lp_count;
#ifdef CONFIG_CODE_DENSITY
/*
* Currently unsupported. This is where those registers are
* automatically pushed on the stack by the CPU when taking a regular
* IRQ.
*/
uintptr_t ei_base;
uintptr_t ldi_base;
uintptr_t jli_base;
uint32_t ei_base;
uint32_t ldi_base;
uint32_t jli_base;
#endif
uintptr_t r0;
uintptr_t r1;
uintptr_t r2;
uintptr_t r3;
uintptr_t r4;
uintptr_t r5;
uintptr_t r6;
uintptr_t r7;
uintptr_t r8;
uintptr_t r9;
uintptr_t r10;
uintptr_t r11;
uintptr_t r12;
uintptr_t r13;
uintptr_t blink;
uintptr_t pc;
uintptr_t sec_stat;
uintptr_t status32;
uint32_t r0;
uint32_t r1;
uint32_t r2;
uint32_t r3;
uint32_t r4;
uint32_t r5;
uint32_t r6;
uint32_t r7;
uint32_t r8;
uint32_t r9;
uint32_t r10;
uint32_t r11;
uint32_t r12;
uint32_t r13;
uint32_t blink;
uint32_t pc;
uint32_t sec_stat;
uint32_t status32;
};
#else
struct _irq_stack_frame {
uintptr_t r0;
uintptr_t r1;
uintptr_t r2;
uintptr_t r3;
uintptr_t r4;
uintptr_t r5;
uintptr_t r6;
uintptr_t r7;
uintptr_t r8;
uintptr_t r9;
uintptr_t r10;
uintptr_t r11;
uintptr_t r12;
uintptr_t r13;
uintptr_t blink;
#ifdef CONFIG_ARC_HAS_ZOL
uintptr_t lp_end;
uintptr_t lp_start;
uintptr_t lp_count;
#endif /* CONFIG_ARC_HAS_ZOL */
uint32_t r0;
uint32_t r1;
uint32_t r2;
uint32_t r3;
uint32_t r4;
uint32_t r5;
uint32_t r6;
uint32_t r7;
uint32_t r8;
uint32_t r9;
uint32_t r10;
uint32_t r11;
uint32_t r12;
uint32_t r13;
uint32_t blink;
uint32_t lp_end;
uint32_t lp_start;
uint32_t lp_count;
#ifdef CONFIG_CODE_DENSITY
/*
* Currently unsupported. This is where those registers are
* automatically pushed on the stack by the CPU when taking a regular
* IRQ.
*/
uintptr_t ei_base;
uintptr_t ldi_base;
uintptr_t jli_base;
uint32_t ei_base;
uint32_t ldi_base;
uint32_t jli_base;
#endif
uintptr_t pc;
uintptr_t status32;
uint32_t pc;
uint32_t status32;
};
#endif
@@ -114,47 +110,47 @@ typedef struct _irq_stack_frame _isf_t;
/* callee-saved registers pushed on the stack, not in k_thread */
struct _callee_saved_stack {
uintptr_t r13;
uintptr_t r14;
uintptr_t r15;
uintptr_t r16;
uintptr_t r17;
uintptr_t r18;
uintptr_t r19;
uintptr_t r20;
uintptr_t r21;
uintptr_t r22;
uintptr_t r23;
uintptr_t r24;
uintptr_t r25;
uintptr_t r26;
uintptr_t fp; /* r27 */
uint32_t r13;
uint32_t r14;
uint32_t r15;
uint32_t r16;
uint32_t r17;
uint32_t r18;
uint32_t r19;
uint32_t r20;
uint32_t r21;
uint32_t r22;
uint32_t r23;
uint32_t r24;
uint32_t r25;
uint32_t r26;
uint32_t fp; /* r27 */
#ifdef CONFIG_USERSPACE
#ifdef CONFIG_ARC_HAS_SECURE
uintptr_t user_sp;
uintptr_t kernel_sp;
uint32_t user_sp;
uint32_t kernel_sp;
#else
uintptr_t user_sp;
uint32_t user_sp;
#endif
#endif
/* r28 is the stack pointer and saved separately */
/* r29 is ILINK and does not need to be saved */
uintptr_t r30;
uint32_t r30;
#ifdef CONFIG_ARC_HAS_ACCL_REGS
uintptr_t r58;
uintptr_t r59;
uint32_t r58;
uint32_t r59;
#endif
#ifdef CONFIG_FPU_SHARING
uintptr_t fpu_status;
uintptr_t fpu_ctrl;
uint32_t fpu_status;
uint32_t fpu_ctrl;
#ifdef CONFIG_FP_FPU_DA
uintptr_t dpfp2h;
uintptr_t dpfp2l;
uintptr_t dpfp1h;
uintptr_t dpfp1l;
uint32_t dpfp2h;
uint32_t dpfp2l;
uint32_t dpfp1h;
uint32_t dpfp1l;
#endif
#endif

View File

@@ -24,7 +24,10 @@
#include <kernel_arch_data.h>
#ifdef CONFIG_CPU_ARCV2
#include <v2/cache.h>
#include <v2/irq.h>
#endif
#ifdef __cplusplus
extern "C" {

View File

@@ -14,31 +14,30 @@
#include <toolchain.h>
#include <arch/cpu.h>
#include <arch/arc/tool-compat.h>
#include <arch/arc/asm-compat/assembler.h>
#ifdef _ASMLANGUAGE
/* save callee regs of current thread in r2 */
.macro _save_callee_saved_regs
SUBR sp, sp, ___callee_saved_stack_t_SIZEOF
sub_s sp, sp, ___callee_saved_stack_t_SIZEOF
/* save regs on stack */
STR r13, sp, ___callee_saved_stack_t_r13_OFFSET
STR r14, sp, ___callee_saved_stack_t_r14_OFFSET
STR r15, sp, ___callee_saved_stack_t_r15_OFFSET
STR r16, sp, ___callee_saved_stack_t_r16_OFFSET
STR r17, sp, ___callee_saved_stack_t_r17_OFFSET
STR r18, sp, ___callee_saved_stack_t_r18_OFFSET
STR r19, sp, ___callee_saved_stack_t_r19_OFFSET
STR r20, sp, ___callee_saved_stack_t_r20_OFFSET
STR r21, sp, ___callee_saved_stack_t_r21_OFFSET
STR r22, sp, ___callee_saved_stack_t_r22_OFFSET
STR r23, sp, ___callee_saved_stack_t_r23_OFFSET
STR r24, sp, ___callee_saved_stack_t_r24_OFFSET
STR r25, sp, ___callee_saved_stack_t_r25_OFFSET
STR r26, sp, ___callee_saved_stack_t_r26_OFFSET
STR fp, sp, ___callee_saved_stack_t_fp_OFFSET
st_s r13, [sp, ___callee_saved_stack_t_r13_OFFSET]
st_s r14, [sp, ___callee_saved_stack_t_r14_OFFSET]
st_s r15, [sp, ___callee_saved_stack_t_r15_OFFSET]
st r16, [sp, ___callee_saved_stack_t_r16_OFFSET]
st r17, [sp, ___callee_saved_stack_t_r17_OFFSET]
st r18, [sp, ___callee_saved_stack_t_r18_OFFSET]
st r19, [sp, ___callee_saved_stack_t_r19_OFFSET]
st r20, [sp, ___callee_saved_stack_t_r20_OFFSET]
st r21, [sp, ___callee_saved_stack_t_r21_OFFSET]
st r22, [sp, ___callee_saved_stack_t_r22_OFFSET]
st r23, [sp, ___callee_saved_stack_t_r23_OFFSET]
st r24, [sp, ___callee_saved_stack_t_r24_OFFSET]
st r25, [sp, ___callee_saved_stack_t_r25_OFFSET]
st r26, [sp, ___callee_saved_stack_t_r26_OFFSET]
st fp, [sp, ___callee_saved_stack_t_fp_OFFSET]
#ifdef CONFIG_USERSPACE
#ifdef CONFIG_ARC_HAS_SECURE
@@ -58,11 +57,11 @@
st_s r13, [sp, ___callee_saved_stack_t_user_sp_OFFSET]
#endif
#endif
STR r30, sp, ___callee_saved_stack_t_r30_OFFSET
st r30, [sp, ___callee_saved_stack_t_r30_OFFSET]
#ifdef CONFIG_ARC_HAS_ACCL_REGS
STR r58, sp, ___callee_saved_stack_t_r58_OFFSET
STR r59, sp, ___callee_saved_stack_t_r59_OFFSET
st r58, [sp, ___callee_saved_stack_t_r58_OFFSET]
st r59, [sp, ___callee_saved_stack_t_r59_OFFSET]
#endif
#ifdef CONFIG_FPU_SHARING
@@ -88,17 +87,17 @@
#endif
/* save stack pointer in struct k_thread */
STR sp, r2, _thread_offset_to_sp
st sp, [r2, _thread_offset_to_sp]
.endm
/* load the callee regs of thread (in r2)*/
.macro _load_callee_saved_regs
/* restore stack pointer from struct k_thread */
LDR sp, r2, _thread_offset_to_sp
ld sp, [r2, _thread_offset_to_sp]
#ifdef CONFIG_ARC_HAS_ACCL_REGS
LDR r58, sp, ___callee_saved_stack_t_r58_OFFSET
LDR r59, sp, ___callee_saved_stack_t_r59_OFFSET
ld r58, [sp, ___callee_saved_stack_t_r58_OFFSET]
ld r59, [sp, ___callee_saved_stack_t_r59_OFFSET]
#endif
#ifdef CONFIG_FPU_SHARING
@@ -143,30 +142,30 @@
#endif
#endif
LDR r13, sp, ___callee_saved_stack_t_r13_OFFSET
LDR r14, sp, ___callee_saved_stack_t_r14_OFFSET
LDR r15, sp, ___callee_saved_stack_t_r15_OFFSET
LDR r16, sp, ___callee_saved_stack_t_r16_OFFSET
LDR r17, sp, ___callee_saved_stack_t_r17_OFFSET
LDR r18, sp, ___callee_saved_stack_t_r18_OFFSET
LDR r19, sp, ___callee_saved_stack_t_r19_OFFSET
LDR r20, sp, ___callee_saved_stack_t_r20_OFFSET
LDR r21, sp, ___callee_saved_stack_t_r21_OFFSET
LDR r22, sp, ___callee_saved_stack_t_r22_OFFSET
LDR r23, sp, ___callee_saved_stack_t_r23_OFFSET
LDR r24, sp, ___callee_saved_stack_t_r24_OFFSET
LDR r25, sp, ___callee_saved_stack_t_r25_OFFSET
LDR r26, sp, ___callee_saved_stack_t_r26_OFFSET
LDR fp, sp, ___callee_saved_stack_t_fp_OFFSET
LDR r30, sp, ___callee_saved_stack_t_r30_OFFSET
ld_s r13, [sp, ___callee_saved_stack_t_r13_OFFSET]
ld_s r14, [sp, ___callee_saved_stack_t_r14_OFFSET]
ld_s r15, [sp, ___callee_saved_stack_t_r15_OFFSET]
ld r16, [sp, ___callee_saved_stack_t_r16_OFFSET]
ld r17, [sp, ___callee_saved_stack_t_r17_OFFSET]
ld r18, [sp, ___callee_saved_stack_t_r18_OFFSET]
ld r19, [sp, ___callee_saved_stack_t_r19_OFFSET]
ld r20, [sp, ___callee_saved_stack_t_r20_OFFSET]
ld r21, [sp, ___callee_saved_stack_t_r21_OFFSET]
ld r22, [sp, ___callee_saved_stack_t_r22_OFFSET]
ld r23, [sp, ___callee_saved_stack_t_r23_OFFSET]
ld r24, [sp, ___callee_saved_stack_t_r24_OFFSET]
ld r25, [sp, ___callee_saved_stack_t_r25_OFFSET]
ld r26, [sp, ___callee_saved_stack_t_r26_OFFSET]
ld fp, [sp, ___callee_saved_stack_t_fp_OFFSET]
ld r30, [sp, ___callee_saved_stack_t_r30_OFFSET]
ADDR sp, sp, ___callee_saved_stack_t_SIZEOF
add_s sp, sp, ___callee_saved_stack_t_SIZEOF
.endm
/* discard callee regs */
.macro _discard_callee_saved_regs
ADDR sp, sp, ___callee_saved_stack_t_SIZEOF
add_s sp, sp, ___callee_saved_stack_t_SIZEOF
.endm
/*
@@ -175,35 +174,33 @@
*/
.macro _create_irq_stack_frame
SUBR sp, sp, ___isf_t_SIZEOF
sub_s sp, sp, ___isf_t_SIZEOF
STR blink, sp, ___isf_t_blink_OFFSET
st blink, [sp, ___isf_t_blink_OFFSET]
/* store these right away so we can use them if needed */
STR r13, sp, ___isf_t_r13_OFFSET
STR r12, sp, ___isf_t_r12_OFFSET
STR r11, sp, ___isf_t_r11_OFFSET
STR r10, sp, ___isf_t_r10_OFFSET
STR r9, sp, ___isf_t_r9_OFFSET
STR r8, sp, ___isf_t_r8_OFFSET
STR r7, sp, ___isf_t_r7_OFFSET
STR r6, sp, ___isf_t_r6_OFFSET
STR r5, sp, ___isf_t_r5_OFFSET
STR r4, sp, ___isf_t_r4_OFFSET
STR r3, sp, ___isf_t_r3_OFFSET
STR r2, sp, ___isf_t_r2_OFFSET
STR r1, sp, ___isf_t_r1_OFFSET
STR r0, sp, ___isf_t_r0_OFFSET
st_s r13, [sp, ___isf_t_r13_OFFSET]
st_s r12, [sp, ___isf_t_r12_OFFSET]
st r11, [sp, ___isf_t_r11_OFFSET]
st r10, [sp, ___isf_t_r10_OFFSET]
st r9, [sp, ___isf_t_r9_OFFSET]
st r8, [sp, ___isf_t_r8_OFFSET]
st r7, [sp, ___isf_t_r7_OFFSET]
st r6, [sp, ___isf_t_r6_OFFSET]
st r5, [sp, ___isf_t_r5_OFFSET]
st r4, [sp, ___isf_t_r4_OFFSET]
st_s r3, [sp, ___isf_t_r3_OFFSET]
st_s r2, [sp, ___isf_t_r2_OFFSET]
st_s r1, [sp, ___isf_t_r1_OFFSET]
st_s r0, [sp, ___isf_t_r0_OFFSET]
#ifdef CONFIG_ARC_HAS_ZOL
MOVR r0, lp_count
STR r0, sp, ___isf_t_lp_count_OFFSET
LRR r1, [_ARC_V2_LP_START]
LRR r0, [_ARC_V2_LP_END]
STR r1, sp, ___isf_t_lp_start_OFFSET
STR r0, sp, ___isf_t_lp_end_OFFSET
#endif /* CONFIG_ARC_HAS_ZOL */
mov r0, lp_count
st_s r0, [sp, ___isf_t_lp_count_OFFSET]
lr r1, [_ARC_V2_LP_START]
lr r0, [_ARC_V2_LP_END]
st_s r1, [sp, ___isf_t_lp_start_OFFSET]
st_s r0, [sp, ___isf_t_lp_end_OFFSET]
#ifdef CONFIG_CODE_DENSITY
lr r1, [_ARC_V2_JLI_BASE]
@@ -222,7 +219,7 @@
*/
.macro _pop_irq_stack_frame
LDR blink, sp, ___isf_t_blink_OFFSET
ld blink, [sp, ___isf_t_blink_OFFSET]
#ifdef CONFIG_CODE_DENSITY
ld_s r1, [sp, ___isf_t_jli_base_OFFSET]
@@ -233,29 +230,27 @@
sr r2, [_ARC_V2_EI_BASE]
#endif
#ifdef CONFIG_ARC_HAS_ZOL
LDR r0, sp, ___isf_t_lp_count_OFFSET
MOVR lp_count, r0
LDR r1, sp, ___isf_t_lp_start_OFFSET
LDR r0, sp, ___isf_t_lp_end_OFFSET
SRR r1, [_ARC_V2_LP_START]
SRR r0, [_ARC_V2_LP_END]
#endif /* CONFIG_ARC_HAS_ZOL */
ld_s r0, [sp, ___isf_t_lp_count_OFFSET]
mov lp_count, r0
ld_s r1, [sp, ___isf_t_lp_start_OFFSET]
ld_s r0, [sp, ___isf_t_lp_end_OFFSET]
sr r1, [_ARC_V2_LP_START]
sr r0, [_ARC_V2_LP_END]
LDR r13, sp, ___isf_t_r13_OFFSET
LDR r12, sp, ___isf_t_r12_OFFSET
LDR r11, sp, ___isf_t_r11_OFFSET
LDR r10, sp, ___isf_t_r10_OFFSET
LDR r9, sp, ___isf_t_r9_OFFSET
LDR r8, sp, ___isf_t_r8_OFFSET
LDR r7, sp, ___isf_t_r7_OFFSET
LDR r6, sp, ___isf_t_r6_OFFSET
LDR r5, sp, ___isf_t_r5_OFFSET
LDR r4, sp, ___isf_t_r4_OFFSET
LDR r3, sp, ___isf_t_r3_OFFSET
LDR r2, sp, ___isf_t_r2_OFFSET
LDR r1, sp, ___isf_t_r1_OFFSET
LDR r0, sp, ___isf_t_r0_OFFSET
ld_s r13, [sp, ___isf_t_r13_OFFSET]
ld_s r12, [sp, ___isf_t_r12_OFFSET]
ld r11, [sp, ___isf_t_r11_OFFSET]
ld r10, [sp, ___isf_t_r10_OFFSET]
ld r9, [sp, ___isf_t_r9_OFFSET]
ld r8, [sp, ___isf_t_r8_OFFSET]
ld r7, [sp, ___isf_t_r7_OFFSET]
ld r6, [sp, ___isf_t_r6_OFFSET]
ld r5, [sp, ___isf_t_r5_OFFSET]
ld r4, [sp, ___isf_t_r4_OFFSET]
ld_s r3, [sp, ___isf_t_r3_OFFSET]
ld_s r2, [sp, ___isf_t_r2_OFFSET]
ld_s r1, [sp, ___isf_t_r1_OFFSET]
ld_s r0, [sp, ___isf_t_r0_OFFSET]
/*
@@ -267,7 +262,7 @@
* status32 differently depending on the execution context they are
* running in (arch_switch(), firq or exception).
*/
ADDR sp, sp, ___isf_t_SIZEOF
add_s sp, sp, ___isf_t_SIZEOF
.endm
@@ -308,15 +303,11 @@
*/
.macro _check_and_inc_int_nest_counter, reg1, reg2
#ifdef CONFIG_SMP
/* get pointer to _cpu_t of this CPU */
_get_cpu_id MACRO_ARG(reg1)
ASLR MACRO_ARG(reg1), MACRO_ARG(reg1), ARC_REGSHIFT
LDR MACRO_ARG(reg1), MACRO_ARG(reg1), _curr_cpu
/* _cpu_t.nested is 32 bit despite of platform bittnes */
ld.as MACRO_ARG(reg1), [_curr_cpu, MACRO_ARG(reg1)]
ld MACRO_ARG(reg2), [MACRO_ARG(reg1), ___cpu_t_nested_OFFSET]
#else
MOVR MACRO_ARG(reg1), _kernel
/* z_kernel.nested is 32 bit despite of platform bittnes */
mov MACRO_ARG(reg1), _kernel
ld MACRO_ARG(reg2), [MACRO_ARG(reg1), _kernel_offset_to_nested]
#endif
add MACRO_ARG(reg2), MACRO_ARG(reg2), 1
@@ -334,15 +325,11 @@
*/
.macro _dec_int_nest_counter, reg1, reg2
#ifdef CONFIG_SMP
/* get pointer to _cpu_t of this CPU */
_get_cpu_id MACRO_ARG(reg1)
ASLR MACRO_ARG(reg1), MACRO_ARG(reg1), ARC_REGSHIFT
LDR MACRO_ARG(reg1), MACRO_ARG(reg1), _curr_cpu
/* _cpu_t.nested is 32 bit despite of platform bittnes */
ld.as MACRO_ARG(reg1), [_curr_cpu, MACRO_ARG(reg1)]
ld MACRO_ARG(reg2), [MACRO_ARG(reg1), ___cpu_t_nested_OFFSET]
#else
MOVR MACRO_ARG(reg1), _kernel
/* z_kernel.nested is 32 bit despite of platform bittnes */
mov MACRO_ARG(reg1), _kernel
ld MACRO_ARG(reg2), [MACRO_ARG(reg1), _kernel_offset_to_nested]
#endif
sub MACRO_ARG(reg2), MACRO_ARG(reg2), 1
@@ -374,7 +361,7 @@
* the result will be in reg (a reg)
*/
.macro _get_cpu_id, reg
LRR MACRO_ARG(reg), [_ARC_V2_IDENTITY]
lr MACRO_ARG(reg), [_ARC_V2_IDENTITY]
xbfu MACRO_ARG(reg), MACRO_ARG(reg), 0xe8
.endm
@@ -383,28 +370,25 @@
*/
.macro _get_curr_cpu_irq_stack, irq_sp
#ifdef CONFIG_SMP
/* get pointer to _cpu_t of this CPU */
_get_cpu_id MACRO_ARG(irq_sp)
ASLR MACRO_ARG(irq_sp), MACRO_ARG(irq_sp), ARC_REGSHIFT
LDR MACRO_ARG(irq_sp), MACRO_ARG(irq_sp), _curr_cpu
/* get pointer to irq_stack itself */
LDR MACRO_ARG(irq_sp), MACRO_ARG(irq_sp), ___cpu_t_irq_stack_OFFSET
ld.as MACRO_ARG(irq_sp), [_curr_cpu, MACRO_ARG(irq_sp)]
ld MACRO_ARG(irq_sp), [MACRO_ARG(irq_sp), ___cpu_t_irq_stack_OFFSET]
#else
MOVR MACRO_ARG(irq_sp), _kernel
LDR MACRO_ARG(irq_sp), MACRO_ARG(irq_sp), _kernel_offset_to_irq_stack
mov MACRO_ARG(irq_sp), _kernel
ld MACRO_ARG(irq_sp), [MACRO_ARG(irq_sp), _kernel_offset_to_irq_stack]
#endif
.endm
/* macro to push aux reg through reg */
.macro PUSHAX, reg, aux
LRR MACRO_ARG(reg), [MACRO_ARG(aux)]
PUSHR MACRO_ARG(reg)
lr MACRO_ARG(reg), [MACRO_ARG(aux)]
st.a MACRO_ARG(reg), [sp, -4]
.endm
/* macro to pop aux reg through reg */
.macro POPAX, reg, aux
POPR MACRO_ARG(reg)
SRR MACRO_ARG(reg), [MACRO_ARG(aux)]
ld.ab MACRO_ARG(reg), [sp, 4]
sr MACRO_ARG(reg), [MACRO_ARG(aux)]
.endm
@@ -416,7 +400,7 @@
/* save old thread into switch handle which is required by
* wait_for_switch
*/
STR r2, r2, ___thread_t_switch_handle_OFFSET
st r2, [r2, ___thread_t_switch_handle_OFFSET]
#endif
.endm
@@ -459,7 +443,7 @@
bl configure_mpu_thread
pop_s r2
#endif
/* _thread_arch.relinquish_cause is 32 bit despite of platform bittnes */
ld r3, [r2, _thread_offset_to_relinquish_cause]
.endm
@@ -495,10 +479,10 @@
/* macro to get next switch handle in assembly */
.macro _get_next_switch_handle
PUSHR r2
MOVR r0, sp
push_s r2
mov r0, sp
bl z_arch_get_next_switch_handle
POPR r2
pop_s r2
.endm
/* macro to disable stack checking in assembly, need a GPR
@@ -536,19 +520,6 @@
#endif
.endm
/*
* When we accessing bloated struct member we can exceed u9 operand in store
* instruction. So we can use _st32_huge_offset macro instead
*/
.macro _st32_huge_offset, d, s, off, temp
.if MACRO_ARG(off) > 255 || MACRO_ARG(off) < -256
ADDR MACRO_ARG(temp), MACRO_ARG(s), MACRO_ARG(off)
st MACRO_ARG(d), [MACRO_ARG(temp)]
.else
st MACRO_ARG(d), [MACRO_ARG(s), MACRO_ARG(off)]
.endif
.endm
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_ARCH_ARC_INCLUDE_SWAP_MACROS_H_ */

View File

@@ -0,0 +1,59 @@
/*
* Copyright (c) 2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Cache helper functions and defines (ARC)
*
* This file contains cache related functions and definitions for the
* ARCv2 processor architecture.
*/
#ifndef ZEPHYR_ARCH_ARC_INCLUDE_V2_CACHE_H_
#define ZEPHYR_ARCH_ARC_INCLUDE_V2_CACHE_H_
#include <arch/cpu.h>
#ifndef _ASMLANGUAGE
#ifdef __cplusplus
extern "C" {
#endif
/* i-cache defines for IC_CTRL register */
#define IC_CACHE_ENABLE 0x00
#define IC_CACHE_DISABLE 0x01
#define IC_CACHE_DIRECT 0x00
#define IC_CACHE_INDIRECT 0x20
/*
* @brief Initialize the I-cache
*
* Enables the i-cache and sets it to direct access mode.
*/
static ALWAYS_INLINE void z_icache_setup(void)
{
uint32_t icache_config = (
IC_CACHE_DIRECT | /* direct mapping (one-way assoc.) */
IC_CACHE_ENABLE /* i-cache enabled */
);
uint32_t val;
val = z_arc_v2_aux_reg_read(_ARC_V2_I_CACHE_BUILD);
val &= 0xff;
if (val != 0U) { /* is i-cache present? */
/* configure i-cache */
z_arc_v2_aux_reg_write(_ARC_V2_IC_CTRL, icache_config);
}
}
#ifdef __cplusplus
}
#endif
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_ARCH_ARC_INCLUDE_V2_CACHE_H_ */

View File

@@ -54,9 +54,7 @@ extern "C" {
static ALWAYS_INLINE void z_irq_setup(void)
{
uint32_t aux_irq_ctrl_value = (
#ifdef CONFIG_ARC_HAS_ZOL
_ARC_V2_AUX_IRQ_CTRL_LOOP_REGS | /* save lp_xxx registers */
#endif /* CONFIG_ARC_HAS_ZOL */
#ifdef CONFIG_CODE_DENSITY
_ARC_V2_AUX_IRQ_CTRL_LP | /* save code density registers */
#endif

View File

@@ -1,5 +1,11 @@
# SPDX-License-Identifier: Apache-2.0
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-littlearm)
if(CONFIG_ARM64)
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf64-littleaarch64)
add_subdirectory(core/aarch32)
add_subdirectory(core/aarch64)
else()
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-littlearm)
add_subdirectory(core/aarch32)
endif()

View File

@@ -9,6 +9,10 @@ menu "ARM Options"
config ARCH
default "arm"
config ARM64
bool
select 64BIT
config CPU_CORTEX
bool
help
@@ -34,26 +38,12 @@ config ARM_CUSTOM_INTERRUPT_CONTROLLER
family cores. The Cortex-M family cores are always equipped with
the ARM Nested Vectored Interrupt Controller (NVIC).
config CODE_DATA_RELOCATION
bool "Relocate code/data sections"
depends on CPU_CORTEX_M
help
When selected this will relocate .text, data and .bss sections from
the specified files and places it in the required memory region. The
files should be specified in the CMakeList.txt file with
a cmake API zephyr_code_relocate().
config CODE_DATA_RELOCATION_SRAM
bool "Relocate code/data sections to SRAM"
depends on CPU_CORTEX_M
select CODE_DATA_RELOCATION
help
When selected this will relocate .text, data and .bss sections from
the specified files and places it in SRAM. The files should be specified
in the CMakeList.txt file with a cmake API zephyr_code_relocate(). This
config is used to create an MPU entry for the SRAM space used for code
relocation.
if !ARM64
rsource "core/aarch32/Kconfig"
endif
if ARM64
rsource "core/aarch64/Kconfig"
endif
endmenu

View File

@@ -2,16 +2,21 @@
zephyr_library()
if (CONFIG_COVERAGE)
zephyr_compile_options($<TARGET_PROPERTY:compiler,coverage>)
zephyr_link_libraries($<TARGET_PROPERTY:linker,coverage>)
endif ()
zephyr_library_sources(
swap.c
swap_helper.S
irq_manage.c
thread.c
cpu_idle.S
fatal.c
irq_manage.c
nmi.c
nmi_on_reset.S
prep_c.c
swap.c
swap_helper.S
thread.c
)
zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr_wrapper.S)
@@ -22,12 +27,11 @@ zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE ../common/tls.c)
zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)
add_subdirectory_ifdef(CONFIG_CPU_CORTEX_M cortex_m)
add_subdirectory_ifdef(CONFIG_ARM_MPU cortex_m/mpu)
add_subdirectory_ifdef(CONFIG_CPU_CORTEX_M_HAS_CMSE cortex_m/cmse)
add_subdirectory_ifdef(CONFIG_ARM_SECURE_FIRMWARE cortex_m/tz)
add_subdirectory_ifdef(CONFIG_ARM_NONSECURE_FIRMWARE cortex_m/tz)
add_subdirectory_ifdef(CONFIG_ARM_MPU mpu)
add_subdirectory_ifdef(CONFIG_CPU_CORTEX_R cortex_a_r)
zephyr_linker_sources(ROM_START SORT_KEY 0x0vectors vector_table.ld)

View File

@@ -9,7 +9,6 @@ config CPU_CORTEX_M
select ARCH_HAS_CUSTOM_SWAP_TO_MAIN
select HAS_CMSIS_CORE
select HAS_FLASH_LOAD_OFFSET
select ARCH_HAS_SINGLE_THREAD_SUPPORT
select ARCH_HAS_THREAD_ABORT
select ARCH_HAS_TRUSTED_EXECUTION if ARM_TRUSTZONE_M
select ARCH_HAS_STACK_PROTECTION if (ARM_MPU && !ARMV6_M_ARMV8_M_BASELINE) || CPU_CORTEX_M_HAS_SPLIM
@@ -29,10 +28,7 @@ config CPU_CORTEX_R
bool
select CPU_CORTEX
select HAS_CMSIS_CORE
select ARCH_HAS_NESTED_EXCEPTION_DETECTION
select HAS_FLASH_LOAD_OFFSET
select ARCH_HAS_USERSPACE if ARM_MPU
select ARCH_HAS_EXTRA_EXCEPTION_INFO
help
This option signifies the use of a CPU of the Cortex-R family.
@@ -134,8 +130,8 @@ config RUNTIME_NMI
config PLATFORM_SPECIFIC_INIT
bool "Enable platform (SOC) specific startup hook"
help
The platform specific initialization code (z_arm_platform_init) is
executed at the beginning of the startup code (__start).
The platform specific initialization code (z_platform_init) is executed
at the beginning of the startup code (__start).
config FAULT_DUMP
int "Fault dump level"
@@ -218,24 +214,6 @@ config ARM_NONSECURE_FIRMWARE
resources of the Cortex-M MCU, and, therefore, it shall avoid
accessing them.
config ARM_NONSECURE_PREEMPTIBLE_SECURE_CALLS
bool "Allow secure function calls to be preempted"
depends on ARM_NONSECURE_FIRMWARE
help
When enabled, this option indicates that preemptible Zephyr
threads performing secure function calls, are allowed to be
preempted. When disabled, the option indicates that such
threads many not be context-switched-out while doing a Secure
function call.
config ARM_STORE_EXC_RETURN
bool
default y if FPU_SHARING || ARM_NONSECURE_PREEMPTIBLE_SECURE_CALLS
help
Store the EXC_RETURN value when switching threads.
This is needed when switching between threads that differ in either
FPU usage or security domain.
choice
prompt "Floating point ABI"
default FP_HARDABI
@@ -243,14 +221,10 @@ choice
config FP_HARDABI
bool "Floating point Hard ABI"
depends on !BUILD_WITH_TFM
help
This option selects the Floating point ABI in which hardware floating
point instructions are generated and uses FPU-specific calling
conventions.
Note: the option is disabled for Zephyr builds with TF-M, as TF-M
does not currently support building with Hard ABI, hence linking
Zephyr with TF-M libraries would not be possible.
conventions
config FP_SOFTABI
bool "Floating point Soft ABI"
@@ -260,38 +234,5 @@ config FP_SOFTABI
endchoice
config FP16
bool "Half-precision floating point support"
default y
help
This option enables the half-precision (16-bit) floating point support
via the `__fp16` (both IEEE and ARM alternative formats) and the
`_Float16` (IEEE format only) types.
choice
prompt "FP16 format"
default FP16_IEEE
depends on FP16
config FP16_IEEE
bool "FP16 IEEE format"
help
This option selects the IEEE 754-2008 format for FP16. This format can
represent normalized values in the range of 2^(-14) to 65504. There are
11 bits of significand precision, approximately 3 decimal digits.
config FP16_ALT
bool "FP16 ARM alternative format"
help
This option selects the ARM alternative format for FP16. This
representation is similar to the IEEE 754-2008 format, but does not
support infinites or NaNs. Instead, the range of exponents is extended,
so that this format can represent normalized values in the range of
2^(-14) to 131008.
endchoice
rsource "cortex_m/Kconfig"
rsource "cortex_a_r/Kconfig"
rsource "mpu/Kconfig"

View File

@@ -3,15 +3,13 @@
zephyr_library()
zephyr_library_sources(
vector_table.S
reset.S
exc.S
exc_exit.S
fault.c
irq_init.c
reboot.c
reset.S
stacks.c
tcm.c
vector_table.S
)
zephyr_library_sources_ifdef(CONFIG_USERSPACE thread.c)

View File

@@ -38,64 +38,6 @@ GTEXT(z_arm_undef_instruction)
GTEXT(z_arm_prefetch_abort)
GTEXT(z_arm_data_abort)
.macro exception_entry mode
/*
* Store r0-r3, r12, lr, lr_und and spsr_und into the stack to
* construct an exception stack frame.
*/
srsdb sp!, #\mode
stmfd sp, {r0-r3, r12, lr}^
sub sp, #24
/*
* Create new esf struct for exception handler debug. The first
* time the basic stack frame is saved is for getting in and out
* of the exception.
*/
#if defined(CONFIG_EXTRA_EXCEPTION_INFO)
sub sp, #___callee_saved_t_SIZEOF
sub sp, #___extra_esf_info_t_SIZEOF
#endif
srsdb sp!, #\mode
stmfd sp, {r0-r3, r12, lr}^
sub sp, #24
/* Increment exception nesting count */
ldr r2, =_kernel
ldr r0, [r2, #_kernel_offset_to_nested]
add r0, r0, #1
str r0, [r2, #_kernel_offset_to_nested]
#if defined(CONFIG_EXTRA_EXCEPTION_INFO)
/* Pointer to extra esf info */
add r0, sp, #___basic_sf_t_SIZEOF
mov r1, #0
str r1, [r0, #4]
str r1, [r0, #8]
/* Pointer to callee saved registers */
add r1, r0, #___extra_esf_info_t_SIZEOF
str r1, [r0]
cps #MODE_SYS
stm r1, {r4-r11, sp}
cps #\mode
#endif
/* Invoke fault handler */
mov r0, sp
.endm
.macro exception_exit
/* Exit exception */
add sp, sp, #___basic_sf_t_SIZEOF
#if defined(CONFIG_EXTRA_EXCEPTION_INFO)
add sp, #___extra_esf_info_t_SIZEOF
add sp, #___callee_saved_t_SIZEOF
#endif
.endm
/**
* @brief Undefined instruction exception handler
*
@@ -115,10 +57,25 @@ SECTION_SUBSEC_FUNC(TEXT, __exc, z_arm_undef_instruction)
subne lr, #2 /* Thumb (T_BIT) */
pop {r0}
exception_entry MODE_UND
bl z_arm_fault_undef_instruction
exception_exit
/*
* Store r0-r3, r12, lr, lr_und and spsr_und into the stack to
* construct an exception stack frame.
*/
srsdb sp, #MODE_UND!
stmfd sp, {r0-r3, r12, lr}^
sub sp, #24
/* Increment exception nesting count */
ldr r2, =_kernel
ldr r0, [r2, #_kernel_offset_to_nested]
add r0, r0, #1
str r0, [r2, #_kernel_offset_to_nested]
/* Invoke fault handler */
mov r0, sp
bl z_arm_fault_undef_instruction
/* Exit exception */
b z_arm_exc_exit
/**
@@ -134,10 +91,25 @@ SECTION_SUBSEC_FUNC(TEXT, __exc, z_arm_prefetch_abort)
*/
sub lr, #4
exception_entry MODE_ABT
bl z_arm_fault_prefetch
exception_exit
/*
* Store r0-r3, r12, lr, lr_abt and spsr_abt into the stack to
* construct an exception stack frame.
*/
srsdb sp, #MODE_ABT!
stmfd sp, {r0-r3, r12, lr}^
sub sp, #24
/* Increment exception nesting count */
ldr r2, =_kernel
ldr r0, [r2, #_kernel_offset_to_nested]
add r0, r0, #1
str r0, [r2, #_kernel_offset_to_nested]
/* Invoke fault handler */
mov r0, sp
bl z_arm_fault_prefetch
/* Exit exception */
b z_arm_exc_exit
/**
@@ -154,19 +126,23 @@ SECTION_SUBSEC_FUNC(TEXT, __exc, z_arm_data_abort)
*/
sub lr, #8
exception_entry MODE_ABT
/*
* Store r0-r3, r12, lr, lr_abt and spsr_abt into the stack to
* construct an exception stack frame.
*/
srsdb sp, #MODE_ABT!
stmfd sp, {r0-r3, r12, lr}^
sub sp, #24
/* Increment exception nesting count */
ldr r2, =_kernel
ldr r0, [r2, #_kernel_offset_to_nested]
add r0, r0, #1
str r0, [r2, #_kernel_offset_to_nested]
/* Invoke fault handler */
mov r0, sp
bl z_arm_fault_data
/*
* If z_arm_fault_data returns false, then we recovered from
* the error. It may have updated $pc, so copy $pc back to
* the true esf from the one passed to z_arm_fault_data.
*/
cmp r0, #0
ldreq r1, [sp, #24]
exception_exit
streq r1, [sp, #24]
/* Exit exception */
b z_arm_exc_exit

View File

@@ -26,42 +26,6 @@ GTEXT(z_arm_int_exit)
GTEXT(z_arm_pendsv)
GDATA(_kernel)
.macro userspace_exc_exit
#if defined(CONFIG_USERSPACE)
cps #MODE_SVC
sub sp, #8
push {r0-r1}
/*
* Copy return state from sys/usr state onto the svc stack.
* We have to put $sp_usr back into $sp since we switched to
* the privileged stack on exception entry. The return state
* is on the privileged stack so it needs to be copied to the
* svc stack since we cannot trust the usr stack.
*/
cps #MODE_SYS
pop {r0-r1}
cps #MODE_SVC
str r0, [sp, #8]
str r1, [sp, #12]
/* Only switch the stacks if returning to a user thread */
and r1, #MODE_MASK
cmp r1, #MODE_USR
bne system_thread_exit\@
/* Restore user stack pointer */
ldr r0, =_kernel
ldr r0, [r0, #_kernel_offset_to_current]
cps #MODE_SYS
ldr sp, [r0, #_thread_offset_to_sp_usr] /* sp_usr */
cps #MODE_SVC
system_thread_exit\@:
pop {r0-r1}
#endif
.endm
/**
* @brief Kernel housekeeping when exiting interrupt handler installed directly
* in the vector table
@@ -134,7 +98,6 @@ __EXIT_INT:
*/
cps #MODE_SYS
pop {r0-r3, r12, lr}
userspace_exc_exit
rfeia sp!
/**
@@ -194,7 +157,6 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_exc_exit)
/* Return to the switched thread */
cps #MODE_SYS
pop {r0-r3, r12, lr}
userspace_exc_exit
rfeia sp!
__EXIT_EXC:

View File

@@ -7,7 +7,6 @@
#include <kernel.h>
#include <kernel_internal.h>
#include <exc_handle.h>
#include <logging/log.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
@@ -130,35 +129,6 @@ bool z_arm_fault_prefetch(z_arch_esf_t *esf)
return true;
}
#ifdef CONFIG_USERSPACE
Z_EXC_DECLARE(z_arm_user_string_nlen);
static const struct z_exc_handle exceptions[] = {
Z_EXC_HANDLE(z_arm_user_string_nlen)
};
/* Perform an assessment whether an MPU fault shall be
* treated as recoverable.
*
* @return true if error is recoverable, otherwise return false.
*/
static bool memory_fault_recoverable(z_arch_esf_t *esf)
{
for (int i = 0; i < ARRAY_SIZE(exceptions); i++) {
/* Mask out instruction mode */
uint32_t start = (uint32_t)exceptions[i].start & ~0x1U;
uint32_t end = (uint32_t)exceptions[i].end & ~0x1U;
if (esf->basic.pc >= start && esf->basic.pc < end) {
esf->basic.pc = (uint32_t)(exceptions[i].fixup);
return true;
}
}
return false;
}
#endif
/**
* @brief Data abort fault handler
*
@@ -173,15 +143,6 @@ bool z_arm_fault_data(z_arch_esf_t *esf)
/* Read Data Fault Address Register (DFAR) */
uint32_t dfar = __get_DFAR();
#if defined(CONFIG_USERSPACE)
if ((fs == FSR_FS_BACKGROUND_FAULT)
|| (fs == FSR_FS_PERMISSION_FAULT)) {
if (memory_fault_recoverable(esf)) {
return false;
}
}
#endif
/* Print fault information*/
LOG_ERR("***** DATA ABORT *****");
if (FAULT_DUMP_VERBOSE) {

View File

@@ -29,7 +29,7 @@ GDATA(z_arm_fiq_stack)
GDATA(z_arm_abort_stack)
GDATA(z_arm_undef_stack)
#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
GTEXT(z_arm_platform_init)
GTEXT(z_platform_init)
#endif
/**
@@ -177,7 +177,7 @@ SECTION_SUBSEC_FUNC(TEXT, _reset_section, __start)
#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
/* Execute platform-specific initialisation if applicable */
bl z_arm_platform_init
bl z_platform_init
#endif
#if defined(CONFIG_WDOG_INIT)

View File

@@ -1,19 +0,0 @@
/*
* Copyright (c) 2021 Lexmark International, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdbool.h>
#include <arch/arm/aarch32/cortex_a_r/cmsis.h>
bool z_arm_thread_is_in_user_mode(void)
{
uint32_t value;
/*
* For Cortex-R, the mode (lower 5) bits will be 0x10 for user mode.
*/
value = __get_CPSR();
return ((value & CPSR_M_Msk) == CPSR_M_USR);
}

View File

@@ -3,25 +3,19 @@
zephyr_library()
zephyr_library_sources(
exc_exit.S
fault.c
fault_s.S
fpu.c
irq_init.c
reset.S
scb.c
thread_abort.c
vector_table.S
reset.S
fault_s.S
fault.c
exc_exit.S
scb.c
irq_init.c
thread_abort.c
)
zephyr_library_sources_ifdef(CONFIG_USERSPACE thread.c)
zephyr_library_sources_ifdef(CONFIG_DEBUG_COREDUMP coredump.c)
zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE __aeabi_read_tp.S)
if(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
zephyr_library_sources(debug.c)
endif()
if(CONFIG_CORTEX_M_DWT)
if (CONFIG_TIMING_FUNCTIONS)
zephyr_library_sources(timing.c)

View File

@@ -62,15 +62,6 @@ config CPU_CORTEX_M33
help
This option signifies the use of a Cortex-M33 CPU
config CPU_CORTEX_M55
bool
select CPU_CORTEX_M
select ARMV8_1_M_MAINLINE
select ARMV8_M_SE if CPU_HAS_TEE
select ARMV7_M_ARMV8_M_FP if CPU_HAS_FPU
help
This option signifies the use of a Cortex-M55 CPU
config CPU_CORTEX_M7
bool
select CPU_CORTEX_M
@@ -222,16 +213,6 @@ config ARMV8_M_MAINLINE
ARMv8-M Main Extension includes additional features
not present in the ARMv7-M architecture.
config ARMV8_1_M_MAINLINE
bool
select ARMV8_M_MAINLINE
help
This option signifies the use of an ARMv8.1-M processor
implementation, supporting the Main Extension.
ARMv8.1-M Main Extension includes additional features
not present in the ARMv8-M architecture.
config ARMV8_M_SE
bool
depends on ARMV8_M_BASELINE || ARMV8_M_MAINLINE
@@ -244,7 +225,6 @@ config ARMV8_M_SE
config ARMV7_M_ARMV8_M_FP
bool
depends on ARMV7_M_ARMV8_M_MAINLINE && !CPU_CORTEX_M3
imply FPU_SHARING
help
This option signifies the use of an ARMv7-M processor
implementation, or the use of an ARMv8-M processor
@@ -257,22 +237,6 @@ config ARMV8_M_DSP
This option signifies the use of an ARMv8-M processor
implementation supporting the DSP Extension.
config ARMV8_1_M_MVEI
bool
depends on ARMV8_1_M_MAINLINE
depends on ARMV8_M_DSP
help
This option signifies the use of an ARMv8.1-M processor implementation
supporting the M-Profile Vector Extension (MVE) integer instruction set.
config ARMV8_1_M_MVEF
bool
depends on ARMV8_1_M_MVEI
help
This option signifies the use of an ARMv8.1-M processor implementation
supporting the M-Profile Vector Extension (MVE) floating-point
instruction set.
menu "ARM Cortex-M0/M0+/M1/M3/M4/M7/M23/M33 options"
depends on ARMV6_M_ARMV8_M_BASELINE || ARMV7_M_ARMV8_M_MAINLINE
@@ -341,100 +305,7 @@ config TEST_EXTRA_STACKSIZE
endmenu
# Implement the null pointer detection using either the Data Watchpoint and
# Trace Unit and the Debug Monitor Exception, or the Memory Protection Unit.
choice NULL_POINTER_EXCEPTION_DETECTION
bool "Enable and use null-pointer exception"
# Disable this until https://github.com/zephyrproject-rtos/zephyr/issues/32984 is fixed
# default NULL_POINTER_EXCEPTION_DETECTION_DWT if TEST_ARM_CORTEX_M && !ARM_NONSECURE_FIRMWARE && CPU_CORTEX_M_HAS_DWT
default NULL_POINTER_EXCEPTION_DETECTION_MPU if TEST_ARM_CORTEX_M && !ARM_NONSECURE_FIRMWARE && ARM_MPU && !CPU_CORTEX_M_HAS_DWT
default NULL_POINTER_EXCEPTION_DETECTION_NONE
help
There are 2 implementations available, one based
on DWT and the other based on MPU. Use this choice
symbol to select one of the options. By default the
feature is disabled. In the test suite the feature
is enabled and the DWT-based solution is preferred.
config NULL_POINTER_EXCEPTION_DETECTION_NONE
bool "Do not enable null pointer exception detection"
help
Null pointer exception detection feature is not
enabled.
config NULL_POINTER_EXCEPTION_DETECTION_DWT
bool "Use DWT for null pointer exception detection"
depends on CPU_CORTEX_M_HAS_DWT
depends on !TRUSTED_EXECUTION_NONSECURE
select CORTEX_M_DWT
select CORTEX_M_NULL_POINTER_EXCEPTION
help
Null pointer dereference detection implemented
using the DWT unit functionality.
Notes:
- Not enabled for Non-Secure FW images, where
null-pointer dereferencing is likely caught as
a SecureFault.
- Requires DWT functionality in the Cortex-M SoC
implementation (1 comparator for ARMv7-M, 2 comparators
for ARMv8-M).
- Requires the Cortex-M core be in normal mode.
config NULL_POINTER_EXCEPTION_DETECTION_MPU
bool "Use MPU for null pointer exception detection"
depends on !TRUSTED_EXECUTION_NONSECURE
depends on ARM_MPU
select CORTEX_M_NULL_POINTER_EXCEPTION
help
Null pointer dereference detection implemented
using MPU functionality.
Notes:
- Mutually exclusive to the DWT-based solution
- Not enabled for Non-Secure FW images, where
null-pointer dereferencing is likely caught as
a SecureFault.
- Requires MPU functionality to be present and
enabled. The implementation consumes 1 MPU region.
- In ARMv8-M, explicit null-pointer dereference
detection with MPU requires, additionally, that
the area: [0x0,
CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE)
is not unmapped (covered by an MPU region already).
If it is unmapped null-pointer dereferencing may
still be idirectly detected (e.g. via a precise
Bus access fault), but this is not guaranteed. A
build-time message warns the user of this scenario.
endchoice
config CORTEX_M_NULL_POINTER_EXCEPTION
bool
help
Enable and use the null pointer exception option.
This is a debug feature in Cortex-M, allowing for
detecting null pointer dereferencing (raising a
CPU fault). Supporting the feature results in an
increased code footprint, determined by option
CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE.
Note: this hidden option is selected by the choice
symbols corresponding to the DWT-based or to the
MPU-based solution.
if CORTEX_M_NULL_POINTER_EXCEPTION
config CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE
hex "Size of paged unmapped to implement null pointer detection"
default 0x400
help
Size of the page reserved for detecting null pointer
dereferencing. Must be a power of two. A large value
offers enhanced detection performance to the cost of
wasting a large flash area that code may not use.
endif # CORTEX_M_NULL_POINTER_EXCEPTION
rsource "mpu/Kconfig"
rsource "tz/Kconfig"
endif # CPU_CORTEX_M

View File

@@ -45,7 +45,7 @@ static int arm_cmse_addr_range_read_write_ok(uint32_t addr, uint32_t size,
{
int flags = 0;
if (force_npriv != 0) {
if (force_npriv) {
flags |= CMSE_MPU_UNPRIV;
}
if (rw) {
@@ -141,7 +141,7 @@ static int arm_cmse_addr_range_nonsecure_read_write_ok(uint32_t addr, uint32_t s
{
int flags = CMSE_NONSECURE;
if (force_npriv != 0) {
if (force_npriv) {
flags |= CMSE_MPU_UNPRIV;
}
if (rw) {

View File

@@ -1,124 +0,0 @@
/*
* Copyright (c) 2020 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief ARM Cortex-M debug monitor functions interface based on DWT
*
*/
#include <device.h>
#include <aarch32/cortex_m/dwt.h>
/**
* @brief Assess whether a debug monitor event should be treated as an error
*
* This routine checks the status of a debug monitor ()exception, and
* evaluates whether this needs to be considered as a processor error.
*
* @return true if the DM exception is a processor error, otherwise false
*/
bool z_arm_debug_monitor_event_error_check(void)
{
#if defined(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
/* Assess whether this debug exception was triggered
* as a result of a null pointer (R/W) dereferencing.
*/
if (SCB->DFSR & SCB_DFSR_DWTTRAP_Msk) {
/* Debug event generated by the DWT unit */
if (DWT->FUNCTION0 & DWT_FUNCTION_MATCHED_Msk) {
/* DWT Comparator match used for */
printk("Null-pointer exception?\n");
}
__ASSERT((DWT->FUNCTION0 & DWT_FUNCTION_MATCHED_Msk) == 0,
"MATCHED flag should have been cleared on read.");
return true;
}
if (SCB->DFSR & SCB_DFSR_BKPT_Msk) {
/* Treat BKPT events as an error as well (since they
* would mean the system would be stuck in an infinite loop).
*/
return true;
}
#endif /* CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT */
return false;
}
#if defined(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
/* The area (0x0 - <size>) monitored by DWT needs to be a power of 2,
* so we add a build assert that catches it.
*/
BUILD_ASSERT(!(CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE &
(CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE - 1)),
"the size of the partition must be power of 2");
static int z_arm_debug_enable_null_pointer_detection(const struct device *arg)
{
ARG_UNUSED(arg);
z_arm_dwt_init();
z_arm_dwt_enable_debug_monitor();
/* Enable null pointer detection by monitoring R/W access to the
* memory area 0x0 - <size> that is (or was intentionally left)
* unused by the system.
*/
#if defined(CONFIG_ARMV8_M_MAINLINE)
/* ASSERT that we have the comparators needed for the implementation */
if (((DWT->CTRL & DWT_CTRL_NUMCOMP_Msk) >> DWT_CTRL_NUMCOMP_Pos) < 2) {
__ASSERT(0, "on board DWT does not support the feature\n");
return -EINVAL;
}
/* Use comparators 0, 1, R/W access check */
DWT->COMP0 = 0;
DWT->COMP1 = CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE - 1;
DWT->FUNCTION0 =
((0x4 << DWT_FUNCTION_MATCH_Pos) & DWT_FUNCTION_MATCH_Msk)
|
((0x1 << DWT_FUNCTION_ACTION_Pos) & DWT_FUNCTION_ACTION_Msk)
|
((0x0 << DWT_FUNCTION_DATAVSIZE_Pos) & DWT_FUNCTION_DATAVSIZE_Msk)
;
DWT->FUNCTION1 =
((0x7 << DWT_FUNCTION_MATCH_Pos) & DWT_FUNCTION_MATCH_Msk)
|
((0x1 << DWT_FUNCTION_ACTION_Pos) & DWT_FUNCTION_ACTION_Msk)
|
((0x0 << DWT_FUNCTION_DATAVSIZE_Pos) & DWT_FUNCTION_DATAVSIZE_Msk)
;
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* ASSERT that we have the comparator needed for the implementation */
if (((DWT->CTRL & DWT_CTRL_NUMCOMP_Msk) >> DWT_CTRL_NUMCOMP_Pos) < 1) {
__ASSERT(0, "on board DWT does not support the feature\n");
return -EINVAL;
}
/* Use comparator 0, R/W access check */
DWT->COMP0 = 0;
DWT->FUNCTION0 = (0x7 << DWT_FUNCTION_FUNCTION_Pos) &
DWT_FUNCTION_FUNCTION_Msk;
/* Set mask according to the desired size */
DWT->MASK0 = 32 - __builtin_clzl(
CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE - 1);
#endif
return 0;
}
SYS_INIT(z_arm_debug_enable_null_pointer_detection, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT */

View File

@@ -170,7 +170,7 @@ static const struct z_exc_handle exceptions[] = {
*
* @return true if error is recoverable, otherwise return false.
*/
static bool memory_fault_recoverable(z_arch_esf_t *esf, bool synchronous)
static bool memory_fault_recoverable(z_arch_esf_t *esf)
{
#ifdef CONFIG_USERSPACE
for (int i = 0; i < ARRAY_SIZE(exceptions); i++) {
@@ -178,14 +178,6 @@ static bool memory_fault_recoverable(z_arch_esf_t *esf, bool synchronous)
uint32_t start = (uint32_t)exceptions[i].start & ~0x1U;
uint32_t end = (uint32_t)exceptions[i].end & ~0x1U;
#if defined(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
/* Non-synchronous exceptions (e.g. DebugMonitor) may have
* allowed PC to continue to the next instruction.
*/
end += (synchronous) ? 0x0 : 0x4;
#else
ARG_UNUSED(synchronous);
#endif
if (esf->basic.pc >= start && esf->basic.pc < end) {
esf->basic.pc = (uint32_t)(exceptions[i].fixup);
return true;
@@ -243,7 +235,7 @@ static uint32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault,
if ((SCB->CFSR & SCB_CFSR_MMARVALID_Msk) != 0) {
mmfar = temp;
PR_EXC(" MMFAR Address: 0x%x", mmfar);
if (from_hard_fault != 0) {
if (from_hard_fault) {
/* clear SCB_MMAR[VALID] to reset */
SCB->CFSR &= ~SCB_CFSR_MMARVALID_Msk;
}
@@ -332,9 +324,8 @@ static uint32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault,
}
#else
(void)mmfar;
__ASSERT(!(SCB->CFSR & SCB_CFSR_MSTKERR_Msk),
"Stacking or Data Access Violation error "
"without stack guard, user-mode or null-pointer detection\n");
__ASSERT(0,
"Stacking error without stack guard / User-mode support\n");
#endif /* CONFIG_MPU_STACK_GUARD || CONFIG_USERSPACE */
}
@@ -342,7 +333,7 @@ static uint32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault,
SCB->CFSR |= SCB_CFSR_MEMFAULTSR_Msk;
/* Assess whether system shall ignore/recover from this MPU fault. */
*recoverable = memory_fault_recoverable(esf, true);
*recoverable = memory_fault_recoverable(esf);
return reason;
}
@@ -381,7 +372,7 @@ static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable)
if ((SCB->CFSR & SCB_CFSR_BFARVALID_Msk) != 0) {
PR_EXC(" BFAR Address: 0x%x", bfar);
if (from_hard_fault != 0) {
if (from_hard_fault) {
/* clear SCB_CFSR_BFAR[VALID] to reset */
SCB->CFSR &= ~SCB_CFSR_BFARVALID_Msk;
}
@@ -397,8 +388,6 @@ static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable)
#else
} else if (SCB->CFSR & SCB_CFSR_LSPERR_Msk) {
PR_FAULT_INFO(" Floating-point lazy state preservation error");
} else {
;
}
#endif /* !defined(CONFIG_ARMV7_M_ARMV8_M_FP) */
@@ -498,7 +487,7 @@ static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable)
/* clear BFSR sticky bits */
SCB->CFSR |= SCB_CFSR_BUSFAULTSR_Msk;
*recoverable = memory_fault_recoverable(esf, true);
*recoverable = memory_fault_recoverable(esf);
return reason;
}
@@ -606,51 +595,18 @@ static void secure_fault(const z_arch_esf_t *esf)
*
* @return N/A
*/
static void debug_monitor(z_arch_esf_t *esf, bool *recoverable)
static void debug_monitor(const z_arch_esf_t *esf)
{
*recoverable = false;
ARG_UNUSED(esf);
PR_FAULT_INFO(
"***** Debug monitor exception *****");
#if defined(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
if (!z_arm_debug_monitor_event_error_check()) {
/* By default, all debug monitor exceptions that are not
* treated as errors by z_arm_debug_event_error_check(),
* they are considered as recoverable errors.
*/
*recoverable = true;
} else {
*recoverable = memory_fault_recoverable(esf, false);
}
#endif
"***** Debug monitor exception (not implemented) *****");
}
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
static inline bool z_arm_is_synchronous_svc(z_arch_esf_t *esf)
{
uint16_t *ret_addr = (uint16_t *)esf->basic.pc;
/* SVC is a 16-bit instruction. On a synchronous SVC
* escalated to Hard Fault, the return address is the
* next instruction, i.e. after the SVC.
*/
#define _SVC_OPCODE 0xDF00
uint16_t fault_insn = *(ret_addr - 1);
if (((fault_insn & 0xff00) == _SVC_OPCODE) &&
((fault_insn & 0x00ff) == _SVC_CALL_RUNTIME_EXCEPT)) {
return true;
}
#undef _SVC_OPCODE
return false;
}
/**
*
* @brief Dump hard fault information
@@ -674,26 +630,31 @@ static uint32_t hard_fault(z_arch_esf_t *esf, bool *recoverable)
* priority. We handle the case of Kernel OOPS and Stack
* Fail here.
*/
if (z_arm_is_synchronous_svc(esf)) {
uint16_t *ret_addr = (uint16_t *)esf->basic.pc;
/* SVC is a 16-bit instruction. On a synchronous SVC
* escalated to Hard Fault, the return address is the
* next instruction, i.e. after the SVC.
*/
#define _SVC_OPCODE 0xDF00
uint16_t fault_insn = *(ret_addr - 1);
if (((fault_insn & 0xff00) == _SVC_OPCODE) &&
((fault_insn & 0x00ff) == _SVC_CALL_RUNTIME_EXCEPT)) {
PR_EXC("ARCH_EXCEPT with reason %x\n", esf->basic.r0);
reason = esf->basic.r0;
}
#undef _SVC_OPCODE
*recoverable = memory_fault_recoverable(esf, true);
*recoverable = memory_fault_recoverable(esf);
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
*recoverable = false;
if ((SCB->HFSR & SCB_HFSR_VECTTBL_Msk) != 0) {
PR_EXC(" Bus fault on vector table read");
} else if ((SCB->HFSR & SCB_HFSR_DEBUGEVT_Msk) != 0) {
PR_EXC(" Debug event");
} else if ((SCB->HFSR & SCB_HFSR_FORCED_Msk) != 0) {
PR_EXC(" Fault escalation (see below)");
if (z_arm_is_synchronous_svc(esf)) {
PR_EXC("ARCH_EXCEPT with reason %x\n", esf->basic.r0);
reason = esf->basic.r0;
} else if (SCB_MMFSR != 0) {
if (SCB_MMFSR != 0) {
reason = mem_manage_fault(esf, 1, recoverable);
} else if (SCB_BFSR != 0) {
reason = bus_fault(esf, 1, recoverable);
@@ -703,14 +664,7 @@ static uint32_t hard_fault(z_arch_esf_t *esf, bool *recoverable)
} else if (SAU->SFSR != 0) {
secure_fault(esf);
#endif /* CONFIG_ARM_SECURE_FIRMWARE */
} else {
__ASSERT(0,
"Fault escalation without FSR info");
}
} else {
__ASSERT(0,
"HardFault without HFSR info"
" Shall never occur");
}
#else
#error Unknown ARM architecture
@@ -765,7 +719,7 @@ static uint32_t fault_handle(z_arch_esf_t *esf, int fault, bool *recoverable)
break;
#endif /* CONFIG_ARM_SECURE_FIRMWARE */
case 12:
debug_monitor(esf, recoverable);
debug_monitor(esf);
break;
#else
#error Unknown ARM architecture
@@ -849,7 +803,7 @@ static inline z_arch_esf_t *get_esf(uint32_t msp, uint32_t psp, uint32_t exc_ret
bool *nested_exc)
{
bool alternative_state_exc = false;
z_arch_esf_t *ptr_esf = NULL;
z_arch_esf_t *ptr_esf;
*nested_exc = false;

View File

@@ -1,65 +0,0 @@
/*
* Copyright (c) 2019,2020 Linaro Limited
* Copyright (c) 2021 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <kernel.h>
#include <arch/arm/aarch32/cortex_m/cmsis.h>
#include <arch/arm/aarch32/cortex_m/fpu.h>
/**
* @file @brief Helper functions for saving and restoring the FP context.
*
*/
void z_arm_save_fp_context(struct fpu_ctx_full *buffer)
{
#if defined(CONFIG_FPU_SHARING)
__ASSERT_NO_MSG(buffer != NULL);
uint32_t CONTROL = __get_CONTROL();
if (CONTROL & CONTROL_FPCA_Msk) {
/* Store caller-saved and callee-saved FP registers. */
__asm__ volatile(
"vstmia %0, {s0-s15}\n"
"vstmia %1, {s16-s31}\n"
:: "r" (buffer->caller_saved), "r" (buffer->callee_saved) :
);
buffer->fpscr = __get_FPSCR();
buffer->ctx_saved = true;
/* Disable FPCA so no stacking of FP registers happens in TFM. */
__set_CONTROL(CONTROL & ~CONTROL_FPCA_Msk);
/* ISB is recommended after setting CONTROL. It's not needed
* here though, since FPCA should have no impact on instruction
* fetching.
*/
}
#endif
}
void z_arm_restore_fp_context(const struct fpu_ctx_full *buffer)
{
#if defined(CONFIG_FPU_SHARING)
if (buffer->ctx_saved) {
/* Set FPCA first so it is set even if an interrupt happens
* during restoration.
*/
__set_CONTROL(__get_CONTROL() | CONTROL_FPCA_Msk);
/* Restore FP state. */
__set_FPSCR(buffer->fpscr);
__asm__ volatile(
"vldmia %0, {s0-s15}\n"
"vldmia %1, {s16-s31}\n"
:: "r" (buffer->caller_saved), "r" (buffer->callee_saved) :
);
}
#endif
}

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