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Author SHA1 Message Date
Gerard Marull-Paretas
9ff30a149d init: remove support for devices
Devices no longer use SYS_INIT infrastructure.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-09-21 12:43:04 +00:00
Fabio Baltieri
db747c085f scripts: check_init_priorities: handle init and device decoupling
Fix check_init_priorities.py to handle the decoupling between SYS_INIT
and devices.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-21 12:43:04 +00:00
Gerard Marull-Paretas
c55650c200 [RFC] device: devices no longer depend on SYS_INIT
Background
----------

Nowadays, devices rely on the `init.h` (i.e. `SYS_INIT`) infrastructure
to get initialized automatically. The `init.h` infrastructure is a basic
mechanism that allows to register an init function when the system is
initialized (before `main`). It provides with multiple initialization
levels: `PRE_KERNEL_*`, `POST_KERNEL`, etc., and within each level a
numeric priority (0-99). Using this information, each registered init
entry is sorted by the linker so that the Kernel can later iterate over
them in the correct order. This all sounds nice and simple, but when it
comes to devices, this mechanism has proven to be insufficient.

Before starting with the changes proposed in this patch, let's first dig
into the implementation details of the current model. When devices are
defined, using any of the `DEVICE_*DEFINE` macros, they also create an
init entry using the internal `init.h` APIs (see
`Z_DEVICE_INIT_ENTRY_DEFINE`). This entry, stores a pointer to the
device init call and to the device itself. As the reader can imagine,
this implies a coupling between `init.h` and `device.h`.  The only link
between a device and an init entry is the device pointer stored in the
init entry. This allows the Kernel init machinery to call the init
function with the right device pointer. However, there is no direct
relationship between a device and its init function, that is, `struct
device` does not keep the device init function reference. This is not a
problem nowadays, but it could be a problem if features like deferred
initialization or init/de-init have to be implemented. However, in
reality, this is a _secondary_ problem. The most problematic issue we
have today is that devices are mixed with `SYS_INIT` calls. They are all
part of the same init block, and are treated equally. So for example,
one can theoretically have a system where the init sequence can be like:

```
- PRE_KERNEL_1
  - init call 1
  - device 0
  - init call 2
  - init call 3
  - device 1
  - device 2
  - init call 4
- PRE_KERNEL_2
  - init call 5
  - device 3
  ...
```

This is problematic because:

(1) Init calls can depend on devices, but dependency is not tracked
    anywhere. So the user must check that init priorities are correct to
    avoid runtime failures.
(2) Device drivers can have multiple instances, and each instance may
    require a different set of priorities, while `SYS_INIT` calls are
    singletons.
(3) Devices don't likely need so many init priorities (`SMP`?
    `APPLICATION`?)

(1) is particularly important because init calls do not have a specific
purpose. They usage ranges from SoC init code, to system services. So
it's _unpredictable_ what can happen in there. (2) is a tangential
topic, actually not fixed by this patch, even though it helps. (3) is
more of a post-patch cleanup we need.

So, what does this patch propose...?
------------------------------------

**First, this patch is still a HACK, so please, focus on the description
rather than with the implementation**

So it's about providing devices with their own init infrastructure,
minimizing the coupling with init.h. This patch groups devices in a
separate section, but, keeps the same init levels as before. Therefore,
the list above would look like:

```
/* devices */
- PRE_KERNEL_1
  - device 0
  - device 1
  - device 2
- PRE_KERNEL_2
  - device 3
  ...

/* init calls */
- PRE_KERNEL_1
  - init call 1
  - init call 2
  - init call 3
  - init call 4
- PRE_KERNEL_2
  - init call 5
  ...
```

This means that **it is no longer possible** to mix init calls and
devices within the same level. So how does it work now? Within each
level, devices are initialized first, then init calls. It is done this
way because I believe it is init calls who depend on devices and not
vice versa. I may be wrong, and so the whole proposal would need a
rework. So the init order would look like:

```
- PRE_KERNEL_1
  - device 0
  - device 1
  - device 2
  - init call 1
  - init call 2
  - init call 3
  - init call 4
- PRE_KERNEL_2
  - device 3
  - init call 5
  ...
```

Why does this matter for future development?
--------------------------------------------

First, we have devices grouped at least on a level basis. This means
that we could likely start using devicetree ordinals, by reducing the
source of problems to the init level only. We can also re-think device
init levels (probably init levels as well, hey `PRE_KERNEL_1/2`). For
example, there could be pre-kernel and post-kernel devices only. The
other side effect of this change is that `struct device` stores the
device init call, so we can potentially do things like defer device
initialization or implement things like init/de-init. They all come with
their own complexity, of course, but this patch could be a step forward.

Problems
--------

This is a breaking change. Sorry, guys, another one to the list. The API
does not change, so builds should continue to work. However, the system
changes its behavior, so if anyone was relying on mixed init call/device
sequences, things will break. This is why it is important to analyze
lots of use cases before moving forward with this proposal.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-09-21 12:43:04 +00:00
Gerard Marull-Paretas
dac81a202f device: device handles should not be related with SYS_INIT
Device handles are only meant to identify a device, nothing else.
Reserve negative values for any potential future use, though.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-09-21 12:43:04 +00:00
2906 changed files with 21168 additions and 113575 deletions

6
.github/SECURITY.md vendored
View File

@@ -8,12 +8,12 @@ updates:
- The most recent release, and the release prior to that.
- Active LTS releases.
At this time, with the latest release of v3.5, the supported
At this time, with the latest release of v3.3, the supported
versions are:
- v2.7: Current LTS
- v3.4: Prior release
- v3.5: Current release
- v3.2: Prior release
- v3.3: Current release
## Reporting process

View File

@@ -4,6 +4,14 @@
name: Twister BlackBox TestSuite
on:
push:
branches:
- main
paths:
- 'scripts/pylib/twister/**'
- 'scripts/twister'
- 'scripts/tests/twister_blackbox/**'
- '.github/workflows/blackbox_tests.yml'
pull_request:
branches:
- main
@@ -11,7 +19,7 @@ on:
- 'scripts/pylib/twister/**'
- 'scripts/twister'
- 'scripts/tests/twister_blackbox/**'
- '.github/workflows/twister_tests_blackbox.yml'
- '.github/workflows/blackbox_tests.yml'
jobs:
twister-tests:
@@ -22,9 +30,9 @@ jobs:
python-version: [3.8, 3.9, '3.10']
os: [ubuntu-22.04]
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.5
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.3
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
steps:
- name: Apply Container Owner Mismatch Workaround

View File

@@ -30,19 +30,18 @@ jobs:
if: github.repository_owner == 'zephyrproject-rtos'
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.5
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
env:
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.3
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
EDTT_PATH: ../tools/edtt
bsim_bt_52_test_results_file: ./bsim_bt/52_bsim_results.xml
bsim_bt_53_test_results_file: ./bsim_bt/53_bsim_results.xml
bsim_net_52_test_results_file: ./bsim_net/52_bsim_results.xml
bsim_bluetooth_test_results_file: ./bsim_bluetooth/bsim_results.xml
bsim_networking_test_results_file: ./bsim_net/bsim_results.xml
steps:
- name: Apply container owner mismatch workaround
run: |
@@ -134,22 +133,16 @@ jobs:
if: steps.check-bluetooth-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
export ZEPHYR_BASE=${PWD}
WORK_DIR=${ZEPHYR_BASE}/bsim_bt nice tests/bsim/bluetooth/compile.sh
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bt_52_test_results_file} \
WORK_DIR=${ZEPHYR_BASE}/bsim_bluetooth nice tests/bsim/bluetooth/compile.sh
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bluetooth_test_results_file} \
SEARCH_PATH=tests/bsim/bluetooth/ tests/bsim/run_parallel.sh
# Run the BT controller tests also for the nrf5340
BOARD=nrf5340bsim_nrf5340_cpunet \
WORK_DIR=${ZEPHYR_BASE}/bsim_bt nice tests/bsim/bluetooth/ll/compile.sh
BOARD=nrf5340bsim_nrf5340_cpunet \
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bt_53_test_results_file} \
SEARCH_PATH=tests/bsim/bluetooth/ll/ tests/bsim/run_parallel.sh
- name: Run Networking Tests with BSIM
if: steps.check-networking-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
export ZEPHYR_BASE=${PWD}
WORK_DIR=${ZEPHYR_BASE}/bsim_net nice tests/bsim/net/compile.sh
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_net_52_test_results_file} \
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_networking_test_results_file} \
SEARCH_PATH=tests/bsim/net/ tests/bsim/run_parallel.sh
- name: Upload Test Results
@@ -158,9 +151,8 @@ jobs:
with:
name: bsim-test-results
path: |
./bsim_bt/52_bsim_results.xml
./bsim_bt/53_bsim_results.xml
./bsim_net/52_bsim_results.xml
./bsim_bluetooth/bsim_results.xml
./bsim_net/bsim_results.xml
${{ github.event_path }}
if-no-files-found: warn

View File

@@ -11,7 +11,7 @@ jobs:
if: github.repository_owner == 'zephyrproject-rtos'
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.5
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
@@ -20,7 +20,7 @@ jobs:
matrix:
platform: ["native_posix"]
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.3
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
LLVM_TOOLCHAIN_PATH: /usr/lib/llvm-16
COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
BASE_REF: ${{ github.base_ref }}
@@ -58,7 +58,6 @@ jobs:
git log --pretty=oneline | head -n 10
west init -l . || true
west config --global update.narrow true
west config manifest.group-filter -- +ci,+optional
# In some cases modules are left in a state where they can't be
# updated (i.e. when we cancel a job and the builder is killed),
# So first retry to update, if that does not work, remove all modules

View File

@@ -13,7 +13,7 @@ jobs:
if: github.repository == 'zephyrproject-rtos/zephyr'
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.5
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
@@ -22,7 +22,7 @@ jobs:
matrix:
platform: ["native_posix", "qemu_x86", "unit_testing"]
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.3
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
steps:
- name: Apply container owner mismatch workaround
run: |

View File

@@ -44,7 +44,6 @@ jobs:
# debug
git log --pretty=oneline | head -n 10
west init -l . || true
west config manifest.group-filter -- +ci,+optional
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
- name: Run Compliance Tests

View File

@@ -44,20 +44,6 @@ jobs:
steps:
- name: checkout
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Rebase
continue-on-error: true
env:
BASE_REF: ${{ github.base_ref }}
PR_HEAD: ${{ github.event.pull_request.head.sha }}
run: |
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git rebase origin/${BASE_REF}
git log --graph --oneline HEAD...${PR_HEAD}
- name: install-pkgs
run: |

View File

@@ -10,9 +10,9 @@ jobs:
check-errno:
runs-on: ubuntu-22.04
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.5
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.3
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
steps:
- name: Apply container owner mismatch workaround

View File

@@ -22,15 +22,15 @@ concurrency:
jobs:
footprint-tracking:
runs-on: zephyr-runner-linux-x64-4xlarge
runs-on: ubuntu-22.04
if: github.repository_owner == 'zephyrproject-rtos'
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.5
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.3
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
steps:
- name: Apply container owner mismatch workaround

View File

@@ -8,15 +8,15 @@ concurrency:
jobs:
footprint-delta:
runs-on: zephyr-runner-linux-x64-4xlarge
runs-on: ubuntu-22.04
if: github.repository == 'zephyrproject-rtos/zephyr'
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.5
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.3
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
steps:
- name: Apply container owner mismatch workaround

View File

@@ -29,18 +29,12 @@ jobs:
Hello @${{ github.event.pull_request.user.login }}, and thank you very much for your
first pull request to the Zephyr project!
Our Continuous Integration pipeline will execute a series of checks on your Pull Request
commit messages and code, and you are expected to address any failures by updating the PR.
Please take a look at [our commit message guidelines](https://docs.zephyrproject.org/latest/contribute/guidelines.html#commit-message-guidelines)
to find out how to format your commit messages, and at [our contribution workflow](https://docs.zephyrproject.org/latest/contribute/guidelines.html#contribution-workflow)
to understand how to update your Pull Request.
If you haven't already, please make sure to review the project's [Contributor
Expectations](https://docs.zephyrproject.org/latest/contribute/contributor_expectations.html)
and update (by amending and force-pushing the commits) your pull request if necessary.
If you are stuck or need help please join us on [Discord](https://chat.zephyrproject.org/)
and ask your question there. Additionally, you can [escalate the review](https://docs.zephyrproject.org/latest/contribute/contributor_expectations.html#pr-review-escalation)
when applicable. 😊
A project maintainer just triggered our CI pipeline to run it against your PR and
ensure it's compliant and doesn't cause any issues. You might want to take this
opportunity to review the project's [Contributor
Expectations](https://docs.zephyrproject.org/latest/contribute/contributor_expectations.html)
and make any updates to your pull request if necessary. 😊
pr-merged-message: >
Hi @${{ github.event.pull_request.user.login }}!

View File

@@ -26,7 +26,7 @@ jobs:
west init -l . || true
- name: Manifest
uses: zephyrproject-rtos/action-manifest@v1.2.0
uses: zephyrproject-rtos/action-manifest@f223dce288b0d8f30bfd57eb2b14b18c230a7d8b
with:
github-token: ${{ secrets.ZB_GITHUB_TOKEN }}
manifest-path: 'west.yml'

View File

@@ -1,54 +0,0 @@
# Copyright (c) 2023 Intel Corporation.
# SPDX-License-Identifier: Apache-2.0
name: Misc. Pylib Scripts TestSuite
on:
push:
branches:
- main
- v*-branch
paths:
- 'scripts/pylib/build_helpers/**'
- '.github/workflows/pylib_tests.yml'
pull_request:
branches:
- main
- v*-branch
paths:
- 'scripts/pylib/build_helpers/**'
- '.github/workflows/pylib_tests.yml'
jobs:
pylib-tests:
name: Misc. Pylib Unit Tests
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: [3.8, 3.9, '3.10']
os: [ubuntu-22.04]
steps:
- name: checkout
uses: actions/checkout@v3
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux
if: startsWith(runner.os, 'Linux')
uses: actions/cache@v3
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ matrix.python-version }}
restore-keys: |
${{ runner.os }}-pip-${{ matrix.python-version }}
- name: install-packages
run: |
pip3 install -r scripts/requirements-base.txt -r scripts/requirements-build-test.txt
- name: Run pytest for build_helpers
env:
ZEPHYR_BASE: ./
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
run: |
echo "Run build_helpers tests"
PYTHONPATH=./scripts/tests pytest ./scripts/tests/build_helpers

View File

@@ -5,12 +5,10 @@ on:
branches:
- main
- v*-branch
- collab-*
pull_request_target:
branches:
- main
- v*-branch
- collab-*
schedule:
# Run at 03:00 UTC on every Sunday
- cron: '0 3 * * 0'
@@ -24,7 +22,7 @@ jobs:
if: github.repository_owner == 'zephyrproject-rtos'
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.5
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
@@ -36,7 +34,7 @@ jobs:
MATRIX_SIZE: 10
PUSH_MATRIX_SIZE: 15
DAILY_MATRIX_SIZE: 80
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.3
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
TESTS_PER_BUILDER: 700
@@ -75,7 +73,7 @@ jobs:
git rebase origin/${BASE_REF}
git log --pretty=oneline | head -n 10
west init -l . || true
west config manifest.group-filter -- +ci,+optional
west config manifest.group-filter -- +ci
west config --global update.narrow true
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
@@ -122,7 +120,7 @@ jobs:
needs: twister-build-prep
if: needs.twister-build-prep.outputs.size != 0
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.5
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
@@ -131,7 +129,7 @@ jobs:
matrix:
subset: ${{fromJSON(needs.twister-build-prep.outputs.subset)}}
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.3
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
TWISTER_COMMON: ' --force-color --inline-logs -v -N -M --retry-failed 3 '
@@ -174,7 +172,6 @@ jobs:
echo "$HOME/.local/bin" >> $GITHUB_PATH
west init -l . || true
west config manifest.group-filter -- +ci,+optional
west config --global update.narrow true
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'

View File

@@ -511,9 +511,11 @@ endif()
if(DEFINED BUILD_VERSION)
set(build_version_argument "-DBUILD_VERSION=${BUILD_VERSION}")
elseif(NOT ZEPHYR_GIT_INDEX)
set(ZEPHYR_GIT_INDEX ZEPHYR_GIT_INDEX-NOTFOUND CACHE PATH
"Path to Zephyr git repository index file")
if(EXISTS ${ZEPHYR_BASE}/.git/index)
set(ZEPHYR_GIT_INDEX ${ZEPHYR_BASE}/.git/index CACHE PATH
"Path to Zephyr git repository index file")
set(ZEPHYR_GIT_DIR ${ZEPHYR_BASE}/.git/index CACHE PATH
"Path to Zephyr git repository index file" FORCE)
elseif(EXISTS ${ZEPHYR_BASE}/.git)
# Likely a git-submodule. Let's ask git where the real database is located.
find_package(Git QUIET)
@@ -533,7 +535,7 @@ elseif(NOT ZEPHYR_GIT_INDEX)
message(WARNING "BUILD_VERSION: git rev-parse warned: ${stderr}")
endif()
set(ZEPHYR_GIT_INDEX ${zephyr_git_dir}/index CACHE PATH
"Path to Zephyr git repository index file")
"Path to Zephyr git repository index file" FORCE)
endif()
else()
message(WARNING "Could not find git installation, "

View File

@@ -220,7 +220,6 @@
/doc/CMakeLists.txt @carlescufi
/doc/_scripts/ @carlescufi
/doc/connectivity/bluetooth/ @alwa-nordic @jhedberg @Vudentz
/doc/connectivity/networking/conn_mgr @carlescufi @glarsennordic
/doc/build/dts/ @galak @mbolivar-ampere
/doc/build/sysbuild/ @tejlmand @nordicjm
/doc/hardware/peripherals/canbus/ @alexanderwachter @henrikbrixandersen
@@ -328,7 +327,6 @@
/drivers/gpio/*ads114s0x* @benediktibk
/drivers/gpio/*bd8lb600fs* @benediktibk
/drivers/gpio/*pcal64xxa* @benediktibk
/drivers/gpio/gpio_altera_pio.c @shilinte
/drivers/hwinfo/ @alexanderwachter
/drivers/i2c/i2c_common.c @sjg20
/drivers/i2c/i2c_emul.c @sjg20
@@ -694,7 +692,6 @@
/include/zephyr/dt-bindings/usb/usb.h @galak
/include/zephyr/dt-bindings/adc/ads114s0x_adc.h @benediktibk
/include/zephyr/drivers/emul.h @sjg20
/include/zephyr/data/ @d3zd3z
/include/zephyr/fs/ @nashif @de-nordic
/include/zephyr/init.h @nashif @andyross
/include/zephyr/irq.h @dcpleung @nashif @andyross
@@ -742,7 +739,6 @@
/lib/open-amp/ @arnopo
/lib/os/ @dcpleung @nashif @andyross
/lib/os/cbprintf_packaged.c @npitre
/lib/os/json.c @d3zd3z
/lib/posix/ @cfriedt
/lib/posix/getopt/ @jakub-uC
/subsys/portability/ @nashif
@@ -866,7 +862,6 @@ scripts/build/gen_image_info.py @tejlmand
/subsys/fs/nvs/ @Laczen
/subsys/ipc/ @carlocaione
/subsys/ipc/ipc_service/*/*icmsg* @emob-nordic
/subsys/jwt/ @d3zd3z
/subsys/logging/ @nordic-krch
/subsys/logging/backends/log_backend_net.c @nordic-krch @rlubos @jukkar
/subsys/lorawan/ @Mani-Sadhasivam
@@ -935,7 +930,6 @@ scripts/build/gen_image_info.py @tejlmand
/tests/kernel/ @dcpleung @andyross @nashif
/tests/lib/ @nashif
/tests/lib/cmsis_dsp/ @stephanosio
/tests/lib/json/ @d3zd3z
/tests/net/ @rlubos @tbursztyka @jukkar
/tests/net/buf/ @jhedberg @tbursztyka @jukkar
/tests/net/conn_mgr_monitor/ @rlubos @glarsennordic @jukkar
@@ -952,7 +946,6 @@ scripts/build/gen_image_info.py @tejlmand
/tests/net/socket/ @rlubos @tbursztyka @jukkar
/tests/subsys/debug/coredump/ @dcpleung
/tests/subsys/fs/ @nashif @de-nordic
/tests/subsys/jwt/ @d3zd3z
/tests/subsys/mgmt/mcumgr/ @de-nordic @nordicjm
/tests/subsys/sd/ @danieldegrasse
/tests/subsys/rtio/ @teburd

View File

@@ -138,7 +138,6 @@ ARM arch:
- stephanosio
- bbolen
- povergoing
- ithinuel
files:
- arch/arm/
- arch/arm/core/offsets/
@@ -194,18 +193,6 @@ Ambiq Platforms:
labels:
- "platform: Ambiq"
Binary Descriptors:
status: maintained
maintainers:
- yonsch
files:
- subsys/bindesc/
- include/zephyr/bindesc.h
- samples/subsys/bindesc/
- scripts/west_commands/bindesc.py
labels:
- "area: Binary Descriptors"
Bluetooth:
status: maintained
maintainers:
@@ -435,9 +422,8 @@ CMSIS-DSP integration:
- stephanosio
collaborators:
- galak
- XenuIsWatching
files:
- modules/cmsis-dsp/
- modules/cmsis/Kconfig.cmsis_dsp
- tests/benchmarks/cmsis_dsp/
- tests/lib/cmsis_dsp/
labels:
@@ -449,9 +435,8 @@ CMSIS-NN integration:
- JordanYates
collaborators:
- stephanosio
- XenuIsWatching
files:
- modules/cmsis-nn/
- modules/cmsis/Kconfig.cmsis_nn
- tests/lib/cmsis_nn/
labels:
- "area: CMSIS-NN"
@@ -632,7 +617,6 @@ Documentation:
- doc/templates/sample.tmpl
- doc/templates/board.tmpl
files-exclude:
- doc/releases/migration-guide-*
- doc/releases/release-notes-*
labels:
- "area: Documentation"
@@ -660,10 +644,7 @@ Release Notes:
- jhedberg
- fabiobaltieri
files:
- doc/releases/migration-guide-*
- doc/releases/release-notes-*
collaborators:
- kartben
labels:
- "Release Notes"
@@ -1139,6 +1120,24 @@ Release Notes:
labels:
- "area: LED"
"Drivers: lora":
status: maintained
maintainers:
- Mani-Sadhasivam
collaborators:
- mniestroj
- JordanYates
files:
- drivers/lora/
- include/zephyr/drivers/lora.h
- samples/drivers/lora/
- include/zephyr/lorawan/
- subsys/lorawan/
- samples/subsys/lorawan/
- doc/connectivity/lora_lorawan/index.rst
labels:
- "area: LoRa"
"Drivers: Modem":
status: maintained
maintainers:
@@ -1151,13 +1150,22 @@ Release Notes:
labels:
- "area: Modem"
"Drivers: Neural Networks":
status: odd fixes
collaborators:
- nashif
files:
- drivers/neural_net/
labels:
- "area: Neural Networks"
"Drivers: Regulators":
status: maintained
maintainers:
- aasinclair
- gmarull
collaborators:
- danieldegrasse
- gmarull
- aasinclair
files:
- drivers/regulator/
- include/zephyr/drivers/regulator/
@@ -1597,9 +1605,7 @@ IPC:
- "area: IPC"
JSON Web Token:
status: maintained
maintainers:
- d3zd3z
status: odd fixes
collaborators:
- mrfuchs
- sir-branch
@@ -1712,25 +1718,6 @@ Logging:
labels:
- "area: Logging"
LoRa and LoRaWAN:
status: maintained
maintainers:
- JordanYates
collaborators:
- Mani-Sadhasivam
- martinjaeger
- mniestroj
files:
- drivers/lora/
- include/zephyr/drivers/lora.h
- samples/drivers/lora/
- include/zephyr/lorawan/
- subsys/lorawan/
- samples/subsys/lorawan/
- doc/connectivity/lora_lorawan/index.rst
labels:
- "area: LoRa"
MAINTAINERS file:
status: maintained
maintainers:
@@ -1934,7 +1921,6 @@ Networking:
- subsys/net/conn_mgr/
- tests/net/conn_mgr_monitor/
- tests/net/conn_mgr_conn/
- doc/connectivity/networking/conn_mgr/
labels:
- "area: Networking"
@@ -2067,18 +2053,18 @@ NIOS-2 arch:
labels:
- "area: NIOS2"
nRF BSIM:
nRF52 BSIM:
status: maintained
maintainers:
- aescolar
files:
- boards/posix/nrf_bsim/
- boards/posix/nrf52_bsim/
- tests/boards/nrf52_bsim/
- tests/bsim/
files-exclude:
- tests/bsim/*/
labels:
- "platform: nRF BSIM"
- "platform: nRF52 BSIM"
POSIX API layer:
status: maintained
@@ -2472,7 +2458,6 @@ NXP Platforms:
- bperseghetti
- dbaluta
- iuliana-prodan
- Dat-NguyenDuy
files:
- boards/arm/mimx*/
- boards/arm/frdm_k*/
@@ -2679,7 +2664,7 @@ TI SimpleLink Platforms:
- drivers/*/*cc32*
- dts/arm/ti/
- dts/bindings/*/ti,*
- soc/arm/ti_simplelink/
- soc/arm/ti*/
- dts/bindings/*/ti,*
labels:
- "platform: TI SimpleLink"
@@ -2801,7 +2786,7 @@ TF-M Integration:
labels:
- "area: TF-M"
"Toolchain Integration":
Toolchain Integration:
status: maintained
maintainers:
- tejlmand
@@ -2815,40 +2800,6 @@ TF-M Integration:
labels:
- "area: Toolchains"
"Toolchain ARC MWDT":
status: maintained
maintainers:
- evgeniy-paltsev
- abrodkin
files:
- cmake/*/arcmwdt/
- include/zephyr/toolchain/mwdt.h
- lib/libc/arcmwdt/*
labels:
- "area: Toolchains"
"Toolchain arm compiler 6":
status: maintained
maintainers:
- tejlmand
files:
- cmake/*/armclang/
- cmake/linker/armlink/
- include/zephyr/toolchain/armclang.h
- lib/libc/armstdc/*
labels:
- "area: Toolchains"
"Toolchain oneApi":
status: maintained
maintainers:
- nashif
files:
- cmake/*/oneApi/
- cmake/compiler/icx/
labels:
- "area: Toolchains"
Tracing:
status: maintained
maintainers:
@@ -2948,7 +2899,6 @@ West:
- scripts/west-commands.yml
- scripts/west_commands/
- doc/develop/west/
- scripts/pylib/build_helpers/domains.py
labels:
- "area: West"
@@ -2988,28 +2938,8 @@ West:
- povergoing
files:
- modules/cmsis/Kconfig
labels:
- "area: ARM"
"West project: cmsis-dsp":
status: maintained
maintainers:
- XenuIsWatching
collaborators:
- stephanosio
files:
- modules/cmsis-dsp/
labels:
- "area: ARM"
"West project: cmsis-nn":
status: maintained
maintainers:
- XenuIsWatching
collaborators:
- stephanosio
files:
- modules/cmsis-nn/
- modules/cmsis/Kconfig.cmsis_dsp
- modules/cmsis/Kconfig.cmsis_nn
labels:
- "area: ARM"
@@ -3687,8 +3617,8 @@ Emulation:
- "area: HW Emulation"
Random:
status: maintained
maintainers:
status: odd fixes
collaborators:
- ceolin
files:
- subsys/random/
@@ -3721,18 +3651,3 @@ zbus:
- doc/services/zbus/
labels:
- "area: zbus"
"Linkable Loadable Extensions":
status: maintained
maintainers:
- teburd
collaborators:
- lyakh
files:
- samples/subsys/llext/
- include/zephyr/llext/
- tests/subsys/llext/
- subsys/llext/
- doc/services/llext/
labels:
- "area: Linkable Loadable Extensions"

View File

@@ -54,59 +54,39 @@ Resources
Here's a quick summary of resources to help you find your way around:
Getting Started
---------------
* **Help**: `Asking for Help Tips`_
* **Documentation**: http://docs.zephyrproject.org (`Getting Started Guide`_)
* **Source Code**: https://github.com/zephyrproject-rtos/zephyr is the main
repository; https://elixir.bootlin.com/zephyr/latest/source contains a
searchable index
* **Releases**: https://github.com/zephyrproject-rtos/zephyr/releases
* **Samples and example code**: see `Sample and Demo Code Examples`_
* **Mailing Lists**: users@lists.zephyrproject.org and
devel@lists.zephyrproject.org are the main user and developer mailing lists,
respectively. You can join the developer's list and search its archives at
`Zephyr Development mailing list`_. The other `Zephyr mailing list
subgroups`_ have their own archives and sign-up pages.
* **Nightly CI Build Status**: https://lists.zephyrproject.org/g/builds
The builds@lists.zephyrproject.org mailing list archives the CI nightly build results.
* **Chat**: Real-time chat happens in Zephyr's Discord Server. Use
this `Discord Invite`_ to register.
* **Contributing**: see the `Contribution Guide`_
* **Wiki**: `Zephyr GitHub wiki`_
* **Issues**: https://github.com/zephyrproject-rtos/zephyr/issues
* **Security Issues**: Email vulnerabilities@zephyrproject.org to report
security issues; also see our `Security`_ documentation. Security issues are
tracked separately at https://zephyrprojectsec.atlassian.net.
* **Zephyr Project Website**: https://zephyrproject.org
| 📖 `Zephyr Documentation`_
| 🚀 `Getting Started Guide`_
| 🙋🏽 `Tips when asking for help`_
| 💻 `Code samples`_
Code and Development
--------------------
| 🌐 `Source Code Repository`_
| 📦 `Releases`_
| 🤝 `Contribution Guide`_
Community and Support
---------------------
| 💬 `Discord Server`_ for real-time community discussions
| 📧 `User mailing list (users@lists.zephyrproject.org)`_
| 📧 `Developer mailing list (devel@lists.zephyrproject.org)`_
| 📬 `Other project mailing lists`_
| 📚 `Project Wiki`_
Issue Tracking and Security
---------------------------
| 🐛 `GitHub Issues`_
| 🔒 `Security documentation`_
| 🛡️ `Security Advisories Repository`_
| ⚠️ Report security vulnerabilities at vulnerabilities@zephyrproject.org
Additional Resources
--------------------
| 🌐 `Zephyr Project Website`_
| 📺 `Zephyr Tech Talks`_
.. _Zephyr Project Website: https://www.zephyrproject.org
.. _Discord Server: https://chat.zephyrproject.org
.. _supported boards: https://docs.zephyrproject.org/latest/boards/index.html
.. _Zephyr Documentation: https://docs.zephyrproject.org
.. _Introduction to Zephyr: https://docs.zephyrproject.org/latest/introduction/index.html
.. _Getting Started Guide: https://docs.zephyrproject.org/latest/develop/getting_started/index.html
.. _Contribution Guide: https://docs.zephyrproject.org/latest/contribute/index.html
.. _Source Code Repository: https://github.com/zephyrproject-rtos/zephyr
.. _GitHub Issues: https://github.com/zephyrproject-rtos/zephyr/issues
.. _Releases: https://github.com/zephyrproject-rtos/zephyr/releases
.. _Project Wiki: https://github.com/zephyrproject-rtos/zephyr/wiki
.. _User mailing list (users@lists.zephyrproject.org): https://lists.zephyrproject.org/g/users
.. _Developer mailing list (devel@lists.zephyrproject.org): https://lists.zephyrproject.org/g/devel
.. _Other project mailing lists: https://lists.zephyrproject.org/g/main/subgroups
.. _Code samples: https://docs.zephyrproject.org/latest/samples/index.html
.. _Security documentation: https://docs.zephyrproject.org/latest/security/index.html
.. _Security Advisories Repository: https://github.com/zephyrproject-rtos/zephyr/security
.. _Tips when asking for help: https://docs.zephyrproject.org/latest/develop/getting_started/index.html#asking-for-help
.. _Zephyr Tech Talks: https://www.zephyrproject.org/tech-talks
.. _Discord Invite: https://chat.zephyrproject.org
.. _supported boards: http://docs.zephyrproject.org/latest/boards/index.html
.. _Zephyr Documentation: http://docs.zephyrproject.org
.. _Introduction to Zephyr: http://docs.zephyrproject.org/latest/introduction/index.html
.. _Getting Started Guide: http://docs.zephyrproject.org/latest/develop/getting_started/index.html
.. _Contribution Guide: http://docs.zephyrproject.org/latest/contribute/index.html
.. _Zephyr GitHub wiki: https://github.com/zephyrproject-rtos/zephyr/wiki
.. _Zephyr Development mailing list: https://lists.zephyrproject.org/g/devel
.. _Zephyr mailing list subgroups: https://lists.zephyrproject.org/g/main/subgroups
.. _Sample and Demo Code Examples: http://docs.zephyrproject.org/latest/samples/index.html
.. _Security: http://docs.zephyrproject.org/latest/security/index.html
.. _Asking for Help Tips: https://docs.zephyrproject.org/latest/develop/getting_started/index.html#asking-for-help

View File

@@ -1,5 +1,5 @@
VERSION_MAJOR = 3
VERSION_MINOR = 5
PATCHLEVEL = 0
VERSION_MINOR = 4
PATCHLEVEL = 99
VERSION_TWEAK = 0
EXTRAVERSION =

View File

@@ -22,7 +22,6 @@ config ARC
select HAS_DTS
imply XIP
select ARCH_HAS_THREAD_LOCAL_STORAGE
select ARCH_SUPPORTS_ROM_START
help
ARC architecture
@@ -82,7 +81,6 @@ config X86
select ATOMIC_OPERATIONS_BUILTIN
select HAS_DTS
select ARCH_SUPPORTS_COREDUMP
select ARCH_SUPPORTS_ROM_START if !X86_64
select CPU_HAS_MMU
select ARCH_MEM_DOMAIN_DATA if USERSPACE && !X86_COMMON_PAGE_TABLE
select ARCH_MEM_DOMAIN_SYNCHRONOUS_API if USERSPACE
@@ -113,7 +111,6 @@ config RISCV
select ARCH_IS_SET
select HAS_DTS
select ARCH_SUPPORTS_COREDUMP
select ARCH_SUPPORTS_ROM_START if !SOC_SERIES_ESP32C3
select ARCH_HAS_CODE_DATA_RELOCATION
select ARCH_HAS_THREAD_LOCAL_STORAGE
select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD
@@ -600,9 +597,6 @@ config ARCH_SUPPORTS_COREDUMP
config ARCH_SUPPORTS_ARCH_HW_INIT
bool
config ARCH_SUPPORTS_ROM_START
bool
config ARCH_HAS_EXTRA_EXCEPTION_INFO
bool

View File

@@ -53,16 +53,6 @@ config ARM_ON_ENTER_CPU_IDLE_HOOK
If needed, this hook can be used to prevent the CPU from actually
entering sleep by skipping the WFE/WFI instruction.
config ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK
bool
help
Enables a hook (z_arm_on_enter_cpu_idle_prepare()) that is called when
the CPU is made idle (by k_cpu_idle() or k_cpu_atomic_idle()).
If needed, this hook can prepare data to upcoming call to
z_arm_on_enter_cpu_idle(). The z_arm_on_enter_cpu_idle_prepare differs
from z_arm_on_enter_cpu_idle because it is called before interrupts are
disabled.
config ARM_ON_EXIT_CPU_IDLE
bool
help

View File

@@ -13,7 +13,6 @@ zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c)
zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c)
zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)
zephyr_library_sources_ifdef(CONFIG_ARM_ZIMAGE_HEADER header.S)
zephyr_library_sources_ifdef(CONFIG_LLEXT elf.c)
add_subdirectory_ifdef(CONFIG_CPU_CORTEX_M cortex_m)
add_subdirectory_ifdef(CONFIG_CPU_CORTEX_M_HAS_CMSE cortex_m/cmse)

View File

@@ -23,7 +23,6 @@ config CPU_CORTEX_M
select ARCH_SUPPORTS_ARCH_HW_INIT
select ARCH_HAS_SUSPEND_TO_RAM
select ARCH_HAS_CODE_DATA_RELOCATION
select ARCH_SUPPORTS_ROM_START
imply XIP
help
This option signifies the use of a CPU of the Cortex-M family.
@@ -38,7 +37,6 @@ config CPU_AARCH32_CORTEX_R
select ARCH_HAS_EXTRA_EXCEPTION_INFO
select ARCH_HAS_CODE_DATA_RELOCATION
select ARCH_HAS_NOCACHE_MEMORY_SUPPORT if ARM_MPU && CPU_HAS_ARM_MPU && CPU_HAS_DCACHE
select ARCH_SUPPORTS_ROM_START
help
This option signifies the use of a CPU of the Cortex-R family.

View File

@@ -171,7 +171,7 @@ config CPU_CORTEX_M_HAS_CMSE
config ARMV6_M_ARMV8_M_BASELINE
bool
select ATOMIC_OPERATIONS_C if !ARMV8_M_BASELINE
select ATOMIC_OPERATIONS_C
select ISA_THUMB2
help
This option signifies the use of an ARMv6-M processor

View File

@@ -81,24 +81,16 @@ SECTION_FUNC(TEXT, z_arm_cpu_idle_init)
bx lr
SECTION_FUNC(TEXT, arch_cpu_idle)
#if defined(CONFIG_TRACING) || \
defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK)
push {r0, lr}
#ifdef CONFIG_TRACING
push {r0, lr}
bl sys_trace_idle
#endif
#ifdef CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK
bl z_arm_on_enter_cpu_idle_prepare
#endif
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
pop {r0, r1}
mov lr, r1
#else
pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif
#endif /* CONFIG_TRACING */
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/*
@@ -142,24 +134,17 @@ SECTION_FUNC(TEXT, arch_cpu_idle)
bx lr
SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
#if defined(CONFIG_TRACING) || \
defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK)
push {r0, lr}
#ifdef CONFIG_TRACING
push {r0, lr}
bl sys_trace_idle
#endif
#ifdef CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK
bl z_arm_on_enter_cpu_idle_prepare
#endif
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
pop {r0, r1}
mov lr, r1
#else
pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif
#endif /* CONFIG_TRACING */
/*
* Lock PRIMASK while sleeping: wfe will still get interrupted by
* incoming interrupts but the CPU will not service them right away.

View File

@@ -1,37 +0,0 @@
/*
* Copyright (c) 2023 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/llext/elf.h>
#include <zephyr/llext/llext.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(elf, CONFIG_LLEXT_LOG_LEVEL);
/**
* @brief Architecture specific function for relocating partially linked (static) elf
*
* Elf files contain a series of relocations described in a section. These relocation
* instructions are architecture specific and each architecture supporting extensions
* must implement this.
*
* The relocation codes for arm are well documented
* https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst#relocation
*/
void arch_elf_relocate(elf_rel_t *rel, uintptr_t opaddr, uintptr_t opval)
{
elf_word reloc_type = ELF32_R_TYPE(rel->r_info);
switch (reloc_type) {
case R_ARM_ABS32:
/* Update the absolute address of a load/store instruction */
*((uint32_t *)opaddr) = (uint32_t)opval;
break;
default:
LOG_DBG("Unsupported ARM elf relocation type %d at address %lx",
reloc_type, opaddr);
break;
}
}

View File

@@ -102,7 +102,7 @@ static int mpu_configure_regions_from_dt(uint8_t *reg_index)
for (size_t idx = 0; idx < num_regions; idx++) {
struct arm_mpu_region region_conf;
switch (DT_MEM_ARM_GET(region[idx].dt_attr)) {
switch (DT_MEM_ARM_MASK(region[idx].dt_attr)) {
case DT_MEM_ARM_MPU_RAM:
region_conf = _BUILD_REGION_CONF(region[idx], REGION_RAM_ATTR);
break;

View File

@@ -163,7 +163,7 @@ static int mpu_configure_regions_from_dt(uint8_t *reg_index)
for (size_t idx = 0; idx < num_regions; idx++) {
struct nxp_mpu_region region_conf;
switch (DT_MEM_ARM_GET(region[idx].dt_attr)) {
switch (DT_MEM_ARM_MASK(region[idx].dt_attr)) {
case DT_MEM_ARM_MPU_RAM:
region_conf = _BUILD_REGION_CONF(region[idx], REGION_RAM_ATTR);
break;

View File

@@ -23,7 +23,6 @@ config CPU_AARCH64_CORTEX_R
select HAS_FLASH_LOAD_OFFSET
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE
select ARCH_HAS_STACK_PROTECTION
select CPU_HAS_FPU
imply FPU
imply FPU_SHARING
@@ -169,17 +168,6 @@ config ARM64_FALLBACK_ON_RESERVED_CORES
then that core will be skipped and the next core in the device tree
will be used.
config ARM64_STACK_PROTECTION
bool
default y if HW_STACK_PROTECTION
depends on ARM_MPU
select THREAD_STACK_INFO
select ARM64_SAFE_EXCEPTION_STACK
help
This option leverages the MMU or MPU to cause a system fatal error if
the bounds of the current process stack are overflowed. This is done
by preceding all stack areas with a fixed guard region.
if CPU_CORTEX_A
config ARMV8_A_NS

View File

@@ -15,7 +15,6 @@
#include <zephyr/sys/check.h>
#include <zephyr/sys/barrier.h>
#include <zephyr/cache.h>
#include <kernel_internal.h>
#include <zephyr/mem_mgmt/mem_attr.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
@@ -28,24 +27,11 @@ BUILD_ASSERT((DT_FOREACH_STATUS_OKAY_NODE_VARGS(
NODE_HAS_PROP_AND_OR, zephyr_memory_region_mpu) false) == false,
"`zephyr,memory-region-mpu` was deprecated in favor of `zephyr,memory-attr`");
#define MPU_DYNAMIC_REGION_AREAS_NUM 3
#define MPU_DYNAMIC_REGION_AREAS_NUM 1
#if defined(CONFIG_USERSPACE) || defined(CONFIG_ARM64_STACK_PROTECTION)
static struct dynamic_region_info
sys_dyn_regions[CONFIG_MP_MAX_NUM_CPUS][MPU_DYNAMIC_REGION_AREAS_NUM];
static int sys_dyn_regions_num[CONFIG_MP_MAX_NUM_CPUS];
static void dynamic_regions_init(void);
#ifdef CONFIG_USERSPACE
static int dynamic_areas_init(uintptr_t start, size_t size);
static int flush_dynamic_regions_to_mpu(struct dynamic_region_info *dyn_regions,
uint8_t region_num);
#if defined(CONFIG_USERSPACE)
#define MPU_DYNAMIC_REGIONS_AREA_START ((uintptr_t)&_app_smem_start)
#else
#define MPU_DYNAMIC_REGIONS_AREA_START ((uintptr_t)&__kernel_ram_start)
#endif
#define MPU_DYNAMIC_REGIONS_AREA_SIZE ((size_t)((uintptr_t)&__kernel_ram_end - \
MPU_DYNAMIC_REGIONS_AREA_START))
#endif
@@ -72,7 +58,7 @@ static int flush_dynamic_regions_to_mpu(struct dynamic_region_info *dyn_regions,
static uint8_t static_regions_num;
/* Get the number of supported MPU regions. */
static ALWAYS_INLINE uint8_t get_num_regions(void)
static inline uint8_t get_num_regions(void)
{
uint64_t type;
@@ -154,7 +140,7 @@ static ALWAYS_INLINE void mpu_set_region(uint32_t rnr, uint64_t rbar,
barrier_isync_fence_full();
}
static ALWAYS_INLINE void mpu_clr_region(uint32_t rnr)
static inline void mpu_clr_region(uint32_t rnr)
{
write_prselr_el1(rnr);
barrier_dsync_fence_full();
@@ -210,7 +196,7 @@ static int mpu_configure_regions_from_dt(uint8_t *reg_index)
for (size_t idx = 0; idx < num_regions; idx++) {
struct arm_mpu_region region_conf;
switch (DT_MEM_ARM_GET(region[idx].dt_attr)) {
switch (DT_MEM_ARM_MASK(region[idx].dt_attr)) {
case DT_MEM_ARM_MPU_RAM:
region_conf = _BUILD_REGION_CONF(region[idx], REGION_RAM_ATTR);
break;
@@ -262,7 +248,6 @@ FUNC_NO_STACK_PROTECTOR void z_arm64_mm_init(bool is_primary_core)
{
uint64_t val;
uint32_t r_index;
uint8_t tmp_static_num;
/* Current MPU code supports only EL1 */
val = read_currentel();
@@ -302,10 +287,10 @@ FUNC_NO_STACK_PROTECTOR void z_arm64_mm_init(bool is_primary_core)
}
/* Update the number of programmed MPU regions. */
tmp_static_num = mpu_config.num_regions;
static_regions_num = mpu_config.num_regions;
/* DT-defined MPU regions. */
if (mpu_configure_regions_from_dt(&tmp_static_num) == -EINVAL) {
if (mpu_configure_regions_from_dt(&static_regions_num) == -EINVAL) {
__ASSERT(0, "Failed to allocate MPU regions from DT\n");
return;
}
@@ -313,38 +298,25 @@ FUNC_NO_STACK_PROTECTOR void z_arm64_mm_init(bool is_primary_core)
arm_core_mpu_enable();
if (!is_primary_core) {
/*
* primary core might reprogram the sys_regions, so secondary cores
* should re-flush the sys regions
*/
goto out;
return;
}
/* Only primary core init the static_regions_num */
static_regions_num = tmp_static_num;
#if defined(CONFIG_USERSPACE) || defined(CONFIG_ARM64_STACK_PROTECTION)
dynamic_regions_init();
#ifdef CONFIG_USERSPACE
/* Only primary core do the dynamic_areas_init. */
int rc = dynamic_areas_init(MPU_DYNAMIC_REGIONS_AREA_START,
MPU_DYNAMIC_REGIONS_AREA_SIZE);
if (rc < 0) {
if (rc <= 0) {
__ASSERT(0, "Dynamic areas init fail");
return;
}
#endif
out:
#if defined(CONFIG_ARM64_STACK_PROTECTION)
(void)flush_dynamic_regions_to_mpu(sys_dyn_regions[arch_curr_cpu()->id],
sys_dyn_regions_num[arch_curr_cpu()->id]);
#endif
return;
}
#if defined(CONFIG_USERSPACE) || defined(CONFIG_ARM64_STACK_PROTECTION)
static int insert_region(struct dynamic_region_info *dyn_regions, uint8_t region_num,
uintptr_t start, size_t size, struct arm_mpu_region_attr *attr);
#ifdef CONFIG_USERSPACE
static struct dynamic_region_info sys_dyn_regions[MPU_DYNAMIC_REGION_AREAS_NUM];
static int sys_dyn_regions_num;
static void arm_core_mpu_background_region_enable(void)
{
@@ -361,8 +333,6 @@ static void arm_core_mpu_background_region_disable(void)
{
uint64_t val;
/* Force any outstanding transfers to complete before disabling MPU */
barrier_dmem_fence_full();
val = read_sctlr_el1();
val &= ~SCTLR_BR_BIT;
write_sctlr_el1(val);
@@ -370,63 +340,51 @@ static void arm_core_mpu_background_region_disable(void)
barrier_isync_fence_full();
}
static void dynamic_regions_init(void)
{
for (int cpuid = 0; cpuid < arch_num_cpus(); cpuid++) {
for (int i = 0; i < MPU_DYNAMIC_REGION_AREAS_NUM; i++) {
sys_dyn_regions[cpuid][i].index = -1;
}
}
}
static int dynamic_areas_init(uintptr_t start, size_t size)
{
const struct arm_mpu_region *region;
struct dynamic_region_info *tmp_info;
int ret = -ENOENT;
uint64_t base = start;
uint64_t limit = base + size;
for (int cpuid = 0; cpuid < arch_num_cpus(); cpuid++) {
/* Check the following searching does not overflow the room */
if (sys_dyn_regions_num[cpuid] + 1 > MPU_DYNAMIC_REGION_AREAS_NUM) {
return -ENOSPC;
}
ret = -ENOENT;
for (int i = 0; i < mpu_config.num_regions; i++) {
region = &mpu_config.mpu_regions[i];
tmp_info = &sys_dyn_regions[cpuid][sys_dyn_regions_num[cpuid]];
if (base >= region->base && limit <= region->limit) {
tmp_info->index = i;
tmp_info->region_conf = *region;
sys_dyn_regions_num[cpuid] += 1;
/* find the region, reset ret to no error */
ret = 0;
break;
}
}
#if defined(CONFIG_ARM64_STACK_PROTECTION)
ret = insert_region(sys_dyn_regions[cpuid],
MPU_DYNAMIC_REGION_AREAS_NUM,
(uintptr_t)z_interrupt_stacks[cpuid],
Z_ARM64_STACK_GUARD_SIZE,
NULL /* delete this region */);
if (ret < 0) {
break;
}
/*
* No need to check here if (sys_dyn_regions[cpuid] + ret) overflows,
* because the insert_region has checked it.
*/
sys_dyn_regions_num[cpuid] += ret;
#endif
if (sys_dyn_regions_num + 1 > MPU_DYNAMIC_REGION_AREAS_NUM) {
return -1;
}
return ret < 0 ? ret : 0;
for (size_t i = 0; i < mpu_config.num_regions; i++) {
region = &mpu_config.mpu_regions[i];
tmp_info = &sys_dyn_regions[sys_dyn_regions_num];
if (base >= region->base && limit <= region->limit) {
tmp_info->index = i;
tmp_info->region_conf = *region;
return ++sys_dyn_regions_num;
}
}
return -1;
}
static int dup_dynamic_regions(struct dynamic_region_info *dst, int len)
{
size_t i;
int ret = sys_dyn_regions_num;
CHECKIF(!(sys_dyn_regions_num < len)) {
LOG_ERR("system dynamic region nums too large.");
ret = -EINVAL;
goto out;
}
for (i = 0; i < sys_dyn_regions_num; i++) {
dst[i] = sys_dyn_regions[i];
}
for (; i < len; i++) {
dst[i].index = -1;
}
out:
return ret;
}
static void set_region(struct arm_mpu_region *region,
@@ -435,150 +393,91 @@ static void set_region(struct arm_mpu_region *region,
{
region->base = base;
region->limit = limit;
if (attr != NULL) {
region->attr = *attr;
} else {
memset(&region->attr, 0, sizeof(struct arm_mpu_region_attr));
}
region->attr = *attr;
}
static void clear_region(struct arm_mpu_region *region)
static int get_underlying_region_idx(struct dynamic_region_info *dyn_regions,
uint8_t region_num, uint64_t base,
uint64_t limit)
{
set_region(region, 0, 0, NULL);
}
static int dup_dynamic_regions(struct dynamic_region_info *dst, int len)
{
size_t i;
int num = sys_dyn_regions_num[arch_curr_cpu()->id];
if (num >= len) {
LOG_ERR("system dynamic region nums too large.");
return -EINVAL;
}
for (i = 0; i < num; i++) {
dst[i] = sys_dyn_regions[arch_curr_cpu()->id][i];
}
for (; i < len; i++) {
clear_region(&dst[i].region_conf);
dst[i].index = -1;
}
return num;
}
static struct dynamic_region_info *get_underlying_region(struct dynamic_region_info *dyn_regions,
uint8_t region_num, uint64_t base,
uint64_t limit)
{
for (int idx = 0; idx < region_num; idx++) {
for (size_t idx = 0; idx < region_num; idx++) {
struct arm_mpu_region *region = &(dyn_regions[idx].region_conf);
if (base >= region->base && limit <= region->limit) {
return &(dyn_regions[idx]);
return idx;
}
}
return NULL;
return -1;
}
static struct dynamic_region_info *find_available_region(struct dynamic_region_info *dyn_regions,
uint8_t region_num)
{
return get_underlying_region(dyn_regions, region_num, 0, 0);
}
/*
* return -ENOENT if there is no more available region
* do nothing if attr is NULL
*/
static int _insert_region(struct dynamic_region_info *dyn_regions, uint8_t region_num,
uint64_t base, uint64_t limit, struct arm_mpu_region_attr *attr)
{
struct dynamic_region_info *tmp_region;
if (attr == NULL) {
return 0;
}
tmp_region = find_available_region(dyn_regions, region_num);
if (tmp_region == NULL) {
return -ENOENT;
}
set_region(&tmp_region->region_conf, base, limit, attr);
return 0;
}
static int insert_region(struct dynamic_region_info *dyn_regions, uint8_t region_num,
uintptr_t start, size_t size, struct arm_mpu_region_attr *attr)
static int insert_region(struct dynamic_region_info *dyn_regions,
uint8_t region_idx, uint8_t region_num,
uintptr_t start, size_t size,
struct arm_mpu_region_attr *attr)
{
int ret = 0;
/* base: inclusive, limit: exclusive */
uint64_t base = (uint64_t)start;
uint64_t limit = base + size;
struct dynamic_region_info *u_region;
int u_idx;
struct arm_mpu_region *u_region;
uint64_t u_base;
uint64_t u_limit;
struct arm_mpu_region_attr u_attr;
struct arm_mpu_region_attr *u_attr;
int ret = 0;
int count = 0;
u_region = get_underlying_region(dyn_regions, region_num, base, limit);
if (u_region == NULL) {
return -ENOENT;
CHECKIF(!(region_idx < region_num)) {
LOG_ERR("Out-of-bounds error for dynamic region map. "
"region idx: %d, region num: %d",
region_idx, region_num);
ret = -EINVAL;
goto out;
}
/* restore the underlying region range and attr */
u_base = u_region->region_conf.base;
u_limit = u_region->region_conf.limit;
u_attr = u_region->region_conf.attr;
u_idx = get_underlying_region_idx(dyn_regions, region_idx, base, limit);
clear_region(&u_region->region_conf);
count--;
CHECKIF(!(u_idx >= 0)) {
LOG_ERR("Invalid underlying region index");
ret = -ENOENT;
goto out;
}
/* Get underlying region range and attr */
u_region = &(dyn_regions[u_idx].region_conf);
u_base = u_region->base;
u_limit = u_region->limit;
u_attr = &u_region->attr;
/* Temporally holding new region available to be configured */
struct arm_mpu_region *curr_region = &(dyn_regions[region_idx].region_conf);
/* if attr is NULL, meaning we are going to delete a region */
if (base == u_base && limit == u_limit) {
/*
* The new region overlaps entirely with the
* underlying region. Simply update the attr.
*/
ret += _insert_region(dyn_regions, region_num, base, limit, attr);
count++;
set_region(u_region, base, limit, attr);
} else if (base == u_base) {
ret += _insert_region(dyn_regions, region_num, limit, u_limit, &u_attr);
count++;
ret += _insert_region(dyn_regions, region_num, base, limit, attr);
count++;
set_region(curr_region, base, limit, attr);
set_region(u_region, limit, u_limit, u_attr);
region_idx++;
} else if (limit == u_limit) {
ret += _insert_region(dyn_regions, region_num, u_base, base, &u_attr);
count++;
ret += _insert_region(dyn_regions, region_num, base, limit, attr);
count++;
set_region(u_region, u_base, base, u_attr);
set_region(curr_region, base, limit, attr);
region_idx++;
} else {
ret += _insert_region(dyn_regions, region_num, u_base, base, &u_attr);
count++;
ret += _insert_region(dyn_regions, region_num, base, limit, attr);
count++;
ret += _insert_region(dyn_regions, region_num, limit, u_limit, &u_attr);
count++;
set_region(u_region, u_base, base, u_attr);
set_region(curr_region, base, limit, attr);
region_idx++;
curr_region = &(dyn_regions[region_idx].region_conf);
set_region(curr_region, limit, u_limit, u_attr);
region_idx++;
}
if (ret < 0) {
return -ENOENT;
}
ret = region_idx;
if (attr == NULL) {
/* meanning we removed a region, so fix the count by decreasing 1 */
count--;
}
return count;
out:
return ret;
}
static int flush_dynamic_regions_to_mpu(struct dynamic_region_info *dyn_regions,
@@ -587,13 +486,7 @@ static int flush_dynamic_regions_to_mpu(struct dynamic_region_info *dyn_regions,
__ASSERT(read_daif() & DAIF_IRQ_BIT, "mpu flushing must be called with IRQs disabled");
int reg_avail_idx = static_regions_num;
if (region_num >= get_num_regions()) {
LOG_ERR("Out-of-bounds error for mpu regions. "
"region num: %d, total mpu regions: %d",
region_num, get_num_regions());
return -ENOENT;
}
int ret = 0;
arm_core_mpu_background_region_enable();
@@ -625,12 +518,18 @@ static int flush_dynamic_regions_to_mpu(struct dynamic_region_info *dyn_regions,
if (region_idx < 0) {
region_idx = reg_avail_idx++;
}
CHECKIF(!(region_idx < get_num_regions())) {
LOG_ERR("Out-of-bounds error for mpu regions. "
"region idx: %d, total mpu regions: %d",
region_idx, get_num_regions());
ret = -ENOENT;
}
region_init(region_idx, &(dyn_regions[i].region_conf));
}
arm_core_mpu_background_region_disable();
return 0;
return ret;
}
static int configure_dynamic_mpu_regions(struct k_thread *thread)
@@ -639,24 +538,21 @@ static int configure_dynamic_mpu_regions(struct k_thread *thread)
struct dynamic_region_info *dyn_regions = thread->arch.regions;
const uint8_t max_region_num = ARM64_MPU_MAX_DYNAMIC_REGIONS;
int region_num;
int ret = 0;
uint8_t region_num;
int ret = 0, ret2;
/* Busy wait if it is flushing somewhere else */
while (!atomic_cas(&thread->arch.flushing, 0, 1)) {
}
thread->arch.region_num = 0;
ret = dup_dynamic_regions(dyn_regions, max_region_num);
if (ret < 0) {
ret2 = dup_dynamic_regions(dyn_regions, max_region_num);
CHECKIF(ret2 < 0) {
ret = ret2;
goto out;
}
region_num = ret;
region_num = (uint8_t)ret2;
#if defined(CONFIG_USERSPACE)
struct k_mem_domain *mem_domain = thread->mem_domain_info.mem_domain;
if (mem_domain) {
@@ -671,61 +567,41 @@ static int configure_dynamic_mpu_regions(struct k_thread *thread)
if (partition->size == 0) {
continue;
}
LOG_DBG("set region 0x%lx 0x%lx\n",
LOG_DBG("set region 0x%lx 0x%lx",
partition->start, partition->size);
ret = insert_region(dyn_regions,
max_region_num,
partition->start,
partition->size,
&partition->attr);
if (ret < 0) {
ret2 = insert_region(dyn_regions,
region_num,
max_region_num,
partition->start,
partition->size,
&partition->attr);
CHECKIF(ret2 < 0) {
ret = ret2;
goto out;
}
region_num += ret;
region_num = (uint8_t)ret2;
}
}
LOG_DBG("configure user thread %p's context", thread);
if ((thread->base.user_options & K_USER) != 0) {
/* K_USER thread stack needs a region */
ret = insert_region(dyn_regions,
max_region_num,
thread->stack_info.start,
thread->stack_info.size,
&K_MEM_PARTITION_P_RW_U_RW);
if (ret < 0) {
ret2 = insert_region(dyn_regions,
region_num,
max_region_num,
thread->stack_info.start,
thread->stack_info.size,
&K_MEM_PARTITION_P_RW_U_RW);
CHECKIF(ret2 < 0) {
ret = ret2;
goto out;
}
region_num += ret;
region_num = (uint8_t)ret2;
}
#endif
#if defined(CONFIG_ARM64_STACK_PROTECTION)
uintptr_t guard_start;
if (thread->arch.stack_limit != 0) {
guard_start = (uintptr_t)thread->arch.stack_limit - Z_ARM64_STACK_GUARD_SIZE;
ret = insert_region(dyn_regions,
max_region_num,
guard_start,
Z_ARM64_STACK_GUARD_SIZE,
NULL);
if (ret < 0) {
goto out;
}
region_num += ret;
}
#endif
/*
* There is no need to check if region_num is overflow the uint8_t,
* because the insert_region make sure there is enough room to store a region,
* otherwise the insert_region will return a negtive error number
*/
thread->arch.region_num = (uint8_t)region_num;
thread->arch.region_num = region_num;
if (thread == _current) {
ret = flush_dynamic_regions_to_mpu(dyn_regions, region_num);
@@ -733,11 +609,9 @@ static int configure_dynamic_mpu_regions(struct k_thread *thread)
out:
atomic_clear(&thread->arch.flushing);
return ret < 0 ? ret : 0;
return ret;
}
#endif /* defined(CONFIG_USERSPACE) || defined(CONFIG_HW_STACK_PROTECTION) */
#if defined(CONFIG_USERSPACE)
int arch_mem_domain_max_partitions_get(void)
{
int remaining_regions = get_num_regions() - static_regions_num + 1;
@@ -818,9 +692,7 @@ int arch_mem_domain_thread_remove(struct k_thread *thread)
return ret;
}
#endif /* CONFIG_USERSPACE */
#if defined(CONFIG_USERSPACE) || defined(CONFIG_ARM64_STACK_PROTECTION)
void z_arm64_thread_mem_domains_init(struct k_thread *thread)
{
unsigned int key = arch_irq_lock();
@@ -831,20 +703,18 @@ void z_arm64_thread_mem_domains_init(struct k_thread *thread)
void z_arm64_swap_mem_domains(struct k_thread *thread)
{
int cpuid = arch_curr_cpu()->id;
/* Busy wait if it is configuring somewhere else */
while (!atomic_cas(&thread->arch.flushing, 0, 1)) {
}
if (thread->arch.region_num == 0) {
(void)flush_dynamic_regions_to_mpu(sys_dyn_regions[cpuid],
sys_dyn_regions_num[cpuid]);
(void)flush_dynamic_regions_to_mpu(sys_dyn_regions, sys_dyn_regions_num);
} else {
(void)flush_dynamic_regions_to_mpu(thread->arch.regions,
thread->arch.region_num);
(void)flush_dynamic_regions_to_mpu(thread->arch.regions, thread->arch.region_num);
}
atomic_clear(&thread->arch.flushing);
}
#endif
#endif /* CONFIG_USERSPACE */

View File

@@ -18,7 +18,6 @@
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/poweroff.h>
#include <kernel_arch_func.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
@@ -234,47 +233,6 @@ static void esf_unwind(const z_arch_esf_t *esf)
#endif /* CONFIG_EXCEPTION_DEBUG */
#ifdef CONFIG_ARM64_STACK_PROTECTION
static bool z_arm64_stack_corruption_check(z_arch_esf_t *esf, uint64_t esr, uint64_t far)
{
uint64_t sp, sp_limit, guard_start;
/* 0x25 means data abort from current EL */
if (GET_ESR_EC(esr) == 0x25) {
sp_limit = arch_curr_cpu()->arch.current_stack_limit;
guard_start = sp_limit - Z_ARM64_STACK_GUARD_SIZE;
sp = arch_curr_cpu()->arch.corrupted_sp;
if ((sp != 0 && sp <= sp_limit) || (guard_start <= far && far <= sp_limit)) {
#ifdef CONFIG_FPU_SHARING
/*
* We are in exception stack, and now we are sure the stack does overflow,
* so flush the fpu context to its owner, and then set no fpu trap to avoid
* a new nested exception triggered by FPU accessing (var_args).
*/
z_arm64_flush_local_fpu();
write_cpacr_el1(read_cpacr_el1() | CPACR_EL1_FPEN_NOTRAP);
#endif
arch_curr_cpu()->arch.corrupted_sp = 0UL;
LOG_ERR("STACK OVERFLOW FROM KERNEL, SP: 0x%llx OR FAR: 0x%llx INVALID,"
" SP LIMIT: 0x%llx", sp, far, sp_limit);
return true;
}
}
#ifdef CONFIG_USERSPACE
else if ((_current->base.user_options & K_USER) != 0 && GET_ESR_EC(esr) == 0x24) {
sp_limit = (uint64_t)_current->stack_info.start;
guard_start = sp_limit - Z_ARM64_STACK_GUARD_SIZE;
sp = esf->sp;
if (sp <= sp_limit || (guard_start <= far && far <= sp_limit)) {
LOG_ERR("STACK OVERFLOW FROM USERSPACE, SP: 0x%llx OR FAR: 0x%llx INVALID,"
" SP LIMIT: 0x%llx", sp, far, sp_limit);
return true;
}
}
#endif
return false;
}
#endif
static bool is_recoverable(z_arch_esf_t *esf, uint64_t esr, uint64_t far,
uint64_t elr)
{
@@ -320,12 +278,6 @@ void z_arm64_fatal_error(unsigned int reason, z_arch_esf_t *esf)
break;
}
#ifdef CONFIG_ARM64_STACK_PROTECTION
if (z_arm64_stack_corruption_check(esf, esr, far)) {
reason = K_ERR_STACK_CHK_FAIL;
}
#endif
if (GET_EL(el) != MODE_EL0) {
#ifdef CONFIG_EXCEPTION_DEBUG
bool dump_far = false;
@@ -340,10 +292,8 @@ void z_arm64_fatal_error(unsigned int reason, z_arch_esf_t *esf)
LOG_ERR("TPIDRRO: 0x%016llx", read_tpidrro_el0());
#endif /* CONFIG_EXCEPTION_DEBUG */
if (is_recoverable(esf, esr, far, elr) &&
reason != K_ERR_STACK_CHK_FAIL) {
if (is_recoverable(esf, esr, far, elr))
return;
}
}
}

View File

@@ -7,7 +7,6 @@
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
#include <offsets.h>
#include "boot.h"
#include "macro_priv.inc"
@@ -150,7 +149,7 @@ resetwait:
primary_core:
#endif
/* load primary stack and entry point */
ldr x24, =(z_interrupt_stacks + __z_interrupt_stack_SIZEOF)
ldr x24, =(z_interrupt_stacks + CONFIG_ISR_STACK_SIZE)
ldr x25, =z_arm64_prep_c
2:
/* Prepare for calling C code */

View File

@@ -141,13 +141,12 @@ void z_arm64_secondary_start(void)
/* Initialize tpidrro_el0 with our struct _cpu instance address */
write_tpidrro_el0((uintptr_t)&_kernel.cpus[cpu_num]);
z_arm64_mm_init(false);
#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK
z_arm64_safe_exception_stack_init();
#endif
z_arm64_mm_init(false);
#ifdef CONFIG_SMP
arm_gic_secondary_init();

View File

@@ -115,7 +115,7 @@ SECTION_FUNC(TEXT, z_arm64_context_switch)
str x2, [x4, #_cpu_offset_to_current_stack_limit]
#endif
#if defined(CONFIG_USERSPACE) || defined(CONFIG_ARM64_STACK_PROTECTION)
#ifdef CONFIG_USERSPACE
str lr, [sp, #-16]!
bl z_arm64_swap_mem_domains
ldr lr, [sp], #16

View File

@@ -28,35 +28,19 @@
* normal execution. When at exception is taken or a syscall is called the
* stack pointer switches to SP_EL1 and the execution starts using the
* privileged portion of the user stack without touching SP_EL0. This portion
* is marked as not user accessible in the MMU/MPU.
*
* - a stack guard region will be added bellow the kernel stack when
* ARM64_STACK_PROTECTION is enabled. In this case, SP_EL0 will always point
* to the safe exception stack in the kernel space. For the kernel thread,
* SP_EL0 will not change always pointing to safe exception stack. For the
* userspace thread, SP_EL0 will switch from the user stack to the safe
* exception stack when entering the EL1 mode, and restore to the user stack
* when backing to userspace (EL0).
* is marked as not user accessible in the MMU.
*
* Kernel threads:
*
* High memory addresses
*
* +---------------+ <- stack_ptr
* E | ESF |
* L |<<<<<<<<<<<<<<<| <- SP_EL1
* 1 | |
* +---------------+ <- stack limit
* | Stack guard | } Z_ARM64_STACK_GUARD_SIZE (protected by MMU/MPU)
* +---------------+ <- stack_obj
*
* Low Memory addresses
*
* +---------------+
*
* User threads:
*
* High memory addresses
*
* +---------------+ <- stack_ptr
* E | |
* L |<<<<<<<<<<<<<<<| <- SP_EL0
@@ -65,11 +49,7 @@
* E | ESF | | Privileged portion of the stack
* L +>>>>>>>>>>>>>>>+ <- SP_EL1 |_ used during exceptions and syscalls
* 1 | | | of size ARCH_THREAD_STACK_RESERVED
* +---------------+ <- stack limit|
* | Stack guard | } Z_ARM64_STACK_GUARD_SIZE (protected by MMU/MPU)
* +---------------+ <- stack_obj
*
* Low Memory addresses
* +---------------+ <- stack_obj..|
*
* When a kernel thread switches to user mode the SP_EL0 and SP_EL1
* values are reset accordingly in arch_user_mode_enter().
@@ -89,12 +69,6 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
extern void z_arm64_exit_exc(void);
z_arch_esf_t *pInitCtx;
/*
* Clean the thread->arch to avoid unexpected behavior because the
* thread->arch might be dirty
*/
memset(&thread->arch, 0, sizeof(thread->arch));
/*
* The ESF is now hosted at the top of the stack. For user threads this
* is also fine because at this stage they are still running in EL1.
@@ -126,6 +100,9 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
pInitCtx->elr = (uint64_t)z_thread_entry;
}
#if defined(CONFIG_ARM_MPU)
atomic_clear(&thread->arch.flushing);
#endif
#else
pInitCtx->elr = (uint64_t)z_thread_entry;
#endif
@@ -145,10 +122,6 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
thread->callee_saved.lr = (uint64_t)z_arm64_exit_exc;
thread->switch_handle = thread;
#if defined(CONFIG_ARM64_STACK_PROTECTION)
thread->arch.stack_limit = (uint64_t)stack + Z_ARM64_STACK_GUARD_SIZE;
z_arm64_thread_mem_domains_init(thread);
#endif
}
#ifdef CONFIG_USERSPACE

View File

@@ -11,10 +11,7 @@
#include <soc.h>
#define UART_IS_IOPORT_ACCESS \
DT_NODE_HAS_PROP(DT_CHOSEN(zephyr_console), io_mapped)
#if UART_IS_IOPORT_ACCESS
#ifdef CONFIG_UART_NS16550_ACCESS_IOPORT
/* Legacy I/O Port Access to a NS16550 UART */
#define IN(reg) sys_in8(reg + DT_REG_ADDR(DT_CHOSEN(zephyr_console)))
#define OUT(reg, val) sys_out8(val, reg + DT_REG_ADDR(DT_CHOSEN(zephyr_console)))
@@ -89,7 +86,7 @@ int arch_printk_char_out(int c)
void z_x86_early_serial_init(void)
{
#if defined(DEVICE_MMIO_IS_IN_RAM) && !UART_IS_IOPORT_ACCESS
#if defined(DEVICE_MMIO_IS_IN_RAM) && !defined(CONFIG_UART_NS16550_ACCESS_IOPORT)
#ifdef X86_SOC_EARLY_SERIAL_PCIDEV
struct pcie_bar mbar;
pcie_get_mbar(X86_SOC_EARLY_SERIAL_PCIDEV, 0, &mbar);

View File

@@ -46,7 +46,7 @@ config XTENSA_USE_CORE_CRT1
config XTENSA_ENABLE_BACKTRACE
bool "Backtrace on panic exception"
default y
depends on SOC_SERIES_ESP32 || SOC_FAMILY_INTEL_ADSP || SOC_XTENSA_DC233C
depends on SOC_SERIES_ESP32 || SOC_FAMILY_INTEL_ADSP
help
Enable this config option to print backtrace on panic exception

View File

@@ -19,7 +19,6 @@ enum xtensa_soc_code {
XTENSA_SOC_INTEL_ADSP,
XTENSA_SOC_ESP32S2,
XTENSA_SOC_ESP32S3,
XTENSA_SOC_DC233C,
};
struct xtensa_arch_block {
@@ -118,8 +117,6 @@ void arch_coredump_info_dump(const z_arch_esf_t *esf)
arch_blk.soc = XTENSA_SOC_ESP32S2;
#elif CONFIG_SOC_SERIES_ESP32S3
arch_blk.soc = XTENSA_SOC_ESP32S3;
#elif CONFIG_SOC_XTENSA_DC233C
arch_blk.soc = XTENSA_SOC_DC233C;
#else
arch_blk.soc = XTENSA_SOC_UNKNOWN;
#endif

View File

@@ -122,7 +122,7 @@ void z_xtensa_dump_stack(const z_arch_esf_t *stack)
LOG_ERR(" ** A0 %p SP %p A2 %p A3 %p",
(void *)bsa->a0,
(void *)((char *)bsa + sizeof(*bsa)),
((char *)bsa + sizeof(*bsa)),
(void *)bsa->a2, (void *)bsa->a3);
if (reg_blks_remaining > 0) {

View File

@@ -11,8 +11,6 @@
#include "soc/soc_memory_layout.h"
#elif defined(CONFIG_SOC_FAMILY_INTEL_ADSP)
#include "debug_helpers.h"
#elif defined(CONFIG_SOC_XTENSA_DC233C)
#include "backtrace_helpers.h"
#endif
static int mask, cause;
@@ -40,8 +38,6 @@ static inline bool z_xtensa_stack_ptr_is_sane(uint32_t sp)
return esp_stack_ptr_is_sane(sp);
#elif defined(CONFIG_SOC_FAMILY_INTEL_ADSP)
return intel_adsp_ptr_is_sane(sp);
#elif defined(CONFIG_SOC_XTENSA_DC233C)
return xtensa_dc233c_stack_ptr_is_sane(sp);
#else
#warning "z_xtensa_stack_ptr_is_sane is not defined for this platform"
#endif
@@ -53,8 +49,6 @@ static inline bool z_xtensa_ptr_executable(const void *p)
return esp_ptr_executable(p);
#elif defined(CONFIG_SOC_FAMILY_INTEL_ADSP)
return intel_adsp_ptr_executable(p);
#elif defined(CONFIG_SOC_XTENSA_DC233C)
return xtensa_dc233c_ptr_executable(p);
#else
#warning "z_xtensa_ptr_executable is not defined for this platform"
#endif

View File

@@ -70,7 +70,7 @@ static ALWAYS_INLINE void arch_kernel_init(void)
void xtensa_switch(void *switch_to, void **switched_from);
static ALWAYS_INLINE void arch_switch(void *switch_to, void **switched_from)
static inline void arch_switch(void *switch_to, void **switched_from)
{
return xtensa_switch(switch_to, switched_from);
}

View File

@@ -14,4 +14,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -14,4 +14,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -14,4 +14,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -14,4 +14,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -13,4 +13,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -11,4 +11,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -11,4 +11,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -13,4 +13,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -11,4 +11,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -13,4 +13,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -13,4 +13,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -13,4 +13,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -13,4 +13,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -13,4 +13,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -11,4 +11,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -33,8 +33,6 @@ available configurations are listed below:
* ``nsim_vpx5`` - ARCv2 VPX5 core, close to vpx5_integer_full template
* ``nsim_hs5x`` - 32-bit ARCv3 HS core with rich set of options
* ``nsim_hs6x`` - 64-bit ARCv3 HS core with rich set of options
* ``nsim_hs5x_smp_12cores`` - SMP 12 cores 32-bit ARCv3 HS platform
* ``nsim_hs6x_smp_12cores`` - SMP 12 cores 64-bit ARCv3 HS platform
.. _board_arc_nsim_prop_args_files:

View File

@@ -12,4 +12,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -12,4 +12,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -11,4 +11,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -12,4 +12,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -12,4 +12,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -12,4 +12,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -15,4 +15,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -1,92 +0,0 @@
/*
* Copyright (c) 2023, Synopsys, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include "nsim-smp.dtsi"
#include "nsim-flat-mem.dtsi"
/ {
model = "snps,nsim_hs";
compatible = "snps,nsim_hs";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <0>;
};
cpu@1 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <1>;
};
cpu@2 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <2>;
};
cpu@3 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <3>;
};
cpu@4 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <4>;
};
cpu@5 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <5>;
};
cpu@6 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <6>;
};
cpu@7 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <7>;
};
cpu@8 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <8>;
};
cpu@9 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <9>;
};
cpu@a {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <10>;
};
cpu@b {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <11>;
};
};
};

View File

@@ -1,17 +0,0 @@
identifier: nsim_hs5x_smp_12cores
name: Multi-core HS5x nSIM simulator
type: sim
simulation: mdb-nsim
simulation_exec: mdb
arch: arc
toolchain:
- zephyr
- arcmwdt
- cross-compile
supported:
- smp
testing:
timeout_multiplier: 4
ignore_tags:
- net
- bluetooth

View File

@@ -1,17 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_ISA_ARCV3=y
CONFIG_SOC_NSIM=y
CONFIG_SOC_NSIM_HS5X_SMP=y
CONFIG_BOARD_NSIM=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
CONFIG_XIP=n
CONFIG_BUILD_OUTPUT_BIN=n
CONFIG_ARCV2_INTERRUPT_UNIT=y
CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_SMP=y
CONFIG_MP_MAX_NUM_CPUS=12

View File

@@ -12,4 +12,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -15,4 +15,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -1,92 +0,0 @@
/*
* Copyright (c) 2023, Synopsys, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include "nsim-smp.dtsi"
#include "nsim-flat-mem.dtsi"
/ {
model = "snps,nsim_hs";
compatible = "snps,nsim_hs";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <0>;
};
cpu@1 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <1>;
};
cpu@2 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <2>;
};
cpu@3 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <3>;
};
cpu@4 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <4>;
};
cpu@5 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <5>;
};
cpu@6 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <6>;
};
cpu@7 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <7>;
};
cpu@8 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <8>;
};
cpu@9 {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <9>;
};
cpu@a {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <10>;
};
cpu@b {
device_type = "cpu";
compatible = "snps,arcv3-hs";
reg = <11>;
};
};
};

View File

@@ -1,17 +0,0 @@
identifier: nsim_hs6x_smp_12cores
name: Multi-core HS6x nSIM simulator
type: sim
simulation: mdb-nsim
simulation_exec: mdb
arch: arc
toolchain:
- cross-compile
- zephyr
- arcmwdt
supported:
- smp
testing:
timeout_multiplier: 4
ignore_tags:
- net
- bluetooth

View File

@@ -1,17 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_ISA_ARCV3=y
CONFIG_SOC_NSIM=y
CONFIG_SOC_NSIM_HS6X_SMP=y
CONFIG_BOARD_NSIM=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
CONFIG_XIP=n
CONFIG_BUILD_OUTPUT_BIN=n
CONFIG_ARCV2_INTERRUPT_UNIT=y
CONFIG_ARCV2_TIMER=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_ARC_EXCEPTION_DEBUG=y
CONFIG_SMP=y
CONFIG_MP_MAX_NUM_CPUS=12

View File

@@ -12,4 +12,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -13,4 +13,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -16,4 +16,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -12,4 +12,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -13,4 +13,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -12,4 +12,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -10,4 +10,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -1,65 +0,0 @@
-arcv3hs
-core0
-Xdual_issue
-uarch_rev=0:0
-rgf_num_banks=1
-rgf_num_wr_ports=2
-lpc_width=0
-Xatomic=2
-Xll64
-Xunaligned
-Xdiv_rem=radix4
-Xmpy_option=qmpyh
-Xtimer0
-Xtimer0_level=0
-Xtimer1
-Xtimer1_level=0
-Xrtc
-action_points=8
-ap_feature=1
-Xstack_check
-bpu_bc_entries=2048
-bpu_pt_entries=16384
-bpu_rs_entries=4
-bpu_bc_full_tag=1
-bpu_tosq_entries=5
-bpu_fb_entries=2
-bpu_debug
-smart_version=4
-smart_stack_entries=8
-mmuv16
-mmu_dtlb_entries=16
-mmu_itlb_entries=16
-mmu_l2tlb_entries=2048
-mmu_pgsz=4K
-mmu_address_space=32
-interrupts=32
-interrupt_priorities=2
-ext_interrupts=27
-interrupt_base=0x0
-dcache=32768,64,2,a
-dcache_version=5
-dcache_feature=2
-dcache_mem_cycles=1
-dcache_hw_prefetch
-icache=32768,64,4,a
-icache_version=6
-icache_feature=2
-Xpct_counters=8
-Xpct_interrupt
-cluster_version=32
-arconnect
-connect_ics=1
-connect_ics_num_semas=16
-connect_icm=1
-connect_icm_sram_size=512
-connect_icm_sram_prot=none
-connect_pmu=1
-connect_idu=2
-connect_idu_cirqnum=64
-connect_gfrc=3
-connect_icd=2
-connect_ici=2
-noprofile
-prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
-instrs_per_pass=512

View File

@@ -1,64 +0,0 @@
-arc64
-core0
-Xdual_issue
-uarch_rev=0:0
-rgf_num_banks=1
-rgf_num_wr_ports=2
-Xm128
-Xatomic=2
-Xunaligned
-Xmpy_cycles=3
-Xtimer0
-Xtimer0_level=0
-Xtimer1
-Xtimer1_level=0
-Xrtc
-action_points=8
-ap_feature=1
-Xstack_check
-bpu_bc_entries=2048
-bpu_pt_entries=16384
-bpu_rs_entries=4
-bpu_bc_full_tag=1
-bpu_tosq_entries=5
-bpu_fb_entries=2
-bpu_debug
-smart_version=5
-smart_stack_entries=8
-mmuv16
-mmu_dtlb_entries=16
-mmu_itlb_entries=16
-mmu_l2tlb_entries=2048
-mmu_pgsz=4K
-mmu_address_space=48
-interrupts=32
-interrupt_priorities=2
-ext_interrupts=27
-interrupt_base=0x0
-dcache=32768,64,2,a
-dcache_version=5
-dcache_feature=2
-dcache_mem_cycles=1
-dcache_hw_prefetch
-icache=32768,64,4,a
-icache_version=6
-icache_feature=2
-Xpct_counters=8
-Xpct_interrupt
-cluster_version=32
-arconnect
-connect_ics=1
-connect_ics_num_semas=16
-connect_icm=1
-connect_icm_sram_size=512
-connect_icm_sram_prot=none
-connect_pmu=1
-connect_idu=2
-connect_idu_cirqnum=64
-connect_gfrc=3
-connect_icd=2
-connect_ici=2
-nogoifmain
-noprofile
-prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
-instrs_per_pass=512

View File

@@ -10,7 +10,7 @@
/ {
model = "QEMU ARC EM";
compatible = "snps,qemu-arcem";
compatible = "qemu,arcem";
cpus {
#address-cells = <1>;

View File

@@ -11,4 +11,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -10,3 +10,4 @@ CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_QEMU_ICOUNT_SHIFT=6
CONFIG_ARC_MPU_ENABLE=y
CONFIG_COMPILER_OPT="-fno-delayed-branch"

View File

@@ -10,7 +10,7 @@
/ {
model = "QEMU ARC HS";
compatible = "snps,qemu-archs";
compatible = "qemu,archs";
cpus {
#address-cells = <1>;

View File

@@ -12,4 +12,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -10,7 +10,7 @@
/ {
model = "QEMU ARC HS";
compatible = "snps,qemu-archs";
compatible = "qemu,archs";
cpus {
#address-cells = <1>;

View File

@@ -11,4 +11,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -10,3 +10,4 @@ CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_QEMU_ICOUNT_SHIFT=6
CONFIG_COMPILER_OPT="-fno-delayed-branch"

View File

@@ -10,7 +10,7 @@
/ {
model = "QEMU ARC HS";
compatible = "snps,qemu-archs";
compatible = "qemu,archs";
cpus {
#address-cells = <1>;

View File

@@ -11,4 +11,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -10,3 +10,4 @@ CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_QEMU_ICOUNT_SHIFT=6
CONFIG_COMPILER_OPT="-fno-delayed-branch"

View File

@@ -10,3 +10,4 @@ CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_QEMU_ICOUNT_SHIFT=6
CONFIG_ARC_MPU_ENABLE=y
CONFIG_COMPILER_OPT="-fno-delayed-branch"

View File

@@ -10,7 +10,7 @@
/ {
model = "QEMU ARC HS";
compatible = "snps,qemu-archs";
compatible = "qemu,archs";
cpus {
#address-cells = <1>;

View File

@@ -11,4 +11,3 @@ testing:
ignore_tags:
- net
- bluetooth
vendor: snps

View File

@@ -10,3 +10,4 @@ CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_QEMU_ICOUNT_SHIFT=6
CONFIG_ARC_MPU_ENABLE=y
CONFIG_COMPILER_OPT="-fno-delayed-branch"

View File

@@ -19,4 +19,3 @@ supported:
- adc
ram: 256
flash: 2048
vendor: gumstix

View File

@@ -347,4 +347,4 @@ terminal:
http://dfu-util.sourceforge.net/build.html
.. _AN2606:
https://www.st.com/content/ccc/resource/technical/document/application_note/b9/9b/16/3a/12/1e/40/0c/CD00167594.pdf/files/CD00167594.pdf/jcr:content/translations/en.CD00167594.pdf
http://www.st.com/content/ccc/resource/technical/document/application_note/b9/9b/16/3a/12/1e/40/0c/CD00167594.pdf/files/CD00167594.pdf/jcr:content/translations/en.CD00167594.pdf

View File

@@ -234,7 +234,7 @@ References
https://sourceforge.net/p/stm32flash/wiki/Home/
.. _ST-LINK/V2:
https://www.st.com/en/development-tools/st-link-v2.html
http://www.st.com/en/development-tools/st-link-v2.html
.. _TTL-232RG:
http://www.ftdichip.com/Support/Documents/DataSheets/Cables/DS_TTL-232RG_CABLES.pdf

View File

@@ -22,4 +22,3 @@ testing:
- nfc
ram: 256
flash: 64
vendor: arrow

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