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Author SHA1 Message Date
Gerard Marull-Paretas
9ff30a149d init: remove support for devices
Devices no longer use SYS_INIT infrastructure.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-09-21 12:43:04 +00:00
Fabio Baltieri
db747c085f scripts: check_init_priorities: handle init and device decoupling
Fix check_init_priorities.py to handle the decoupling between SYS_INIT
and devices.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-09-21 12:43:04 +00:00
Gerard Marull-Paretas
c55650c200 [RFC] device: devices no longer depend on SYS_INIT
Background
----------

Nowadays, devices rely on the `init.h` (i.e. `SYS_INIT`) infrastructure
to get initialized automatically. The `init.h` infrastructure is a basic
mechanism that allows to register an init function when the system is
initialized (before `main`). It provides with multiple initialization
levels: `PRE_KERNEL_*`, `POST_KERNEL`, etc., and within each level a
numeric priority (0-99). Using this information, each registered init
entry is sorted by the linker so that the Kernel can later iterate over
them in the correct order. This all sounds nice and simple, but when it
comes to devices, this mechanism has proven to be insufficient.

Before starting with the changes proposed in this patch, let's first dig
into the implementation details of the current model. When devices are
defined, using any of the `DEVICE_*DEFINE` macros, they also create an
init entry using the internal `init.h` APIs (see
`Z_DEVICE_INIT_ENTRY_DEFINE`). This entry, stores a pointer to the
device init call and to the device itself. As the reader can imagine,
this implies a coupling between `init.h` and `device.h`.  The only link
between a device and an init entry is the device pointer stored in the
init entry. This allows the Kernel init machinery to call the init
function with the right device pointer. However, there is no direct
relationship between a device and its init function, that is, `struct
device` does not keep the device init function reference. This is not a
problem nowadays, but it could be a problem if features like deferred
initialization or init/de-init have to be implemented. However, in
reality, this is a _secondary_ problem. The most problematic issue we
have today is that devices are mixed with `SYS_INIT` calls. They are all
part of the same init block, and are treated equally. So for example,
one can theoretically have a system where the init sequence can be like:

```
- PRE_KERNEL_1
  - init call 1
  - device 0
  - init call 2
  - init call 3
  - device 1
  - device 2
  - init call 4
- PRE_KERNEL_2
  - init call 5
  - device 3
  ...
```

This is problematic because:

(1) Init calls can depend on devices, but dependency is not tracked
    anywhere. So the user must check that init priorities are correct to
    avoid runtime failures.
(2) Device drivers can have multiple instances, and each instance may
    require a different set of priorities, while `SYS_INIT` calls are
    singletons.
(3) Devices don't likely need so many init priorities (`SMP`?
    `APPLICATION`?)

(1) is particularly important because init calls do not have a specific
purpose. They usage ranges from SoC init code, to system services. So
it's _unpredictable_ what can happen in there. (2) is a tangential
topic, actually not fixed by this patch, even though it helps. (3) is
more of a post-patch cleanup we need.

So, what does this patch propose...?
------------------------------------

**First, this patch is still a HACK, so please, focus on the description
rather than with the implementation**

So it's about providing devices with their own init infrastructure,
minimizing the coupling with init.h. This patch groups devices in a
separate section, but, keeps the same init levels as before. Therefore,
the list above would look like:

```
/* devices */
- PRE_KERNEL_1
  - device 0
  - device 1
  - device 2
- PRE_KERNEL_2
  - device 3
  ...

/* init calls */
- PRE_KERNEL_1
  - init call 1
  - init call 2
  - init call 3
  - init call 4
- PRE_KERNEL_2
  - init call 5
  ...
```

This means that **it is no longer possible** to mix init calls and
devices within the same level. So how does it work now? Within each
level, devices are initialized first, then init calls. It is done this
way because I believe it is init calls who depend on devices and not
vice versa. I may be wrong, and so the whole proposal would need a
rework. So the init order would look like:

```
- PRE_KERNEL_1
  - device 0
  - device 1
  - device 2
  - init call 1
  - init call 2
  - init call 3
  - init call 4
- PRE_KERNEL_2
  - device 3
  - init call 5
  ...
```

Why does this matter for future development?
--------------------------------------------

First, we have devices grouped at least on a level basis. This means
that we could likely start using devicetree ordinals, by reducing the
source of problems to the init level only. We can also re-think device
init levels (probably init levels as well, hey `PRE_KERNEL_1/2`). For
example, there could be pre-kernel and post-kernel devices only. The
other side effect of this change is that `struct device` stores the
device init call, so we can potentially do things like defer device
initialization or implement things like init/de-init. They all come with
their own complexity, of course, but this patch could be a step forward.

Problems
--------

This is a breaking change. Sorry, guys, another one to the list. The API
does not change, so builds should continue to work. However, the system
changes its behavior, so if anyone was relying on mixed init call/device
sequences, things will break. This is why it is important to analyze
lots of use cases before moving forward with this proposal.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-09-21 12:43:04 +00:00
Gerard Marull-Paretas
dac81a202f device: device handles should not be related with SYS_INIT
Device handles are only meant to identify a device, nothing else.
Reserve negative values for any potential future use, though.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2023-09-21 12:43:04 +00:00
12066 changed files with 135074 additions and 567320 deletions

View File

@@ -67,7 +67,6 @@ ForEachMacros:
- 'Z_GENLIST_FOR_EACH_NODE_SAFE'
- 'STRUCT_SECTION_FOREACH'
- 'TYPE_SECTION_FOREACH'
- 'K_SPINLOCK'
IfMacros:
- 'CHECKIF'
# Disabled for now, see bug https://github.com/zephyrproject-rtos/zephyr/issues/48520

6
.github/SECURITY.md vendored
View File

@@ -8,12 +8,12 @@ updates:
- The most recent release, and the release prior to that.
- Active LTS releases.
At this time, with the latest release of v3.5, the supported
At this time, with the latest release of v3.3, the supported
versions are:
- v2.7: Current LTS
- v3.4: Prior release
- v3.5: Current release
- v3.2: Prior release
- v3.3: Current release
## Reporting process

View File

@@ -9,7 +9,6 @@ on:
- ready_for_review
branches:
- main
- collab-*
- v*-branch
issues:
types:
@@ -28,7 +27,7 @@ jobs:
pip3 install -U PyGithub>=1.55 west
- name: Check out source code
uses: actions/checkout@v4
uses: actions/checkout@v3
- name: Run assignment script
env:

View File

@@ -13,7 +13,7 @@ jobs:
steps:
- name: Check out source code
uses: actions/checkout@v4
uses: actions/checkout@v3
- name: Install Python dependencies
run: |

99
.github/workflows/blackbox_tests.yml vendored Normal file
View File

@@ -0,0 +1,99 @@
# Copyright (c) 2023 Intel Corporation.
# SPDX-License-Identifier: Apache-2.0
name: Twister BlackBox TestSuite
on:
push:
branches:
- main
paths:
- 'scripts/pylib/twister/**'
- 'scripts/twister'
- 'scripts/tests/twister_blackbox/**'
- '.github/workflows/blackbox_tests.yml'
pull_request:
branches:
- main
paths:
- 'scripts/pylib/twister/**'
- 'scripts/twister'
- 'scripts/tests/twister_blackbox/**'
- '.github/workflows/blackbox_tests.yml'
jobs:
twister-tests:
name: Twister Black Box Tests
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: [3.8, 3.9, '3.10']
os: [ubuntu-22.04]
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
steps:
- name: Apply Container Owner Mismatch Workaround
run: |
# FIXME: The owner UID of the GITHUB_WORKSPACE directory may not
# match the container user UID because of the way GitHub
# Actions runner is implemented. Remove this workaround when
# GitHub comes up with a fundamental fix for this problem.
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: Checkout
uses: actions/checkout@v3
- name: Environment Setup
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
west init -l . || true
west config --global update.narrow true
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
- name: Set Up Python ${{ matrix.python-version }}
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}
- name: Go Into Venv
shell: bash
run: |
python3 -m pip install --user virtualenv
python3 -m venv env
source env/bin/activate
echo "$(which python)"
- name: Install Packages
run: |
python3 -m pip install -U -r scripts/requirements-base.txt -r scripts/requirements-build-test.txt -r scripts/requirements-run-test.txt
- name: Run Pytest For Twister Black Box Tests
shell: bash
env:
ZEPHYR_BASE: ./
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
run: |
echo "Run twister tests"
source zephyr-env.sh
PYTHONPATH="./scripts/tests" pytest ./scripts/tests/twister_blackbox
- name: Upload Unit Test Results
if: success() || failure()
uses: actions/upload-artifact@v2
with:
name: Black Box Test Results (Python ${{ matrix.python-version }})
path: |
twister-out*/twister.log
twister-out*/twister.json
twister-out*/testplan.log
retention-days: 14
- name: Clear Workspace
if: success() || failure()
run: |
rm -rf twister-out*/

View File

@@ -20,8 +20,6 @@ on:
- "include/zephyr/net/openthread.h"
- "drivers/ieee802154/**"
- "include/zephyr/net/ieee802154*"
- "drivers/serial/*nrfx*"
- "tests/drivers/uart/**"
concurrency:
group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
@@ -32,20 +30,18 @@ jobs:
if: github.repository_owner == 'zephyrproject-rtos'
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
env:
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
EDTT_PATH: ../tools/edtt
bsim_bt_52_test_results_file: ./bsim_bt/52_bsim_results.xml
bsim_bt_53_test_results_file: ./bsim_bt/53_bsim_results.xml
bsim_bt_53split_test_results_file: ./bsim_bt/53_bsim_split_results.xml
bsim_net_52_test_results_file: ./bsim_net/52_bsim_results.xml
bsim_uart_test_results_file: ./bsim_uart/uart_bsim_results.xml
bsim_bluetooth_test_results_file: ./bsim_bluetooth/bsim_results.xml
bsim_networking_test_results_file: ./bsim_net/bsim_results.xml
steps:
- name: Apply container owner mismatch workaround
run: |
@@ -62,7 +58,7 @@ jobs:
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
with:
fetch-depth: 0
@@ -81,10 +77,8 @@ jobs:
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Check common triggering files
uses: tj-actions/changed-files@v41
uses: tj-actions/changed-files@v35
id: check-common-files
with:
files: |
@@ -99,7 +93,7 @@ jobs:
tests/bsim/*
- name: Check if Bluethooth files changed
uses: tj-actions/changed-files@v41
uses: tj-actions/changed-files@v35
id: check-bluetooth-files
with:
files: |
@@ -108,7 +102,7 @@ jobs:
subsys/bluetooth/**
- name: Check if Networking files changed
uses: tj-actions/changed-files@v41
uses: tj-actions/changed-files@v35
id: check-networking-files
with:
files: |
@@ -120,20 +114,10 @@ jobs:
drivers/ieee802154/**
include/zephyr/net/ieee802154*
- name: Check if UART files changed
uses: tj-actions/changed-files@v41
id: check-uart-files
with:
files: |
tests/bsim/drivers/uart/**
drivers/serial/*nrfx*
tests/drivers/uart/**
- name: Update BabbleSim to manifest revision
if: >
steps.check-bluetooth-files.outputs.any_changed == 'true'
|| steps.check-networking-files.outputs.any_changed == 'true'
|| steps.check-uart-files.outputs.any_changed == 'true'
|| steps.check-common-files.outputs.any_changed == 'true'
run: |
export BSIM_VERSION=$( west list bsim -f {revision} )
@@ -149,65 +133,32 @@ jobs:
if: steps.check-bluetooth-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
export ZEPHYR_BASE=${PWD}
export WORK_DIR=${ZEPHYR_BASE}/bsim_bt
# Build and run the BT tests for nrf52_bsim:
nice tests/bsim/bluetooth/compile.sh
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bt_52_test_results_file} \
TESTS_FILE=tests/bsim/bluetooth/tests.nrf52bsim.txt tests/bsim/run_parallel.sh
# Build and run the BT controller tests also for the nrf5340bsim_nrf5340_cpunet
BOARD=nrf5340bsim_nrf5340_cpunet \
nice tests/bsim/bluetooth/compile.nrf5340bsim_nrf5340_cpunet.sh
BOARD=nrf5340bsim_nrf5340_cpunet \
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bt_53_test_results_file} \
TESTS_FILE=tests/bsim/bluetooth/tests.nrf5340bsim_nrf5340_cpunet.txt \
tests/bsim/run_parallel.sh
# Build and run the nrf5340 split stack tests set
BOARD=nrf5340bsim_nrf5340_cpuapp \
nice tests/bsim/bluetooth/compile.nrf5340bsim_nrf5340_cpuapp.sh
BOARD=nrf5340bsim_nrf5340_cpuapp \
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bt_53split_test_results_file} \
TESTS_FILE=tests/bsim/bluetooth/tests.nrf5340bsim_nrf5340_cpuapp.txt \
tests/bsim/run_parallel.sh
WORK_DIR=${ZEPHYR_BASE}/bsim_bluetooth nice tests/bsim/bluetooth/compile.sh
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bluetooth_test_results_file} \
SEARCH_PATH=tests/bsim/bluetooth/ tests/bsim/run_parallel.sh
- name: Run Networking Tests with BSIM
if: steps.check-networking-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
export ZEPHYR_BASE=${PWD}
WORK_DIR=${ZEPHYR_BASE}/bsim_net nice tests/bsim/net/compile.sh
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_net_52_test_results_file} \
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_networking_test_results_file} \
SEARCH_PATH=tests/bsim/net/ tests/bsim/run_parallel.sh
- name: Run UART Tests with BSIM
if: steps.check-uart-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
echo "UART: Single device tests"
./scripts/twister -T tests/drivers/uart/ --force-color --inline-logs -v -M -p nrf52_bsim \
--fixture gpio_loopback -- -uart0_loopback
echo "UART: Multi device tests"
export ZEPHYR_BASE=${PWD}
WORK_DIR=${ZEPHYR_BASE}/bsim_uart nice tests/bsim/drivers/uart/compile.sh
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_uart_test_results_file} \
SEARCH_PATH=tests/bsim/drivers/uart/ tests/bsim/run_parallel.sh
- name: Upload Test Results
if: always()
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
with:
name: bsim-test-results
path: |
./bsim_bt/52_bsim_results.xml
./bsim_bt/53_bsim_results.xml
./bsim_bt/53_bsim_split_results.xml
./bsim_net/52_bsim_results.xml
./bsim_uart/uart_bsim_results.xml
./twister-out/twister.xml
./twister-out/twister.json
./bsim_bluetooth/bsim_results.xml
./bsim_net/bsim_results.xml
${{ github.event_path }}
if-no-files-found: warn
- name: Upload Event Details
if: always()
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
with:
name: event
path: |

View File

@@ -21,7 +21,7 @@ jobs:
steps:
- name: Checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
- name: Install Python dependencies
run: |

View File

@@ -11,15 +11,16 @@ jobs:
if: github.repository_owner == 'zephyrproject-rtos'
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
strategy:
fail-fast: false
matrix:
platform: ["native_sim"]
platform: ["native_posix"]
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
LLVM_TOOLCHAIN_PATH: /usr/lib/llvm-16
COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
BASE_REF: ${{ github.base_ref }}
@@ -41,7 +42,7 @@ jobs:
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
@@ -57,7 +58,6 @@ jobs:
git log --pretty=oneline | head -n 10
west init -l . || true
west config --global update.narrow true
west config manifest.group-filter -- +ci,+optional
# In some cases modules are left in a state where they can't be
# updated (i.e. when we cancel a job and the builder is killed),
# So first retry to update, if that does not work, remove all modules
@@ -65,8 +65,6 @@ jobs:
# west caching).
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west2.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Check Environment
run: |
cmake --version
@@ -126,7 +124,7 @@ jobs:
- name: Upload Unit Test Results
if: always() && steps.twister.outputs.report_needed != 0
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
with:
name: Unit Test Results (Subset ${{ matrix.platform }})
path: twister-out/twister.xml
@@ -138,7 +136,7 @@ jobs:
if: (success() || failure() ) && needs.clang-build.outputs.report_needed != 0
steps:
- name: Download Artifacts
uses: actions/download-artifact@v4
uses: actions/download-artifact@v3
with:
path: artifacts
- name: Merge Test Results
@@ -149,7 +147,7 @@ jobs:
- name: Upload Unit Test Results in HTML
if: always()
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
with:
name: HTML Unit Test Results
if-no-files-found: ignore

View File

@@ -2,7 +2,7 @@ name: Code Coverage with codecov
on:
schedule:
- cron: '25 06,18 * * 1-5'
- cron: '25 */3 * * 1-5'
concurrency:
group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
@@ -13,14 +13,16 @@ jobs:
if: github.repository == 'zephyrproject-rtos/zephyr'
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
strategy:
fail-fast: false
matrix:
platform: ["mps2_an385", "native_sim", "qemu_x86", "unit_testing"]
platform: ["native_posix", "qemu_x86", "unit_testing"]
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
steps:
- name: Apply container owner mismatch workaround
run: |
@@ -41,7 +43,7 @@ jobs:
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
with:
fetch-depth: 0
@@ -50,14 +52,11 @@ jobs:
west init -l . || true
west update 1> west.update.log || west update 1> west.update-2.log
- name: Environment Setup
- name: Check Environment
run: |
cmake --version
gcc --version
ls -la
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Prepare ccache keys
id: ccache_cache_prop
shell: cmake -P {0}
@@ -89,25 +88,27 @@ jobs:
export ZEPHYR_BASE=${PWD}
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
mkdir -p coverage/reports
pip3 install gcovr==6.0
./scripts/twister -i --force-color -N -v --filter runnable -p ${{ matrix.platform }} --coverage -T tests --coverage-tool gcovr -xCONFIG_TEST_EXTRA_STACK_SIZE=4096 -e nano
./scripts/twister --force-color -N -v --filter runnable -p ${{ matrix.platform }} --coverage -T tests
- name: Generate Coverage Report
run: |
mv twister-out/coverage.info lcov.pre.info
lcov -q --remove lcov.pre.info mylib.c --remove lcov.pre.info tests/\* \
--remove lcov.pre.info samples/\* --remove lcov.pre.info ext/\* \
--remove lcov.pre.info *generated* \
-o coverage/reports/${{ matrix.platform }}.info --rc lcov_branch_coverage=1
- name: ccache stats post
run: |
ccache -s
ccache -p
- name: Rename coverage files
if: always()
run: |
cp twister-out/coverage.json coverage/reports/${{ matrix.platform }}.json
- name: Upload Coverage Results
if: always()
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
with:
name: Coverage Data (Subset ${{ matrix.platform }})
path: coverage/reports/${{ matrix.platform }}.json
path: coverage/reports/${{ matrix.platform }}.info
codecov-results:
name: "Publish Coverage Results"
@@ -118,24 +119,24 @@ jobs:
steps:
- name: checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
with:
fetch-depth: 0
- name: Download Artifacts
uses: actions/download-artifact@v4
uses: actions/download-artifact@v3
with:
path: coverage/reports
- name: Move coverage files
run: |
mv ./coverage/reports/*/*.json ./coverage/reports
mv ./coverage/reports/*/*.info ./coverage/reports
ls -la ./coverage/reports
- name: Generate list of coverage files
id: get-coverage-files
shell: cmake -P {0}
run: |
file(GLOB INPUT_FILES_LIST "coverage/reports/*.json")
file(GLOB INPUT_FILES_LIST "coverage/reports/*.info")
set(MERGELIST "")
set(FILELIST "")
foreach(ITEM ${INPUT_FILES_LIST})
@@ -149,7 +150,7 @@ jobs:
foreach(ITEM ${INPUT_FILES_LIST})
get_filename_component(f ${ITEM} NAME)
if(MERGELIST STREQUAL "")
set(MERGELIST "--add-tracefile ${f}")
set(MERGELIST "-a ${f}")
else()
set(MERGELIST "${MERGELIST} -a ${f}")
endif()
@@ -159,19 +160,10 @@ jobs:
- name: Merge coverage files
run: |
sudo apt-get update
sudo apt-get install -y lcov
cd ./coverage/reports
pip3 install gcovr==6.0
gcovr ${{ steps.get-coverage-files.outputs.mergefiles }} --merge-mode-functions=separate --json merged.json
gcovr ${{ steps.get-coverage-files.outputs.mergefiles }} --merge-mode-functions=separate --cobertura merged.xml
- name: Upload Merged Coverage Results
if: always()
uses: actions/upload-artifact@v4
with:
name: Merged Coverage Data
path: |
coverage/reports/merged.json
coverage/reports/merged.xml
lcov ${{ steps.get-coverage-files.outputs.mergefiles }} -o merged.info --rc lcov_branch_coverage=1
- name: Upload coverage to Codecov
if: always()
@@ -181,4 +173,4 @@ jobs:
env_vars: OS,PYTHON
fail_ci_if_error: false
verbose: true
files: merged.xml
files: merged.info

View File

@@ -8,16 +8,16 @@ jobs:
name: Run coding guidelines checks on patch series (PR)
steps:
- name: Checkout the code
uses: actions/checkout@v4
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: cache-pip
uses: actions/cache@v4
uses: actions/cache@v3
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ hashFiles('.github/workflows/coding_guidelines.yml') }}
key: ${{ runner.os }}-doc-pip
- name: Install python dependencies
run: |

View File

@@ -12,16 +12,16 @@ jobs:
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: Checkout the code
uses: actions/checkout@v4
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: cache-pip
uses: actions/cache@v4
uses: actions/cache@v3
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ hashFiles('.github/workflows/compliance.yml') }}
key: ${{ runner.os }}-doc-pip
- name: Install python dependencies
run: |
@@ -44,8 +44,7 @@ jobs:
# debug
git log --pretty=oneline | head -n 10
west init -l . || true
west config manifest.group-filter -- +ci,-optional
west update -o=--depth=1 -n 2>&1 1> west.update.log || west update -o=--depth=1 -n 2>&1 1> west.update2.log
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
- name: Run Compliance Tests
continue-on-error: true
@@ -61,7 +60,7 @@ jobs:
-c origin/${BASE_REF}..
- name: upload-results
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
continue-on-error: true
with:
name: compliance.xml

View File

@@ -28,7 +28,7 @@ jobs:
pip3 install gitpython
- name: checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
with:
fetch-depth: 0

View File

@@ -26,7 +26,7 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: [3.8, 3.9, '3.10', '3.11', '3.12']
python-version: [3.8, 3.9, '3.10']
os: [ubuntu-22.04, macos-11, windows-2022]
exclude:
- os: macos-11
@@ -35,14 +35,14 @@ jobs:
python-version: 3.6
steps:
- name: checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux
if: startsWith(runner.os, 'Linux')
uses: actions/cache@v4
uses: actions/cache@v3
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ matrix.python-version }}
@@ -50,7 +50,7 @@ jobs:
${{ runner.os }}-pip-${{ matrix.python-version }}
- name: cache-pip-mac
if: startsWith(runner.os, 'macOS')
uses: actions/cache@v4
uses: actions/cache@v3
with:
path: ~/Library/Caches/pip
# Trailing '-' was just to get a different cache name
@@ -59,7 +59,7 @@ jobs:
${{ runner.os }}-pip-${{ matrix.python-version }}-
- name: cache-pip-win
if: startsWith(runner.os, 'Windows')
uses: actions/cache@v4
uses: actions/cache@v3
with:
path: ~\AppData\Local\pip\Cache
key: ${{ runner.os }}-pip-${{ matrix.python-version }}

View File

@@ -7,14 +7,12 @@ on:
jobs:
do-not-merge:
if: ${{ contains(github.event.*.labels.*.name, 'DNM') ||
contains(github.event.*.labels.*.name, 'TSC') ||
contains(github.event.*.labels.*.name, 'Architecture Review') ||
contains(github.event.*.labels.*.name, 'dev-review') }}
contains(github.event.*.labels.*.name, 'TSC') }}
name: Prevent Merging
runs-on: ubuntu-22.04
steps:
- name: Check for label
run: |
echo "Pull request is labeled as 'DNM', 'TSC', 'Architecture Review' or 'dev-review'."
echo "This workflow fails so that the pull request cannot be merged."
echo "Pull request is labeled as 'DNM' or 'TSC'"
echo "This workflow fails so that the pull request cannot be merged"
exit 1

View File

@@ -26,7 +26,7 @@ on:
env:
# NOTE: west docstrings will be extracted from the version listed here
WEST_VERSION: 1.2.0
WEST_VERSION: 1.0.0
# The latest CMake available directly with apt is 3.18, but we need >=3.20
# so we fetch that through pip.
CMAKE_VERSION: 3.20.5
@@ -35,7 +35,6 @@ env:
jobs:
doc-build-html:
name: "Documentation Build (HTML)"
if: github.repository_owner == 'zephyrproject-rtos'
runs-on: zephyr-runner-linux-x64-4xlarge
timeout-minutes: 45
concurrency:
@@ -44,33 +43,18 @@ jobs:
steps:
- name: checkout
uses: actions/checkout@v4
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Rebase
if: github.event_name == 'pull_request'
continue-on-error: true
env:
BASE_REF: ${{ github.base_ref }}
PR_HEAD: ${{ github.event.pull_request.head.sha }}
run: |
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git rebase origin/${BASE_REF}
git log --graph --oneline HEAD...${PR_HEAD}
uses: actions/checkout@v3
- name: install-pkgs
run: |
sudo apt-get update
sudo apt-get install -y ninja-build graphviz lcov
sudo apt-get install -y ninja-build graphviz
wget --no-verbose "https://github.com/doxygen/doxygen/releases/download/Release_${DOXYGEN_VERSION//./_}/doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz"
tar xf doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz
echo "${PWD}/doxygen-${DOXYGEN_VERSION}/bin" >> $GITHUB_PATH
- name: cache-pip
uses: actions/cache@v4
uses: actions/cache@v3
with:
path: ~/.cache/pip
key: pip-${{ hashFiles('doc/requirements.txt') }}
@@ -81,7 +65,6 @@ jobs:
pip3 install -r doc/requirements.txt
pip3 install west==${WEST_VERSION}
pip3 install cmake==${CMAKE_VERSION}
pip3 install coverxygen
- name: west setup
run: |
@@ -101,48 +84,31 @@ jobs:
else
DOC_TARGET="html"
fi
DOC_TAG=${DOC_TAG} SPHINXOPTS_EXTRA="-q -t publish" make -C doc ${DOC_TARGET}
# API documentation coverage
python3 -m coverxygen --xml-dir doc/_build/html/doxygen/xml/ --src-dir include/ --output doc-coverage.info
# deprecated page causing issues
lcov --remove doc-coverage.info \*/deprecated > new.info
genhtml --no-function-coverage --no-branch-coverage new.info -o coverage-report
DOC_TAG=${DOC_TAG} SPHINXOPTS_EXTRA="-q -t publish" make -C doc ${DOC_TARGET}
- name: compress-docs
run: |
tar cfJ html-output.tar.xz --directory=doc/_build html
tar cfJ api-output.tar.xz --directory=doc/_build html/doxygen/html
tar cfJ api-coverage.tar.xz coverage-report
- name: upload-build
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
with:
name: html-output
path: html-output.tar.xz
- name: upload-api-coverage
uses: actions/upload-artifact@v4
with:
name: api-coverage
path: api-coverage.tar.xz
- name: process-pr
if: github.event_name == 'pull_request'
run: |
REPO_NAME="${{ github.event.repository.name }}"
PR_NUM="${{ github.event.pull_request.number }}"
DOC_URL="https://builds.zephyrproject.io/${REPO_NAME}/pr/${PR_NUM}/docs/"
API_DOC_URL="https://builds.zephyrproject.io/${REPO_NAME}/pr/${PR_NUM}/docs/doxygen/html/"
API_COVERAGE_URL="https://builds.zephyrproject.io/${REPO_NAME}/pr/${PR_NUM}/api-coverage/"
echo "${PR_NUM}" > pr_num
echo "Documentation will be available shortly at: ${DOC_URL}" >> $GITHUB_STEP_SUMMARY
echo "API Documentation will be available shortly at: ${API_DOC_URL}" >> $GITHUB_STEP_SUMMARY
echo "API Coverage Report will be available shortly at: ${API_COVERAGE_URL}" >> $GITHUB_STEP_SUMMARY
- name: upload-pr-number
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
if: github.event_name == 'pull_request'
with:
name: pr_num
@@ -150,9 +116,7 @@ jobs:
doc-build-pdf:
name: "Documentation Build (PDF)"
if: |
github.event_name != 'pull_request' &&
github.repository_owner == 'zephyrproject-rtos'
if: github.event_name != 'pull_request'
runs-on: zephyr-runner-linux-x64-4xlarge
container: texlive/texlive:latest
timeout-minutes: 60
@@ -161,12 +125,8 @@ jobs:
cancel-in-progress: true
steps:
- name: Apply container owner mismatch workaround
run: |
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
- name: install-pkgs
run: |
@@ -174,7 +134,7 @@ jobs:
apt-get install -y python3-pip python3-venv ninja-build doxygen graphviz librsvg2-bin
- name: cache-pip
uses: actions/cache@v4
uses: actions/cache@v3
with:
path: ~/.cache/pip
key: pip-${{ hashFiles('doc/requirements.txt') }}
@@ -210,7 +170,7 @@ jobs:
- name: upload-build
if: always()
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
with:
name: pdf-output
if-no-files-found: ignore

View File

@@ -46,7 +46,6 @@ jobs:
- name: Uncompress HTML docs
run: |
tar xf html-output/html-output.tar.xz -C html-output
tar xf api-coverage/api-coverage.tar.xz -C api-coverage
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v2
@@ -62,6 +61,3 @@ jobs:
aws s3 sync --quiet html-output/html \
s3://builds.zephyrproject.org/${{ github.event.repository.name }}/pr/${PR_NUM}/docs \
--delete
aws s3 sync --quiet api-coverage/coverage-report/ \
s3://builds.zephyrproject.org/${{ github.event.repository.name }}/pr/${PR_NUM}/api-coverage \
--delete

View File

@@ -32,7 +32,6 @@ jobs:
- name: Uncompress HTML docs
run: |
tar xf html-output/html-output.tar.xz -C html-output
tar xf api-coverage/api-coverage.tar.xz -C api-coverage
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v2
@@ -53,5 +52,4 @@ jobs:
aws s3 sync --quiet html-output/html s3://docs.zephyrproject.org/${VERSION} --delete
aws s3 sync --quiet html-output/html/doxygen/html s3://docs.zephyrproject.org/apidoc/${VERSION} --delete
aws s3 sync --quiet api-coverage/coverage-report/ s3://docs.zephyrproject.org/api-coverage/${VERSION} --delete
aws s3 cp --quiet pdf-output/zephyr.pdf s3://docs.zephyrproject.org/${VERSION}/zephyr.pdf

View File

@@ -10,7 +10,9 @@ jobs:
check-errno:
runs-on: ubuntu-22.04
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
steps:
- name: Apply container owner mismatch workaround
@@ -22,11 +24,7 @@ jobs:
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: checkout
uses: actions/checkout@v4
- name: Environment Setup
run: |
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
uses: actions/checkout@v3
- name: Run errno.py
run: |

View File

@@ -22,14 +22,15 @@ concurrency:
jobs:
footprint-tracking:
runs-on: zephyr-runner-linux-x64-4xlarge
runs-on: ubuntu-22.04
if: github.repository_owner == 'zephyrproject-rtos'
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
steps:
- name: Apply container owner mismatch workaround
@@ -51,15 +52,11 @@ jobs:
sudo pip3 install -U setuptools wheel pip gitpython
- name: checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Environment Setup
run: |
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: west setup
run: |
west init -l . || true

71
.github/workflows/footprint.yml vendored Normal file
View File

@@ -0,0 +1,71 @@
name: Footprint Delta
on: pull_request
concurrency:
group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
cancel-in-progress: true
jobs:
footprint-delta:
runs-on: ubuntu-22.04
if: github.repository == 'zephyrproject-rtos/zephyr'
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
steps:
- name: Apply container owner mismatch workaround
run: |
# FIXME: The owner UID of the GITHUB_WORKSPACE directory may not
# match the container user UID because of the way GitHub
# Actions runner is implemented. Remove this workaround when
# GitHub comes up with a fundamental fix for this problem.
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: Update PATH for west
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: checkout
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: west setup
run: |
west init -l . || true
west config --global update.narrow true
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update.log
- name: Detect Changes in Footprint
env:
BASE_REF: ${{ github.base_ref }}
run: |
export ZEPHYR_BASE=${PWD}
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git remote -v
git rebase origin/${BASE_REF}
git checkout -b this_pr
west update
west build -b frdm_k64f tests/benchmarks/footprints -t ram_report
cp build/ram.json ram2.json
west build -b frdm_k64f tests/benchmarks/footprints -t rom_report
cp build/rom.json rom2.json
git checkout origin/${BASE_REF}
west update
west build -p always -b frdm_k64f tests/benchmarks/footprints -t ram_report
west build -b frdm_k64f tests/benchmarks/footprints -t rom_report
cp build/ram.json ram1.json
cp build/rom.json rom1.json
git checkout this_pr
./scripts/footprint/fpdiff.py ram1.json ram2.json
./scripts/footprint/fpdiff.py rom1.json rom2.json

View File

@@ -12,8 +12,8 @@ jobs:
if: github.repository == 'zephyrproject-rtos/zephyr'
steps:
- uses: actions/checkout@v4
- uses: zephyrproject-rtos/action-first-interaction@v1.1.1-zephyr-5
- uses: actions/checkout@v3
- uses: zephyrproject-rtos/action-first-interaction@v1.1.1-zephyr-4
with:
repo-token: ${{ secrets.GITHUB_TOKEN }}
@@ -29,18 +29,12 @@ jobs:
Hello @${{ github.event.pull_request.user.login }}, and thank you very much for your
first pull request to the Zephyr project!
Our Continuous Integration pipeline will execute a series of checks on your Pull Request
commit messages and code, and you are expected to address any failures by updating the PR.
Please take a look at [our commit message guidelines](https://docs.zephyrproject.org/latest/contribute/guidelines.html#commit-message-guidelines)
to find out how to format your commit messages, and at [our contribution workflow](https://docs.zephyrproject.org/latest/contribute/guidelines.html#contribution-workflow)
to understand how to update your Pull Request.
If you haven't already, please make sure to review the project's [Contributor
Expectations](https://docs.zephyrproject.org/latest/contribute/contributor_expectations.html)
and update (by amending and force-pushing the commits) your pull request if necessary.
If you are stuck or need help please join us on [Discord](https://chat.zephyrproject.org/)
and ask your question there. Additionally, you can [escalate the review](https://docs.zephyrproject.org/latest/contribute/contributor_expectations.html#pr-review-escalation)
when applicable. 😊
A project maintainer just triggered our CI pipeline to run it against your PR and
ensure it's compliant and doesn't cause any issues. You might want to take this
opportunity to review the project's [Contributor
Expectations](https://docs.zephyrproject.org/latest/contribute/contributor_expectations.html)
and make any updates to your pull request if necessary. 😊
pr-merged-message: >
Hi @${{ github.event.pull_request.user.login }}!

View File

@@ -1,79 +0,0 @@
name: Hello World (Multiplatform)
on:
push:
branches:
- main
- v*-branch
- collab-*
pull_request:
branches:
- main
- v*-branch
- collab-*
paths:
- 'scripts/build/**'
- 'scripts/requirements*.txt'
- '.github/workflows/hello_world_multiplatform.yaml'
- 'SDK_VERSION'
concurrency:
group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
cancel-in-progress: true
jobs:
build:
strategy:
fail-fast: false
matrix:
os: [ubuntu-22.04, macos-12, macos-14, windows-2022]
runs-on: ${{ matrix.os }}
steps:
- name: Checkout
uses: actions/checkout@v4
with:
path: zephyr
fetch-depth: 0
- name: Rebase
if: github.event_name == 'pull_request'
env:
BASE_REF: ${{ github.base_ref }}
PR_HEAD: ${{ github.event.pull_request.head.sha }}
working-directory: zephyr
shell: bash
run: |
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git rebase origin/${BASE_REF}
git log --graph --oneline HEAD...${PR_HEAD}
- name: Set up Python
uses: actions/setup-python@v4
with:
python-version: 3.11
- name: Setup Zephyr project
uses: zephyrproject-rtos/action-zephyr-setup@v1
with:
app-path: zephyr
toolchains: all
- name: Build firmware
working-directory: zephyr
shell: bash
run: |
if [ "${{ runner.os }}" = "macOS" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
elif [ "${{ runner.os }}" = "Windows" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O/tmp/twister-out"
fi
./scripts/twister --force-color --inline-logs -T samples/hello_world -v $EXTRA_TWISTER_FLAGS
- name: Upload artifacts
if: failure()
uses: actions/upload-artifact@v4
with:
if-no-files-found: ignore
path:
zephyr/twister-out/*/samples/hello_world/sample.basic.helloworld/build.log

View File

@@ -35,7 +35,7 @@ jobs:
token: ${{ secrets.GITHUB_TOKEN }}
- name: upload-stats
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
continue-on-error: true
with:
name: ${{ env.OUTPUT_FILE_NAME }}

View File

@@ -8,16 +8,14 @@ jobs:
name: Scan code for licenses
steps:
- name: Checkout the code
uses: actions/checkout@v4
with:
fetch-depth: 0
uses: actions/checkout@v3
- name: Scan the code
id: scancode
uses: zephyrproject-rtos/action_scancode@v4
with:
directory-to-scan: 'scan/'
- name: Artifact Upload
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
with:
name: scancode
path: ./artifacts

View File

@@ -8,7 +8,7 @@ jobs:
name: Manifest
steps:
- name: Checkout the code
uses: actions/checkout@v4
uses: actions/checkout@v3
with:
path: zephyrproject/zephyr
ref: ${{ github.event.pull_request.head.sha }}
@@ -26,7 +26,7 @@ jobs:
west init -l . || true
- name: Manifest
uses: zephyrproject-rtos/action-manifest@v1.2.2
uses: zephyrproject-rtos/action-manifest@f223dce288b0d8f30bfd57eb2b14b18c230a7d8b
with:
github-token: ${{ secrets.ZB_GITHUB_TOKEN }}
manifest-path: 'west.yml'

View File

@@ -1,54 +0,0 @@
# Copyright (c) 2023 Intel Corporation.
# SPDX-License-Identifier: Apache-2.0
name: Misc. Pylib Scripts TestSuite
on:
push:
branches:
- main
- v*-branch
paths:
- 'scripts/pylib/build_helpers/**'
- '.github/workflows/pylib_tests.yml'
pull_request:
branches:
- main
- v*-branch
paths:
- 'scripts/pylib/build_helpers/**'
- '.github/workflows/pylib_tests.yml'
jobs:
pylib-tests:
name: Misc. Pylib Unit Tests
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: [3.8, 3.9, '3.10', '3.11', '3.12']
os: [ubuntu-22.04]
steps:
- name: checkout
uses: actions/checkout@v4
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux
if: startsWith(runner.os, 'Linux')
uses: actions/cache@v4
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ matrix.python-version }}
restore-keys: |
${{ runner.os }}-pip-${{ matrix.python-version }}
- name: install-packages
run: |
pip3 install -r scripts/requirements-base.txt -r scripts/requirements-build-test.txt
- name: Run pytest for build_helpers
env:
ZEPHYR_BASE: ./
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
run: |
echo "Run build_helpers tests"
PYTHONPATH=./scripts/tests pytest ./scripts/tests/build_helpers

View File

@@ -10,7 +10,7 @@ jobs:
release:
runs-on: ubuntu-22.04
steps:
- uses: actions/checkout@v4
- uses: actions/checkout@v3
with:
fetch-depth: 0
@@ -26,7 +26,7 @@ jobs:
args: spdx -o zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
- name: upload-results
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
continue-on-error: true
with:
name: zephyr-${{ steps.get_version.outputs.VERSION }}.spdx

View File

@@ -25,11 +25,11 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: [3.8, 3.9, '3.10', '3.11', '3.12']
python-version: [3.8, 3.9, '3.10']
os: [ubuntu-20.04]
steps:
- name: checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
@@ -52,7 +52,7 @@ jobs:
- name: cache-pip-linux
if: startsWith(runner.os, 'Linux')
uses: actions/cache@v4
uses: actions/cache@v3
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ matrix.python-version }}

View File

@@ -24,5 +24,5 @@ jobs:
stale-issue-label: 'Stale'
stale-pr-label: 'Stale'
exempt-pr-labels: 'Blocked,In progress'
exempt-issue-labels: 'In progress,Enhancement,Feature,Feature Request,RFC,Meta,Process,Coverity'
exempt-issue-labels: 'In progress,Enhancement,Feature,Feature Request,RFC,Meta,Process'
operations-per-run: 400

View File

@@ -1,24 +0,0 @@
name: Merged PR stats
on:
pull_request_target:
branches:
- main
- v*-branch
types: [closed]
jobs:
record_merged:
if: github.event.pull_request.merged == true && github.repository == 'zephyrproject-rtos/zephyr'
runs-on: ubuntu-22.04
steps:
- name: checkout
uses: actions/checkout@v4
- name: PR event
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
ELASTICSEARCH_KEY: ${{ secrets.ELASTICSEARCH_KEY }}
ELASTICSEARCH_SERVER: "https://elasticsearch.zephyrproject.io:443"
PR_STAT_ES_INDEX: ${{ vars.PR_STAT_ES_INDEX }}
run: |
pip3 install pygithub elasticsearch
python3 ./scripts/ci/stats/merged_prs.py --pull-request ${{ github.event.pull_request.number }} --repo ${{ github.repository }}

View File

@@ -5,12 +5,10 @@ on:
branches:
- main
- v*-branch
- collab-*
pull_request_target:
branches:
- main
- v*-branch
- collab-*
schedule:
# Run at 03:00 UTC on every Sunday
- cron: '0 3 * * 0'
@@ -24,7 +22,7 @@ jobs:
if: github.repository_owner == 'zephyrproject-rtos'
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
@@ -36,6 +34,7 @@ jobs:
MATRIX_SIZE: 10
PUSH_MATRIX_SIZE: 15
DAILY_MATRIX_SIZE: 80
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
TESTS_PER_BUILDER: 700
@@ -59,7 +58,7 @@ jobs:
- name: Checkout
if: github.event_name == 'pull_request_target'
uses: actions/checkout@v4
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
@@ -74,13 +73,11 @@ jobs:
git rebase origin/${BASE_REF}
git log --pretty=oneline | head -n 10
west init -l . || true
west config manifest.group-filter -- +ci,+optional
west config manifest.group-filter -- +ci
west config --global update.narrow true
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Generate Test Plan with Twister
if: github.event_name == 'pull_request_target'
id: test-plan
@@ -123,7 +120,7 @@ jobs:
needs: twister-build-prep
if: needs.twister-build-prep.outputs.size != 0
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
@@ -132,6 +129,7 @@ jobs:
matrix:
subset: ${{fromJSON(needs.twister-build-prep.outputs.subset)}}
env:
ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
TWISTER_COMMON: ' --force-color --inline-logs -v -N -M --retry-failed 3 '
@@ -156,7 +154,7 @@ jobs:
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
with:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
@@ -174,19 +172,10 @@ jobs:
echo "$HOME/.local/bin" >> $GITHUB_PATH
west init -l . || true
west config manifest.group-filter -- +ci,+optional
west config --global update.narrow true
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
# Hotfix until we have kitware ninja in the docker image.
# Needed for full functionality of the job server functionality in twister which only works with
# kitware supplied ninja version.
wget -c https://github.com/Kitware/ninja/releases/download/v1.11.1.g95dee.kitware.jobserver-1/ninja-1.11.1.g95dee.kitware.jobserver-1_x86_64-linux-gnu.tar.gz -O - | tar xz --strip-components=1
sudo cp ninja /usr/local/bin
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Check Environment
run: |
cmake --version
@@ -271,7 +260,7 @@ jobs:
- name: Upload Unit Test Results
if: always()
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
with:
name: Unit Test Results (Subset ${{ matrix.subset }})
if-no-files-found: ignore
@@ -281,24 +270,6 @@ jobs:
module_tests/twister.xml
testplan.json
- if: matrix.subset == 1 && github.event_name == 'push'
name: Save the list of Python packages
shell: bash
run: |
FREEZE_FILE="frozen-requirements.txt"
timestamp="$(date)"
version="$(git describe --abbrev=12 --always)"
echo -e "# Generated at $timestamp ($version)\n" > $FREEZE_FILE
pip3 freeze | tee -a $FREEZE_FILE
- if: matrix.subset == 1 && github.event_name == 'push'
name: Upload the list of Python packages
uses: actions/upload-artifact@v4
with:
name: Frozen PIP package set
path: |
frozen-requirements.txt
twister-test-results:
name: "Publish Unit Tests Results"
env:
@@ -313,13 +284,13 @@ jobs:
# Needed for opensearch and upload script
- if: github.event_name == 'push' || github.event_name == 'schedule'
name: Checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
with:
fetch-depth: 0
persist-credentials: false
- name: Download Artifacts
uses: actions/download-artifact@v4
uses: actions/download-artifact@v3
with:
path: artifacts
@@ -345,7 +316,7 @@ jobs:
- name: Upload Unit Test Results in HTML
if: always()
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
with:
name: HTML Unit Test Results
if-no-files-found: ignore

View File

@@ -9,7 +9,7 @@ on:
- main
- v*-branch
paths:
- 'scripts/pylib/**'
- 'scripts/pylib/twister/**'
- 'scripts/twister'
- 'scripts/tests/twister/**'
- '.github/workflows/twister_tests.yml'
@@ -18,7 +18,7 @@ on:
- main
- v*-branch
paths:
- 'scripts/pylib/**'
- 'scripts/pylib/twister/**'
- 'scripts/twister'
- 'scripts/tests/twister/**'
- '.github/workflows/twister_tests.yml'
@@ -29,18 +29,18 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: [3.8, 3.9, '3.10', '3.11', '3.12']
python-version: [3.8, 3.9, '3.10']
os: [ubuntu-22.04]
steps:
- name: checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux
if: startsWith(runner.os, 'Linux')
uses: actions/cache@v4
uses: actions/cache@v3
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ matrix.python-version }}
@@ -48,7 +48,7 @@ jobs:
${{ runner.os }}-pip-${{ matrix.python-version }}
- name: install-packages
run: |
pip3 install -r scripts/requirements-base.txt -r scripts/requirements-build-test.txt -r scripts/requirements-run-test.txt
pip3 install -r scripts/requirements-base.txt -r scripts/requirements-build-test.txt
- name: Run pytest for twisterlib
env:
ZEPHYR_BASE: ./

View File

@@ -1,91 +0,0 @@
# Copyright (c) 2023 Intel Corporation.
# SPDX-License-Identifier: Apache-2.0
name: Twister BlackBox TestSuite
on:
pull_request:
branches:
- main
paths:
- 'scripts/pylib/twister/**'
- 'scripts/twister'
- 'scripts/tests/twister_blackbox/**'
- '.github/workflows/twister_tests_blackbox.yml'
jobs:
twister-tests:
name: Twister Black Box Tests
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: [3.8, 3.9, '3.10', '3.11', '3.12']
os: [ubuntu-22.04]
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
steps:
- name: Apply Container Owner Mismatch Workaround
run: |
# FIXME: The owner UID of the GITHUB_WORKSPACE directory may not
# match the container user UID because of the way GitHub
# Actions runner is implemented. Remove this workaround when
# GitHub comes up with a fundamental fix for this problem.
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: Checkout
uses: actions/checkout@v4
- name: Environment Setup
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
west init -l . || true
west config --global update.narrow true
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Set Up Python ${{ matrix.python-version }}
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}
- name: Go Into Venv
shell: bash
run: |
python3 -m pip install --user virtualenv
python3 -m venv env
source env/bin/activate
echo "$(which python)"
- name: Install Packages
run: |
python3 -m pip install -U -r scripts/requirements-base.txt -r scripts/requirements-build-test.txt -r scripts/requirements-run-test.txt
- name: Run Pytest For Twister Black Box Tests
shell: bash
env:
ZEPHYR_BASE: ./
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
run: |
echo "Run twister tests"
source zephyr-env.sh
PYTHONPATH="./scripts/tests" pytest ./scripts/tests/twister_blackbox
- name: Upload Unit Test Results
if: success() || failure()
uses: actions/upload-artifact@v2
with:
name: Black Box Test Results (Python ${{ matrix.python-version }})
path: |
twister-out*/twister.log
twister-out*/twister.json
twister-out*/testplan.log
retention-days: 14
- name: Clear Workspace
if: success() || failure()
run: |
rm -rf twister-out*/

View File

@@ -27,7 +27,7 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: [3.8, 3.9, '3.10', '3.11', '3.12']
python-version: [3.8, 3.9, '3.10']
os: [ubuntu-22.04, macos-11, windows-2022]
exclude:
- os: macos-11
@@ -36,14 +36,14 @@ jobs:
python-version: 3.6
steps:
- name: checkout
uses: actions/checkout@v4
uses: actions/checkout@v3
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux
if: startsWith(runner.os, 'Linux')
uses: actions/cache@v4
uses: actions/cache@v3
with:
path: ~/.cache/pip
key: ${{ runner.os }}-pip-${{ matrix.python-version }}
@@ -51,7 +51,7 @@ jobs:
${{ runner.os }}-pip-${{ matrix.python-version }}
- name: cache-pip-mac
if: startsWith(runner.os, 'macOS')
uses: actions/cache@v4
uses: actions/cache@v3
with:
path: ~/Library/Caches/pip
# Trailing '-' was just to get a different cache name
@@ -60,7 +60,7 @@ jobs:
${{ runner.os }}-pip-${{ matrix.python-version }}-
- name: cache-pip-win
if: startsWith(runner.os, 'Windows')
uses: actions/cache@v4
uses: actions/cache@v3
with:
path: ~\AppData\Local\pip\Cache
key: ${{ runner.os }}-pip-${{ matrix.python-version }}

1
.gitignore vendored
View File

@@ -76,7 +76,6 @@ ImageSize.txt
Kconfig.txt
KconfigBasic.txt
KconfigBasicNoModules.txt
KeepSorted.txt
MaintainersFormat.txt
ModulesMaintainers.txt
Nits.txt

View File

@@ -118,7 +118,19 @@ zephyr_include_directories(
include(${ZEPHYR_BASE}/cmake/linker_script/${ARCH}/linker.cmake OPTIONAL)
zephyr_include_directories(${SOC_DIR}/${ARCH}/${SOC_PATH})
# Don't add non-existing include directories, it creates noise and
# warnings in some tooling
foreach(optional_include_dir
${SOC_DIR}/${ARCH}/${SOC_PATH}
${SOC_DIR}/${ARCH}/${SOC_PATH}/include
${SOC_DIR}/${ARCH}/${SOC_PATH}/include/${SOC_NAME}
${SOC_DIR}/${ARCH}/${SOC_FAMILY}/include
${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/include
)
if(EXISTS ${optional_include_dir})
zephyr_include_directories(${optional_include_dir})
endif()
endforeach()
# Don't inherit compiler flags from the environment
foreach(var AFLAGS CFLAGS CXXFLAGS CPPFLAGS LDFLAGS)
@@ -213,11 +225,6 @@ endif()
# Apply the final optimization flag(s)
zephyr_compile_options(${OPTIMIZATION_FLAG})
if(CONFIG_LTO)
add_compile_options($<TARGET_PROPERTY:compiler,optimization_lto>)
add_link_options($<TARGET_PROPERTY:linker,lto_arguments>)
endif()
# @Intent: Obtain compiler specific flags related to C++ that are not influenced by kconfig
zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:$<TARGET_PROPERTY:compiler-cpp,required>>)
@@ -477,12 +484,38 @@ if(CONFIG_USERSPACE)
set(KOBJECT_LINKER_DEP kobject_linker)
endif()
get_property(TOPT GLOBAL PROPERTY TOPT)
get_property(COMPILER_TOPT TARGET compiler PROPERTY linker_script)
set_ifndef( TOPT "${COMPILER_TOPT}")
set_ifndef( TOPT -Wl,-T) # Use this if the compiler driver doesn't set a value
if(CONFIG_HAVE_CUSTOM_LINKER_SCRIPT)
set(LINKER_SCRIPT ${APPLICATION_SOURCE_DIR}/${CONFIG_CUSTOM_LINKER_SCRIPT})
if(NOT EXISTS ${LINKER_SCRIPT})
set(LINKER_SCRIPT ${CONFIG_CUSTOM_LINKER_SCRIPT})
assert_exists(CONFIG_CUSTOM_LINKER_SCRIPT)
endif()
else()
# Try a board specific linker file
set(LINKER_SCRIPT ${BOARD_DIR}/linker.ld)
if(NOT EXISTS ${LINKER_SCRIPT})
# If not available, try an SoC specific linker file
set(LINKER_SCRIPT ${SOC_DIR}/${ARCH}/${SOC_PATH}/linker.ld)
endif()
endif()
if(NOT EXISTS ${LINKER_SCRIPT})
message(FATAL_ERROR "Could not find linker script: '${LINKER_SCRIPT}'. Corrupted configuration?")
endif()
if(DEFINED BUILD_VERSION)
set(build_version_argument "-DBUILD_VERSION=${BUILD_VERSION}")
elseif(NOT ZEPHYR_GIT_INDEX)
set(ZEPHYR_GIT_INDEX ZEPHYR_GIT_INDEX-NOTFOUND CACHE PATH
"Path to Zephyr git repository index file")
if(EXISTS ${ZEPHYR_BASE}/.git/index)
set(ZEPHYR_GIT_INDEX ${ZEPHYR_BASE}/.git/index CACHE PATH
"Path to Zephyr git repository index file")
set(ZEPHYR_GIT_DIR ${ZEPHYR_BASE}/.git/index CACHE PATH
"Path to Zephyr git repository index file" FORCE)
elseif(EXISTS ${ZEPHYR_BASE}/.git)
# Likely a git-submodule. Let's ask git where the real database is located.
find_package(Git QUIET)
@@ -502,7 +535,7 @@ elseif(NOT ZEPHYR_GIT_INDEX)
message(WARNING "BUILD_VERSION: git rev-parse warned: ${stderr}")
endif()
set(ZEPHYR_GIT_INDEX ${zephyr_git_dir}/index CACHE PATH
"Path to Zephyr git repository index file")
"Path to Zephyr git repository index file" FORCE)
endif()
else()
message(WARNING "Could not find git installation, "
@@ -524,11 +557,10 @@ add_custom_command(
-DOUT_FILE=${PROJECT_BINARY_DIR}/include/generated/version.h
-DVERSION_TYPE=KERNEL
-DVERSION_FILE=${ZEPHYR_BASE}/VERSION
-DKERNEL_VERSION_CUSTOMIZATION="$<TARGET_PROPERTY:version_h,KERNEL_VERSION_CUSTOMIZATION>"
-DKERNEL_VERSION_CUSTOMIZATION="${KERNEL_VERSION_CUSTOMIZATION}"
${build_version_argument}
-P ${ZEPHYR_BASE}/cmake/gen_version_h.cmake
DEPENDS ${ZEPHYR_BASE}/VERSION ${git_dependency}
COMMAND_EXPAND_LISTS
)
add_custom_target(version_h DEPENDS ${PROJECT_BINARY_DIR}/include/generated/version.h)
@@ -539,11 +571,10 @@ if(EXISTS ${APPLICATION_SOURCE_DIR}/VERSION)
-DOUT_FILE=${PROJECT_BINARY_DIR}/include/generated/app_version.h
-DVERSION_TYPE=APP
-DVERSION_FILE=${APPLICATION_SOURCE_DIR}/VERSION
-DAPP_VERSION_CUSTOMIZATION="$<TARGET_PROPERTY:app_version_h,APP_VERSION_CUSTOMIZATION>"
-DAPP_VERSION_CUSTOMIZATION="${APP_VERSION_CUSTOMIZATION}"
${build_version_argument}
-P ${ZEPHYR_BASE}/cmake/gen_version_h.cmake
DEPENDS ${APPLICATION_SOURCE_DIR}/VERSION ${git_dependency}
COMMAND_EXPAND_LISTS
)
add_custom_target(app_version_h DEPENDS ${PROJECT_BINARY_DIR}/include/generated/app_version.h)
add_dependencies(zephyr_interface app_version_h)
@@ -586,14 +617,12 @@ foreach(module_name ${ZEPHYR_MODULE_NAMES})
# https://cmake.org/pipermail/cmake/2019-June/069547.html
zephyr_string(SANITIZE TOUPPER MODULE_NAME_UPPER ${module_name})
if(NOT ${ZEPHYR_${MODULE_NAME_UPPER}_CMAKE_DIR} STREQUAL "")
set(ZEPHYR_CURRENT_MODULE_NAME ${ZEPHYR_${MODULE_NAME_UPPER}_MODULE_NAME})
set(ZEPHYR_CURRENT_MODULE_DIR ${ZEPHYR_${MODULE_NAME_UPPER}_MODULE_DIR})
set(ZEPHYR_CURRENT_CMAKE_DIR ${ZEPHYR_${MODULE_NAME_UPPER}_CMAKE_DIR})
add_subdirectory(${ZEPHYR_CURRENT_CMAKE_DIR} ${CMAKE_BINARY_DIR}/modules/${module_name})
endif()
endforeach()
# Done processing modules, clear module variables
set(ZEPHYR_CURRENT_MODULE_NAME)
# Done processing modules, clear ZEPHYR_CURRENT_MODULE_DIR and ZEPHYR_CURRENT_CMAKE_DIR.
set(ZEPHYR_CURRENT_MODULE_DIR)
set(ZEPHYR_CURRENT_CMAKE_DIR)
@@ -810,10 +839,6 @@ target_include_directories(${OFFSETS_LIB} PRIVATE
kernel/include
${ARCH_DIR}/${ARCH}/include
)
# Make sure that LTO will never be enabled when compiling offsets.c
set_source_files_properties(${OFFSETS_C_PATH} PROPERTIES COMPILE_OPTIONS $<TARGET_PROPERTY:compiler,prohibit_lto>)
target_link_libraries(${OFFSETS_LIB} zephyr_interface)
add_dependencies(zephyr_interface
${SYSCALL_LIST_H_TARGET}
@@ -951,29 +976,6 @@ set(CMAKE_C_COMPILE_FEATURES ${compile_features_${CSTD}} PARENT_SCOPE)
# @Intent: Configure linker scripts, i.e. generate linker scripts with variables substituted
toolchain_ld_configure_files()
get_property(TOPT GLOBAL PROPERTY TOPT)
get_property(COMPILER_TOPT TARGET compiler PROPERTY linker_script)
set_ifndef( TOPT "${COMPILER_TOPT}")
set_ifndef( TOPT -Wl,-T) # Use this if the compiler driver doesn't set a value
if(CONFIG_HAVE_CUSTOM_LINKER_SCRIPT)
set(LINKER_SCRIPT ${APPLICATION_SOURCE_DIR}/${CONFIG_CUSTOM_LINKER_SCRIPT})
if(NOT EXISTS ${LINKER_SCRIPT})
set(LINKER_SCRIPT ${CONFIG_CUSTOM_LINKER_SCRIPT})
assert_exists(CONFIG_CUSTOM_LINKER_SCRIPT)
endif()
elseif(DEFINED BOARD_LINKER_SCRIPT)
set(LINKER_SCRIPT ${BOARD_LINKER_SCRIPT})
elseif(DEFINED SOC_LINKER_SCRIPT)
set(LINKER_SCRIPT ${SOC_LINKER_SCRIPT})
else()
find_package(Deprecated COMPONENTS SEARCHED_LINKER_SCRIPT)
endif()
if(NOT EXISTS ${LINKER_SCRIPT})
message(FATAL_ERROR "Could not find linker script: '${LINKER_SCRIPT}'. Corrupted configuration?")
endif()
if(CONFIG_USERSPACE)
set(APP_SMEM_ALIGNED_LD "${PROJECT_BINARY_DIR}/include/generated/app_smem_aligned.ld")
set(APP_SMEM_UNALIGNED_LD "${PROJECT_BINARY_DIR}/include/generated/app_smem_unaligned.ld")
@@ -1123,7 +1125,7 @@ if(CONFIG_USERSPACE)
${PROCESS_GPERF}
-i ${KOBJECT_PREBUILT_HASH_OUTPUT_SRC_PRE}
-o ${KOBJECT_PREBUILT_HASH_OUTPUT_SRC}
-p "struct k_object"
-p "struct z_object"
$<$<BOOL:${CMAKE_VERBOSE_MAKEFILE}>:--verbose>
DEPENDS kobj_prebuilt_hash_output_src_pre ${KOBJECT_PREBUILT_HASH_OUTPUT_SRC_PRE}
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
@@ -1237,14 +1239,20 @@ if(CONFIG_GEN_ISR_TABLES)
# isr_tables.c is generated from ${ZEPHYR_LINK_STAGE_EXECUTABLE} by
# gen_isr_tables.py
add_custom_command(
OUTPUT isr_tables.c isr_tables_vt.ld isr_tables_swi.ld
OUTPUT isr_tables.c isrList.bin
COMMAND $<TARGET_PROPERTY:bintools,elfconvert_command>
$<TARGET_PROPERTY:bintools,elfconvert_flag>
$<TARGET_PROPERTY:bintools,elfconvert_flag_intarget>${OUTPUT_FORMAT}
$<TARGET_PROPERTY:bintools,elfconvert_flag_outtarget>binary
$<TARGET_PROPERTY:bintools,elfconvert_flag_section_only>.intList
$<TARGET_PROPERTY:bintools,elfconvert_flag_infile>$<TARGET_FILE:${ZEPHYR_LINK_STAGE_EXECUTABLE}>
$<TARGET_PROPERTY:bintools,elfconvert_flag_outfile>isrList.bin
$<TARGET_PROPERTY:bintools,elfconvert_flag_final>
COMMAND ${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/build/gen_isr_tables.py
--output-source isr_tables.c
--linker-output-files isr_tables_vt.ld isr_tables_swi.ld
--kernel $<TARGET_FILE:${ZEPHYR_LINK_STAGE_EXECUTABLE}>
--intlist-section .intList
--intlist-section intList
--intlist isrList.bin
$<$<BOOL:${CONFIG_BIG_ENDIAN}>:--big-endian>
$<$<BOOL:${CMAKE_VERBOSE_MAKEFILE}>:--debug>
${GEN_ISR_TABLE_EXTRA_ARG}
@@ -1316,7 +1324,7 @@ if(CONFIG_USERSPACE)
${PROCESS_GPERF}
-i ${KOBJECT_HASH_OUTPUT_SRC_PRE}
-o ${KOBJECT_HASH_OUTPUT_SRC}
-p "struct k_object"
-p "struct z_object"
$<$<BOOL:${CMAKE_VERBOSE_MAKEFILE}>:--verbose>
DEPENDS kobj_hash_output_src_pre ${CMAKE_CURRENT_BINARY_DIR}/${KOBJECT_HASH_OUTPUT_SRC_PRE}
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
@@ -1634,20 +1642,18 @@ if(CONFIG_BUILD_OUTPUT_BIN AND CONFIG_BUILD_OUTPUT_UF2)
endif()
if(CONFIG_BUILD_OUTPUT_META)
set(KERNEL_META_PATH ${PROJECT_BINARY_DIR}/${KERNEL_META_NAME} CACHE INTERNAL "")
list(APPEND
post_build_commands
COMMAND ${PYTHON_EXECUTABLE} ${ZEPHYR_BASE}/scripts/zephyr_module.py
${WEST_ARG}
${ZEPHYR_MODULES_ARG}
${EXTRA_ZEPHYR_MODULES_ARG}
--meta-out ${KERNEL_META_PATH}
--zephyr-base=${ZEPHYR_BASE}
--meta-out ${KERNEL_META_NAME}
$<$<BOOL:${CONFIG_BUILD_OUTPUT_META_STATE_PROPAGATE}>:--meta-state-propagate>
)
list(APPEND
post_build_byproducts
${KERNEL_META_PATH}
${KERNEL_META_NAME}
)
endif()
@@ -1765,6 +1771,7 @@ if(CONFIG_BUILD_OUTPUT_EXE)
post_build_byproducts
${KERNEL_EXE_NAME}
)
set(BYPRODUCT_KERNEL_EXE_NAME "${PROJECT_BINARY_DIR}/${KERNEL_EXE_NAME}" CACHE FILEPATH "Kernel exe file" FORCE)
else()
if(CMAKE_GENERATOR STREQUAL "Unix Makefiles")
set(MAKE "${CMAKE_MAKE_PROGRAM}" CACHE FILEPATH "cmake defined make")
@@ -1775,13 +1782,12 @@ if(CONFIG_BUILD_OUTPUT_EXE)
COMMENT "Building native simulator runner, and linking final executable"
COMMAND
${MAKE} -f ${ZEPHYR_BASE}/scripts/native_simulator/Makefile all --warn-undefined-variables
-r NSI_CONFIG_FILE=${APPLICATION_BINARY_DIR}/zephyr/NSI/nsi_config
-r NSI_CONFIG_FILE=${CMAKE_BINARY_DIR}/zephyr/NSI/nsi_config
# nsi_config is created by the board cmake file
DEPENDS ${logical_target_for_zephyr_elf}
BYPRODUCTS ${KERNEL_EXE_NAME}
)
endif()
set(BYPRODUCT_KERNEL_EXE_NAME "${PROJECT_BINARY_DIR}/${KERNEL_EXE_NAME}" CACHE FILEPATH "Kernel exe file" FORCE)
endif()
if(CONFIG_BUILD_OUTPUT_INFO_HEADER)
@@ -1798,51 +1804,39 @@ if(CONFIG_BUILD_OUTPUT_INFO_HEADER)
)
endif()
if(NOT CMAKE_C_COMPILER_ID STREQUAL "ARMClang")
set(check_init_priorities_input
$<IF:$<TARGET_EXISTS:native_runner_executable>,${BYPRODUCT_KERNEL_EXE_NAME},${BYPRODUCT_KERNEL_ELF_NAME}>
)
set(check_init_priorities_command
${PYTHON_EXECUTABLE} ${ZEPHYR_BASE}/scripts/build/check_init_priorities.py
--elf-file=${check_init_priorities_input}
)
set(check_init_priorities_dependencies
${logical_target_for_zephyr_elf}
$<$<TARGET_EXISTS:native_runner_executable>:native_runner_executable>
)
if(CONFIG_CHECK_INIT_PRIORITIES)
add_custom_target(
check_init_priorities
ALL
COMMAND ${check_init_priorities_command}
DEPENDS ${check_init_priorities_dependencies}
)
if(CONFIG_CHECK_INIT_PRIORITIES)
if(CONFIG_CHECK_INIT_PRIORITIES_FAIL_ON_WARNING)
set(fail_on_warning "--fail-on-warning")
endif()
list(APPEND
post_build_commands
COMMAND ${PYTHON_EXECUTABLE} ${ZEPHYR_BASE}/scripts/build/check_init_priorities.py
--elf-file=${ZEPHYR_BINARY_DIR}/${KERNEL_ELF_NAME}
${fail_on_warning}
)
endif()
if(NOT CMAKE_C_COMPILER_ID STREQUAL "ARMClang")
add_custom_target(
initlevels
COMMAND ${check_init_priorities_command} --initlevels
DEPENDS ${check_init_priorities_dependencies}
COMMAND ${PYTHON_EXECUTABLE} ${ZEPHYR_BASE}/scripts/build/check_init_priorities.py
--elf-file=${ZEPHYR_BINARY_DIR}/${KERNEL_ELF_NAME}
--initlevels
DEPENDS ${logical_target_for_zephyr_elf}
USES_TERMINAL
)
endif()
# Generate signed (MCUboot or other) related artifacts as needed. Priority is:
# * Sysbuild (if set)
# * SIGNING_SCRIPT target property (if set)
# * MCUboot signing script (if MCUboot is enabled)
zephyr_get(signing_script VAR SIGNING_SCRIPT SYSBUILD)
if(NOT signing_script)
# Generate and use MCUboot related artifacts as needed.
if(CONFIG_BOOTLOADER_MCUBOOT)
get_target_property(signing_script zephyr_property_target SIGNING_SCRIPT)
if(NOT signing_script AND CONFIG_BOOTLOADER_MCUBOOT)
set(signing_script ${CMAKE_CURRENT_LIST_DIR}/cmake/mcuboot.cmake)
if(NOT signing_script)
set_target_properties(zephyr_property_target PROPERTIES SIGNING_SCRIPT ${CMAKE_CURRENT_LIST_DIR}/cmake/mcuboot.cmake)
endif()
endif()
# Include signing script, if set
get_target_property(signing_script zephyr_property_target SIGNING_SCRIPT)
if(signing_script)
message(STATUS "Including signing script: ${signing_script}")
@@ -1904,11 +1898,12 @@ endif()
add_custom_command(
TARGET ${logical_target_for_zephyr_elf}
POST_BUILD
COMMAND ${CMAKE_COMMAND} -E echo "Generating files from ${PROJECT_BINARY_DIR}/${KERNEL_ELF_NAME} for board: ${BOARD}"
${post_build_commands}
BYPRODUCTS
${post_build_byproducts}
COMMENT "Generating files from ${KERNEL_ELF_NAME} for board: ${BOARD}"
COMMAND_EXPAND_LISTS
# NB: COMMENT only works for some CMake-Generators
)
# To populate with hex files to merge, do the following:

View File

@@ -11,13 +11,25 @@
# add others as needed.
# Do not use wildcard on all source yet
#
# +++++++++++ NOTE ++++++++++++++++
#
# Please use the MAINTAINERS file to add yourself in an area or to add a new
# component or code. This file is going to be deprecated and currently only had
# entries that are not covered by the MAINTAINERS file.
# * @galak @nashif
/.github/ @nashif @stephanosio
/.github/workflows/ @galak @nashif
/MAINTAINERS.yml @MaureenHelm
/arch/arc/ @abrodkin @ruuddw @evgeniy-paltsev
/arch/arm/ @MaureenHelm @galak @ioannisg
/arch/arm/core/cortex_m/cmse/ @ioannisg
/arch/arm/include/cortex_m/cmse.h @ioannisg
/arch/arm/core/cortex_a_r/ @MaureenHelm @galak @ioannisg @bbolen @stephanosio
/arch/arm64/ @carlocaione
/arch/arm64/core/cortex_r/ @povergoing
/arch/arm64/core/xen/ @lorc @firscity
/arch/common/ @ioannisg @andyross
/arch/mips/ @frantony
/soc/arc/snps_*/ @abrodkin @ruuddw @evgeniy-paltsev
/soc/nios2/ @nashif
/soc/arm/ @MaureenHelm @galak @ioannisg
/soc/arm/arm/mps2/ @fvincenzo
/soc/arm/aspeed/ @aspeeddylan
/soc/arm/atmel_sam/common/*_sam4l_*.c @nandojve
/soc/arm/atmel_sam/sam3x/ @ioannisg
@@ -26,9 +38,18 @@
/soc/arm/atmel_sam/sam4s/ @fallrisk
/soc/arm/atmel_sam/same70/ @nandojve
/soc/arm/atmel_sam/samv71/ @nandojve
/soc/arm/cypress/ @ifyall @npal-cy
/soc/arm/bcm*/ @sbranden
/soc/arm/gigadevice/ @nandojve
/soc/arm/infineon_cat1/ @ifyall @npal-cy
/soc/arm/infineon_xmc/ @parthitce
/soc/arm/nxp*/ @mmahadevan108 @dleach02
/soc/arm/nxp_s32/ @manuargue
/soc/arm/nordic_nrf/ @anangl
/soc/arm/nuvoton_npcx/ @MulinChao @ChiHuaL
/soc/arm/nuvoton_numicro/ @ssekar15
/soc/arm/quicklogic_eos_s3/ @fkokosinski @kgugala
/soc/arm/rpi_pico/ @yonsch
/soc/arm/silabs_exx32/efm32pg1b/ @rdmeneze
/soc/arm/silabs_exx32/efr32mg21/ @l-alfred
/soc/arm/st_stm32/ @erwango
@@ -42,11 +63,37 @@
/soc/arm/xilinx_zynq7000/ @ibirnbaum
/soc/arm/xilinx_zynqmp/ @stephanosio
/soc/arm/renesas_rcar/ @aaillet
/soc/arm64/ @carlocaione
/soc/arm64/qemu_cortex_a53/ @carlocaione
/soc/arm64/bcm_vk/ @abhishek-brcm
/soc/arm64/nxp_layerscape/ @JiafeiPan
/soc/arm64/xenvm/ @lorc @firscity
/soc/arm64/nxp_imx/ @MrVan @JiafeiPan
/soc/arm64/arm/ @povergoing
/soc/arm64/arm/fvp_aemv8a/ @carlocaione
/soc/arm64/intel_socfpga/* @siclim
/soc/arm64/renesas_rcar/ @lorc @xakep-amatop
/soc/Kconfig @tejlmand @galak @nashif @nordicjm
/submanifests/* @mbolivar-ampere
/arch/x86/ @jhedberg @nashif
/arch/nios2/ @nashif
/arch/posix/ @aescolar @daor-oti
/arch/riscv/ @kgugala @pgielda
/soc/mips/ @frantony
/soc/posix/ @aescolar @daor-oti
/soc/riscv/ @kgugala @pgielda
/soc/riscv/openisa*/ @dleach02
/soc/riscv/riscv-privileged/andes_v5/ @cwshu @kevinwang821020 @jimmyzhe
/soc/riscv/riscv-privileged/neorv32/ @henrikbrixandersen
/soc/riscv/riscv-privileged/gd32vf103/ @soburi
/soc/riscv/riscv-privileged/niosv/ @sweeaun
/soc/x86/ @dcpleung @nashif
/arch/xtensa/ @dcpleung @andyross @nashif
/soc/xtensa/ @dcpleung @andyross @nashif
/arch/sparc/ @julius-barendt
/soc/sparc/ @julius-barendt
/boards/arc/ @abrodkin @ruuddw @evgeniy-paltsev
/boards/arm/ @MaureenHelm @galak
/boards/arm/96b_argonkey/ @avisconti
/boards/arm/96b_avenger96/ @Mani-Sadhasivam
/boards/arm/96b_carbon/ @idlethread
@@ -55,6 +102,7 @@
/boards/arm/96b_neonkey/ @Mani-Sadhasivam
/boards/arm/96b_stm32_sensor_mez/ @Mani-Sadhasivam
/boards/arm/96b_wistrio/ @Mani-Sadhasivam
/boards/arm/arduino_due/ @ioannisg
/boards/arm/acn52832/ @sven-hm
/boards/arm/arduino_mkrzero/ @soburi
/boards/arm/bbc_microbit_v2/ @LingaoM
@@ -120,7 +168,15 @@
/boards/arm/rcar_*/ @aaillet
/boards/arm/ubx_bmd345eval_nrf52840/ @Navin-Sankar @brec-u-blox
/boards/arm/nrf5340_audio_dk_nrf5340 @koffes @alexsven @erikrobstad @rick1082 @gWacey
/boards/common/ @mbolivar-ampere
/boards/deprecated.cmake @tejlmand
/boards/mips/ @frantony
/boards/nios2/ @nashif
/boards/nios2/altera_max10/ @nashif
/boards/arm/stm32_min_dev/ @sidcha
/boards/posix/ @aescolar @daor-oti
/boards/posix/nrf52_bsim/ @aescolar @wopu-ot
/boards/riscv/ @kgugala @pgielda
/boards/riscv/rv32m1_vega/ @dleach02
/boards/riscv/adp_xc7k_ae350/ @cwshu @kevinwang821020 @jimmyzhe
/boards/riscv/longan_nano/ @soburi
@@ -128,12 +184,16 @@
/boards/riscv/niosv*/ @sweeaun
/boards/riscv/sparkfun_red_v_things_plus/ @soburi
/boards/riscv/stamp_c3/ @soburi
/boards/shields/ @erwango
/boards/shields/atmel_rf2xx/ @nandojve
/boards/shields/esp_8266/ @nandojve
/boards/shields/inventek_eswifi/ @nandojve
/boards/x86/ @dcpleung @nashif
/boards/x86/acrn/ @enjiamai
/boards/xtensa/ @nashif @dcpleung
/boards/xtensa/odroid_go/ @ydamigos
/boards/xtensa/nxp_adsp_imx8/ @iuliana-prodan @dbaluta
/boards/xtensa/kincony_kc868_a32/ @bbilas
/boards/sparc/ @julius-barendt
/boards/arm64/qemu_cortex_a53/ @carlocaione
/boards/arm64/bcm958402m2_a72/ @abhishek-brcm
/boards/arm64/mimx8mm_evk/ @MrVan @JiafeiPan
@@ -145,15 +205,26 @@
/boards/arm64/fvp_baser_aemv8r/ @povergoing
/boards/arm64/fvp_base_revc_2xaemv8a/ @carlocaione
/boards/arm64/intel_socfpga_agilex_socdk/ @siclim @ngboonkhai
/boards/arm64/intel_socfpga_agilex5_socdk/ @teikheng @gdengi
/boards/arm64/intel_socfpga_agilex5_socdk/ @chongteikheng
/boards/arm64/rcar_*/ @lorc @xakep-amatop
/boards/Kconfig @tejlmand @galak @nashif @nordicjm
# All cmake related files
/cmake/ @tejlmand @nashif
/cmake/*/arcmwdt/ @abrodkin @evgeniy-paltsev @tejlmand
/CMakeLists.txt @tejlmand @nashif
/doc/ @carlescufi
/doc/develop/tools/coccinelle.rst @himanshujha199640 @JuliaLawall
/doc/services/device_mgmt/smp_protocol.rst @de-nordic @nordicjm
/doc/services/device_mgmt/smp_groups/ @de-nordic @nordicjm
/doc/services/sensing/ @lixuzha @ghu0510 @qianruh
/doc/CMakeLists.txt @carlescufi
/doc/_scripts/ @carlescufi
/doc/connectivity/bluetooth/ @alwa-nordic @jhedberg @Vudentz
/doc/build/dts/ @galak @mbolivar-ampere
/doc/build/sysbuild/ @tejlmand @nordicjm
/doc/hardware/peripherals/canbus/ @alexanderwachter @henrikbrixandersen
/doc/security/ @ceolin @d3zd3z
/drivers/debug/ @nashif
/drivers/*/*sam4l* @nandojve
/drivers/*/*cc13xx_cc26xx* @bwitherspoon
/drivers/*/*gd32* @nandojve
@@ -167,24 +238,28 @@
/drivers/*/*ifx_cat1* @ifyall @npal-cy
/drivers/*/*neorv32* @henrikbrixandersen
/drivers/*/*_s32* @manuargue
/drivers/adc/ @anangl
/drivers/adc/adc_ads1x1x.c @XenuIsWatching
/drivers/adc/adc_stm32.c @cybertale
/drivers/adc/adc_rpi_pico.c @soburi
/drivers/adc/*ads114s0x* @benediktibk
/drivers/adc/*max11102_17* @benediktibk
/drivers/adc/adc_ad5592.c @bbilas
/drivers/audio/*nrfx* @anangl
/drivers/auxdisplay/*pt6314* @xingrz
/drivers/auxdisplay/* @thedjnK
/drivers/bbram/* @yperess @sjg20 @jackrosenthal
/drivers/bluetooth/ @alwa-nordic @jhedberg @Vudentz
/drivers/bluetooth/hci/hci_esp32.c @sylvioalves
/drivers/cache/ @carlocaione
/drivers/syscon/ @carlocaione @yperess
/drivers/can/ @alexanderwachter @henrikbrixandersen
/drivers/can/*mcp2515* @karstenkoenig
/drivers/can/*rcar* @aaillet
/drivers/clock_control/*agilex* @siclim @gdengi
/drivers/clock_control/*nrf* @nordic-krch
/drivers/clock_control/*esp32* @extremegtx @sylvioalves
/drivers/clock_control/*cpg_mssr* @aaillet
/drivers/counter/ @nordic-krch
/drivers/console/ipm_console.c @finikorg
/drivers/console/semihost_console.c @luozhongyao
/drivers/console/jailhouse_debug_console.c @MrVan
@@ -196,8 +271,8 @@
/drivers/crypto/*nrf_ecb* @maciekfabia @anangl
/drivers/display/*rm68200* @mmahadevan108
/drivers/display/display_ili9342c.* @extremegtx
/drivers/dac/ @martinjaeger
/drivers/dac/*ad56xx* @benediktibk
/drivers/dac/dac_ad5592.c @bbilas
/drivers/dai/ @kv2019i @marcinszkudlinski @abonislawski
/drivers/dai/intel/ @kv2019i @marcinszkudlinski @abonislawski
/drivers/dai/intel/ssp/ @kv2019i @marcinszkudlinski @abonislawski
@@ -212,29 +287,34 @@
/drivers/dma/*intel_adsp* @teburd @abonislawski
/drivers/dma/*rpi_pico* @soburi
/drivers/dma/*xmc4xxx* @talih0
/drivers/edac/ @finikorg
/drivers/eeprom/ @henrikbrixandersen
/drivers/eeprom/eeprom_stm32.c @KwonTae-young
/drivers/entropy/*b91* @andy-liu-telink
/drivers/entropy/*bt_hci* @JordanYates
/drivers/entropy/*rv32m1* @dleach02
/drivers/entropy/*litex* @mateusz-holenko @kgugala @pgielda
/drivers/espi/ @albertofloyd @franciscomunoz @sjvasanth1
/drivers/ethernet/ @tbursztyka @jukkar
/drivers/ethernet/*dwmac* @npitre
/drivers/ethernet/*stm32* @Nukersson @lochej
/drivers/ethernet/*w5500* @parthitce
/drivers/ethernet/*xlnx_gem* @ibirnbaum
/drivers/ethernet/*smsc91x* @sgrrzhf
/drivers/ethernet/*adin2111* @GeorgeCGV
/drivers/ethernet/*oa_tc6* @lmajewski
/drivers/ethernet/*lan865x* @lmajewski
/drivers/ethernet/phy/ @rlubos @tbursztyka @arvinf @jukkar
/drivers/ethernet/phy/*adin2111* @GeorgeCGV
/drivers/mdio/ @rlubos @tbursztyka @arvinf
/drivers/mdio/*adin2111* @GeorgeCGV
/drivers/flash/ @nashif @de-nordic
/drivers/flash/*stm32_qspi* @lmajewski
/drivers/flash/*b91* @andy-liu-telink
/drivers/flash/*cadence* @ngboonkhai
/drivers/flash/*cc13xx_cc26xx* @pepe2k
/drivers/flash/*nrf* @de-nordic
/drivers/flash/*esp32* @sylvioalves
/drivers/flash/flash_cadence_nand* @nbalabak
/drivers/fpga/ @tgorochowik @kgugala
/drivers/gpio/ @mnkp
/drivers/gpio/*b91* @andy-liu-telink
/drivers/gpio/*lmp90xxx* @henrikbrixandersen
/drivers/gpio/*nct38xx* @MulinChao @ChiHuaL
@@ -247,8 +327,7 @@
/drivers/gpio/*ads114s0x* @benediktibk
/drivers/gpio/*bd8lb600fs* @benediktibk
/drivers/gpio/*pcal64xxa* @benediktibk
/drivers/gpio/gpio_altera_pio.c @shilinte
/drivers/gpio/gpio_ad5592.c @bbilas
/drivers/hwinfo/ @alexanderwachter
/drivers/i2c/i2c_common.c @sjg20
/drivers/i2c/i2c_emul.c @sjg20
/drivers/i2c/i2c_ite_enhance.c @GTLin08
@@ -263,6 +342,7 @@
/drivers/i2s/*litex* @mateusz-holenko @kgugala @pgielda
/drivers/i2s/i2s_ll_stm32* @avisconti
/drivers/i2s/*nrfx* @anangl
/drivers/i3c/ @dcpleung
/drivers/i3c/i3c_cdns.c @XenuIsWatching
/drivers/ieee802154/ @rlubos @tbursztyka @jukkar @fgrandel
/drivers/ieee802154/*b91* @andy-liu-telink
@@ -283,22 +363,31 @@
/drivers/ipm/ipm_stm32_hsem.c @cameled
/drivers/ipm/ipm_esp32.c @uLipe
/drivers/ipm/ipm_ivshmem.c @uLipe
/drivers/kscan/ @VenkatKotakonda @franciscomunoz @sjvasanth1
/drivers/kscan/*xec* @franciscomunoz @sjvasanth1
/drivers/kscan/*ft5336* @MaureenHelm
/drivers/kscan/*ht16k33* @henrikbrixandersen
/drivers/led/ @Mani-Sadhasivam
/drivers/led_strip/ @mbolivar-ampere
/drivers/mfd/mfd_ad5592.c @bbilas
/drivers/mfd/mfd_max20335.c @bbilas
/drivers/lora/ @Mani-Sadhasivam
/drivers/mbox/ @carlocaione
/drivers/misc/ @tejlmand
/drivers/misc/ft8xx/ @hubertmis
/drivers/mm/ @dcpleung
/drivers/modem/hl7800.c @rerickson1
/drivers/modem/simcom-sim7080.c @lgehreke
/drivers/modem/simcom-sim7080.h @lgehreke
/drivers/modem/Kconfig.hl7800 @rerickson1
/drivers/modem/Kconfig.simcom-sim7080 @lgehreke
/drivers/pcie/ @dcpleung @nashif @jhedberg
/drivers/peci/ @albertofloyd @franciscomunoz @sjvasanth1
/drivers/pinctrl/ @gmarull
/drivers/pinctrl/*esp32* @sylvioalves
/drivers/pinctrl/*it8xxx2* @ite
/drivers/pm_cpu_ops/ @carlocaione @gdengi
/drivers/pm_cpu_ops/psci_shell.c @nbalabak @gdengi
/drivers/power_domain/ @ceolin
/drivers/ps2/ @franciscomunoz @sjvasanth1
/drivers/ps2/*xec* @franciscomunoz @sjvasanth1
/drivers/ps2/*npcx* @MulinChao @ChiHuaL
/drivers/pwm/*b91* @andy-liu-telink
@@ -316,12 +405,13 @@
/drivers/pwm/*rcar* @aaillet
/drivers/pwm/*max31790* @benediktibk
/drivers/regulator/* @gmarull
/drivers/regulator/regulator_max20335.c @bbilas
/drivers/regulator/regulator_pca9420.c @danieldegrasse
/drivers/regulator/regulator_rpi_pico.c @soburi
/drivers/regulator/regulator_shell.c @danieldegrasse
/drivers/reset/ @andrei-edward-popa
/drivers/reset/reset_intel_socfpga.c @nbalabak
/drivers/reset/Kconfig.intel_socfpga @nbalabak
/drivers/sensor/ @MaureenHelm
/drivers/sensor/ams_iAQcore/ @alexanderwachter
/drivers/sensor/ens210/ @alexanderwachter
/drivers/sensor/grow_r502a/ @DineshDK03
@@ -352,21 +442,28 @@
/drivers/serial/*numicro* @ssekar15
/drivers/serial/*apbuart* @julius-barendt
/drivers/serial/*rcar* @aaillet
/drivers/serial/Kconfig.test @str4t0m
/drivers/serial/serial_test.c @str4t0m
/drivers/serial/Kconfig.xen @lorc @firscity
/drivers/serial/uart_hvc_xen.c @lorc @firscity
/drivers/serial/uart_hvc_xen_consoleio.c @lorc @firscity
/drivers/serial/Kconfig.it8xxx2 @GTLin08
/drivers/serial/uart_ite_it8xxx2.c @GTLin08
/drivers/serial/*intel_lw* @shilinte
/drivers/smbus/ @finikorg
/drivers/sip_svc/ @maheshraotm
/drivers/disk/ @jfischer-no
/drivers/disk/sdmmc_sdhc.h @JunYangNXP
/drivers/disk/sdmmc_stm32.c @anthonybrandon
/drivers/net/ @rlubos @tbursztyka @jukkar
/drivers/ptp_clock/ @tbursztyka @jukkar
/drivers/spi/ @tbursztyka
/drivers/spi/*b91* @andy-liu-telink
/drivers/spi/spi_rv32m1_lpspi* @karstenkoenig
/drivers/spi/*esp32* @sylvioalves
/drivers/spi/*pl022* @soburi
/drivers/sdhc/ @danieldegrasse
/drivers/sdhc/sdhc_cdns* @roymurlidhar @tanmaykathpalia
/drivers/timer/*apic* @dcpleung @nashif
/drivers/timer/apic_tsc.c @andyross
/drivers/timer/*arm_arch* @carlocaione
/drivers/timer/*cortex_m_systick* @anangl
/drivers/timer/*altera_avalon* @nashif
@@ -386,7 +483,10 @@
/drivers/timer/*rv32m1_lptmr* @mbolivar
/drivers/timer/*nrf_rtc* @anangl
/drivers/timer/*hpet* @dcpleung
/drivers/usb/ @jfischer-no
/drivers/usb/device/usb_dc_stm32.c @ydamigos @loicpoulain
/drivers/usb_c/ @sambhurst
/drivers/video/ @loicpoulain
/drivers/i2c/*b91* @andy-liu-telink
/drivers/i2c/i2c_ll_stm32* @ydamigos
/drivers/i2c/i2c_rv32m1_lpi2c* @henrikbrixandersen
@@ -394,6 +494,7 @@
/drivers/i2c/i2c_dw* @dcpleung
/drivers/i2c/*tca954x* @kurddt
/drivers/*/*xec* @franciscomunoz @albertofloyd @sjvasanth1
/drivers/w1/ @str4t0m
/drivers/watchdog/*gecko* @oanerer
/drivers/watchdog/*sifive* @katsuster
/drivers/watchdog/wdt_handlers.c @dcpleung @nashif
@@ -402,12 +503,14 @@
/drivers/watchdog/Kconfig.it8xxx2 @RuibinChang
/drivers/watchdog/wdt_counter.c @nordic-krch
/drivers/watchdog/*rpi_pico* @thedjnK
/drivers/watchdog/*dw* @softwarecki @pbalsundar
/drivers/watchdog/*dw* @softwarecki
/drivers/watchdog/*ifx* @sreeramIfx
/drivers/wifi/ @rlubos @tbursztyka @jukkar
/drivers/wifi/esp_at/ @mniestroj
/drivers/wifi/eswifi/ @loicpoulain @nandojve
/drivers/wifi/winc1500/ @kludentwo
/drivers/virtualization/ @tbursztyka
/drivers/xen/ @lorc @firscity
/dts/arc/ @abrodkin @ruuddw @iriszzw @evgeniy-paltsev
/dts/arm/acsip/ @NorthernDean
/dts/arm/aspeed/ @aspeeddylan
@@ -420,9 +523,10 @@
/dts/arm/atmel/ @galak
/dts/arm/broadcom/ @sbranden
/dts/arm/cypress/ @ifyall @npal-cy
/dts/arm/gd/ @nandojve
/dts/arm/gigadevice/ @nandojve
/dts/arm/infineon/xmc4* @parthitce @ifyall @npal-cy
/dts/arm/infineon/psoc6/ @ifyall @npal-cy
/dts/arm64/ @carlocaione
/dts/arm64/armv8-r.dtsi @povergoing
/dts/arm64/intel/*intel_socfpga* @siclim
/dts/arm64/nxp/ @JiafeiPan
@@ -449,6 +553,7 @@
/dts/arm/silabs/efm32pg1b* @rdmeneze
/dts/arm/silabs/efr32mg21* @l-alfred
/dts/arm/silabs/efr32fg13* @yonsch
/dts/riscv/ @kgugala @pgielda
/dts/riscv/ite/ @ite
/dts/riscv/microchip/microchip-miv.dtsi @galak
/dts/riscv/openisa/rv32m1* @dleach02
@@ -461,10 +566,13 @@
/dts/arm/armv7-r.dtsi @bbolen @stephanosio
/dts/arm/xilinx/ @bbolen @stephanosio
/dts/arm/renesas/rcar/ @aaillet
/dts/x86/ @jhedberg
/dts/xtensa/xtensa.dtsi @ydamigos
/dts/xtensa/intel/ @dcpleung
/dts/xtensa/espressif/ @sylvioalves
/dts/xtensa/nxp/ @iuliana-prodan @dbaluta
/dts/sparc/ @julius-barendt
/dts/bindings/ @galak
/dts/bindings/can/ @alexanderwachter @henrikbrixandersen
/dts/bindings/i2c/zephyr*i2c-emul*.yaml @sjg20
/dts/bindings/adc/st*stm32-adc.yaml @cybertale
@@ -496,6 +604,7 @@
/dts/bindings/ethernet/*gem.yaml @ibirnbaum
/dts/bindings/auxdisplay/*pt6314.yaml @xingrz
/dts/bindings/auxdisplay/* @thedjnK
/dts/posix/ @aescolar @daor-oti
/dts/bindings/sensor/*bme680* @BoschSensortec
/dts/bindings/sensor/*ina23* @bbilas
/dts/bindings/sensor/st* @avisconti
@@ -510,3 +619,338 @@
/dts/bindings/gpio/*ads114s0x* @benediktibk
/dts/bindings/pwm/*max31790* @benediktibk
/dts/bindings/dac/*ad56* @benediktibk
/dts/common/ @galak
/include/ @nashif @carlescufi @galak @MaureenHelm
/include/zephyr/drivers/*/*litex* @mateusz-holenko @kgugala @pgielda
/include/zephyr/drivers/adc.h @anangl
/include/zephyr/drivers/adc/ads114s0x.h @benediktibk
/include/zephyr/drivers/auxdisplay.h @thedjnK
/include/zephyr/drivers/can.h @alexanderwachter @henrikbrixandersen
/include/zephyr/drivers/can/ @alexanderwachter @henrikbrixandersen
/include/zephyr/drivers/counter.h @nordic-krch
/include/zephyr/drivers/dac.h @martinjaeger
/include/zephyr/drivers/espi.h @albertofloyd @franciscomunoz @sjvasanth1
/include/zephyr/drivers/bluetooth/ @alwa-nordic @jhedberg @Vudentz
/include/zephyr/drivers/flash.h @nashif @carlescufi @galak @MaureenHelm @de-nordic
/include/zephyr/drivers/i2c_emul.h @sjg20
/include/zephyr/drivers/i3c.h @dcpleung
/include/zephyr/drivers/i3c/ @dcpleung
/include/zephyr/drivers/led/ht16k33.h @henrikbrixandersen
/include/zephyr/drivers/interrupt_controller/ @dcpleung @nashif
/include/zephyr/drivers/interrupt_controller/gic.h @stephanosio
/include/zephyr/drivers/modem/hl7800.h @rerickson1
/include/zephyr/drivers/pcie/ @dcpleung
/include/zephyr/drivers/hwinfo.h @alexanderwachter
/include/zephyr/drivers/led.h @Mani-Sadhasivam
/include/zephyr/drivers/led_strip.h @mbolivar-ampere
/include/zephyr/drivers/sensor.h @MaureenHelm
/include/zephyr/drivers/smbus.h @finikorg
/include/zephyr/drivers/spi.h @tbursztyka
/include/zephyr/drivers/sip_svc/ @maheshraotm
/include/zephyr/drivers/lora.h @Mani-Sadhasivam
/include/zephyr/drivers/peci.h @albertofloyd @franciscomunoz @sjvasanth1
/include/zephyr/drivers/pm_cpu_ops.h @carlocaione
/include/zephyr/drivers/pm_cpu_ops/ @carlocaione
/include/zephyr/drivers/w1.h @str4t0m
/include/zephyr/drivers/pwm/max31790.h @benediktibk
/include/zephyr/app_memory/ @dcpleung
/include/zephyr/arch/arc/ @abrodkin @ruuddw @evgeniy-paltsev
/include/zephyr/arch/arc/arch.h @abrodkin @ruuddw @evgeniy-paltsev
/include/zephyr/arch/arc/v2/irq.h @abrodkin @ruuddw @evgeniy-paltsev
/include/zephyr/arch/arm @MaureenHelm @galak @ioannisg
/include/zephyr/arch/arm/cortex_a_r/ @stephanosio
/include/zephyr/arch/arm64/ @carlocaione
/include/zephyr/arch/arm64/cortex_r/ @povergoing
/include/zephyr/arch/arm/irq.h @carlocaione
/include/zephyr/arch/mips/ @frantony
/include/zephyr/arch/nios2/ @nashif
/include/zephyr/arch/nios2/arch.h @nashif
/include/zephyr/arch/posix/ @aescolar @daor-oti
/include/zephyr/arch/riscv/ @kgugala @pgielda
/include/zephyr/arch/x86/ @jhedberg @dcpleung
/include/zephyr/arch/common/ @andyross @nashif
/include/zephyr/arch/xtensa/ @andyross @dcpleung
/include/zephyr/arch/sparc/ @julius-barendt
/include/zephyr/sys/atomic.h @andyross
/include/zephyr/bluetooth/ @alwa-nordic @jhedberg @Vudentz @sjanc
/include/zephyr/bluetooth/audio/ @jhedberg @Vudentz @Thalley
/include/zephyr/cache.h @carlocaione @andyross
/include/zephyr/canbus/ @alexanderwachter @henrikbrixandersen
/include/zephyr/tracing/ @nashif
/include/zephyr/debug/ @nashif
/include/zephyr/debug/coredump.h @dcpleung
/include/zephyr/debug/gdbstub.h @ceolin
/include/zephyr/device.h @tbursztyka @nashif
/include/zephyr/devicetree.h @galak
/include/zephyr/devicetree/can.h @henrikbrixandersen
/include/zephyr/dt-bindings/clock/kinetis_mcg.h @henrikbrixandersen
/include/zephyr/dt-bindings/clock/kinetis_scg.h @henrikbrixandersen
/include/zephyr/dt-bindings/ethernet/xlnx_gem.h @ibirnbaum
/include/zephyr/dt-bindings/pcie/ @dcpleung
/include/zephyr/dt-bindings/pinctrl/esp* @sylvioalves
/include/zephyr/dt-bindings/pwm/*it8xxx2* @RuibinChang
/include/zephyr/dt-bindings/usb/usb.h @galak
/include/zephyr/dt-bindings/adc/ads114s0x_adc.h @benediktibk
/include/zephyr/drivers/emul.h @sjg20
/include/zephyr/fs/ @nashif @de-nordic
/include/zephyr/init.h @nashif @andyross
/include/zephyr/irq.h @dcpleung @nashif @andyross
/include/zephyr/irq_offload.h @dcpleung @nashif @andyross
/include/zephyr/kernel.h @dcpleung @nashif @andyross
/include/zephyr/kernel_version.h @dcpleung @nashif @andyross
/include/zephyr/linker/app_smem*.ld @dcpleung @nashif
/include/zephyr/linker/ @dcpleung @nashif @andyross
/include/zephyr/logging/ @nordic-krch
/include/zephyr/lorawan/lorawan.h @Mani-Sadhasivam
/include/zephyr/mgmt/osdp.h @sidcha
/include/zephyr/mgmt/mcumgr/ @nordicjm
/include/zephyr/net/ @rlubos @tbursztyka @jukkar
/include/zephyr/net/buf.h @jhedberg @tbursztyka @rlubos @jukkar
/include/zephyr/net/coap*.h @rlubos
/include/zephyr/net/conn_mgr*.h @rlubos @glarsennordic @jukkar
/include/zephyr/net/gptp.h @rlubos @jukkar @fgrandel
/include/zephyr/net/ieee802154*.h @rlubos @tbursztyka @jukkar @fgrandel
/include/zephyr/net/lwm2m*.h @rlubos
/include/zephyr/net/mqtt.h @rlubos
/include/zephyr/net/mqtt_sn.h @rlubos @BeckmaR
/include/zephyr/net/net_pkt_filter.h @npitre
/include/zephyr/posix/ @cfreidt
/include/zephyr/pm/pm.h @nashif @ceolin
/include/zephyr/drivers/ptp_clock.h @tbursztyka @jukkar
/include/zephyr/rtio/ @teburd
/include/zephyr/sensing/ @lixuzha @ghu0510 @qianruh
/include/zephyr/shared_irq.h @dcpleung @nashif @andyross
/include/zephyr/shell/ @jakub-uC @nordic-krch
/include/zephyr/shell/shell_mqtt.h @ycsin
/include/zephyr/sw_isr_table.h @dcpleung @nashif @andyross
/include/zephyr/sd/ @danieldegrasse
/include/zephyr/sip_svc/ @maheshraotm
/include/zephyr/sys_clock.h @dcpleung @nashif @andyross
/include/zephyr/sys/sys_io.h @dcpleung @nashif @andyross
/include/zephyr/sys/kobject.h @dcpleung @nashif
/include/zephyr/toolchain.h @dcpleung @andyross @nashif
/include/zephyr/toolchain/ @dcpleung @nashif @andyross
/include/zephyr/zephyr.h @dcpleung @nashif @andyross
/kernel/ @dcpleung @nashif @andyross
/lib/cpp/ @stephanosio
/lib/smf/ @sambhurst
/lib/util/ @carlescufi @jakub-uC
/lib/util/fnmatch/ @carlescufi @jakub-uC
/lib/open-amp/ @arnopo
/lib/os/ @dcpleung @nashif @andyross
/lib/os/cbprintf_packaged.c @npitre
/lib/posix/ @cfriedt
/lib/posix/getopt/ @jakub-uC
/subsys/portability/ @nashif
/subsys/sensing/ @lixuzha @ghu0510 @qianruh
/lib/libc/ @nashif
/lib/libc/arcmwdt/ @abrodkin @ruuddw @evgeniy-paltsev
/misc/ @tejlmand
/modules/ @nashif
/modules/canopennode/ @henrikbrixandersen
/modules/mbedtls/ @ceolin @d3zd3z
/modules/hal_gigadevice/ @nandojve
/modules/hal_nordic/nrf_802154/ @jciupis
/modules/trusted-firmware-m/ @microbuilder
/kernel/device.c @andyross @nashif
/kernel/idle.c @andyross @nashif
/samples/ @nashif
/samples/application_development/sysbuild/ @tejlmand @nordicjm
/samples/basic/minimal/ @carlescufi
/samples/basic/servo_motor/boards/*microbit* @jhe
/samples/bluetooth/ @jhedberg @Vudentz @alwa-nordic @sjanc
/samples/compression/ @Navin-Sankar
/samples/drivers/can/ @alexanderwachter @henrikbrixandersen
/samples/drivers/clock_control_litex/ @mateusz-holenko @kgugala @pgielda
/samples/drivers/eeprom/ @henrikbrixandersen
/samples/drivers/ht16k33/ @henrikbrixandersen
/samples/drivers/lora/ @Mani-Sadhasivam
/samples/drivers/smbus/ @finikorg
/samples/subsys/lorawan/ @Mani-Sadhasivam
/samples/modules/canopennode/ @henrikbrixandersen
/samples/net/ @rlubos @tbursztyka @jukkar
/samples/net/cloud/tagoio_http_post/ @nandojve
/samples/net/dns_resolve/ @rlubos @tbursztyka @jukkar
/samples/net/gptp/ @rlubos @jukkar @fgrandel
/samples/net/lwm2m_client/ @rlubos
/samples/net/mqtt_publisher/ @rlubos
/samples/net/mqtt_sn_publisher/ @rlubos @BeckmaR
/samples/net/sockets/coap_*/ @rlubos
/samples/net/sockets/ @rlubos @tbursztyka @jukkar
/samples/sensor/ @MaureenHelm
/samples/shields/ @avisconti
/samples/subsys/ipc/ipc_service/icmsg @emob-nordic
/samples/subsys/logging/ @nordic-krch @jakub-uC
/samples/subsys/logging/syst/ @dcpleung
/samples/subsys/shell/ @jakub-uC @nordic-krch @gdengi
/samples/subsys/sip_svc/ @maheshraotm
/samples/subsys/mgmt/mcumgr/ @de-nordic @nordicjm
/samples/subsys/mgmt/updatehub/ @nandojve @otavio
/samples/subsys/mgmt/osdp/ @sidcha
/samples/subsys/usb/ @jfischer-no
/samples/subsys/usb_c/ @sambhurst
/samples/subsys/pm/ @nashif @ceolin
/samples/subsys/sensing/ @lixuzha @ghu0510 @qianruh
/samples/tfm_integration/ @microbuilder
/samples/userspace/ @dcpleung @nashif
/scripts/release/bug_bash.py @cfriedt
/scripts/coccicheck @himanshujha199640 @JuliaLawall
/scripts/coccinelle/ @himanshujha199640 @JuliaLawall
/scripts/coredump/ @dcpleung
/scripts/footprint/ @nashif
/scripts/kconfig/ @ulfalizer
/scripts/logging/dictionary/ @dcpleung
/scripts/native_simulator/ @aescolar
/scripts/pylib/twister/expr_parser.py @nashif
/scripts/schemas/twister/ @nashif
/scripts/build/gen_app_partitions.py @dcpleung @nashif
scripts/build/gen_image_info.py @tejlmand
/scripts/get_maintainer.py @nashif
/scripts/dts/ @mbolivar-ampere @galak
/scripts/release/ @nashif
/scripts/ci/ @nashif
/scripts/ci/check_compliance.py @nashif @carlescufi
/arch/x86/gen_gdt.py @dcpleung @nashif
/arch/x86/gen_idt.py @dcpleung @nashif
/scripts/build/gen_kobject_list.py @dcpleung @nashif
/scripts/build/gen_kobject_placeholders.py @dcpleung
/scripts/build/gen_syscalls.py @dcpleung @nashif
/scripts/list_boards.py @mbolivar-ampere
/scripts/build/process_gperf.py @dcpleung @nashif
/scripts/build/gen_relocate_app.py @dcpleung
/scripts/generate_usb_vif/ @madhurimaparuchuri
/scripts/requirements*.txt @mbolivar-ampere @galak @nashif
/scripts/tests/build/test_subfolder_list.py @rmstoi
/scripts/tracing/ @nashif
/scripts/pylib/twister/ @nashif
/scripts/twister @nashif
/scripts/series-push-hook.sh @erwango
/scripts/utils/pinctrl_nrf_migrate.py @gmarull
/scripts/utils/migrate_mcumgr_kconfigs.py @de-nordic
/scripts/west_commands/ @mbolivar-ampere
/scripts/west_commands/blobs.py @carlescufi
/scripts/west_commands/fetchers/ @carlescufi
/scripts/west_commands/runners/gd32isp.py @mbolivar-ampere @nandojve
/scripts/west_commands/tests/test_gd32isp.py @mbolivar-ampere @nandojve
/scripts/west-commands.yml @mbolivar-ampere
/scripts/zephyr_module.py @tejlmand
/scripts/build/uf2conv.py @petejohanson
/scripts/build/user_wordsize.py @cfriedt
/scripts/valgrind.supp @aescolar @daor-oti
/share/sysbuild/ @tejlmand @nordicjm
/share/zephyr-package/ @tejlmand
/share/zephyrunittest-package/ @tejlmand
/subsys/bluetooth/ @alwa-nordic @jhedberg @Vudentz
/subsys/bluetooth/audio/ @jhedberg @Vudentz @Thalley @sjanc
/subsys/bluetooth/controller/ @carlescufi @cvinayak @thoh-ot @kruithofa
/subsys/bluetooth/host/ @alwa-nordic @jhedberg @Vudentz @sjanc
/subsys/bluetooth/mesh/ @jhedberg @PavelVPV @Vudentz @LingaoM
/subsys/canbus/ @alexanderwachter @henrikbrixandersen
/subsys/debug/ @nashif
/subsys/debug/coredump/ @dcpleung
/subsys/debug/gdbstub/ @ceolin
/subsys/debug/gdbstub.c @ceolin
/subsys/dfu/ @de-nordic @nordicjm
/subsys/disk/ @jfischer-no
/subsys/dsp/ @yperess
/subsys/tracing/ @nashif
/subsys/debug/asan_hacks.c @aescolar @daor-oti
/subsys/demand_paging/ @dcpleung @nashif
/subsys/emul/ @sjg20
/subsys/fb/ @jfischer-no
/subsys/fs/ @nashif
/subsys/fs/nvs/ @Laczen
/subsys/ipc/ @carlocaione
/subsys/ipc/ipc_service/*/*icmsg* @emob-nordic
/subsys/logging/ @nordic-krch
/subsys/logging/backends/log_backend_net.c @nordic-krch @rlubos @jukkar
/subsys/lorawan/ @Mani-Sadhasivam
/subsys/mgmt/ec_host_cmd/ @jettr
/subsys/mgmt/mcumgr/ @carlescufi @de-nordic @nordicjm
/subsys/mgmt/hawkbit/ @Navin-Sankar
/subsys/mgmt/updatehub/ @nandojve @otavio
/subsys/mgmt/osdp/ @sidcha
/subsys/modbus/ @jfischer-no
/subsys/net/buf.c @jhedberg @tbursztyka @rlubos @jukkar
/subsys/net/conn_mgr/ @rlubos @glarsennordic @jukkar
/subsys/net/ip/ @rlubos @tbursztyka @jukkar
/subsys/net/lib/ @rlubos @tbursztyka @jukkar
/subsys/net/lib/dns/ @rlubos @tbursztyka @cfriedt @jukkar
/subsys/net/lib/lwm2m/ @rlubos
/subsys/net/lib/config/ @rlubos @tbursztyka @jukkar
/subsys/net/lib/mqtt/ @rlubos
/subsys/net/lib/mqtt_sn/ @rlubos @BeckmaR
/subsys/net/lib/coap/ @rlubos
/subsys/net/lib/sockets/socketpair.c @cfriedt
/subsys/net/lib/sockets/ @rlubos @tbursztyka @jukkar
/subsys/net/lib/tls_credentials/ @rlubos
/subsys/net/l2/ @rlubos @tbursztyka @jukkar
/subsys/net/l2/ethernet/gptp/ @rlubos @jukkar @fgrandel
/subsys/net/l2/ieee802154/ @rlubos @tbursztyka @jukkar @fgrandel
/subsys/net/l2/canbus/ @alexanderwachter
/subsys/net/pkt_filter/ @npitre
/subsys/net/*/openthread/ @rlubos
/subsys/pm/ @nashif @ceolin
/subsys/random/ @dleach02
/subsys/shell/ @jakub-uC @nordic-krch
/subsys/shell/backends/shell_mqtt.c @ycsin
/subsys/sd/ @danieldegrasse
/subsys/sip_svc/ @maheshraotm
/subsys/task_wdt/ @martinjaeger
/subsys/testsuite/ @nashif
/subsys/testsuite/ztest/*/ztress* @nordic-krch
/subsys/timing/ @nashif @dcpleung
/subsys/usb/ @jfischer-no
/subsys/usb/usb_c/ @sambhurst
/tests/ @nashif
/tests/arch/arm/ @ioannisg @stephanosio
/tests/benchmarks/cmsis_dsp/ @stephanosio
/tests/boards/native_posix/ @aescolar @daor-oti
/tests/bluetooth/ @alwa-nordic @jhedberg @Vudentz @sjanc
/tests/bluetooth/audio/ @jhedberg @Vudentz @wopu-ot @Thalley
/tests/bluetooth/controller/ @cvinayak @thoh-ot @kruithofa @erbr-ot @sjanc @ppryga
/tests/bsim/bluetooth/ @alwa-nordic @jhedberg @Vudentz @wopu-ot
/tests/bsim/bluetooth/audio/ @jhedberg @Vudentz @wopu-ot @Thalley
/tests/bsim/bluetooth/mesh/ @jhedberg @Vudentz @wopu-ot @PavelVPV
/tests/bluetooth/mesh_shell/ @jhedberg @Vudentz @sjanc @PavelVPV
/tests/bluetooth/tester/ @alwa-nordic @jhedberg @Vudentz @sjanc
/tests/posix/ @cfriedt
/tests/crypto/ @ceolin
/tests/crypto/mbedtls/ @nashif @ceolin @d3zd3z
/tests/drivers/can/ @alexanderwachter @henrikbrixandersen
/tests/drivers/counter/ @nordic-krch
/tests/drivers/eeprom/ @henrikbrixandersen @sjg20
/tests/drivers/flash_simulator/ @de-nordic
/tests/drivers/gpio/ @mnkp
/tests/drivers/hwinfo/ @alexanderwachter
/tests/drivers/smbus/ @finikorg
/tests/drivers/spi/ @tbursztyka
/tests/drivers/uart/uart_async_api/ @anangl
/tests/drivers/w1/ @str4t0m
/tests/kernel/ @dcpleung @andyross @nashif
/tests/lib/ @nashif
/tests/lib/cmsis_dsp/ @stephanosio
/tests/net/ @rlubos @tbursztyka @jukkar
/tests/net/buf/ @jhedberg @tbursztyka @jukkar
/tests/net/conn_mgr_monitor/ @rlubos @glarsennordic @jukkar
/tests/net/conn_mgr_conn/ @rlubos @glarsennordic @jukkar
/tests/net/ieee802154/l2/ @rlubos @tbursztyka @jukkar @fgrandel
/tests/net/lib/ @rlubos @tbursztyka @jukkar
/tests/net/lib/http_header_fields/ @rlubos @tbursztyka @jukkar
/tests/net/lib/mqtt_packet/ @rlubos
/tests/net/lib/mqtt_sn_packet/ @rlubos @BeckmaR
/tests/net/lib/mqtt_sn_client/ @rlubos @BeckmaR
/tests/net/lib/coap/ @rlubos
/tests/net/npf/ @npitre
/tests/net/socket/socketpair/ @cfriedt
/tests/net/socket/ @rlubos @tbursztyka @jukkar
/tests/subsys/debug/coredump/ @dcpleung
/tests/subsys/fs/ @nashif @de-nordic
/tests/subsys/mgmt/mcumgr/ @de-nordic @nordicjm
/tests/subsys/sd/ @danieldegrasse
/tests/subsys/rtio/ @teburd
/tests/subsys/shell/ @jakub-uC @nordic-krch
# Get all docs reviewed
*.rst @nashif
/doc/kernel/ @andyross @nashif
*posix*.rst @aescolar @daor-oti

View File

@@ -2,138 +2,77 @@
## Our Pledge
We as members, contributors, and leaders pledge to make participation in our
community a harassment-free experience for everyone, regardless of age, body
size, visible or invisible disability, ethnicity, sex characteristics, gender
identity and expression, level of experience, education, socio-economic status,
nationality, personal appearance, race, caste, color, religion, or sexual
identity and orientation.
We pledge to act and interact in ways that contribute to an open, welcoming,
diverse, inclusive, and healthy community.
In the interest of fostering an open and welcoming environment, we as
contributors and maintainers pledge to making participation in our project and
our community a harassment-free experience for everyone, regardless of age, body
size, disability, ethnicity, sex characteristics, gender identity and expression,
level of experience, education, socio-economic status, nationality, personal
appearance, race, religion, or sexual identity and orientation.
## Our Standards
Examples of behavior that contributes to a positive environment for our
community include:
Examples of behavior that contributes to creating a positive environment
include:
* Demonstrating empathy and kindness toward other people
* Being respectful of differing opinions, viewpoints, and experiences
* Giving and gracefully accepting constructive feedback
* Accepting responsibility and apologizing to those affected by our mistakes,
and learning from the experience
* Focusing on what is best not just for us as individuals, but for the overall
community
* Using welcoming and inclusive language
* Being respectful of differing viewpoints and experiences
* Gracefully accepting constructive criticism
* Focusing on what is best for the community
* Showing empathy towards other community members
Examples of unacceptable behavior include:
Examples of unacceptable behavior by participants include:
* The use of sexualized language or imagery, and sexual attention or advances of
any kind
* Trolling, insulting or derogatory comments, and personal or political attacks
* The use of sexualized language or imagery and unwelcome sexual attention or
advances
* Trolling, insulting/derogatory comments, and personal or political attacks
* Public or private harassment
* Publishing others' private information, such as a physical or email address,
without their explicit permission
* Publishing others' private information, such as a physical or electronic
address, without explicit permission
* Other conduct which could reasonably be considered inappropriate in a
professional setting
professional setting
## Enforcement Responsibilities
## Our Responsibilities
Community leaders are responsible for clarifying and enforcing our standards of
acceptable behavior and will take appropriate and fair corrective action in
response to any behavior that they deem inappropriate, threatening, offensive,
or harmful.
Project maintainers are responsible for clarifying the standards of acceptable
behavior and are expected to take appropriate and fair corrective action in
response to any instances of unacceptable behavior.
Community leaders have the right and responsibility to remove, edit, or reject
comments, commits, code, wiki edits, issues, and other contributions that are
not aligned to this Code of Conduct, and will communicate reasons for moderation
decisions when appropriate.
Project maintainers have the right and responsibility to remove, edit, or
reject comments, commits, code, wiki edits, issues, and other contributions
that are not aligned to this Code of Conduct, or to ban temporarily or
permanently any contributor for other behaviors that they deem inappropriate,
threatening, offensive, or harmful.
## Scope
This Code of Conduct applies within all community spaces, and also applies when
an individual is officially representing the community in public spaces.
Examples of representing our community include using an official e-mail address,
posting via an official social media account, or acting as an appointed
representative at an online or offline event.
This Code of Conduct applies both within project spaces and in public spaces
when an individual is representing the project or its community. Examples of
representing a project or community include using an official project e-mail
address, posting via an official social media account, or acting as an appointed
representative at an online or offline event. Representation of a project may be
further defined and clarified by project maintainers.
## Enforcement
Instances of abusive, harassing, or otherwise unacceptable behavior may be
reported to the community leaders responsible for enforcement at
conduct@zephyrproject.org. Reports will be received by the Chair of the Zephyr
Governing Board, the Zephyr Project Director (Linux Foundation), and the Zephyr
Project Developer Advocate (Linux Foundation). You may refer to the [Governing
Board](https://zephyrproject.org/governing-board/) and [Linux Foundation
Staff](https://zephyrproject.org/staff/) web pages to identify who are the
individuals currently holding these positions.
All complaints will be reviewed and investigated promptly and fairly.
reported by contacting the project team at conduct@zephyrproject.org.
Reports will be received by Kate Stewart (Linux Foundation) and Amy Occhialino
(Intel). All complaints will be reviewed and investigated, and will result in a
response that is deemed necessary and appropriate to the circumstances. The
project team is obligated to maintain confidentiality with regard to the
reporter of an incident. Further details of specific enforcement policies may
be posted separately.
All community leaders are obligated to respect the privacy and security of the
reporter of any incident.
## Enforcement Guidelines
Community leaders will follow these Community Impact Guidelines in determining
the consequences for any action they deem in violation of this Code of Conduct:
### 1. Correction
**Community Impact**: Use of inappropriate language or other behavior deemed
unprofessional or unwelcome in the community.
**Consequence**: A private, written warning from community leaders, providing
clarity around the nature of the violation and an explanation of why the
behavior was inappropriate. A public apology may be requested.
### 2. Warning
**Community Impact**: A violation through a single incident or series of
actions.
**Consequence**: A warning with consequences for continued behavior. No
interaction with the people involved, including unsolicited interaction with
those enforcing the Code of Conduct, for a specified period of time. This
includes avoiding interactions in community spaces as well as external channels
like social media. Violating these terms may lead to a temporary or permanent
ban.
### 3. Temporary Ban
**Community Impact**: A serious violation of community standards, including
sustained inappropriate behavior.
**Consequence**: A temporary ban from any sort of interaction or public
communication with the community for a specified period of time. No public or
private interaction with the people involved, including unsolicited interaction
with those enforcing the Code of Conduct, is allowed during this period.
Violating these terms may lead to a permanent ban.
### 4. Permanent Ban
**Community Impact**: Demonstrating a pattern of violation of community
standards, including sustained inappropriate behavior, harassment of an
individual, or aggression toward or disparagement of classes of individuals.
**Consequence**: A permanent ban from any sort of public interaction within the
community.
Project maintainers who do not follow or enforce the Code of Conduct in good
faith may face temporary or permanent repercussions as determined by other
members of the project's leadership.
## Attribution
This Code of Conduct is adapted from the [Contributor Covenant][homepage],
version 2.1, available at
[https://www.contributor-covenant.org/version/2/1/code_of_conduct.html][v2.1].
The only changes made by The Zephyr Project to the original document were to
make explicit who the recipients of Code of Conduct incident reports are.
Community Impact Guidelines were inspired by
[Mozilla's code of conduct enforcement ladder][Mozilla CoC].
For answers to common questions about this code of conduct, see the FAQ at
[https://www.contributor-covenant.org/faq][FAQ]. Translations are available at
[https://www.contributor-covenant.org/translations][translations].
This Code of Conduct is adapted from the [Contributor Covenant][homepage], version 1.4,
available at https://www.contributor-covenant.org/version/1/4/code-of-conduct.html
[homepage]: https://www.contributor-covenant.org
[v2.1]: https://www.contributor-covenant.org/version/2/1/code_of_conduct.html
[Mozilla CoC]: https://github.com/mozilla/diversity
[FAQ]: https://www.contributor-covenant.org/faq
[translations]: https://www.contributor-covenant.org/translations
For answers to common questions about this code of conduct, see
https://www.contributor-covenant.org/faq

View File

@@ -141,17 +141,6 @@ config ROM_START_OFFSET
alignment requirements on most ARM targets, although some targets
may require smaller or larger values.
config ROM_END_OFFSET
hex "ROM end offset"
default 0
help
If non-zero, this option reduces the maximum size that the Zephyr image is allowed to
occupy, this is to allow for additional image storage which can be created and used by
other systems such as bootloaders (for MCUboot, this would include the image swap
fields and TLV storage at the end of the image).
If unsure, leave at the default value 0.
config LD_LINKER_SCRIPT_SUPPORTED
bool
default y
@@ -317,24 +306,6 @@ config LINKER_USE_RELAX
endmenu # "Linker Sections"
config LINKER_DEVNULL_SUPPORT
bool
default y if CPU_CORTEX_M || (RISCV && !64BIT)
config LINKER_DEVNULL_MEMORY
bool "Devnull region"
depends on LINKER_DEVNULL_SUPPORT
help
Devnull region is created. It is stripped from final binary but remains
in byproduct elf file.
config LINKER_DEVNULL_MEMORY_SIZE
int "Devnull region size"
depends on LINKER_DEVNULL_MEMORY
default 262144
help
Size can be adjusted so it fits all data placed in that region.
endmenu
menu "Compiler Options"
@@ -345,22 +316,10 @@ config CODING_GUIDELINE_CHECK
Use available compiler flags to check coding guideline rules during
the build.
config NATIVE_LIBC
bool
select FULL_LIBC_SUPPORTED
help
Zephyr will use the host system C library.
config NATIVE_LIBCPP
bool
select FULL_LIBCPP_SUPPORTED
help
Zephyr will use the host system C++ library
config NATIVE_BUILD
bool
select NATIVE_LIBC if EXTERNAL_LIBC
select NATIVE_LIBCPP if EXTERNAL_LIBCPP
select FULL_LIBC_SUPPORTED
select FULL_LIBCPP_SUPPORTED if CPP
help
Zephyr will be built targeting the host system for debug and
development purposes.
@@ -428,13 +387,6 @@ config NO_OPTIMIZATIONS
default stack sizes in order to avoid stack overflows.
endchoice
config LTO
bool "Link Time Optimization [EXPERIMENTAL]"
depends on (!(GEN_ISR_TABLES || GEN_IRQ_VECTOR_TABLE) || ISR_TABLES_LOCAL_DECLARATION) && !NATIVE_LIBRARY
select EXPERIMENTAL
help
This option enables Link Time Optimization.
config COMPILER_WARNINGS_AS_ERRORS
bool "Treat warnings as errors"
help
@@ -795,9 +747,7 @@ config BUILD_OUTPUT_STRIP_PATHS
config CHECK_INIT_PRIORITIES
bool "Build time initialization priorities check"
default y
# If we are building a native_simulator target, we can only check the init priorities
# if we are building the final output but we are not assembling several images together
depends on !(NATIVE_LIBRARY && (!BUILD_OUTPUT_EXE || NATIVE_SIMULATOR_EXTRA_IMAGE_PATHS != ""))
depends on !NATIVE_LIBRARY
depends on "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "armclang"
help
Check the build for initialization priority issues by comparing the
@@ -805,7 +755,16 @@ config CHECK_INIT_PRIORITIES
derived from the devicetree definition.
Fails the build on priority errors (dependent devices, inverted
priority).
priority), see CHECK_INIT_PRIORITIES_FAIL_ON_WARNING to fail on
warnings (dependent devices, same priority) as well.
config CHECK_INIT_PRIORITIES_FAIL_ON_WARNING
bool "Fail the build on priority check warnings"
depends on CHECK_INIT_PRIORITIES
help
Fail the build if the dependency check script identifies any pair of
devices depending on each other but initialized with the same
priority.
config EMIT_ALL_SYSCALLS
bool "Emit all possible syscalls in the tree"
@@ -879,7 +838,7 @@ config IS_BOOTLOADER
a separate Zephyr image payload.
config BOOTLOADER_SRAM_SIZE
int "SRAM reserved for bootloader [DEPRECATED]"
int "SRAM reserved for bootloader"
default 0
depends on !XIP || IS_BOOTLOADER
depends on ARM || XTENSA
@@ -890,20 +849,6 @@ config BOOTLOADER_SRAM_SIZE
- Zephyr is a !XIP image, which implicitly assumes existence of a
bootloader that loads the Zephyr !XIP image onto SRAM.
This option is deprecated, users should transition to using DTS to set this, if needed.
To be removed after Zephyr 3.7 release.
config BOOTLOADER_SRAM_SIZE_DEPRECATED
bool
default y
select DEPRECATED
depends on BOOTLOADER_SRAM_SIZE != 0
depends on !XIP || IS_BOOTLOADER
depends on ARM || XTENSA
help
Non-prompt symbol to indicate that the deprecated BOOTLOADER_SRAM_SIZE Kconfig has a
non-0 value. Please transition to using devicetree.
config BOOTLOADER_ESP_IDF
bool "ESP-IDF bootloader support"
depends on SOC_FAMILY_ESP32 && !BOOTLOADER_MCUBOOT && !MCUBOOT
@@ -955,3 +900,14 @@ config BOOTLOADER_BOSSA_ADAFRUIT_UF2
endchoice
endmenu
menu "Compatibility"
config COMPAT_INCLUDES
bool "Suppress warnings when using header shims"
default y
help
Suppress any warnings from the pre-processor when including
deprecated header files.
endmenu

File diff suppressed because it is too large Load Diff

View File

@@ -54,59 +54,39 @@ Resources
Here's a quick summary of resources to help you find your way around:
Getting Started
---------------
* **Help**: `Asking for Help Tips`_
* **Documentation**: http://docs.zephyrproject.org (`Getting Started Guide`_)
* **Source Code**: https://github.com/zephyrproject-rtos/zephyr is the main
repository; https://elixir.bootlin.com/zephyr/latest/source contains a
searchable index
* **Releases**: https://github.com/zephyrproject-rtos/zephyr/releases
* **Samples and example code**: see `Sample and Demo Code Examples`_
* **Mailing Lists**: users@lists.zephyrproject.org and
devel@lists.zephyrproject.org are the main user and developer mailing lists,
respectively. You can join the developer's list and search its archives at
`Zephyr Development mailing list`_. The other `Zephyr mailing list
subgroups`_ have their own archives and sign-up pages.
* **Nightly CI Build Status**: https://lists.zephyrproject.org/g/builds
The builds@lists.zephyrproject.org mailing list archives the CI nightly build results.
* **Chat**: Real-time chat happens in Zephyr's Discord Server. Use
this `Discord Invite`_ to register.
* **Contributing**: see the `Contribution Guide`_
* **Wiki**: `Zephyr GitHub wiki`_
* **Issues**: https://github.com/zephyrproject-rtos/zephyr/issues
* **Security Issues**: Email vulnerabilities@zephyrproject.org to report
security issues; also see our `Security`_ documentation. Security issues are
tracked separately at https://zephyrprojectsec.atlassian.net.
* **Zephyr Project Website**: https://zephyrproject.org
| 📖 `Zephyr Documentation`_
| 🚀 `Getting Started Guide`_
| 🙋🏽 `Tips when asking for help`_
| 💻 `Code samples`_
Code and Development
--------------------
| 🌐 `Source Code Repository`_
| 📦 `Releases`_
| 🤝 `Contribution Guide`_
Community and Support
---------------------
| 💬 `Discord Server`_ for real-time community discussions
| 📧 `User mailing list (users@lists.zephyrproject.org)`_
| 📧 `Developer mailing list (devel@lists.zephyrproject.org)`_
| 📬 `Other project mailing lists`_
| 📚 `Project Wiki`_
Issue Tracking and Security
---------------------------
| 🐛 `GitHub Issues`_
| 🔒 `Security documentation`_
| 🛡️ `Security Advisories Repository`_
| ⚠️ Report security vulnerabilities at vulnerabilities@zephyrproject.org
Additional Resources
--------------------
| 🌐 `Zephyr Project Website`_
| 📺 `Zephyr Tech Talks`_
.. _Zephyr Project Website: https://www.zephyrproject.org
.. _Discord Server: https://chat.zephyrproject.org
.. _supported boards: https://docs.zephyrproject.org/latest/boards/index.html
.. _Zephyr Documentation: https://docs.zephyrproject.org
.. _Introduction to Zephyr: https://docs.zephyrproject.org/latest/introduction/index.html
.. _Getting Started Guide: https://docs.zephyrproject.org/latest/develop/getting_started/index.html
.. _Contribution Guide: https://docs.zephyrproject.org/latest/contribute/index.html
.. _Source Code Repository: https://github.com/zephyrproject-rtos/zephyr
.. _GitHub Issues: https://github.com/zephyrproject-rtos/zephyr/issues
.. _Releases: https://github.com/zephyrproject-rtos/zephyr/releases
.. _Project Wiki: https://github.com/zephyrproject-rtos/zephyr/wiki
.. _User mailing list (users@lists.zephyrproject.org): https://lists.zephyrproject.org/g/users
.. _Developer mailing list (devel@lists.zephyrproject.org): https://lists.zephyrproject.org/g/devel
.. _Other project mailing lists: https://lists.zephyrproject.org/g/main/subgroups
.. _Code samples: https://docs.zephyrproject.org/latest/samples/index.html
.. _Security documentation: https://docs.zephyrproject.org/latest/security/index.html
.. _Security Advisories Repository: https://github.com/zephyrproject-rtos/zephyr/security
.. _Tips when asking for help: https://docs.zephyrproject.org/latest/develop/getting_started/index.html#asking-for-help
.. _Zephyr Tech Talks: https://www.zephyrproject.org/tech-talks
.. _Discord Invite: https://chat.zephyrproject.org
.. _supported boards: http://docs.zephyrproject.org/latest/boards/index.html
.. _Zephyr Documentation: http://docs.zephyrproject.org
.. _Introduction to Zephyr: http://docs.zephyrproject.org/latest/introduction/index.html
.. _Getting Started Guide: http://docs.zephyrproject.org/latest/develop/getting_started/index.html
.. _Contribution Guide: http://docs.zephyrproject.org/latest/contribute/index.html
.. _Zephyr GitHub wiki: https://github.com/zephyrproject-rtos/zephyr/wiki
.. _Zephyr Development mailing list: https://lists.zephyrproject.org/g/devel
.. _Zephyr mailing list subgroups: https://lists.zephyrproject.org/g/main/subgroups
.. _Sample and Demo Code Examples: http://docs.zephyrproject.org/latest/samples/index.html
.. _Security: http://docs.zephyrproject.org/latest/security/index.html
.. _Asking for Help Tips: https://docs.zephyrproject.org/latest/develop/getting_started/index.html#asking-for-help

View File

@@ -1 +0,0 @@
0.16.5

View File

@@ -1,5 +1,5 @@
VERSION_MAJOR = 3
VERSION_MINOR = 6
PATCHLEVEL = 0
VERSION_MINOR = 4
PATCHLEVEL = 99
VERSION_TWEAK = 0
EXTRAVERSION =

View File

@@ -19,9 +19,9 @@ source "$(ARCH_DIR)/$(ARCH)/Kconfig"
config ARC
bool
select ARCH_IS_SET
select HAS_DTS
imply XIP
select ARCH_HAS_THREAD_LOCAL_STORAGE
select ARCH_SUPPORTS_ROM_START
help
ARC architecture
@@ -29,6 +29,7 @@ config ARM
bool
select ARCH_IS_SET
select ARCH_SUPPORTS_COREDUMP if CPU_CORTEX_M
select HAS_DTS
# FIXME: current state of the code for all ARM requires this, but
# is really only necessary for Cortex-M with ARM MPU!
select GEN_PRIV_STACKS
@@ -41,6 +42,7 @@ config ARM64
bool
select ARCH_IS_SET
select 64BIT
select HAS_DTS
select ARCH_SUPPORTS_COREDUMP
select HAS_ARM_SMCCC
select ARCH_HAS_THREAD_LOCAL_STORAGE
@@ -55,12 +57,14 @@ config MIPS
bool
select ARCH_IS_SET
select ATOMIC_OPERATIONS_C
select HAS_DTS
help
MIPS architecture
config SPARC
bool
select ARCH_IS_SET
select HAS_DTS
select USE_SWITCH
select USE_SWITCH_SUPPORTED
select BIG_ENDIAN
@@ -75,8 +79,8 @@ config X86
bool
select ARCH_IS_SET
select ATOMIC_OPERATIONS_BUILTIN
select HAS_DTS
select ARCH_SUPPORTS_COREDUMP
select ARCH_SUPPORTS_ROM_START if !X86_64
select CPU_HAS_MMU
select ARCH_MEM_DOMAIN_DATA if USERSPACE && !X86_COMMON_PAGE_TABLE
select ARCH_MEM_DOMAIN_SYNCHRONOUS_API if USERSPACE
@@ -96,6 +100,7 @@ config NIOS2
bool
select ARCH_IS_SET
select ATOMIC_OPERATIONS_C
select HAS_DTS
imply XIP
select ARCH_HAS_TIMING_FUNCTIONS
help
@@ -104,8 +109,8 @@ config NIOS2
config RISCV
bool
select ARCH_IS_SET
select HAS_DTS
select ARCH_SUPPORTS_COREDUMP
select ARCH_SUPPORTS_ROM_START if !SOC_SERIES_ESP32C3
select ARCH_HAS_CODE_DATA_RELOCATION
select ARCH_HAS_THREAD_LOCAL_STORAGE
select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD
@@ -120,18 +125,20 @@ config RISCV
config XTENSA
bool
select ARCH_IS_SET
select HAS_DTS
select USE_SWITCH
select USE_SWITCH_SUPPORTED
select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD
select ARCH_HAS_CODE_DATA_RELOCATION
select ARCH_HAS_TIMING_FUNCTIONS
select ARCH_MEM_DOMAIN_DATA if USERSPACE
imply ATOMIC_OPERATIONS_ARCH
help
Xtensa architecture
config ARCH_POSIX
bool
select ARCH_IS_SET
select HAS_DTS
select ATOMIC_OPERATIONS_BUILTIN
select ARCH_HAS_CUSTOM_SWAP_TO_MAIN
select ARCH_HAS_CUSTOM_BUSY_WAIT
@@ -139,8 +146,6 @@ config ARCH_POSIX
select NATIVE_BUILD
select HAS_COVERAGE_SUPPORT
select BARRIER_OPERATIONS_BUILTIN
# POSIX arch based targets get their memory cleared on entry by the host OS
select SKIP_BSS_CLEAR
help
POSIX (native) architecture
@@ -391,29 +396,6 @@ config NOCACHE_MEMORY
menu "Interrupt Configuration"
config ISR_TABLES_LOCAL_DECLARATION_SUPPORTED
bool
default y
# Userspace is currently not supported
depends on !USERSPACE
# List of currently supported architectures
depends on ARM || ARM64
# List of currently supported toolchains
depends on "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "zephyr" || "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "gnuarmemb"
config ISR_TABLES_LOCAL_DECLARATION
bool "ISR tables created locally and placed by linker [EXPERIMENTAL]"
depends on ISR_TABLES_LOCAL_DECLARATION_SUPPORTED
select EXPERIMENTAL
help
Enable new scheme of interrupt tables generation.
This is totally different generator that would create tables entries locally
where the IRQ_CONNECT macro is called and then use the linker script to position it
in the right place in memory.
The most important advantage of such approach is that the generated interrupt tables
are LTO compatible.
The drawback is that the support on the architecture port is required.
config DYNAMIC_INTERRUPTS
bool "Installation of IRQs at runtime"
help
@@ -536,16 +518,6 @@ config IRQ_OFFLOAD_NESTED
synchronous nested interrupt on the current CPU. Not all
hardware is capable.
config EXCEPTION_DEBUG
bool "Unhandled exception debugging"
default y
depends on PRINTK || LOG
help
Install handlers for various CPU exception/trap vectors to
make debugging them easier, at a small expense in code size.
This prints out the specific exception vector and any associated
error codes.
config EXTRA_EXCEPTION_INFO
bool "Collect extra exception info"
depends on ARCH_HAS_EXTRA_EXCEPTION_INFO
@@ -625,9 +597,6 @@ config ARCH_SUPPORTS_COREDUMP
config ARCH_SUPPORTS_ARCH_HW_INIT
bool
config ARCH_SUPPORTS_ROM_START
bool
config ARCH_HAS_EXTRA_EXCEPTION_INFO
bool
@@ -688,11 +657,6 @@ config CPU_HAS_FPU
This option is enabled when the CPU has hardware floating point
unit.
config CPU_HAS_DSP
bool
help
This option is enabled when the CPU has hardware DSP unit.
config CPU_HAS_FPU_DOUBLE_PRECISION
bool
select CPU_HAS_FPU
@@ -730,13 +694,6 @@ config CPU_HAS_DCACHE
help
This hidden configuration should be selected when the CPU has a d-cache.
config CPU_CACHE_INCOHERENT
bool
help
This hidden configuration should be selected when the CPU has
incoherent cache. This applies to intra-CPU multiprocessing
incoherence and makes only sense when MP_NUM_CPUS > 1.
config CPU_HAS_ICACHE
bool
help
@@ -864,17 +821,6 @@ config CODE_DATA_RELOCATION
the target regions should be specified in CMakeLists.txt using
zephyr_code_relocate().
menu "DSP Options"
config DSP_SHARING
bool "DSP register sharing"
depends on CPU_HAS_DSP
help
This option enables preservation of the hardware DSP registers
across context switches to allow multiple threads to perform concurrent
DSP operations.
endmenu
menu "Floating Point Options"
config FPU
@@ -932,17 +878,6 @@ config ICACHE
help
This option enables the support for the instruction cache (i-cache).
config CACHE_DOUBLEMAP
bool "Cache double-mapping support"
depends on CPU_CACHE_INCOHERENT
default y
help
Double-mapping behavior where a pointer can be cheaply converted to
point to the same cached/uncached memory at different locations.
This applies to intra-CPU multiprocessing incoherence and makes only
sense when MP_NUM_CPUS > 1.
config CACHE_MANAGEMENT
bool "Cache management features"
depends on DCACHE || ICACHE
@@ -1045,10 +980,3 @@ config TOOLCHAIN_HAS_BUILTIN_FFS
default y if !(64BIT && RISCV)
help
Hidden option to signal that toolchain has __builtin_ffs*().
config ARCH_CPU_IDLE_CUSTOM
bool "Custom arch_cpu_idle implementation"
default n
help
This options allows applications to override the default arch idle implementation with
a custom one.

View File

@@ -253,17 +253,20 @@ config ARC_USE_UNALIGNED_MEM_ACCESS
to support unaligned memory access which is then disabled by default.
Enable unaligned access in hardware and make software to use it.
config ARC_CURRENT_THREAD_USE_NO_TLS
bool
select CURRENT_THREAD_USE_NO_TLS
default y if (RGF_NUM_BANKS > 1) || ("$(ZEPHYR_TOOLCHAIN_VARIANT)" = "arcmwdt")
config FAULT_DUMP
int "Fault dump level"
default 2
range 0 2
help
Disable current Thread Local Storage for ARC. For cores with more then one
RGF_NUM_BANKS the parameter is disabled by-default because banks syncronization
requires significant time, and it slows down performance.
ARCMWDT works with tls pointer in different way then GCC. Optimized access to
TLS pointer via _current variable does not provide significant advantages
in case of MetaWare.
Different levels for display information when a fault occurs.
2: The default. Display specific and verbose information. Consumes
the most memory (long strings).
1: Display general and short information. Consumes less memory
(short strings).
0: Off.
config GEN_ISR_TABLES
default y
@@ -373,6 +376,15 @@ config ARC_EXCEPTION_STACK_SIZE
endmenu
config ARC_EXCEPTION_DEBUG
bool "Unhandled exception debugging information"
default n
depends on PRINTK || LOG
help
Print human-readable information about exception vectors, cause codes,
and parameters, at a cost of code/data size for the human-readable
strings.
config ARC_EARLY_SOC_INIT
bool "Make early stage SoC-specific initialization"
help

View File

@@ -26,7 +26,7 @@ zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c)
zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)
zephyr_library_sources_ifdef(CONFIG_ARC_CONNECT arc_connect.c)
zephyr_library_sources_ifdef(CONFIG_ARC_CONNECT smp.c)
zephyr_library_sources_ifdef(CONFIG_ARC_CONNECT arc_smp.c)
zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c)

193
arch/arc/core/arc_smp.c Normal file
View File

@@ -0,0 +1,193 @@
/*
* Copyright (c) 2019 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief codes required for ARC multicore and Zephyr smp support
*
*/
#include <zephyr/device.h>
#include <zephyr/kernel.h>
#include <zephyr/kernel_structs.h>
#include <ksched.h>
#include <zephyr/init.h>
#include <zephyr/irq.h>
#include <arc_irq_offload.h>
volatile struct {
arch_cpustart_t fn;
void *arg;
} arc_cpu_init[CONFIG_MP_MAX_NUM_CPUS];
/*
* arc_cpu_wake_flag is used to sync up master core and slave cores
* Slave core will spin for arc_cpu_wake_flag until master core sets
* it to the core id of slave core. Then, slave core clears it to notify
* master core that it's waken
*
*/
volatile uint32_t arc_cpu_wake_flag;
volatile char *arc_cpu_sp;
/*
* _curr_cpu is used to record the struct of _cpu_t of each cpu.
* for efficient usage in assembly
*/
volatile _cpu_t *_curr_cpu[CONFIG_MP_MAX_NUM_CPUS];
/* Called from Zephyr initialization */
void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
arch_cpustart_t fn, void *arg)
{
_curr_cpu[cpu_num] = &(_kernel.cpus[cpu_num]);
arc_cpu_init[cpu_num].fn = fn;
arc_cpu_init[cpu_num].arg = arg;
/* set the initial sp of target sp through arc_cpu_sp
* arc_cpu_wake_flag will protect arc_cpu_sp that
* only one slave cpu can read it per time
*/
arc_cpu_sp = Z_KERNEL_STACK_BUFFER(stack) + sz;
arc_cpu_wake_flag = cpu_num;
/* wait slave cpu to start */
while (arc_cpu_wake_flag != 0U) {
;
}
}
#ifdef CONFIG_SMP
static void arc_connect_debug_mask_update(int cpu_num)
{
uint32_t core_mask = 1 << cpu_num;
/*
* MDB debugger may modify debug_select and debug_mask registers on start, so we can't
* rely on debug_select reset value.
*/
if (cpu_num != ARC_MP_PRIMARY_CPU_ID) {
core_mask |= z_arc_connect_debug_select_read();
}
z_arc_connect_debug_select_set(core_mask);
/* Debugger halts cores at all conditions:
* ARC_CONNECT_CMD_DEBUG_MASK_H: Core global halt.
* ARC_CONNECT_CMD_DEBUG_MASK_AH: Actionpoint halt.
* ARC_CONNECT_CMD_DEBUG_MASK_BH: Software breakpoint halt.
* ARC_CONNECT_CMD_DEBUG_MASK_SH: Self halt.
*/
z_arc_connect_debug_mask_set(core_mask, (ARC_CONNECT_CMD_DEBUG_MASK_SH
| ARC_CONNECT_CMD_DEBUG_MASK_BH | ARC_CONNECT_CMD_DEBUG_MASK_AH
| ARC_CONNECT_CMD_DEBUG_MASK_H));
}
#endif
void arc_core_private_intc_init(void);
/* the C entry of slave cores */
void z_arc_slave_start(int cpu_num)
{
arch_cpustart_t fn;
#ifdef CONFIG_SMP
struct arc_connect_bcr bcr;
bcr.val = z_arc_v2_aux_reg_read(_ARC_V2_CONNECT_BCR);
if (bcr.dbg) {
/* configure inter-core debug unit if available */
arc_connect_debug_mask_update(cpu_num);
}
z_irq_setup();
arc_core_private_intc_init();
arc_irq_offload_init_smp();
z_arc_connect_ici_clear();
z_irq_priority_set(DT_IRQN(DT_NODELABEL(ici)),
DT_IRQ(DT_NODELABEL(ici), priority), 0);
irq_enable(DT_IRQN(DT_NODELABEL(ici)));
#endif
/* call the function set by arch_start_cpu */
fn = arc_cpu_init[cpu_num].fn;
fn(arc_cpu_init[cpu_num].arg);
}
#ifdef CONFIG_SMP
static void sched_ipi_handler(const void *unused)
{
ARG_UNUSED(unused);
z_arc_connect_ici_clear();
z_sched_ipi();
}
/* arch implementation of sched_ipi */
void arch_sched_ipi(void)
{
uint32_t i;
/* broadcast sched_ipi request to other cores
* if the target is current core, hardware will ignore it
*/
unsigned int num_cpus = arch_num_cpus();
for (i = 0U; i < num_cpus; i++) {
z_arc_connect_ici_generate(i);
}
}
static int arc_smp_init(void)
{
struct arc_connect_bcr bcr;
/* necessary master core init */
_curr_cpu[0] = &(_kernel.cpus[0]);
bcr.val = z_arc_v2_aux_reg_read(_ARC_V2_CONNECT_BCR);
if (bcr.dbg) {
/* configure inter-core debug unit if available */
arc_connect_debug_mask_update(ARC_MP_PRIMARY_CPU_ID);
}
if (bcr.ipi) {
/* register ici interrupt, just need master core to register once */
z_arc_connect_ici_clear();
IRQ_CONNECT(DT_IRQN(DT_NODELABEL(ici)),
DT_IRQ(DT_NODELABEL(ici), priority),
sched_ipi_handler, NULL, 0);
irq_enable(DT_IRQN(DT_NODELABEL(ici)));
} else {
__ASSERT(0,
"ARC connect has no inter-core interrupt\n");
return -ENODEV;
}
if (bcr.gfrc) {
/* global free running count init */
z_arc_connect_gfrc_enable();
/* when all cores halt, gfrc halt */
z_arc_connect_gfrc_core_set((1 << arch_num_cpus()) - 1);
z_arc_connect_gfrc_clear();
} else {
__ASSERT(0,
"ARC connect has no global free running counter\n");
return -ENODEV;
}
return 0;
}
SYS_INIT(arc_smp_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif

View File

@@ -218,7 +218,8 @@ int arch_icache_flush_and_invd_range(void *addr, size_t size)
static int init_dcache(void)
{
sys_cache_data_enable();
arch_dcache_enable();
#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
init_dcache_line_size();

View File

@@ -3,8 +3,13 @@
# Copyright (c) 2022 Synopsys
# SPDX-License-Identifier: Apache-2.0
config ARC_HAS_DSP
bool
help
This option is enabled when the ARC CPU has hardware DSP unit.
menu "ARC DSP Options"
depends on CPU_HAS_DSP
depends on ARC_HAS_DSP
config ARC_DSP
bool "digital signal processing (DSP)"
@@ -17,7 +22,7 @@ config ARC_DSP_TURNED_OFF
help
This option disables DSP block via resetting DSP_CRTL register.
config DSP_SHARING
config ARC_DSP_SHARING
bool "DSP register sharing"
depends on ARC_DSP && MULTITHREADING
select ARC_HAS_ACCL_REGS
@@ -44,7 +49,7 @@ config ARC_XY_ENABLE
config ARC_AGU_SHARING
bool "ARC address generation unit register sharing"
depends on ARC_XY_ENABLE && MULTITHREADING
default y if DSP_SHARING
default y if ARC_DSP_SHARING
help
This option enables preservation of the hardware AGU registers
across context switches to allow multiple threads to perform concurrent

View File

@@ -9,7 +9,7 @@
* @brief ARCv2 DSP and AGU structure member offset definition file
*
*/
#ifdef CONFIG_DSP_SHARING
#ifdef CONFIG_ARC_DSP_SHARING
GEN_OFFSET_SYM(_callee_saved_stack_t, dsp_ctrl);
GEN_OFFSET_SYM(_callee_saved_stack_t, acc0_glo);
GEN_OFFSET_SYM(_callee_saved_stack_t, acc0_ghi);

View File

@@ -10,7 +10,7 @@
*
*/
.macro _save_dsp_regs
#ifdef CONFIG_DSP_SHARING
#ifdef CONFIG_ARC_DSP_SHARING
ld_s r13, [r2, ___thread_base_t_user_options_OFFSET]
bbit0 r13, K_DSP_IDX, dsp_skip_save
lr r13, [_ARC_V2_DSP_CTRL]
@@ -136,7 +136,7 @@ agu_skip_save :
.endm
.macro _load_dsp_regs
#ifdef CONFIG_DSP_SHARING
#ifdef CONFIG_ARC_DSP_SHARING
ld_s r13, [r2, ___thread_base_t_user_options_OFFSET]
bbit0 r13, K_DSP_IDX, dsp_skip_load
ld_s r13, [sp, ___callee_saved_stack_t_dsp_ctrl_OFFSET]

View File

@@ -17,38 +17,36 @@
#include <zephyr/arch/cpu.h>
#include <zephyr/logging/log.h>
#include <kernel_arch_data.h>
#include <zephyr/arch/arc/v2/exception.h>
#include <err_dump_handling.h>
#include <zephyr/arch/arc/v2/exc.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_EXCEPTION_DEBUG
#ifdef CONFIG_ARC_EXCEPTION_DEBUG
static void dump_arc_esf(const z_arch_esf_t *esf)
{
ARC_EXCEPTION_DUMP(" r0: 0x%" PRIxPTR " r1: 0x%" PRIxPTR " r2: 0x%" PRIxPTR
" r3: 0x%" PRIxPTR "", esf->r0, esf->r1, esf->r2, esf->r3);
ARC_EXCEPTION_DUMP(" r4: 0x%" PRIxPTR " r5: 0x%" PRIxPTR " r6: 0x%" PRIxPTR
" r7: 0x%" PRIxPTR "", esf->r4, esf->r5, esf->r6, esf->r7);
ARC_EXCEPTION_DUMP(" r8: 0x%" PRIxPTR " r9: 0x%" PRIxPTR " r10: 0x%" PRIxPTR
" r11: 0x%" PRIxPTR "", esf->r8, esf->r9, esf->r10, esf->r11);
ARC_EXCEPTION_DUMP("r12: 0x%" PRIxPTR " r13: 0x%" PRIxPTR " pc: 0x%" PRIxPTR "",
LOG_ERR(" r0: 0x%" PRIxPTR " r1: 0x%" PRIxPTR " r2: 0x%" PRIxPTR " r3: 0x%" PRIxPTR "",
esf->r0, esf->r1, esf->r2, esf->r3);
LOG_ERR(" r4: 0x%" PRIxPTR " r5: 0x%" PRIxPTR " r6: 0x%" PRIxPTR " r7: 0x%" PRIxPTR "",
esf->r4, esf->r5, esf->r6, esf->r7);
LOG_ERR(" r8: 0x%" PRIxPTR " r9: 0x%" PRIxPTR " r10: 0x%" PRIxPTR " r11: 0x%" PRIxPTR "",
esf->r8, esf->r9, esf->r10, esf->r11);
LOG_ERR("r12: 0x%" PRIxPTR " r13: 0x%" PRIxPTR " pc: 0x%" PRIxPTR "",
esf->r12, esf->r13, esf->pc);
ARC_EXCEPTION_DUMP(" blink: 0x%" PRIxPTR " status32: 0x%" PRIxPTR "",
esf->blink, esf->status32);
LOG_ERR(" blink: 0x%" PRIxPTR " status32: 0x%" PRIxPTR "", esf->blink, esf->status32);
#ifdef CONFIG_ARC_HAS_ZOL
ARC_EXCEPTION_DUMP("lp_end: 0x%" PRIxPTR " lp_start: 0x%" PRIxPTR
" lp_count: 0x%" PRIxPTR "", esf->lp_end, esf->lp_start, esf->lp_count);
LOG_ERR("lp_end: 0x%" PRIxPTR " lp_start: 0x%" PRIxPTR " lp_count: 0x%" PRIxPTR "",
esf->lp_end, esf->lp_start, esf->lp_count);
#endif /* CONFIG_ARC_HAS_ZOL */
}
#endif
void z_arc_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
#ifdef CONFIG_EXCEPTION_DEBUG
#ifdef CONFIG_ARC_EXCEPTION_DEBUG
if (esf != NULL) {
dump_arc_esf(esf);
}
#endif /* CONFIG_EXCEPTION_DEBUG */
#endif /* CONFIG_ARC_EXCEPTION_DEBUG */
z_fatal_error(reason, esf);
}

View File

@@ -20,8 +20,6 @@
#include <zephyr/kernel_structs.h>
#include <zephyr/arch/common/exc_handle.h>
#include <zephyr/logging/log.h>
#include <err_dump_handling.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_USERSPACE
@@ -71,7 +69,7 @@ static bool z_check_thread_stack_fail(const uint32_t fault_addr, uint32_t sp)
* "guard" installed in this case, instead what's
* happening is that the stack pointer is crashing
* into the privilege mode stack buffer which
* immediately precedes it.
* immediately precededs it.
*/
guard_end = thread->stack_info.start;
guard_start = (uint32_t)thread->stack_obj;
@@ -106,7 +104,7 @@ static bool z_check_thread_stack_fail(const uint32_t fault_addr, uint32_t sp)
}
#endif
#ifdef CONFIG_EXCEPTION_DEBUG
#ifdef CONFIG_ARC_EXCEPTION_DEBUG
/* For EV_ProtV, the numbering/semantics of the parameter are consistent across
* several codes, although not all combination will be reported.
*
@@ -139,32 +137,32 @@ static void dump_protv_exception(uint32_t cause, uint32_t parameter)
{
switch (cause) {
case 0x0:
ARC_EXCEPTION_DUMP("Instruction fetch violation (%s)",
LOG_ERR("Instruction fetch violation (%s)",
get_protv_access_err(parameter));
break;
case 0x1:
ARC_EXCEPTION_DUMP("Memory read protection violation (%s)",
LOG_ERR("Memory read protection violation (%s)",
get_protv_access_err(parameter));
break;
case 0x2:
ARC_EXCEPTION_DUMP("Memory write protection violation (%s)",
LOG_ERR("Memory write protection violation (%s)",
get_protv_access_err(parameter));
break;
case 0x3:
ARC_EXCEPTION_DUMP("Memory read-modify-write violation (%s)",
LOG_ERR("Memory read-modify-write violation (%s)",
get_protv_access_err(parameter));
break;
case 0x10:
ARC_EXCEPTION_DUMP("Normal vector table in secure memory");
LOG_ERR("Normal vector table in secure memory");
break;
case 0x11:
ARC_EXCEPTION_DUMP("NS handler code located in S memory");
LOG_ERR("NS handler code located in S memory");
break;
case 0x12:
ARC_EXCEPTION_DUMP("NSC Table Range Violation");
LOG_ERR("NSC Table Range Violation");
break;
default:
ARC_EXCEPTION_DUMP("unknown");
LOG_ERR("unknown");
break;
}
}
@@ -173,46 +171,46 @@ static void dump_machine_check_exception(uint32_t cause, uint32_t parameter)
{
switch (cause) {
case 0x0:
ARC_EXCEPTION_DUMP("double fault");
LOG_ERR("double fault");
break;
case 0x1:
ARC_EXCEPTION_DUMP("overlapping TLB entries");
LOG_ERR("overlapping TLB entries");
break;
case 0x2:
ARC_EXCEPTION_DUMP("fatal TLB error");
LOG_ERR("fatal TLB error");
break;
case 0x3:
ARC_EXCEPTION_DUMP("fatal cache error");
LOG_ERR("fatal cache error");
break;
case 0x4:
ARC_EXCEPTION_DUMP("internal memory error on instruction fetch");
LOG_ERR("internal memory error on instruction fetch");
break;
case 0x5:
ARC_EXCEPTION_DUMP("internal memory error on data fetch");
LOG_ERR("internal memory error on data fetch");
break;
case 0x6:
ARC_EXCEPTION_DUMP("illegal overlapping MPU entries");
LOG_ERR("illegal overlapping MPU entries");
if (parameter == 0x1) {
ARC_EXCEPTION_DUMP(" - jump and branch target");
LOG_ERR(" - jump and branch target");
}
break;
case 0x10:
ARC_EXCEPTION_DUMP("secure vector table not located in secure memory");
LOG_ERR("secure vector table not located in secure memory");
break;
case 0x11:
ARC_EXCEPTION_DUMP("NSC jump table not located in secure memory");
LOG_ERR("NSC jump table not located in secure memory");
break;
case 0x12:
ARC_EXCEPTION_DUMP("secure handler code not located in secure memory");
LOG_ERR("secure handler code not located in secure memory");
break;
case 0x13:
ARC_EXCEPTION_DUMP("NSC target address not located in secure memory");
LOG_ERR("NSC target address not located in secure memory");
break;
case 0x80:
ARC_EXCEPTION_DUMP("uncorrectable ECC or parity error in vector memory");
LOG_ERR("uncorrectable ECC or parity error in vector memory");
break;
default:
ARC_EXCEPTION_DUMP("unknown");
LOG_ERR("unknown");
break;
}
}
@@ -221,54 +219,54 @@ static void dump_privilege_exception(uint32_t cause, uint32_t parameter)
{
switch (cause) {
case 0x0:
ARC_EXCEPTION_DUMP("Privilege violation");
LOG_ERR("Privilege violation");
break;
case 0x1:
ARC_EXCEPTION_DUMP("disabled extension");
LOG_ERR("disabled extension");
break;
case 0x2:
ARC_EXCEPTION_DUMP("action point hit");
LOG_ERR("action point hit");
break;
case 0x10:
switch (parameter) {
case 0x1:
ARC_EXCEPTION_DUMP("N to S return using incorrect return mechanism");
LOG_ERR("N to S return using incorrect return mechanism");
break;
case 0x2:
ARC_EXCEPTION_DUMP("N to S return with incorrect operating mode");
LOG_ERR("N to S return with incorrect operating mode");
break;
case 0x3:
ARC_EXCEPTION_DUMP("IRQ/exception return fetch from wrong mode");
LOG_ERR("IRQ/exception return fetch from wrong mode");
break;
case 0x4:
ARC_EXCEPTION_DUMP("attempt to halt secure processor in NS mode");
LOG_ERR("attempt to halt secure processor in NS mode");
break;
case 0x20:
ARC_EXCEPTION_DUMP("attempt to access secure resource from normal mode");
LOG_ERR("attempt to access secure resource from normal mode");
break;
case 0x40:
ARC_EXCEPTION_DUMP("SID violation on resource access (APEX/UAUX/key NVM)");
LOG_ERR("SID violation on resource access (APEX/UAUX/key NVM)");
break;
default:
ARC_EXCEPTION_DUMP("unknown");
LOG_ERR("unknown");
break;
}
break;
case 0x13:
switch (parameter) {
case 0x20:
ARC_EXCEPTION_DUMP("attempt to access secure APEX feature from NS mode");
LOG_ERR("attempt to access secure APEX feature from NS mode");
break;
case 0x40:
ARC_EXCEPTION_DUMP("SID violation on access to APEX feature");
LOG_ERR("SID violation on access to APEX feature");
break;
default:
ARC_EXCEPTION_DUMP("unknown");
LOG_ERR("unknown");
break;
}
break;
default:
ARC_EXCEPTION_DUMP("unknown");
LOG_ERR("unknown");
break;
}
}
@@ -276,7 +274,7 @@ static void dump_privilege_exception(uint32_t cause, uint32_t parameter)
static void dump_exception_info(uint32_t vector, uint32_t cause, uint32_t parameter)
{
if (vector >= 0x10 && vector <= 0xFF) {
ARC_EXCEPTION_DUMP("interrupt %u", vector);
LOG_ERR("interrupt %u", vector);
return;
}
@@ -285,59 +283,59 @@ static void dump_exception_info(uint32_t vector, uint32_t cause, uint32_t parame
*/
switch (vector) {
case ARC_EV_RESET:
ARC_EXCEPTION_DUMP("Reset");
LOG_ERR("Reset");
break;
case ARC_EV_MEM_ERROR:
ARC_EXCEPTION_DUMP("Memory Error");
LOG_ERR("Memory Error");
break;
case ARC_EV_INS_ERROR:
ARC_EXCEPTION_DUMP("Instruction Error");
LOG_ERR("Instruction Error");
break;
case ARC_EV_MACHINE_CHECK:
ARC_EXCEPTION_DUMP("EV_MachineCheck");
LOG_ERR("EV_MachineCheck");
dump_machine_check_exception(cause, parameter);
break;
case ARC_EV_TLB_MISS_I:
ARC_EXCEPTION_DUMP("EV_TLBMissI");
LOG_ERR("EV_TLBMissI");
break;
case ARC_EV_TLB_MISS_D:
ARC_EXCEPTION_DUMP("EV_TLBMissD");
LOG_ERR("EV_TLBMissD");
break;
case ARC_EV_PROT_V:
ARC_EXCEPTION_DUMP("EV_ProtV");
LOG_ERR("EV_ProtV");
dump_protv_exception(cause, parameter);
break;
case ARC_EV_PRIVILEGE_V:
ARC_EXCEPTION_DUMP("EV_PrivilegeV");
LOG_ERR("EV_PrivilegeV");
dump_privilege_exception(cause, parameter);
break;
case ARC_EV_SWI:
ARC_EXCEPTION_DUMP("EV_SWI");
LOG_ERR("EV_SWI");
break;
case ARC_EV_TRAP:
ARC_EXCEPTION_DUMP("EV_Trap");
LOG_ERR("EV_Trap");
break;
case ARC_EV_EXTENSION:
ARC_EXCEPTION_DUMP("EV_Extension");
LOG_ERR("EV_Extension");
break;
case ARC_EV_DIV_ZERO:
ARC_EXCEPTION_DUMP("EV_DivZero");
LOG_ERR("EV_DivZero");
break;
case ARC_EV_DC_ERROR:
ARC_EXCEPTION_DUMP("EV_DCError");
LOG_ERR("EV_DCError");
break;
case ARC_EV_MISALIGNED:
ARC_EXCEPTION_DUMP("EV_Misaligned");
LOG_ERR("EV_Misaligned");
break;
case ARC_EV_VEC_UNIT:
ARC_EXCEPTION_DUMP("EV_VecUnit");
LOG_ERR("EV_VecUnit");
break;
default:
ARC_EXCEPTION_DUMP("unknown");
LOG_ERR("unknown");
break;
}
}
#endif /* CONFIG_EXCEPTION_DEBUG */
#endif /* CONFIG_ARC_EXCEPTION_DEBUG */
/*
* @brief Fault handler
@@ -386,11 +384,10 @@ void _Fault(z_arch_esf_t *esf, uint32_t old_sp)
return;
}
#ifdef CONFIG_EXCEPTION_DEBUG
ARC_EXCEPTION_DUMP("***** Exception vector: 0x%x, cause code: 0x%x, parameter 0x%x",
LOG_ERR("***** Exception vector: 0x%x, cause code: 0x%x, parameter 0x%x",
vector, cause, parameter);
ARC_EXCEPTION_DUMP("Address 0x%x", exc_addr);
LOG_ERR("Address 0x%x", exc_addr);
#ifdef CONFIG_ARC_EXCEPTION_DEBUG
dump_exception_info(vector, cause, parameter);
#endif

View File

@@ -26,7 +26,7 @@
#include <kernel_arch_data.h>
#include <gen_offset.h>
#include <kernel_offsets.h>
#ifdef CONFIG_DSP_SHARING
#ifdef CONFIG_ARC_DSP_SHARING
#include "../dsp/dsp_offsets.c"
#endif

View File

@@ -20,10 +20,10 @@
#include <zephyr/toolchain.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/arch/arc/v2/aux_regs.h>
#include <zephyr/arch/arc/cluster.h>
#include <zephyr/kernel_structs.h>
#include <kernel_internal.h>
/* XXX - keep for future use in full-featured cache APIs */
#if 0
/**
@@ -67,51 +67,6 @@ static void invalidate_dcache(void)
}
#endif
#ifdef CONFIG_ISA_ARCV3
/* NOTE: it will be called from early C code - we must NOT use global / static variables in it! */
static void arc_cluster_scm_enable(void)
{
unsigned int cluster_version;
/* Check that we have cluster and its version is supported */
cluster_version = z_arc_v2_aux_reg_read(_ARC_REG_CLN_BCR) & _ARC_CLN_BCR_VER_MAJOR_MASK;
if (cluster_version < _ARC_REG_CLN_BCR_VER_MAJOR_ARCV3_MIN) {
return;
}
/* Check that we have shared cache in cluster */
if (!(z_arc_v2_aux_reg_read(_ARC_CLNR_BCR_0) & _ARC_CLNR_BCR_0_HAS_SCM)) {
return;
}
/* Disable SCM, just in case. */
arc_cln_write_reg_nolock(ARC_CLN_CACHE_STATUS, 0);
/* Invalidate SCM before enabling. */
arc_cln_write_reg_nolock(ARC_CLN_CACHE_CMD,
ARC_CLN_CACHE_CMD_OP_REG_INV | ARC_CLN_CACHE_CMD_INCR);
while (arc_cln_read_reg_nolock(ARC_CLN_CACHE_STATUS) & ARC_CLN_CACHE_STATUS_BUSY)
;
arc_cln_write_reg_nolock(ARC_CLN_CACHE_STATUS, ARC_CLN_CACHE_STATUS_EN);
}
#endif /* CONFIG_ISA_ARCV3 */
#ifdef __CCAC__
extern char __device_states_start[];
extern char __device_states_end[];
/**
* @brief Clear device_states section
*
* This routine clears the device_states section,
* as MW compiler marks the section with NOLOAD flag.
*/
static void dev_state_zero(void)
{
z_early_memset(__device_states_start, 0, __device_states_end - __device_states_start);
}
#endif
extern FUNC_NORETURN void z_cstart(void);
/**
* @brief Prepare to and run C code
@@ -119,16 +74,9 @@ extern FUNC_NORETURN void z_cstart(void);
* This routine prepares for the execution of and runs C code.
*/
void z_prep_c(void)
void _PrepC(void)
{
#ifdef CONFIG_ISA_ARCV3
arc_cluster_scm_enable();
#endif
z_bss_zero();
#ifdef __CCAC__
dev_state_zero();
#endif
z_data_copy();
z_cstart();
CODE_UNREACHABLE;

View File

@@ -40,7 +40,7 @@ GTEXT(__start)
*
* Locking interrupts prevents anything from interrupting the CPU.
*
* When these steps are completed, jump to z_prep_c(), which will finish setting
* When these steps are completed, jump to _PrepC(), which will finish setting
* up the system for running C code.
*/
@@ -151,16 +151,6 @@ done_mpu_regions_reset:
#endif
#endif
#ifdef CONFIG_ISA_ARCV3
/* Enable HW prefetcher if exist */
lr r0, [_ARC_HW_PF_BUILD]
breq r0, 0, hw_pf_setup_done
lr r1, [_ARC_HW_PF_CTRL]
or r1, r1, _ARC_HW_PF_CTRL_ENABLE
sr r1, [_ARC_HW_PF_CTRL]
hw_pf_setup_done:
#endif
#if defined(CONFIG_SMP) || CONFIG_MP_MAX_NUM_CPUS > 1
_get_cpu_id r0
breq r0, 0, _master_core_startup
@@ -184,7 +174,7 @@ _slave_core_wait:
jl z_arc_firq_stack_set
pop r0
#endif
j arch_secondary_cpu_init
j z_arc_slave_start
_master_core_startup:
#endif
@@ -212,4 +202,4 @@ _master_core_startup:
jl z_arc_firq_stack_set
#endif
j z_prep_c
j _PrepC

View File

@@ -1,192 +0,0 @@
/*
* Copyright (c) 2019 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief codes required for ARC multicore and Zephyr smp support
*
*/
#include <zephyr/device.h>
#include <zephyr/kernel.h>
#include <zephyr/kernel_structs.h>
#include <ksched.h>
#include <zephyr/init.h>
#include <zephyr/irq.h>
#include <arc_irq_offload.h>
volatile struct {
arch_cpustart_t fn;
void *arg;
} arc_cpu_init[CONFIG_MP_MAX_NUM_CPUS];
/*
* arc_cpu_wake_flag is used to sync up master core and slave cores
* Slave core will spin for arc_cpu_wake_flag until master core sets
* it to the core id of slave core. Then, slave core clears it to notify
* master core that it's waken
*
*/
volatile uint32_t arc_cpu_wake_flag;
volatile char *arc_cpu_sp;
/*
* _curr_cpu is used to record the struct of _cpu_t of each cpu.
* for efficient usage in assembly
*/
volatile _cpu_t *_curr_cpu[CONFIG_MP_MAX_NUM_CPUS];
/* Called from Zephyr initialization */
void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
arch_cpustart_t fn, void *arg)
{
_curr_cpu[cpu_num] = &(_kernel.cpus[cpu_num]);
arc_cpu_init[cpu_num].fn = fn;
arc_cpu_init[cpu_num].arg = arg;
/* set the initial sp of target sp through arc_cpu_sp
* arc_cpu_wake_flag will protect arc_cpu_sp that
* only one slave cpu can read it per time
*/
arc_cpu_sp = Z_KERNEL_STACK_BUFFER(stack) + sz;
arc_cpu_wake_flag = cpu_num;
/* wait slave cpu to start */
while (arc_cpu_wake_flag != 0U) {
;
}
}
#ifdef CONFIG_SMP
static void arc_connect_debug_mask_update(int cpu_num)
{
uint32_t core_mask = 1 << cpu_num;
/*
* MDB debugger may modify debug_select and debug_mask registers on start, so we can't
* rely on debug_select reset value.
*/
if (cpu_num != ARC_MP_PRIMARY_CPU_ID) {
core_mask |= z_arc_connect_debug_select_read();
}
z_arc_connect_debug_select_set(core_mask);
/* Debugger halts cores at all conditions:
* ARC_CONNECT_CMD_DEBUG_MASK_H: Core global halt.
* ARC_CONNECT_CMD_DEBUG_MASK_AH: Actionpoint halt.
* ARC_CONNECT_CMD_DEBUG_MASK_BH: Software breakpoint halt.
* ARC_CONNECT_CMD_DEBUG_MASK_SH: Self halt.
*/
z_arc_connect_debug_mask_set(core_mask, (ARC_CONNECT_CMD_DEBUG_MASK_SH
| ARC_CONNECT_CMD_DEBUG_MASK_BH | ARC_CONNECT_CMD_DEBUG_MASK_AH
| ARC_CONNECT_CMD_DEBUG_MASK_H));
}
#endif
void arc_core_private_intc_init(void);
/* the C entry of slave cores */
void arch_secondary_cpu_init(int cpu_num)
{
arch_cpustart_t fn;
#ifdef CONFIG_SMP
struct arc_connect_bcr bcr;
bcr.val = z_arc_v2_aux_reg_read(_ARC_V2_CONNECT_BCR);
if (bcr.dbg) {
/* configure inter-core debug unit if available */
arc_connect_debug_mask_update(cpu_num);
}
z_irq_setup();
arc_core_private_intc_init();
arc_irq_offload_init_smp();
z_arc_connect_ici_clear();
z_irq_priority_set(DT_IRQN(DT_NODELABEL(ici)),
DT_IRQ(DT_NODELABEL(ici), priority), 0);
irq_enable(DT_IRQN(DT_NODELABEL(ici)));
#endif
/* call the function set by arch_start_cpu */
fn = arc_cpu_init[cpu_num].fn;
fn(arc_cpu_init[cpu_num].arg);
}
#ifdef CONFIG_SMP
static void sched_ipi_handler(const void *unused)
{
ARG_UNUSED(unused);
z_arc_connect_ici_clear();
z_sched_ipi();
}
/* arch implementation of sched_ipi */
void arch_sched_ipi(void)
{
uint32_t i;
/* broadcast sched_ipi request to other cores
* if the target is current core, hardware will ignore it
*/
unsigned int num_cpus = arch_num_cpus();
for (i = 0U; i < num_cpus; i++) {
z_arc_connect_ici_generate(i);
}
}
int arch_smp_init(void)
{
struct arc_connect_bcr bcr;
/* necessary master core init */
_curr_cpu[0] = &(_kernel.cpus[0]);
bcr.val = z_arc_v2_aux_reg_read(_ARC_V2_CONNECT_BCR);
if (bcr.dbg) {
/* configure inter-core debug unit if available */
arc_connect_debug_mask_update(ARC_MP_PRIMARY_CPU_ID);
}
if (bcr.ipi) {
/* register ici interrupt, just need master core to register once */
z_arc_connect_ici_clear();
IRQ_CONNECT(DT_IRQN(DT_NODELABEL(ici)),
DT_IRQ(DT_NODELABEL(ici), priority),
sched_ipi_handler, NULL, 0);
irq_enable(DT_IRQN(DT_NODELABEL(ici)));
} else {
__ASSERT(0,
"ARC connect has no inter-core interrupt\n");
return -ENODEV;
}
if (bcr.gfrc) {
/* global free running count init */
z_arc_connect_gfrc_enable();
/* when all cores halt, gfrc halt */
z_arc_connect_gfrc_core_set((1 << arch_num_cpus()) - 1);
z_arc_connect_gfrc_clear();
} else {
__ASSERT(0,
"ARC connect has no global free running counter\n");
return -ENODEV;
}
return 0;
}
SYS_INIT(arch_smp_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif

View File

@@ -19,7 +19,7 @@
#include <zephyr/arch/arc/v2/mpu/arc_core_mpu.h>
#endif
#if defined(CONFIG_ARC_DSP) && defined(CONFIG_DSP_SHARING)
#if defined(CONFIG_ARC_DSP) && defined(CONFIG_ARC_DSP_SHARING)
#include <zephyr/arch/arc/v2/dsp/arc_dsp.h>
static struct k_spinlock lock;
#endif
@@ -297,7 +297,7 @@ FUNC_NORETURN void z_arc_switch_to_main_no_multithreading(k_thread_entry_t main_
}
#endif /* !CONFIG_MULTITHREADING */
#if defined(CONFIG_ARC_DSP) && defined(CONFIG_DSP_SHARING)
#if defined(CONFIG_ARC_DSP) && defined(CONFIG_ARC_DSP_SHARING)
void arc_dsp_disable(struct k_thread *thread, unsigned int options)
{
/* Ensure a preemptive context switch does not occur */
@@ -319,4 +319,4 @@ void arc_dsp_enable(struct k_thread *thread, unsigned int options)
k_spin_unlock(&lock, key);
}
#endif /* CONFIG_ARC_DSP && CONFIG_DSP_SHARING */
#endif /* CONFIG_ARC_DSP && CONFIG_ARC_DSP_SHARING */

View File

@@ -1,16 +0,0 @@
/*
* Copyright (c) 2023 Synopsys.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_ARCH_ARC_INCLUDE_ERR_DUMP_HANDLING_H_
#define ZEPHYR_ARCH_ARC_INCLUDE_ERR_DUMP_HANDLING_H_
#if defined CONFIG_LOG
#define ARC_EXCEPTION_DUMP(...) LOG_ERR(__VA_ARGS__)
#else
#define ARC_EXCEPTION_DUMP(format, ...) printk(format "\n", ##__VA_ARGS__)
#endif
#endif /* ZEPHYR_ARCH_ARC_INCLUDE_ERR_DUMP_HANDLING_H_ */

View File

@@ -160,7 +160,7 @@ struct _callee_saved_stack {
#endif
#endif
#ifdef CONFIG_DSP_SHARING
#ifdef CONFIG_ARC_DSP_SHARING
#ifdef CONFIG_ARC_DSP_BFLY_SHARING
uintptr_t dsp_fft_ctrl;
uintptr_t dsp_bfly0;

View File

@@ -46,7 +46,7 @@ GTEXT(__ev_div_zero)
GTEXT(__ev_dc_error)
GTEXT(__ev_maligned)
GTEXT(z_prep_c)
GTEXT(_PrepC)
GTEXT(_isr_wrapper)
#else

View File

@@ -16,23 +16,23 @@ config CPU_CORTEX
config ARM_CUSTOM_INTERRUPT_CONTROLLER
bool
depends on !CPU_CORTEX_M
help
This option indicates that the ARM CPU is connected to a custom (i.e.
non-GIC or NVIC) interrupt controller.
non-GIC) interrupt controller.
A number of Cortex-A and Cortex-R cores (Cortex-A5, Cortex-R4/5, ...)
allow interfacing to a custom external interrupt controller and this
option must be selected when such cores are connected to an interrupt
controller that is not the ARM Generic Interrupt Controller (GIC) or
the Cortex-M ARM Nested Vectored Interrupt Controller (NVIC).
controller that is not the ARM Generic Interrupt Controller (GIC).
When this option is selected, the architecture interrupt control
functions are mapped to the SoC interrupt control interface, which is
implemented at the SoC level.
N.B. Since all Cortex-M cores have a NVIC, if this option is selected it
is assumed that the custom interrupt control interface implementation
assumes responsibility for handling the NVIC.
N.B. This option is only applicable to the Cortex-A and Cortex-R
family cores. The Cortex-M family cores are always equipped with
the ARM Nested Vectored Interrupt Controller (NVIC).
config CODE_DATA_RELOCATION_SRAM
bool "Relocate code/data sections to SRAM"
@@ -53,16 +53,6 @@ config ARM_ON_ENTER_CPU_IDLE_HOOK
If needed, this hook can be used to prevent the CPU from actually
entering sleep by skipping the WFE/WFI instruction.
config ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK
bool
help
Enables a hook (z_arm_on_enter_cpu_idle_prepare()) that is called when
the CPU is made idle (by k_cpu_idle() or k_cpu_atomic_idle()).
If needed, this hook can prepare data to upcoming call to
z_arm_on_enter_cpu_idle(). The z_arm_on_enter_cpu_idle_prepare differs
from z_arm_on_enter_cpu_idle because it is called before interrupts are
disabled.
config ARM_ON_EXIT_CPU_IDLE
bool
help

View File

@@ -13,8 +13,6 @@ zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c)
zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c)
zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)
zephyr_library_sources_ifdef(CONFIG_ARM_ZIMAGE_HEADER header.S)
zephyr_library_sources_ifdef(CONFIG_LLEXT elf.c)
zephyr_library_sources_ifdef(CONFIG_GDBSTUB gdbstub.c)
add_subdirectory_ifdef(CONFIG_CPU_CORTEX_M cortex_m)
add_subdirectory_ifdef(CONFIG_CPU_CORTEX_M_HAS_CMSE cortex_m/cmse)
@@ -35,11 +33,3 @@ else()
zephyr_linker_sources(ROM_START SORT_KEY 0x0vectors vector_table.ld)
zephyr_linker_sources(ROM_START SORT_KEY 0x1vectors cortex_m/vector_table_pad.ld)
endif()
if(CONFIG_GEN_SW_ISR_TABLE)
if(CONFIG_DYNAMIC_INTERRUPTS)
zephyr_linker_sources(RWDATA swi_tables.ld)
else()
zephyr_linker_sources(RODATA swi_tables.ld)
endif()
endif()

View File

@@ -23,7 +23,6 @@ config CPU_CORTEX_M
select ARCH_SUPPORTS_ARCH_HW_INIT
select ARCH_HAS_SUSPEND_TO_RAM
select ARCH_HAS_CODE_DATA_RELOCATION
select ARCH_SUPPORTS_ROM_START
imply XIP
help
This option signifies the use of a CPU of the Cortex-M family.
@@ -34,12 +33,10 @@ config CPU_AARCH32_CORTEX_R
select HAS_CMSIS_CORE
select ARCH_HAS_NESTED_EXCEPTION_DETECTION
select HAS_FLASH_LOAD_OFFSET
select ARCH_HAS_USERSPACE if ARM_MPU && !USE_SWITCH
select ARCH_HAS_EXTRA_EXCEPTION_INFO if !USE_SWITCH
select ARCH_HAS_USERSPACE if ARM_MPU
select ARCH_HAS_EXTRA_EXCEPTION_INFO
select ARCH_HAS_CODE_DATA_RELOCATION
select ARCH_HAS_NOCACHE_MEMORY_SUPPORT if ARM_MPU && CPU_HAS_ARM_MPU && CPU_HAS_DCACHE
select ARCH_SUPPORTS_ROM_START
select USE_SWITCH_SUPPORTED
help
This option signifies the use of a CPU of the Cortex-R family.
@@ -55,21 +52,11 @@ config CPU_AARCH32_CORTEX_A
select CPU_HAS_MMU
select HAS_CMSIS_CORE
select HAS_FLASH_LOAD_OFFSET
select ARCH_HAS_EXTRA_EXCEPTION_INFO if !USE_SWITCH
select ARCH_HAS_EXTRA_EXCEPTION_INFO
select ARCH_HAS_NOCACHE_MEMORY_SUPPORT
select USE_SWITCH_SUPPORTED
# GDBSTUB has not yet been tested on Cortex M or R SoCs
select ARCH_HAS_GDBSTUB
# GDB on ARM needs the etxra registers
select EXTRA_EXCEPTION_INFO if GDBSTUB
help
This option signifies the use of a CPU of the Cortex-A family.
config GDBSTUB_BUF_SZ
# GDB for ARM expects up to 18 4-byte plus 8 12-byte
# registers - 336 HEX letters
default 350 if GDBSTUB
config ISA_THUMB2
bool
help
@@ -277,11 +264,17 @@ choice
config FP_HARDABI
bool "Floating point Hard ABI"
# TF-M build system does not build the NS app and libraries correctly with Hard ABI.
# This limitation should be removed in the next TF-M synchronization.
depends on !TFM_BUILD_NS
depends on !(BUILD_WITH_TFM && !TFM_IPC)
help
This option selects the Floating point ABI in which hardware floating
point instructions are generated and uses FPU-specific calling
conventions.
Note: When building with TF-M enabled only the IPC mode is supported.
config FP_SOFTABI
bool "Floating point Soft ABI"
help

View File

@@ -4,6 +4,7 @@ zephyr_library()
zephyr_library_sources(
exc.S
exc_exit.S
fault.c
irq_init.c
reboot.c
@@ -11,11 +12,12 @@ zephyr_library_sources(
stacks.c
tcm.c
vector_table.S
swap.c
swap_helper.S
irq_manage.c
prep_c.c
thread.c
cpu_idle.S
smp.c
)
zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr_wrapper.S)
@@ -23,5 +25,3 @@ zephyr_library_sources_ifdef(CONFIG_USERSPACE thread.c)
zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c)
zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE __aeabi_read_tp.S)
zephyr_library_sources_ifdef(CONFIG_ARCH_CACHE cache.c)
zephyr_library_sources_ifdef(CONFIG_USE_SWITCH switch.S)
zephyr_library_sources_ifndef(CONFIG_USE_SWITCH swap.c swap_helper.S exc_exit.S)

View File

@@ -99,7 +99,7 @@ config CPU_CORTEX_R52
select AARCH32_ARMV8_R
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select VFP_SP_D16 if !USE_SWITCH
select VFP_SP_D16
help
This option signifies the use of a Cortex-R52 CPU
@@ -130,7 +130,6 @@ config ARMV7_R_FP
config AARCH32_ARMV8_R
bool
select ATOMIC_OPERATIONS_BUILTIN
select SCHED_IPI_SUPPORTED if SMP
help
This option signifies the use of an ARMv8-R AArch32 processor
implementation.
@@ -189,6 +188,3 @@ config ICACHE_LINE_SIZE
default 32
endif # CPU_AARCH32_CORTEX_R
config TEST_EXTRA_STACK_SIZE
default 1024 if SMP

View File

@@ -11,8 +11,5 @@ _ASM_FILE_PROLOGUE
GTEXT(__aeabi_read_tp)
SECTION_FUNC(text, __aeabi_read_tp)
/*
* TPIDRURW will be used as a base pointer point to TLS aera.
*/
mrc 15, 0, r0, c13, c0, 2
mrc 15, 0, r0, c13, c0, 3
bx lr

View File

@@ -1,30 +0,0 @@
/*
* Copyright (c) 2023 Arm Limited (or its affiliates). All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Definitions for boot code
*/
#ifndef _BOOT_H_
#define _BOOT_H_
#ifndef _ASMLANGUAGE
extern void *_vector_table[];
extern void __start(void);
#endif /* _ASMLANGUAGE */
/* Offsets into the boot_params structure */
#define BOOT_PARAM_MPID_OFFSET 0
#define BOOT_PARAM_IRQ_SP_OFFSET 4
#define BOOT_PARAM_FIQ_SP_OFFSET 8
#define BOOT_PARAM_ABT_SP_OFFSET 12
#define BOOT_PARAM_UDF_SP_OFFSET 16
#define BOOT_PARAM_SVC_SP_OFFSET 20
#define BOOT_PARAM_SYS_SP_OFFSET 24
#endif /* _BOOT_H_ */

View File

@@ -27,7 +27,6 @@
#include <zephyr/linker/sections.h>
#include <offsets_short.h>
#include <zephyr/arch/cpu.h>
#include "macro_priv.inc"
_ASM_FILE_PROLOGUE
@@ -42,8 +41,6 @@ GTEXT(z_arm_undef_instruction)
GTEXT(z_arm_prefetch_abort)
GTEXT(z_arm_data_abort)
#ifndef CONFIG_USE_SWITCH
.macro exception_entry mode
/*
* Store r0-r3, r12, lr, lr_und and spsr_und into the stack to
@@ -89,10 +86,10 @@ GTEXT(z_arm_data_abort)
#endif
/* Increment exception nesting count */
get_cpu r2
ldr r1, [r2, #___cpu_t_nested_OFFSET]
ldr r2, =_kernel
ldr r1, [r2, #_kernel_offset_to_nested]
add r1, r1, #1
str r1, [r2, #___cpu_t_nested_OFFSET]
str r1, [r2, #_kernel_offset_to_nested]
.endm
.macro exception_exit
@@ -131,10 +128,10 @@ SECTION_SUBSEC_FUNC(TEXT, __exc, z_arm_undef_instruction)
sub sp, #24
/* Increment exception nesting count */
get_cpu r2
ldr r1, [r2, #___cpu_t_nested_OFFSET]
ldr r2, =_kernel
ldr r1, [r2, #_kernel_offset_to_nested]
add r1, r1, #1
str r1, [r2, #___cpu_t_nested_OFFSET]
str r1, [r2, #_kernel_offset_to_nested]
#if defined(CONFIG_FPU_SHARING)
sub sp, #___fpu_t_SIZEOF
@@ -235,59 +232,3 @@ SECTION_SUBSEC_FUNC(TEXT, __exc, z_arm_data_abort)
streq r1, [sp, #24 + FPU_SF_SIZE]
b z_arm_exc_exit
#else
/**
* @brief Undefined instruction exception handler
*
* An undefined instruction (UNDEF) exception is generated when an undefined
* instruction, or a VFP instruction when the VFP is not enabled, is
* encountered.
*/
SECTION_SUBSEC_FUNC(TEXT, __exc, z_arm_undef_instruction)
/*
* The undefined instruction address is offset by 2 if the previous
* mode is Thumb; otherwise, it is offset by 4.
*/
push {r0}
mrs r0, spsr
tst r0, #T_BIT
subeq lr, #4 /* ARM (!T_BIT) */
subne lr, #2 /* Thumb (T_BIT) */
pop {r0}
z_arm_cortex_ar_enter_exc
bl z_arm_fault_undef_instruction
b z_arm_cortex_ar_exit_exc
/**
* @brief Prefetch abort exception handler
*
* A prefetch abort (PABT) exception is generated when the processor marks the
* prefetched instruction as invalid and the instruction is executed.
*/
SECTION_SUBSEC_FUNC(TEXT, __exc, z_arm_prefetch_abort)
/*
* The faulting instruction address is always offset by 4 for the
* prefetch abort exceptions.
*/
sub lr, #4
z_arm_cortex_ar_enter_exc
bl z_arm_fault_prefetch
b z_arm_cortex_ar_exit_exc
/**
* @brief Data abort exception handler
*
* A data abort (DABT) exception is generated when an error occurs on a data
* memory access. This exception can be either synchronous or asynchronous,
* depending on the type of fault that caused it.
*/
SECTION_SUBSEC_FUNC(TEXT, __exc, z_arm_data_abort)
sub lr, #8
z_arm_cortex_ar_enter_exc
bl z_arm_fault_data
b z_arm_cortex_ar_exit_exc
#endif

View File

@@ -18,7 +18,6 @@
#include <zephyr/linker/sections.h>
#include <offsets_short.h>
#include <zephyr/arch/cpu.h>
#include "macro_priv.inc"
_ASM_FILE_PROLOGUE
@@ -53,8 +52,8 @@ GDATA(_kernel)
bne system_thread_exit\@
/* Restore user stack pointer */
get_cpu r0
ldr r0, [r0, #___cpu_t_current_OFFSET]
ldr r0, =_kernel
ldr r0, [r0, #_kernel_offset_to_current]
cps #MODE_SYS
ldr sp, [r0, #_thread_offset_to_sp_usr] /* sp_usr */
cps #MODE_SVC
@@ -69,8 +68,8 @@ system_thread_exit\@:
* If the floating point context pointer is null, then a context was
* saved so restore the float context from the exception stack frame.
*/
get_cpu r2
ldr r1, [r2, #___cpu_t_fp_ctx_OFFSET]
ldr r2, =_kernel
ldr r1, [r2, #_kernel_offset_to_fp_ctx]
cmp r1, #0
beq vfp_restore\@
@@ -80,7 +79,7 @@ system_thread_exit\@:
*/
cmp r0, #0
moveq r1, #0
streq r1, [r2, #___cpu_t_fp_ctx_OFFSET]
streq r1, [r2, #_kernel_offset_to_fp_ctx]
b vfp_exit\@
vfp_restore\@:
@@ -141,24 +140,23 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_int_exit)
#ifdef CONFIG_PREEMPT_ENABLED
/* Do not context switch if exiting a nested interrupt */
get_cpu r3
ldr r0, [r3, #___cpu_t_nested_OFFSET]
ldr r3, =_kernel
ldr r0, [r3, #_kernel_offset_to_nested]
cmp r0, #1
bhi __EXIT_INT
ldr r1, [r3, #___cpu_t_current_OFFSET]
ldr r2, =_kernel
ldr r0, [r2, #_kernel_offset_to_ready_q_cache]
ldr r1, [r3, #_kernel_offset_to_current]
ldr r0, [r3, #_kernel_offset_to_ready_q_cache]
cmp r0, r1
blne z_arm_do_swap
__EXIT_INT:
#endif /* CONFIG_PREEMPT_ENABLED */
/* Decrement interrupt nesting count */
get_cpu r2
ldr r0, [r2, #___cpu_t_nested_OFFSET]
ldr r2, =_kernel
ldr r0, [r2, #_kernel_offset_to_nested]
sub r0, r0, #1
str r0, [r2, #___cpu_t_nested_OFFSET]
str r0, [r2, #_kernel_offset_to_nested]
/* Restore previous stack pointer */
pop {r2, r3}
@@ -209,8 +207,8 @@ __EXIT_INT:
*/
SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_exc_exit)
/* Do not context switch if exiting a nested exception */
get_cpu r3
ldr r1, [r3, #___cpu_t_nested_OFFSET]
ldr r3, =_kernel
ldr r1, [r3, #_kernel_offset_to_nested]
cmp r1, #1
bhi __EXIT_EXC
@@ -241,10 +239,10 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_exc_exit)
bl z_arm_do_swap
/* Decrement exception nesting count */
get_cpu r3
ldr r0, [r3, #___cpu_t_nested_OFFSET]
ldr r3, =_kernel
ldr r0, [r3, #_kernel_offset_to_nested]
sub r0, r0, #1
str r0, [r3, #___cpu_t_nested_OFFSET]
str r0, [r3, #_kernel_offset_to_nested]
/* Return to the switched thread */
cps #MODE_SYS
@@ -257,9 +255,9 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_exc_exit)
__EXIT_EXC:
/* Decrement exception nesting count */
ldr r0, [r3, #___cpu_t_nested_OFFSET]
ldr r0, [r3, #_kernel_offset_to_nested]
sub r0, r0, #1
str r0, [r3, #___cpu_t_nested_OFFSET]
str r0, [r3, #_kernel_offset_to_nested]
#if defined(CONFIG_FPU_SHARING)
add sp, sp, #___fpu_t_SIZEOF

View File

@@ -10,11 +10,6 @@
#include <kernel_internal.h>
#include <zephyr/arch/common/exc_handle.h>
#include <zephyr/logging/log.h>
#if defined(CONFIG_GDBSTUB)
#include <zephyr/arch/arm/gdbstub.h>
#include <zephyr/debug/gdbstub.h>
#endif
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#define FAULT_DUMP_VERBOSE (CONFIG_FAULT_DUMP == 2)
@@ -152,7 +147,7 @@ bool z_arm_fault_undef_instruction_fp(void)
__set_FPEXC(FPEXC_EN);
if (_current_cpu->nested > 1) {
if (_kernel.cpus[0].nested > 1) {
/*
* If the nested count is greater than 1, the undefined
* instruction exception came from an irq/svc context. (The
@@ -160,12 +155,12 @@ bool z_arm_fault_undef_instruction_fp(void)
* the undef exception would increment it to 2).
*/
struct __fpu_sf *spill_esf =
(struct __fpu_sf *)_current_cpu->fp_ctx;
(struct __fpu_sf *)_kernel.cpus[0].fp_ctx;
if (spill_esf == NULL)
return false;
_current_cpu->fp_ctx = NULL;
_kernel.cpus[0].fp_ctx = NULL;
/*
* If the nested count is 2 and the current thread has used the
@@ -175,9 +170,9 @@ bool z_arm_fault_undef_instruction_fp(void)
* saved exception stack frame, then save the floating point
* context because it is about to be overwritten.
*/
if (((_current_cpu->nested == 2)
if (((_kernel.cpus[0].nested == 2)
&& (_current->base.user_options & K_FP_REGS))
|| ((_current_cpu->nested > 2)
|| ((_kernel.cpus[0].nested > 2)
&& (spill_esf->undefined & FPEXC_EN))) {
/*
* Spill VFP registers to specified exception stack
@@ -218,12 +213,6 @@ bool z_arm_fault_undef_instruction(z_arch_esf_t *esf)
z_arm_fpu_caller_save(&esf->fpu);
#endif
#if defined(CONFIG_GDBSTUB)
z_gdb_entry(esf, GDB_EXCEPTION_INVALID_INSTRUCTION);
/* Might not be fatal if GDB stub placed it in the code. */
return false;
#endif
/* Print fault information */
LOG_ERR("***** UNDEFINED INSTRUCTION ABORT *****");
@@ -258,17 +247,6 @@ bool z_arm_fault_prefetch(z_arch_esf_t *esf)
/* Read Instruction Fault Address Register (IFAR) */
uint32_t ifar = __get_IFAR();
#if defined(CONFIG_GDBSTUB)
/* The BKPT instruction could have caused a software breakpoint */
if (fs == IFSR_DEBUG_EVENT) {
/* Debug event, call the gdbstub handler */
z_gdb_entry(esf, GDB_EXCEPTION_BREAKPOINT);
} else {
/* Fatal */
z_gdb_entry(esf, GDB_EXCEPTION_MEMORY_FAULT);
}
return false;
#endif
/* Print fault information*/
LOG_ERR("***** PREFETCH ABORT *****");
if (FAULT_DUMP_VERBOSE) {
@@ -336,12 +314,6 @@ bool z_arm_fault_data(z_arch_esf_t *esf)
/* Read Data Fault Address Register (DFAR) */
uint32_t dfar = __get_DFAR();
#if defined(CONFIG_GDBSTUB)
z_gdb_entry(esf, GDB_EXCEPTION_MEMORY_FAULT);
/* return false - non-fatal error */
return false;
#endif
#if defined(CONFIG_USERSPACE)
if ((fs == COND_CODE_1(CONFIG_AARCH32_ARMV8_R,
(FSR_FS_TRANSLATION_FAULT),

View File

@@ -22,7 +22,6 @@
#include <offsets_short.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/sw_isr_table.h>
#include "macro_priv.inc"
_ASM_FILE_PROLOGUE
@@ -32,7 +31,6 @@ GDATA(_sw_isr_table)
GTEXT(_isr_wrapper)
GTEXT(z_arm_int_exit)
#ifndef CONFIG_USE_SWITCH
/**
*
* @brief Wrapper around ISRs when inserted in software ISR table
@@ -59,8 +57,8 @@ SECTION_FUNC(TEXT, _isr_wrapper)
cmp r0, #MODE_USR
bne isr_system_thread
get_cpu r0
ldr r0, [r0, #___cpu_t_current_OFFSET]
ldr r0, =_kernel
ldr r0, [r0, #_kernel_offset_to_current]
/* Save away user stack pointer */
cps #MODE_SYS
@@ -110,10 +108,10 @@ _vfp_not_enabled:
* Mark where to store the floating context for the undefined
* instruction handler
*/
get_cpu r2
ldr r0, [r2, #___cpu_t_fp_ctx_OFFSET]
ldr r2, =_kernel
ldr r0, [r2, #_kernel_offset_to_fp_ctx]
cmp r0, #0
streq sp, [r2, #___cpu_t_fp_ctx_OFFSET]
streq sp, [r2, #_kernel_offset_to_fp_ctx]
#endif /* CONFIG_FPU_SHARING */
/*
@@ -141,10 +139,10 @@ _vfp_not_enabled:
push {r2, r3}
/* Increment interrupt nesting count */
get_cpu r2
ldr r0, [r2, #___cpu_t_nested_OFFSET]
ldr r2, =_kernel
ldr r0, [r2, #_kernel_offset_to_nested]
add r0, r0, #1
str r0, [r2, #___cpu_t_nested_OFFSET]
str r0, [r2, #_kernel_offset_to_nested]
#ifdef CONFIG_TRACING_ISR
bl sys_trace_isr_enter
@@ -229,145 +227,3 @@ spurious_continue:
* z_arm_int_exit() */
ldr r1, =z_arm_int_exit
bx r1
#else
/**
*
* @brief Wrapper around ISRs when inserted in software ISR table
*
* When inserted in the vector table, _isr_wrapper() demuxes the ISR table
* using the running interrupt number as the index, and invokes the registered
* ISR with its corresponding argument. When returning from the ISR, it
* determines if a context switch needs to happen and invoke the arch_switch
* function if so.
*
*/
SECTION_FUNC(TEXT, _isr_wrapper)
sub lr, #4
z_arm_cortex_ar_enter_exc
/* Increment interrupt nesting count */
get_cpu r2
ldr r0, [r2, #___cpu_t_nested_OFFSET]
add r0, #1
str r0, [r2, #___cpu_t_nested_OFFSET]
/* If not nested: switch to IRQ stack and save current sp on it. */
cmp r0, #1
bhi 1f
mov r0, sp
cps #MODE_IRQ
push {r0}
1:
#ifdef CONFIG_TRACING_ISR
bl sys_trace_isr_enter
#endif /* CONFIG_TRACING_ISR */
#ifdef CONFIG_PM
/*
* All interrupts are disabled when handling idle wakeup. For tickless
* idle, this ensures that the calculation and programming of the
* device for the next timer deadline is not interrupted. For
* non-tickless idle, this ensures that the clearing of the kernel idle
* state is not interrupted. In each case, z_pm_save_idle_exit
* is called with interrupts disabled.
*/
/* is this a wakeup from idle ? */
ldr r2, =_kernel
/* requested idle duration, in ticks */
ldr r0, [r2, #_kernel_offset_to_idle]
cmp r0, #0
beq _idle_state_cleared
movs r1, #0
/* clear kernel idle state */
str r1, [r2, #_kernel_offset_to_idle]
bl z_pm_save_idle_exit
_idle_state_cleared:
#endif /* CONFIG_PM */
/* Get active IRQ number from the interrupt controller */
#if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
bl arm_gic_get_active
#else
bl z_soc_irq_get_active
#endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
push {r0, r1}
lsl r0, r0, #3 /* table is 8-byte wide */
/*
* Skip calling the isr if it is a spurious interrupt.
*/
mov r1, #CONFIG_NUM_IRQS
lsl r1, r1, #3
cmp r0, r1
bge spurious_continue
ldr r1, =_sw_isr_table
add r1, r1, r0 /* table entry: ISRs must have their MSB set to stay
* in thumb mode */
ldm r1!,{r0,r3} /* arg in r0, ISR in r3 */
/*
* Enable and disable interrupts again to allow nested in exception handlers.
*/
cpsie i
blx r3 /* call ISR */
cpsid i
spurious_continue:
/* Signal end-of-interrupt */
pop {r0, r1}
#if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
bl arm_gic_eoi
#else
bl z_soc_irq_eoi
#endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
#ifdef CONFIG_TRACING_ISR
bl sys_trace_isr_exit
#endif
GTEXT(z_arm_cortex_ar_irq_done)
z_arm_cortex_ar_irq_done:
/* Decrement interrupt nesting count */
get_cpu r2
ldr r0, [r2, #___cpu_t_nested_OFFSET]
sub r0, r0, #1
str r0, [r2, #___cpu_t_nested_OFFSET]
/* Do not context switch if exiting a nested interrupt */
cmp r0, #0
bhi __EXIT_INT
/* retrieve pointer to the current thread */
pop {r0}
cps #MODE_SYS
mov sp, r0
ldr r1, [r2, #___cpu_t_current_OFFSET]
push {r1}
mov r0, #0
bl z_get_next_switch_handle
pop {r1}
cmp r0, #0
beq __EXIT_INT
/*
* Switch thread
* r0: new thread
* r1: old thread
*/
bl z_arm_context_switch
__EXIT_INT:
#ifdef CONFIG_STACK_SENTINEL
bl z_check_stack_sentinel
#endif /* CONFIG_STACK_SENTINEL */
b z_arm_cortex_ar_exit_exc
#endif

View File

@@ -1,49 +0,0 @@
/*
* Copyright (c) 2023 Arm Limited (or its affiliates). All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _MACRO_PRIV_INC_
#define _MACRO_PRIV_INC_
#include <zephyr/arch/arm/cortex_a_r/tpidruro.h>
/*
* Get CPU id
*/
.macro get_cpu_id rreg0
/* Read MPIDR register */
mrc p15, 0, \rreg0, c0, c0, 5
ubfx \rreg0, \rreg0, #0, #24
.endm
.macro get_cpu rreg0
/*
* Get CPU pointer.
*/
mrc p15, 0, \rreg0, c13, c0, 3
and \rreg0, #TPIDRURO_CURR_CPU
.endm
.macro z_arm_cortex_ar_enter_exc
/*
* Store r0-r3, r12, lr into the stack to construct an exception
* stack frame.
*/
srsdb sp!, #MODE_SYS
cps #MODE_SYS
stmdb sp, {r0-r3, r12, lr}^
sub sp, #24
/* TODO: EXTRA_EXCEPTION_INFO */
mov r0, sp
/* increment exception depth */
get_cpu r2
ldrb r1, [r2, #_cpu_offset_to_exc_depth]
add r1, r1, #1
strb r1, [r2, #_cpu_offset_to_exc_depth]
.endm
#endif /* _MACRO_PRIV_INC_ */

View File

@@ -44,13 +44,6 @@ Z_GENERIC_SECTION(.vt_pointer_section) __attribute__((used))
void *_vector_table_pointer;
#endif
#ifdef CONFIG_ARM_MPU
extern void z_arm_mpu_init(void);
extern void z_arm_configure_static_mpu_regions(void);
#elif defined(CONFIG_ARM_AARCH32_MMU)
extern int z_arm_mmu_init(void);
#endif
#if defined(CONFIG_AARCH32_ARMV8_R)
#define VECTOR_ADDRESS ((uintptr_t)_vector_start)
@@ -145,11 +138,8 @@ extern FUNC_NORETURN void z_cstart(void);
* This routine prepares for the execution of and runs C code.
*
*/
void z_prep_c(void)
void z_arm_prep_c(void)
{
/* Initialize tpidruro with our struct _cpu instance address */
write_tpidruro((uintptr_t)&_kernel.cpus[0]);
relocate_vector_table();
#if defined(CONFIG_CPU_HAS_FPU)
z_arm_floating_point_init();
@@ -160,12 +150,6 @@ void z_prep_c(void)
z_arm_init_stacks();
#endif
z_arm_interrupt_init();
#ifdef CONFIG_ARM_MPU
z_arm_mpu_init();
z_arm_configure_static_mpu_regions();
#elif defined(CONFIG_ARM_AARCH32_MMU)
z_arm_mmu_init();
#endif
z_cstart();
CODE_UNREACHABLE;
}

View File

@@ -18,8 +18,6 @@
#include <offsets_short.h>
#include <cortex_a_r/tcm.h>
#include "vector_table.h"
#include "boot.h"
#include "macro_priv.inc"
_ASM_FILE_PROLOGUE
@@ -42,7 +40,7 @@ GTEXT(z_arm_platform_init)
* and interrupts are disabled. The processor architectural registers are in
* an indeterminate state.
*
* When these steps are completed, jump to z_prep_c(), which will finish
* When these steps are completed, jump to z_arm_prep_c(), which will finish
* setting up the system for running C code.
*
*/
@@ -78,7 +76,6 @@ SECTION_SUBSEC_FUNC(TEXT, _reset_section, __start)
EL1_Reset_Handler:
#endif
#if defined(CONFIG_DCLS)
/*
* Initialise CPU registers to a defined state if the processor is
@@ -199,72 +196,33 @@ EL1_Reset_Handler:
#endif /* CONFIG_DCLS */
ldr r0, =arm_cpu_boot_params
#if CONFIG_MP_MAX_NUM_CPUS > 1
get_cpu_id r1
ldrex r2, [r0, #BOOT_PARAM_MPID_OFFSET]
cmp r2, #-1
bne 1f
strex r3, r1, [r0, #BOOT_PARAM_MPID_OFFSET]
cmp r3, #0
beq _primary_core
1:
dmb ld
ldr r2, [r0, #BOOT_PARAM_MPID_OFFSET]
cmp r1, r2
bne 1b
/* we can now move on */
ldr r4, =arch_secondary_cpu_init
ldr r5, [r0, #BOOT_PARAM_FIQ_SP_OFFSET]
ldr r6, [r0, #BOOT_PARAM_IRQ_SP_OFFSET]
ldr r7, [r0, #BOOT_PARAM_ABT_SP_OFFSET]
ldr r8, [r0, #BOOT_PARAM_UDF_SP_OFFSET]
ldr r9, [r0, #BOOT_PARAM_SVC_SP_OFFSET]
ldr r10, [r0, #BOOT_PARAM_SYS_SP_OFFSET]
b 2f
_primary_core:
#endif
ldr r4, =z_prep_c
ldr r5, =(z_arm_fiq_stack + CONFIG_ARMV7_FIQ_STACK_SIZE)
ldr r6, =(z_interrupt_stacks + CONFIG_ISR_STACK_SIZE)
ldr r7, =(z_arm_abort_stack + CONFIG_ARMV7_EXCEPTION_STACK_SIZE)
ldr r8, =(z_arm_undef_stack + CONFIG_ARMV7_EXCEPTION_STACK_SIZE)
ldr r9, =(z_arm_svc_stack + CONFIG_ARMV7_SVC_STACK_SIZE)
ldr r10, =(z_arm_sys_stack + CONFIG_ARMV7_SYS_STACK_SIZE)
2:
/*
* Configure stack.
*/
/* FIQ mode stack */
msr CPSR_c, #(MODE_FIQ | I_BIT | F_BIT)
mov sp, r5
ldr sp, =(z_arm_fiq_stack + CONFIG_ARMV7_FIQ_STACK_SIZE)
/* IRQ mode stack */
msr CPSR_c, #(MODE_IRQ | I_BIT | F_BIT)
mov sp, r6
ldr sp, =(z_interrupt_stacks + CONFIG_ISR_STACK_SIZE)
/* ABT mode stack */
msr CPSR_c, #(MODE_ABT | I_BIT | F_BIT)
mov sp, r7
ldr sp, =(z_arm_abort_stack + CONFIG_ARMV7_EXCEPTION_STACK_SIZE)
/* UND mode stack */
msr CPSR_c, #(MODE_UND | I_BIT | F_BIT)
mov sp, r8
ldr sp, =(z_arm_undef_stack + CONFIG_ARMV7_EXCEPTION_STACK_SIZE)
/* SVC mode stack */
msr CPSR_c, #(MODE_SVC | I_BIT | F_BIT)
mov sp, r9
ldr sp, =(z_arm_svc_stack + CONFIG_ARMV7_SVC_STACK_SIZE)
/* SYS mode stack */
msr CPSR_c, #(MODE_SYS | I_BIT | F_BIT)
mov sp, r10
ldr sp, =(z_arm_sys_stack + CONFIG_ARMV7_SYS_STACK_SIZE)
#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
/* Execute platform-specific initialisation if applicable */
@@ -280,4 +238,4 @@ _primary_core:
bl z_arm_tcm_disable_ecc
#endif
bx r4
b z_arm_prep_c

View File

@@ -1,264 +0,0 @@
/*
* Copyright (c) 2023 Arm Limited (or its affiliates). All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel/thread_stack.h>
#include <zephyr/kernel.h>
#include <zephyr/arch/arm/cortex_a_r/lib_helpers.h>
#include <zephyr/drivers/interrupt_controller/gic.h>
#include "boot.h"
#include "zephyr/cache.h"
#include "zephyr/kernel/thread_stack.h"
#include "zephyr/toolchain/gcc.h"
#define INV_MPID UINT32_MAX
#define SGI_SCHED_IPI 0
#define SGI_MMCFG_IPI 1
#define SGI_FPU_IPI 2
K_KERNEL_PINNED_STACK_ARRAY_DECLARE(z_interrupt_stacks,
CONFIG_MP_MAX_NUM_CPUS,
CONFIG_ISR_STACK_SIZE);
K_KERNEL_STACK_ARRAY_DECLARE(z_arm_fiq_stack,
CONFIG_MP_MAX_NUM_CPUS,
CONFIG_ARMV7_FIQ_STACK_SIZE);
K_KERNEL_STACK_ARRAY_DECLARE(z_arm_abort_stack,
CONFIG_MP_MAX_NUM_CPUS,
CONFIG_ARMV7_EXCEPTION_STACK_SIZE);
K_KERNEL_STACK_ARRAY_DECLARE(z_arm_undef_stack,
CONFIG_MP_MAX_NUM_CPUS,
CONFIG_ARMV7_EXCEPTION_STACK_SIZE);
K_KERNEL_STACK_ARRAY_DECLARE(z_arm_svc_stack,
CONFIG_MP_MAX_NUM_CPUS,
CONFIG_ARMV7_SVC_STACK_SIZE);
K_KERNEL_STACK_ARRAY_DECLARE(z_arm_sys_stack,
CONFIG_MP_MAX_NUM_CPUS,
CONFIG_ARMV7_SVC_STACK_SIZE);
struct boot_params {
uint32_t mpid;
char *irq_sp;
char *fiq_sp;
char *abt_sp;
char *udf_sp;
char *svc_sp;
char *sys_sp;
arch_cpustart_t fn;
void *arg;
int cpu_num;
};
/* Offsets used in reset.S */
BUILD_ASSERT(offsetof(struct boot_params, mpid) == BOOT_PARAM_MPID_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, irq_sp) == BOOT_PARAM_IRQ_SP_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, fiq_sp) == BOOT_PARAM_FIQ_SP_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, abt_sp) == BOOT_PARAM_ABT_SP_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, udf_sp) == BOOT_PARAM_UDF_SP_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, svc_sp) == BOOT_PARAM_SVC_SP_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, sys_sp) == BOOT_PARAM_SYS_SP_OFFSET);
volatile struct boot_params arm_cpu_boot_params = {
.mpid = -1,
.irq_sp = (char *)(z_interrupt_stacks + CONFIG_ISR_STACK_SIZE),
.fiq_sp = (char *)(z_arm_fiq_stack + CONFIG_ARMV7_FIQ_STACK_SIZE),
.abt_sp = (char *)(z_arm_abort_stack + CONFIG_ARMV7_EXCEPTION_STACK_SIZE),
.udf_sp = (char *)(z_arm_undef_stack + CONFIG_ARMV7_EXCEPTION_STACK_SIZE),
.svc_sp = (char *)(z_arm_svc_stack + CONFIG_ARMV7_SVC_STACK_SIZE),
.sys_sp = (char *)(z_arm_sys_stack + CONFIG_ARMV7_SYS_STACK_SIZE),
};
static const uint32_t cpu_node_list[] = {
DT_FOREACH_CHILD_STATUS_OKAY_SEP(DT_PATH(cpus), DT_REG_ADDR, (,))};
/* cpu_map saves the maping of core id and mpid */
static uint32_t cpu_map[CONFIG_MP_MAX_NUM_CPUS] = {
[0 ... (CONFIG_MP_MAX_NUM_CPUS - 1)] = INV_MPID
};
#ifdef CONFIG_ARM_MPU
extern void z_arm_mpu_init(void);
extern void z_arm_configure_static_mpu_regions(void);
#elif defined(CONFIG_ARM_AARCH32_MMU)
extern int z_arm_mmu_init(void);
#endif
/* Called from Zephyr initialization */
void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz, arch_cpustart_t fn, void *arg)
{
int cpu_count, i, j;
uint32_t cpu_mpid = 0;
uint32_t master_core_mpid;
/* Now it is on master core */
__ASSERT(arch_curr_cpu()->id == 0, "");
master_core_mpid = MPIDR_TO_CORE(GET_MPIDR());
cpu_count = ARRAY_SIZE(cpu_node_list);
__ASSERT(cpu_count == CONFIG_MP_MAX_NUM_CPUS,
"The count of CPU Cores nodes in dts is not equal to CONFIG_MP_MAX_NUM_CPUS\n");
for (i = 0, j = 0; i < cpu_count; i++) {
if (cpu_node_list[i] == master_core_mpid) {
continue;
}
if (j == cpu_num - 1) {
cpu_mpid = cpu_node_list[i];
break;
}
j++;
}
if (i == cpu_count) {
printk("Can't find CPU Core %d from dts and failed to boot it\n", cpu_num);
return;
}
/* Pass stack address to secondary core */
arm_cpu_boot_params.irq_sp = Z_KERNEL_STACK_BUFFER(stack) + sz;
arm_cpu_boot_params.fiq_sp = Z_KERNEL_STACK_BUFFER(z_arm_fiq_stack[cpu_num])
+ CONFIG_ARMV7_FIQ_STACK_SIZE;
arm_cpu_boot_params.abt_sp = Z_KERNEL_STACK_BUFFER(z_arm_abort_stack[cpu_num])
+ CONFIG_ARMV7_EXCEPTION_STACK_SIZE;
arm_cpu_boot_params.udf_sp = Z_KERNEL_STACK_BUFFER(z_arm_undef_stack[cpu_num])
+ CONFIG_ARMV7_EXCEPTION_STACK_SIZE;
arm_cpu_boot_params.svc_sp = Z_KERNEL_STACK_BUFFER(z_arm_svc_stack[cpu_num])
+ CONFIG_ARMV7_SVC_STACK_SIZE;
arm_cpu_boot_params.sys_sp = Z_KERNEL_STACK_BUFFER(z_arm_sys_stack[cpu_num])
+ CONFIG_ARMV7_SYS_STACK_SIZE;
arm_cpu_boot_params.fn = fn;
arm_cpu_boot_params.arg = arg;
arm_cpu_boot_params.cpu_num = cpu_num;
/* store mpid last as this is our synchronization point */
arm_cpu_boot_params.mpid = cpu_mpid;
barrier_dsync_fence_full();
sys_cache_data_invd_range(
(void *)&arm_cpu_boot_params,
sizeof(arm_cpu_boot_params));
/*! TODO: Support PSCI
* \todo Support PSCI
*/
/* Wait secondary cores up, see arch_secondary_cpu_init */
while (arm_cpu_boot_params.fn) {
wfe();
}
cpu_map[cpu_num] = cpu_mpid;
printk("Secondary CPU core %d (MPID:%#x) is up\n", cpu_num, cpu_mpid);
}
/* the C entry of secondary cores */
void arch_secondary_cpu_init(void)
{
int cpu_num = arm_cpu_boot_params.cpu_num;
arch_cpustart_t fn;
void *arg;
__ASSERT(arm_cpu_boot_params.mpid == MPIDR_TO_CORE(GET_MPIDR()), "");
/* Initialize tpidrro_el0 with our struct _cpu instance address */
write_tpidruro((uintptr_t)&_kernel.cpus[cpu_num]);
#ifdef CONFIG_ARM_MPU
/*! TODO: Unify mpu and mmu initialization function
* \todo Unify mpu and mmu initialization function
*/
z_arm_mpu_init();
z_arm_configure_static_mpu_regions();
#elif defined(CONFIG_ARM_AARCH32_MMU)
z_arm_mmu_init();
#endif
#ifdef CONFIG_SMP
arm_gic_secondary_init();
irq_enable(SGI_SCHED_IPI);
/*! TODO: FPU irq
* \todo FPU irq
*/
#endif
fn = arm_cpu_boot_params.fn;
arg = arm_cpu_boot_params.arg;
barrier_dsync_fence_full();
/*
* Secondary core clears .fn to announce its presence.
* Primary core is polling for this. We no longer own
* arm_cpu_boot_params afterwards.
*/
arm_cpu_boot_params.fn = NULL;
barrier_dsync_fence_full();
sev();
fn(arg);
}
#ifdef CONFIG_SMP
static void broadcast_ipi(unsigned int ipi)
{
uint32_t mpidr = MPIDR_TO_CORE(GET_MPIDR());
/*
* Send SGI to all cores except itself
*/
unsigned int num_cpus = arch_num_cpus();
for (int i = 0; i < num_cpus; i++) {
uint32_t target_mpidr = cpu_map[i];
uint8_t aff0;
if (mpidr == target_mpidr || mpidr == INV_MPID) {
continue;
}
aff0 = MPIDR_AFFLVL(target_mpidr, 0);
gic_raise_sgi(ipi, (uint64_t)target_mpidr, 1 << aff0);
}
}
void sched_ipi_handler(const void *unused)
{
ARG_UNUSED(unused);
z_sched_ipi();
}
/* arch implementation of sched_ipi */
void arch_sched_ipi(void)
{
broadcast_ipi(SGI_SCHED_IPI);
}
int arch_smp_init(void)
{
cpu_map[0] = MPIDR_TO_CORE(GET_MPIDR());
/*
* SGI0 is use for sched ipi, this might be changed to use Kconfig
* option
*/
IRQ_CONNECT(SGI_SCHED_IPI, IRQ_DEFAULT_PRIORITY, sched_ipi_handler, NULL, 0);
irq_enable(SGI_SCHED_IPI);
return 0;
}
SYS_INIT(arch_smp_init, PRE_KERNEL_2, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif

View File

@@ -4,22 +4,16 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "zephyr/kernel/thread_stack.h"
#include <zephyr/kernel.h>
#include <cortex_a_r/stack.h>
#include <string.h>
#include <kernel_internal.h>
K_KERNEL_STACK_ARRAY_DEFINE(z_arm_fiq_stack, CONFIG_MP_MAX_NUM_CPUS,
CONFIG_ARMV7_FIQ_STACK_SIZE);
K_KERNEL_STACK_ARRAY_DEFINE(z_arm_abort_stack, CONFIG_MP_MAX_NUM_CPUS,
CONFIG_ARMV7_EXCEPTION_STACK_SIZE);
K_KERNEL_STACK_ARRAY_DEFINE(z_arm_undef_stack, CONFIG_MP_MAX_NUM_CPUS,
CONFIG_ARMV7_EXCEPTION_STACK_SIZE);
K_KERNEL_STACK_ARRAY_DEFINE(z_arm_svc_stack, CONFIG_MP_MAX_NUM_CPUS,
CONFIG_ARMV7_SVC_STACK_SIZE);
K_KERNEL_STACK_ARRAY_DEFINE(z_arm_sys_stack, CONFIG_MP_MAX_NUM_CPUS,
CONFIG_ARMV7_SYS_STACK_SIZE);
K_KERNEL_STACK_DEFINE(z_arm_fiq_stack, CONFIG_ARMV7_FIQ_STACK_SIZE);
K_KERNEL_STACK_DEFINE(z_arm_abort_stack, CONFIG_ARMV7_EXCEPTION_STACK_SIZE);
K_KERNEL_STACK_DEFINE(z_arm_undef_stack, CONFIG_ARMV7_EXCEPTION_STACK_SIZE);
K_KERNEL_STACK_DEFINE(z_arm_svc_stack, CONFIG_ARMV7_SVC_STACK_SIZE);
K_KERNEL_STACK_DEFINE(z_arm_sys_stack, CONFIG_ARMV7_SYS_STACK_SIZE);
#if defined(CONFIG_INIT_STACKS)
void z_arm_init_stacks(void)

View File

@@ -7,7 +7,7 @@
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <errno.h>
extern const int _k_neg_eagain;
/* The 'key' actually represents the BASEPRI register
* prior to disabling interrupts via the BASEPRI mechanism.
@@ -18,7 +18,7 @@ int arch_swap(unsigned int key)
{
/* store off key and return value */
_current->arch.basepri = key;
_current->arch.swap_return_value = -EAGAIN;
_current->arch.swap_return_value = _k_neg_eagain;
z_arm_cortex_r_svc();
irq_unlock(key);

View File

@@ -20,7 +20,6 @@
#include <zephyr/arch/cpu.h>
#include <zephyr/syscall.h>
#include <zephyr/kernel.h>
#include "macro_priv.inc"
_ASM_FILE_PROLOGUE
@@ -50,9 +49,9 @@ SECTION_FUNC(TEXT, z_arm_do_swap)
pop {r0, lr}
#endif /* CONFIG_INSTRUMENT_THREAD_SWITCHING */
/* load current _cpu into r1 and current k_thread into r2 */
get_cpu r1
ldr r2, [r1, #___cpu_t_current_OFFSET]
/* load _kernel into r1 and current k_thread into r2 */
ldr r1, =_kernel
ldr r2, [r1, #_kernel_offset_to_current]
#if defined(CONFIG_ARM_STORE_EXC_RETURN)
/* Store LSB of LR (EXC_RETURN) to the thread's 'mode' word. */
@@ -82,7 +81,7 @@ SECTION_FUNC(TEXT, z_arm_do_swap)
* float registers have not been saved away, so write them to the
* exception stack frame.
*/
ldr r0, [r1, #___cpu_t_fp_ctx_OFFSET]
ldr r0, [r1, #_kernel_offset_to_fp_ctx]
cmp r0, #0
beq out_store_thread_context
@@ -107,14 +106,13 @@ out_fp_inactive:
* frame, so zero out the global pointer to note this.
*/
mov r0, #0
str r0, [r1, #___cpu_t_fp_ctx_OFFSET]
str r0, [r1, #_kernel_offset_to_fp_ctx]
#endif /* CONFIG_FPU_SHARING */
/* fetch the thread to run from the ready queue cache */
ldr r3, =_kernel
ldr r2, [r3, #_kernel_offset_to_ready_q_cache]
ldr r2, [r1, #_kernel_offset_to_ready_q_cache]
str r2, [r1, #___cpu_t_current_OFFSET]
str r2, [r1, #_kernel_offset_to_current]
#if defined(CONFIG_THREAD_LOCAL_STORAGE)
/* Grab the TLS pointer */
@@ -123,10 +121,10 @@ out_fp_inactive:
ldr r0, [r4]
/* Store TLS pointer in the "Process ID" register.
* TPIDRURW is used as a base pointer to all
* This register is used as a base pointer to all
* thread variables with offsets added by toolchain.
*/
mcr 15, 0, r0, c13, c0, 2
mcr 15, 0, r0, cr13, cr0, 3
#endif
#if defined(CONFIG_ARM_STORE_EXC_RETURN)
@@ -141,6 +139,11 @@ out_fp_inactive:
movs r3, #0
str r3, [r2, #_thread_offset_to_basepri]
_thread_irq_disabled:
/* load _kernel into r1 and current k_thread into r2 */
ldr r1, =_kernel
ldr r2, [r1, #_kernel_offset_to_current]
/* addr of callee-saved regs in thread in r0 */
ldr r0, =_thread_offset_to_callee_saved
add r0, r2
@@ -172,9 +175,9 @@ in_fp_inactive:
/* r2 contains k_thread */
mov r0, r2
/* Re-program dynamic memory map */
push {r0, lr}
push {r2, lr}
bl z_arm_configure_dynamic_mpu_regions
pop {r0, lr}
pop {r2, lr}
#endif
#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
@@ -214,8 +217,8 @@ SECTION_FUNC(TEXT, z_arm_svc)
cmp r0, #MODE_USR
bne svc_system_thread
get_cpu r0
ldr r0, [r0, #___cpu_t_current_OFFSET]
ldr r0, =_kernel
ldr r0, [r0, #_kernel_offset_to_current]
/* Save away user stack pointer */
cps #MODE_SYS
@@ -262,10 +265,10 @@ _vfp_not_enabled:
* Mark where to store the floating context for the undefined
* instruction handler
*/
get_cpu r2
ldr r0, [r2, #___cpu_t_fp_ctx_OFFSET]
ldr r2, =_kernel
ldr r0, [r2, #_kernel_offset_to_fp_ctx]
cmp r0, #0
streq sp, [r2, #___cpu_t_fp_ctx_OFFSET]
streq sp, [r2, #_kernel_offset_to_fp_ctx]
#endif /* CONFIG_FPU_SHARING */
mov ip, sp
@@ -279,16 +282,15 @@ _vfp_not_enabled:
push {lr}
/* Align stack at double-word boundary */
/* TODO: Question, why push {r2, r3} here */
and r3, sp, #4
sub sp, sp, r3
push {r2, r3}
/* Increment interrupt nesting count */
get_cpu r2
ldr r0, [r2, #___cpu_t_nested_OFFSET]
ldr r2, =_kernel
ldr r0, [r2, #_kernel_offset_to_nested]
add r0, r0, #1
str r0, [r2, #___cpu_t_nested_OFFSET]
str r0, [r2, #_kernel_offset_to_nested]
/* Get SVC number */
mrs r0, spsr
@@ -401,8 +403,8 @@ _do_syscall:
ldr r6, =K_SYSCALL_BAD
valid_syscall_id:
get_cpu r0
ldr r0, [r0, #___cpu_t_current_OFFSET]
ldr r0, =_kernel
ldr r0, [r0, #_kernel_offset_to_current]
ldr r1, [r0, #_thread_offset_to_mode]
bic r1, #1
/* Store (privileged) mode in thread's mode state variable */

View File

@@ -1,165 +0,0 @@
/*
* Copyright (c) 2023 Arm Limited (or its affiliates). All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Thread context switching for ARM Cortex-A and Cortex-R (AArch32)
*
* This module implements the routines necessary for thread context switching
* on ARM Cortex-A and Cortex-R CPUs.
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
#include <offsets_short.h>
#include <zephyr/kernel.h>
#include "macro_priv.inc"
_ASM_FILE_PROLOGUE
GTEXT(z_arm_svc)
GTEXT(z_arm_context_switch)
GTEXT(z_do_kernel_oops)
GTEXT(z_arm_do_syscall)
/*
* Routine to handle context switches
*
* This function is directly called either by _isr_wrapper() in case of
* preemption, or arch_switch() in case of cooperative switching.
*
* void z_arm_context_switch(struct k_thread *new, struct k_thread *old);
*/
SECTION_FUNC(TEXT, z_arm_context_switch)
ldr r2, =_thread_offset_to_callee_saved
add r2, r1, r2
stm r2, {r4-r11, sp, lr}
/* save current thread's exception depth */
get_cpu r2
ldrb r3, [r2, #_cpu_offset_to_exc_depth]
strb r3, [r1, #_thread_offset_to_exception_depth]
/* retrieve next thread's exception depth */
ldrb r3, [r0, #_thread_offset_to_exception_depth]
strb r3, [r2, #_cpu_offset_to_exc_depth]
/* save old thread into switch handle which is required by
* z_sched_switch_spin().
*
* Note that this step must be done after all relevant state is
* saved.
*/
dsb
str r1, [r1, #___thread_t_switch_handle_OFFSET]
#if defined(CONFIG_THREAD_LOCAL_STORAGE)
/* Grab the TLS pointer */
ldr r3, [r0, #_thread_offset_to_tls]
/* Store TLS pointer in the "Process ID" register.
* This register is used as a base pointer to all
* thread variables with offsets added by toolchain.
*/
mcr 15, 0, r3, c13, c0, 2
#endif
ldr r2, =_thread_offset_to_callee_saved
add r2, r0, r2
ldm r2, {r4-r11, sp, lr}
#if defined (CONFIG_ARM_MPU)
/* Re-program dynamic memory map */
push {r0, lr}
bl z_arm_configure_dynamic_mpu_regions
pop {r0, lr}
#endif
#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
push {lr}
bl z_thread_mark_switched_in
pop {lr}
#endif
bx lr
/**
*
* @brief Service call handler
*
* The service call (svc) is used in the following occasions:
* - Cooperative context switching
* - IRQ offloading
* - Kernel run-time exceptions
*
*/
SECTION_FUNC(TEXT, z_arm_svc)
z_arm_cortex_ar_enter_exc
/* Get SVC number */
cps #MODE_SVC
mrs r0, spsr
tst r0, #0x20
ldreq r1, [lr, #-4]
biceq r1, #0xff000000
beq demux
ldr r1, [lr, #-2]
and r1, #0xff
/*
* grab service call number:
* TODO 0: context switch
* 1: irq_offload (if configured)
* 2: kernel panic or oops (software generated fatal exception)
* TODO 3: system calls for memory protection
*/
demux:
cps #MODE_SYS
cmp r1, #_SVC_CALL_RUNTIME_EXCEPT
beq _oops
#ifdef CONFIG_IRQ_OFFLOAD
cmp r1, #_SVC_CALL_IRQ_OFFLOAD
beq offload
b inv
offload:
get_cpu r2
ldr r3, [r2, #___cpu_t_nested_OFFSET]
add r3, r3, #1
str r3, [r2, #___cpu_t_nested_OFFSET]
/* If not nested: switch to IRQ stack and save current sp on it. */
cmp r3, #1
bhi 1f
mov r0, sp
cps #MODE_IRQ
push {r0}
1:
blx z_irq_do_offload
b z_arm_cortex_ar_irq_done
#endif
b inv
_oops:
/*
* Pass the exception frame to z_do_kernel_oops. r0 contains the
* exception reason.
*/
mov r0, sp
bl z_do_kernel_oops
inv:
mov r0, #0 /* K_ERR_CPU_EXCEPTION */
mov r1, sp
bl z_arm_fatal_error
/* Return here only in case of recoverable error */
b z_arm_cortex_ar_exit_exc

View File

@@ -125,13 +125,6 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
* initial values in all other registers/thread entries are
* irrelevant.
*/
#if defined(CONFIG_USE_SWITCH)
extern void z_arm_cortex_ar_exit_exc(void);
thread->switch_handle = thread;
/* thread birth happens through the exception return path */
thread->arch.exception_depth = 1;
thread->callee_saved.lr = (uint32_t)z_arm_cortex_ar_exit_exc;
#endif
}
#if defined(CONFIG_MPU_STACK_GUARD) && defined(CONFIG_FPU) \

View File

@@ -13,8 +13,6 @@
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include "vector_table.h"
#include "offsets_short.h"
#include "macro_priv.inc"
_ASM_FILE_PROLOGUE
@@ -30,28 +28,4 @@ SECTION_SUBSEC_FUNC(exc_vector_table,_vector_table_section,_vector_table)
#else
ldr pc, =z_irq_spurious
#endif
#ifndef CONFIG_USE_SWITCH
ldr pc, =z_arm_nmi /* FIQ offset 0x1c */
#else
ldr pc,=z_irq_spurious
#endif
#ifdef CONFIG_USE_SWITCH
GTEXT(z_arm_cortex_ar_exit_exc)
SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_cortex_ar_exit_exc)
/* decrement exception depth */
get_cpu r2
ldrb r1, [r2, #_cpu_offset_to_exc_depth]
sub r1, r1, #1
strb r1, [r2, #_cpu_offset_to_exc_depth]
/*
* Restore r0-r3, r12, lr, lr_und and spsr_und from the exception stack
* and return to the current thread.
*/
ldmia sp, {r0-r3, r12, lr}^
add sp, #24
rfeia sp!
#endif

View File

@@ -40,7 +40,7 @@ GTEXT(z_arm_data_abort)
GTEXT(z_arm_pendsv)
GTEXT(z_arm_reserved)
GTEXT(z_prep_c)
GTEXT(z_arm_prep_c)
GTEXT(_isr_wrapper)
#else /* _ASMLANGUAGE */

View File

@@ -7,6 +7,7 @@ zephyr_library_sources(
fault.c
fault_s.S
fpu.c
irq_init.c
reset.S
scb.c
thread_abort.c
@@ -19,7 +20,6 @@ zephyr_library_sources(
cpu_idle.S
)
zephyr_library_sources_ifndef(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER irq_init.c)
zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr_wrapper.S)
zephyr_library_sources_ifdef(CONFIG_DEBUG_COREDUMP coredump.c)
zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE __aeabi_read_tp.S)

View File

@@ -78,6 +78,8 @@ config CPU_CORTEX_M7
select CPU_CORTEX_M
select ARMV7_M_ARMV8_M_MAINLINE
select ARMV7_M_ARMV8_M_FP if CPU_HAS_FPU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE
help
This option signifies the use of a Cortex-M7 CPU
@@ -169,7 +171,7 @@ config CPU_CORTEX_M_HAS_CMSE
config ARMV6_M_ARMV8_M_BASELINE
bool
select ATOMIC_OPERATIONS_C if !ARMV8_M_BASELINE
select ATOMIC_OPERATIONS_C
select ISA_THUMB2
help
This option signifies the use of an ARMv6-M processor
@@ -281,20 +283,7 @@ config ARMV8_1_M_MVEF
supporting the M-Profile Vector Extension (MVE) floating-point
instruction set.
config ARMV8_1_M_PMU
bool
help
This option is enabled when the CPU implements ARMv8-M Performance
Monitoring Unit (PMU).
config ARMV8_M_PMU_EVENTCNT
int "Number of event counters in the Performance Monitoring Unit"
depends on ARMV8_1_M_PMU
range 2 8
help
The number of event counters implemented.
menu "ARM Cortex-M0/M0+/M1/M3/M4/M7/M23/M33/M55 options"
menu "ARM Cortex-M0/M0+/M1/M3/M4/M7/M23/M33 options"
depends on ARMV6_M_ARMV8_M_BASELINE || ARMV7_M_ARMV8_M_MAINLINE
config GEN_ISR_TABLES

View File

@@ -81,24 +81,16 @@ SECTION_FUNC(TEXT, z_arm_cpu_idle_init)
bx lr
SECTION_FUNC(TEXT, arch_cpu_idle)
#if defined(CONFIG_TRACING) || \
defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK)
push {r0, lr}
#ifdef CONFIG_TRACING
push {r0, lr}
bl sys_trace_idle
#endif
#ifdef CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK
bl z_arm_on_enter_cpu_idle_prepare
#endif
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
pop {r0, r1}
mov lr, r1
#else
pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif
#endif /* CONFIG_TRACING */
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/*
@@ -142,24 +134,17 @@ SECTION_FUNC(TEXT, arch_cpu_idle)
bx lr
SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
#if defined(CONFIG_TRACING) || \
defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK)
push {r0, lr}
#ifdef CONFIG_TRACING
push {r0, lr}
bl sys_trace_idle
#endif
#ifdef CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK
bl z_arm_on_enter_cpu_idle_prepare
#endif
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
pop {r0, r1}
mov lr, r1
#else
pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif
#endif /* CONFIG_TRACING */
/*
* Lock PRIMASK while sleeping: wfe will still get interrupted by
* incoming interrupts but the CPU will not service them right away.

View File

@@ -863,7 +863,7 @@ static uint32_t fault_handle(z_arch_esf_t *esf, int fault, bool *recoverable)
break;
#if defined(CONFIG_ARM_SECURE_FIRMWARE)
case 7:
reason = secure_fault(esf);
secure_fault(esf);
break;
#endif /* CONFIG_ARM_SECURE_FIRMWARE */
case 12:

View File

@@ -32,8 +32,6 @@ extern void z_arm_reserved(void);
#define REG_FROM_IRQ(irq) (irq / NUM_IRQS_PER_REG)
#define BIT_FROM_IRQ(irq) (irq % NUM_IRQS_PER_REG)
#if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
void arch_irq_enable(unsigned int irq)
{
NVIC_EnableIRQ((IRQn_Type)irq);
@@ -92,8 +90,6 @@ void z_arm_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
NVIC_SetPriority((IRQn_Type)irq, prio);
}
#endif /* !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER) */
void z_arm_fatal_error(unsigned int reason, const z_arch_esf_t *esf);
/**

View File

@@ -97,24 +97,13 @@ _idle_state_cleared:
#endif /* CONFIG_PM */
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
bl z_soc_irq_get_active
#else
mrs r0, IPSR /* get exception number */
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
ldr r1, =16
subs r0, r1 /* get IRQ number */
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
push {r0}
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
lsls r0, #3 /* table is 8-byte wide */
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
sub r0, r0, #16 /* get IRQ number */
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
push {r0}
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
lsl r0, r0, #3 /* table is 8-byte wide */
#else
#error Unknown ARM architecture
@@ -127,11 +116,6 @@ _idle_state_cleared:
ldm r1!,{r0,r3} /* arg in r0, ISR in r3 */
blx r3 /* call ISR */
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
pop {r0}
bl z_soc_irq_eoi
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
#ifdef CONFIG_TRACING_ISR
bl sys_trace_isr_exit
#endif

View File

@@ -179,7 +179,7 @@ extern FUNC_NORETURN void z_cstart(void);
* This routine prepares for the execution of and runs C code.
*
*/
void z_prep_c(void)
void z_arm_prep_c(void)
{
relocate_vector_table();
#if defined(CONFIG_CPU_HAS_FPU)
@@ -187,12 +187,7 @@ void z_prep_c(void)
#endif
z_bss_zero();
z_data_copy();
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
/* Invoke SoC-specific interrupt controller initialization */
z_soc_irq_init();
#else
z_arm_interrupt_init();
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
z_cstart();
CODE_UNREACHABLE;
}

View File

@@ -53,7 +53,7 @@ GTEXT(arch_pm_s2ram_resume)
* MSP is to be set up to point to the one-and-only interrupt stack during
* later boot. That would not be possible if in use for running C code.
*
* When these steps are completed, jump to z_prep_c(), which will finish
* When these steps are completed, jump to z_arm_prep_c(), which will finish
* setting up the system for running C code.
*
*/
@@ -163,7 +163,7 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
/*
* 'bl' jumps the furthest of the branch instructions that are
* supported on all platforms. So it is used when jumping to z_prep_c
* supported on all platforms. So it is used when jumping to z_arm_prep_c
* (even though we do not intend to return).
*/
bl z_prep_c
bl z_arm_prep_c

View File

@@ -21,7 +21,6 @@
#include <cmsis_core.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/cache.h>
#include <zephyr/arch/cache.h>
#if defined(CONFIG_CPU_HAS_NXP_MPU)
#include <fsl_sysmpu.h>
@@ -121,27 +120,15 @@ void z_arm_init_arch_hw_at_boot(void)
* reset it to a known clean state.
*/
if (SCB->CCR & SCB_CCR_DC_Msk) {
/*
* Do not use sys_cache_data_disable at this point, but instead
* the architecture specific function. This ensures that the
* cache is disabled although CONFIG_CACHE_MANAGEMENT might be
* disabled.
*/
SCB_DisableDCache();
sys_cache_data_disable();
} else {
SCB_InvalidateDCache();
sys_cache_data_invd_all();
}
#endif /* CONFIG_DCACHE */
#if defined(CONFIG_ICACHE)
/*
* Reset I-Cache settings.
* Do not use sys_cache_data_disable at this point, but instead
* the architecture specific function. This ensures that the
* cache is disabled although CONFIG_CACHE_MANAGEMENT might be
* disabled.
*/
SCB_DisableICache();
/* Reset I-Cache settings. */
sys_cache_instr_disable();
#endif /* CONFIG_ICACHE */
#endif /* CONFIG_ARCH_CACHE */

View File

@@ -7,7 +7,7 @@
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <errno.h>
extern const int _k_neg_eagain;
/* The 'key' actually represents the BASEPRI register
* prior to disabling interrupts via the BASEPRI mechanism.
@@ -34,7 +34,7 @@ int arch_swap(unsigned int key)
{
/* store off key and return value */
_current->arch.basepri = key;
_current->arch.swap_return_value = -EAGAIN;
_current->arch.swap_return_value = _k_neg_eagain;
/* set pending bit to make sure we will take a PendSV exception */
SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk;

View File

@@ -33,3 +33,9 @@ endif()
zephyr_link_libraries_ifdef(CONFIG_ARM_FIRMWARE_USES_SECURE_ENTRY_FUNCS
${CMAKE_BINARY_DIR}/${CONFIG_ARM_ENTRY_VENEERS_LIB_NAME}
)
if(CONFIG_ARM_SECURE_FIRMWARE)
zephyr_library()
zephyr_library_sources(arm_core_tz.c)
endif()

View File

@@ -0,0 +1,166 @@
/*
* Copyright (c) 2018 Nordic Semiconductor ASA.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <cmsis_core.h>
#include <cortex_m/tz.h>
#include <cortex_m/exc.h>
static void configure_nonsecure_vtor_offset(uint32_t vtor_ns)
{
SCB_NS->VTOR = vtor_ns;
}
static void configure_nonsecure_msp(uint32_t msp_ns)
{
__TZ_set_MSP_NS(msp_ns);
}
static void configure_nonsecure_psp(uint32_t psp_ns)
{
__TZ_set_PSP_NS(psp_ns);
}
static void configure_nonsecure_control(uint32_t spsel_ns, uint32_t npriv_ns)
{
uint32_t control_ns = __TZ_get_CONTROL_NS();
/* Only nPRIV and SPSEL bits are banked between security states. */
control_ns &= ~(CONTROL_SPSEL_Msk | CONTROL_nPRIV_Msk);
if (spsel_ns) {
control_ns |= CONTROL_SPSEL_Msk;
}
if (npriv_ns) {
control_ns |= CONTROL_nPRIV_Msk;
}
__TZ_set_CONTROL_NS(control_ns);
}
#if defined(CONFIG_ARMV8_M_MAINLINE)
/* Only ARMv8-M Mainline implementations have Non-Secure instances of
* Stack Pointer Limit registers.
*/
void tz_nonsecure_msplim_set(uint32_t val)
{
__TZ_set_MSPLIM_NS(val);
}
void tz_nonsecure_psplim_set(uint32_t val)
{
__TZ_set_PSPLIM_NS(val);
}
#endif /* CONFIG_ARMV8_M_MAINLINE */
void tz_nonsecure_state_setup(const tz_nonsecure_setup_conf_t *p_ns_conf)
{
configure_nonsecure_vtor_offset(p_ns_conf->vtor_ns);
configure_nonsecure_msp(p_ns_conf->msp_ns);
configure_nonsecure_psp(p_ns_conf->psp_ns);
/* Select which stack-pointer to use (MSP or PSP) and
* the privilege level for thread mode.
*/
configure_nonsecure_control(p_ns_conf->control_ns.spsel,
p_ns_conf->control_ns.npriv);
}
void tz_nbanked_exception_target_state_set(int secure_state)
{
uint32_t aircr_payload = SCB->AIRCR & (~(SCB_AIRCR_VECTKEY_Msk));
if (secure_state) {
aircr_payload &= ~(SCB_AIRCR_BFHFNMINS_Msk);
} else {
aircr_payload |= SCB_AIRCR_BFHFNMINS_Msk;
}
SCB->AIRCR = ((AIRCR_VECT_KEY_PERMIT_WRITE << SCB_AIRCR_VECTKEY_Pos)
& SCB_AIRCR_VECTKEY_Msk)
| aircr_payload;
}
void tz_nonsecure_exception_prio_config(int secure_boost)
{
uint32_t aircr_payload = SCB->AIRCR & (~(SCB_AIRCR_VECTKEY_Msk));
if (secure_boost) {
aircr_payload |= SCB_AIRCR_PRIS_Msk;
} else {
aircr_payload &= ~(SCB_AIRCR_PRIS_Msk);
}
SCB->AIRCR = ((AIRCR_VECT_KEY_PERMIT_WRITE << SCB_AIRCR_VECTKEY_Pos)
& SCB_AIRCR_VECTKEY_Msk)
| aircr_payload;
}
void tz_nonsecure_system_reset_req_block(int block)
{
uint32_t aircr_payload = SCB->AIRCR & (~(SCB_AIRCR_VECTKEY_Msk));
if (block) {
aircr_payload |= SCB_AIRCR_SYSRESETREQS_Msk;
} else {
aircr_payload &= ~(SCB_AIRCR_SYSRESETREQS_Msk);
}
SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)
& SCB_AIRCR_VECTKEY_Msk)
| aircr_payload;
}
#if defined(CONFIG_ARMV7_M_ARMV8_M_FP)
void tz_nonsecure_fpu_access_enable(void)
{
SCB->NSACR |=
(1UL << SCB_NSACR_CP10_Pos) | (1UL << SCB_NSACR_CP11_Pos);
}
#endif /* CONFIG_ARMV7_M_ARMV8_M_FP */
void tz_sau_configure(int enable, int allns)
{
if (enable) {
TZ_SAU_Enable();
} else {
TZ_SAU_Disable();
if (allns) {
SAU->CTRL |= SAU_CTRL_ALLNS_Msk;
} else {
SAU->CTRL &= ~(SAU_CTRL_ALLNS_Msk);
}
}
}
uint32_t tz_sau_number_of_regions_get(void)
{
return SAU->TYPE & SAU_TYPE_SREGION_Msk;
}
#if defined(CONFIG_CPU_HAS_ARM_SAU)
#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
int tz_sau_region_configure_enable(tz_sau_conf_t *p_sau_conf)
{
uint32_t regions = tz_sau_number_of_regions_get();
if ((p_sau_conf->region_num == 0) ||
(p_sau_conf->region_num > (regions - 1))) {
return 0;
}
/* Valid region */
SAU->RNR = p_sau_conf->region_num & SAU_RNR_REGION_Msk;
if (p_sau_conf->enable) {
SAU->RLAR = SAU_RLAR_ENABLE_Msk
| (SAU_RLAR_LADDR_Msk & p_sau_conf->limit_addr)
| (p_sau_conf->nsc ? SAU_RLAR_NSC_Msk : 0);
SAU->RBAR = p_sau_conf->base_addr & SAU_RBAR_BADDR_Msk;
} else {
SAU->RLAR &= ~(SAU_RLAR_ENABLE_Msk);
}
return 1;
}
#else
#error "ARM SAU not implemented"
#endif
#endif /* CONFIG_CPU_HAS_ARM_SAU */

View File

@@ -50,7 +50,7 @@ GTEXT(z_arm_debug_monitor)
GTEXT(z_arm_pendsv)
GTEXT(z_arm_exc_spurious)
GTEXT(z_prep_c)
GTEXT(z_arm_prep_c)
#if defined(CONFIG_GEN_ISR_TABLES)
GTEXT(_isr_wrapper)
#endif /* CONFIG_GEN_ISR_TABLES */

View File

@@ -1,37 +0,0 @@
/*
* Copyright (c) 2023 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/llext/elf.h>
#include <zephyr/llext/llext.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(elf, CONFIG_LLEXT_LOG_LEVEL);
/**
* @brief Architecture specific function for relocating partially linked (static) elf
*
* Elf files contain a series of relocations described in a section. These relocation
* instructions are architecture specific and each architecture supporting extensions
* must implement this.
*
* The relocation codes for arm are well documented
* https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst#relocation
*/
void arch_elf_relocate(elf_rela_t *rel, uintptr_t opaddr, uintptr_t opval)
{
elf_word reloc_type = ELF32_R_TYPE(rel->r_info);
switch (reloc_type) {
case R_ARM_ABS32:
/* Update the absolute address of a load/store instruction */
*((uint32_t *)opaddr) = (uint32_t)opval;
break;
default:
LOG_DBG("Unsupported ARM elf relocation type %d at address %lx",
reloc_type, opaddr);
break;
}
}

View File

@@ -17,7 +17,6 @@
#include <zephyr/logging/log.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_EXCEPTION_DEBUG
static void esf_dump(const z_arch_esf_t *esf)
{
LOG_ERR("r0/a1: 0x%08x r1/a2: 0x%08x r2/a3: 0x%08x",
@@ -64,15 +63,13 @@ static void esf_dump(const z_arch_esf_t *esf)
LOG_ERR("Faulting instruction address (r15/pc): 0x%08x",
esf->basic.pc);
}
#endif /* CONFIG_EXCEPTION_DEBUG */
void z_arm_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
#ifdef CONFIG_EXCEPTION_DEBUG
if (esf != NULL) {
esf_dump(esf);
}
#endif /* CONFIG_EXCEPTION_DEBUG */
z_fatal_error(reason, esf);
}

View File

@@ -1,225 +0,0 @@
/*
* Copyright (c) 2023 Marek Vedral <vedrama5@fel.cvut.cz>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/arch/arm/gdbstub.h>
#include <zephyr/debug/gdbstub.h>
/* Position of each register in the packet - n-th register in the ctx.registers array needs to be
* the packet_pos[n]-th byte of the g (read all registers) packet. See struct arm_register_names in
* GDB file gdb/arm-tdep.c, which defines these positions.
*/
static const int packet_pos[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 41};
/* Required struct */
static struct gdb_ctx ctx;
/* Return true if BKPT instruction caused the current entry */
static int is_bkpt(unsigned int exc_cause)
{
int ret = 0;
if (exc_cause == GDB_EXCEPTION_BREAKPOINT) {
/* Get the instruction */
unsigned int instr = sys_read32(ctx.registers[PC]);
/* Try to check the instruction encoding */
int ist = ((ctx.registers[SPSR] & BIT(SPSR_J)) >> (SPSR_J - 1)) |
((ctx.registers[SPSR] & BIT(SPSR_T)) >> SPSR_T);
if (ist == SPSR_ISETSTATE_ARM) {
/* ARM instruction set state */
ret = ((instr & 0xFF00000) == 0x1200000) && ((instr & 0xF0) == 0x70);
} else if (ist != SPSR_ISETSTATE_JAZELLE) {
/* Thumb or ThumbEE encoding */
ret = ((instr & 0xFF00) == 0xBE00);
}
}
return ret;
}
/* Wrapper function to save and restore execution c */
void z_gdb_entry(z_arch_esf_t *esf, unsigned int exc_cause)
{
/* Disable the hardware breakpoint in case it was set */
__asm__ volatile("mcr p14, 0, %0, c0, c0, 5" ::"r"(0x0) :);
ctx.exception = exc_cause;
/* save the registers */
ctx.registers[R0] = esf->basic.r0;
ctx.registers[R1] = esf->basic.r1;
ctx.registers[R2] = esf->basic.r2;
ctx.registers[R3] = esf->basic.r3;
/* The EXTRA_EXCEPTION_INFO kernel option ensures these regs are set */
ctx.registers[R4] = esf->extra_info.callee->v1;
ctx.registers[R5] = esf->extra_info.callee->v2;
ctx.registers[R6] = esf->extra_info.callee->v3;
ctx.registers[R7] = esf->extra_info.callee->v4;
ctx.registers[R8] = esf->extra_info.callee->v5;
ctx.registers[R9] = esf->extra_info.callee->v6;
ctx.registers[R10] = esf->extra_info.callee->v7;
ctx.registers[R11] = esf->extra_info.callee->v8;
ctx.registers[R13] = esf->extra_info.callee->psp;
ctx.registers[R12] = esf->basic.r12;
ctx.registers[LR] = esf->basic.lr;
ctx.registers[PC] = esf->basic.pc;
ctx.registers[SPSR] = esf->basic.xpsr;
/* True if entering after a BKPT instruction */
const int bkpt_entry = is_bkpt(exc_cause);
z_gdb_main_loop(&ctx);
/* The registers part of EXTRA_EXCEPTION_INFO are read-only - the excpetion return code
* does not restore them, thus we don't need to do so here
*/
esf->basic.r0 = ctx.registers[R0];
esf->basic.r1 = ctx.registers[R1];
esf->basic.r2 = ctx.registers[R2];
esf->basic.r3 = ctx.registers[R3];
esf->basic.r12 = ctx.registers[R12];
esf->basic.lr = ctx.registers[LR];
esf->basic.pc = ctx.registers[PC];
esf->basic.xpsr = ctx.registers[SPSR];
/* TODO: restore regs from extra exc. info */
if (bkpt_entry) {
/* Apply this offset, so that the process won't be affected by the
* BKPT instruction
*/
esf->basic.pc += 0x4;
}
esf->basic.xpsr = ctx.registers[SPSR];
}
void arch_gdb_init(void)
{
uint32_t reg_val;
/* Enable the monitor debug mode */
__asm__ volatile("mrc p14, 0, %0, c0, c2, 2" : "=r"(reg_val)::);
reg_val |= DBGDSCR_MONITOR_MODE_EN;
__asm__ volatile("mcr p14, 0, %0, c0, c2, 2" ::"r"(reg_val) :);
/* Generate the Prefetch abort exception */
__asm__ volatile("BKPT");
}
void arch_gdb_continue(void)
{
/* No need to do anything, return to the code. */
}
void arch_gdb_step(void)
{
/* Set the hardware breakpoint */
uint32_t reg_val = ctx.registers[PC];
/* set BVR (Breakpoint value register) to PC, make sure it is word aligned */
reg_val &= ~(0x3);
__asm__ volatile("mcr p14, 0, %0, c0, c0, 4" ::"r"(reg_val) :);
reg_val = 0;
/* Address mismatch */
reg_val |= (DBGDBCR_MEANING_ADDR_MISMATCH & DBGDBCR_MEANING_MASK) << DBGDBCR_MEANING_SHIFT;
/* Match any other instruction */
reg_val |= (0xF & DBGDBCR_BYTE_ADDR_MASK) << DBGDBCR_BYTE_ADDR_SHIFT;
/* Breakpoint enable */
reg_val |= DBGDBCR_BRK_EN_MASK;
__asm__ volatile("mcr p14, 0, %0, c0, c0, 5" ::"r"(reg_val) :);
}
size_t arch_gdb_reg_readall(struct gdb_ctx *c, uint8_t *buf, size_t buflen)
{
int ret = 0;
/* All other registers are not supported */
memset(buf, 'x', buflen);
for (int i = 0; i < GDB_NUM_REGS; i++) {
/* offset inside the packet */
int pos = packet_pos[i] * 8;
int r = bin2hex((const uint8_t *)(c->registers + i), 4, buf + pos, buflen - pos);
/* remove the newline character placed by the bin2hex function */
buf[pos + 8] = 'x';
if (r == 0) {
ret = 0;
break;
}
ret += r;
}
if (ret) {
/* Since we don't support some floating point registers, set the packet size
* manually
*/
ret = GDB_READALL_PACKET_SIZE;
}
return ret;
}
size_t arch_gdb_reg_writeall(struct gdb_ctx *c, uint8_t *hex, size_t hexlen)
{
int ret = 0;
for (unsigned int i = 0; i < hexlen; i += 8) {
if (hex[i] != 'x') {
/* check if the stub supports this register */
for (unsigned int j = 0; j < GDB_NUM_REGS; j++) {
if (packet_pos[j] != i) {
continue;
}
int r = hex2bin(hex + i * 8, 8, (uint8_t *)(c->registers + j), 4);
if (r == 0) {
return 0;
}
ret += r;
}
}
}
return ret;
}
size_t arch_gdb_reg_readone(struct gdb_ctx *c, uint8_t *buf, size_t buflen, uint32_t regno)
{
/* Reading four bytes (could be any return value except 0, which would indicate an error) */
int ret = 4;
/* Fill the buffer with 'x' in case the stub does not support the required register */
memset(buf, 'x', 8);
if (regno == SPSR_REG_IDX) {
/* The SPSR register is at the end, we have to check separately */
ret = bin2hex((uint8_t *)(c->registers + GDB_NUM_REGS - 1), 4, buf, buflen);
} else {
/* Check which of our registers corresponds to regnum */
for (int i = 0; i < GDB_NUM_REGS; i++) {
if (packet_pos[i] == regno) {
ret = bin2hex((uint8_t *)(c->registers + i), 4, buf, buflen);
break;
}
}
}
return ret;
}
size_t arch_gdb_reg_writeone(struct gdb_ctx *c, uint8_t *hex, size_t hexlen, uint32_t regno)
{
int ret = 0;
/* Set the value of a register */
if (hexlen != 8) {
return ret;
}
if (regno < (GDB_NUM_REGS - 1)) {
/* Again, check the corresponding register index */
for (int i = 0; i < GDB_NUM_REGS; i++) {
if (packet_pos[i] == regno) {
ret = hex2bin(hex, hexlen, (uint8_t *)(c->registers + i), 4);
break;
}
}
} else if (regno == SPSR_REG_IDX) {
ret = hex2bin(hex, hexlen, (uint8_t *)(c->registers + GDB_NUM_REGS - 1), 4);
}
return ret;
}

View File

@@ -26,7 +26,7 @@
#include <zephyr/logging/log.h>
#include <zephyr/sys/__assert.h>
#include <zephyr/sys/util.h>
#include <zephyr/kernel/mm.h>
#include <zephyr/sys/mem_manage.h>
#include <zephyr/sys/barrier.h>
#include <cmsis_core.h>
@@ -81,14 +81,7 @@ static const struct arm_mmu_flat_range mmu_zephyr_ranges[] = {
.start = (uint32_t)__text_region_start,
.end = (uint32_t)__text_region_end,
.attrs = MT_NORMAL | MATTR_SHARED |
/* The code needs to have write permission in order for
* software breakpoints (which modify instructions) to work
*/
#if defined(CONFIG_GDBSTUB)
MPERM_R | MPERM_X | MPERM_W |
#else
MPERM_R | MPERM_X |
#endif
MATTR_CACHE_OUTER_WB_nWA | MATTR_CACHE_INNER_WB_nWA |
MATTR_MAY_MAP_L1_SECTION},
@@ -868,7 +861,7 @@ int z_arm_mmu_init(void)
* @param phys 32-bit physical address.
* @param size Size (in bytes) of the memory area to map.
* @param flags Memory attributes & permissions. Comp. K_MEM_...
* flags in kernel/mm.h.
* flags in sys/mem_manage.h.
* @retval 0 on success, -EINVAL if an invalid parameter is detected.
*/
static int __arch_mem_map(void *virt, uintptr_t phys, size_t size, uint32_t flags)
@@ -946,7 +939,7 @@ static int __arch_mem_map(void *virt, uintptr_t phys, size_t size, uint32_t flag
* @param phys 32-bit physical address.
* @param size Size (in bytes) of the memory area to map.
* @param flags Memory attributes & permissions. Comp. K_MEM_...
* flags in kernel/mm.h.
* flags in sys/mem_manage.h.
*/
void arch_mem_map(void *virt, uintptr_t phys, size_t size, uint32_t flags)
{

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