release: Tag 1.8.0-rc3

Signed-off-by: Anas Nashif <anas.nashif@intel.com>

.gitlint

@@ -35,7 +35,7 @@ words=wip,title
 # (e.g. title-must-not-contain-word).
 #regex=^US[0-9]*
 
-[B1]
+[max-line-length-with-exceptions]
 # B1 = body-max-line-length
 line-length=72
 

Makefile

@@ -1,7 +1,7 @@
 VERSION_MAJOR 	   = 1
-VERSION_MINOR 	   = 7
-PATCHLEVEL 	   = 99
-VERSION_RESERVED   = 0
+VERSION_MINOR 	   = 8
+PATCHLEVEL 	   = 0
+VERSION_RESERVED   = rc3
 EXTRAVERSION       =
 NAME 		   = Zephyr Kernel
 
@@ -27,9 +27,11 @@ UNAME := $(shell uname)
 ifeq (MSYS, $(findstring MSYS, $(UNAME)))
 DISABLE_TRYRUN=y
 HOST_OS=MSYS
+NATIVE_PWD_OPT=-W
 else ifeq (MINGW, $(findstring MINGW, $(UNAME)))
 HOST_OS=MINGW
 PWD_OPT=-W
+NATIVE_PWD_OPT=-W
 DISABLE_TRYRUN=y
 CPATH ?= $(MIGW_DIR)/include
 LIBRARY_PATH ?= $(MINGW_DIR)/lib
@@ -39,7 +41,7 @@ HOST_OS=Linux
 else ifeq (Darwin, $(findstring Darwin, $(UNAME)))
 HOST_OS=Darwin
 endif
-export HOST_OS
+export HOST_OS NATIVE_PWD_OPT
 
 # Avoid funny character set dependencies
 unexport LC_ALL
@@ -577,6 +579,17 @@ ifeq ($(dot-config),1)
 # oldconfig if changes are detected.
 -include include/config/auto.conf.cmd
 
+# Read in DTS derived configuration, if it exists
+#
+# We check to see if the ARCH is correctly sourced before doing the -include
+# The reason for this is due to implicit rules kicking in to create this file.
+# If this occurs before the above auto.conf is sourced correctly, the build
+# will iterate over the dts conf file 2-3 times before settling down to the
+# correct output.
+ifneq ($(ARCH),)
+-include include/generated/generated_dts_board.conf
+endif
+
 # To avoid any implicit rule to kick in, define an empty command
 $(KCONFIG_CONFIG) include/config/auto.conf.cmd: ;
 
@@ -950,28 +963,46 @@ zephyr: $(zephyr-deps) $(KERNEL_BIN_NAME)
 ifeq ($(CONFIG_HAS_DTS),y)
 define filechk_generated_dts_board.h
 	(echo "/* WARNING. THIS FILE IS AUTO-GENERATED. DO NOT MODIFY! */"; \
-		$(ZEPHYR_BASE)/scripts/extract_dts_includes.py dts/$(ARCH)/$(BOARD_NAME).dts_compiled $(ZEPHYR_BASE)/dts/$(ARCH)/yaml; \
 		if test -e $(ZEPHYR_BASE)/dts/$(ARCH)/$(BOARD_NAME).fixup; then \
-			echo; echo; \
-			echo "/* Following definitions fixup the generated include */"; \
-			echo; \
-			cat $(ZEPHYR_BASE)/dts/$(ARCH)/$(BOARD_NAME).fixup; \
+			$(ZEPHYR_BASE)/scripts/extract_dts_includes.py \
+				-d dts/$(ARCH)/$(BOARD_NAME).dts_compiled \
+				-y $(ZEPHYR_BASE)/dts/$(ARCH)/yaml \
+				-f $(ZEPHYR_BASE)/dts/$(ARCH)/$(BOARD_NAME).fixup; \
+		else \
+			$(ZEPHYR_BASE)/scripts/extract_dts_includes.py \
+				-d dts/$(ARCH)/$(BOARD_NAME).dts_compiled \
+				-y $(ZEPHYR_BASE)/dts/$(ARCH)/yaml; \
 		fi; \
 		)
 endef
+define filechk_generated_dts_board.conf
+	(echo "# WARNING. THIS FILE IS AUTO-GENERATED. DO NOT MODIFY!"; \
+		$(ZEPHYR_BASE)/scripts/extract_dts_includes.py \
+		-d dts/$(ARCH)/$(BOARD_NAME).dts_compiled \
+		-y $(ZEPHYR_BASE)/dts/$(ARCH)/yaml -k; \
+		)
+endef
 else
 define filechk_generated_dts_board.h
 	(echo "/* WARNING. THIS FILE IS AUTO-GENERATED. DO NOT MODIFY! */";)
 endef
+define filechk_generated_dts_board.conf
+	(echo "# WARNING. THIS FILE IS AUTO-GENERATED. DO NOT MODIFY!";)
+endef
 endif
 
-
 include/generated/generated_dts_board.h: include/config/auto.conf FORCE
 ifeq ($(CONFIG_HAS_DTS),y)
 	$(Q)$(MAKE) $(build)=dts/$(ARCH)
 endif
 	$(call filechk,generated_dts_board.h)
 
+include/generated/generated_dts_board.conf: include/config/auto.conf FORCE
+ifeq ($(CONFIG_HAS_DTS),y)
+	$(Q)$(MAKE) $(build)=dts/$(ARCH)
+endif
+	$(call filechk,generated_dts_board.conf)
+
 dts: include/generated/generated_dts_board.h
 
 # The actual objects are generated when descending,
@@ -1088,7 +1119,8 @@ depend dep:
 # Directories & files removed with 'make clean'
 CLEAN_DIRS  += $(MODVERDIR)
 
-CLEAN_FILES += 	include/generated/generated_dts_board.h \
+CLEAN_FILES += 	include/generated/generated_dts_board.conf \
+		include/generated/generated_dts_board.h \
 		.old_version .tmp_System.map .tmp_version \
 		.tmp_* System.map *.lnk *.map *.elf *.lst \
 		*.bin *.hex *.stat *.strip staticIdt.o linker.cmd \

arch/arm/core/cortex_m/mpu/Kconfig

@@ -24,7 +24,7 @@ config MPU_STACK_GUARD
 config ARM_MPU
 	bool "ARM MPU Support"
 	depends on CPU_HAS_MPU
-	depends on SOC_FAMILY_ARM || SOC_FAMILY_STM32
+	depends on SOC_FAMILY_ARM || SOC_FAMILY_STM32 || SOC_FAMILY_NRF5
 	select ARM_CORE_MPU
 	default n
 	help

arch/arm/core/cortex_m/mpu/arm_mpu.c

@@ -64,7 +64,8 @@ static void _region_init(u32_t index, u32_t region_addr,
 	/* Select the region you want to access */
 	ARM_MPU_DEV->rnr = index;
 	/* Configure the region */
-	ARM_MPU_DEV->rbar = region_addr | REGION_VALID | index;
+	ARM_MPU_DEV->rbar = (region_addr & REGION_BASE_ADDR_MASK)
+				| REGION_VALID | index;
 	ARM_MPU_DEV->rasr = region_attr | REGION_ENABLE;
 }
 

arch/arm/core/cortex_m/mpu/nxp_mpu.c

@@ -13,24 +13,32 @@
 #include <logging/sys_log.h>
 #include <misc/__assert.h>
 
-static inline u8_t _get_num_regions(void)
-{
-	u32_t type = (SYSMPU->CESR & SYSMPU_CESR_NRGD_MASK)
-			>> SYSMPU_CESR_NRGD_SHIFT;
+#define STACK_GUARD_REGION_SIZE 32
 
+/* NXP MPU Enabled state */
+static u8_t nxp_mpu_enabled;
+
+/**
+ * This internal function is utilized by the MPU driver to parse the intent
+ * type (i.e. THREAD_STACK_REGION) and return the correct parameter set.
+ */
+static inline u32_t _get_region_attr_by_type(u32_t type)
+{
 	switch (type) {
-	case 0:
-		return 8;
-	case 1:
-		return 12;
-	case 2:
-		return 16;
+	case THREAD_STACK_REGION:
+		return 0;
+	case THREAD_STACK_GUARD_REGION:
+		/* The stack guard region has to be not accessible */
+		return REGION_RO_ATTR;
 	default:
-		__ASSERT(0, "Unsupported MPU configuration.");
+		/* Size 0 region */
 		return 0;
 	}
+}
 
-	return NXP_MPU_REGION_NUMBER;
+static inline u8_t _get_num_regions(void)
+{
+	return FSL_FEATURE_SYSMPU_DESCRIPTOR_COUNT;
 }
 
 static void _region_init(u32_t index, u32_t region_base,
@@ -48,6 +56,108 @@ static void _region_init(u32_t index, u32_t region_base,
 		    SYSMPU->WORD[index][3]);
 }
 
+/* ARM Core MPU Driver API Implementation for NXP MPU */
+
+/**
+ * @brief enable the MPU
+ */
+void arm_core_mpu_enable(void)
+{
+	if (nxp_mpu_enabled == 0) {
+		/* Enable MPU */
+		SYSMPU->CESR |= SYSMPU_CESR_VLD_MASK;
+
+		nxp_mpu_enabled = 1;
+	}
+}
+
+/**
+ * @brief disable the MPU
+ */
+void arm_core_mpu_disable(void)
+{
+	if (nxp_mpu_enabled == 1) {
+		/* Disable MPU */
+		SYSMPU->CESR &= ~SYSMPU_CESR_VLD_MASK;
+		/* Clear Interrupts */
+		SYSMPU->CESR |=  SYSMPU_CESR_SPERR_MASK;
+
+		nxp_mpu_enabled = 0;
+	}
+}
+
+/**
+ * @brief configure the base address and size for an MPU region
+ *
+ * @param   type    MPU region type
+ * @param   base    base address in RAM
+ * @param   size    size of the region
+ */
+void arm_core_mpu_configure(u8_t type, u32_t base, u32_t size)
+{
+	SYS_LOG_DBG("Region info: 0x%x 0x%x", base, size);
+	/*
+	 * The new MPU regions are are allocated per type after the statically
+	 * configured regions.
+	 */
+	u32_t region_index = mpu_config.num_regions + type;
+	u32_t region_attr = _get_region_attr_by_type(type);
+	u32_t last_region = _get_num_regions() - 1;
+
+	/*
+	 * The NXP MPU manages the permissions of the overlapping regions
+	 * doing the logic OR in between them, hence they can't be used
+	 * for stack/stack guard protection. For this reason the last region of
+	 * the MPU will be reserved.
+	 *
+	 * A consequence of this is that the SRAM is splitted in different
+	 * regions. In example if THREAD_STACK_GUARD_REGION is selected:
+	 * - SRAM before THREAD_STACK_GUARD_REGION: RW
+	 * - SRAM THREAD_STACK_GUARD_REGION: RO
+	 * - SRAM after THREAD_STACK_GUARD_REGION: RW
+	 */
+	/* NXP MPU supports up to 16 Regions */
+	if (region_index > _get_num_regions() - 2) {
+		return;
+	}
+
+	/* Configure SRAM_0 region */
+	/*
+	 * The mpu_config.sram_region contains the index of the region in
+	 * the mpu_config.mpu_regions array but the region 0 on the NXP MPU
+	 * is the background region, so on this MPU the regions are mapped
+	 * starting from 1, hence the mpu_config.sram_region on the data
+	 * structure is mapped on the mpu_config.sram_region + 1 region of
+	 * the MPU.
+	 */
+	_region_init(mpu_config.sram_region + 1,
+		     mpu_config.mpu_regions[mpu_config.sram_region].base,
+		     ENDADDR_ROUND(base),
+		     mpu_config.mpu_regions[mpu_config.sram_region].attr);
+
+	switch (type) {
+	case THREAD_STACK_REGION:
+		break;
+	case THREAD_STACK_GUARD_REGION:
+		_region_init(region_index, base,
+			     ENDADDR_ROUND(base + STACK_GUARD_REGION_SIZE),
+			     region_attr);
+		break;
+	default:
+		break;
+	}
+
+	/* Configure SRAM_1 region */
+	_region_init(last_region,
+		     base + STACK_GUARD_REGION_SIZE,
+		     ENDADDR_ROUND(
+			    mpu_config.mpu_regions[mpu_config.sram_region].end),
+		     mpu_config.mpu_regions[mpu_config.sram_region].attr);
+
+}
+
+/* NXP MPU Driver Initial Setup */
+
 /*
  * @brief MPU default configuration
  *
@@ -75,6 +185,12 @@ static void _nxp_mpu_config(void)
 	/* Disable Region 0 */
 	SYSMPU->WORD[0][2] = 0;
 
+	SYS_LOG_DBG("[0] 0x%08x 0x%08x 0x%08x 0x%08x",
+		    SYSMPU->WORD[0][0],
+		    SYSMPU->WORD[0][1],
+		    SYSMPU->WORD[0][2],
+		    SYSMPU->WORD[0][3]);
+
 	/*
 	 * Configure regions:
 	 * r_index starts from 0 but is passed to region_init as r_index + 1,
@@ -90,6 +206,8 @@ static void _nxp_mpu_config(void)
 	/* Enable MPU */
 	SYSMPU->CESR |= SYSMPU_CESR_VLD_MASK;
 
+	nxp_mpu_enabled = 1;
+
 	/* Make sure that all the registers are set before proceeding */
 	__DSB();
 	__ISB();

arch/arm/core/cortex_m/vector_table.S

@@ -47,7 +47,7 @@ SECTION_SUBSEC_FUNC(exc_vector_table,_vector_table_section,_vector_table)
     .word __reserved
     .word __reserved
     .word __reserved
-    .word __reserved	/* SVC not used for now (PendSV used instead) */
+    .word __svc
     .word __reserved
 #elif defined(CONFIG_ARMV7_M)
     .word __mpu_fault

arch/arm/core/cortex_m/vector_table.h

@@ -39,6 +39,7 @@ GTEXT(__reset)
 GTEXT(__nmi)
 GTEXT(__hard_fault)
 #if defined(CONFIG_ARMV6_M)
+GTEXT(__svc)
 #elif defined(CONFIG_ARMV7_M)
 GTEXT(__mpu_fault)
 GTEXT(__bus_fault)

arch/arm/core/exc_exit.S

@@ -61,7 +61,12 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, _IntExit)
 #ifdef CONFIG_TICKLESS_KERNEL
     push {lr}
     bl _update_time_slice_before_swap
+#if defined(CONFIG_ARMV6_M)
+    pop {r0}
+    mov lr, r0
+#else
     pop {lr}
+#endif /* CONFIG_ARMV6_M */
 #endif
 
 /**

arch/arm/core/irq_offload.c

@@ -22,9 +22,17 @@ void _irq_do_offload(void)
 
 void irq_offload(irq_offload_routine_t routine, void *parameter)
 {
-	int key;
+#if defined(CONFIG_ARMV6_M) && defined(CONFIG_ASSERT)
+	/* Cortex M0 hardfaults if you make a SVC call with interrupts
+	 * locked.
+	 */
+	unsigned int key;
 
-	key = irq_lock();
+	__asm__ volatile("mrs %0, PRIMASK;" : "=r" (key) : : "memory");
+	__ASSERT(key == 0, "irq_offload called with interrupts locked\n");
+#endif
+
+	k_sched_lock();
 	offload_routine = routine;
 	offload_param = parameter;
 
@@ -34,6 +42,5 @@ void irq_offload(irq_offload_routine_t routine, void *parameter)
 			  : "memory");
 
 	offload_routine = NULL;
-
-	irq_unlock(key);
+	k_sched_unlock();
 }

arch/arm/core/swap.S

@@ -20,12 +20,7 @@
 _ASM_FILE_PROLOGUE
 
 GTEXT(__swap)
-#if defined(CONFIG_ARMV6_M)
-#elif defined(CONFIG_ARMV7_M)
 GTEXT(__svc)
-#else
-#error Unknown ARM architecture
-#endif /* CONFIG_ARMV6_M */
 GTEXT(__pendsv)
 GTEXT(_do_kernel_oops)
 GDATA(_k_neg_eagain)
@@ -217,6 +212,52 @@ _thread_irq_disabled:
     bx lr
 
 #if defined(CONFIG_ARMV6_M)
+SECTION_FUNC(TEXT, __svc)
+    /* Use EXC_RETURN state to find out if stack frame is on the
+     * MSP or PSP
+     */
+    ldr r0, =0x4
+    mov r1, lr
+    tst r1, r0
+    beq _stack_frame_msp
+    mrs r0, PSP
+    bne _stack_frame_endif
+_stack_frame_msp:
+    mrs r0, MSP
+_stack_frame_endif:
+
+    /* Figure out what SVC call number was invoked */
+    ldr r1, [r0, #24]   /* grab address of PC from stack frame */
+    /* SVC is a two-byte instruction, point to it and read  encoding */
+    subs r1, r1, #2
+    ldrb r1, [r1, #0]
+
+   /*
+    * grab service call number:
+    * 1: irq_offload (if configured)
+    * 2: kernel panic or oops (software generated fatal exception)
+    * Planned implementation of system calls for memory protection will
+    * expand this case.
+    */
+
+    cmp r1, #2
+    beq _oops
+
+#if CONFIG_IRQ_OFFLOAD
+    push {lr}
+    blx _irq_do_offload  /* call C routine which executes the offload */
+    pop {r3}
+    mov lr, r3
+#endif
+
+    /* exception return is done in _IntExit() */
+    b _IntExit
+
+_oops:
+    push {lr}
+    blx _do_kernel_oops
+    pop {pc}
+
 #elif defined(CONFIG_ARMV7_M)
 /**
  *

arch/arm/soc/atmel_sam/sam4s/Kconfig.defconfig.series

@@ -25,6 +25,6 @@ config NUM_IRQS
 
 config SYS_CLOCK_HW_CYCLES_PER_SEC
 	int
-	default 84000000
+	default 120000000
 
 endif # SOC_SERIES_SAM4S

arch/arm/soc/atmel_sam/sam4s/Kconfig.soc

@@ -45,18 +45,9 @@ config SOC_ATMEL_SAM4S_EXT_MAINCK
 	Says n here will use the internal fast RC oscillator
 	running at 12 MHz.
 
-config SOC_ATMEL_SAM4S_MDIV
-	int "MDIV"
-	default 1
-	range 1 4
-	help
-	This divisor defines a ratio between processor clock (HCLK)
-	and master clock (MCK):
-	MCK = HCLK / MDIV
-
 config SOC_ATMEL_SAM4S_PLLA_MULA
 	hex "PLL MULA"
-	default 0x06
+	default 0x09
 	help
 	This is the multiplier (MULA) used by the PLL.
 	The processor clock is (MAINCK * (MULA + 1) / DIVA).
@@ -64,8 +55,8 @@ config SOC_ATMEL_SAM4S_PLLA_MULA
 	Board config file can override this settings
 	for a particular board.
 
-	With default of MULA == 6, and DIVA == 1,
-	PLL is running at 7 times of main clock.
+	With default of MULA == 9, and DIVA == 1,
+	PLL is running at 10 times of main clock.
 
 config SOC_ATMEL_SAM4S_PLLA_DIVA
 	hex "PLL DIVA"
@@ -77,8 +68,8 @@ config SOC_ATMEL_SAM4S_PLLA_DIVA
 	Board config file can override this settings
 	for a particular board.
 
-	With default of MULA == 6, and DIVA == 1,
-	PLL is running at 7 times of main clock.
+	With default of MULA == 9, and DIVA == 1,
+	PLL is running at 10 times of main clock.
 
 config SOC_ATMEL_SAM4S_WAIT_MODE
 	bool "Atmel SAM4S goes to Wait mode instead of Sleep mode"
@@ -89,30 +80,4 @@ config SOC_ATMEL_SAM4S_WAIT_MODE
 	to achieve this, make CPU go to Wait mode instead of Sleep
 	mode while using external crystal oscillator for main clock.
 
-config SOC_ATMEL_SAM4S_PLLB_MULB
-	hex "PLL MULB"
-	default 0x03
-	help
-	This is the multiplier (MULA) used by the PLL.
-	The processor clock is (MAINCK * (MULA + 1) / DIVA).
-
-	Board config file can override this settings
-	for a particular board.
-
-	With default of MULA == 6, and DIVA == 1,
-	PLL is running at 7 times of main clock.
-
-config SOC_ATMEL_SAM4S_PLLB_DIVB
-	hex "PLL DIVB"
-	default 0x01
-	help
-	This is the divider (DIVB) used by the PLL.
-	The processor clock is (MAINCK * (MULB + 1) / DIVB).
-
-	Board config file can override this settings
-	for a particular board.
-
-	With default of MULB == 6, and DIVB == 1,
-	PLL is running at 7 times of main clock.
-
 endif # SOC_SERIES_SAM4S

arch/arm/soc/atmel_sam/sam4s/soc.c

@@ -17,52 +17,9 @@
 #include <device.h>
 #include <init.h>
 #include <soc.h>
-
 #include <arch/cpu.h>
 #include <cortex_m/exc.h>
 
-/*
- * PLL clock = Main * (MULA + 1) / DIVA
- *
- * By default, MULA == 6, DIVA == 1.
- * With main crystal running at 12 MHz,
- * PLL = 12 * (6 + 1) / 1 = 84 MHz
- *
- * With processor clock prescaler at 1,
- * the processor clock is at 84 MHz.
- */
-#define PMC_CKGR_PLLAR_MULA	\
-	((CONFIG_SOC_ATMEL_SAM4S_PLLA_MULA) << 16)
-#define PMC_CKGR_PLLAR_DIVA	\
-	((CONFIG_SOC_ATMEL_SAM4S_PLLA_DIVA) << 0)
-
-/*
- * PLL clock = Main * (MULB + 1) / DIVB
- *
- * By default, MULB == 6, DIVB == 1.
- * With main crystal running at 12 MHz,
- * PLL = 12 * (6 + 1) / 1 = 84 MHz
- *
- * With processor clock prescaler at 1,
- * the processor clock is at 84 MHz.
- */
-#define PMC_CKGR_PLLBR_MULB	\
-	((CONFIG_SOC_ATMEL_SAM4S_PLLB_MULB) << 16)
-#define PMC_CKGR_PLLBR_DIVB	\
-	((CONFIG_SOC_ATMEL_SAM4S_PLLB_DIVB) << 0)
-
-#if CONFIG_SOC_ATMEL_SAM4S_MDIV == 1
-#define SOC_ATMEL_SAM4S_MDIV PMC_MCKR_MDIV_EQ_PCK
-#elif CONFIG_SOC_ATMEL_SAM4S_MDIV == 2
-#define SOC_ATMEL_SAM4S_MDIV PMC_MCKR_MDIV_PCK_DIV2
-#elif CONFIG_SOC_ATMEL_SAM4S_MDIV == 3
-#define SOC_ATMEL_SAM4S_MDIV PMC_MCKR_MDIV_PCK_DIV3
-#elif CONFIG_SOC_ATMEL_SAM4S_MDIV == 4
-#define SOC_ATMEL_SAM4S_MDIV PMC_MCKR_MDIV_PCK_DIV4
-#else
-#error "Invalid CONFIG_SOC_ATMEL_SAM4S_MDIV define value"
-#endif
-
 /**
  * @brief Setup various clock on SoC at boot time.
  *
@@ -77,11 +34,12 @@ static ALWAYS_INLINE void clock_init(void)
 
 #ifdef CONFIG_SOC_ATMEL_SAM4S_EXT_SLCK
 	/* Switch slow clock to the external 32 KHz crystal oscillator. */
-	SUPC->SUPC_CR = SUPC_CR_KEY | SUPC_CR_XTALSEL;
+	SUPC->SUPC_CR = SUPC_CR_KEY_PASSWD | SUPC_CR_XTALSEL_CRYSTAL_SEL;
 
 	/* Wait for oscillator to be stabilized. */
-	while (!(SUPC->SUPC_SR & SUPC_SR_OSCSEL))
+	while (!(SUPC->SUPC_SR & SUPC_SR_OSCSEL)) {
 		;
+	}
 
 #endif /* CONFIG_SOC_ATMEL_SAM4S_EXT_SLCK */
 
@@ -93,67 +51,74 @@ static ALWAYS_INLINE void clock_init(void)
 	/* Start the external crystal oscillator. */
 	PMC->CKGR_MOR = CKGR_MOR_KEY_PASSWD
 			/* Fast RC oscillator frequency is at 4 MHz. */
-			| CKGR_MOR_MOSCRCF_4MHz
+			| CKGR_MOR_MOSCRCF_4_MHz
 			/*
 			 * We select maximum setup time. While start up time
 			 * could be shortened this optimization is not deemed
 			 * critical right now.
 			 */
 			| CKGR_MOR_MOSCXTST(0xFFu)
-			/* RC OSC must stay on. */
-			| PMC_CKGR_MOR_MOSCRCEN
-			| PMC_CKGR_MOR_MOSCXTEN;
+			/* RC oscillator must stay on. */
+			| CKGR_MOR_MOSCRCEN
+			| CKGR_MOR_MOSCXTEN;
 
 	/* Wait for oscillator to be stabilized. */
-	while (!(PMC->PMC_SR & PMC_SR_MOSCXTS))
+	while (!(PMC->PMC_SR & PMC_SR_MOSCXTS)) {
 		;
+	}
 
 	/* Select the external crystal oscillator as the main clock source. */
-	PMC->CKGR_MOR = PMC_CKGR_MOR_KEY
-			| PMC_CKGR_MOR_MOSCRCF_4MHZ
-			| PMC_CKGR_MOR_MOSCRCEN
-			| PMC_CKGR_MOR_MOSCXTEN
-			| PMC_CKGR_MOR_MOSCXTST
-			| PMC_CKGR_MOR_MOSCSEL;
+	PMC->CKGR_MOR = CKGR_MOR_KEY_PASSWD
+			| CKGR_MOR_MOSCRCF_4_MHz
+			| CKGR_MOR_MOSCRCEN
+			| CKGR_MOR_MOSCXTEN
+			| CKGR_MOR_MOSCXTST(0xFFu)
+			| CKGR_MOR_MOSCSEL;
 
 	/* Wait for external oscillator to be selected. */
-	while (!(PMC->PMC_SR & PMC_INT_MOSCSELS))
+	while (!(PMC->PMC_SR & PMC_SR_MOSCSELS)) {
 		;
+	}
 
-	/* Turn off RC OSC, not used any longer, to save power */
+	/* Turn off RC oscillator, not used any longer, to save power */
 	PMC->CKGR_MOR = CKGR_MOR_KEY_PASSWD
 			| CKGR_MOR_MOSCSEL
 			| CKGR_MOR_MOSCXTST(0xFFu)
 			| CKGR_MOR_MOSCXTEN;
 
 	/* Wait for the RC oscillator to be turned off. */
-	while (PMC->PMC_SR & PMC_SR_MOSCRCS)
+	while (PMC->PMC_SR & PMC_SR_MOSCRCS) {
 		;
+	}
 
 #ifdef CONFIG_SOC_ATMEL_SAM4S_WAIT_MODE
 	/*
 	 * Instruct CPU to enter Wait mode instead of Sleep mode to
 	 * keep Processor Clock (HCLK) and thus be able to debug
-	 * CPU using JTAG
+	 * CPU using JTAG.
 	 */
 	PMC->PMC_FSMR |= PMC_FSMR_LPM;
 #endif
 #else
-	/*
-	 * Set main fast RC oscillator.
-	 */
+	/* Setup main fast RC oscillator. */
 
 	/*
-	 * NOTE: MOSCREF must be changed only if MOSCRCS is set in the PMC_SR
+	 * NOTE: MOSCRCF must be changed only if MOSCRCS is set in the PMC_SR
 	 * register, should normally be the case.
 	 */
+	while (!(PMC->PMC_SR & PMC_SR_MOSCRCS)) {
+		;
+	}
+
+	/* Set main fast RC oscillator to 12 MHz. */
 	PMC->CKGR_MOR = CKGR_MOR_KEY_PASSWD
-			| CKGR_MOR_MOSCRCF_12MHZ
+			| CKGR_MOR_MOSCRCF_12_MHz
 			| CKGR_MOR_MOSCRCEN;
 
 	/* Wait for RC oscillator to stabilize. */
-	while (!(PMC->PMC_SR & PMC_SR_MOSCRCS))
+	while (!(PMC->PMC_SR & PMC_SR_MOSCRCS)) {
 		;
+	}
 #endif /* CONFIG_SOC_ATMEL_SAM4S_EXT_MAINCK */
 
 	/*
@@ -165,14 +130,15 @@ static ALWAYS_INLINE void clock_init(void)
 	PMC->PMC_MCKR = reg_val | PMC_MCKR_CSS_MAIN_CLK;
 
 	/* Wait for clock selection to complete. */
-	while (!(PMC->PMC_SR & PMC_SR_MCKRDY))
+	while (!(PMC->PMC_SR & PMC_SR_MCKRDY)) {
 		;
+	}
 
 	/* Setup PLLA. */
 	PMC->CKGR_PLLAR = CKGR_PLLAR_ONE
-			  | PMC_CKGR_PLLAR_MULA
+			  | CKGR_PLLAR_MULA(CONFIG_SOC_ATMEL_SAM4S_PLLA_MULA)
 			  | CKGR_PLLAR_PLLACOUNT(0x3Fu)
-			  | PMC_CKGR_PLLAR_DIVA;
+			  | CKGR_PLLAR_DIVA(CONFIG_SOC_ATMEL_SAM4S_PLLA_DIVA);
 
 	/*
 	 * NOTE: Both MULA and DIVA must be set to a value greater than 0 or
@@ -181,23 +147,9 @@ static ALWAYS_INLINE void clock_init(void)
 	 */
 
 	/* Wait for PLL lock. */
-	while (!(PMC->PMC_SR & PMC_SR_LOCKA))
-		;
-
-	/* Setup PLLB. */
-	PMC->CKGR_PLLBR = PMC_CKGR_PLLBR_MULB
-			  | CKGR_PLLBR_PLLBCOUNT(0x3Fu)
-			  | PMC_CKGR_PLLBR_DIVB;
-
-	/*
-	 * NOTE: Both MULB and DIVB must be set to a value greater than 0 or
-	 * otherwise PLL will be disabled. In this case we would get stuck in
-	 * the following loop.
-	 */
-
-	/* Wait for PLL lock. */
-	while (!(PMC->PMC_SR & PMC_SR_LOCKB))
+	while (!(PMC->PMC_SR & PMC_SR_LOCKA)) {
 		;
+	}
 
 	/*
 	 * Final setup of the Master Clock
@@ -205,7 +157,7 @@ static ALWAYS_INLINE void clock_init(void)
 
 	/*
 	 * NOTE: PMC_MCKR must not be programmed in a single write operation.
-	 * If CSS, MDIV or PRES are modified we must wait for MCKRDY bit to be
+	 * If CSS or PRES are modified we must wait for MCKRDY bit to be
 	 * set again.
 	 */
 
@@ -214,24 +166,18 @@ static ALWAYS_INLINE void clock_init(void)
 	PMC->PMC_MCKR = reg_val | PMC_MCKR_PRES_CLK_1;
 
 	/* Wait for Master Clock setup to complete */
-	while (!(PMC->PMC_SR & PMC_SR_MCKRDY))
-		;
-
-	/* Setup divider - Processor Clock (HCLK) / Master Clock (MCK). */
-	reg_val = PMC->PMC_MCKR & ~PMC_MCKR_MDIV_Msk;
-	PMC->PMC_MCKR = reg_val | SOC_ATMEL_SAM4S_MDIV;
-
-	/* Wait for Master Clock setup to complete. */
-	while (!(PMC->PMC_SR & PMC_SR_MCKRDY))
+	while (!(PMC->PMC_SR & PMC_SR_MCKRDY)) {
 		;
+	}
 
 	/* Finally select PLL as Master Clock source. */
 	reg_val = PMC->PMC_MCKR & ~PMC_MCKR_CSS_Msk;
 	PMC->PMC_MCKR = reg_val | PMC_MCKR_CSS_PLLA_CLK;
 
 	/* Wait for Master Clock setup to complete. */
-	while (!(PMC->PMC_SR & PMC_SR_MCKRDY))
+	while (!(PMC->PMC_SR & PMC_SR_MCKRDY)) {
 		;
+	}
 }
 
 /**
@@ -255,14 +201,16 @@ static int atmel_sam4s_init(struct device *arg)
 
 	/*
 	 * Set FWS (Flash Wait State) value before increasing Master Clock
-	 * (MCK) frequency.
-	 * TODO: set FWS based on the actual MCK frequency and VDDIO value
-	 * rather than maximum supported 150 MHz at standard VDDIO=2.7V
+	 * (MCK) frequency. Look at table 44.73 in the SAM4S datasheet.
+	 * This is set to the highest number of read cycles because it won't
+	 * hurt lower clock frequencies. However, a high frequency with too
+	 * few read cycles could cause flash read problems. FWS 5 (6 cycles)
+	 * is the safe setting for all of this SoCs usable frequencies.
+	 * TODO: Add code to handle SAM4SD devices that have 2 EFCs.
 	 */
-	EFC0->EEFC_FMR = EEFC_FMR_FWS(4);
-	EFC1->EEFC_FMR = EEFC_FMR_FWS(4);
+	EFC0->EEFC_FMR = EEFC_FMR_FWS(5);
 
-	/* Setup master clock */
+	/* Setup system clocks. */
 	clock_init();
 
 	/*

arch/arm/soc/atmel_sam/sam4s/soc.h

@@ -36,7 +36,6 @@
 #define SOC_ATMEL_SAM_HCLK_FREQ_HZ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
 
 /** Master Clock (MCK) Frequency */
-#define SOC_ATMEL_SAM_MCK_FREQ_HZ \
-		(SOC_ATMEL_SAM_HCLK_FREQ_HZ / CONFIG_SOC_ATMEL_SAM4S_MDIV)
+#define SOC_ATMEL_SAM_MCK_FREQ_HZ SOC_ATMEL_SAM_HCLK_FREQ_HZ
 
 #endif /* _ATMEL_SAM4S_SOC_H_ */

arch/arm/soc/atmel_sam/sam4s/soc_pinmap.h

@@ -10,21 +10,21 @@
  * modules to correctly configure GPIO controller.
  */
 
-#ifndef _ATMEL_SAM_SOC_PINMAP_H_
-#define _ATMEL_SAM_SOC_PINMAP_H_
+#ifndef _ATMEL_SAM4S_SOC_PINMAP_H_
+#define _ATMEL_SAM4S_SOC_PINMAP_H_
 
 #include <soc.h>
 
 /* Universal Asynchronous Receiver Transmitter (UART) */
 
-#define PIN_UART0_RXD {PIO_PA9A_UART0_URXD0,  PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
-#define PIN_UART0_TXD {PIO_PA10A_UART0_UTXD0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
+#define PIN_UART0_RXD {PIO_PA9A_URXD0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
+#define PIN_UART0_TXD {PIO_PA10A_UTXD0, PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
 
 #define PINS_UART0 {PIN_UART0_RXD, PIN_UART0_TXD}
 
-#define PIN_UART1_RXD {PIO_PB2A_UART1_URXD1,  PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
-#define PIN_UART1_TXD {PIO_PB3A_UART1_UTXD1,  PIOA, ID_PIOA, SOC_GPIO_FUNC_A}
+#define PIN_UART1_RXD {PIO_PB2A_URXD1, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
+#define PIN_UART1_TXD {PIO_PB3A_UTXD1, PIOB, ID_PIOB, SOC_GPIO_FUNC_A}
 
 #define PINS_UART1 {PIN_UART1_RXD, PIN_UART1_TXD}
 
-#endif /* _ATMEL_SAM_SOC_PINMAP_H_ */
+#endif /* _ATMEL_SAM4S_SOC_PINMAP_H_ */

arch/arm/soc/nordic_nrf5/nrf52/Kconfig.series

@@ -10,6 +10,7 @@ config  SOC_SERIES_NRF52X
 	select CPU_CORTEX_M
 	select CPU_CORTEX_M4
 	select CPU_HAS_FPU
+	select CPU_HAS_MPU
 	select SOC_FAMILY_NRF5
 	select NRF_RTC_TIMER
 	select CLOCK_CONTROL

arch/arm/soc/nordic_nrf5/nrf52/Kconfig.soc

@@ -26,3 +26,11 @@ config SOC_NRF52840_QIAA
 	select SOC_NRF52840
 
 endchoice
+
+config ARM_MPU_NRF52X
+	bool "Enable MPU on nRF52"
+	depends on CPU_HAS_MPU
+	select ARM_MPU
+	default n
+	help
+	  Enable MPU support on Nordic Semiconductor nRF52x series ICs.

arch/arm/soc/nordic_nrf5/nrf52/Makefile

@@ -10,6 +10,7 @@ soc-cflags += -DNRF52840_XXAA
 endif
 
 obj-y += soc.o
+obj-$(CONFIG_ARM_MPU_NRF52X) += mpu_regions.o
 
 zephyr: $(KERNEL_HEX_NAME)
 all: $(KERNEL_HEX_NAME)

arch/arm/soc/nordic_nrf5/nrf52/mpu_mem_cfg.h

@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2017 Linaro Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _NRF52X_MPU_MEM_CFG_H_
+#define _NRF52X_MPU_MEM_CFG_H_
+
+#include <soc.h>
+#include <arch/arm/cortex_m/mpu/arm_mpu.h>
+
+/* Flash Region Definitions */
+#if CONFIG_FLASH_SIZE == 64
+#define REGION_FLASH_SIZE REGION_64K
+#elif CONFIG_FLASH_SIZE == 128
+#define REGION_FLASH_SIZE REGION_128K
+#elif CONFIG_FLASH_SIZE == 256
+#define REGION_FLASH_SIZE REGION_256K
+#elif CONFIG_FLASH_SIZE == 512
+#define REGION_FLASH_SIZE REGION_512K
+#elif CONFIG_FLASH_SIZE == 1024
+#define REGION_FLASH_SIZE REGION_1M
+#elif CONFIG_FLASH_SIZE == 2048
+#define REGION_FLASH_SIZE REGION_2M
+#else
+#error "Unsupported configuration"
+#endif
+
+/* SRAM Region Definitions */
+#if CONFIG_SRAM_SIZE == 32
+#define REGION_SRAM_0_SIZE REGION_32K
+#elif CONFIG_SRAM_SIZE == 64
+#define REGION_SRAM_0_SIZE REGION_64K
+#elif CONFIG_SRAM_SIZE == 128
+#define REGION_SRAM_0_SIZE REGION_128K
+#elif CONFIG_SRAM_SIZE == 256
+#define REGION_SRAM_0_SIZE REGION_256K
+#else
+#error "Unsupported configuration"
+#endif
+
+#endif /* _NRF52X_MPU_MEM_CFG_H_ */

arch/arm/soc/nordic_nrf5/nrf52/mpu_regions.c

@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2017 Linaro Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <soc.h>
+#include <arch/arm/cortex_m/mpu/arm_mpu.h>
+
+#include "mpu_mem_cfg.h"
+
+#define XICR_BASE	0x10000000
+#define PERIPH_BASE	0x40000000
+#define M4_PPB_BASE	0xE0000000
+
+static struct arm_mpu_region mpu_regions[] = {
+	/* Region 0 */
+	MPU_REGION_ENTRY("FLASH_0",
+			 CONFIG_FLASH_BASE_ADDRESS,
+			 REGION_FLASH_ATTR(REGION_FLASH_SIZE)),
+	/* Region 1 */
+	MPU_REGION_ENTRY("SRAM_0",
+			 CONFIG_SRAM_BASE_ADDRESS,
+			 REGION_RAM_ATTR(REGION_SRAM_0_SIZE)),
+	/* Region 2 */
+	MPU_REGION_ENTRY("FACTUSERCFG_0",
+			 XICR_BASE,
+			 REGION_IO_ATTR(REGION_8K)),
+	/* Region 3 */
+	MPU_REGION_ENTRY("PERIPH_0",
+			 PERIPH_BASE,
+			 REGION_IO_ATTR(REGION_512M)),
+	/* Region 4 */
+	MPU_REGION_ENTRY("PPB_0",
+			 M4_PPB_BASE,
+			 REGION_PPB_ATTR(REGION_64K)),
+};
+
+struct arm_mpu_config mpu_config = {
+	.num_regions = ARRAY_SIZE(mpu_regions),
+	.mpu_regions = mpu_regions,
+};

arch/arm/soc/nxp_kinetis/k6x/nxp_mpu_regions.c

@@ -46,4 +46,5 @@ static struct nxp_mpu_region mpu_regions[] = {
 struct nxp_mpu_config mpu_config = {
 	.num_regions = ARRAY_SIZE(mpu_regions),
 	.mpu_regions = mpu_regions,
+	.sram_region = 3,
 };

arch/x86/Makefile.idt

@@ -5,7 +5,7 @@ else
 endif
 
 ifeq ($(PREBUILT_HOST_TOOLS),)
-	GENIDT := $(ZEPHYR_BASE)/scripts/gen_idt/gen_idt
+	GENIDT := scripts/gen_idt/gen_idt
 else
 	GENIDT := $(PREBUILT_HOST_TOOLS)/gen_idt
 endif
@@ -29,7 +29,7 @@ quiet_cmd_gen_idt = SIDT    $@
 )
 
 $(GENIDT):
-	$(Q)$(MAKE) $(build)=$(ZEPHYR_BASE)/scripts/gen_idt
+	$(Q)$(MAKE) $(build)=scripts/gen_idt
 
 staticIdt.o: $(PREBUILT_KERNEL) $(GENIDT)
 	$(call cmd,gen_idt)

boards/arm/96b_nitrogen/96b_nitrogen_defconfig

@@ -3,6 +3,9 @@ CONFIG_SOC_FAMILY_NRF5=y
 CONFIG_SOC_SERIES_NRF52X=y
 CONFIG_BOARD_96B_NITROGEN=y
 
+# Enable MPU
+CONFIG_ARM_MPU_NRF52X=y
+
 # enable uart driver
 CONFIG_SERIAL=y
 CONFIG_UART_NRF5=y

boards/arm/arduino_due/doc/board.rst

@@ -23,7 +23,10 @@ the processor.
 .. note::
    This configuration is not supported by Arduino.
 
-
+.. image:: img/arduino_due.png
+     :width: 500px
+     :align: center
+     :alt: Arduino Due
 
 Hardware
 ********

boards/arm/bbc_microbit/Makefile.board

@@ -0,0 +1,4 @@
+PYOCD_TARGET = nrf51
+FLASH_SCRIPT=pyocd.sh
+DEBUG_SCRIPT=pyocd.sh
+export PYOCD_TARGET FLASH_SCRIPT

boards/arm/nrf52840_pca10056/nrf52840_pca10056_defconfig

@@ -4,6 +4,9 @@ CONFIG_SOC_SERIES_NRF52X=y
 CONFIG_SOC_NRF52840_QIAA=y
 CONFIG_BOARD_NRF52840_PCA10056=y
 
+# Enable MPU
+CONFIG_ARM_MPU_NRF52X=y
+
 # enable uart driver
 CONFIG_SERIAL=y
 CONFIG_UART_NRF5=y

boards/arm/nrf52_blenano2/nrf52_blenano2_defconfig

@@ -4,6 +4,9 @@ CONFIG_SOC_SERIES_NRF52X=y
 CONFIG_SOC_NRF52832_QFAA=y
 CONFIG_BOARD_NRF52_BLENANO2=y
 
+# Enable MPU
+CONFIG_ARM_MPU_NRF52X=y
+
 # enable uart driver
 CONFIG_SERIAL=y
 CONFIG_UART_NRF5=y

boards/arm/nrf52_pca10040/nrf52_pca10040_defconfig

@@ -4,6 +4,9 @@ CONFIG_SOC_SERIES_NRF52X=y
 CONFIG_SOC_NRF52832_QFAA=y
 CONFIG_BOARD_NRF52_PCA10040=y
 
+# Enable MPU
+CONFIG_ARM_MPU_NRF52X=y
+
 # enable uart driver
 CONFIG_SERIAL=y
 CONFIG_UART_NRF5=y

boards/arm/sam_e70_xplained/doc/sam_e70_xplained.rst

@@ -9,6 +9,11 @@ Overview
 The SAM E70 Xplained evaluation kit is a development platform to evaluate the
 Atmel SAM E70 series microcontrollers.
 
+.. image:: img/sam_e70_xplained.png
+     :width: 500px
+     :align: center
+     :alt: SAM E70 Xplained
+
 Hardware
 ********
 

boards/boards.rst

@@ -3,6 +3,8 @@
 Supported Boards
 ################
 
+To add support documentation for a new board, please use the template available
+under :file:`doc/templates/board.tmpl`
 
 X86 Boards
 **********
@@ -48,11 +50,3 @@ XTENSA Boards
    :glob:
 
    xtensa/**/*
-
-A list of additional supported boards can be found on the `Zephyr project wiki`_.
-
-To add a new board, please use the template available under
-:file:`doc/templates/board.tmpl`
-
-
-.. _Zephyr project wiki: https://wiki.zephyrproject.org/view/Supported_Boards

boards/x86/quark_d2000_crb/quark_d2000_crb_defconfig

@@ -12,5 +12,5 @@ CONFIG_SERIAL=y
 CONFIG_SERIAL_HAS_DRIVER=y
 CONFIG_PRINTK=y
 CONFIG_ISR_STACK_SIZE=256
-CONFIG_MAIN_STACK_SIZE=512
+CONFIG_MAIN_STACK_SIZE=1024
 CONFIG_PINMUX=y

doc/README.rst

@@ -41,8 +41,6 @@ The project's documentation currently comprises the following items:
 * Script-generated material for kernel configuration options based on kconfig
   files found in the source code tree
 
-* Additional material on https://wiki.zephyrproject.org
-
 The reStructuredText files are processed by the Sphinx documentation system,
 and make use of the breathe extension for including the doxygen-generated API
 material.  Additional tools are required to generate the

doc/application/application.rst

@@ -502,7 +502,8 @@ depth is needed. The developer must supply a :file:`Makefile` for the
 Application-specific source code should not use symbol name prefixes that have
 been reserved by the kernel for its own use. For more information, see
 
-`Naming Conventions <https://wiki.zephyrproject.org/view/Coding_conventions#Naming_Conventions>`_.
+`Naming Conventions
+<https://github.com/zephyrproject-rtos/zephyr/wiki/Naming-Conventions>`_.
 
 
 The following requirements apply to all Makefiles in the :file:`src`

doc/contribute/code.rst

@@ -8,7 +8,7 @@ licenses, the naming conventions, the code submission infrastructure, the
 review process and the code documentation can be found on the
 Zephyr Project wiki.
 
-* https://wiki.zephyrproject.org/view/Collaboration_Guidelines
+* https://github.com/zephyrproject-rtos/zephyr/wiki/Contribution-Guide
 
 .. toctree::
    :maxdepth: 1

doc/drivers/drivers.rst

@@ -149,7 +149,7 @@ failures, etc., should be handled by assertions.
 
 When it is appropriate to return error conditions for the caller to check, 0
 should be returned on success and a POSIX errno.h code returned on failure.
-See https://wiki.zephyrproject.org/view/Coding_conventions#Return_Codes for
+See https://github.com/zephyrproject-rtos/zephyr/wiki/Naming-Conventions#return-codes for
 details about this.
 
 A driver implementing a particular subsystem will define the real implementation

doc/dts/device_tree.rst

@@ -0,0 +1,252 @@
+.. _device-tree:
+
+Device Tree in Zephyr
+########################
+
+Introduction to Device Tree
+***************************
+
+Device tree is a way of describing hardware and configuration information
+for boards.  Device tree was adopted for use in the Linux kernel for the
+PowerPC architecture.  However, it is now in use for ARM and other
+architectures.
+
+The device tree is a data structure for dynamically describing hardware
+using a Device Tree Source (DTS) data structure language, and compiled
+into a compact Device Tree Blob (DTB) using a Device Tree Compiler (DTC).
+Rather than hard coding every detail of a board's hardware into the
+operating system, the hardware-describing DTB is passed to the operating
+system at boot time. This allows the same compiled Linux kernel to support
+different hardware configurations within an architecture family (e.g., ARM,
+x86, PowerPC) and moves a significant part of the hardware description out of
+the kernel binary itself.
+
+Traditional usage of device tree involves storing of the Device Tree Blob.
+The DTB is then used during runtime for configuration of device drivers.  In
+Zephyr, the DTS information will be used only during compile time.
+Information about the system is extracted from the compiled DTS and used to
+create the application image.
+
+Device tree uses a specific format to describe the device nodes in a system.
+This format is described in `EPAPR document`_.
+
+.. _EPAPR document: http://www.devicetree.org/specifications-pdf
+
+More device tree information can be found at the `device tree repository`_.
+
+.. _device tree repository: https://git.kernel.org/pub/scm/utils/dtc/dtc.git
+
+
+System build requirements
+*************************
+
+The Zephyr device tree feature requires a device tree compiler (DTC) and Python
+YAML packages.  Refer to the installation guide for your specific host OS.
+
+:ref:`installing_zephyr_win`
+
+:ref:`installation_linux`
+
+:ref:`installing_zephyr_mac`
+
+
+Zephyr and Device Tree
+**********************
+
+In Zephyr, device tree is used to not only describe hardware, but also to
+describe Zephyr-specific configuration information.  The Zephyr-specific
+information is intended to augment the device tree descriptions.  The main
+reason for this is to leverage existing device tree files that a SoC vendor may
+already have defined for a given platform.
+
+Today, configuration in Zephyr comes from a number of different places.  It can
+come from Kconfig files, CMSIS header files, vendor header files, prj.conf
+files, and other miscellaneous sources.  The intent of using device tree is to
+replace or curtail the use of Kconfig files throughout the system, and instead
+use device tree files to describe the configuration of device nodes.  CMSIS and
+vendor header files can be used in conjunction with the device tree to fully
+describe hardware.  Device tree is not intended to replace CMSIS or vendor
+include files.
+
+The device tree files are compiled using the device tree compiler.  The compiler
+runs the .dts file through the C preprocessor to resolve any macro or #defines
+utilized in the file.  The output of the compile is another dts formatted file.
+
+After compilation, a python script extracts information from the compiled device
+tree file using a set of rules specified in YAML files.  The extracted
+information is placed in a header file that is used by the rest of the code as
+the project is compiled.
+
+A temporary fixup file is required for device tree support on most devices.
+This .fixup file resides in the dts architecture directory and has the same
+name as the master .dts file.  The only difference is the suffix is .fixup.
+This fixup file maps the generated include information to the current
+driver/source usage.
+
+Device tree file formats
+************************
+Hardware and software is described inside of device tree files in clear text format.
+These files have the file suffix of .dtsi or .dts.  The .dtsi files are meant to
+be included by other files.  Typically for a given board you have some number of
+.dtsi include files that pull in common device descriptions that are used across
+a given SoC family.
+
+-----------------------------------------
+Example: FRDM K64F Board and Hexiwear K64
+-----------------------------------------
+Both of these boards are based on the same NXP Kinetis SoC family, the K6X.  The
+following shows the include hierarchy for both boards.
+
+dts/arm/frdm_k64.dts includes the following two files::
+
+  dts/arm/nxp/nxp_k6x.dtsi
+  dts/arm/armv7-m.dtsi
+
+dts/arm/hexiwear_k64.dts includes the same two files::
+
+  dts/arm/nxp/nxp_k6x.dtsi
+  dts/arm/armv7-m.dtsi
+
+The board-specific .dts files enable nodes, define the Zephyr-specific items,
+and also adds board-specific changes like gpio/pinmux assignments.  These types
+of things will vary based on the board layout and application use.
+
+Currently supported boards
+**************************
+
+Device tree is currently supported on all ARM targets.  Support for all other
+architectures is to be completed by release 1.9.
+
+Adding support for a board
+**************************
+
+Adding device tree support for a given board requires adding a number of files.
+These files will contain the DTS information that describes a platform, the
+YAML descriptions that define the contents of a given Device Tree peripheral
+node, and also any fixup files required to support the platform.
+
+When writing Device Tree Source files, it is good to separate out common
+peripheral information that could be used across multiple SoC families or
+boards.  DTS files are identified by their file suffix.  A .dtsi suffix denotes
+a DTS file that is used as an include in another DTS file.  A .dts suffix
+denotes the primary DTS file for a given board.
+
+The primary DTS file will contain at a minimum a version line, optional
+includes, and the root node definition.  The root node will contain a model and
+compatible that denotes the unique board described by the .dts file.
+
+--------------------------------
+Device Tree Source File Template
+--------------------------------
+
+.. code::
+
+  /dts-v1/
+  / {
+          model = "Model name for your board";
+          compatible = "compatible for your board";
+          /* rest of file */
+  };
+
+
+One suggestion for starting from scratch on a platform/board is to examine other
+boards and their device tree source files.
+
+The following is a more precise list of required files:
+
+* Base architecture support
+
+  * Add architecture-specific DTS directory, if not already present.
+    Example: dts/arm for ARM.
+  * Add target to dts/<ARCH>/Makefile or create Makefile if not present
+  * Add target specific device tree files for base SoC.  These should be
+    .dtsi files to be included in the board-specific device tree files.
+  * Add target specific YAML files in the dts/<ARCH>/yaml directory.
+    Create the yaml directory if not present.
+
+* SoC family support
+
+  * Add one or more SoC family .dtsi files that describe the hardware
+    for a set of devices.  The file should contain all the relevant
+    nodes and base configuration that would be applicable to all boards
+    utilizing that SoC family.
+  * Add SoC family YAML files that describe the nodes present in the .dtsi file.
+
+* Board specific support
+
+  * Add a board level .dts file that includes the SoC family .dtsi files
+    and enables the nodes required for that specific board.
+  * Board .dts file should specify the SRAM and FLASH devices, if present.
+  * Add board-specific YAML files, if required.  This would occur if the
+    board has additional hardware that is not covered by the SoC family
+    .dtsi/.yaml files.
+
+* Fixup files
+
+  * Fixup files contain mappings from existing Kconfig options to the actual
+    underlying DTS derived configuration #defines.  Fixup files are temporary
+    artifacts until additional DTS changes are made to make them unnecessary.
+
+Adding support for device tree in drivers
+*****************************************
+
+As drivers and other source code is converted over to make use of device tree
+generated information, these drivers may require changes to match the generated
+#define information.
+
+
+Source Tree Hierarchy
+*********************
+
+The device tree files are located in a couple of different directories.  The
+directory split is done based on architecture, and there is also a common
+directory where architecture agnostic device tree and yaml files are located.
+
+Assuming the current working directory is the ZEPHYR_BASE, the directory
+hierarchy looks like the following::
+
+  dts/common/
+  dts/common/yaml
+  dts/<ARCH>/
+  dts/<ARCH>/yaml
+
+The common directories contain a skeleton.dtsi include file that defines the
+address and size cells.  The yaml subdirectory contains common yaml files for
+Zephyr-specific nodes/properties and generic device properties common across
+architectures.
+
+Example: DTS/YAML files for NXP FRDM K64F::
+
+  dts/arm/armv7-m.dtsi
+  dts/arm/k6x/nxp_k6x.dtsi
+  dts/arm/frdm_k64f.dts
+  dts/arm/yaml/arm,v7m-nvic.yaml
+  dts/arm/yaml/k64gpio.yaml
+  dts/arm/yaml/k64pinmux.yaml
+  dts/arm/yaml/k64uart.yaml
+
+YAML definitions for device nodes
+*********************************
+
+Device tree can describe hardware and configuration, but it doesn't tell the
+system which pieces of information are useful, or how to generate configuration
+data from the device tree nodes.  For this, we rely on YAML files to describe
+the contents or definition of a device tree node.
+
+A YAML description must be provided for every device node that is to be a source
+of information for the system.  This YAML description can be used for more than
+one purpose.  It can be used in conjunction with the device tree to generate
+include information.  It can also be used to validate the device tree files
+themselves.  A device tree file can successfully compile and still not contain
+the necessary pieces required to build the rest of the software.  YAML provides
+a means to detect that issue.
+
+YAML files reside in a subdirectory inside the common and architecture-specific
+device tree directories.  A YAML template file is provided to show the required
+format.  This file is located at:
+
+  dts/common/yaml/device_node.yaml.template
+
+YAML files must end in a .yaml suffix.  YAML files are scanned during the
+information extraction phase and are matched to device tree nodes via the
+compatible property.

doc/getting_started/installation_linux.rst

@@ -55,7 +55,7 @@ Install the required packages in a Ubuntu host system with:
 .. code-block:: console
 
    $ sudo apt-get install git make gcc g++ python3-ply ncurses-dev \
-	 python3-yaml python2.7 dfu-util
+	 python3-yaml dfu-util device-tree-compiler
 
 Install the required packages in a Fedora host system with:
 
@@ -64,7 +64,7 @@ Install the required packages in a Fedora host system with:
    $ sudo dnf group install "Development Tools"
    $ sudo dnf install git make gcc glibc-static \
 	 libstdc++-static python3-ply ncurses-devel \
-	 python-yaml python2 dfu-util
+	 python-yaml dfu-util dtc
 
 .. _zephyr_sdk:
 
@@ -87,6 +87,8 @@ following architectures:
 
 * :abbr:`NIOS II`
 
+* :abbr:`Xtensa`
+
 Follow these steps to install the SDK on your Linux host system.
 
 #. Download the latest SDK self-extractable binary.

doc/getting_started/installation_mac.rst

@@ -9,17 +9,17 @@ After completing these steps, you will be able to compile and run your Zephyr
 applications on the following Mac OS version:
 
 * Mac OS X 10.11 (El Capitan)
+* macOS Sierra 10.12
 
-Developing for Zephyr on OS X generally requires you to build the
-toolchain yourself. However, if there is already an OS X toolchain for your
+Developing for Zephyr on macOS generally requires you to build the
+toolchain yourself. However, if there is already an macOS toolchain for your
 target architecture you can use it directly.
 
 Using a 3rd Party toolchain
 ***************************
 
 If a toolchain is available for the architecture you plan to build for, then
-you can use it as explained in:
-:ref:`third_party_x_compilers`.
+you can use it as explained in: :ref:`third_party_x_compilers`.
 
 An example of an available 3rd party toolchain is GCC ARM Embedded for the
 Cortex-M family of cores.
@@ -40,8 +40,8 @@ build for and install tools that the build system requires.
 Before proceeding with the build, ensure your OS is up to date.
 
 First, install the :program:`Homebrew` (The missing package manager for
-OS X). Homebrew is a free and open-source software package management system
-that simplifies the installation of software on Apple's OS X operating
+macOS). Homebrew is a free and open-source software package management system
+that simplifies the installation of software on Apple's macOS operating
 system.
 
 To install :program:`Homebrew`, visit the `Homebrew site`_ and follow the
@@ -53,12 +53,28 @@ missing dependency. If so, follow please follow the instructions provided.
 After Homebrew was successfully installed, install the following tools using
 the brew command line.
 
+Install tools to build Zephyr binaries:
+
 .. code-block:: console
 
-   $ brew install gettext qemu help2man mpfr gmp coreutils wget python3 dfu-util
+   $ brew install dfu-util qemu dtc python3
+   $ pip3 install ply pyyaml
+
+Install tools needed for building the toolchain (if needed):
+
+.. code-block:: console
+
+   $ brew install gettext help2man mpfr gmp coreutils wget
    $ brew tap homebrew/dupes
    $ brew install grep --with-default-names
-   $ pip3 install ply
+
+
+To build the toolchain, you will need the latest version of crosstool-ng (1.23).
+This version was not available via brew when writing this documentation, you can
+however try and see if you get 1.23 installed:
+
+.. code-block:: console
+
    $ brew install crosstool-ng
 
 Alternatively you can install the latest version of :program:`crosstool-ng`
@@ -67,9 +83,9 @@ latest version usually supports the latest released compilers.
 
 .. code-block:: console
 
-   $ wget http://crosstool-ng.org/download/crosstool-ng/crosstool-ng-1.22.0.tar.bz2
-   $ tar xvf crosstool-ng-1.22.0.tar.bz2
-   $ cd crosstool-ng/
+   $ wget http://crosstool-ng.org/download/crosstool-ng/crosstool-ng-1.23.0.tar.bz2
+   $ tar xvf crosstool-ng-1.23.0.tar.bz2
+   $ cd crosstool-ng-1.23.0/
    $ ./configure
    $ make
    $ make install
@@ -92,7 +108,8 @@ Alternatively you can use the script below to create the image:
 .. code-block:: bash
 
    #!/bin/bash
-   ImageName=CrossToolNG ImageNameExt=${ImageName}.sparseimage
+   ImageName=CrossToolNG
+   ImageNameExt=${ImageName}.sparseimage
    diskutil umount force /Volumes/${ImageName} && true
    rm -f ${ImageNameExt} && true
    hdiutil create ${ImageName} -volname ${ImageName} -type SPARSE -size 8g -fs HFSX
@@ -116,15 +133,22 @@ both ARM and X86 that can be used to pre-select the options needed
 for building the toolchain.
 The configuration files can be found in :file:`${ZEPHYR_BASE}/scripts/cross_compiler/`.
 
+Currently the following configurations are provided:
+
+* i586.config: for standard ABI, for example for Galileo and qemu_x86
+* iamcu.config: for IAMCU ABI, for example for the Arduino 101
+* nios2.config: for Nios II boards
+
 .. code-block:: console
 
-   $ cp ${ZEPHYR_BASE}/scripts/cross_compiler/x86.config .config
+   $ cp ${ZEPHYR_BASE}/scripts/cross_compiler/i586.config .config
 
 You can create a toolchain configuration or customize an existing configuration
 yourself using the configuration menus:
 
 .. code-block:: console
 
+   $ export CT_PREFIX=/Volumes/CrossToolNG
    $ ct-ng menuconfig
 
 Verifying the Configuration of the Toolchain

doc/getting_started/installation_win.rst

@@ -20,6 +20,9 @@ Windows system with the latest updates installed.
 Installing Requirements and Dependencies
 ****************************************
 
+Using MSYS2
+===========
+
 The Zephyr development environment on Windows relies on MSYS2, a modern UNIX
 environment for Windows. Follow the steps below to set it up:
 
@@ -34,7 +37,11 @@ environment for Windows. Follow the steps below to set it up:
 
 #. Launch the ``MSYS2 MSYS Shell`` desktop app from your start menu (if it's not still open).
 
-     .. note::
+   .. note::
+
+        Make sure you start ``MSYS2 MSYS Shell``, not ``MSYS2 MinGW Shell``.
+
+   .. note::
         There are multiple ``export`` statements in this tutorial. You can avoid
         typing them every time by placing them at the bottom of your
         ``~/.bash_profile`` file.
@@ -172,8 +179,29 @@ environment for Windows. Follow the steps below to set it up:
     This should check that all the tools and toolchain are set up correctly for
     your own Zephyr development.
 
+Using Windows 10 WSL (Windows Subsystem for Linux)
+==================================================
+
+If you are running a recent version of Windows 10 you can make use of the
+built-in functionality to natively run Ubuntu binaries directly on a standard
+command-prompt. This allows you to install the standard Zephyr SDK and build
+for all supported architectures without the need for a Virtual Machine.
+
+#. Install Windows Subsystem for Linux (WSL) following the instructions on the
+   official Microsoft website: `WSL Installation`_
+
+   .. note::
+         For the Zephyr SDK to function properly you will need Windows 10
+         build 15002 or greater. You can check which Windows 10 build you are
+         running in the "About your PC" section of the System Settings.
+         If you are running an older Windows 10 build you might need to install
+         the Creator's Update.
+
+#. Follow the instructions for Ubuntu detailed in the Zephyr Linux Getting
+   Started Guide which can be found here: :ref:`installation_linux`
 
 .. _GNU ARM Embedded: https://developer.arm.com/open-source/gnu-toolchain/gnu-rm/downloads
 .. _MSYS2 website: http://www.msys2.org/
 .. _ISSM Toolchain: https://software.intel.com/en-us/articles/issm-toolchain-only-download
 .. _Getting Started on Arduino 101 with ISSM: https://software.intel.com/en-us/articles/getting-started-arduino-101genuino-101-with-intel-system-studio-for-microcontrollers
+.. _WSL Installation: https://msdn.microsoft.com/en-us/commandline/wsl/install_guide

doc/index.rst

@@ -35,6 +35,7 @@ Sections
    application/application.rst
    porting/porting.rst
    drivers/drivers.rst
+   dts/device_tree.rst
    subsystems/subsystems.rst
    api/api.rst
    samples/samples.rst
@@ -44,7 +45,6 @@ Sections
    LICENSING.rst
    glossary.rst
 
-You can find further information on the `Zephyr Project Wiki`_.
 
 Indices and Tables
 ******************
@@ -53,7 +53,6 @@ Indices and Tables
 
 * :ref:`search`
 
-.. _Zephyr Project Wiki: https://wiki.zephyrproject.org/view/Main_Page
 .. _Zephyr 1.7.0: https://www.zephyrproject.org/doc/1.7.0/
 .. _Zephyr 1.6.0: https://www.zephyrproject.org/doc/1.6.0/
 .. _Zephyr 1.5.0: https://www.zephyrproject.org/doc/1.5.0/

doc/kernel/other/interrupts.rst

@@ -206,6 +206,130 @@ The following code demonstrates a direct ISR:
        ...
     }
 
+Implementation Details
+======================
+
+Interrupt tables are set up at build time using some special build tools.  The
+details laid out here apply to all architectures except x86, which are
+covered in the `x86 Details`_ section below.
+
+Any invocation of :c:macro:`IRQ_CONNECT` will declare an instance of
+struct _isr_list which is placed in a special .intList section:
+
+.. code-block:: c
+
+    struct _isr_list {
+        /** IRQ line number */
+        s32_t irq;
+        /** Flags for this IRQ, see ISR_FLAG_* definitions */
+        s32_t flags;
+        /** ISR to call */
+        void *func;
+        /** Parameter for non-direct IRQs */
+        void *param;
+    };
+
+Zephyr is built in two phases; the first phase of the build produces
+zephyr_prebuilt.elf which contains all the entries in the .intList section
+preceded by a header:
+
+.. code-block:: c
+
+    struct {
+        void *spurious_irq_handler;
+        void *sw_irq_handler;
+        u32_t num_isrs;
+        u32_t num_vectors;
+        struct _isr_list isrs[];  <- of size num_isrs
+    };
+
+This data consisting of the header and instances of struct _isr_list inside
+zephyr_prebuilt.elf is then used by the gen_isr_tables.py script to generate a
+C file defining a vector table and software ISR table that are then compiled
+and linked into the final application.
+
+The priority level of any interrupt is not encoded in these tables, instead
+:c:macro:`IRQ_CONNECT` also has a runtime component which programs the desired
+priority level of the interrupt to the interrupt controller. Some architectures
+do not support the notion of interrupt priority, in which case the priority
+argument is ignored.
+
+Vector Table
+------------
+A vector table is generated when CONFIG_GEN_IRQ_VECTOR_TABLE is enabled.  This
+data structure is used natively by the CPU and is simply an array of function
+pointers, where each element n corresponds to the IRQ handler for IRQ line n,
+and the function pointers are:
+
+#. For 'direct' interrupts declared with :c:macro:`IRQ_DIRECT_CONNECT`, the
+   handler function will be placed here.
+#. For regular interrupts declared with :c:macro:`IRQ_CONNECT`, the address
+   of the common software IRQ handler is placed here. This code does common
+   kernel interrupt bookkeeping and looks up the ISR and parameter from the
+   software ISR table.
+#. For interrupt lines that are not configured at all, the address of the
+   spurious IRQ handler will be placed here. The spurious IRQ handler
+   causes a system fatal error if encountered.
+
+Some architectures (such as the Nios II internal interrupt controller) have a
+common entry point for all interrupts and do not support a vector table, in
+which case the CONFIG_GEN_IRQ_VECTOR_TABLE option should be disabled.
+
+Some architectures may reserve some initial vectors for system exceptions
+and declare this in a table elsewhere, in which case
+CONFIG_GEN_IRQ_START_VECTOR needs to be set to properly offset the indicies
+in the table.
+
+SW ISR Table
+------------
+This is an array of struct _isr_table_entry:
+
+.. code-block:: c
+
+    struct _isr_table_entry {
+        void *arg;
+        void (*isr)(void *);
+    };
+
+This is used by the common software IRQ handler to look up the ISR and its
+argument and execute it. The active IRQ line is looked up in an interrupt
+controller register and used to index this table.
+
+x86 Details
+-----------
+
+The x86 architecture has a special type of vector table called the Interrupt
+Descriptor Table (IDT) which must be laid out in a certain way per the x86
+processor documentation.  It is still fundamentally a vector table, and the
+gen_idt tool uses the .intList section to create it. However, on APIC-based
+systems the indexes in the vector table do not correspond to the IRQ line. The
+first 32 vectors are reserved for CPU exceptions, and all remaining vectors (up
+to index 255) correspond to the priority level, in groups of 16. In this
+scheme, interrupts of priority level 0 will be placed in vectors 32-47, level 1
+48-63, and so forth. When the gen_idt tool is constructing the IDT, when it
+configures an interrupt it will look for a free vector in the appropriate range
+for the requested priority level and set the handler there.
+
+There are some APIC variants (such as MVIC) where priorities cannot be set
+by the user and the position in the vector table does correspond to the
+IRQ line. Systems like this will enable CONFIG_X86_FIXED_IRQ_MAPPING.
+
+On x86 when an interrupt or exception vector is executed by the CPU, there is
+no foolproof way to determine which vector was fired, so a software ISR table
+indexed by IRQ line is not used. Instead, the :c:macro:`IRQ_CONNECT` call
+creates a small assembly language function which calls the common interrupt
+code in :cpp:func:`_interrupt_enter` with the ISR and parameter as arguments.
+It is the address of this assembly interrupt stub which gets placed in the IDT.
+For interrupts declared with :c:macro:`IRQ_DIRECT_CONNECT` the parameterless
+ISR is placed directly in the IDT.
+
+On systems where the position in the vector table corresponds to the
+interrupt's priority level, the interrupt controller needs to know at
+runtime what vector is associated with an IRQ line. gen_idt additionally
+creates an _irq_to_interrupt_vector array which maps an IRQ line to its
+configured vector in the IDT. This is used at runtime by :c:macro:`IRQ_CONNECT`
+to program the IRQ-to-vector association in the interrupt controller.
+
 Suggested Uses
 **************
 

drivers/ethernet/Kconfig.mcux

@@ -17,8 +17,8 @@ menuconfig ETH_MCUX
 if ETH_MCUX
 config ETH_MCUX_PROMISCUOUS_MODE
 	bool "Enable promiscuous mode"
-	default false if !NET_IPV6
-	default true if NET_IPV6
+	default n if !NET_IPV6
+	default y if NET_IPV6
 	help
 	  Place the ethernet receiver in promiscuous mode.
 

drivers/ethernet/eth_mcux.c

@@ -142,7 +142,7 @@ static void eth_mcux_phy_enter_reset(struct eth_context *context)
 
 static void eth_mcux_phy_start(struct eth_context *context)
 {
-#ifdef CONFIG_ETH_MCUX_PHY_DETAILED_DEBUG
+#ifdef CONFIG_ETH_MCUX_PHY_EXTRA_DEBUG
 	SYS_LOG_DBG("phy_state=%s", phy_state_name(context->phy_state));
 #endif
 
@@ -166,7 +166,7 @@ static void eth_mcux_phy_start(struct eth_context *context)
 
 void eth_mcux_phy_stop(struct eth_context *context)
 {
-#ifdef CONFIG_ETH_MCUX_PHY_DETAILED_DEBUG
+#ifdef CONFIG_ETH_MCUX_PHY_EXTRA_DEBUG
 	SYS_LOG_DBG("phy_state=%s", phy_state_name(context->phy_state));
 #endif
 
@@ -203,7 +203,7 @@ static void eth_mcux_phy_event(struct eth_context *context)
 	phy_speed_t phy_speed = kPHY_Speed100M;
 	const u32_t phy_addr = 0;
 
-#ifdef CONFIG_ETH_MCUX_PHY_DETAILED_DEBUG
+#ifdef CONFIG_ETH_MCUX_PHY_EXTRA_DEBUG
 	SYS_LOG_DBG("phy_state=%s", phy_state_name(context->phy_state));
 #endif
 	switch (context->phy_state) {

drivers/sensor/lps22hb/lps22hb.c

@@ -56,7 +56,8 @@ static inline void lps22hb_press_convert(struct sensor_value *val,
 	/* Pressure sensitivity is 4096 LSB/hPa */
 	/* Convert raw_val to val in kPa */
 	val->val1 = (raw_val >> 12) / 10;
-	val->val2 = ((s32_t)((raw_val) & 0x0FFF) * 1000L) >> 12;
+	val->val2 = (raw_val >> 12) % 10 * 100000 +
+		(((s32_t)((raw_val) & 0x0FFF) * 100000L) >> 12);
 }
 
 static inline void lps22hb_temp_convert(struct sensor_value *val,

drivers/spi/spi_context.h

@@ -29,13 +29,15 @@ struct spi_context {
 	struct k_poll_signal *signal;
 	bool asynchronous;
 #endif
-	const struct spi_buf **current_tx;
-	struct spi_buf **current_rx;
+	const struct spi_buf *current_tx;
+	size_t tx_count;
+	struct spi_buf *current_rx;
+	size_t rx_count;
 
 	void *tx_buf;
-	u32_t tx_len;
+	size_t tx_len;
 	void *rx_buf;
-	u32_t rx_len;
+	size_t rx_len;
 };
 
 #define SPI_CONTEXT_INIT_LOCK(_data, _ctx_name)				\
@@ -144,36 +146,40 @@ static inline void spi_context_cs_control(struct spi_context *ctx, bool on)
 }
 
 static inline void spi_context_buffers_setup(struct spi_context *ctx,
-					     const struct spi_buf **tx_bufs,
-					     struct spi_buf **rx_bufs,
+					     const struct spi_buf *tx_bufs,
+					     size_t tx_count,
+					     struct spi_buf *rx_bufs,
+					     size_t rx_count,
 					     uint8_t dfs)
 {
-	SYS_LOG_DBG("tx_bufs %p (%p) - rx_bufs %p (%p) - %u",
-		    tx_bufs, tx_bufs ? *tx_bufs : NULL,
-		    rx_bufs, rx_bufs ? *rx_bufs : NULL, dfs);
+	SYS_LOG_DBG("tx_bufs %p (%zu) - rx_bufs %p (%zu) - %u",
+		    tx_bufs, tx_count, rx_bufs, rx_count, dfs);
 
 	ctx->current_tx = tx_bufs;
+	ctx->tx_count = tx_count;
 	ctx->current_rx = rx_bufs;
+	ctx->rx_count = rx_count;
 
-	if (*tx_bufs) {
-		ctx->tx_buf = (*tx_bufs)->buf;
-		ctx->tx_len = (*tx_bufs)->len/dfs;
+	if (tx_bufs) {
+		ctx->tx_buf = tx_bufs->buf;
+		ctx->tx_len = tx_bufs->len / dfs;
 	} else {
 		ctx->tx_buf = NULL;
 		ctx->tx_len = 0;
 	}
 
-	if (*rx_bufs) {
-		ctx->rx_buf = (*rx_bufs)->buf;
-		ctx->rx_len = (*rx_bufs)->len/dfs;
+	if (rx_bufs) {
+		ctx->rx_buf = rx_bufs->buf;
+		ctx->rx_len = rx_bufs->len / dfs;
 	} else {
 		ctx->rx_buf = NULL;
 		ctx->rx_len = 0;
 	}
 
-	SYS_LOG_DBG("current_tx %p, current_rx %p,"
-		    " tx buf/len %p/%u, rx buf/len %p/%u",
-		    ctx->current_tx, ctx->current_rx,
+	SYS_LOG_DBG("current_tx %p (%zu), current_rx %p (%zu),"
+		    " tx buf/len %p/%zu, rx buf/len %p/%zu",
+		    ctx->current_tx, ctx->tx_count,
+		    ctx->current_rx, ctx->rx_count,
 		    ctx->tx_buf, ctx->tx_len, ctx->rx_buf, ctx->rx_len);
 }
 
@@ -187,9 +193,11 @@ void spi_context_update_tx(struct spi_context *ctx, uint8_t dfs)
 	ctx->tx_len--;
 	if (!ctx->tx_len) {
 		ctx->current_tx++;
-		if (*ctx->current_tx) {
-			ctx->tx_buf = (*ctx->current_tx)->buf;
-			ctx->tx_len = (*ctx->current_tx)->len/dfs;
+		ctx->tx_count--;
+
+		if (ctx->tx_count) {
+			ctx->tx_buf = ctx->current_tx->buf;
+			ctx->tx_len = ctx->current_tx->len / dfs;
 		} else {
 			ctx->tx_buf = NULL;
 		}
@@ -197,7 +205,7 @@ void spi_context_update_tx(struct spi_context *ctx, uint8_t dfs)
 		ctx->tx_buf += dfs;
 	}
 
-	SYS_LOG_DBG("tx buf/len %p/%u", ctx->tx_buf, ctx->tx_len);
+	SYS_LOG_DBG("tx buf/len %p/%zu", ctx->tx_buf, ctx->tx_len);
 }
 
 static ALWAYS_INLINE
@@ -216,9 +224,11 @@ void spi_context_update_rx(struct spi_context *ctx, uint8_t dfs)
 	ctx->rx_len--;
 	if (!ctx->rx_len) {
 		ctx->current_rx++;
-		if (*ctx->current_rx) {
-			ctx->rx_buf = (*ctx->current_rx)->buf;
-			ctx->rx_len = (*ctx->current_rx)->len/dfs;
+		ctx->rx_count--;
+
+		if (ctx->rx_count) {
+			ctx->rx_buf = ctx->current_rx->buf;
+			ctx->rx_len = ctx->current_rx->len / dfs;
 		} else {
 			ctx->rx_buf = NULL;
 		}
@@ -226,7 +236,7 @@ void spi_context_update_rx(struct spi_context *ctx, uint8_t dfs)
 		ctx->rx_buf += dfs;
 	}
 
-	SYS_LOG_DBG("rx buf/len %p/%u", ctx->rx_buf, ctx->rx_len);
+	SYS_LOG_DBG("rx buf/len %p/%zu", ctx->rx_buf, ctx->rx_len);
 }
 
 static ALWAYS_INLINE

drivers/spi/spi_dw.c

@@ -251,8 +251,10 @@ static int spi_dw_configure(const struct spi_dw_config *info,
 }
 
 static int transceive(struct spi_config *config,
-		      const struct spi_buf **tx_bufs,
-		      struct spi_buf **rx_bufs,
+		      const struct spi_buf *tx_bufs,
+		      size_t tx_count,
+		      struct spi_buf *rx_bufs,
+		      size_t rx_count,
 		      bool asynchronous,
 		      struct k_poll_signal *signal)
 {
@@ -277,7 +279,8 @@ static int transceive(struct spi_config *config,
 	}
 
 	/* Set buffers info */
-	spi_context_buffers_setup(&spi->ctx, tx_bufs, rx_bufs, spi->dfs);
+	spi_context_buffers_setup(&spi->ctx, tx_bufs, tx_count,
+				  rx_bufs, rx_count, spi->dfs);
 
 	spi->fifo_diff = 0;
 
@@ -317,23 +320,31 @@ out:
 }
 
 static int spi_dw_transceive(struct spi_config *config,
-			     const struct spi_buf **tx_bufs,
-			     struct spi_buf **rx_bufs)
+			     const struct spi_buf *tx_bufs,
+			     size_t tx_count,
+			     struct spi_buf *rx_bufs,
+			     size_t rx_count)
 {
-	SYS_LOG_DBG("%p, %p, %p", config->dev, tx_bufs, rx_bufs);
+	SYS_LOG_DBG("%p, %p (%zu), %p (%zu)",
+		    config->dev, tx_bufs, tx_count, rx_bufs, rx_count);
 
-	return transceive(config, tx_bufs, rx_bufs, false, NULL);
+	return transceive(config, tx_bufs, tx_count,
+			  rx_bufs, rx_count, false, NULL);
 }
 
 #ifdef CONFIG_POLL
 static int spi_dw_transceive_async(struct spi_config *config,
-				   const struct spi_buf **tx_bufs,
-				   struct spi_buf **rx_bufs,
+				   const struct spi_buf *tx_bufs,
+				   size_t tx_count,
+				   struct spi_buf *rx_bufs,
+				   size_t rx_count,
 				   struct k_poll_signal *async)
 {
-	SYS_LOG_DBG("%p, %p, %p, %p", config->dev, tx_bufs, rx_bufs, async);
+	SYS_LOG_DBG("%p, %p (%zu), %p (%zu), %p",
+		    config->dev, tx_bufs, tx_count, rx_bufs, rx_count, async);
 
-	return transceive(config, tx_bufs, rx_bufs, true, async);
+	return transceive(config, tx_bufs, tx_count,
+			  rx_bufs, rx_count, true, async);
 }
 #endif /* CONFIG_POLL */
 

drivers/spi/spi_mcux_dspi.c

@@ -77,6 +77,10 @@ static int spi_mcux_configure(struct device *dev, struct spi_config *spi_config)
 		    word_size, spi_config->max_sys_freq);
 
 	clock_freq = CLOCK_GetFreq(config->clock_source);
+	if (!clock_freq) {
+		SYS_LOG_ERR("Got frequency of 0");
+		return -EINVAL;
+	}
 	DSPI_MasterInit(base, &master_config, clock_freq);
 
 	DSPI_MasterTransferCreateHandle(base, &data->handle,

drivers/timer/nrf_rtc_timer.c

@@ -308,12 +308,21 @@ int _sys_clock_driver_init(struct device *device)
 u32_t _timer_cycle_get_32(void)
 {
 	u32_t elapsed_cycles;
+	u32_t sys_clock_tick_count;
+	u32_t rtc_prev;
+	u32_t rtc_now;
 
-	elapsed_cycles = (RTC_COUNTER -
-			  (_sys_clock_tick_count * RTC_TICKS_PER_SYS_TICK))
-			  & RTC_MASK;
+	rtc_now = RTC_COUNTER;
+	do {
+		sys_clock_tick_count = _sys_clock_tick_count;
+		elapsed_cycles = (rtc_now - (sys_clock_tick_count *
+					     RTC_TICKS_PER_SYS_TICK)) &
+				 RTC_MASK;
+		rtc_prev = rtc_now;
+		rtc_now = RTC_COUNTER;
+	} while (rtc_now != rtc_prev);
 
-	return (_sys_clock_tick_count * sys_clock_hw_cycles_per_tick) +
+	return (sys_clock_tick_count * sys_clock_hw_cycles_per_tick) +
 	       elapsed_cycles;
 }
 

drivers/watchdog/Kconfig.sam

@@ -7,7 +7,7 @@
 
 menuconfig WDT_SAM
 	bool "Atmel SAM MCU Family Watchdog (WDT) Driver"
-	depends on SOC_SERIES_SAME70
+	depends on SOC_FAMILY_SAM
 	default y
 	help
 	  Enable WDT driver for Atmel SAM MCUs.

dts/arm/96b_carbon.dts

@@ -8,8 +8,8 @@
 #include <st/stm32f401.dtsi>
 
 / {
-	model = "STMicroelectronics STM32F401RE-NUCLEO board";
-	compatible = "st,stm32f401re-nucleo", "st,stm32f401";
+	model = "Seeed Studio Carbon 96boards";
+	compatible = "seeed,carbon", "st,stm32f401";
 
 	chosen {
 		zephyr,console = &usart1;

dts/common/yaml/device_node.yaml.template

@@ -0,0 +1,51 @@
+---
+title: <Title should describe what node you are describing>
+version: 0.1
+
+description: >
+    Describe in free form text w/ spanning lines what you
+    are describing
+
+# properties will be the contents of the device tree node
+# property names must match the property names in the DT
+
+properties:
+
+# A typical property entry will look like the following
+# - <name of property as it is in device tree>
+#     category: <required | optional>
+#     type: <string | int | array>
+#     description: <description of property>
+#     generation: <define | structure>
+
+# At a minimum, the compatible is required for matching nodes
+  - compatible: <list of string compatible matches>
+      category: required
+      type: string
+      description: compatible of node
+
+# reg is used to denote mmio registers
+  - reg:
+      type: array
+      description: mmio register space
+      generation: define
+      category: required
+
+# interrupts specifies the interrupts that the driver may utilize
+  - interrupts:
+      type: array
+      category: required
+      description: required interrupts
+      generation: define
+
+# If a node is a interrupt controller, gpio controller, pinmux device
+# or any device which is referenced via phandle plus some number of cells
+# then the cell fiels below must be present.
+cell_string: <cell string prefix>
+
+"#cells":
+  - cell0    # name of first cell
+  - cell1    # name of second cell
+  - cell2    # name of third cell
+  - and so on and so forth
+...

include/arch/arm/cortex_m/error.h

@@ -35,6 +35,21 @@ extern void _SysFatalErrorHandler(unsigned int reason, const NANO_ESF *esf);
 #define _SVC_CALL_IRQ_OFFLOAD		1
 #define _SVC_CALL_RUNTIME_EXCEPT	2
 
+#if defined(CONFIG_ARMV6_M)
+/* ARMv6 will hard-fault if SVC is called with interrupts locked. Just
+ * force them unlocked, the thread is in an undefined state anyway
+ */
+#define _ARCH_EXCEPT(reason_p) do { \
+	__asm__ volatile ( \
+		"cpsie i\n\t" \
+		"mov r0, %[reason]\n\t" \
+		"svc %[id]\n\t" \
+		: \
+		: [reason] "i" (reason_p), [id] "i" (_SVC_CALL_RUNTIME_EXCEPT) \
+		: "memory"); \
+	CODE_UNREACHABLE; \
+} while (0)
+#elif defined(CONFIG_ARMV7_M)
 #define _ARCH_EXCEPT(reason_p) do { \
 	__asm__ volatile ( \
 		"mov r0, %[reason]\n\t" \
@@ -44,6 +59,9 @@ extern void _SysFatalErrorHandler(unsigned int reason, const NANO_ESF *esf);
 		: "memory"); \
 	CODE_UNREACHABLE; \
 } while (0)
+#else
+#error Unknown ARM architecture
+#endif /* CONFIG_ARMV6_M */
 
 #ifdef __cplusplus
 }

include/arch/arm/cortex_m/mpu/arm_mpu.h

@@ -44,6 +44,9 @@ struct arm_mpu {
 #define ARM_MPU_PRIVDEFENA	(1 << 2)
 
 #define REGION_VALID	(1 << 4)
+/* ARM MPU RBAR Register */
+/* Region base address mask */
+#define REGION_BASE_ADDR_MASK	0xFFFFFFE0
 
 /* eXecute Never */
 #define NOT_EXEC        (0x1 << 28)

include/arch/arm/cortex_m/mpu/nxp_mpu.h

@@ -13,23 +13,70 @@
 
 #define NXP_MPU_REGION_NUMBER 12
 
+/* Bus Master User Mode Access */
+#define UM_READ		4
+#define UM_WRITE	2
+#define UM_EXEC		1
+
+#define BM0_UM_SHIFT	0
+#define BM1_UM_SHIFT	6
+#define BM2_UM_SHIFT	12
+#define BM3_UM_SHIFT	18
+
+/* Bus Master Supervisor Mode Access */
+#define SM_RWX_ALLOW	0
+#define SM_RX_ALLOW	1
+#define SM_RW_ALLOW	2
+#define SM_SAME_AS_UM	3
+
+#define BM0_SM_SHIFT	3
+#define BM1_SM_SHIFT	9
+#define BM2_SM_SHIFT	15
+#define BM3_SM_SHIFT	21
+
 /* Read Attribute */
-#define MPU_REGION_READ  ((1 << 2) | (1 << 8) | (1 << 14))
+#define MPU_REGION_READ  ((UM_READ << BM0_UM_SHIFT) | \
+			  (UM_READ << BM1_UM_SHIFT) | \
+			  (UM_READ << BM2_UM_SHIFT) | \
+			  (UM_READ << BM3_UM_SHIFT))
 
 /* Write Attribute */
-#define MPU_REGION_WRITE ((1 << 1) | (1 << 7) | (1 << 13))
+#define MPU_REGION_WRITE ((UM_WRITE << BM0_UM_SHIFT) | \
+			  (UM_WRITE << BM1_UM_SHIFT) | \
+			  (UM_WRITE << BM2_UM_SHIFT) | \
+			  (UM_WRITE << BM3_UM_SHIFT))
 
 /* Execute Attribute */
-#define MPU_REGION_EXEC  ((1 << 0) | (1 << 6) | (1 << 12))
+#define MPU_REGION_EXEC  ((UM_EXEC << BM0_UM_SHIFT) | \
+			  (UM_EXEC << BM1_UM_SHIFT) | \
+			  (UM_EXEC << BM2_UM_SHIFT) | \
+			  (UM_EXEC << BM3_UM_SHIFT))
 
 /* Super User Attributes */
-#define MPU_REGION_SU    ((3 << 3) | (3 << 9) | (3 << 15) | (3 << 21))
+#define MPU_REGION_SU	 ((SM_SAME_AS_UM << BM0_SM_SHIFT) | \
+			  (SM_SAME_AS_UM << BM1_SM_SHIFT) | \
+			  (SM_SAME_AS_UM << BM2_SM_SHIFT) | \
+			  (SM_SAME_AS_UM << BM3_SM_SHIFT))
+
+/* The ENDADDR field has the last 5 bit reserved and set to 1 */
+#define ENDADDR_ROUND(x) (x - 0x1F)
 
 /* Some helper defines for common regions */
-#define REGION_RAM_ATTR	(MPU_REGION_READ | MPU_REGION_WRITE | MPU_REGION_SU)
-#define REGION_FLASH_ATTR (MPU_REGION_READ | MPU_REGION_EXEC | MPU_REGION_SU)
-#define REGION_IO_ATTR (MPU_REGION_READ | MPU_REGION_WRITE | \
-			MPU_REGION_EXEC |  MPU_REGION_SU)
+#define REGION_RAM_ATTR	  (MPU_REGION_READ | \
+			   MPU_REGION_WRITE | \
+			   MPU_REGION_SU)
+
+#define REGION_FLASH_ATTR (MPU_REGION_READ | \
+			   MPU_REGION_EXEC | \
+			   MPU_REGION_SU)
+
+#define REGION_IO_ATTR	  (MPU_REGION_READ | \
+			   MPU_REGION_WRITE | \
+			   MPU_REGION_EXEC | \
+			   MPU_REGION_SU)
+
+#define REGION_RO_ATTR	  (MPU_REGION_READ | \
+			   MPU_REGION_SU)
 
 /* Region definition data structure */
 struct nxp_mpu_region {
@@ -57,6 +104,8 @@ struct nxp_mpu_config {
 	u32_t num_regions;
 	/* Regions */
 	struct nxp_mpu_region *mpu_regions;
+	/* SRAM Region */
+	u32_t sram_region;
 };
 
 /* Reference to the MPU configuration */

include/bluetooth/gatt.h

@@ -1026,7 +1026,8 @@ int bt_gatt_subscribe(struct bt_conn *conn,
  *
  * This procedure unsubscribe to value notification using the Client
  * Characteristic Configuration handle. Notification callback with NULL data
- * will not be called if subscription was removed by this call.
+ * will be called if subscription was removed by this call, until then the
+ * parameters cannot be reused.
  *
  * @param conn Connection object.
  * @param params Subscribe parameters.

include/misc/stack.h

@@ -9,6 +9,9 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
+#ifndef _MISC_STACK_H_
+#define _MISC_STACK_H_
+
 #include <misc/printk.h>
 
 #if defined(CONFIG_INIT_STACKS)
@@ -69,3 +72,5 @@ static inline void stack_analyze(const char *name, const char *stack,
 {
 }
 #endif
+
+#endif /* _MISC_STACK_H_ */

include/net/http.h

@@ -567,6 +567,13 @@ struct http_server_ctx {
 		/** From which net_context the request came from */
 		struct net_context *net_ctx;
 
+		/** HTTP request timer. After sending a response to the
+		 * client, it is possible to wait for any request back via
+		 * the same socket. If no response is received, then this
+		 * timeout is activated and connection is tore down.
+		 */
+		struct k_delayed_work timer;
+
 		/** HTTP parser */
 		struct http_parser parser;
 
@@ -596,6 +603,9 @@ struct http_server_ctx {
 
 		/** URL's length */
 		u16_t url_len;
+
+		/** Has the request timer been cancelled. */
+		u8_t timer_cancelled;
 	} req;
 
 #if defined(CONFIG_HTTPS)
@@ -833,6 +843,25 @@ int http_server_del_default(struct http_server_urls *urls);
 /**
  * @brief Send HTTP response to client.
  *
+ * @detail After sending a response, an optional timeout is started
+ * which will wait for any new requests from the peer.
+ *
+ * @param ctx HTTP context.
+ * @param http_header HTTP headers to send.
+ * @param html_payload HTML payload to send.
+ * @param timeout Timeout to wait until the connection is shutdown.
+ *
+ * @return 0 if ok, <0 if error.
+ */
+int http_response_wait(struct http_server_ctx *ctx, const char *http_header,
+		       const char *html_payload, s32_t timeout);
+
+/**
+ * @brief Send HTTP response to client.
+ *
+ * @detail The connection to peer is torn down right after the response
+ * is sent.
+ *
  * @param ctx HTTP context.
  * @param http_header HTTP headers to send.
  * @param html_payload HTML payload to send.

include/net/net_core.h

@@ -134,7 +134,7 @@ struct net_stack_info {
 #if defined(CONFIG_INIT_STACKS)
 #include <misc/stack.h>
 
-static inline void net_analyze_stack_get_values(unsigned char *stack,
+static inline void net_analyze_stack_get_values(const char *stack,
 						size_t size,
 						unsigned *pcnt,
 						unsigned *unused)
@@ -146,7 +146,7 @@ static inline void net_analyze_stack_get_values(unsigned char *stack,
 }
 
 static inline void net_analyze_stack(const char *name,
-				     unsigned char *stack,
+				     const char *stack,
 				     size_t size)
 {
 	unsigned int pcnt, unused;

include/net/zoap.h

@@ -16,6 +16,7 @@
 #include <zephyr/types.h>
 #include <stddef.h>
 #include <stdbool.h>
+#include <net/net_ip.h>
 
 #include <misc/slist.h>
 

include/spi.h

@@ -190,8 +190,10 @@ struct spi_buf {
  * See spi_transceive() for argument descriptions
  */
 typedef int (*spi_api_io)(struct spi_config *config,
-			  const struct spi_buf **tx_bufs,
-			  struct spi_buf **rx_bufs);
+			  const struct spi_buf *tx_bufs,
+			  size_t tx_count,
+			  struct spi_buf *rx_bufs,
+			  size_t rx_count);
 
 /**
  * @typedef spi_api_io
@@ -199,8 +201,10 @@ typedef int (*spi_api_io)(struct spi_config *config,
  * See spi_transceive_async() for argument descriptions
  */
 typedef int (*spi_api_io_async)(struct spi_config *config,
-				const struct spi_buf **tx_bufs,
-				struct spi_buf **rx_bufs,
+				const struct spi_buf *tx_bufs,
+				size_t tx_count,
+				struct spi_buf *rx_bufs,
+				size_t rx_count,
 				struct k_poll_signal *async);
 
 /**
@@ -229,20 +233,24 @@ struct spi_driver_api {
  * Note: This function is synchronous.
  *
  * @param config Pointer to a valid spi_config structure instance.
- * @param tx_bufs NULL terminated buffer array where data to be sent
- *        originates from, or NULL if none.
- * @param rx_bufs NULL terminated buffer array where data to be read
- *        will be written to, or NULL if none.
+ * @param tx_bufs Buffer array where data to be sent originates from,
+ *        or NULL if none.
+ * @param tx_count Number of element in the tx_bufs array.
+ * @param rx_bufs Buffer array where data to be read will be written to,
+ *        or NULL if none.
+ * @param rx_count Number of element in the rx_bufs array.
  *
  * @retval 0 If successful, negative errno code otherwise.
  */
 static inline int spi_transceive(struct spi_config *config,
-				 const struct spi_buf **tx_bufs,
-				 struct spi_buf **rx_bufs)
+				 const struct spi_buf *tx_bufs,
+				 size_t tx_count,
+				 struct spi_buf *rx_bufs,
+				 size_t rx_count)
 {
 	const struct spi_driver_api *api = config->dev->driver_api;
 
-	return api->transceive(config, tx_bufs, rx_bufs);
+	return api->transceive(config, tx_bufs, tx_count, rx_bufs, rx_count);
 }
 
 /**
@@ -251,17 +259,18 @@ static inline int spi_transceive(struct spi_config *config,
  * Note: This function is synchronous.
  *
  * @param config Pointer to a valid spi_config structure instance.
- * @param rx_bufs NULL terminated buffer array where data to be read
- *        will be written to.
+ * @param rx_bufs Buffer array where data to be read will be written to.
+ * @param rx_count Number of element in the rx_bufs array.
  *
  * @retval 0 If successful, negative errno code otherwise.
  */
 static inline int spi_read(struct spi_config *config,
-			   struct spi_buf **rx_bufs)
+			   struct spi_buf *rx_bufs,
+			   size_t rx_count)
 {
 	const struct spi_driver_api *api = config->dev->driver_api;
 
-	return api->transceive(config, NULL, rx_bufs);
+	return api->transceive(config, NULL, 0, rx_bufs, rx_count);
 }
 
 /**
@@ -270,17 +279,18 @@ static inline int spi_read(struct spi_config *config,
  * Note: This function is synchronous.
  *
  * @param config Pointer to a valid spi_config structure instance.
- * @param tx_bufs NULL terminated buffer array where data to be sent
- *        originates from.
+ * @param tx_bufs Buffer array where data to be sent originates from.
+ * @param tx_count Number of element in the tx_bufs array.
  *
  * @retval 0 If successful, negative errno code otherwise.
  */
 static inline int spi_write(struct spi_config *config,
-			    const struct spi_buf **tx_bufs)
+			    const struct spi_buf *tx_bufs,
+			    size_t tx_count)
 {
 	const struct spi_driver_api *api = config->dev->driver_api;
 
-	return api->transceive(config, tx_bufs, NULL);
+	return api->transceive(config, tx_bufs, tx_count, NULL, 0);
 }
 
 #ifdef CONFIG_POLL
@@ -290,10 +300,12 @@ static inline int spi_write(struct spi_config *config,
  * Note: This function is asynchronous.
  *
  * @param config Pointer to a valid spi_config structure instance.
- * @param tx_bufs NULL terminated buffer array where data to be sent
- *        originates from, or NULL if none.
- * @param rx_bufs NULL terminated buffer array where data to be read
- *        will be written to, or NULL if none.
+ * @param tx_bufs Buffer array where data to be sent originates from,
+ *        or NULL if none.
+ * @param tx_count Number of element in the tx_bufs array.
+ * @param rx_bufs Buffer array where data to be read will be written to,
+ *        or NULL if none.
+ * @param rx_count Number of element in the rx_bufs array.
  * @param async A pointer to a valid and ready to be signaled
  *        struct k_poll_signal. (Note: if NULL this function will not
  *        notify the end of the transaction, and whether it went
@@ -302,13 +314,16 @@ static inline int spi_write(struct spi_config *config,
  * @retval 0 If successful, negative errno code otherwise.
  */
 static inline int spi_transceive_async(struct spi_config *config,
-				       const struct spi_buf **tx_bufs,
-				       struct spi_buf **rx_bufs,
+				       const struct spi_buf *tx_bufs,
+				       size_t tx_count,
+				       struct spi_buf *rx_bufs,
+				       size_t rx_count,
 				       struct k_poll_signal *async)
 {
 	const struct spi_driver_api *api = config->dev->driver_api;
 
-	return api->transceive_async(config, tx_bufs, rx_bufs, async);
+	return api->transceive_async(config, tx_bufs, tx_count,
+				     rx_bufs, rx_count, async);
 }
 
 /**
@@ -317,8 +332,8 @@ static inline int spi_transceive_async(struct spi_config *config,
  * Note: This function is asynchronous.
  *
  * @param config Pointer to a valid spi_config structure instance.
- * @param rx_bufs NULL terminated buffer array where data to be read
- *        will be written to.
+ * @param rx_bufs Buffer array where data to be read will be written to.
+ * @param rx_count Number of element in the rx_bufs array.
  * @param async A pointer to a valid and ready to be signaled
  *        struct k_poll_signal. (Note: if NULL this function will not
  *        notify the end of the transaction, and whether it went
@@ -327,12 +342,14 @@ static inline int spi_transceive_async(struct spi_config *config,
  * @retval 0 If successful, negative errno code otherwise.
  */
 static inline int spi_read_async(struct spi_config *config,
-				 struct spi_buf **rx_bufs,
+				 struct spi_buf *rx_bufs,
+				 size_t rx_count,
 				 struct k_poll_signal *async)
 {
 	const struct spi_driver_api *api = config->dev->driver_api;
 
-	return api->transceive_async(config, NULL, rx_bufs, async);
+	return api->transceive_async(config, NULL, 0,
+				     rx_bufs, rx_count, async);
 }
 
 /**
@@ -341,8 +358,8 @@ static inline int spi_read_async(struct spi_config *config,
  * Note: This function is asynchronous.
  *
  * @param config Pointer to a valid spi_config structure instance.
- * @param tx_bufs NULL terminated buffer array where data to be sent
- *        originates from.
+ * @param tx_bufs Buffer array where data to be sent originates from.
+ * @param tx_count Number of element in the tx_bufs array.
  * @param async A pointer to a valid and ready to be signaled
  *        struct k_poll_signal. (Note: if NULL this function will not
  *        notify the end of the transaction, and whether it went
@@ -351,12 +368,14 @@ static inline int spi_read_async(struct spi_config *config,
  * @retval 0 If successful, negative errno code otherwise.
  */
 static inline int spi_write_async(struct spi_config *config,
-				  const struct spi_buf **tx_bufs,
+				  const struct spi_buf *tx_bufs,
+				  size_t tx_count,
 				  struct k_poll_signal *async)
 {
 	const struct spi_driver_api *api = config->dev->driver_api;
 
-	return api->transceive_async(config, tx_bufs, NULL, async);
+	return api->transceive_async(config, tx_bufs, tx_count,
+				     NULL, 0, async);
 }
 #endif /* CONFIG_POLL */
 

include/uart.h

@@ -241,6 +241,15 @@ static inline unsigned char uart_poll_out(struct device *dev,
 /**
  * @brief Fill FIFO with data.
  *
+ * @details This function is expected to be called from UART
+ * interrupt handler (ISR), if uart_irq_tx_ready() returns true.
+ * Result of calling this function not from an ISR is undefined
+ * (hardware-dependent). Likewise, *not* calling this function
+ * from an ISR if uart_irq_tx_ready() returns true may lead to
+ * undefined behavior, e.g. infinite interrupt loops. It's
+ * mandatory to test return value of this function, as different
+ * hardware has different FIFO depth (oftentimes just 1).
+ *
  * @param dev UART device structure.
  * @param tx_data Data to transmit.
  * @param size Number of bytes to send.
@@ -262,6 +271,16 @@ static inline int uart_fifo_fill(struct device *dev, const u8_t *tx_data,
 /**
  * @brief Read data from FIFO.
  *
+ * @details This function is expected to be called from UART
+ * interrupt handler (ISR), if uart_irq_rx_ready() returns true.
+ * Result of calling this function not from an ISR is undefined
+ * (hardware-dependent). It's unspecified whether "RX ready"
+ * condition as returned by uart_irq_rx_ready() is level- or
+ * edge- triggered. That means that once uart_irq_rx_ready() is
+ * detected, uart_fifo_read() must be called until it reads all
+ * available data in the FIFO (i.e. until it returns less data
+ * than was requested).
+ *
  * @param dev UART device structure.
  * @param rx_data Data container.
  * @param size Container size.
@@ -406,16 +425,21 @@ static inline int __deprecated uart_irq_tx_empty(struct device *dev)
 }
 
 /**
- * @brief Check if UART RX buffer has a new char
+ * @brief Check if UART RX buffer has a received char
  *
+ * @details Check if UART RX buffer has at least one pending character
  * (i.e. uart_fifo_read() will succeed and return non-zero). This function
  * must be called in a UART interrupt handler, or its result is undefined.
  * Before calling this function in the interrupt handler, uart_irq_update()
- * must be called once per the handler invocation.
+ * must be called once per the handler invocation. It's unspecified whether
+ * condition as returned by this function is level- or edge- triggered (i.e.
+ * if this function returns true when RX FIFO is non-empty, or when a new
+ * char was received since last call to it). See description of
+ * uart_fifo_read() for implication of this.
  *
  * @param dev UART device structure.
  *
- * @retval 1 If a new received char is ready.
+ * @retval 1 If a received char is ready.
  * @retval 0 Otherwise.
  */
 static inline int uart_irq_rx_ready(struct device *dev)

lib/json/json.h

@@ -154,7 +154,8 @@ typedef int (*json_append_bytes_t)(const u8_t *bytes, size_t len,
  *      };
  *
  *      struct json_obj_descr array[] = {
- *           JSON_OBJ_DESCR_ARRAY(struct example, foo, JSON_TOK_NUMBER)
+ *           JSON_OBJ_DESCR_ARRAY(struct example, foo, 10, foo_len,
+ *                                JSON_TOK_NUMBER)
  *      };
  */
 #define JSON_OBJ_DESCR_ARRAY(struct_, field_name_, max_len_, \
@@ -171,6 +172,95 @@ typedef int (*json_append_bytes_t)(const u8_t *bytes, size_t len,
 		.n_elements = (max_len_), \
 	}
 
+/**
+ * @brief Variant of JSON_OBJ_DESCR_PRIM that can be used when the
+ *        structure and JSON field names differ.
+ *
+ * This is useful when the JSON field is not a valid C identifier.
+ *
+ * @param struct_ Struct packing the values.
+ *
+ * @param json_field_name_ String, field name in JSON strings
+ *
+ * @param struct_field_name_ Field name in the struct
+ *
+ * @param type_ Token type for JSON value corresponding to a primitive
+ * type.
+ *
+ * @see JSON_OBJ_DESCR_PRIM
+ */
+#define JSON_OBJ_DESCR_PRIM_NAMED(struct_, json_field_name_, \
+				  struct_field_name_, type_) \
+	{ \
+		.field_name = (json_field_name_), \
+		.field_name_len = sizeof(json_field_name_) - 1, \
+		.offset = offsetof(struct_, struct_field_name_), \
+		.type = type_, \
+	}
+
+/**
+ * @brief Variant of JSON_OBJ_DESCR_OBJECT that can be used when the
+ *        structure and JSON field names differ.
+ *
+ * This is useful when the JSON field is not a valid C identifier.
+ *
+ * @param struct_ Struct packing the values
+ *
+ * @param json_field_name_ String, field name in JSON strings
+ *
+ * @param struct_field_name_ Field name in the struct
+ *
+ * @param sub_descr_ Array of json_obj_descr describing the subobject
+ *
+ * @see JSON_OBJ_DESCR_OBJECT
+ */
+#define JSON_OBJ_DESCR_OBJECT_NAMED(struct_, json_field_name_, \
+				    struct_field_name_, sub_descr_) \
+	{ \
+		.field_name = (json_field_name_), \
+		.field_name_len = (sizeof(json_field_name_) - 1), \
+		.offset = offsetof(struct_, struct_field_name_), \
+		.type = JSON_TOK_OBJECT_START, \
+		.sub_descr = sub_descr_, \
+		.sub_descr_len = ARRAY_SIZE(sub_descr_) \
+	}
+
+/**
+ * @brief Variant of JSON_OBJ_DESCR_ARRAY that can be used when the
+ *        structure and JSON field names differ.
+ *
+ * This is useful when the JSON field is not a valid C identifier.
+ *
+ * @param struct_ Struct packing the values
+ *
+ * @param json_field_name_ String, field name in JSON strings
+ *
+ * @param struct_field_name_ Field name in the struct
+ *
+ * @param max_len_ Maximum number of elements in array
+ *
+ * @param len_field_ Field name in the struct for the number of elements
+ * in the array
+ *
+ * @param elem_type_ Element type
+ *
+ * @see JSON_OBJ_DESCR_ARRAY
+ */
+#define JSON_OBJ_DESCR_ARRAY_NAMED(struct_, json_field_name_,\
+				   struct_field_name_, max_len_, len_field_, \
+				   elem_type_) \
+	{ \
+		.field_name = (json_field_name_), \
+		.field_name_len = sizeof(json_field_name_) - 1, \
+		.offset = offsetof(struct_, struct_field_name_), \
+		.type = JSON_TOK_LIST_START, \
+		.element_descr = &(struct json_obj_descr) { \
+			.type = elem_type_, \
+			.offset = offsetof(struct_, len_field_), \
+		}, \
+		.n_elements = (max_len_), \
+	}
+
 /**
  * @brief Parses the JSON-encoded object pointer to by @param json, with
  * size @param len, according to the descriptor pointed to by @param descr.

misc/printk.c

@@ -90,6 +90,7 @@ void _vprintk(out_func_t out, void *ctx, const char *fmt, va_list ap)
 	int might_format = 0; /* 1 if encountered a '%' */
 	enum pad_type padding = PAD_NONE;
 	int min_width = -1;
+	int long_ctr = 0;
 
 	/* fmt has already been adjusted if needed */
 
@@ -101,6 +102,7 @@ void _vprintk(out_func_t out, void *ctx, const char *fmt, va_list ap)
 				might_format = 1;
 				min_width = -1;
 				padding = PAD_NONE;
+				long_ctr = 0;
 			}
 		} else {
 			switch (*fmt) {
@@ -124,14 +126,21 @@ void _vprintk(out_func_t out, void *ctx, const char *fmt, va_list ap)
 					padding = PAD_SPACE_BEFORE;
 				}
 				goto still_might_format;
-			case 'z':
 			case 'l':
+				long_ctr++;
+				/* Fall through */
+			case 'z':
 			case 'h':
 				/* FIXME: do nothing for these modifiers */
 				goto still_might_format;
 			case 'd':
 			case 'i': {
-				long d = va_arg(ap, long);
+				long d;
+				if (long_ctr < 2) {
+					d = va_arg(ap, long);
+				} else {
+					d = (long)va_arg(ap, long long);
+				}
 
 				if (d < 0) {
 					out((int)'-', ctx);
@@ -143,8 +152,14 @@ void _vprintk(out_func_t out, void *ctx, const char *fmt, va_list ap)
 				break;
 			}
 			case 'u': {
-				unsigned long u = va_arg(
-					ap, unsigned long);
+				unsigned long u;
+
+				if (long_ctr < 2) {
+					u = va_arg(ap, unsigned long);
+				} else {
+					u = (unsigned long)va_arg(ap,
+							unsigned long long);
+				}
 				_printk_dec_ulong(out, ctx, u, padding,
 						  min_width);
 				break;
@@ -158,8 +173,15 @@ void _vprintk(out_func_t out, void *ctx, const char *fmt, va_list ap)
 				  /* Fall through */
 			case 'x':
 			case 'X': {
-				unsigned long x = va_arg(
-					ap, unsigned long);
+				unsigned long x;
+
+				if (long_ctr < 2) {
+					x = va_arg(ap, unsigned long);
+				} else {
+					x = (unsigned long)va_arg(ap,
+							unsigned long long);
+				}
+
 				_printk_hex_ulong(out, ctx, x, padding,
 						  min_width);
 				break;

samples/cpp_synchronization/Makefile

@@ -0,0 +1,5 @@
+BOARD ?= qemu_x86
+CONF_FILE = prj.conf
+
+
+include ${ZEPHYR_BASE}/Makefile.inc

samples/cpp_synchronization/README.txt

@@ -0,0 +1,62 @@
+Title: C++ Synchronization
+
+Description:
+The sample project illustrates usage of pure virtual class, member
+functions with different types of arguments, global objects constructor
+invocation.
+
+A simple application demonstrates basic sanity of the kernel.  The main thread
+and a cooperative thread take turns printing a greeting message to the console,
+and use timers and semaphores to control the rate at which messages are
+generated. This demonstrates that kernel scheduling, communication, and
+timing are operating correctly.
+
+--------------------------------------------------------------------------------
+
+Building and Running Project:
+
+This kernel project outputs to the console.  It can be built and executed
+on QEMU as follows:
+
+    make run
+
+--------------------------------------------------------------------------------
+
+Troubleshooting:
+
+Problems caused by out-dated project information can be addressed by
+issuing one of the following commands then rebuilding the project:
+
+    make clean          # discard results of previous builds
+                        # but keep existing configuration info
+or
+    make pristine       # discard results of previous builds
+                        # and restore pre-defined configuration info
+
+--------------------------------------------------------------------------------
+
+Sample Output:
+
+Create semaphore 0x001042b0
+Create semaphore 0x001042c4
+main: Hello World!
+coop_thread_entry: Hello World!
+main: Hello World!
+coop_thread_entry: Hello World!
+main: Hello World!
+coop_thread_entry: Hello World!
+main: Hello World!
+coop_thread_entry: Hello World!
+main: Hello World!
+coop_thread_entry: Hello World!
+main: Hello World!
+coop_thread_entry: Hello World!
+main: Hello World!
+coop_thread_entry: Hello World!
+main: Hello World!
+coop_thread_entry: Hello World!
+main: Hello World!
+coop_thread_entry: Hello World!
+main: Hello World!
+
+<repeats endlessly>

samples/cpp_synchronization/prj.conf

@@ -0,0 +1 @@
+CONFIG_CPLUSPLUS=y

samples/cpp_synchronization/src/Makefile

@@ -0,0 +1 @@
+obj-y = main.o

samples/cpp_synchronization/src/main.cpp

@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2015-2016 Wind River Systems, Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+ * @file C++ Synchronization demo.  Uses basic C++ functionality.
+ */
+
+#include <stdio.h>
+#include <zephyr.h>
+#include <arch/cpu.h>
+#include <misc/printk.h>
+
+/**
+ * @class semaphore the basic pure virtual semaphore class
+ */
+class semaphore {
+public:
+	virtual int wait(void) = 0;
+	virtual int wait(int timeout) = 0;
+	virtual void give(void) = 0;
+};
+
+/* specify delay between greetings (in ms); compute equivalent in ticks */
+#define SLEEPTIME  500
+#define STACKSIZE 2000
+
+struct k_thread coop_thread;
+char __stack coop_stack[STACKSIZE];
+
+/*
+ * @class cpp_semaphore
+ * @brief nano semaphore
+ *
+ * Class derives from the pure virtual semaphore class and
+ * implements it's methods for the nanokernel semaphore
+ */
+class cpp_semaphore: public semaphore {
+protected:
+	struct k_sem _sema_internal;
+public:
+	cpp_semaphore();
+	virtual ~cpp_semaphore() {}
+	virtual int wait(void);
+	virtual int wait(int timeout);
+	virtual void give(void);
+};
+
+/*
+ * @brief cpp_semaphore basic constructor
+ */
+cpp_semaphore::cpp_semaphore()
+{
+	printk("Create semaphore %p\n", this);
+	k_sem_init(&_sema_internal, 0, UINT_MAX);
+}
+
+/*
+ * @brief wait for a semaphore
+ *
+ * Test a semaphore to see if it has been signaled.  If the signal
+ * count is greater than zero, it is decremented.
+ *
+ * @return 1 when semaphore is available
+ */
+int cpp_semaphore::wait(void)
+{
+	k_sem_take(&_sema_internal, K_FOREVER);
+	return 1;
+}
+
+/*
+ * @brief wait for a semaphore within a specified timeout
+ *
+ * Test a semaphore to see if it has been signaled.  If the signal
+ * count is greater than zero, it is decremented. The function
+ * waits for timeout specified
+ *
+ * @param timeout the specified timeout in ticks
+ *
+ * @return 1 if semaphore is available, 0 if timed out
+ */
+int cpp_semaphore::wait(int timeout)
+{
+	return k_sem_take(&_sema_internal, timeout);
+}
+
+/**
+ *
+ * @brief Signal a semaphore
+ *
+ * This routine signals the specified semaphore.
+ *
+ * @return N/A
+ */
+void cpp_semaphore::give(void)
+{
+	k_sem_give(&_sema_internal);
+}
+
+cpp_semaphore sem_main;
+cpp_semaphore sem_coop;
+
+void coop_thread_entry(void)
+{
+	struct k_timer timer;
+
+	k_timer_init(&timer, NULL, NULL);
+
+	while (1) {
+		/* wait for main thread to let us have a turn */
+		sem_coop.wait();
+
+		/* say "hello" */
+		printk("%s: Hello World!\n", __FUNCTION__);
+
+		/* wait a while, then let main thread have a turn */
+		k_timer_start(&timer, SLEEPTIME, 0);
+		k_timer_status_sync(&timer);
+		sem_main.give();
+	}
+}
+
+void main(void)
+{
+	struct k_timer timer;
+
+	k_thread_create(&coop_thread, coop_stack, STACKSIZE,
+			(k_thread_entry_t) coop_thread_entry,
+			NULL, NULL, NULL, K_PRIO_COOP(7), 0, 0);
+	k_timer_init(&timer, NULL, NULL);
+
+	while (1) {
+		/* say "hello" */
+		printk("%s: Hello World!\n", __FUNCTION__);
+
+		/* wait a while, then let coop thread have a turn */
+		k_timer_start(&timer, SLEEPTIME, 0);
+		k_timer_status_sync(&timer);
+		sem_coop.give();
+
+		/* Wait for coop thread to let us have a turn */
+		sem_main.wait();
+	}
+}

samples/cpp_synchronization/testcase.ini

@@ -0,0 +1,4 @@
+[test]
+build_only = true
+tags = apps
+filter = ZEPHYR_GCC_VARIANT != "issm"

samples/drivers/spi/src/spi.c

@@ -88,19 +88,22 @@ static int cs_ctrl_gpio_config(struct spi_cs_control *cs)
 
 static int spi_complete_loop(struct spi_config *spi_conf)
 {
-	struct spi_buf tx = {
-		.buf = buffer_tx,
-		.len = BUF_SIZE,
+	const struct spi_buf tx_bufs[] = {
+		{
+			.buf = buffer_tx,
+			.len = BUF_SIZE,
+		},
 	};
-	struct spi_buf rx = {
-		.buf = buffer_rx,
-		.len = BUF_SIZE,
+	struct spi_buf rx_bufs[] = {
+		{
+			.buf = buffer_rx,
+			.len = BUF_SIZE,
+		},
 	};
-	const struct spi_buf *tx_bufs[] = { &tx, NULL };
-	struct spi_buf *rx_bufs[] = { &rx, NULL };
 	int ret;
 
-	ret = spi_transceive(spi_conf, tx_bufs, rx_bufs);
+	ret = spi_transceive(spi_conf, tx_bufs, ARRAY_SIZE(tx_bufs),
+			     rx_bufs, ARRAY_SIZE(rx_bufs));
 	if (ret) {
 		SYS_LOG_ERR("Code %d", ret);
 		return ret;
@@ -119,21 +122,24 @@ static int spi_complete_loop(struct spi_config *spi_conf)
 
 static int spi_rx_half_start(struct spi_config *spi_conf)
 {
-	struct spi_buf tx = {
-		.buf = buffer_tx,
-		.len = BUF_SIZE,
+	const struct spi_buf tx_bufs[] = {
+		{
+			.buf = buffer_tx,
+			.len = BUF_SIZE,
+		},
 	};
-	struct spi_buf rx = {
-		.buf = buffer_rx,
-		.len = 8,
+	struct spi_buf rx_bufs[] = {
+		{
+			.buf = buffer_rx,
+			.len = 8,
+		},
 	};
-	const struct spi_buf *tx_bufs[] = { &tx, NULL };
-	struct spi_buf *rx_bufs[] = { &rx, NULL };
 	int ret;
 
 	memset(buffer_rx, 0, BUF_SIZE);
 
-	ret = spi_transceive(spi_conf, tx_bufs, rx_bufs);
+	ret = spi_transceive(spi_conf, tx_bufs, ARRAY_SIZE(tx_bufs),
+			     rx_bufs, ARRAY_SIZE(rx_bufs));
 	if (ret) {
 		SYS_LOG_ERR("Code %d", ret);
 		return -1;
@@ -151,25 +157,28 @@ static int spi_rx_half_start(struct spi_config *spi_conf)
 
 static int spi_rx_half_end(struct spi_config *spi_conf)
 {
-	struct spi_buf tx = {
-		.buf = buffer_tx,
-		.len = BUF_SIZE,
+	const struct spi_buf tx_bufs[] = {
+		{
+			.buf = buffer_tx,
+			.len = BUF_SIZE,
+		},
 	};
-	struct spi_buf rx_1st_half = {
-		.buf = NULL,
-		.len = 8,
+	struct spi_buf rx_bufs[] = {
+		{
+			.buf = NULL,
+			.len = 8,
+		},
+		{
+			.buf = buffer_rx,
+			.len = 8,
+		},
 	};
-	struct spi_buf rx_last_half = {
-		.buf = buffer_rx,
-		.len = 8,
-	};
-	const struct spi_buf *tx_bufs[] = { &tx, NULL };
-	struct spi_buf *rx_bufs[] = { &rx_1st_half, &rx_last_half, NULL };
 	int ret;
 
 	memset(buffer_rx, 0, BUF_SIZE);
 
-	ret = spi_transceive(spi_conf, tx_bufs, rx_bufs);
+	ret = spi_transceive(spi_conf, tx_bufs, ARRAY_SIZE(tx_bufs),
+			     rx_bufs, ARRAY_SIZE(rx_bufs));
 	if (ret) {
 		SYS_LOG_ERR("Code %d", ret);
 		return -1;
@@ -187,37 +196,43 @@ static int spi_rx_half_end(struct spi_config *spi_conf)
 
 static int spi_rx_every_4(struct spi_config *spi_conf)
 {
-	struct spi_buf tx = {
-		.buf = buffer_tx,
-		.len = BUF_SIZE,
+	const struct spi_buf tx_bufs[] = {
+		{
+			.buf = buffer_tx,
+			.len = BUF_SIZE,
+		},
 	};
-	struct spi_buf rx_start = {
-		.buf = NULL,
-		.len = 4,
+	struct spi_buf rx_bufs[] = {
+		{
+			.buf = NULL,
+			.len = 4,
+		},
+		{
+			.buf = buffer_rx,
+			.len = 4,
+		},
+		{
+			.buf = NULL,
+			.len = 4,
+		},
+		{
+			.buf = buffer_rx + 4,
+			.len = 4,
+		},
 	};
-	struct spi_buf rx_1 = {
-		.buf = buffer_rx,
-		.len = 4,
-	};
-	struct spi_buf rx_2 = {
-		.buf = buffer_rx+4,
-		.len = 4,
-	};
-	const struct spi_buf *tx_bufs[] = { &tx, NULL };
-	struct spi_buf *rx_bufs[] = { &rx_start, &rx_1,
-				      &rx_start, &rx_2, NULL };
 	int ret;
 
 	memset(buffer_rx, 0, BUF_SIZE);
 
-	ret = spi_transceive(spi_conf, tx_bufs, rx_bufs);
+	ret = spi_transceive(spi_conf, tx_bufs, ARRAY_SIZE(tx_bufs),
+			     rx_bufs, ARRAY_SIZE(rx_bufs));
 	if (ret) {
 		SYS_LOG_ERR("Code %d", ret);
 		return -1;
 	}
 
-	if (memcmp(buffer_tx+4, buffer_rx, 4) ||
-	    memcmp(buffer_tx+12, buffer_rx+4, 4)) {
+	if (memcmp(buffer_tx + 4, buffer_rx, 4) ||
+	    memcmp(buffer_tx + 12, buffer_rx + 4, 4)) {
 		SYS_LOG_ERR("Buffer contents are different");
 		return -1;
 	}
@@ -256,19 +271,22 @@ static void spi_async_call_cb(struct k_poll_event *async_evt,
 
 static int spi_async_call(struct spi_config *spi_conf)
 {
-	struct spi_buf tx = {
-		.buf = buffer_tx,
-		.len = BUF_SIZE,
+	const struct spi_buf tx_bufs[] = {
+		{
+			.buf = buffer_tx,
+			.len = BUF_SIZE,
+		},
 	};
-	struct spi_buf rx = {
-		.buf = buffer_rx,
-		.len = BUF_SIZE,
+	struct spi_buf rx_bufs[] = {
+		{
+			.buf = buffer_rx,
+			.len = BUF_SIZE,
+		},
 	};
-	const struct spi_buf *tx_bufs[] = { &tx, NULL };
-	struct spi_buf *rx_bufs[] = { &rx, NULL };
 	int ret;
 
-	ret = spi_transceive_async(spi_conf, tx_bufs, rx_bufs, &async_sig);
+	ret = spi_transceive_async(spi_conf, tx_bufs, ARRAY_SIZE(tx_bufs),
+				   rx_bufs, ARRAY_SIZE(rx_bufs), &async_sig);
 	if (ret) {
 		SYS_LOG_ERR("Code %d", ret);
 		return -1;

samples/mpu_stack_guard_test/testcase.ini

@@ -7,4 +7,4 @@ build_only = true
 extra_args = CONF_FILE=prj_stack_guard.conf
 tags = apps
 arch_whitelist = arm
-filter = CONFIG_MPU_STACK_GUARD and CONFIG_ARM_MPU
+filter = CONFIG_MPU_STACK_GUARD

samples/net/coaps_client/src/coaps_client.c

@@ -184,7 +184,7 @@ void dtls_client(void)
 	int ret;
 	struct udp_context ctx;
 	struct dtls_timing_context timer;
-	struct zoap_packet request, zkt;
+	struct zoap_packet request, zpkt;
 	struct zoap_reply *reply;
 	struct net_pkt *pkt;
 	struct net_buf *frag;

samples/net/coaps_client/src/udp.c

@@ -82,7 +82,7 @@ int udp_tx(void *context, const unsigned char *buf, size_t size)
 	}
 }
 
-int udp_rx(void *context, unsigned char *buf, size_t size, u32_t timeout)
+int udp_rx(void *context, unsigned char *buf, size_t size)
 {
 	struct udp_context *ctx = context;
 	struct net_buf *rx_buf = NULL;
@@ -92,10 +92,7 @@ int udp_rx(void *context, unsigned char *buf, size_t size, u32_t timeout)
 	int len;
 	int rc;
 
-	rc = k_sem_take(&ctx->rx_sem, timeout == 0 ? K_FOREVER : timeout);
-	if (rc != 0) {
-		return MBEDTLS_ERR_SSL_TIMEOUT;
-	}
+	k_sem_take(&ctx->rx_sem, K_FOREVER);
 
 	read_bytes = net_pkt_appdatalen(ctx->rx_pkt);
 	if (read_bytes > size) {

samples/net/coaps_client/src/udp.h

@@ -18,6 +18,6 @@ struct udp_context {
 
 int udp_init(struct udp_context *ctx);
 int udp_tx(void *ctx, const unsigned char *buf, size_t size);
-int udp_rx(void *ctx, unsigned char *buf, size_t size, u32_t timeout);
+int udp_rx(void *ctx, unsigned char *buf, size_t size);
 
 #endif

samples/net/coaps_client/testcase.ini

@@ -1,4 +1,4 @@
 [test]
 tags = net
 build_only = true
-arch_whitelist = qemu_x86 arduino_101
+platform_whitelist = qemu_x86

samples/net/http_client/prj_frdm_k64f.conf

@@ -12,8 +12,8 @@ CONFIG_NET_IFACE_UNICAST_IPV4_ADDR_COUNT=3
 
 CONFIG_NET_PKT_RX_COUNT=64
 CONFIG_NET_PKT_TX_COUNT=64
-CONFIG_NET_BUF_RX_COUNT=16
-CONFIG_NET_BUF_TX_COUNT=16
+CONFIG_NET_BUF_RX_COUNT=64
+CONFIG_NET_BUF_TX_COUNT=64
 
 CONFIG_NET_IPV4=y
 CONFIG_NET_DHCPV4=y

samples/net/http_client/prj_qemu_x86.conf

@@ -6,10 +6,10 @@ CONFIG_NET_LOG=y
 CONFIG_NET_SLIP_TAP=y
 CONFIG_INIT_STACKS=y
 
-CONFIG_NET_PKT_RX_COUNT=16
-CONFIG_NET_PKT_TX_COUNT=16
-CONFIG_NET_BUF_RX_COUNT=16
-CONFIG_NET_BUF_TX_COUNT=16
+CONFIG_NET_PKT_RX_COUNT=64
+CONFIG_NET_PKT_TX_COUNT=64
+CONFIG_NET_BUF_RX_COUNT=64
+CONFIG_NET_BUF_TX_COUNT=64
 
 CONFIG_NET_IPV6_RA_RDNSS=y
 CONFIG_NET_IF_UNICAST_IPV6_ADDR_COUNT=2

samples/net/http_server/README.rst

@@ -217,6 +217,27 @@ and this is the HTML message that wget will save:
 	<body><h1><center>404 Not Found</center></h1></body>
 	</html>
 
+To test the HTTP Basic Authentication functionality, use the
+following command:
+
+.. code-block:: console
+
+	wget 192.168.1.120/auth -O index.html --user=zephyr --password=0123456789
+
+the :file:`index.html` file will contain the following information:
+
+.. code-block:: html
+
+	<html>
+	<head>
+	<title>Zephyr HTTP Server</title>
+	</head>
+	<body>
+	<h1><center>Zephyr HTTP server</center></h1>
+	<h2><center>user: zephyr, password: 0123456789</center></h2>
+	</body>
+	</html>
+
 HTTPS Server
 ============
 
@@ -274,4 +295,3 @@ Known Issues and Limitations
 
 - Currently, this sample application only generates HTTP responses in
   chunk transfer mode.
-- Basic authentication is not yet implemented.

samples/net/http_server/src/config.h

@@ -30,4 +30,12 @@
 #define ZEPHYR_PORT		8080
 #endif
 
+#define HTTP_AUTH_URL		"/auth"
+#define HTTP_AUTH_TYPE		"Basic"
+
+/* HTTP Basic Auth, see https://tools.ietf.org/html/rfc7617 */
+#define HTTP_AUTH_REALM		"Zephyr"
+#define HTTP_AUTH_USERNAME	"zephyr"
+#define HTTP_AUTH_PASSWORD	"0123456789"
+
 #endif

samples/net/http_server/src/main.c

@@ -17,6 +17,11 @@
 #include <zephyr.h>
 #include <stdio.h>
 
+/* For Basic auth, we need base64 decoder which can be found
+ * in mbedtls library.
+ */
+#include <mbedtls/base64.h>
+
 #include <net/net_context.h>
 #include <net/http.h>
 
@@ -77,6 +82,10 @@ void panic(const char *msg)
 				"Transfer-Encoding: chunked\r\n" \
 				"\r\n"
 
+#define HTTP_401_STATUS_US	"HTTP/1.1 401 Unauthorized status\r\n" \
+				"WWW-Authenticate: Basic realm=" \
+				"\""HTTP_AUTH_REALM"\"\r\n\r\n"
+
 #define HTML_HEADER		"<html><head>" \
 				"<title>Zephyr HTTP Server</title>" \
 				"</head><body><h1>" \
@@ -155,9 +164,12 @@ int http_response_header_fields(struct http_server_ctx *ctx)
 
 static int http_response_it_works(struct http_server_ctx *ctx)
 {
-	return http_response(ctx, HTTP_STATUS_200_OK, HTML_HEADER
-			     "<body><h2><center>It Works!</center></h2>"
-			     HTML_FOOTER);
+	/* Let the peer close the connection but if it does not do it
+	 * close it ourselves after 1 sec.
+	 */
+	return http_response_wait(ctx, HTTP_STATUS_200_OK, HTML_HEADER
+				  "<body><h2><center>It Works!</center></h2>"
+				  HTML_FOOTER, K_SECONDS(1));
 }
 
 static int http_response_soft_404(struct http_server_ctx *ctx)
@@ -167,6 +179,65 @@ static int http_response_soft_404(struct http_server_ctx *ctx)
 			     HTML_FOOTER);
 }
 
+static int http_response_auth(struct http_server_ctx *ctx)
+{
+	return http_response(ctx, HTTP_STATUS_200_OK, HTML_HEADER
+			     "<h2><center>user: "HTTP_AUTH_USERNAME
+			     ", password: "HTTP_AUTH_PASSWORD
+			     "</center></h2>" HTML_FOOTER);
+}
+
+int http_response_401(struct http_server_ctx *ctx, s32_t timeout)
+{
+	return http_response_wait(ctx, HTTP_401_STATUS_US, NULL, timeout);
+}
+
+static int http_basic_auth(struct http_server_ctx *ctx)
+{
+	const char auth_str[] = HTTP_CRLF "Authorization: Basic ";
+	char *ptr;
+
+	ptr = strstr(ctx->req.field_values[0].key, auth_str);
+	if (ptr) {
+		char output[sizeof(HTTP_AUTH_USERNAME) +
+			    sizeof(":") +
+			    sizeof(HTTP_AUTH_PASSWORD)];
+		size_t olen, ilen, alen;
+		char *end, *colon;
+		int ret;
+
+		memset(output, 0, sizeof(output));
+
+		end = strstr(ptr + 2, HTTP_CRLF);
+		if (!end) {
+			return http_response_401(ctx, K_NO_WAIT);
+		}
+
+		alen = sizeof(auth_str) - 1;
+		ilen = end - (ptr + alen);
+
+		ret = mbedtls_base64_decode(output, sizeof(output) - 1,
+					    &olen, ptr + alen, ilen);
+		if (ret) {
+			return http_response_401(ctx, K_NO_WAIT);
+		}
+
+		colon = memchr(output, ':', olen);
+
+		if (colon && colon > output && colon < (output + olen) &&
+		    memcmp(output, HTTP_AUTH_USERNAME, colon - output) == 0 &&
+		    memcmp(colon + 1, HTTP_AUTH_PASSWORD,
+			   output + olen - colon) == 0) {
+			return http_response_auth(ctx);
+		}
+
+		return http_response_401(ctx, K_NO_WAIT);
+	}
+
+	/* Wait 2 secs for the reply with proper credentials */
+	return http_response_401(ctx, K_SECONDS(2));
+}
+
 #if defined(CONFIG_HTTPS)
 /* Load the certificates and private RSA key. */
 
@@ -271,6 +342,8 @@ void main(void)
 #endif
 
 	http_server_add_default(&http_urls, http_response_soft_404);
+	http_server_add_url(&http_urls, HTTP_AUTH_URL, HTTP_URL_STANDARD,
+			    http_basic_auth);
 	http_server_add_url(&http_urls, "/headers", HTTP_URL_STANDARD,
 			    http_response_header_fields);
 	http_server_add_url(&http_urls, "/index.html", HTTP_URL_STANDARD,

samples/net/mbedtls_dtlsclient/src/udp.c

@@ -45,7 +45,7 @@ static void set_destination(struct sockaddr *addr)
 #endif
 
 static void udp_received(struct net_context *context,
-			 struct net_buf *buf, int status, void *user_data)
+			 struct net_pkt *pkt, int status, void *user_data)
 {
 	struct udp_context *ctx = user_data;
 
@@ -58,14 +58,14 @@ static void udp_received(struct net_context *context,
 
 		if (ctx->rx_pkt) {
 			printk("Packet %p is still being handled, "
-			       "dropping %p\n", ctx->rx_pkt, buf);
+			       "dropping %p\n", ctx->rx_pkt, pkt);
 
-			net_pkt_unref(buf);
+			net_pkt_unref(pkt);
 			return;
 		}
 	}
 
-	ctx->rx_pkt = buf;
+	ctx->rx_pkt = pkt;
 	k_sem_give(&ctx->rx_sem);
 	k_yield();
 }
@@ -74,34 +74,34 @@ int udp_tx(void *context, const unsigned char *buf, size_t size)
 {
 	struct udp_context *ctx = context;
 	struct net_context *udp_ctx;
-	struct net_buf *send_buf;
+	struct net_pkt *send_pkt;
 	struct sockaddr dst_addr;
 	int rc, len;
 
 	udp_ctx = ctx->net_ctx;
 
-	send_buf = net_pkt_get_tx(udp_ctx, K_FOREVER);
-	if (!send_buf) {
+	send_pkt = net_pkt_get_tx(udp_ctx, K_FOREVER);
+	if (!send_pkt) {
 		printk("cannot create buf\n");
 		return -EIO;
 	}
 
-	rc = net_pkt_append_all(send_buf, size, (u8_t *) buf, K_FOREVER);
+	rc = net_pkt_append_all(send_pkt, size, (u8_t *) buf, K_FOREVER);
 	if (!rc) {
 		printk("cannot write buf\n");
-		net_pkt_unref(send_buf);
+		net_pkt_unref(send_pkt);
 		return -EIO;
 	}
 
 	set_destination(&dst_addr);
-	len = net_buf_frags_len(send_buf);
+	len = net_pkt_get_len(send_pkt);
 	k_sleep(UDP_TX_TIMEOUT);
 
-	rc = net_context_sendto(send_buf, &dst_addr,
+	rc = net_context_sendto(send_pkt, &dst_addr,
 				addrlen, NULL, K_FOREVER, NULL, NULL);
 	if (rc < 0) {
 		printk("Cannot send data to peer (%d)\n", rc);
-		net_pkt_unref(send_buf);
+		net_pkt_unref(send_pkt);
 		return -EIO;
 	} else {
 		return len;
@@ -128,7 +128,14 @@ int udp_rx(void *context, unsigned char *buf, size_t size)
 	}
 
 	ptr = net_pkt_appdata(ctx->rx_pkt);
+
 	rx_buf = ctx->rx_pkt->frags;
+	if (!rx_buf) {
+		net_pkt_unref(ctx->rx_pkt);
+		ctx->rx_pkt = NULL;
+		return -ENOMEM;
+	}
+
 	len = rx_buf->len - (ptr - rx_buf->data);
 	pos = 0;
 

samples/net/mbedtls_dtlsclient/src/udp.h

@@ -11,7 +11,7 @@
 
 struct udp_context {
 	struct net_context *net_ctx;
-	struct net_buf *rx_pkt;
+	struct net_pkt *rx_pkt;
 	struct k_sem rx_sem;
 	int remaining;
 };

samples/net/mbedtls_dtlsclient/testcase.ini

@@ -1,4 +1,4 @@
 [test]
 tags = net
 build_only = true
-arch_whitelist = qemu_x86 arduino_101
+platform_whitelist = qemu_x86 arduino_101

samples/net/mqtt_publisher/README.rst

@@ -78,7 +78,7 @@ MQTT Client Identifier:
 This sample application supports the IBM Bluemix Watson topic format that can
 be enabled by changing the default value of APP_BLUEMIX_TOPIC from 0 to 1:
 
-.. code block:: c
+.. code-block:: c
 
 	#define APP_BLUEMIX_TOPIC	1
 
@@ -86,7 +86,7 @@ The Bluemix topic may include some parameters like device type, device
 identifier, event type and message format. This application uses the
 following macros to specify those values:
 
-.. code block:: c
+.. code-block:: c
 
 	#define BLUEMIX_DEVTYPE		"sensor"
 	#define BLUEMIX_DEVID		"carbon"

samples/net/mqtt_publisher/src/main.c

@@ -21,6 +21,8 @@
 
 #include "config.h"
 
+#define CONN_TRIES 20
+
 /* Container for some structures used by the MQTT publisher app. */
 struct mqtt_client_ctx {
 	/**
@@ -243,12 +245,18 @@ static void publisher(void)
 
 	/* The net_ctx variable must be ready BEFORE passing it to the MQTT API.
 	 */
-	rc = network_setup(&net_ctx, ZEPHYR_ADDR, SERVER_ADDR, SERVER_PORT);
-	PRINT_RESULT("network_setup", rc);
-	if (rc != 0) {
-		goto exit_app;
+	for (i = 0; i < CONN_TRIES; i++) {
+		rc = network_setup(&net_ctx, ZEPHYR_ADDR, SERVER_ADDR,
+				   SERVER_PORT);
+		if (!rc) {
+			goto connected;
+		}
 	}
 
+	PRINT_RESULT("network_setup", rc);
+	goto exit_app;
+
+connected:
 	/* Set everything to 0 and later just assign the required fields. */
 	memset(&client_ctx, 0x00, sizeof(client_ctx));
 
@@ -453,8 +461,7 @@ static int network_setup(struct net_context **net_ctx, const char *local_addr,
 	rc = net_context_connect(*net_ctx, &server_sock, addr_len, NULL,
 				 APP_SLEEP_MSECS, NULL);
 	if (rc) {
-		printk("net_context_connect error\n"
-		       "Is the server (broker) up and running?\n");
+		printk("net_context_connect error\n");
 		goto lb_exit;
 	}
 

samples/net/zperf/src/zperf_udp_uploader.c

@@ -17,7 +17,7 @@
 
 #define TAG CMD_STR_UDP_UPLOAD" "
 
-static char sample_packet[PACKET_SIZE_MAX];
+static u8_t sample_packet[PACKET_SIZE_MAX];
 
 static inline void zperf_upload_decode_stat(struct net_pkt *pkt,
 					    struct zperf_results *results)

scripts/Makefile.lib

@@ -264,6 +264,11 @@ cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -n -f -9 > $@) || \
 # DTC
 # ---------------------------------------------------------------------------
 
+DTC_OVERLAY_DIR ?= $(PROJECT_BASE)
+# Since this goes into a file, use the native path
+DTC_ABS_OVERLAY_DIR = $(shell cd $(DTC_OVERLAY_DIR) && pwd $(NATIVE_PWD_OPT))
+DTC_OVERLAY_FILE = $(DTC_ABS_OVERLAY_DIR)/$(BOARD_NAME).overlay
+
 # Generate an assembly file to wrap the output of the device tree compiler
 quiet_cmd_dt_S_dtb= DTB     $@
 cmd_dt_S_dtb=						\
@@ -284,8 +289,8 @@ $(obj)/%.dtb.S: $(obj)/%.dtb
 
 quiet_cmd_dtc = DTC     $@
 cmd_dtc = echo '\#include "$(notdir $<)"' > dts/$(ARCH)/$(notdir $<)_pre_compiled ; \
-	if test -e $(PROJECT_BASE)/$(BOARD_NAME).overlay; then \
-		echo '\#include "$(BOARD_NAME).overlay"' >> dts/$(ARCH)/$(notdir $<)_pre_compiled ; \
+	if test -e $(DTC_OVERLAY_FILE); then \
+		echo '\#include "$(DTC_OVERLAY_FILE)"' >> dts/$(ARCH)/$(notdir $<)_pre_compiled ; \
 	fi ; \
 	$(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) dts/$(ARCH)/$(notdir $<)_pre_compiled ; \
 	$(DTC) -O dts -o $@ -b 0 \
@@ -296,7 +301,7 @@ cmd_dtc = echo '\#include "$(notdir $<)"' > dts/$(ARCH)/$(notdir $<)_pre_compile
 $(obj)/%.dtb: $(src)/%.dts FORCE
 	$(call if_changed_dep,dtc)
 
-$(obj)/%.dts_compiled: $(src)/%.dts FORCE
+$(obj)/%.dts_compiled: $(src)/%.dts $(wildcard $(DTC_OVERLAY_FILE)) FORCE
 	$(call if_changed_dep,dtc)
 
 dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)

scripts/Makefile.toolchain.gccarmemb

@@ -10,6 +10,6 @@ LIBGCC_DIR = $(shell dirname `$(CROSS_COMPILE)gcc ${KBUILD_CFLAGS} -print-libgcc
 LIB_INCLUDE_DIR += -L ${LIBGCC_DIR}
 TOOLCHAIN_CFLAGS = -I${GCCARMEMB_TOOLCHAIN_PATH}/arm-none-eabi/include
 
-DTC ?= /usr/bin/dtc
+DTC ?= dtc
 
 export CROSS_COMPILE TOOLCHAIN_LIBS TOOLCHAIN_CFLAGS LIB_INCLUDE_DIR DTC

scripts/Makefile.toolchain.xtools

@@ -1,32 +1,27 @@
 ifndef XTOOLS_TOOLCHAIN_PATH
+
+ifeq ($(CROSS_COMPILE),)
 $(error XTOOLS_TOOLCHAIN_PATH is not set)
+else
+CROSS_COMPILE_TARGET = $(patsubst %-,%,${CROSS_COMPILE})
+CROSS_COMPILE_ROOT = $(dir $(shell which ${CROSS_COMPILE}gcc))/..
 endif
 
-ifndef MAKEFILE_TOOLCHAIN_DO_PASS2
-
-# arm
-CROSS_COMPILE_TARGET_arm = arm-none-eabi
-
-# x86
-CROSS_COMPILE_TARGET_x86 = i586-unknown-elf
-
-CROSS_COMPILE_TARGET = ${CROSS_COMPILE_TARGET_${ARCH}}
-CROSS_COMPILE_ROOT = ${XTOOLS_TOOLCHAIN_PATH}/${CROSS_COMPILE_TARGET}
-
 else
 
+CROSS_COMPILE_TARGET_arm = arm-none-eabi
+CROSS_COMPILE_TARGET_x86 = i586-pc-elf
+
+CROSS_COMPILE_TARGET = ${CROSS_COMPILE_TARGET_${ARCH}}
+CROSS_COMPILE_ROOT = ${XTOOLS_TOOLCHAIN_PATH}/${CROSS_COMPILE_TARGET}
 CROSS_COMPILE = ${CROSS_COMPILE_ROOT}/bin/${CROSS_COMPILE_TARGET}-
 
+endif
+
 TOOLCHAIN_CFLAGS = -I${CROSS_COMPILE_ROOT}/${CROSS_COMPILE_TARGET}/sysroot/usr/include
 TOOLCHAIN_LIBS = gcc
 
 CROSS_COMPILE_version = $(shell $(CROSS_COMPILE)gcc -dumpversion)
 LIB_INCLUDE_DIR += -L ${CROSS_COMPILE_ROOT}/lib/gcc/${CROSS_COMPILE_TARGET}/${CROSS_COMPILE_version}/
 
-endif
-
 export CROSS_COMPILE TOOLCHAIN_LIBS LIB_INCLUDE_DIR TOOLCHAIN_CFLAGS
-
-ifndef MAKEFILE_TOOLCHAIN_DO_PASS2
-MAKEFILE_TOOLCHAIN_DO_PASS2=true
-endif

scripts/Makefile.toolchain.zephyr

@@ -101,7 +101,9 @@ SYSROOT_TARGET_xtensa = xtensa-$(TOOLCHAIN_VENDOR)-elf
 CROSS_COMPILE_xtensa=$(TOOLCHAIN_HOME)/usr/bin/$(CROSS_COMPILE_TARGET_xtensa)/$(CROSS_COMPILE_TARGET_xtensa)-
 ifeq ($(ARCH),xtensa)
 SYSROOT := ${ZEPHYR_SDK_INSTALL_DIR}/sysroots/${SYSROOT_TARGET_${ARCH}}
-CFLAGS += --sysroot=$(SYSROOT) -I=/usr/include -I=/usr/include/arch/include
+common_xtensa_flags := --sysroot=$(SYSROOT) -I=/usr/include -I=/usr/include/arch/include
+CFLAGS += $(common_xtensa_flags)
+CXXFLAGS += $(common_xtensa_flags)
 endif
 TOOLCHAIN_LIBS_xtensa = hal
 

scripts/cross_compiler/i586.config

@@ -2,9 +2,19 @@
 # Automatically generated file; DO NOT EDIT.
 # Crosstool-NG Configuration
 #
-CT_CONFIGURE_has_xz=y
+CT_CONFIGURE_has_wget=y
+CT_CONFIGURE_has_curl=y
+CT_CONFIGURE_has_stat_flavor_GNU=y
+CT_CONFIGURE_has_make_3_81_or_newer=y
+CT_CONFIGURE_has_libtool_2_4_or_newer=y
+CT_CONFIGURE_has_libtoolize_2_4_or_newer=y
+CT_CONFIGURE_has_autoconf_2_63_or_newer=y
+CT_CONFIGURE_has_autoreconf_2_63_or_newer=y
+CT_CONFIGURE_has_automake_1_15_or_newer=y
+CT_CONFIGURE_has_gnu_m4_1_4_12_or_newer=y
 CT_CONFIGURE_has_cvs=y
 CT_CONFIGURE_has_svn=y
+CT_CONFIGURE_has_git=y
 CT_MODULES=y
 
 #
@@ -21,23 +31,27 @@ CT_MODULES=y
 #
 # Paths
 #
-CT_LOCAL_TARBALLS_DIR="${HOME}/xtools/src"
+CT_LOCAL_TARBALLS_DIR="${CT_PREFIX:-${HOME}/x-tools}/sources"
 CT_SAVE_TARBALLS=y
 CT_WORK_DIR="${CT_TOP_DIR}/.build"
-CT_PREFIX_DIR="${HOME}/xtools/build/${CT_TARGET}"
-CT_INSTALL_DIR="${CT_PREFIX_DIR}"
+CT_BUILD_TOP_DIR="${CT_WORK_DIR}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}"
+CT_PREFIX_DIR="${CT_PREFIX:-${HOME}/x-tools}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}"
 CT_RM_RF_PREFIX_DIR=y
 CT_REMOVE_DOCS=y
-CT_INSTALL_DIR_RO=y
+# CT_PREFIX_DIR_RO is not set
 CT_STRIP_HOST_TOOLCHAIN_EXECUTABLES=y
 # CT_STRIP_TARGET_TOOLCHAIN_EXECUTABLES is not set
 
 #
 # Downloading
 #
+CT_DOWNLOAD_AGENT_WGET=y
+# CT_DOWNLOAD_AGENT_CURL is not set
+# CT_DOWNLOAD_AGENT_NONE is not set
 # CT_FORBID_DOWNLOAD is not set
 # CT_FORCE_DOWNLOAD is not set
 CT_CONNECT_TIMEOUT=10
+CT_DOWNLOAD_WGET_OPTIONS="--passive-ftp --tries=3 -nc --progress=dot:binary"
 # CT_ONLY_DOWNLOAD is not set
 # CT_USE_MIRROR is not set
 
@@ -45,7 +59,7 @@ CT_CONNECT_TIMEOUT=10
 # Extracting
 #
 # CT_FORCE_EXTRACT is not set
-CT_OVERIDE_CONFIG_GUESS_SUB=y
+CT_OVERRIDE_CONFIG_GUESS_SUB=y
 # CT_ONLY_EXTRACT is not set
 CT_PATCH_BUNDLED=y
 # CT_PATCH_LOCAL is not set
@@ -83,7 +97,7 @@ CT_LOG_EXTRA=y
 # CT_LOG_DEBUG is not set
 CT_LOG_LEVEL_MAX="EXTRA"
 # CT_LOG_SEE_TOOLS_WARN is not set
-CT_LOG_PROGRESS_BAR=y
+# CT_LOG_PROGRESS_BAR is not set
 CT_LOG_TO_FILE=y
 CT_LOG_FILE_COMPRESS=y
 
@@ -91,20 +105,6 @@ CT_LOG_FILE_COMPRESS=y
 # Target options
 #
 CT_ARCH="x86"
-CT_ARCH_SUPPORTS_32=y
-CT_ARCH_SUPPORTS_64=y
-CT_ARCH_SUPPORTS_WITH_ARCH=y
-CT_ARCH_SUPPORTS_WITH_CPU=y
-CT_ARCH_SUPPORTS_WITH_TUNE=y
-CT_ARCH_DEFAULT_32=y
-CT_ARCH_ARCH="pentium"
-CT_ARCH_CPU=""
-CT_ARCH_TUNE=""
-CT_ARCH_32=y
-# CT_ARCH_64 is not set
-CT_ARCH_BITNESS=32
-CT_TARGET_CFLAGS=""
-CT_TARGET_LDFLAGS=""
 # CT_ARCH_alpha is not set
 # CT_ARCH_arm is not set
 # CT_ARCH_avr is not set
@@ -136,13 +136,29 @@ CT_ARCH_SUFFIX=""
 # Generic target options
 #
 # CT_MULTILIB is not set
+CT_DEMULTILIB=y
 CT_ARCH_USE_MMU=y
+CT_ARCH_SUPPORTS_32=y
+CT_ARCH_SUPPORTS_64=y
+CT_ARCH_DEFAULT_32=y
+CT_ARCH_BITNESS=32
+CT_ARCH_32=y
+# CT_ARCH_64 is not set
 
 #
 # Target optimisations
 #
+CT_ARCH_SUPPORTS_WITH_ARCH=y
+CT_ARCH_SUPPORTS_WITH_CPU=y
+CT_ARCH_SUPPORTS_WITH_TUNE=y
+CT_ARCH_ARCH=""
+CT_ARCH_CPU=""
+CT_ARCH_TUNE="pentium"
+CT_TARGET_CFLAGS="-m32"
+CT_TARGET_LDFLAGS=""
 CT_ARCH_FLOAT=""
 
+
 #
 # Toolchain options
 #
@@ -150,19 +166,13 @@ CT_ARCH_FLOAT=""
 #
 # General toolchain options
 #
-CT_FORCE_SYSROOT=y
-CT_USE_SYSROOT=y
-CT_SYSROOT_NAME="sysroot"
-CT_SYSROOT_DIR_PREFIX=""
-CT_WANTS_STATIC_LINK=y
-# CT_STATIC_TOOLCHAIN is not set
 CT_TOOLCHAIN_PKGVERSION=""
 CT_TOOLCHAIN_BUGURL=""
 
 #
 # Tuple completion and aliasing
 #
-CT_TARGET_VENDOR=""
+CT_TARGET_VENDOR="zephyr"
 CT_TARGET_ALIAS_SED_EXPR=""
 CT_TARGET_ALIAS=""
 
@@ -210,24 +220,17 @@ CT_BINUTILS_binutils=y
 #
 # GNU binutils
 #
-# CT_CC_BINUTILS_SHOW_LINARO is not set
-# CT_BINUTILS_V_2_25_1 is not set
-# CT_BINUTILS_V_2_25 is not set
-# CT_BINUTILS_V_2_24 is not set
-# CT_BINUTILS_V_2_23_2 is not set
-# CT_BINUTILS_V_2_23_1 is not set
-CT_BINUTILS_V_2_22=y
-# CT_BINUTILS_V_2_21_53 is not set
-# CT_BINUTILS_V_2_21_1a is not set
-# CT_BINUTILS_V_2_20_1a is not set
-# CT_BINUTILS_V_2_19_1a is not set
-# CT_BINUTILS_V_2_18a is not set
-CT_BINUTILS_VERSION="2.22"
-CT_BINUTILS_2_22_or_later=y
-CT_BINUTILS_2_21_or_later=y
-CT_BINUTILS_2_20_or_later=y
-CT_BINUTILS_2_19_or_later=y
-CT_BINUTILS_2_18_or_later=y
+CT_BINUTILS_VERSION="2.28"
+# CT_BINUTILS_SHOW_LINARO is not set
+CT_BINUTILS_V_2_28=y
+# CT_BINUTILS_V_2_27 is not set
+# CT_BINUTILS_V_2_26 is not set
+CT_BINUTILS_2_27_or_later=y
+CT_BINUTILS_2_26_or_later=y
+CT_BINUTILS_2_25_1_or_later=y
+CT_BINUTILS_2_25_or_later=y
+CT_BINUTILS_2_24_or_later=y
+CT_BINUTILS_2_23_2_or_later=y
 CT_BINUTILS_HAS_HASH_STYLE=y
 CT_BINUTILS_HAS_GOLD=y
 CT_BINUTILS_GOLD_SUPPORTS_ARCH=y
@@ -251,7 +254,7 @@ CT_BINUTILS_EXTRA_CONFIG_ARRAY=""
 # C-library
 #
 CT_LIBC="newlib"
-CT_LIBC_VERSION="2.2.0"
+CT_LIBC_VERSION="2.5.0.20170323"
 CT_LIBC_newlib=y
 # CT_LIBC_none is not set
 CT_LIBC_avr_libc_AVAILABLE=y
@@ -261,14 +264,20 @@ CT_LIBC_mingw_AVAILABLE=y
 CT_LIBC_musl_AVAILABLE=y
 CT_LIBC_newlib_AVAILABLE=y
 # CT_CC_NEWLIB_SHOW_LINARO is not set
-CT_LIBC_NEWLIB_V_2_2_0=y
+CT_LIBC_NEWLIB_V_2_5_0=y
+# CT_LIBC_NEWLIB_V_2_4_0 is not set
+# CT_LIBC_NEWLIB_V_2_3_0 is not set
+# CT_LIBC_NEWLIB_V_2_2_0 is not set
 # CT_LIBC_NEWLIB_V_2_1_0 is not set
 # CT_LIBC_NEWLIB_V_2_0_0 is not set
 # CT_LIBC_NEWLIB_V_1_20_0 is not set
 # CT_LIBC_NEWLIB_V_1_19_0 is not set
 # CT_LIBC_NEWLIB_V_1_18_0 is not set
 # CT_LIBC_NEWLIB_V_1_17_0 is not set
-CT_LIBC_NEWLIB_2_2=y
+CT_LIBC_NEWLIB_2_5=y
+CT_LIBC_NEWLIB_2_5_or_later=y
+CT_LIBC_NEWLIB_2_4_or_later=y
+CT_LIBC_NEWLIB_2_3_or_later=y
 CT_LIBC_NEWLIB_2_2_or_later=y
 CT_LIBC_NEWLIB_2_1_or_later=y
 CT_LIBC_NEWLIB_2_0_or_later=y
@@ -288,9 +297,25 @@ CT_THREADS_NONE=y
 #
 # CT_LIBC_NEWLIB_IO_C99FMT is not set
 # CT_LIBC_NEWLIB_IO_LL is not set
-# CT_LIBC_NEWLIB_IO_FLOAT is not set
-# CT_LIBC_NEWLIB_DISABLE_SUPPLIED_SYSCALLS is not set
+CT_LIBC_NEWLIB_IO_FLOAT=y
+# CT_LIBC_NEWLIB_IO_LDBL is not set
+# CT_LIBC_NEWLIB_IO_POS_ARGS is not set
+CT_LIBC_NEWLIB_FVWRITE_IN_STREAMIO=y
+CT_LIBC_NEWLIB_UNBUF_STREAM_OPT=y
+# CT_LIBC_NEWLIB_FSEEK_OPTIMIZATION is not set
+CT_LIBC_NEWLIB_DISABLE_SUPPLIED_SYSCALLS=y
+# CT_LIBC_NEWLIB_REGISTER_FINI is not set
+CT_LIBC_NEWLIB_ATEXIT_DYNAMIC_ALLOC=y
+CT_LIBC_NEWLIB_GLOBAL_ATEXIT=y
+CT_LIBC_NEWLIB_LITE_EXIT=y
+# CT_LIBC_NEWLIB_REENT_SMALL is not set
+# CT_LIBC_NEWLIB_MULTITHREAD is not set
+# CT_LIBC_NEWLIB_EXTRA_SECTIONS is not set
+# CT_LIBC_NEWLIB_WIDE_ORIENT is not set
 CT_LIBC_NEWLIB_ENABLE_TARGET_OPTSPACE=y
+# CT_LIBC_NEWLIB_LTO is not set
+CT_LIBC_NEWLIB_NANO_MALLOC=y
+CT_LIBC_NEWLIB_NANO_FORMATTED_IO=y
 CT_LIBC_NEWLIB_EXTRA_CONFIG_ARRAY=""
 
 #
@@ -299,59 +324,38 @@ CT_LIBC_NEWLIB_EXTRA_CONFIG_ARRAY=""
 CT_CC="gcc"
 CT_CC_CORE_PASS_2_NEEDED=y
 CT_CC_gcc=y
+CT_CC_GCC_VERSION="6.3.0"
 # CT_CC_GCC_SHOW_LINARO is not set
-CT_CC_GCC_V_5_2_0=y
-# CT_CC_GCC_V_4_9_3 is not set
-# CT_CC_GCC_V_4_8_5 is not set
-# CT_CC_GCC_V_4_7_4 is not set
-# CT_CC_GCC_V_4_6_4 is not set
-# CT_CC_GCC_V_4_5_4 is not set
-# CT_CC_GCC_V_4_4_7 is not set
-# CT_CC_GCC_V_4_3_6 is not set
-# CT_CC_GCC_V_4_2_4 is not set
-CT_CC_GCC_4_2_or_later=y
-CT_CC_GCC_4_3_or_later=y
-CT_CC_GCC_4_4_or_later=y
-CT_CC_GCC_4_5_or_later=y
-CT_CC_GCC_4_6_or_later=y
-CT_CC_GCC_4_7_or_later=y
+CT_CC_GCC_V_6_3_0=y
+# CT_CC_GCC_V_5_4_0 is not set
+# CT_CC_GCC_V_4_9_4 is not set
 CT_CC_GCC_4_8_or_later=y
 CT_CC_GCC_4_9_or_later=y
-CT_CC_GCC_5=y
 CT_CC_GCC_5_or_later=y
-CT_CC_GCC_HAS_GRAPHITE=y
-CT_CC_GCC_USE_GRAPHITE=y
-CT_CC_GCC_HAS_LTO=y
-# CT_CC_GCC_USE_LTO is not set
-CT_CC_GCC_HAS_PKGVERSION_BUGURL=y
-CT_CC_GCC_HAS_BUILD_ID=y
-CT_CC_GCC_HAS_LNK_HASH_STYLE=y
-CT_CC_GCC_USE_GMP_MPFR=y
-CT_CC_GCC_USE_MPC=y
-CT_CC_GCC_HAS_LIBQUADMATH=y
-CT_CC_GCC_HAS_LIBSANITIZER=y
-CT_CC_GCC_VERSION="5.2.0"
-# CT_CC_LANG_FORTRAN is not set
+CT_CC_GCC_6=y
+CT_CC_GCC_6_or_later=y
+CT_CC_GCC_HAS_LIBMPX=y
 CT_CC_GCC_ENABLE_CXX_FLAGS=""
 CT_CC_GCC_CORE_EXTRA_CONFIG_ARRAY=""
 CT_CC_GCC_EXTRA_CONFIG_ARRAY=""
-CT_CC_GCC_EXTRA_ENV_ARRAY=""
 # CT_CC_GCC_TARGET_FINAL is not set
-CT_CC_GCC_STATIC_LIBSTDCXX=y
 # CT_CC_GCC_SYSTEM_ZLIB is not set
+CT_CC_GCC_CONFIG_TLS=m
 
 #
 # Optimisation features
 #
+CT_CC_GCC_USE_GRAPHITE=y
+CT_CC_GCC_USE_LTO=y
 
 #
 # Settings for libraries running on target
 #
 CT_CC_GCC_ENABLE_TARGET_OPTSPACE=y
 # CT_CC_GCC_LIBMUDFLAP is not set
-# CT_CC_GCC_LIBGOMP is not set
 # CT_CC_GCC_LIBSSP is not set
 # CT_CC_GCC_LIBQUADMATH is not set
+CT_CC_GCC_LIBMPX=y
 
 #
 # Misc. obscure options.
@@ -381,17 +385,16 @@ CT_CC_SUPPORT_GOLANG=y
 # Additional supported languages:
 #
 CT_CC_LANG_CXX=y
+# CT_CC_LANG_FORTRAN is not set
 
 #
 # Debug facilities
 #
-# CT_DEBUG_dmalloc is not set
-# CT_DEBUG_duma is not set
 CT_DEBUG_gdb=y
 CT_GDB_CROSS=y
-# CT_GDB_CROSS_STATIC is not set
 # CT_GDB_CROSS_SIM is not set
 CT_GDB_CROSS_PYTHON=y
+CT_GDB_CROSS_PYTHON_BINARY=""
 CT_GDB_CROSS_EXTRA_CONFIG_ARRAY=""
 
 #
@@ -405,32 +408,15 @@ CT_GDB_CROSS_EXTRA_CONFIG_ARRAY=""
 #
 # gdb version
 #
-# CT_DEBUG_GDB_SHOW_LINARO is not set
-# CT_GDB_V_7_10 is not set
-CT_GDB_V_7_9_1=y
-# CT_GDB_V_7_9 is not set
-# CT_GDB_V_7_8_2 is not set
-# CT_GDB_V_7_8_1 is not set
-# CT_GDB_V_7_8 is not set
-# CT_GDB_V_7_7_1 is not set
-# CT_GDB_V_7_7 is not set
-# CT_GDB_V_7_6_1 is not set
-# CT_GDB_V_7_5_1 is not set
-# CT_GDB_V_7_4_1 is not set
-# CT_GDB_V_7_4 is not set
-# CT_GDB_V_7_3_1 is not set
-# CT_GDB_V_7_3a is not set
-# CT_GDB_V_7_2a is not set
-# CT_GDB_V_7_1a is not set
-# CT_GDB_V_7_0_1a is not set
-# CT_GDB_V_7_0a is not set
-# CT_GDB_V_6_8a is not set
+CT_GDB_VERSION="7.12.1"
+CT_GDB_V_7_12_1=y
+# CT_GDB_V_7_11_1 is not set
+CT_GDB_7_12_or_later=y
 CT_GDB_7_2_or_later=y
 CT_GDB_7_0_or_later=y
 CT_GDB_HAS_PKGVERSION_BUGURL=y
 CT_GDB_HAS_PYTHON=y
 CT_GDB_INSTALL_GDBINIT=y
-CT_GDB_VERSION="7.9.1"
 # CT_DEBUG_ltrace is not set
 # CT_DEBUG_strace is not set
 
@@ -438,6 +424,7 @@ CT_GDB_VERSION="7.9.1"
 # Companion libraries
 #
 CT_COMPLIBS_NEEDED=y
+CT_LIBICONV_NEEDED=y
 CT_GMP_NEEDED=y
 CT_MPFR_NEEDED=y
 CT_ISL_NEEDED=y
@@ -445,48 +432,46 @@ CT_MPC_NEEDED=y
 CT_EXPAT_NEEDED=y
 CT_NCURSES_NEEDED=y
 CT_COMPLIBS=y
+CT_LIBICONV=y
+CT_GETTEXT=y
 CT_GMP=y
 CT_MPFR=y
 CT_ISL=y
 CT_MPC=y
 CT_EXPAT=y
 CT_NCURSES=y
-# CT_GMP_V_6_0_0 is not set
-# CT_GMP_V_5_1_3 is not set
-# CT_GMP_V_5_1_1 is not set
-# CT_GMP_V_5_0_2 is not set
-# CT_GMP_V_5_0_1 is not set
-CT_GMP_V_4_3_2=y
-# CT_GMP_V_4_3_1 is not set
-# CT_GMP_V_4_3_0 is not set
-CT_GMP_VERSION="4.3.2"
-# CT_MPFR_V_3_1_3 is not set
-# CT_MPFR_V_3_1_2 is not set
-# CT_MPFR_V_3_1_0 is not set
-CT_MPFR_V_3_0_1=y
-# CT_MPFR_V_3_0_0 is not set
-# CT_MPFR_V_2_4_2 is not set
-# CT_MPFR_V_2_4_1 is not set
-# CT_MPFR_V_2_4_0 is not set
-CT_MPFR_VERSION="3.0.1"
-CT_ISL_V_0_14=y
-# CT_ISL_V_0_12_2 is not set
+CT_ZLIB=y
+CT_ZLIB_V_1_2_11=y
+CT_ZLIB_VERSION="1.2.11"
+CT_LIBICONV_V_1_15=y
+# CT_LIBICONV_V_1_14 is not set
+CT_LIBICONV_VERSION="1.15"
+CT_GETTEXT_V_0_19_8_1=y
+CT_GETTEXT_VERSION="0.19.8.1"
+CT_GMP_V_6_1_2=y
+CT_GMP_5_0_2_or_later=y
+CT_GMP_VERSION="6.1.2"
+CT_MPFR_V_3_1_5=y
+CT_MPFR_VERSION="3.1.5"
+CT_ISL_V_0_16_1=y
+# CT_ISL_V_0_15 is not set
+CT_ISL_V_0_16_or_later=y
+CT_ISL_V_0_15_or_later=y
 CT_ISL_V_0_14_or_later=y
 CT_ISL_V_0_12_or_later=y
-CT_ISL_VERSION="0.14"
-# CT_MPC_V_1_0_3 is not set
-# CT_MPC_V_1_0_2 is not set
-CT_MPC_V_1_0_1=y
-# CT_MPC_V_1_0 is not set
-# CT_MPC_V_0_9 is not set
-# CT_MPC_V_0_8_2 is not set
-# CT_MPC_V_0_8_1 is not set
-# CT_MPC_V_0_7 is not set
-CT_MPC_VERSION="1.0.1"
-CT_EXPAT_V_2_1_0=y
-CT_EXPAT_VERSION="2.1.0"
+CT_ISL_VERSION="0.16.1"
+CT_MPC_V_1_0_3=y
+CT_MPC_VERSION="1.0.3"
+CT_EXPAT_V_2_2_0=y
+CT_EXPAT_VERSION="2.2.0"
 CT_NCURSES_V_6_0=y
 CT_NCURSES_VERSION="6.0"
+CT_NCURSES_HOST_CONFIG_ARGS=""
+CT_NCURSES_HOST_DISABLE_DB=y
+CT_NCURSES_HOST_FALLBACKS="linux,xterm,xterm-color,xterm-256color,vt100"
+CT_NCURSES_TARGET_CONFIG_ARGS=""
+# CT_NCURSES_TARGET_DISABLE_DB is not set
+CT_NCURSES_TARGET_FALLBACKS=""
 
 #
 # Companion libraries common options
@@ -496,8 +481,11 @@ CT_NCURSES_VERSION="6.0"
 #
 # Companion tools
 #
-
-#
-# READ HELP before you say 'Y' below !!!
-#
-# CT_COMP_TOOLS is not set
+# CT_COMP_TOOLS_FOR_HOST is not set
+# CT_COMP_TOOLS_autoconf is not set
+# CT_COMP_TOOLS_automake is not set
+# CT_COMP_TOOLS_libtool is not set
+CT_COMP_TOOLS_m4=y
+CT_M4_V_1_4_18=y
+CT_M4_VERSION="1.4.18"
+# CT_COMP_TOOLS_make is not set

scripts/cross_compiler/iamcu.config

@@ -2,9 +2,19 @@
 # Automatically generated file; DO NOT EDIT.
 # Crosstool-NG Configuration
 #
-CT_CONFIGURE_has_xz=y
+CT_CONFIGURE_has_wget=y
+CT_CONFIGURE_has_curl=y
+CT_CONFIGURE_has_stat_flavor_GNU=y
+CT_CONFIGURE_has_make_3_81_or_newer=y
+CT_CONFIGURE_has_libtool_2_4_or_newer=y
+CT_CONFIGURE_has_libtoolize_2_4_or_newer=y
+CT_CONFIGURE_has_autoconf_2_63_or_newer=y
+CT_CONFIGURE_has_autoreconf_2_63_or_newer=y
+CT_CONFIGURE_has_automake_1_15_or_newer=y
+CT_CONFIGURE_has_gnu_m4_1_4_12_or_newer=y
 CT_CONFIGURE_has_cvs=y
 CT_CONFIGURE_has_svn=y
+CT_CONFIGURE_has_git=y
 CT_MODULES=y
 
 #
@@ -21,23 +31,27 @@ CT_MODULES=y
 #
 # Paths
 #
-CT_LOCAL_TARBALLS_DIR="${HOME}/xtools/src"
+CT_LOCAL_TARBALLS_DIR="${CT_PREFIX:-${HOME}/x-tools}/sources"
 CT_SAVE_TARBALLS=y
 CT_WORK_DIR="${CT_TOP_DIR}/.build"
-CT_PREFIX_DIR="${HOME}/xtools/build/${CT_TARGET}"
-CT_INSTALL_DIR="${CT_PREFIX_DIR}"
+CT_BUILD_TOP_DIR="${CT_WORK_DIR}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}"
+CT_PREFIX_DIR="${CT_PREFIX:-${HOME}/x-tools}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}"
 CT_RM_RF_PREFIX_DIR=y
 CT_REMOVE_DOCS=y
-CT_INSTALL_DIR_RO=y
+# CT_PREFIX_DIR_RO is not set
 CT_STRIP_HOST_TOOLCHAIN_EXECUTABLES=y
 # CT_STRIP_TARGET_TOOLCHAIN_EXECUTABLES is not set
 
 #
 # Downloading
 #
+CT_DOWNLOAD_AGENT_WGET=y
+# CT_DOWNLOAD_AGENT_CURL is not set
+# CT_DOWNLOAD_AGENT_NONE is not set
 # CT_FORBID_DOWNLOAD is not set
 # CT_FORCE_DOWNLOAD is not set
 CT_CONNECT_TIMEOUT=10
+CT_DOWNLOAD_WGET_OPTIONS="--passive-ftp --tries=3 -nc --progress=dot:binary"
 # CT_ONLY_DOWNLOAD is not set
 # CT_USE_MIRROR is not set
 
@@ -45,7 +59,7 @@ CT_CONNECT_TIMEOUT=10
 # Extracting
 #
 # CT_FORCE_EXTRACT is not set
-CT_OVERIDE_CONFIG_GUESS_SUB=y
+CT_OVERRIDE_CONFIG_GUESS_SUB=y
 # CT_ONLY_EXTRACT is not set
 CT_PATCH_BUNDLED=y
 # CT_PATCH_LOCAL is not set
@@ -83,42 +97,16 @@ CT_LOG_EXTRA=y
 # CT_LOG_DEBUG is not set
 CT_LOG_LEVEL_MAX="EXTRA"
 # CT_LOG_SEE_TOOLS_WARN is not set
-CT_LOG_PROGRESS_BAR=y
+# CT_LOG_PROGRESS_BAR is not set
 CT_LOG_TO_FILE=y
 CT_LOG_FILE_COMPRESS=y
 
 #
 # Target options
 #
-CT_ARCH="arm"
-CT_ARCH_SUPPORTS_BOTH_MMU=y
-CT_ARCH_SUPPORTS_BOTH_ENDIAN=y
-CT_ARCH_SUPPORTS_32=y
-CT_ARCH_SUPPORTS_64=y
-CT_ARCH_SUPPORTS_WITH_ARCH=y
-CT_ARCH_SUPPORTS_WITH_CPU=y
-CT_ARCH_SUPPORTS_WITH_TUNE=y
-CT_ARCH_SUPPORTS_WITH_FLOAT=y
-CT_ARCH_SUPPORTS_WITH_FPU=y
-CT_ARCH_SUPPORTS_SOFTFP=y
-CT_ARCH_DEFAULT_HAS_MMU=y
-CT_ARCH_DEFAULT_LE=y
-CT_ARCH_DEFAULT_32=y
-CT_ARCH_ARCH=""
-CT_ARCH_CPU=""
-CT_ARCH_TUNE=""
-CT_ARCH_FPU=""
-# CT_ARCH_BE is not set
-CT_ARCH_LE=y
-CT_ARCH_32=y
-# CT_ARCH_64 is not set
-CT_ARCH_BITNESS=32
-# CT_ARCH_FLOAT_HW is not set
-CT_ARCH_FLOAT_SW=y
-CT_TARGET_CFLAGS=""
-CT_TARGET_LDFLAGS=""
+CT_ARCH="x86"
 # CT_ARCH_alpha is not set
-CT_ARCH_arm=y
+# CT_ARCH_arm is not set
 # CT_ARCH_avr is not set
 # CT_ARCH_m68k is not set
 # CT_ARCH_mips is not set
@@ -127,7 +115,7 @@ CT_ARCH_arm=y
 # CT_ARCH_s390 is not set
 # CT_ARCH_sh is not set
 # CT_ARCH_sparc is not set
-# CT_ARCH_x86 is not set
+CT_ARCH_x86=y
 # CT_ARCH_xtensa is not set
 CT_ARCH_alpha_AVAILABLE=y
 CT_ARCH_arm_AVAILABLE=y
@@ -148,26 +136,32 @@ CT_ARCH_SUFFIX=""
 # Generic target options
 #
 # CT_MULTILIB is not set
+CT_DEMULTILIB=y
 CT_ARCH_USE_MMU=y
-CT_ARCH_ENDIAN="little"
+CT_ARCH_SUPPORTS_32=y
+CT_ARCH_SUPPORTS_64=y
+CT_ARCH_DEFAULT_32=y
+CT_ARCH_BITNESS=32
+CT_ARCH_32=y
+# CT_ARCH_64 is not set
 
 #
 # Target optimisations
 #
-CT_ARCH_EXCLUSIVE_WITH_CPU=y
-# CT_ARCH_FLOAT_AUTO is not set
-# CT_ARCH_FLOAT_SOFTFP is not set
-CT_ARCH_FLOAT="soft"
+CT_ARCH_SUPPORTS_WITH_ARCH=y
+CT_ARCH_SUPPORTS_WITH_CPU=y
+CT_ARCH_SUPPORTS_WITH_TUNE=y
+CT_ARCH_ARCH=""
+CT_ARCH_CPU=""
+CT_ARCH_TUNE="lakemont"
+CT_TARGET_CFLAGS="-miamcu -m32"
+CT_TARGET_LDFLAGS=""
+CT_ARCH_FLOAT=""
 
 #
-# arm other options
+# x86 other options
 #
-CT_ARCH_ARM_MODE="arm"
-CT_ARCH_ARM_MODE_ARM=y
-# CT_ARCH_ARM_MODE_THUMB is not set
-# CT_ARCH_ARM_INTERWORKING is not set
-CT_ARCH_ARM_EABI_FORCE=y
-CT_ARCH_ARM_EABI=y
+CT_ARCH_X86_IAMCU=y
 
 #
 # Toolchain options
@@ -176,19 +170,13 @@ CT_ARCH_ARM_EABI=y
 #
 # General toolchain options
 #
-CT_FORCE_SYSROOT=y
-CT_USE_SYSROOT=y
-CT_SYSROOT_NAME="sysroot"
-CT_SYSROOT_DIR_PREFIX=""
-CT_WANTS_STATIC_LINK=y
-# CT_STATIC_TOOLCHAIN is not set
 CT_TOOLCHAIN_PKGVERSION=""
 CT_TOOLCHAIN_BUGURL=""
 
 #
 # Tuple completion and aliasing
 #
-CT_TARGET_VENDOR="none"
+CT_TARGET_VENDOR="zephyr"
 CT_TARGET_ALIAS_SED_EXPR=""
 CT_TARGET_ALIAS=""
 
@@ -236,24 +224,17 @@ CT_BINUTILS_binutils=y
 #
 # GNU binutils
 #
-# CT_CC_BINUTILS_SHOW_LINARO is not set
-# CT_BINUTILS_V_2_25_1 is not set
-# CT_BINUTILS_V_2_25 is not set
-# CT_BINUTILS_V_2_24 is not set
-# CT_BINUTILS_V_2_23_2 is not set
-# CT_BINUTILS_V_2_23_1 is not set
-CT_BINUTILS_V_2_22=y
-# CT_BINUTILS_V_2_21_53 is not set
-# CT_BINUTILS_V_2_21_1a is not set
-# CT_BINUTILS_V_2_20_1a is not set
-# CT_BINUTILS_V_2_19_1a is not set
-# CT_BINUTILS_V_2_18a is not set
-CT_BINUTILS_VERSION="2.22"
-CT_BINUTILS_2_22_or_later=y
-CT_BINUTILS_2_21_or_later=y
-CT_BINUTILS_2_20_or_later=y
-CT_BINUTILS_2_19_or_later=y
-CT_BINUTILS_2_18_or_later=y
+CT_BINUTILS_VERSION="2.28"
+# CT_BINUTILS_SHOW_LINARO is not set
+CT_BINUTILS_V_2_28=y
+# CT_BINUTILS_V_2_27 is not set
+# CT_BINUTILS_V_2_26 is not set
+CT_BINUTILS_2_27_or_later=y
+CT_BINUTILS_2_26_or_later=y
+CT_BINUTILS_2_25_1_or_later=y
+CT_BINUTILS_2_25_or_later=y
+CT_BINUTILS_2_24_or_later=y
+CT_BINUTILS_2_23_2_or_later=y
 CT_BINUTILS_HAS_HASH_STYLE=y
 CT_BINUTILS_HAS_GOLD=y
 CT_BINUTILS_GOLD_SUPPORTS_ARCH=y
@@ -277,7 +258,7 @@ CT_BINUTILS_EXTRA_CONFIG_ARRAY=""
 # C-library
 #
 CT_LIBC="newlib"
-CT_LIBC_VERSION="2.2.0"
+CT_LIBC_VERSION="2.5.0.20170323"
 CT_LIBC_newlib=y
 # CT_LIBC_none is not set
 CT_LIBC_avr_libc_AVAILABLE=y
@@ -287,14 +268,20 @@ CT_LIBC_mingw_AVAILABLE=y
 CT_LIBC_musl_AVAILABLE=y
 CT_LIBC_newlib_AVAILABLE=y
 # CT_CC_NEWLIB_SHOW_LINARO is not set
-CT_LIBC_NEWLIB_V_2_2_0=y
+CT_LIBC_NEWLIB_V_2_5_0=y
+# CT_LIBC_NEWLIB_V_2_4_0 is not set
+# CT_LIBC_NEWLIB_V_2_3_0 is not set
+# CT_LIBC_NEWLIB_V_2_2_0 is not set
 # CT_LIBC_NEWLIB_V_2_1_0 is not set
 # CT_LIBC_NEWLIB_V_2_0_0 is not set
 # CT_LIBC_NEWLIB_V_1_20_0 is not set
 # CT_LIBC_NEWLIB_V_1_19_0 is not set
 # CT_LIBC_NEWLIB_V_1_18_0 is not set
 # CT_LIBC_NEWLIB_V_1_17_0 is not set
-CT_LIBC_NEWLIB_2_2=y
+CT_LIBC_NEWLIB_2_5=y
+CT_LIBC_NEWLIB_2_5_or_later=y
+CT_LIBC_NEWLIB_2_4_or_later=y
+CT_LIBC_NEWLIB_2_3_or_later=y
 CT_LIBC_NEWLIB_2_2_or_later=y
 CT_LIBC_NEWLIB_2_1_or_later=y
 CT_LIBC_NEWLIB_2_0_or_later=y
@@ -314,9 +301,25 @@ CT_THREADS_NONE=y
 #
 # CT_LIBC_NEWLIB_IO_C99FMT is not set
 # CT_LIBC_NEWLIB_IO_LL is not set
-# CT_LIBC_NEWLIB_IO_FLOAT is not set
-# CT_LIBC_NEWLIB_DISABLE_SUPPLIED_SYSCALLS is not set
+CT_LIBC_NEWLIB_IO_FLOAT=y
+# CT_LIBC_NEWLIB_IO_LDBL is not set
+# CT_LIBC_NEWLIB_IO_POS_ARGS is not set
+CT_LIBC_NEWLIB_FVWRITE_IN_STREAMIO=y
+CT_LIBC_NEWLIB_UNBUF_STREAM_OPT=y
+# CT_LIBC_NEWLIB_FSEEK_OPTIMIZATION is not set
+CT_LIBC_NEWLIB_DISABLE_SUPPLIED_SYSCALLS=y
+# CT_LIBC_NEWLIB_REGISTER_FINI is not set
+CT_LIBC_NEWLIB_ATEXIT_DYNAMIC_ALLOC=y
+CT_LIBC_NEWLIB_GLOBAL_ATEXIT=y
+CT_LIBC_NEWLIB_LITE_EXIT=y
+# CT_LIBC_NEWLIB_REENT_SMALL is not set
+# CT_LIBC_NEWLIB_MULTITHREAD is not set
+# CT_LIBC_NEWLIB_EXTRA_SECTIONS is not set
+# CT_LIBC_NEWLIB_WIDE_ORIENT is not set
 CT_LIBC_NEWLIB_ENABLE_TARGET_OPTSPACE=y
+# CT_LIBC_NEWLIB_LTO is not set
+CT_LIBC_NEWLIB_NANO_MALLOC=y
+CT_LIBC_NEWLIB_NANO_FORMATTED_IO=y
 CT_LIBC_NEWLIB_EXTRA_CONFIG_ARRAY=""
 
 #
@@ -325,59 +328,38 @@ CT_LIBC_NEWLIB_EXTRA_CONFIG_ARRAY=""
 CT_CC="gcc"
 CT_CC_CORE_PASS_2_NEEDED=y
 CT_CC_gcc=y
+CT_CC_GCC_VERSION="6.3.0"
 # CT_CC_GCC_SHOW_LINARO is not set
-CT_CC_GCC_V_5_2_0=y
-# CT_CC_GCC_V_4_9_3 is not set
-# CT_CC_GCC_V_4_8_5 is not set
-# CT_CC_GCC_V_4_7_4 is not set
-# CT_CC_GCC_V_4_6_4 is not set
-# CT_CC_GCC_V_4_5_4 is not set
-# CT_CC_GCC_V_4_4_7 is not set
-# CT_CC_GCC_V_4_3_6 is not set
-# CT_CC_GCC_V_4_2_4 is not set
-CT_CC_GCC_4_2_or_later=y
-CT_CC_GCC_4_3_or_later=y
-CT_CC_GCC_4_4_or_later=y
-CT_CC_GCC_4_5_or_later=y
-CT_CC_GCC_4_6_or_later=y
-CT_CC_GCC_4_7_or_later=y
+CT_CC_GCC_V_6_3_0=y
+# CT_CC_GCC_V_5_4_0 is not set
+# CT_CC_GCC_V_4_9_4 is not set
 CT_CC_GCC_4_8_or_later=y
 CT_CC_GCC_4_9_or_later=y
-CT_CC_GCC_5=y
 CT_CC_GCC_5_or_later=y
-CT_CC_GCC_HAS_GRAPHITE=y
-CT_CC_GCC_USE_GRAPHITE=y
-CT_CC_GCC_HAS_LTO=y
-CT_CC_GCC_USE_LTO=y
-CT_CC_GCC_HAS_PKGVERSION_BUGURL=y
-CT_CC_GCC_HAS_BUILD_ID=y
-CT_CC_GCC_HAS_LNK_HASH_STYLE=y
-CT_CC_GCC_USE_GMP_MPFR=y
-CT_CC_GCC_USE_MPC=y
-CT_CC_GCC_HAS_LIBQUADMATH=y
-CT_CC_GCC_HAS_LIBSANITIZER=y
-CT_CC_GCC_VERSION="5.2.0"
-# CT_CC_LANG_FORTRAN is not set
+CT_CC_GCC_6=y
+CT_CC_GCC_6_or_later=y
+CT_CC_GCC_HAS_LIBMPX=y
 CT_CC_GCC_ENABLE_CXX_FLAGS=""
 CT_CC_GCC_CORE_EXTRA_CONFIG_ARRAY=""
 CT_CC_GCC_EXTRA_CONFIG_ARRAY=""
-CT_CC_GCC_EXTRA_ENV_ARRAY=""
 # CT_CC_GCC_TARGET_FINAL is not set
-CT_CC_GCC_STATIC_LIBSTDCXX=y
 # CT_CC_GCC_SYSTEM_ZLIB is not set
+CT_CC_GCC_CONFIG_TLS=m
 
 #
 # Optimisation features
 #
+CT_CC_GCC_USE_GRAPHITE=y
+CT_CC_GCC_USE_LTO=y
 
 #
 # Settings for libraries running on target
 #
 CT_CC_GCC_ENABLE_TARGET_OPTSPACE=y
 # CT_CC_GCC_LIBMUDFLAP is not set
-# CT_CC_GCC_LIBGOMP is not set
 # CT_CC_GCC_LIBSSP is not set
 # CT_CC_GCC_LIBQUADMATH is not set
+CT_CC_GCC_LIBMPX=y
 
 #
 # Misc. obscure options.
@@ -406,14 +388,39 @@ CT_CC_SUPPORT_GOLANG=y
 #
 # Additional supported languages:
 #
-# CT_CC_LANG_CXX is not set
+CT_CC_LANG_CXX=y
+# CT_CC_LANG_FORTRAN is not set
 
 #
 # Debug facilities
 #
-# CT_DEBUG_dmalloc is not set
-# CT_DEBUG_duma is not set
-# CT_DEBUG_gdb is not set
+CT_DEBUG_gdb=y
+CT_GDB_CROSS=y
+# CT_GDB_CROSS_SIM is not set
+CT_GDB_CROSS_PYTHON=y
+CT_GDB_CROSS_PYTHON_BINARY=""
+CT_GDB_CROSS_EXTRA_CONFIG_ARRAY=""
+
+#
+# In bare-metal, you'll need to
+#
+
+#
+# provide your own gdbserver stub.
+#
+
+#
+# gdb version
+#
+CT_GDB_VERSION="7.12.1"
+CT_GDB_V_7_12_1=y
+# CT_GDB_V_7_11_1 is not set
+CT_GDB_7_12_or_later=y
+CT_GDB_7_2_or_later=y
+CT_GDB_7_0_or_later=y
+CT_GDB_HAS_PKGVERSION_BUGURL=y
+CT_GDB_HAS_PYTHON=y
+CT_GDB_INSTALL_GDBINIT=y
 # CT_DEBUG_ltrace is not set
 # CT_DEBUG_strace is not set
 
@@ -421,47 +428,54 @@ CT_CC_SUPPORT_GOLANG=y
 # Companion libraries
 #
 CT_COMPLIBS_NEEDED=y
+CT_LIBICONV_NEEDED=y
 CT_GMP_NEEDED=y
 CT_MPFR_NEEDED=y
 CT_ISL_NEEDED=y
 CT_MPC_NEEDED=y
+CT_EXPAT_NEEDED=y
+CT_NCURSES_NEEDED=y
 CT_COMPLIBS=y
+CT_LIBICONV=y
+CT_GETTEXT=y
 CT_GMP=y
 CT_MPFR=y
 CT_ISL=y
 CT_MPC=y
-# CT_GMP_V_6_0_0 is not set
-CT_GMP_V_5_1_3=y
-# CT_GMP_V_5_1_1 is not set
-# CT_GMP_V_5_0_2 is not set
-# CT_GMP_V_5_0_1 is not set
-# CT_GMP_V_4_3_2 is not set
-# CT_GMP_V_4_3_1 is not set
-# CT_GMP_V_4_3_0 is not set
+CT_EXPAT=y
+CT_NCURSES=y
+CT_ZLIB=y
+CT_ZLIB_V_1_2_11=y
+CT_ZLIB_VERSION="1.2.11"
+CT_LIBICONV_V_1_15=y
+# CT_LIBICONV_V_1_14 is not set
+CT_LIBICONV_VERSION="1.15"
+CT_GETTEXT_V_0_19_8_1=y
+CT_GETTEXT_VERSION="0.19.8.1"
+CT_GMP_V_6_1_2=y
 CT_GMP_5_0_2_or_later=y
-CT_GMP_VERSION="5.1.3"
-# CT_MPFR_V_3_1_3 is not set
-CT_MPFR_V_3_1_2=y
-# CT_MPFR_V_3_1_0 is not set
-# CT_MPFR_V_3_0_1 is not set
-# CT_MPFR_V_3_0_0 is not set
-# CT_MPFR_V_2_4_2 is not set
-# CT_MPFR_V_2_4_1 is not set
-# CT_MPFR_V_2_4_0 is not set
-CT_MPFR_VERSION="3.1.2"
-# CT_ISL_V_0_14 is not set
-CT_ISL_V_0_12_2=y
+CT_GMP_VERSION="6.1.2"
+CT_MPFR_V_3_1_5=y
+CT_MPFR_VERSION="3.1.5"
+CT_ISL_V_0_16_1=y
+# CT_ISL_V_0_15 is not set
+CT_ISL_V_0_16_or_later=y
+CT_ISL_V_0_15_or_later=y
+CT_ISL_V_0_14_or_later=y
 CT_ISL_V_0_12_or_later=y
-CT_ISL_VERSION="0.12.2"
-# CT_MPC_V_1_0_3 is not set
-CT_MPC_V_1_0_2=y
-# CT_MPC_V_1_0_1 is not set
-# CT_MPC_V_1_0 is not set
-# CT_MPC_V_0_9 is not set
-# CT_MPC_V_0_8_2 is not set
-# CT_MPC_V_0_8_1 is not set
-# CT_MPC_V_0_7 is not set
-CT_MPC_VERSION="1.0.2"
+CT_ISL_VERSION="0.16.1"
+CT_MPC_V_1_0_3=y
+CT_MPC_VERSION="1.0.3"
+CT_EXPAT_V_2_2_0=y
+CT_EXPAT_VERSION="2.2.0"
+CT_NCURSES_V_6_0=y
+CT_NCURSES_VERSION="6.0"
+CT_NCURSES_HOST_CONFIG_ARGS=""
+CT_NCURSES_HOST_DISABLE_DB=y
+CT_NCURSES_HOST_FALLBACKS="linux,xterm,xterm-color,xterm-256color,vt100"
+CT_NCURSES_TARGET_CONFIG_ARGS=""
+# CT_NCURSES_TARGET_DISABLE_DB is not set
+CT_NCURSES_TARGET_FALLBACKS=""
 
 #
 # Companion libraries common options
@@ -471,8 +485,11 @@ CT_MPC_VERSION="1.0.2"
 #
 # Companion tools
 #
-
-#
-# READ HELP before you say 'Y' below !!!
-#
-# CT_COMP_TOOLS is not set
+# CT_COMP_TOOLS_FOR_HOST is not set
+# CT_COMP_TOOLS_autoconf is not set
+# CT_COMP_TOOLS_automake is not set
+# CT_COMP_TOOLS_libtool is not set
+CT_COMP_TOOLS_m4=y
+CT_M4_V_1_4_18=y
+CT_M4_VERSION="1.4.18"
+# CT_COMP_TOOLS_make is not set

scripts/cross_compiler/nios2.config

@@ -0,0 +1,483 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Crosstool-NG Configuration
+#
+CT_CONFIGURE_has_wget=y
+CT_CONFIGURE_has_curl=y
+CT_CONFIGURE_has_stat_flavor_GNU=y
+CT_CONFIGURE_has_make_3_81_or_newer=y
+CT_CONFIGURE_has_libtool_2_4_or_newer=y
+CT_CONFIGURE_has_libtoolize_2_4_or_newer=y
+CT_CONFIGURE_has_autoconf_2_63_or_newer=y
+CT_CONFIGURE_has_autoreconf_2_63_or_newer=y
+CT_CONFIGURE_has_automake_1_15_or_newer=y
+CT_CONFIGURE_has_gnu_m4_1_4_12_or_newer=y
+CT_CONFIGURE_has_cvs=y
+CT_CONFIGURE_has_svn=y
+CT_CONFIGURE_has_git=y
+CT_MODULES=y
+
+#
+# Paths and misc options
+#
+
+#
+# crosstool-NG behavior
+#
+# CT_OBSOLETE is not set
+# CT_EXPERIMENTAL is not set
+# CT_DEBUG_CT is not set
+
+#
+# Paths
+#
+CT_LOCAL_TARBALLS_DIR="${CT_PREFIX:-${HOME}/x-tools}/sources"
+CT_SAVE_TARBALLS=y
+CT_WORK_DIR="${CT_TOP_DIR}/.build"
+CT_BUILD_TOP_DIR="${CT_WORK_DIR}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}"
+CT_PREFIX_DIR="${CT_PREFIX:-${HOME}/x-tools}/${CT_HOST:+HOST-${CT_HOST}/}${CT_TARGET}"
+CT_RM_RF_PREFIX_DIR=y
+CT_REMOVE_DOCS=y
+# CT_PREFIX_DIR_RO is not set
+CT_STRIP_HOST_TOOLCHAIN_EXECUTABLES=y
+# CT_STRIP_TARGET_TOOLCHAIN_EXECUTABLES is not set
+
+#
+# Downloading
+#
+CT_DOWNLOAD_AGENT_WGET=y
+# CT_DOWNLOAD_AGENT_CURL is not set
+# CT_DOWNLOAD_AGENT_NONE is not set
+# CT_FORBID_DOWNLOAD is not set
+# CT_FORCE_DOWNLOAD is not set
+CT_CONNECT_TIMEOUT=10
+CT_DOWNLOAD_WGET_OPTIONS="--passive-ftp --tries=3 -nc --progress=dot:binary"
+# CT_ONLY_DOWNLOAD is not set
+# CT_USE_MIRROR is not set
+
+#
+# Extracting
+#
+# CT_FORCE_EXTRACT is not set
+CT_OVERRIDE_CONFIG_GUESS_SUB=y
+# CT_ONLY_EXTRACT is not set
+CT_PATCH_BUNDLED=y
+# CT_PATCH_LOCAL is not set
+# CT_PATCH_BUNDLED_LOCAL is not set
+# CT_PATCH_LOCAL_BUNDLED is not set
+# CT_PATCH_BUNDLED_FALLBACK_LOCAL is not set
+# CT_PATCH_LOCAL_FALLBACK_BUNDLED is not set
+# CT_PATCH_NONE is not set
+CT_PATCH_ORDER="bundled"
+
+#
+# Build behavior
+#
+CT_PARALLEL_JOBS=0
+CT_LOAD=""
+CT_USE_PIPES=y
+CT_EXTRA_CFLAGS_FOR_BUILD=""
+CT_EXTRA_LDFLAGS_FOR_BUILD=""
+CT_EXTRA_CFLAGS_FOR_HOST=""
+CT_EXTRA_LDFLAGS_FOR_HOST=""
+# CT_CONFIG_SHELL_SH is not set
+# CT_CONFIG_SHELL_ASH is not set
+CT_CONFIG_SHELL_BASH=y
+# CT_CONFIG_SHELL_CUSTOM is not set
+CT_CONFIG_SHELL="${bash}"
+
+#
+# Logging
+#
+# CT_LOG_ERROR is not set
+# CT_LOG_WARN is not set
+# CT_LOG_INFO is not set
+CT_LOG_EXTRA=y
+# CT_LOG_ALL is not set
+# CT_LOG_DEBUG is not set
+CT_LOG_LEVEL_MAX="EXTRA"
+# CT_LOG_SEE_TOOLS_WARN is not set
+# CT_LOG_PROGRESS_BAR is not set
+CT_LOG_TO_FILE=y
+CT_LOG_FILE_COMPRESS=y
+
+#
+# Target options
+#
+CT_ARCH="nios2"
+# CT_ARCH_alpha is not set
+# CT_ARCH_arm is not set
+# CT_ARCH_avr is not set
+# CT_ARCH_m68k is not set
+# CT_ARCH_mips is not set
+CT_ARCH_nios2=y
+# CT_ARCH_powerpc is not set
+# CT_ARCH_s390 is not set
+# CT_ARCH_sh is not set
+# CT_ARCH_sparc is not set
+# CT_ARCH_x86 is not set
+# CT_ARCH_xtensa is not set
+CT_ARCH_alpha_AVAILABLE=y
+CT_ARCH_arm_AVAILABLE=y
+CT_ARCH_avr_AVAILABLE=y
+CT_ARCH_m68k_AVAILABLE=y
+CT_ARCH_microblaze_AVAILABLE=y
+CT_ARCH_mips_AVAILABLE=y
+CT_ARCH_nios2_AVAILABLE=y
+CT_ARCH_powerpc_AVAILABLE=y
+CT_ARCH_s390_AVAILABLE=y
+CT_ARCH_sh_AVAILABLE=y
+CT_ARCH_sparc_AVAILABLE=y
+CT_ARCH_x86_AVAILABLE=y
+CT_ARCH_xtensa_AVAILABLE=y
+CT_ARCH_SUFFIX=""
+
+#
+# Generic target options
+#
+# CT_MULTILIB is not set
+CT_DEMULTILIB=y
+CT_ARCH_DEFAULT_LE=y
+CT_ARCH_SUPPORTS_32=y
+CT_ARCH_DEFAULT_32=y
+CT_ARCH_BITNESS=32
+CT_ARCH_32=y
+
+#
+# Target optimisations
+#
+CT_ARCH_SUPPORTS_WITH_CPU=y
+CT_ARCH_CPU=""
+CT_TARGET_CFLAGS=""
+CT_TARGET_LDFLAGS=""
+CT_ARCH_FLOAT=""
+
+#
+# Toolchain options
+#
+
+#
+# General toolchain options
+#
+CT_TOOLCHAIN_PKGVERSION=""
+CT_TOOLCHAIN_BUGURL=""
+
+#
+# Tuple completion and aliasing
+#
+CT_TARGET_VENDOR="zephyr"
+CT_TARGET_ALIAS_SED_EXPR=""
+CT_TARGET_ALIAS=""
+
+#
+# Toolchain type
+#
+CT_CROSS=y
+# CT_CANADIAN is not set
+CT_TOOLCHAIN_TYPE="cross"
+
+#
+# Build system
+#
+CT_BUILD=""
+CT_BUILD_PREFIX=""
+CT_BUILD_SUFFIX=""
+
+#
+# Misc options
+#
+# CT_TOOLCHAIN_ENABLE_NLS is not set
+
+#
+# Operating System
+#
+CT_BARE_METAL=y
+CT_KERNEL="bare-metal"
+CT_KERNEL_bare_metal=y
+# CT_KERNEL_linux is not set
+CT_KERNEL_bare_metal_AVAILABLE=y
+CT_KERNEL_linux_AVAILABLE=y
+CT_KERNEL_windows_AVAILABLE=y
+
+#
+# Common kernel options
+#
+
+#
+# Binary utilities
+#
+CT_ARCH_BINFMT_ELF=y
+# CT_ARCH_BINFMT_FLAT is not set
+# CT_ARCH_BINFMT_FDPIC is not set
+CT_BINUTILS="binutils"
+CT_BINUTILS_binutils=y
+
+#
+# GNU binutils
+#
+CT_BINUTILS_VERSION="2.28"
+# CT_BINUTILS_SHOW_LINARO is not set
+CT_BINUTILS_V_2_28=y
+# CT_BINUTILS_V_2_27 is not set
+# CT_BINUTILS_V_2_26 is not set
+CT_BINUTILS_2_27_or_later=y
+CT_BINUTILS_2_26_or_later=y
+CT_BINUTILS_2_25_1_or_later=y
+CT_BINUTILS_2_25_or_later=y
+CT_BINUTILS_2_24_or_later=y
+CT_BINUTILS_2_23_2_or_later=y
+CT_BINUTILS_HAS_HASH_STYLE=y
+CT_BINUTILS_HAS_GOLD=y
+CT_BINUTILS_HAS_PLUGINS=y
+CT_BINUTILS_HAS_PKGVERSION_BUGURL=y
+CT_BINUTILS_LINKER_LD=y
+CT_BINUTILS_LINKERS_LIST="ld"
+CT_BINUTILS_LINKER_DEFAULT="bfd"
+# CT_BINUTILS_PLUGINS is not set
+CT_BINUTILS_EXTRA_CONFIG_ARRAY=""
+
+#
+# binutils other options
+#
+
+#
+# C-library
+#
+CT_LIBC="newlib"
+CT_LIBC_VERSION="2.5.0.20170323"
+CT_LIBC_newlib=y
+# CT_LIBC_none is not set
+CT_LIBC_avr_libc_AVAILABLE=y
+CT_LIBC_glibc_AVAILABLE=y
+CT_THREADS="none"
+CT_LIBC_mingw_AVAILABLE=y
+CT_LIBC_musl_AVAILABLE=y
+CT_LIBC_newlib_AVAILABLE=y
+# CT_CC_NEWLIB_SHOW_LINARO is not set
+CT_LIBC_NEWLIB_V_2_5_0=y
+# CT_LIBC_NEWLIB_V_2_4_0 is not set
+# CT_LIBC_NEWLIB_V_2_3_0 is not set
+# CT_LIBC_NEWLIB_V_2_2_0 is not set
+# CT_LIBC_NEWLIB_V_2_1_0 is not set
+# CT_LIBC_NEWLIB_V_2_0_0 is not set
+# CT_LIBC_NEWLIB_V_1_20_0 is not set
+# CT_LIBC_NEWLIB_V_1_19_0 is not set
+# CT_LIBC_NEWLIB_V_1_18_0 is not set
+# CT_LIBC_NEWLIB_V_1_17_0 is not set
+CT_LIBC_NEWLIB_2_5=y
+CT_LIBC_NEWLIB_2_5_or_later=y
+CT_LIBC_NEWLIB_2_4_or_later=y
+CT_LIBC_NEWLIB_2_3_or_later=y
+CT_LIBC_NEWLIB_2_2_or_later=y
+CT_LIBC_NEWLIB_2_1_or_later=y
+CT_LIBC_NEWLIB_2_0_or_later=y
+CT_LIBC_NEWLIB_TARGET_CFLAGS=""
+CT_LIBC_none_AVAILABLE=y
+CT_LIBC_uClibc_AVAILABLE=y
+CT_LIBC_SUPPORT_THREADS_NONE=y
+CT_LIBC_PROVIDES_CXA_ATEXIT=y
+
+#
+# Common C library options
+#
+CT_THREADS_NONE=y
+
+#
+# newlib other options
+#
+# CT_LIBC_NEWLIB_IO_C99FMT is not set
+# CT_LIBC_NEWLIB_IO_LL is not set
+CT_LIBC_NEWLIB_IO_FLOAT=y
+# CT_LIBC_NEWLIB_IO_LDBL is not set
+# CT_LIBC_NEWLIB_IO_POS_ARGS is not set
+CT_LIBC_NEWLIB_FVWRITE_IN_STREAMIO=y
+CT_LIBC_NEWLIB_UNBUF_STREAM_OPT=y
+# CT_LIBC_NEWLIB_FSEEK_OPTIMIZATION is not set
+CT_LIBC_NEWLIB_DISABLE_SUPPLIED_SYSCALLS=y
+# CT_LIBC_NEWLIB_REGISTER_FINI is not set
+CT_LIBC_NEWLIB_ATEXIT_DYNAMIC_ALLOC=y
+CT_LIBC_NEWLIB_GLOBAL_ATEXIT=y
+CT_LIBC_NEWLIB_LITE_EXIT=y
+# CT_LIBC_NEWLIB_REENT_SMALL is not set
+# CT_LIBC_NEWLIB_MULTITHREAD is not set
+# CT_LIBC_NEWLIB_EXTRA_SECTIONS is not set
+# CT_LIBC_NEWLIB_WIDE_ORIENT is not set
+CT_LIBC_NEWLIB_ENABLE_TARGET_OPTSPACE=y
+# CT_LIBC_NEWLIB_LTO is not set
+CT_LIBC_NEWLIB_NANO_MALLOC=y
+CT_LIBC_NEWLIB_NANO_FORMATTED_IO=y
+CT_LIBC_NEWLIB_EXTRA_CONFIG_ARRAY=""
+
+#
+# C compiler
+#
+CT_CC="gcc"
+CT_CC_CORE_PASS_2_NEEDED=y
+CT_CC_gcc=y
+CT_CC_GCC_VERSION="6.3.0"
+# CT_CC_GCC_SHOW_LINARO is not set
+CT_CC_GCC_V_6_3_0=y
+# CT_CC_GCC_V_5_4_0 is not set
+# CT_CC_GCC_V_4_9_4 is not set
+CT_CC_GCC_4_8_or_later=y
+CT_CC_GCC_4_9_or_later=y
+CT_CC_GCC_5_or_later=y
+CT_CC_GCC_6=y
+CT_CC_GCC_6_or_later=y
+CT_CC_GCC_HAS_LIBMPX=y
+CT_CC_GCC_ENABLE_CXX_FLAGS=""
+CT_CC_GCC_CORE_EXTRA_CONFIG_ARRAY=""
+CT_CC_GCC_EXTRA_CONFIG_ARRAY=""
+# CT_CC_GCC_TARGET_FINAL is not set
+# CT_CC_GCC_SYSTEM_ZLIB is not set
+CT_CC_GCC_CONFIG_TLS=m
+
+#
+# Optimisation features
+#
+CT_CC_GCC_USE_GRAPHITE=y
+CT_CC_GCC_USE_LTO=y
+
+#
+# Settings for libraries running on target
+#
+CT_CC_GCC_ENABLE_TARGET_OPTSPACE=y
+# CT_CC_GCC_LIBMUDFLAP is not set
+# CT_CC_GCC_LIBSSP is not set
+# CT_CC_GCC_LIBQUADMATH is not set
+
+#
+# Misc. obscure options.
+#
+CT_CC_CXA_ATEXIT=y
+# CT_CC_GCC_DISABLE_PCH is not set
+CT_CC_GCC_LDBL_128=m
+# CT_CC_GCC_BUILD_ID is not set
+CT_CC_GCC_LNK_HASH_STYLE_DEFAULT=y
+# CT_CC_GCC_LNK_HASH_STYLE_SYSV is not set
+# CT_CC_GCC_LNK_HASH_STYLE_GNU is not set
+# CT_CC_GCC_LNK_HASH_STYLE_BOTH is not set
+CT_CC_GCC_LNK_HASH_STYLE=""
+CT_CC_GCC_DEC_FLOAT_AUTO=y
+# CT_CC_GCC_DEC_FLOAT_BID is not set
+# CT_CC_GCC_DEC_FLOAT_DPD is not set
+# CT_CC_GCC_DEC_FLOATS_NO is not set
+CT_CC_SUPPORT_CXX=y
+CT_CC_SUPPORT_FORTRAN=y
+CT_CC_SUPPORT_JAVA=y
+CT_CC_SUPPORT_ADA=y
+CT_CC_SUPPORT_OBJC=y
+CT_CC_SUPPORT_OBJCXX=y
+CT_CC_SUPPORT_GOLANG=y
+
+#
+# Additional supported languages:
+#
+CT_CC_LANG_CXX=y
+# CT_CC_LANG_FORTRAN is not set
+
+#
+# Debug facilities
+#
+CT_DEBUG_gdb=y
+CT_GDB_CROSS=y
+# CT_GDB_CROSS_SIM is not set
+CT_GDB_CROSS_PYTHON=y
+CT_GDB_CROSS_PYTHON_BINARY=""
+CT_GDB_CROSS_EXTRA_CONFIG_ARRAY=""
+
+#
+# In bare-metal, you'll need to
+#
+
+#
+# provide your own gdbserver stub.
+#
+
+#
+# gdb version
+#
+CT_GDB_VERSION="7.12.1"
+CT_GDB_V_7_12_1=y
+# CT_GDB_V_7_11_1 is not set
+CT_GDB_7_12_or_later=y
+CT_GDB_7_2_or_later=y
+CT_GDB_7_0_or_later=y
+CT_GDB_HAS_PKGVERSION_BUGURL=y
+CT_GDB_HAS_PYTHON=y
+CT_GDB_INSTALL_GDBINIT=y
+# CT_DEBUG_ltrace is not set
+# CT_DEBUG_strace is not set
+
+#
+# Companion libraries
+#
+CT_COMPLIBS_NEEDED=y
+CT_LIBICONV_NEEDED=y
+CT_GMP_NEEDED=y
+CT_MPFR_NEEDED=y
+CT_ISL_NEEDED=y
+CT_MPC_NEEDED=y
+CT_EXPAT_NEEDED=y
+CT_NCURSES_NEEDED=y
+CT_COMPLIBS=y
+CT_LIBICONV=y
+CT_GETTEXT=y
+CT_GMP=y
+CT_MPFR=y
+CT_ISL=y
+CT_MPC=y
+CT_EXPAT=y
+CT_NCURSES=y
+CT_ZLIB=y
+CT_ZLIB_V_1_2_11=y
+CT_ZLIB_VERSION="1.2.11"
+CT_LIBICONV_V_1_15=y
+# CT_LIBICONV_V_1_14 is not set
+CT_LIBICONV_VERSION="1.15"
+CT_GETTEXT_V_0_19_8_1=y
+CT_GETTEXT_VERSION="0.19.8.1"
+CT_GMP_V_6_1_2=y
+CT_GMP_5_0_2_or_later=y
+CT_GMP_VERSION="6.1.2"
+CT_MPFR_V_3_1_5=y
+CT_MPFR_VERSION="3.1.5"
+CT_ISL_V_0_16_1=y
+# CT_ISL_V_0_15 is not set
+CT_ISL_V_0_16_or_later=y
+CT_ISL_V_0_15_or_later=y
+CT_ISL_V_0_14_or_later=y
+CT_ISL_V_0_12_or_later=y
+CT_ISL_VERSION="0.16.1"
+CT_MPC_V_1_0_3=y
+CT_MPC_VERSION="1.0.3"
+CT_EXPAT_V_2_2_0=y
+CT_EXPAT_VERSION="2.2.0"
+CT_NCURSES_V_6_0=y
+CT_NCURSES_VERSION="6.0"
+CT_NCURSES_HOST_CONFIG_ARGS=""
+CT_NCURSES_HOST_DISABLE_DB=y
+CT_NCURSES_HOST_FALLBACKS="linux,xterm,xterm-color,xterm-256color,vt100"
+CT_NCURSES_TARGET_CONFIG_ARGS=""
+# CT_NCURSES_TARGET_DISABLE_DB is not set
+CT_NCURSES_TARGET_FALLBACKS=""
+
+#
+# Companion libraries common options
+#
+# CT_COMPLIBS_CHECK is not set
+
+#
+# Companion tools
+#
+# CT_COMP_TOOLS_FOR_HOST is not set
+# CT_COMP_TOOLS_autoconf is not set
+# CT_COMP_TOOLS_automake is not set
+# CT_COMP_TOOLS_libtool is not set
+CT_COMP_TOOLS_m4=y
+CT_M4_V_1_4_18=y
+CT_M4_VERSION="1.4.18"
+CT_COMP_TOOLS_make=y
+CT_MAKE_V_4_2_1=y
+# CT_MAKE_GMAKE_SYMLINK is not set
+CT_MAKE_VERSION="4.2.1"

scripts/extract_dts_includes.py

@@ -1,10 +1,14 @@
 #!/usr/bin/env python3
+
+# vim: ai:ts=4:sw=4
+
 import sys
 from os import walk
 import os
 import re
 import yaml
 import pprint
+import argparse
 
 from devicetree import parse_file
 
@@ -503,7 +507,26 @@ def print_key_value(k, v, tabstop):
 
   return
 
-def generate_include_file(defs):
+def generate_keyvalue_file(defs, args):
+    compatible = reduced['/']['props']['compatible'][0]
+
+    node_keys = sorted(defs.keys())
+    for node in node_keys:
+       sys.stdout.write('# ' + node.split('/')[-1] )
+       sys.stdout.write("\n")
+
+       prop_keys = sorted(defs[node].keys())
+       for prop in prop_keys:
+         if prop == 'aliases':
+           for entry in sorted(defs[node][prop]):
+             a = defs[node][prop].get(entry)
+             sys.stdout.write("%s=%s\n" %(entry, defs[node].get(a)))
+         else:
+           sys.stdout.write("%s=%s\n" %(prop,defs[node].get(prop)))
+
+       sys.stdout.write("\n")
+
+def generate_include_file(defs, args):
     compatible = reduced['/']['props']['compatible'][0]
 
     sys.stdout.write("/**************************************************\n")
@@ -534,23 +557,50 @@ def generate_include_file(defs):
        for prop in prop_keys:
          if prop == 'aliases':
            for entry in sorted(defs[node][prop]):
-             print_key_value(entry, defs[node][prop].get(entry), maxtabstop)
+             a = defs[node][prop].get(entry)
+             print_key_value(entry, a, maxtabstop)
          else:
            print_key_value(prop, defs[node].get(prop), maxtabstop)
+
        sys.stdout.write("\n")
 
-    sys.stdout.write("#endif\n");
+    if args.fixup and os.path.exists(args.fixup):
+        sys.stdout.write("\n")
+        sys.stdout.write("/* Following definitions fixup the generated include */\n")
+        try:
+            with open(args.fixup, "r") as fd:
+                for line in fd.readlines():
+                    sys.stdout.write(line)
+                sys.stdout.write("\n")
+        except:
+            raise Exception("Input file " + os.path.abspath(args.fixup) + " does not exist.")
 
-def main(args):
-  if len(args) < 2:
-    print('Usage: %s filename.dts path_to_yaml' % args[0])
+    sys.stdout.write("#endif\n")
+
+def parse_arguments():
+
+  parser = argparse.ArgumentParser(description = __doc__,
+                                     formatter_class = argparse.RawDescriptionHelpFormatter)
+
+  parser.add_argument("-d", "--dts", help="DTS file")
+  parser.add_argument("-y", "--yaml", help="YAML file")
+  parser.add_argument("-f", "--fixup", help="Fixup file")
+  parser.add_argument("-k", "--keyvalue", action="store_true",
+          help="Generate file to be included by the build system")
+
+  return parser.parse_args()
+
+def main():
+  args = parse_arguments()
+  if not args.dts or not args.yaml:
+    print('Usage: %s -d filename.dts -y path_to_yaml' % sys.argv[0])
     return 1
 
   try:
-    with open(args[1], "r") as fd:
+    with open(args.dts, "r") as fd:
       d = parse_file(fd)
   except:
-     raise Exception("Input file " + os.path.abspath(args[1]) + " does not exist.")
+     raise Exception("Input file " + os.path.abspath(args.dts) + " does not exist.")
 
   # compress list to nodes w/ paths, add interrupt parent
   compress_nodes(d['/'], '/')
@@ -572,7 +622,7 @@ def main(args):
 
   # scan YAML files and find the ones we are interested in
   yaml_files = []
-  for (dirpath, dirnames, filenames) in walk(args[2]):
+  for (dirpath, dirnames, filenames) in walk(args.yaml):
     yaml_files.extend([f for f in filenames if re.match('.*\.yaml\Z', f)])
     yaml_files = [dirpath + '/' + t for t in yaml_files]
     break
@@ -628,9 +678,10 @@ def main(args):
     extract_reg_prop(chosen['zephyr,sram'], None, defs, "CONFIG_SRAM", 1024)
 
   # generate include file
-  generate_include_file(defs)
+  if args.keyvalue:
+    generate_keyvalue_file(defs, args)
+  else:
+    generate_include_file(defs, args)
 
 if __name__ == '__main__':
-  # test1.py executed as script
-  # do something
-  sys.exit(main(sys.argv))
+    main()

scripts/gitlint/zephyr_commit_rules.py

@@ -1,4 +1,4 @@
-from gitlint.rules import CommitRule, RuleViolation, TitleRegexMatches, CommitMessageTitle, LineRule
+from gitlint.rules import CommitRule, RuleViolation, TitleRegexMatches, CommitMessageTitle, LineRule, CommitMessageBody
 from gitlint.options import IntOption, BoolOption, StrOption, ListOption
 import re
 
@@ -68,3 +68,15 @@ class TitleStartsWithSubsystem(LineRule):
         violation_message = "Title does not follow <subsystem>: <subject>"
         if not pattern.search(title):
             return [RuleViolation(self.id, violation_message, title)]
+
+class MaxLineLengthExceptions(LineRule):
+    name = "max-line-length-with-exceptions"
+    id = "UC4"
+    target = CommitMessageBody
+    options_spec = [IntOption('line-length', 80, "Max line length")]
+    violation_message = "Line exceeds max length ({0}>{1})"
+
+    def validate(self, line, _commit):
+        max_length = self.options['line-length'].value
+        if len(line) > max_length and not line.startswith('Signed-off-by'):
+            return [RuleViolation(self.id, self.violation_message.format(len(line), max_length), line)]

subsys/bluetooth/Kconfig

@@ -57,6 +57,29 @@ config BLUETOOTH_CENTRAL
 	help
 	  Select this for LE Central role support.
 
+menu "Broadcaster"
+	visible if !BLUETOOTH_PERIPHERAL
+
+config BLUETOOTH_BROADCASTER
+	bool "Broadcaster Role support"
+	default y if BLUETOOTH_PERIPHERAL
+	default y if !BLUETOOTH_OBSERVER
+	help
+	  Select this for LE Broadcaster role support.
+
+endmenu
+
+menu "Observer"
+	visible if !BLUETOOTH_CENTRAL
+
+config BLUETOOTH_OBSERVER
+	bool "Observer Role support"
+	default y if BLUETOOTH_CENTRAL
+	help
+	  Select this for LE Observer role support.
+
+endmenu
+
 config BLUETOOTH_CONN
 	# Virtual/hidden option
 	bool

subsys/bluetooth/controller/Kconfig

@@ -30,33 +30,10 @@ endchoice
 
 comment "BLE Controller configuration"
 
-menu "Advertiser"
-	visible if !BLUETOOTH_PERIPHERAL
-
-config BLUETOOTH_CONTROLLER_STATE_ADV
-	bool "Enable Advertiser"
-	default y if BLUETOOTH_PERIPHERAL
-	default y if !BLUETOOTH_CONTROLLER_STATE_SCAN
-	help
-	  Enable support for advertising state in the Controller.
-
-endmenu
-
-menu "Scanner"
-	visible if !BLUETOOTH_CENTRAL
-
-config BLUETOOTH_CONTROLLER_STATE_SCAN
-	bool "Enable Scanner"
-	default y if BLUETOOTH_CENTRAL
-	help
-	  Enable support for scanning state in the Controller.
-
-endmenu
-
 config BLUETOOTH_CONTROLLER_DUP_FILTER_LEN
 	prompt "Number of addresses in the scan duplicate filter"
 	int
-	depends on BLUETOOTH_CONTROLLER_STATE_SCAN
+	depends on BLUETOOTH_OBSERVER
 	default 16
 	help
 	  Set the number of unique BLE addresses that can be filtered as
@@ -116,10 +93,12 @@ config BLUETOOTH_CONTROLLER_SUBVERSION_NUMBER
 
 config BLUETOOTH_CONTROLLER_RX_PRIO_STACK_SIZE
 	int
-	default 320
+	default 448
 
 comment "BLE Controller features"
 
+if BLUETOOTH_CONN
+
 config BLUETOOTH_CONTROLLER_LE_PING
 	bool "LE Ping"
 	default y
@@ -156,6 +135,8 @@ config BLUETOOTH_CONTROLLER_CHAN_SEL_2
 	  Enable support for Bluetooth 5.0 LE Channel Selection Algorithm #2 in
 	  the Controller.
 
+endif # BLUETOOTH_CONN
+
 config BLUETOOTH_CONTROLLER_ADVANCED_FEATURES
 	bool "Show advanced features"
 	help
@@ -267,6 +248,8 @@ config BLUETOOTH_CONTROLLER_TIFS_HW
 	help
 	  Enable use of hardware accelerated tIFS Trx switching.
 
+if BLUETOOTH_CONN
+
 config BLUETOOTH_CONTROLLER_FAST_ENC
 	bool "Fast Encryption Setup"
 	help
@@ -285,6 +268,8 @@ config BLUETOOTH_CONTROLLER_CONN_RSSI
 	help
 	  Enable connection RSSI measurement.
 
+endif # BLUETOOTH_CONN
+
 config BLUETOOTH_CONTROLLER_ADV_INDICATION
 	bool "Advertisement indications"
 	help

subsys/bluetooth/controller/hci/hci.c

@@ -566,7 +566,7 @@ static void le_read_supp_states(struct net_buf *buf, struct net_buf **evt)
 	sys_put_le64(0x000003ffffffffff, rp->le_states);
 }
 
-#if defined(CONFIG_BLUETOOTH_CONTROLLER_STATE_ADV)
+#if defined(CONFIG_BLUETOOTH_BROADCASTER)
 static void le_set_adv_param(struct net_buf *buf, struct net_buf **evt)
 {
 	struct bt_hci_cp_le_set_adv_param *cmd = (void *)buf->data;
@@ -628,9 +628,9 @@ static void le_set_adv_enable(struct net_buf *buf, struct net_buf **evt)
 	ccst = cmd_complete(evt, sizeof(*ccst));
 	ccst->status = (!status) ? 0x00 : BT_HCI_ERR_CMD_DISALLOWED;
 }
-#endif /* CONFIG_BLUETOOTH_CONTROLLER_STATE_ADV */
+#endif /* CONFIG_BLUETOOTH_BROADCASTER */
 
-#if defined(CONFIG_BLUETOOTH_CONTROLLER_STATE_SCAN)
+#if defined(CONFIG_BLUETOOTH_OBSERVER)
 static void le_set_scan_param(struct net_buf *buf, struct net_buf **evt)
 {
 	struct bt_hci_cp_le_set_scan_param *cmd = (void *)buf->data;
@@ -668,7 +668,7 @@ static void le_set_scan_enable(struct net_buf *buf, struct net_buf **evt)
 	ccst = cmd_complete(evt, sizeof(*ccst));
 	ccst->status = (!status) ? 0x00 : BT_HCI_ERR_CMD_DISALLOWED;
 }
-#endif /* CONFIG_BLUETOOTH_CONTROLLER_STATE_SCAN */
+#endif /* CONFIG_BLUETOOTH_OBSERVER */
 
 #if defined(CONFIG_BLUETOOTH_CONN)
 #if defined(CONFIG_BLUETOOTH_CENTRAL)
@@ -1030,7 +1030,7 @@ static int controller_cmd_handle(u8_t ocf, struct net_buf *cmd,
 		le_read_supp_states(cmd, evt);
 		break;
 
-#if defined(CONFIG_BLUETOOTH_CONTROLLER_STATE_ADV)
+#if defined(CONFIG_BLUETOOTH_BROADCASTER)
 	case BT_OCF(BT_HCI_OP_LE_SET_ADV_PARAM):
 		le_set_adv_param(cmd, evt);
 		break;
@@ -1050,9 +1050,9 @@ static int controller_cmd_handle(u8_t ocf, struct net_buf *cmd,
 	case BT_OCF(BT_HCI_OP_LE_SET_ADV_ENABLE):
 		le_set_adv_enable(cmd, evt);
 		break;
-#endif /* CONFIG_BLUETOOTH_CONTROLLER_STATE_ADV */
+#endif /* CONFIG_BLUETOOTH_BROADCASTER */
 
-#if defined(CONFIG_BLUETOOTH_CONTROLLER_STATE_SCAN)
+#if defined(CONFIG_BLUETOOTH_OBSERVER)
 	case BT_OCF(BT_HCI_OP_LE_SET_SCAN_PARAM):
 		le_set_scan_param(cmd, evt);
 		break;
@@ -1060,7 +1060,7 @@ static int controller_cmd_handle(u8_t ocf, struct net_buf *cmd,
 	case BT_OCF(BT_HCI_OP_LE_SET_SCAN_ENABLE):
 		le_set_scan_enable(cmd, evt);
 		break;
-#endif /* CONFIG_BLUETOOTH_CONTROLLER_STATE_SCAN */
+#endif /* CONFIG_BLUETOOTH_OBSERVER */
 
 #if defined(CONFIG_BLUETOOTH_CONN)
 #if defined(CONFIG_BLUETOOTH_CENTRAL)