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Author SHA1 Message Date
dependabot[bot]
b6731fe211 build(deps): bump pynacl from 1.6.1 to 1.6.2 in /scripts
Bumps [pynacl](https://github.com/pyca/pynacl) from 1.6.1 to 1.6.2.
- [Changelog](https://github.com/pyca/pynacl/blob/main/CHANGELOG.rst)
- [Commits](https://github.com/pyca/pynacl/compare/1.6.1...1.6.2)

---
updated-dependencies:
- dependency-name: pynacl
  dependency-version: 1.6.2
  dependency-type: indirect
...

Signed-off-by: dependabot[bot] <support@github.com>
2026-01-06 19:05:54 +00:00
Mike Szczys
06d5728d07 twister: fix --keep-artifacts
use the allow-list generated by --keep-artifacts whenever
cleanup_artifacts() is called. This resolves an issue where this allow-list
was not being honored when using the --prep-artifacts-for-testing flag.

Signed-off-by: Mike Szczys <mike@golioth.io>
2026-01-06 11:18:11 -05:00
Guðni Már Gilbert
28fe8d5c87 scripts: tests: twister: mock listed serial port
Reduce the test time by ~300 seconds by mocking the listed serial port

Result from running:
pytest --durations=0 ./scripts/tests/twister/test_handlers.py

Before:
60.12s test_devicehandler_handle[valid pty]
60.12s test_devicehandler_handle[communicate timeout]
60.06s test_devicehandler_handle[popen called process error]
60.05s test_devicehandler_handle[valid dev]
60.03s test_devicehandler_handle[nonzero returncode]
0.01s  test_devicehandler_handle[create serial failure]

After:
0.01s test_devicehandler_handle[valid dev]
0.01s test_devicehandler_handle[valid pty]
0.01s test_devicehandler_handle[nonzero returncode]
0.01s test_devicehandler_handle[create serial failure]
0.01s test_devicehandler_handle[communicate timeout]
0.01s test_devicehandler_handle[popen called process error]

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2026-01-06 16:07:24 +00:00
TOKITA Hiroshi
96b9b0f2df soc: raspberrypi: rpi_pico: Add support RpiPico binary info feature
Binary Info embeds program meta information in flash,
which can be viewed with RaspberryPi Pico's `picotool`.

Metadata is automatically collected from pinctrl.

It can be override by the Kconfig configurations, such as

```
CONFIG_RPI_PICO_BINARY_INFO_OVERRIDE_PROGRAM_NAME="my program name"
```

When this feature is enabled, pinctrl groups are restricted to
consisting of pins with a single rpi_pico function.
In other words, SPI's MISO and MOSI can be in the same group,
but I2C's SDA cannot be included in this group.
This is rarely an issue in normal use,
and can be resolved by dividing them into separate groups.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2026-01-06 16:07:16 +00:00
TOKITA Hiroshi
e8a35bc567 modules: hal_rpi_pico: Make PICO_NO_BINARY_INFO configurable
Use the definition of PICO_NO_BINARY_INFO if it already exists,
set it as 1 if not so.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2026-01-06 16:07:16 +00:00
TOKITA Hiroshi
1e6fe9ffda modules: hal_rpi_pico: add includes that referenced by binary info
The binary info feature references `boot_stage2` and `pico_binary_info`.
Add these to include dirs.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2026-01-06 16:07:16 +00:00
Robyn Milas
ebfd777b2c drivers: spi: stm32 fix bug on empty tx
When transceive is called on a chip without CONFIG_SPI_STM32_INTERRUPT,
spi_stm32_shift_frames was called even if there was no transfer ongoing.
This lead to an unwanted SPI transfer shifting the whole connection,
causing drivers to malfunction.
Fix it by replacing the do-while loop with a while loop.

Signed-off-by: Robyn Milas <robyn.milas@valotec.com>
2026-01-06 16:06:41 +00:00
Jamie McCrae
914ac2dc05 west.yml: MCUboot synchronization from upstream
Update Zephyr fork of MCUboot to revision:
  9ac72969f281491d677e669d053281fc2d538ed4

Brings following Zephyr relevant fixes:

  - 9ac72969 boot: bootutil: loader: Fix bootstrap copying in
    swap move mode
  - 3f69203f bootutil: ed25519 psa: Merge bootutil_verify_sig and
    bootutil_verify
  - 7f354916 bootutil: Remove bootutil_verify_img
  - 7cec4af1 bootutil: Replace bootutil_verify_img with
    bootutil_verify_sig
  - 4a57d03d boot: zephyr: socs: stm32h7s3xx: Add support for
    ext_flash_app variant
  - a21fd276 bootutil: Small logging improvements
  - 0acc9806 bootutil: boot_read_enc_key now returns boolean
  - 553be8b0 readme: Update for next dev release
  - eecc3f7d Release v2.3.0

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2026-01-06 16:06:22 +00:00
Daniel Schaefer
efcb2f081d boards: framework: Add framework_laptop16_keyboard
The following examples build and work as expected.

Blink backlight using PWM on white backlight keyboard or numpad:
> west build -p -b framework_laptop16_keyboard samples/basic/blinky_pwm

Blink capslock on keyboard (not numpad or macropad):
> west build -p -b framework_laptop16_keyboard samples/basic/blinky_pwm

> west build -p -b framework_laptop16_keyboard samples/subsys/usb/console
> west build -p -b framework_laptop16_keyboard samples/subsys/usb/cdc_acm
> west build -p -b framework_laptop16_keyboard samples/drivers/adc/adc_dt

Signed-off-by: Daniel Schaefer <dhs@frame.work>
2026-01-06 16:06:14 +00:00
Daniel Schaefer
33d671b205 dts: bindings: vendor-prefixes: Add Framework Computer, Inc.
Add Framework Computer Inc

Signed-off-by: Daniel Schaefer <dhs@frame.work>
2026-01-06 16:06:14 +00:00
Jonas Berg
82b25849e4 samples: servo-motor: Add overlay for Cytron Motion 2350 Pro
Enabled servo port GP0. Added commented-out entries for the other ports,
as is done for the other overlay files.

Signed-off-by: Jonas Berg <jonas.s.t.berg@gmail.com>
2026-01-06 16:05:55 +00:00
Jonas Berg
eeff32644d boards: Add support for Cytron Motion 2350 Pro
Tested with the commands mentioned in index.rst

Product photo from https://www.cytron.io/p-motion-2350-pro

Signed-off-by: Jonas Berg <jonas.s.t.berg@gmail.com>
2026-01-06 16:05:55 +00:00
Thamaraimanalan M
450096dc77 scripts: check_compliance: fix broken URL in ruff compliance error
Add a trailing space to the Ruff error message string in the compliance
checking script. Previously, the error message concatenated the URL and
the description with a colon (e.g., ".../unsorted-imports:Import").
This caused the terminal to interpret the description as part of the URL,
resulting in a 404 error when clicked.

Signed-off-by: Thamaraimanalan M <devthamaraimanalan.m@gmail.com>
2026-01-06 16:04:24 +00:00
Michele Sardo
1ce6a26f70 debug: stack: include kernel.h for k_thread API usage
The debug/stack.h header uses k_thread types and APIs such as
struct k_thread, k_thread_stack_space_get(), and k_thread_name_get(),
but does not include <zephyr/kernel.h>.

This makes the header rely on transitive includes, which can lead to
build failures depending on include order.

Add an explicit include of <zephyr/kernel.h> to make the header
self-contained.

Signed-off-by: Michele Sardo <msmttchr@gmail.com>
2026-01-06 16:04:15 +00:00
Alberto Escolar Piedras
60285318c9 soc: native: Remove old note from kconfig option
Since e150ffb92c, Zephyr only really
supports native_simulator based targets when building native/posix
arch based targets.
So this comment is not relevant anymore. Let's remove it.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2026-01-06 16:04:03 +00:00
Daniel Fladerer
a4f75ba4bd drivers: serial: uart_mcux_iuart: Adjust FIFO fill behavior for TX
Until now transmission FIFO was not used.
With this chamge the FIFO will be filled up, until it is full.

Signed-off-by: Daniel Fladerer <d.fladerer@gmx.de>
2026-01-06 13:37:54 +00:00
Peter Mitsis
6b00cf20d9 doc: Note that SMP and UP thread ordering differs
Adds a short section explaining how thread ordering between UP and
SMP systems differ.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2026-01-06 13:37:46 +00:00
Peter Mitsis
56821d75a6 doc: Update time slicing image
Updates the time slicing image in the associated documentation to ...

1. Show the resetting of a time slice after scheduling a new thread
2. Indicate that it is specific for UP scheduler

It also adds a note to the documentation describing how the ordering
of the threads would change with the SMP scheduler.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2026-01-06 13:37:46 +00:00
Benedek Kupper
4305403fd2 drivers: dma: stm32: the source and destination sizes must only match in v1
Commit e7f222a fixed the bug where a data size mismatch produces unexpected
behavior with the DMA on V1 devices. However, this limitation is only valid
for the STM32 series with V1 DMA, V2 doesn't have this. The STM32CubeMX
configuration tool correctly implements this limitation in the UI,
it is a good way to cross-check.

Signed-off-by: Benedek Kupper <kupper.benedek@gmail.com>
2026-01-06 13:37:31 +00:00
Ha Duong Quang
e170033a63 tests: drivers: pwm: enable pwm test for s32k5
Enable api and looback test for S32K5 PWM(eMIOS)

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2026-01-06 13:37:15 +00:00
Ha Duong Quang
81de86f9e7 dts: arm: nxp: add emios devicetree nodes for s32k5
Add devicetree node of emios instances for s32k566.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2026-01-06 13:37:15 +00:00
Ha Duong Quang
3db533ae91 drivers: pwm: add support pwm(emios) for s32k5
Add support PWM(eMIOS) for S32K5

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2026-01-06 13:37:15 +00:00
Ha Duong Quang
31a0ffda03 drivers: misc: add global timebase reference property
Add property to enable eMIOS instances to reference a global timebase
provider, either from itself or another eMIOS instance, enabling
synchronized timing operations across multiple instances.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2026-01-06 13:37:15 +00:00
Stefan Gloor
872f20ab21 doc: develop: add 'which' to Arch Linux dependencies
The setup.sh script of the Zephyr SDK runs "which cmake"
to find out whether CMake and wget are installed:
71df6c27da/scripts/template_setup_posix (L43)

"which" is not installed by default on Arch Linux,
so the check will fail and the script will yield:

Zephyr SDK setup requires 'cmake' to be installed
and available in the PATH.
Please install 'cmake and run this script again.

Although CMake is already installed.
Fix this by adding "which" to the list of dependencies.

Signed-off-by: Stefan Gloor <code@stefan-gloor.ch>
2026-01-06 13:36:56 +00:00
Mathieu Choplain
219cdf756a boards: arm: use zephyr:board-supported-hw
Replace legacy hand-mantained tables with the new directive that generates
a table automatically based on platform device tree.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2026-01-06 13:36:30 +00:00
TOKITA Hiroshi
a0184867c4 boards: raspberrypi: rpi_5: Use normalized name
Rename the file to rpi_5_bcm2712... based on the normalized name.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2026-01-06 13:36:03 +00:00
Pavel Vasilyev
2b4bbb9a2f doc: releases: migration-guide: 4.4: remove extra backtick
This fixes compliance check by removing extra backtick.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2026-01-06 13:35:51 +00:00
Florian Depraz
7963b69fa4 dts: stm32u073: Add LPUART3 configuration
See rm0503-stm32u0 manual:
- Bit 12 LPUART3RST: LPUART3 reset
- Bit 12 LPUART3EN: LPUART3 clock enable
- Bit 1 LPUART3 (SYSCFG_ITLINE30)

Signed-off-by: Florian Depraz <florian.depraz@alumni.epfl.ch>
2026-01-06 10:43:04 +01:00
Xudong Zheng
9d9a8efab2 entropy: rpi_pico: implement entropy driver for RP2350
Use get_rand_64() from Pico SDK for entropy.

Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
2026-01-06 10:39:38 +01:00
Lyle Zhu
0c3239f0c9 bluetooth: Classic: hfp_hf: make at_get_string() return const char *
Change at_get_string() return type to 'const char *'. Correspondingly,
change string parameters in HFP HF callbacks and related functions
from 'char *' to 'const char *' to reflect that these strings are
read-only data returned from AT command parsing.

- Update bt_hfp_hf_cb callback signatures for clip, operator,
  call_waiting, and textual_representation
- Update at_get_string() return type to 'const char *'
- Update local variables in hfp_hf.c handlers to use 'const char *'
- Update shell callback implementations to match new signatures
- Change NULL check style from '!text' to 'text == NULL' for consistency
- Remove unnecessary initialization of 'number' variable in clcc_handle

This improves const-correctness and prevents accidental modification
of AT command response strings.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2026-01-06 10:35:28 +01:00
Zhaoxiang Jin
edd9242050 tests: power_mgmt_soc: enable test for mcx_n5xx_evk_mcxn547_cpu0
enable power_mgmt_soc test for NXP mcx_n5xx_evk_mcxn547_cpu0 board.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-01-06 10:34:18 +01:00
Zhaoxiang Jin
048b3d8fd0 soc: nxp/mcxn: Add power management support for MCXN547
Add power management support for MCXN/MCXN547.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-01-06 10:34:18 +01:00
Zhaoxiang Jin
0403154324 dts: arm: nxp: mcxn: Add power state nodes for mcxnx4x
1. Add power state nodes for mcxnx4x soc dtsi, including
sleep, deepsleep and powerdown.

2. Add power management related peripheral nodes
for mcxnx4x soc dtsi, including spc, cmc, vbat and wuu.

3. Add 'zephyr,cortex-m-idle-timer' node in mcx_nx4x_evk_cpu0.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-01-06 10:34:18 +01:00
Zhaoxiang Jin
abc6b61914 boards/nxp: mcxn: Enable LPUART pin internal pullup resistor
This commit enables mcx_nx4x_evk LPUART pin internal pullup resistor.
For MCXN547, during LPUAR initialization, the RX pin is pulled down
internally and STAT[RAF] is set to one. In this state, attempting to
enter low power mode will trigger LPACK reset and therefore cannot
truly enter low power mode. The correct setting should be to enable
LPUART pin internal pullup resistor.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-01-06 10:34:18 +01:00
Kyle Bonnici
9f7e4bfafa Tests: Rename DTC_OVERLAY_FILE files to .overlay
This PR renames DTC_OVERLAY_FILE from .dts to .overlay

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2026-01-06 10:34:08 +01:00
Kyle Bonnici
5cc1179bcd Boards: Rename non .dts file to .dtsi
Include files should be named .dtsi and not .dts

This PR renames the .dts files that are:
- Not board files
- Included by other dts/dtsi files
- Aligns the #include to use the .dtsi

This PR also deletes `boards/mediatek/mt8186/afe-mt8186.dts` as this is
not included by any file and is clearly not a board file.

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2026-01-06 10:34:08 +01:00
Michał Stasiak
9640c41936 Revert "drivers: i2s: nrf_tdm: fix application of buffer size workaround"
This reverts commit e37b89f0b4.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2026-01-06 10:32:52 +01:00
Merin George
515948a9a2 Kconfig: fix the define to disable SysTick when LP timer is enabled
Fix the Kconfig dependency for CYW20829 so that enabling the
low-power system timer automatically disables the Cortext-M SysTick

Signed-off-by: Merin George <merin.george@infineon.com>
2026-01-06 10:32:40 +01:00
Merin George
88a40ab6df drivers: flash: cyw920829 configuration moved from driver to boards
- Flash configuration was previously done in the driver selected by
   Kconfig. Instead move flash configuration to the board removing
   the need for ifdefs in the driver. This will allow boards to
   configure specifics related to the on board (not part of the SoC)
   flash.

Signed-off-by: Merin George <merin.george@infineon.com>
2026-01-06 10:32:40 +01:00
Victor Brzeski
20d130f2c2 drivers: i2s: nrf_tdm: resolve race between drop/start commands
The current "drop" command stops i2s asynchronously as the peripheral
produces/consumes up to MAXCNT. When complete, the IRQ STOPPED event
will free memory and disable the peripheral. However, when triggering
a "start" command before this completes, the internal state variables
are cleared and we leak application memory.

Signed-off-by: Victor Brzeski <vbrzeski@gmail.com>
2026-01-06 10:30:46 +01:00
Victor Brzeski
bdf9ec48d2 drivers: i2s: delete dead code in IRQ handler
The nRF TDM Driver has a bitfield containing the TDM events it has
already processed. This variable is unused, delete it.

Signed-off-by: Victor Brzeski <vbrzeski@gmail.com>
2026-01-06 10:30:46 +01:00
Pieter De Gendt
e81bacd361 scripts: west_commands: Extend ruff config in pyproject.toml
Now that the west_commands directory has a pyproject.toml configuration
file, it should consider local packages for first party imports.

Make sure the top-level ruff config is extended, and fix some import
sorting.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2026-01-06 10:30:32 +01:00
Victor Brzeski
5a5f0a6e8b drivers: clock_control: nrf2: improve audiopll clock calculations
Improve the Audio PLL clock frequency calculations to provide a more
accurate clock frequency.

Signed-off-by: Victor Brzeski <vbrzeski@gmail.com>
2026-01-06 10:30:15 +01:00
Emil Gydesen
1de27b1f2c tests: Bluetooth: BAP: Test bt_bap_ep_get_conn in BSIM
Add steps in the BAP tests to verify the correctness of
bt_bap_ep_get_conn.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2026-01-06 10:29:40 +01:00
Emil Gydesen
bf37ec10cb doc: releases: Add entry for bt_bap_ep_get_conn
Add entry for the new function bt_bap_ep_get_conn.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2026-01-06 10:29:40 +01:00
Emil Gydesen
59a1c6e0de Bluetooth: BAP: Add bt_bap_ep_get_conn
Add a new function, bt_bap_ep_get_conn, which returns
the ACL connection for the endpoint. This works because
endpoints are specific to an ACL in BAP. The function
returns a pointer with a new reference similar to the
lookup functions from conn.h

The conn pointer was not added to the bt_bap_ep_info
struct, as doing so would be more likely to cause
reference leaks if the caller did not care about the
conn pointer when using bt_bap_ep_get_info. It can be
added later if that is requested.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2026-01-06 10:29:40 +01:00
Emil Gydesen
e9f8d73049 tests: Bluetooth: BAP: BA: Update conn params for PAST
When using PAST, it is best not to use an ACL that is a multiple
of the PA or ISO interval to avoid overlaps.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2026-01-06 10:29:22 +01:00
Emil Gydesen
be9ea4625e tests: Bluetooth: BAP: BSIM: SD/BA: Fix/add some print statements
Modify and add some printk statements for the tests, as some were
missing the newline.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2026-01-06 10:29:22 +01:00
Emil Gydesen
85b8852980 samples: Bluetooth: BA: Read receive states on connection
Once the BASS has been discovered, the sample will now attempt
to read all the receive states on the remote device.

The receive states will only be logged, and the sample will
not (yet) perform any logic on them (to e.g. determiner whether
it needs to perform a remove source operation before the add
source, or perform a modify source). That behavior is postponed
to a future commit, as the purpose of this is to showcase
reading the receive states.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2026-01-06 10:29:22 +01:00
Emil Gydesen
f4e14dfb24 Bluetooth: BAP: BA: Refactor discover to not do read
Refactor the bt_bap_broadcast_assistant_discover function
to not read receives at the end of discovery.
This makes the function more true to what it is supposed to
do, and significantly reduces the complexity of the
procedure and the read callback.

Users will be required to, if wanted, to read the
receive state themselves with the existing
bt_bap_broadcast_assistant_read_recv_state.

The start_offset had to be modified to avoid issues with
PA sync.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2026-01-06 10:29:22 +01:00
Emil Gydesen
f3b63a1bd6 Bluetooth: CCP: Server: Add support for get UCI
Add support for getting the UCI.
For now the UCI will be duplicated by the TBS
implementation, but will be optimizied in the future
so only one copy of the UCI exists.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2026-01-06 10:28:23 +01:00
Nick Brook
24dc151e5d doc: Correct grammar in board revision documentation
Correct grammar in board revision documentation

Signed-off-by: Nick Brook <nrbrook@gmail.com>
2026-01-05 23:39:46 +01:00
Nick Brook
b95b778530 doc: Add concrete board revision usage with qualifiers
The existing documentation was not explicit on how qualifiers should be
combined with board revisions. This commit makes it explicit and adds a
concrete example.

Signed-off-by: Nick Brook <nrbrook@gmail.com>
2026-01-05 23:39:46 +01:00
Khoa Nguyen
f8d40c2545 boards: renesas: Migrate to use ext-ram instead of sdram.ld
- Update dts to ext-ram since section allocation is updated
in the display driver
- Move the Display, LVGL config definitions from board layer
to shield layer
- Update the LVGL config value to match the new SDRAM allocation
- Remove sdram.ld in the board layer for all Renesas boards
- Update .conf overlay for Renesas devices in display_read_write

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2026-01-05 23:39:13 +01:00
Khoa Nguyen
b3136da487 boards: shields: rtkmipilcdb00000be: Update default LVGL config
Update default value for LVGL config

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2026-01-05 23:39:13 +01:00
Khoa Nguyen
1a047270da drivers: display: Migrate to use generic linker sections for Renesas
Migrate to use generic linker sections for Renesas display driver

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2026-01-05 23:39:13 +01:00
Liam Ogletree
7b9e270831 tests: build_all: Add CS40L5x haptics driver to haptics build test
Adds CS40L5x haptics driver to haptics build test. Adds dummy GPIO,
which is required for CS40L5x's reset-gpio property.

Signed-off-by: Liam Ogletree <liam.ogletree@cirrus.com>
2026-01-05 23:38:24 +01:00
Liam Ogletree
1b61011e44 samples: cs40l5x: Add sample application for CS40L5x haptics driver
Adds a sample application for the CS40L5x haptics driver. This PR
provides a custom shell interface to expose most of the CS40L5x-specific
API functions; basic demonstrations of other functions are provided.

Signed-off-by: Liam Ogletree <liam.ogletree@cirrus.com>
2026-01-05 23:38:24 +01:00
Liam Ogletree
bb8381d2bf drivers: haptics: Add support for CS40L5x haptic driver
CS40L5x is a family (CS40L50/51/52/53) of haptics drivers designed
for trackpads, tablets, and automotive applications.

This PR provides basic functionality for ROM features and serves
as a starting point for the upstream driver. Notably, RAM firmware,
SPI,  and certain CS40L51/52 features (e.g., diagnostics,
closed-loop algorithms) are excluded from this PR.

Tested with internal/external boost configurations. Tested I2C.
Tested all ROM features with each device variant (50/51/52/53),
including ROM playback, "buzz" playback and configuration, custom
haptics playback and configuration, trigger playback and configuration,
runtime haptics logging, and gain configuration.

Signed-off-by: Liam Ogletree <liam.ogletree@cirrus.com>
2026-01-05 23:38:24 +01:00
Bill Waters
5b6ec7a6ee soc: infineon: add pse84 power management
Add power management support for the Infineon PSE84 device

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2026-01-05 23:37:50 +01:00
Thamaraimanalan M
17b583f83c boards: rpi_5: update doc to include 1GB, 2GB, and 16GB variants
The Raspberry Pi 5 product line has expanded since launch. The current
documentation only lists the original 4GB and 8GB models. This commit
updates the board documentation to include the missing variants.

Signed-off-by: Thamaraimanalan M <devthamaraimanalan.m@gmail.com>
2026-01-05 21:42:57 +01:00
Cezar Burlacu
8af187eeff dts: arm: st: fix stm32h523/33Xe sram2/3 addresses
stm32h523/33Xe devices have different addresses than stm32h562/72/73xx
(RM0481 fig. 21).

Tested on a custom board with stm32h523cet6 where the board crashed when
accessing sram3.

Signed-off-by: Cezar Burlacu <cezar@embeddedp.ro>
2026-01-05 21:42:26 +01:00
Tom Burdick
e9fc413688 boards: kit_pse84_eval: Documentation fixes
A few fixes to the PSOC Edge 84 Eval kit documentation by re-using
Zephyr sphinx commands.

Adds a very critical note that a switch hidden under and LCD needs to
be flipped before you can successfully program the board.

Signed-off-by: Tom Burdick <thomas.burdick@infineon.com>
2026-01-05 21:41:58 +01:00
Henrik Brix Andersen
141e6f1a27 doc: update copyright notice in the documentation
Update copyright notice to reflect current year.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2026-01-05 17:17:34 +00:00
Fabio Baltieri
99d5823956 samples: net: bridge: check for eth_bridge_iface_add errors
Check for errors on eth_bridge_iface_add, these can add if, for example,
an interface does not support promisc mode.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2026-01-05 17:17:12 +00:00
Fabrice DJIATSA
4588f22892 tests: drivers: pwm: pwm_api: add support for nucleo_wb09ke
Assign the pwm2 node to the require pwm-test alias.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-01-05 17:17:01 +00:00
Fabrice DJIATSA
e29521087a tests: drivers: counter_basic_api: add support for nucleo_wb09ke
Enable all timer and counter nodes.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-01-05 17:17:01 +00:00
Fabrice DJIATSA
4727415b25 dts: arm: st: wb0: add support for timer kernel clock
PR #93198 introduced the support for the timer kernel
clock for most STM32 series.

it was missing for STM32WB0 serie.

These changes are required for the related timer tests/samples
to pass.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-01-05 17:17:01 +00:00
Fabrice DJIATSA
4d6eaa6f63 drivers: flash: wb0x: update function to get flash size
For STM32WB0x series, LL_GetFlashSize returns the flash size in words,
not bytes. The previous implementation incorrectly interpreted this
value, leading to a large discrepancy between the expected size (512 KB)
and the computed size (64 MB) in the test_get_size ztest.

This change updates the logic to correctly compute the flash size in
bytes, ensuring accurate results in size-related operations.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-01-05 17:17:01 +00:00
Fabrice DJIATSA
d4d3c0f998 tests: drivers: rtc: rtc_api: add support for nucleo_wb09ke
add node alias for RTC and enable RTC alarm and calibration.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-01-05 17:17:01 +00:00
Fabrice DJIATSA
dfff4162ae tests: boot: add support for nucleo_wb09ke
- update board dts flash0 node to match the layout required
  for the SWAP USING OFFSET algorithm.
- Update related test/sample yaml files to enable CI testing

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-01-05 17:17:01 +00:00
Fabrice DJIATSA
f7262a5656 tests: drivers: spi: spi_loopback: add support for nucleo_wb09ke
Enable DMA in the overlay file and set the appropriate transfer
duration in the conf file

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-01-05 17:17:01 +00:00
Camille BAUD
78f6b8dcb7 drivers: display: clean up ssd1306
clean up and improve ssd1306 driver code

Signed-off-by: Camille BAUD <mail@massdriver.space>
2026-01-05 17:16:45 +00:00
Camille BAUD
b350791855 drivers: display: Improve SSD1306 error handling and reporting
returning -1 doesn't constitute proper error reporting.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2026-01-05 17:16:45 +00:00
Ibrahim Abdalkader
ca6aed203c drivers: sdhc: stm32: skip semaphore wait on HAL error
When HAL_SDIO_WriteExtended_DMA or HAL_SDIO_ReadExtended_DMA returns
an error, interrupts are not enabled so the semaphore would never be
given, and it will always timeout.

Some drivers expect certain functions to fail during normal operation.
For example, WHD calls whd_kso_enable during sleep/wakeup cycles which
can fail. This would waste 200ms (CONFIG_SD_CMD_TIMEOUT default) on
every such failure.

Signed-off-by: Ibrahim Abdalkader <i.abdalkader@gmail.com>
2026-01-05 17:16:36 +00:00
CHEN Xing
35f03c3415 boards: microchip: sam: sama7g54_ek: enable hwinfo support
Enable hwinfo support for sama7g54_ek board

Signed-off-by: CHEN Xing <xing.chen@microchip.com>
2026-01-05 17:16:25 +00:00
CHEN Xing
b2581a29bb dts: arm: microchip: sam: add otpc device to sama7g5
Add otpc device, used by hwinfo driver

Signed-off-by: CHEN Xing <xing.chen@microchip.com>
2026-01-05 17:16:25 +00:00
CHEN Xing
4fa82d086e soc: microchip: sam: sama7g5: update mmu for otpc
Update mmu region for otpc

Signed-off-by: CHEN Xing <xing.chen@microchip.com>
2026-01-05 17:16:25 +00:00
Martin Meyer
95b0c72bf2 drivers: sensor: ti: opt300x: extend support to otp3004 sensors
The ti,opt3004 ambient light sensor is having same I2C interface
as ti,opt3001.

Signed-off-by: Martin Meyer <meyer.m90@gmail.com>
2026-01-05 17:16:13 +00:00
Christoffer Gjedsted Brask
f8dba1baee doc: zbus: clarify observer priority, fixed spelling and grammar
Changed the parameter description for _observers in ZBUS_CHAN_DEFINE and
ZBUS_CHAN_DEFINE_WITH_ID. The original description was hard to interpret
and appeared to be split by "@see struct zbus_channel".

Fixed several spelling and grammar issues.

Signed-off-by: Christoffer Gjedsted Brask <cgb@develco.dk>
2026-01-05 16:07:31 +01:00
Gaetan Perrot
92607b3bf8 drivers: modem: hl78xx: hl78xx_cfg: fix APN NULL check
hl78xx_set_apn_internal() was calling strlen(apn) before checking
the APN pointer against NULL, making the defensive check
ineffective.

Reorder the code so the NULL check is performed before dereferencing
the APN pointer.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2026-01-05 16:07:15 +01:00
Zhaoxiang Jin
4ddcd4bf3c doc: releases: update LPCMP deprecation notes for 4.4
Simplified the LPCMP driver migration notes by removing outdated
information about the devicetree compatible renaming. The compatible
nxp,lpcmp is now shared between both the sensor API-based and
comparator API-based LPCMP drivers, so the previous note about
renaming to nxp,sensor-lpcmp is no longer accurate.

Moved the comparator API-based LPCMP driver information to the
'New Drivers' directory.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-01-05 16:06:37 +01:00
Zhaoxiang Jin
510253d12a drivers: sensor: mcux_lpcmp: Removed redundant help information
Removed redundant help information

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-01-05 16:06:37 +01:00
Zhaoxiang Jin
af536abe7d dts: drivers: remove nxp,sensor-lpcmp.yaml
1. Removed nxp,sensor-lpcmp.yaml and merged its
properties into nxp,lpcmp.yaml. Now a single
dt-binding (compatible: nxp,lpcmp) is shared
by two drivers: the sensor API-based LPCMP
driver and the comparator API-based LPCMP driver.

2. Updated the driver and samples accordingly.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2026-01-05 16:06:37 +01:00
Andy Lin
8558b935b1 coredump: arm: Callee registers for armv6-m and v8-m baseline
Ensure callee registers included in coredump.
Push callee registers onto stack for
CONFIG_ARMV6_M_ARMV8_M_BASELINE as well
when CONFIG_EXTRA_EXCEPTION_INFO enabled.

Effectively a complement to df6b8c3 by mholden.

Signed-off-by: Andy Lin <andylinpersonal@gmail.com>
2026-01-05 16:06:19 +01:00
Florian Mahon
8893c3f964 boards: rpi_pico2: doc: Add Wi-Fi firmware blob setup instructions
Add missing documentation for the required Wi-Fi firmware blob download
step when building for the Pico 2W variant (rpi_pico2/rp2350a/m33/w).

The Infineon CYW43439 Wi-Fi chip requires proprietary firmware files
that must be fetched before building. Without this step, users
encounter CMake errors about missing firmware files.

Added a new section explaining:
 - The requirement to run 'west blobs fetch hal_infineon'
 - What files are downloaded (43439A0.bin and 43439A0.clm_blob)
 - That this only needs to be done once per workspace

 This resolves a common issue where new users following the
 documentation cannot build Wi-Fi applications successfully.

Signed-off-by: Florian Mahon <florian.mahon@gmail.com>
2026-01-05 13:55:32 +01:00
Fabrice DJIATSA
a5bbbeea9a tests: boot: update testcase.yaml files
Add the stm32l562e_dk board as an allowed platform to
execute tests in CI.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-01-05 11:39:55 +01:00
Fabrice DJIATSA
58b6187510 boards: st: stm32l562e_dk: update flash0 node
Swap using offset requires that slot1 has one extra sector
size compared to slot0.

These changes are necessary to execute MCUboot tests and fix
issues detected in common flash test drivers.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2026-01-05 11:39:55 +01:00
Benjamin Cabé
f9fdd9fc50 include: dac: add doxygen docs for dac161s997 extended API
Adds doxygen documentation for the extended API of the TI DAC161S997
driver.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2026-01-05 11:38:41 +01:00
Benjamin Cabé
213c0cd98c include: dac: add doxygen group for device-specific DAC API extensions
Similar to how it's done for other driver classes, create a new doxygen
group to put all device-specific DAC API extensions under.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2026-01-05 11:38:41 +01:00
Jan Behrens
01fc126473 drivers: counter: stepper: test: Added RPI Pico PIT to existing tests
Added the RPI Pico PIT driver to the counter_basic_api test suite.

Signed-off-by: Jan Behrens <jan.behrens@navimatix.de>
2026-01-05 11:38:13 +01:00
Jan Behrens
47b988c8dc drivers: counter: test: Added RPI Pico PIT tests
Added a test suite for the RPI Pico PIT driver that tests both
functionality and erroneus inputs.

Signed-off-by: Jan Behrens <jan.behrens@navimatix.de>
2026-01-05 11:38:13 +01:00
Jan Behrens
2f654b6e14 drivers: counter: Added RPI Pico PIT counter driver
Added a counter driver for the RPI Pico/RP2040 that implements
programmable interval timer (PIT) functionality using the PWM HAL.

Signed-off-by: Jan Behrens <jan.behrens@navimatix.de>
2026-01-05 11:38:13 +01:00
Thomas Stranger
7eb623c035 github: dependabot: configure cooldown time for updates
This will delay non security dependabot updates to packages,
giving automated tools and researchers more time to catch updates
with malicious intent, thus reducing the supply chain security risks.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2026-01-05 09:21:03 +01:00
Holt Sun
f18be66783 boards: lpcxpresso55s28: add CRC peripheral support
Add CRC hardware peripheral support to NXP LPC55S2X SoC family and
enable it on the lpcxpresso55s28 board

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2026-01-05 09:20:40 +01:00
Holt Sun
ed2fc81d4b drivers: crc: add NXP LPC CRC driver
Add CRC driver implementation for NXP LPC microcontrollers.

The driver supports:
- CRC-CCITT, CRC-16, and CRC-32 IEEE polynomials
- Configurable input/output bit reversal
- Seed value configuration
- Thread-safe operation with semaphore locking
- Streaming CRC calculation via begin/update/finish API

Hardware limitations:
- Processes data in 8-bit chunks internally
- 32-bit writes require 4 cycles (8-bit × 4)
- Supports back-to-back writes of 8/16/32-bit width

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2026-01-05 09:20:40 +01:00
Holt Sun
0b897874bb dts: bindings: crc: add NXP LPC CRC binding
Add devicetree binding for the NXP LPC CRC controller
(compatible "nxp,lpc-crc") with required reg property.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2026-01-05 09:20:40 +01:00
Holt Sun
bce0b1a72c modules: hal_nxp: mcux: enable LPC CRC driver component
Enable lpc crc driver for zephyr crc driver.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2026-01-05 09:20:40 +01:00
Johnny Chuang
0e051f7c2b board: add '32f967_dv' development board (minimal build support)
Minimal board definition for the Elan em32f967 SOC:
- Includes DTS, YAML, and Kconfig files
- Provides board.cmake with misc-flasher for CI/build
- Actual flashing is not included in this PR

Signed-off-by: Johnny Chuang <johnny.chuang@emc.com.tw>
2026-01-05 09:18:40 +01:00
Johnny Chuang
7e45f351c5 soc: add Elan em32f967 minimal SoC support
Add initial support for the Elan em32f967 SoC based on ARM Cortex-M4.
Minimal SoC definition for upstream:
- soc.h, Kconfig, and CMakeLists.txt provided for completeness
- This PR does not implement drivers or UART functionality

Signed-off-by: Johnny Chuang <johnny.chuang@emc.com.tw>
2026-01-05 09:18:40 +01:00
Johnny Chuang
6f0e2acf1e dt-bindings: elan em32f967 – clock, gpio, pinctrl, pwm
Add minimal DT binding headers and matching YAML files for the
Elan em32f967 SoC. The new definitions are required to build the
sample board and follow the upstream style.

Signed-off-by: Johnny Chuang <johnny.chuang@emc.com.tw>
2026-01-05 09:18:40 +01:00
Thinh Le Cong
23892b038f drivers: serial: fix IAR warning Pe1072 about declaration after a label
Fix Pe1072 warning (declaration after case label) by wrapping with braces

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2026-01-04 14:11:51 +01:00
Ayush Singh
9d9529f0db doc: develop: manifest: external: Add greybus
Add documentation for Greybus Zephyr implementation. The RFC [0] goes into
more detail regarding Greybus and it's current status.

[0]: https://github.com/zephyrproject-rtos/zephyr/issues/98259

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2026-01-03 13:09:36 +01:00
Alberto Escolar Piedras
e90135eb0c arch: posix: cmake: Minor clarifications
Minor improvements in this cmake:
Add a comment to clarify why we set one option, and move an if
into an else with a comment of what is doing.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2026-01-03 10:20:34 +01:00
Alberto Escolar Piedras
6f427044dd arch: posix: cmake: Remove unnecessary line
This variable is not set to anything.
This line has always been just bogus.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2026-01-03 10:20:34 +01:00
Gaetan Perrot
dab667f51c drivers: clock_control: renesas_ra_cgc: fix API name typo
Fix a typo in the Renesas RA clock control API symbol name.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2026-01-03 10:20:24 +01:00
Gaetan Perrot
15eb2ee314 drivers: clock_control: renesas_ra_cgc: fix NULL subsys handling
Fix unsafe handling of the clock control subsystem pointer.

The subsystem argument was cast before being validated, which could
lead to invalid memory access when NULL is passed.

Rework the on/off callbacks to validate the subsystem pointer before
casting it, drop unnecessary device checks, and mark the device
argument as unused.

Also simplify get_rate() validation by checking only the rate
pointer.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2026-01-03 10:20:24 +01:00
Gaetan Perrot
0f59ae35d4 drivers: ethernet: eth_virtio_net: remove invalid NULL check
Remove a NULL check on the device pointer that occurs after the
pointer has already been dereferenced.

This check can never be true and is therefore misleading.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2026-01-03 10:19:52 +01:00
Alberto Escolar Piedras
a2f45762f1 arch posix: cleanup NATIVE_APPLICATION support remnants
NO_POSIX_CHEATS was a macro used to avoid including the content of a
header (`posix_cheats.h`) which allowed building applications in the
POSIX architecture without the native simulator, avoiding collisions
between some embedded symbols and those from the host C library.

Support for this way of building, and this header and macro were
removed in e150ffb92c, but these users
were forgotten. This was harmless, but let's just clean it up now.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2026-01-03 10:19:34 +01:00
Daniel Leung
b82e352f58 boards: intel_adsp: ignore newlib tests in twister
Add newlib to ignore_tags so twister will no longer run newlib
tests. These platforms have memory mappings that are not quite
what newlib is expecting so malloc may sometimes fail or even
returns invalid addresses. Fixing it is not worth the effort
because:

() Zephyr SDK provides picolibc now and not newlib, and malloc
   works fine with picolibc.

() Downstream projects uses xcc/xt-clang as toolchains where
   their provided newlib are not multi-thread safe, and cannot
   be safely used under SMP environment.

So simply ignore any newlib tests as they are not really
providing any values on these platforms.

Fixes #100895

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2026-01-03 10:19:13 +01:00
Peter Mitsis
3affd0385e kernel: Fix race condition in z_time_slice()
Instead of directly calling the current thread-specific time slice
handler in z_time_slice(), we must call a saved copy of the handler
that was made when _sched_spinlock was still held. Otherwise there
is a small window of time where another CPU could change the handler
to NULL just before we call it.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2026-01-03 10:18:53 +01:00
Peter Mitsis
c4e2db088f kernel: Add check to k_sched_time_slice_set()
When k_sched_time_slice_set() is called, the current time slice
should not be reset if the current thread is using thread-grained
time slicing. This is to maintain consistency with the already
established idea that thread-grained time slicing takes precedence
over the system-wide time slice size `slice_ticks`.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2026-01-03 10:18:53 +01:00
Peter Mitsis
3a0784fe22 kernel: Update thread_is_sliceable()
This fixes several minor items related to the priority or importance
of checks in determining whether the thread can be time sliced.

A thread that is prevented from running can not be time sliced
regardless of whether it was configured for thread-grained
time slicing or not. Nor can the idle thread be time sliced.

If the thread is configured for thread-grained time slicing, then
do not bother with the preemptible or priority threshhold checks.
This maintains the same behavior, and just optimizes the checks.

If the thread is sliceable, we may as well return the size of the
tick slice since we are checking that information anyway. Thus, a
return value of zero (0) means that the thread is not sliceable,
and a value greater than zero (0) means that it is sliceable.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2026-01-03 10:18:53 +01:00
Peter Mitsis
d05d9454bf kernel: Remove superfluous thread_is_sliceable() call
Within z_sched_ipi() there is no need for the thread_is_sliceable()
test as z_time_slice() performs that check. Since as a result of this
thread_is_sliceable() is now only used within timeslicing.c, the
'static' keyword is applied to it.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2026-01-03 10:18:53 +01:00
Abderrahmane JARMOUNI
fe039cb07b drivers: flash: silabs: replace 'depends on DMA' with 'select'
When a driver requires the usage of a low level driver subsystem
(like SPI, I2C, DMA...), it shall enable it instead of depending on it.
Also, make DMA usage depend on its DT properties being defined.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2026-01-02 16:01:31 +00:00
Abderrahmane JARMOUNI
6d9ded6651 drivers: adc: silabs IADC: replace 'depends on DMA' with 'select'
When a driver requires the usage of a low level driver subsystem
(like SPI, I2C, DMA...), it shall enable it instead of depending on it.
Also, make DMA usage depend on its DT properties being defined.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2026-01-02 16:01:31 +00:00
Vinayak Kariappa Chettimada
321ffb786b tests: bsim: Bluetooth: Do not use the BT_ prefix
Do not use the BT_ prefix for definitions not provided by
the Bluetooth subsystem.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2026-01-02 16:01:26 +00:00
Vinayak Kariappa Chettimada
e78fe1dcdc samples: Bluetooth: Move harness and tags to common section
Move harness and tags to common section for observer and
broadcaster_multiple samples.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2026-01-02 16:01:26 +00:00
Vinayak Kariappa Chettimada
50b6842ee3 samples: Bluetooth: observer: Move Zephyr Controller Kconfigs
Move Zephyr Controller Kconfigs to overlay file.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2026-01-02 16:01:26 +00:00
Vinayak Kariappa Chettimada
a9b6024585 samples: Bluetooth: Broadcast multiple legacy and extended advertising
Update broadcaster_multiple sample to start multiple
advertising sets of type legacy and extended advertising.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2026-01-02 16:01:26 +00:00
Vinayak Kariappa Chettimada
eb109a274d Bluetooth: Controller: Fix missing chain pdu time reservation
Fix missing auxiliary chain pdu time reservation.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2026-01-02 16:01:26 +00:00
Vinayak Kariappa Chettimada
3baf507b97 Bluetooth: Controller: Tune aux offset calculation overhead assertion
Tune the aux offset calculation overhead assertion to use
EVENT_OVERHEAD_START_US; this is the correct maximum
overhead causing ISR latency for start of a radio event that
occurs thereafter.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2026-01-02 16:01:26 +00:00
Vinayak Kariappa Chettimada
bb5f3ff87d tests: bsim: Bluetooth: Enable similar Controller Kconfig features
Enable similar Controller Kconfig features between nRF52 and
nRF5340 BabbleSIM LE Audio testing.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2026-01-02 16:01:26 +00:00
Fabian Blatz
ad391c3447 boards: infineon: Correct uart compatible name
Correct the non-existing infineon,cat1-uart compatible string and pinctrl
for it.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2026-01-02 13:15:17 +00:00
Jamie McCrae
14fb2c0691 samples: mgmt: mcumgr: smp_svr: Fix shell-mgmt Kconfig conflict
Disables the shell serial backend in this Kconfig fragment to
prevent conflicting with the serial one

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2026-01-02 09:58:06 +00:00
Gaetan Perrot
aaa321569f drivers: gpio: infineon: remove redundant NULL check in ISR
Remove a redundant NULL check on the device pointer in the GPIO
interrupt handler.

The device pointer is dereferenced unconditionally before the check
and cannot be NULL in this context.

No functional change intended.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2026-01-02 09:57:43 +00:00
TOKITA Hiroshi
aa6ef16ec1 dts: bindings: serial: pl011: interrupts are not always required.
There are cases where the device can operate by polling
without using interrupts, so `interrupts` are not mark as required.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2026-01-02 09:57:31 +00:00
Farsin NASAR V A
6186673e15 tests: drivers: counter: Add sam_e54 test support files
- Adds sam_e54_xpro.overlay files for tcc.
- Adds sam_e54_xpro platform allow in testcase.yaml.

Signed-off-by: Farsin NASAR V A <Farsin.NASARVA@microchip.com>
2026-01-02 09:57:06 +00:00
Muhammed Asif
f3fe67e153 boards: microchip: sam_e54_xpro: Add conuter tag in sam_e54_xpro.yaml
- Add counter tag in the board yaml file seciton to allow CI run TCC
  G1 counter tests on this board

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2026-01-02 09:57:06 +00:00
Muhammed Asif
f58e1a3098 drivers: counter: microchip: Add TCC G1 driver
- Adds support for g1 counter driver with tcc peripheral

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2026-01-02 09:57:06 +00:00
Muhammed Asif
326ad5033d dts: bindings: counter: microchip: Add TCC G1 compatible
Adds the binding yaml for tcc peripheral for g1 counter driver

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2026-01-02 09:57:06 +00:00
Hau Ho
ed58ceefe6 tests: drivers: flash: Add config file for flash common test
Add config TEST_DRIVER_FLASH_SIZE for EK-RX261 and
FPB-RX261 board

Signed-off-by: Hau Ho <hau.ho.xc@bp.renesas.com>
2026-01-02 09:56:54 +00:00
Hau Ho
ae1c5a9a06 drivers: flash: Add flash driver support for RX261
Add config RX_FLASH_TYPE1 support for RX261

Signed-off-by: Hau Ho <hau.ho.xc@bp.renesas.com>
2026-01-02 09:56:54 +00:00
Hau Ho
48cf8c46dd boards: renesas: Add support for flash driver on FPB-RX261 board
Add flash driver support on FPB-RX261 board

Signed-off-by: Hau Ho <hau.ho.xc@bp.renesas.com>
2026-01-02 09:56:54 +00:00
Hau Ho
0963b33be7 boards: renesas: Add support for flash driver on EK-RX261 board
Add flash driver support on EK-RX261 board

Signed-off-by: Hau Ho <hau.ho.xc@bp.renesas.com>
2026-01-02 09:56:54 +00:00
Hau Ho
6b50eb5569 dts: rx: Add dts property for flash on RX261 MCU
Add dts for flash controller includes code and data flash region
for RX261 MCU

Signed-off-by: Hau Ho <hau.ho.xc@bp.renesas.com>
2026-01-02 09:56:54 +00:00
Keith Short
4d81bdb667 posix: c_lib_ext: fnmatch: fix llvm warning
The tolower() function takes an int parameter. LLVM compilers generate a
warning if a char is passed instead.

Signed-off-by: Keith Short <keithshort@google.com>
2026-01-02 09:56:45 +00:00
Lyle Zhu
587e8b8df0 bluetooth: at: add explicit cast to char pointer in return statements
Add explicit casts from 'uint8_t *' to 'char *' in at_get_string()
and at_get_raw_string() return statements to resolve implicit cast
warnings. The data.start field is uint8_t *, but the functions
return char *.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2026-01-01 21:30:01 +01:00
Abderrahmane JARMOUNI
32f15464fc dts: bindings: fix compatible strings missing quotes
Add quotes to compatible strings missing them.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2026-01-01 21:29:34 +01:00
Muhammad Waleed Badar
c36b201e8d dts: bindings: add cpu bindings for cortex-a7 and cortex-a9
Add devicetree binding definitions for ARM Cortex-A7 and
Cortex-A9 CPUs.

Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
2026-01-01 21:29:09 +01:00
Ha Duong Quang
4a3e4dc321 tests: drivers: enable adc test for s32k5
Enable ADC api test for S32K5

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2026-01-01 21:28:46 +01:00
Ha Duong Quang
9194a1ac7d samples: drivers: enable adc samples for s32k5
Enable adc_dt and adc_sequence samples for S32K5 ADC

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2026-01-01 21:28:46 +01:00
Ha Duong Quang
84c76c2b0e boards: nxp: s32k5xxcvb: enable support for adc
Enable support ADC for S32K5

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2026-01-01 21:28:46 +01:00
Ha Duong Quang
a1230d9efa dts: arm: nxp: add adc devicetree nodes for s32k5
Add devicetree of adc instances for s32k566.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2026-01-01 21:28:46 +01:00
Ha Duong Quang
0056966479 soc: nxp: s32: k5: add adc base address mappings
Add macro definitions to map generic ADC instance names to hardware
specific SARADC base addresses, enabling driver portability.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2026-01-01 21:28:46 +01:00
Ha Duong Quang
63c052c4cf drivers: adc: add support for s32k5
Add two new definitions, ADC_SAR_IP_HW_REG_SIZE and
ADC_SAR_IP_CHAN_2_BIT, to eliminate the inclusion of
Adc_Sar_Ip_HwAccess.h, since this header file does not
exist for the S32K5 platform.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2026-01-01 21:28:46 +01:00
Nick Brook
c6ba1a067c modules: nanopb: fix race condition in zephyr_nanopb_sources
When one generated .pb.h file includes another generated .pb.h file,
the build can fail because compilation may start before all headers
are generated.

The nanopb_generated_headers target collects all proto generation
targets as dependencies, but the calling target was not depending on
it. This can cause a race condition where the compiler fails with
"No such file or directory" for included headers.

Make the calling target depend on nanopb_generated_headers to ensure
all protobuf headers are generated before source compilation begins.

Signed-off-by: Nick Brook <nrbrook@gmail.com>
2026-01-01 21:28:33 +01:00
Ivan Iushkov
0436b8abd8 drivers: sensor: fix possible unaligned access icm45686
icm45686_encoded_fifo_payload is defined as packed struct,
while the nested structures are not. It causes an issue of
potential unaligned access to accel and gyro members.
The issue was detected by clang compiling with
-Wunaligned-access flag:

```
icm45686.h:52:6: error: field accel within 'struct icm45686.h:46:3)'
is less aligned than 'struct icm45686.h:48:4)' and is usually due
to 'struct icm45686.h:46:3)' being packed,
which can lead to unaligned accesses [-Werror,-Wunaligned-access]

icm45686.h:57:6: error: field gyro within 'struct icm45686.h:46:3)'
is less aligned than 'struct icm45686.h:53:4)' and is usually due
to 'struct icm45686.h:46:3)' being packed,
which can lead to unaligned accesses [-Werror,-Wunaligned-access]
```

Small C code snippet to demonstrate the reported issue:
```
struct icm45686_encoded_fifo_payload icm45686;
// prints 1:
printf("%lu\n", __alignof__(icm45686));
// prints 1:
printf("%lu\n", __alignof__(icm45686.accel));
// prints 2:
printf("%lu\n", __alignof__(typeof(icm45686.accel)));
```

This commit resolves the following Zephyr issue:
https://github.com/zephyrproject-rtos/zephyr/issues/101142
by adding `packed` attribute to accel and gyro members.

Signed-off-by: Ivan Iushkov <ivan.iushkov@nordicsemi.no>
2026-01-01 21:28:12 +01:00
Ivan Iushkov
bd6a228911 drivers: sensor: fix possible unaligned access bmi08x
bmi08x_accel_frame is defined as packed struct,
while the nested structures are not. It causes an issue of
potential unaligned access to accel member.
The issue was detected by clang compiling with
-Wunaligned-access flag:

```
bmi08x.h:605:2: error: field  within 'struct bmi08x_accel_frame'
is less aligned than 'union bmi08x.h:605:2)' and is usually due
to 'struct bmi08x_accel_frame' being packed,
which can lead to unaligned accesses [-Werror,-Wunaligned-access]
```

This commit resolves the following Zephyr issue:
https://github.com/zephyrproject-rtos/zephyr/issues/101142
by adding `packed` attribute to accel member.

Signed-off-by: Ivan Iushkov <ivan.iushkov@nordicsemi.no>
2026-01-01 21:28:12 +01:00
Jaagup Averin
f430cdef60 subsys/mgmt: Declare PROCESSOR_NAME for native_sim
In case of native build, the CONFIG_architecture
cannot currently be resolved with Kconfig, so we
must fall back to resolving it during compilation
using compiler definitions.

Signed-off-by: Jaagup Averin <jaagup.averin@gmail.com>
2026-01-01 21:27:23 +01:00
Muhammad Waleed Badar
9d0a229461 drivers: sensor: add adxl345 range attribute setter
Add adxl345_attr_set_range() to allow runtime config.
of the accelerometer's measurement range via the
SENSOR_ATTR_FULL_SCALE attribute.

The function maps the requested range to the nearest supported
ADXL345 range (±2g, ±4g, ±8g, or ±16g) and updates the device
configuration accordingly.

Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
2026-01-01 21:26:42 +01:00
Sreeram Tatapudi
64e789fd80 samples: infineon: add missing copyright headers to overlay files
Add SPDX-License-Identifier and copyright headers to Infineon
board overlay files in flash_shell, uart async_api, and
nvs samples for cy8cproto_062_4343w and cy8cproto_063_ble boards.

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2026-01-01 21:26:23 +01:00
TOKITA Hiroshi
545c2870e9 tests: crypto: crypto_hash: Add rpi_pico2 to test target
Add rpi_pico2 to the crypto_hash test target.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-12-31 11:00:21 +00:00
TOKITA Hiroshi
515793cf5b boards: raspberrypi: rpi_pico2: Add sha256 accelerator
Added sha256 accelerator to rpi_pico.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-12-31 11:00:21 +00:00
TOKITA Hiroshi
41a86eb1fe drivers: crypto: Add initial support for rpi_pico sha256 accelerator
Add basic support for RaspberryPi Pico's SHA256 hardware accelerator.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-12-31 11:00:21 +00:00
TOKITA Hiroshi
f0632f5155 modules: hal_rpi_pico: Add hardware_sha256 to include directories
Add `hardware_sha256/include` to `zephyr_include_directories`.
Use the header only.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-12-31 11:00:21 +00:00
Qingsong Gou
bd48944b7e samples: drivers: uart: async_api: enable sf32lb52_devkit_lcd
Enable test on sf32lb52_devkit_lcd

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-31 11:00:08 +00:00
Qingsong Gou
d2b64ae909 drivers: dma: sf32lb: fix get_status
Fix get status interface

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-31 11:00:08 +00:00
Qingsong Gou
98742f1b07 drivers: serial: sf32lb: add uart async API support
add uart async API support for sf32lb

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-31 11:00:08 +00:00
Zhida Zhang
548589c8e0 boards: seeed: xiao_nrf54l15: update DTS
Designate the flash controller as rram_controller.
Enable IEEE 802.15.4 wireless communication support.

Signed-off-by: Zhida Zhang <2759897880@qq.com>
2025-12-31 10:59:56 +00:00
Camille BAUD
bb54981614 samples: drivers: display: Fix nonsense alignment default
A alignment of 1 is also called 'unaligned'.
This default causes exceptions on CPUs that use different paths
for unaligned and aligned access.
Use a sane default that doesnt guarantee a store/access exception.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-31 10:59:44 +00:00
Hui Bai
3ea4ddc917 samples: net: wifi: Update hostap cleanup intervals for NXP wifi chips
Update hostap cleanup intervals to 120 seconds for NXP wifi chips.
CONFIG_WIFI_NM_WPA_SUPPLICANT_CLEANUP_INTERVAL for wpa_supplicant.
CONFIG_WIFI_NM_HOSTAPD_CLEANUP_INTERVAL for hostapd.

Signed-off-by: Hui Bai <hui.bai@nxp.com>
2025-12-31 10:58:59 +00:00
Hui Bai
826872d179 modules: hostap: Add new configs in Kconfig for hostap cleanup interval
Both wpa_supplicant and hostapd register cleanup interval to eloop and
the intervals are all 10 seconds by default and this can cause device to
be woken up twice from sleep every 10 seconds. In order to reduce power
consumption, add below new items in Kconfig so that users can update the
cleanup intervals based on their requirements.
CONFIG_WIFI_NM_WPA_SUPPLICANT_CLEANUP_INTERVAL
CONFIG_WIFI_NM_HOSTAPD_CLEANUP_INTERVAL

Signed-off-by: Hui Bai <hui.bai@nxp.com>
2025-12-31 10:58:59 +00:00
Zhaoxiang Jin
178acc0007 samples: sensor: enable die_temp_polling for frdm_mcxe31b
enable die_temp_polling for frdm_mcxe31b board

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-31 10:58:50 +00:00
Zhaoxiang Jin
84010a1da4 dts: nxp_mcxe31x: add properties to the tempsense node
add properties to the tempsense node for nxp_mcxe31x

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-31 10:58:50 +00:00
Zhaoxiang Jin
f110ef9c0a drivers: clock_control: nxp_mc_cgm: enable tempsense clock
Enable clock for tempsense module in NXP MC CGM driver to
support temperature sensing functionality.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-31 10:58:50 +00:00
Zhaoxiang Jin
ab23a9f012 drivers: sensor: nxp: Add NXP tempsense driver
Add a new driver for the NXP TempSense temperature
sensor found in various NXP MCUs, such as the MCX
family. The driver reads temperature data from the
TempSense peripheral and provides it via the Zephyr
sensor API.

The TempSense peripheral details can be found in the
NXP MCXE31x reference manual chapter 78.
reference manual can be found at:
https://www.nxp.com/webapp/Download?colCode=MCXE31XRM

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-31 10:58:50 +00:00
Zhaoxiang Jin
e7d24c8088 drivers: adc: add clock frequency selection for SAR ADC
This commit enhances the SAR ADC driver by adding
support for clock frequency selection. The clock
frequency can now be configured via the devicetree,
allowing for better optimization of ADC performance
based on application requirements.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-31 10:58:50 +00:00
TOKITA Hiroshi
4d04eb0998 drivers: spi: spi_rpi_pico_pio: Fix pio_program variable constness
Since RPI_PICO_PIO_GET_PROGRAM returns const variable, so changed
`pio_program_t *` variables in data to `const pio_program_t *`.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-12-31 10:57:55 +00:00
Kyle Bonnici
45f6c6b4cb Boards: combine duplicate nodes
This PR combines node content in the same file spread over multiple
node definitions.

This PR has not funtional changes to the boards

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2025-12-31 10:57:37 +00:00
Zhaoxiang Jin
c2cec5108b samples: adc_dt: Fix adc_dt run issue on NXP MCXN boards
Fix adc_dt run issue on NXP MCXN boards, the default
mode of vref is standby mode, the BUF21 is not enabled,
so the LPADC can not work normally. Need to set the vref
mode to 'NXP_VREF_MODE_LOW_POWER' or 'NXP_VREF_MODE_HIGH_POWER'
to enable the BUF21.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-31 10:57:20 +00:00
Gaetan Perrot
0c8f4741b8 drivers: espi: espi_taf_npcx: reorder NULL checks
Move the NULL checks for the protection configuration parameters
before dereferencing them to avoid potential NULL pointer
dereferences.

The device pointer is assumed to be valid.

No functional change intended.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2025-12-31 10:56:02 +00:00
Alberto Escolar Piedras
30bfb73e27 test: benchmarks: Fix format specifier
uint64_t is not in general unsigned long long int, and therefore
its format specifier is not llu in general.
The macro PRIu64 resolves to whatever it is.

For 64bit targets, uint64_t is relatively normal to just be
unsigned long.
Providing the wrong format specifier results in the build warning
```
format %llu expects argument of type long long unsigned int, but
argument <x> has type long [unsigned] int
```

The issue can be reproduced by building this test with
native_sim/native/64.
Issue introduced in da6cd1a474

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-31 10:55:56 +00:00
Igor Knippenberg
4a3c5ed1f6 tracing: systemview: fix assertion fail on first thread switch
Segger Systemview calls k_current_get() in sys_trace_k_thread_switched_in.
During early boot, this hook is triggered while k_is_pre_kernel() is true.

This triggers an assertion failure when CONFIG_ASSERT is enabled.

Add a guard to ignore the thread switch event if it is called pre-kernel.

Signed-off-by: Igor Knippenberg <knippenberg@filics.eu>
2025-12-30 17:40:05 +01:00
Abderrahmane JARMOUNI
7eb4928b04 MAINTAINERS: fix devicetree bindings area label
Use "Devicetree Binding" label instead of "Devicetree Bindings"

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-12-30 09:10:32 -06:00
Abderrahmane JARMOUNI
9b8d85da55 MAINTAINERS: add JarmouniA as collaborator to DT Bindings area
Add JarmouniA as collaborator to the Devicetree Bindings area.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-12-30 09:10:32 -06:00
Bjarki Arge Andreasen
a493141dd4 drivers: clock_control: nrfs_audiopll: disable clock on init
The nrfs audiopll is automatically started if freq fraction or
prescaler is requested. The initial state of the clock should be
off, so send a disable request after setting initial freq fraction
and prescaler.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-30 09:10:18 -06:00
Bjarki Arge Andreasen
1124070207 drivers: clock_control: nrf_fll16m: ensure main power domain is on
Ensure the MAIN power domain is on before triggering
NRF_LRCCONF_TASK_CLKSTART_0 task.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-30 09:09:37 -06:00
Carlo Caione
6501bdfc99 boards: shields: Add support for Semtech SX1261MB2BAS LoRa shield
Add board shield definition for the Semtech SX1261MB2BAS LoRa module. This
is mostly copied over from semtech_sx1262mb2das.

Signed-off-by: Carlo Caione <carlo.caione@gmail.com>
2025-12-30 09:09:08 -06:00
Krzysztof Chruściński
79a44ed06b samples: boards: nordic: nrf_sys_event: Extend sample
Add part which is using event register and unregister functionality.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-30 09:07:32 -06:00
Krzysztof Chruściński
4cff3bd1d9 drivers: timer: nrf_grtc: Use nrf_sys_event registration
Use API for registering synchronous interrupts. It reduced interrupt
latency due to NVM memory wake up.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-30 09:07:32 -06:00
Krzysztof Chruściński
13b45e2d99 soc: nordic: common: nrf_sys_event: Add API for registering an event
Add API for indicating that a deterministic interrupt will occur at
certain point in time in the future. Implementation is ensuring that
there will be no latency due to NVM memory waking up. There are 2
ways of ensuring that:
- setting low latency power mode in RRAMC (higher power consumption
  in idle (not available in non-secure build)
- using PPI and GRTC to trigger the RRAMC wake up task right before
  an expected interrupt

Module has a pool of GRTC channels and dynamically allocates and
frees those channels when events are registered and unregistered.

If GRTC channel is not available then algorithm falls back to power
mode setting (in secure build).

API offers registering an event using relative and absolute timing.

API can be used from Zero Latency interrupts.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-30 09:07:32 -06:00
Krzysztof Chruściński
ced5d2f730 soc: nordic: common: Add HAS_HW_NRF_RRAMC
Add HAS_HW_NRF_RRAMC Kconfig to indicate presence of the RRAMC
controller.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-30 09:07:32 -06:00
Ajay Neeli
669b4cf46c samples: mbox: Add support for Versal Gen2 RPU
Add support for testing AMD-Xilinx Inter-Processor-Interrupt(IPI) on
Versal Gen2 RPU.

Add an overlay configuration to enable IPI-1 as the default
inter-processor interrupt for RPU0 in Versal Gen2. While IPI-1 is the
preset, it can be adjusted based on design requirements.

rpu0_rpu0_mailbox is set up in loopback mode for testing.

Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
2025-12-30 09:06:20 -06:00
Ajay Neeli
f76e532a0d samples: mbox: Add support for Versal-NET RPU
Add support for testing AMD-Xilinx Inter-Processor-Interrupt(IPI) on
Versal-NET RPU.

Add an overlay configuration to assign IPI-5 as the default
inter-processor interrupt for RPU0 in Versal-NET. While IPI-5 is preset,
it can be adjusted based on design requirements.

rpu0_rpu0_mailbox is set up in loopback mode for testing.

Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
2025-12-30 09:06:20 -06:00
Ajay Neeli
18a6b6c35c dts: amd: versal2: Add DT support for IPI
Add the inter-processor interrupt (IPI) nodes to the device tree for the
Versal Gen2 platform, as per Versal Gen2 Technical Ref Manual (AM026)

Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
2025-12-30 09:06:20 -06:00
Ajay Neeli
f3ce62b088 dts: amd: versalnet: Add DT support for IPI
Add the inter-processor interrupt (IPI) nodes to the device tree for the
Versal-NET platform, as per Versal-NET Technical Reference Manual (TRM).

Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
2025-12-30 09:06:20 -06:00
Ajay Neeli
8c202d2b93 drivers: mbox: Add AMD-Xilinx IPI Mailbox
Add a new MBOX driver for the AMD-Xilinx IPI Mailbox, providing support
for the Versal-NET and Versal Gen 2 platforms

Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
2025-12-30 09:06:20 -06:00
Ajay Neeli
14bb1820d6 dts: bindings: mbox: Add AMD-Xilinx IPI mailbox
Add device tree bindings for the AMD-Xilinx Inter Processor Interrupts
(IPI) mailbox.

The IPI architecture allows the passing of messages across the system
without the complications of autonomous read-write transactions and
polling inefficiency. The notification of the interrupt is also
possible without message buffers on some platforms. Some IPI channels
are hard-wired to particular core while others can be configured to
assign to any core on AMD-Xilinx heterogenous multiprocessor platform.

Signed-off-by: Ajay Neeli <ajay.neeli@amd.com>
2025-12-30 09:06:20 -06:00
Holt Sun
8e5c223b54 samples: drivers: crc: fix twister regex and run in CI
1. Update the CRC sample’s Twister console regex to match the current
log output.
2. Add an integration_platforms entry (ek_ra8m1) so the sample runs
in PR CI.
3. Make CRC verification unconditional so the expected
“verification succeeded” log is always emitted and mismatches fail
the test.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-30 08:47:07 +01:00
Dat Nguyen Duy
62ad1b5828 boards: s32k5xxcvb: add flexcan support
Add flexcan support for s32k5xxcvb~

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2025-12-30 08:40:40 +01:00
Dat Nguyen Duy
79d37f8fd5 dts: nxp: add flexcan devicetree nodes for s32k566
Add Flexcan devicetree nodes for s32k566

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2025-12-30 08:40:40 +01:00
zhenwei fang
66cbc55e6f Bluetooth: Classic: Fix net_buf leak
Release the buffer with net_buf_unref(rsp) once the reading default link
policy settings response has been parsed.

Signed-off-by: zhenwei fang <fangzhenwei@bytedance.com>
2025-12-30 08:39:00 +01:00
Jonas Berg
107124e4b3 samples: pressure polling: Add Cytron Maker Uno RP2040 overlay
Enable GP14 for this sample. Use commented-out entries for the
other servo outputs, as is done in the other overlay files.

Signed-off-by: Jonas Berg <jonas.s.t.berg@gmail.com>
2025-12-30 08:38:10 +01:00
Jonas Berg
0e3be83c71 boards: Add Cytron Maker Uno RP2040 board
Product photo from https://www.cytron.io/p-maker-uno-rp2040

Tested with the commands in index.rst

Signed-off-by: Jonas Berg <jonas.s.t.berg@gmail.com>
2025-12-30 08:38:10 +01:00
Jonas Berg
bac97f310f dts: bindings: vendor-prefixes: Add cytron
Add vendor prefix for Cytron Technologies

Signed-off-by: Jonas Berg <jonas.s.t.berg@gmail.com>
2025-12-30 08:38:10 +01:00
William Tang
0601335d85 boards: nxp: mcx: update FlexCAN clock configuration
Update FlexCAN clock configuration across NXP MCXN family boards to use
PLL0 as clock source with a divider of 3 instead of FRO_HF with divider
of 1.
The new configuration provides FlexCAN peripherals by using the PLL0
output (150MHz) divided by 3 to achieve 50MHz, replace previous 48MHz
FRO_HF.

Signed-off-by: William Tang <william.tang@nxp.com>
2025-12-29 16:04:17 +01:00
William Tang
0a4f52e52c dts: arm: nxp: add CAN FD support for MCXN SOC family
Add CAN FD support for MCXN SOC family, including mcxn23x, mcxn94x
and mcxn54x.

Tested with tests/drivers/can.

Fixes #91138

Signed-off-by: William Tang <william.tang@nxp.com>
2025-12-29 16:04:17 +01:00
Derek Snell
fb18d5ca94 doc: boards: nxp: update VS Code links in common footer
MCUXpresso for VS Code documentation was migrated to new site.

Signed-off-by: Derek Snell <derek.snell@nxp.com>
2025-12-29 16:03:43 +01:00
Mikołaj Rosowski
aa1d070f37 boards: dfrobot: Add DFRobot Beetle ESP32-C3 board
Add support for the DFRobot Beetle ESP32-C3 board. This is a small IoT
development board based on the Espressif ESP32-C3 RISC-V SoC.

Board features:
- ESP32-C3 (32-bit RISC-V at 160MHz)
- 400KB SRAM, 4MB Flash
- 2.4GHz WiFi and BLE
- 13x IO ports
- Integrated lithium battery charging management

The board has been tested with the following Zephyr samples:
- samples/basic/blinky
- samples/hello_world
- samples/net/wifi/shell

Signed-off-by: Mikołaj Rosowski <m.rosowski1@wp.pl>
2025-12-29 16:03:18 +01:00
Henrik Brix Andersen
b62b24248b doc: releases: migration-guide: 4.4: update FlexCAN migration guide entry
Update the NXP FlexCAN migration guide entry to take the latest Kconfig to
devicetree change into account.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-29 16:02:58 +01:00
Henrik Brix Andersen
964d09fda0 MAINTAINERS: rename the Aesc Silicon platform label
Rename the Aesc Silicon platform label used on GitHub to match the rest of
the platform labels.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-29 16:02:39 +01:00
Hake Huang
589a657a0c boards: nxp: add adc support to boards
add adc supports to boards

Signed-off-by: Hake Huang <hake.huang@nxp.com>
2025-12-29 13:06:02 +01:00
Qingsong Gou
355c2f42e8 drivers: serial: sf32lb: add config_get and configure
Add config_get and configure APIs support

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-29 13:05:41 +01:00
Zhaoxiang Jin
4b57c88344 dts: nxp,sar-adc.yaml: remove 'type: array' from interrupts property
'type: array' is unnecessary for the interrupts property in
nxp,sar-adc.yaml.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-29 09:28:27 +01:00
Holt Sun
517cc13f1c doc: migration-guide-4.4: add NXP LPTMR counter updates
Document breaking changes in prescale-glitch-filter configuration
and the new prescale-glitch-filter-bypass property. Provide migration
example for out-of-tree device trees.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-29 09:27:54 +01:00
Holt Sun
bc9a0a726b counter: mcux_lptmr: fix prescaler/glitch filter configuration
Fix incorrect LPTMR prescaler/glitch filter mapping that led to wrong
frequency calculation and wrong hardware configuration.

- Calculate effective counter frequency correctly:
  * Time Counter mode: divide by 2^(value + 1)
  * Pulse Counter mode: divide by 2^value
- Map prescale-glitch-filter directly to the HAL enum (no offset math)
- Add prescale-glitch-filter-bypass DT boolean (default false)
- Restrict prescale-glitch-filter to 0..15 and update bindings/DTS users
- Add build-time validation for Pulse mode (value 0 requires bypass)

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-29 09:27:54 +01:00
Quang Le
22ba6d0007 soc: renesas: rzv: Fix pin function bitfield
Adjust the pin function bitfield to 4 bits to fit all RZ/V SoCs
(RZ/V2L, V2H, V2N). PFC bitfield of RZ/VH, V2N have 4 bits, so
the current 3-bit width does not fit them.

Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-12-29 09:25:33 +01:00
Nhut Nguyen
6138ba7aef soc: renesas: rzv: Retrieve itcm, dtcm from dtsi for mpu settings
Retrieve itcm and dtcm size and base address from dtsi for mpu settings
instead of hardcode.

Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-12-29 09:25:17 +01:00
Zhaoxiang Jin
1f977a9220 include: hwspinlock.h: Optimize hw_spin_trylock function
If api->trylock(dev, id) fails (typically because a cross-core
HW lock is held by another core and returns -EBUSY, or returns
-EINVAL, etc.), the function will immediately return the error
code, but the local ctx->lock is not released, and interrupts
also remain in the locked state from the trylock. This may cause
IRQ lock state leakage. If there's no opportunity in the call path
to reach k_spin_unlock(), the system may exhibit unpredictable
"freeze-like" behavior.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-28 18:13:37 +00:00
Benjamin Cabé
540edab373 include: tracing: fix FIFO slist tracing hook naming mismatch
The macro names sys_port_trace_k_fifo_put_slist_enter/exit in
tracing.h were incorrectly named and did not match the corresponding
definitions in backend implementations.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-28 18:13:26 +00:00
William Tang
cf42e1a779 boards: nxp: mr_canhubk3: update CAN configuration documentation
Remove the CONFIG_CAN_MCUX_FLEXCAN_MAX_MB configuration option from
the documentation notes, as the message buffer count information has
been moved to the devicetree and no longer needs to be described in
Kconfig.

Update the constraint for CONFIG_CAN_MCUX_FLEXCAN_MAX_FILTERS to
reflect that it must be less than the maximum number of message
buffers supported by the FlexCAN instance, as shown in the table
below the note. This keeps same behavior as driver.

Signed-off-by: William Tang <william.tang@nxp.com>
2025-12-28 10:11:51 +01:00
William Tang
18e5e29749 drivers: can: mcux: flexcan: move to per-instance MB configuration
This change refactors the FlexCAN driver to use per-instance message
buffer configuration instead of global Kconfig options. The driver now
calculates message buffer allocation at compile time based on device
tree properties for each FlexCAN instance.

Key changes:
- Remove global CAN_MAX_MB Kconfig option and associated range constraint
- Add number_of_mb, rx_mb, and tx_mb fields to mcux_flexcan_config
  structure
- Move callback arrays and atomic allocation bitmaps from static global
  arrays to per-instance static arrays generated by macros
- Update data structure to use pointers to per-instance arrays instead
  of fixed-size embedded arrays
- Add compile-time validation to ensure sufficient message buffers are
  available for required RX filters and RX filters greater than 0

This approach allows different FlexCAN instances to have different
message buffer configurations based on their hardware capabilities
and device tree settings, improving memory efficiency and flexibility.
The change maintains backward compatibility while enabling better
resource utilization across different SoC variants.

Fixes #92798

Signed-off-by: William Tang <william.tang@nxp.com>
2025-12-28 10:11:51 +01:00
William Tang
1e9bd76278 dts: can: mcux: flexcan: Add number-of-mb property to FlexCAN nodes
Add the `number-of-mb` and `number-of-mb-fd` device tree property to
all the NXP FlexCAN controller nodes across various SoC families to
specify the maximum number of 8-byte and 64-byte payload message
buffers supported by each FlexCAN instance.

This change updates device tree source files for multiple NXP SoC
families including Kinetis K6x, RT10xx, RT11xx, RT118x, MCX, S32K,
S32Z, and i.MX8MP/i.MX93 series. The property values are set based
on hardware specifications for each specific FlexCAN instance.

This property addition ensures proper resource allocation and
prevents buffer overflow issues in FlexCAN driver implementations.

Signed-off-by: William Tang <william.tang@nxp.com>
2025-12-28 10:11:51 +01:00
William Tang
8b8d5ca05a dts: arm: nxp: update copyright headers
Update copyright header in nxp_k6x.dtsi.

Signed-off-by: William Tang <william.tang@nxp.com>
2025-12-28 10:11:51 +01:00
Marek Matej
4cf8071494 boards: espressif: remove esp32s3_devkitm
Removing the esp32s3_devkitm as deprecated and redundant.
The esp32s3_devkitc has essentially the same functionality.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2025-12-27 21:02:28 +00:00
Marek Matej
ecdd8ee5b4 boards: Espressif deprecated board
Removing board esp32s3_devkitm as it is almost identical as
esp32s3_devkitc.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2025-12-27 21:02:28 +00:00
Fabin V Martin
3b67cbf654 tests: drivers: i2c: add test support
add overlay and update yaml files for i2c async test

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-27 21:01:25 +00:00
Fabin V Martin
2a94517e58 boards: microchip: pic32cx_sg61_cult: update sercom node for i2c
update board dts for sercom i2c node

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-27 21:01:25 +00:00
Fabin V Martin
b0919aec14 boards: microchip: pic32cx_sg41_cult: update sercom node for i2c
update board dts for sercom i2c node

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-27 21:01:25 +00:00
Fabin V Martin
f34df74147 west.yml: Update the portd for pic32cxsg
Update west.yml for adding the portd in the pincontrol
parsing file.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-27 21:01:25 +00:00
Tim Lin
f36e8b1d60 drivers/i2c: it8xxx2: Add I2C_CODE_IN_RAM for critical functions
Introduce the I2C_CODE_IN_RAM option to place selected critical
functions into the RAM code section.

This allows latency-sensitive I2C paths to execute from RAM when
required, while keeping the default behavior unchanged.

NOTE1: Enable I2C_CODE_IN_RAM on it81202bx: RAM size +2272B.
NOTE2: With kernel in RAM, enabling I2C_CODE_IN_RAM saves ~558ms
       over 1,000 transfers (W/R/W2R), tested on it81202bx.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-12-27 21:01:12 +00:00
Holt Sun
521a1af002 boards: mimxrt700_evk: configure ITRC for WWDT reset handling.
Fix WWDT warning interrupt by configuring ITRC to not intercept WWDT
timeout events.

ROM may configure ITRC OUT3_SEL0/OUT4_SEL0 to route WWDT0-2 to ITRC,
causing ITRC to reset the system faster than WWDT, preventing the
warning interrupt from functioning. Reconfigure these registers to
0xAAAAAA0A to allow RSTCTL to properly handle WWDT reset events.

Also enable WWDT warning interrupt in the board configuration to ensure
proper watchdog interrupt handling during tests.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-27 21:00:57 +00:00
Holt Sun
8cb5b7dd58 drivers: watchdog: wdt_mcux_wwdt: reject callback without warning IRQ
The WWDT callback is only invoked from the warning interrupt path.
If CONFIG_WDT_MCUX_WWDT_WARNING_INTERRUPT_CFG is 0, the warning
interrupt is effectively disabled, so a configured callback would
never fire.
Return -ENOTSUP and log an error when a callback is provided
without enabling the warning interrupt, to avoid a silent no-op.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-27 21:00:57 +00:00
Holt Sun
8b365a3e2c drivers: watchdog: wdt_mcux_wwdt: fix window calculation.
Correct the WWDT window value calculation and add proper
range validation.

The window value was incorrectly set to the minimum timeout value.
Per hardware specification, it should be calculated as:
  windowValue = timeoutValue - min_window_ticks

Also add:
- MAX_TIMEOUT boundary checks
- Validation before value assignment

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-27 21:00:57 +00:00
Holt Sun
2021106536 tests: watchdog: use write-through for mimxrt700 board.
Add CONFIG_ARM_MPU_SRAM_WRITE_THROUGH=y to
make sure data will be flushed into SRAM timely.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-27 21:00:57 +00:00
Andreas Ålgård
98746a172c net: lib: dhcpv4_server: Add client hardware ID to client_id
This is useful if you specifically need the hardware address
 and not the client_id option.

Signed-off-by: Andreas Ålgård <aal@ixys.no>
2025-12-27 21:00:32 +00:00
Sylvio Alves
e855856a5d drivers: spi: esp32: move pinctrl to init
Move pinctrl_apply_state() from configure to init to ensure pinctrl
is applied once at boot rather than on every transaction.

When cs-gpios is defined, spi_context_cs_configure_all() runs after
pinctrl and reconfigures the CS pin as GPIO, properly overriding
any CS routing set by pinctrl.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-26 10:18:16 -06:00
Riadh Ghaddab
7b7521ee5d MAINTAINERS: add ZMS Settings backend collaborators
Add a file-group for ZMS backend for Settings and add myself as a
collaborator.

Signed-off-by: Riadh Ghaddab <riadh.ghaddab@nordicsemi.no>
2025-12-26 10:17:56 -06:00
Manuel Argüelles
ddef63bffd maintainers: remove congnguyenhuu from NXP areas
The collaborator is no longer active in NXP-maintained areas.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2025-12-26 10:17:46 -06:00
Tim Pambor
f35189eeef drivers: eth: phy: adin2111: support C45 register access
Implement read_c45 and write_c45 functions to support clause 45
register access. This enhancement allows to access C45 registers
even when the MDIO controller does not natively support clause 45.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-26 10:17:32 -06:00
Tim Pambor
c9f8e8c856 drivers: eth: phy: adin2111: Use C45 access by default
Use clause 45 MDIO access by default and only fallback to the phy
internal clause 45 bridge if the MDIO controller does not support
clause 45 transactions.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-26 10:17:32 -06:00
Maochen Wang
70a9a54658 boards: shields: nxp_m2_wifi_bt: set default IMX_USDHC_DAT3_DETECT_RETRY
DAT3-based card detection may fail for the first attempt on RT1060evkc
+ NXP_IW610x_v1 card, caused by transient signal states during
initialization. Set IMX_USDHC_DAT3_DETECT_RETRY as 10 can fix this issue.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2025-12-26 10:17:10 -06:00
Maochen Wang
a8137baf65 drivers: sdhc: imx_usdhc: add retry for DAT3 card detection
DAT3-based card detection can return a false negative on the first read
due to transient signal states after enabling detection. Add a bounded
retry loop (limited by IMX_USDHC_DAT3_DETECT_RETRY) with a short delay
between attempts to improve robustness.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2025-12-26 10:17:10 -06:00
Riadh Ghaddab
b41f510fe2 tests: boards: nrf: rename flash.throttling test
Change the generic name to boards.nrf.rram_throtttling as this test is
bound to nrf boards.

Signed-off-by: Riadh Ghaddab <riadh.ghaddab@nordicsemi.no>
2025-12-26 10:16:37 -06:00
Yassine El Aissaoui
29673afd01 soc: nxp: mcxw23: Integrate low power with ble
Adding support for deep sleep/ power down on BLE apps.

Signed-off-by: Yassine El Aissaoui <yassine.elaissaoui@nxp.com>
2025-12-26 10:16:07 -06:00
Dong Wang
49f1f6fce0 dts: intel_ish: Remove unnecessary #interrupt-cells from /soc node
The /soc node is a simple-bus node and not an interrupt provider. Leaving
the #interrupt-cells property produces misleading Device Tree build
warnings:
  Warning (interrupt_provider): /soc: '#interrupt-cells' found, but node is
  not an interrupt provider <stdout>:  Warning (interrupt_map): Failed
  prerequisite 'interrupt_provider'.

Signed-off-by: Dong Wang <dong.d.wang@intel.com>
2025-12-26 10:15:36 -06:00
Tim Lin
a214a05b8c soc/ite: it8xxx2: Add SOC_IT8XXX2_RAM_CODE_NOINLINE option
Add the SOC_IT8XXX2_RAM_CODE_NOINLINE Kconfig option to prevent
functions marked with __soc_ram_code from being inlined when LTO
is enabled.

This ensures RAM code functions remain in the RAM section instead of
being merged into callers by the compiler.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-12-26 10:15:07 -06:00
Benjamin Cabé
62edae7d75 include: led_strip: tlc5971:: add doxygen docs for tlc5971 extended API
Adds doxygen documentation for the extended API of the Texas Instruments
TLC5971 LED strip controller driver.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-26 10:14:42 -06:00
Benjamin Cabé
d686aa732f include: led_strip: add doxygen group for LED strip API extensions
Similar to how it's done for other driver classes, create a new doxygen
group to put all device-specific LED strip API extensions under.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-26 10:14:42 -06:00
Fabin V Martin
580732d5f9 tests: drivers: uart: Add test support
Add overlay and yaml files for uart async tests.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-26 10:14:22 -06:00
Fabin V Martin
61be40f98f boards: microchip: sam_e54_xpro: Update uart nodes for DMA support
Add DMA properties in sercom uart node.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-26 10:14:22 -06:00
Fabin V Martin
cf8d97ab39 drivers: uart: microchip: sercom g1: Add DMA support
The current driver implementation only support pooling and
synchronous operations. By adding DMA support the driver will
be able to operate in asynchronous mode which helps to improve
CPU usage and save power.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-26 10:14:22 -06:00
Fabin V Martin
08ba580618 dts: bindings: serial: Introduce DMA properties
Introduce DMA properties for sercom uart g1 driver.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-26 10:14:22 -06:00
Farsin Nasar V A
a620ee12a6 boards: microchip: pic32cx_sg61_cult: add RESET to supported list
Update pic32cx_sg61_cult.yaml to include RESET in the supported
modules list.

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-26 10:13:53 -06:00
Farsin Nasar V A
39edc96945 dts: arm: microchip: add RSTC node
Add the device tree node for microchip RSTC G1 IP.

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-26 10:13:53 -06:00
Arunprasath P
75d41570cf tests: adc: microchip: Add sam_e54_xpro overlay for tests
Add board overlay file for sam_e54_xpro to enable adc
test cases to run on this board

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-26 10:13:30 -06:00
Arunprasath P
a4d266616a samples: adc: Add sam_e54_xpro overlay for adc_sequence
Add a devicetree overlay to run the adc_sequence sample on
SAM E54 Xplained Pro.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-26 10:13:30 -06:00
Arunprasath P
247c045ba2 boards: microchip: sam_e54_xpro: Add ADC pinctrl and feature support
Add ADC0 and ADC1 pinctrl definitions and update the board metadata
to list ADC as a supported feature on the SAM E54 Xplained Pro board.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-26 10:13:30 -06:00
Arunprasath P
e767aa498a drivers: adc: microchip: Introduce G1 ADC Driver
Add a Zephyr ADC driver for the Microchip G1 ADC peripheral
with support for differential mode, multi-channel sequencing,
oversampling, and NVM-based factory calibration.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-26 10:13:30 -06:00
Arunprasath P
1cdde74b35 dts: arm: microchip: Introduce ADC G1 dts binding
Add the device tree node and the binding file for
microchip adc G1 Peripheral.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-26 10:13:30 -06:00
Biwen Li
23354f3cad tests: drivers: uart_async_api: enable it for m33 of imx943_evk
This commit enables tests/driver/uart/async_api demo
for m33 in NETCMIX of imx943_evk.
- build command as follows,
  west build -p always -b imx943_evk/mimx94398/m33
  tests/drivers/uart/uart_async_api

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
9bfda71a9a dts: arm: nxp: imx95: m7: add disp_irqsteer node
Add disp_irqsteer node(this is another irqsteer instance).

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
df9180305d dts: arm: nxp: imx95: m7: add more masters
Add more irqsteer masters.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
7b8d94c2be boards: nxp: imx943_evk: m33: enable edma2
Enable edma2 defaultly.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
23b764ffc2 dts: arm: nxp: imx94x: add edma2 node
Add edma2 node for lpuart3.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
b93bffd271 dts: arm: nxp: imx943: m7_1: add irqsteer node
Add irqsteer node for m7_1.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
d7142bd597 dts: arm: nxp: imx943: m7_0: add irqsteer node
Add irqsteer node for m7_0.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
9dcf76c670 tests: arch: arm_custom_interrupt: exclude imx943
Exclude imx943,
  - multi level interrupts feature is enabled defaultly,
    so irqsteer1 driver is enabled, then the test case
    report the build issue:
    multiple definition of z_soc_irq_enable,
    tests/arch/arm/arm_custom_interrupt/src/arm_custom_interrupt.c:47
    first defined here.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
66bfea6aef samples: drivers: uart_aysnc_api: imx943_evk: m33: add config
Add config for imx943_evk_mimx94398_m33
- Use the sample to test the irqsteer driver

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
4a3df69c09 boards: nxp: imx943_evk: m33: enable edma4
Enable edma4 by default for lpuart8 of m33(in NETCMIX)
of imx943_evk

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
cc183934a4 soc: nxp: imx943: m33: enable multi level interrupts
This commit enables multi level interrupts:
- Enable multi level interrupts
  imx943 is a two level interrupts system and
  some interrupts(eg. edma interrupts) depend on irqsteer.
- Increase irq number from 405 to 790
  Actually there are 407(IRQ 0 ~ IRQ 406) interrupts
  from nvic(first level interrupts),
  The second level interrupts are extended by irqsteer,
  it extends 32 x 12 = 384 interrupts,
  So first level interrupts + second level interrupts
  = 407 + 384 = 791(IRQ 0 ~ IRQ 790) interrupts

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
ce50e46a90 drivers: intc: irqsteer: Drop calling into NXP HAL
Supporting irqsteer using NXP HAL becomes increasingly harder with new
SoCs.

For example now there are two incompatible HAL drivers for IRQ steer
(mcux-sdk-ng/drivers/irqsteer and mcux-sdk-ng/drivers/irqsteer_1).

In order to avoid overcomplicating code and better scaling code for
newer SoCs just drop using the NXP HAL and implement an IRQ Steer native
Zephyr driver

Use irqsteer node of imx943 as example.

New features:
- Support multiple irqsteer instances.
- Indroduce new properties(nxp,irq-offset, nxp,num-irqs).

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Biwen Li
8822d8f8a9 irqsteer-master: Introduce priority attribute
This adds priority attribute to irqsteer in order to
support multi level interrupts.

We need to make this change atomic so that we don't break
the build.

So, we introduce a new property named 'priority' to
`interrupt-cells` and we increase the number of cells.
Then we update all instances of interrupts
using irqsteer (for imx95, imx8m, imx8qm, imx8qxp and also
update the overlay(imx8mp_evk_mimx8ml8_adsp) for tests.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-24 12:51:21 -05:00
Chris Friedt
de2d0c9563 posix: c_lib_ext: fnmatch: fix character class support
A couple of tests were inconsistent with glibc and picolibc.

Significant rework done to the `fnmatch()` implementation which included
refreshing that and the `rangematch()` implementations from commit

0a3b2e376d150258c8294c12a85bec99546ab84b

in https://github.com/lattera/freebsd

Removed `match_posix_class()` and implemented that functionality as
`rangematch_cc()`, which uses 64-bit integer comparison for matching
`[:alnum:]` et al instead of string comparison. That likely only works
for the "C" locale.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
Signed-off-by: Harun Spago <harun.spago.code@gmail.com>
2025-12-24 12:50:31 -05:00
Chris Friedt
637080e7ec posix: c_lib_ext: fnmatch: fix escape-oriented regression
A regression in 936d0278bd introduced a
subtle bug in the way that escaped expressions were handled.

The regression originated with the assumption that test data (originally
adapted from a 3rd-party testsuite) was correct when it was in fact
flawed.

Specifically, `fnmatch("[[?*\\]", "\\", 0)` should fail (`FNM_NOMATCH`),
since the "\\" sequence (a single backslash after compilation) escapes
the following ']' character, thus leaving the bracket expression
incomplete.

As @keith-packard  has pointed out,
https://pubs.opengroup.org/onlinepubs/9699919799/utilities/\
V3_chap02.html#tag_18_13_01 says that a bracket expression is only
interpreted as a bracket expression, when a proper bracket expression
is formed.

Therefore, the pattern is interpreted as the sequence
`'['`, `'['`, `'?'`, `*` (wildcard), `']'` and the call should return
`FNM_NOMATCH` to indicate failure rather than 0 to indicate success.

Added new test cases from #98827 and some commentary for subsequent
reviewers.

This change does not completely fix #55186 but is related to it.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-12-24 12:50:31 -05:00
Pieter De Gendt
526fa714a4 samples: drivers: jesd216: Print dw19 octal enable requirement
If supported, parse dw19 and print out the octal enable requirement.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-24 12:49:47 -05:00
Pieter De Gendt
7d6a9ab552 drivers: flash: mcux-flexspi-nor: Support octal mode
Add support for JEDEC octal mode.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-24 12:49:47 -05:00
Pieter De Gendt
206cad3b21 drivers: flash: jesd216: Add BFP DW19 decode helpers
Add struct and decode function for dw19 with octal enable requirement.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-24 12:49:47 -05:00
Qingsong Gou
89bc874404 tests: drivers: spi: add spi test support for sf32lb52_devkit_lcd
Add spi test support for sf32lb52_devkit_lcd

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-24 12:48:55 -05:00
Qingsong Gou
ff20bccfd9 drivers: spi: sf32lb: fix transceive_async
Fix transceive_async coding style and compile warnings

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-24 12:48:55 -05:00
Qingsong Gou
0bfba8b6f4 drivers: spi: sf32lb: refactor transceive
Refactor transceive to pass spi test

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-24 12:48:55 -05:00
Qingsong Gou
65ca5b588b drivers: spi: sf32lb: some minor fixs
Fix some options not supported
code optimization

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-24 12:48:55 -05:00
Zhaoxiang Jin
ce55d6f36c doc: migration-guide-4.4: Add SAR ADC driver migration notes
Add migration guide documentation for NXP SAR ADC driver.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:46 -05:00
Zhaoxiang Jin
8050fbe242 samples: adc: Enable ADC samples for frdm_mcxe31b board
Enable adc_sequence and adc_dt samples on frdm_mcxe31b board

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:46 -05:00
Zhaoxiang Jin
727293473b boards: nxp: frdm_mcxe31b: Enable SAR ADC support
1. Enable SAR ADC support for nxp mcxe31x platform.
2. Enable SAR ADC support for nxp frdm_mcxe31b board.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:46 -05:00
Zhaoxiang Jin
7558361c1a drivers: clock_control: enable ADC clock control
Enable MCXE31X platform ADC clock control through
the mc_cgm clock control driver.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:46 -05:00
Zhaoxiang Jin
ea8e8b7d53 drivers: adc: refactor mcux_sar_adc to nxp_sar_adc
Zephyr's current ADC API only supports 32 logical channels,
which is inadequate for SAR ADCs on certain SoCs. For instance,
the ADC on the MCXE31B has 64 hardware channels. The previous
implementation used a one-to-one mapping between logical and
hardware channels. In the new SAR ADC driver version, we bind
hardware channels to logical channels via the zephyr,input-positive
property, enabling us to access any channel.

Currently, only imx93 uses this ADC. To maintain the bisectability
of Zephyr commits, in this commit we will also modify the imx93-related
files, inlcuding:
1. Update the clock_control_mcux_ccm_rev2.c to use the new Kconfig
option 'CONFIG_ADC_NXP_SAR_ADC'.
2. Add properties to the imx93_evk_mimx9352_m33.overlay of the adc_api
testcase.

Now the sar adc is native driver, so, remove
CONFIG_MCUX_COMPONENT_driver.sar_adc from the glue cmake.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:46 -05:00
Zhaoxiang Jin
af72661b1a doc: releases: document NXP board compile definition scope changes
Add migration guide entry for compile definitions 'XIP_EXTERNAL_FLASH',
'USE_HYPERRAM' and 'XIP_BOOT_HEADER_XMCD_ENABLE' that were changed from
global to local scope in NXP board CMakeLists.txt files.

Applications that depended on these definitions being globally available
may need to be updated.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:35 -05:00
Zhaoxiang Jin
e8e4889895 boards: nxp: change definitions to local scope
1.'XIP_EXTERNAL_FLASH' and 'USE_HYPERRAM' are only used in
zephyr/boards/nxp/mimxrt1180_evk/xip/evkmimxrt1180_flexspi_nor_config.c,
so just change them to local scope.

2.'XIP_BOOT_HEADER_XMCD_ENABLE' is only used in
zephyr/boards/nxp/mimxrt1170_evk/xmcd/xmcd.c,
so just change it to local scope.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-24 12:48:35 -05:00
Benjamin Cabé
aa0e3f79d1 driver: auxdisplay: Update validation to use K_SYSCALL_DRIVER_AUXDISPLAY
Replace K_SYSCALL_OBJ() with K_SYSCALL_DRIVER_AUXDISPLAY() in syscall
handlers to validate that the requested driver operation is actually
implemented before invoking it.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-24 12:48:22 -05:00
Benjamin Cabé
3a9d5b4991 drivers: auxdisplay: add missing syscall memory checks
Add missing K_SYSCALL_MEMORY_WRITE and K_SYSCALL_MEMORY_READ
verifications in syscall handlers for pointer parameters.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-24 12:48:22 -05:00
Derek Snell
5b014704da doc: boards: nxp: add shields used to test features
Lists supported shields for driver/feature tests.

Signed-off-by: Derek Snell <derek.snell@nxp.com>
2025-12-24 12:47:47 -05:00
Merin George
a8838f7cfd driver: rtc: compilation error fixed
Infineon RTC driver compilation error fixed

Signed-off-by: Merin George <merin.george@infineon.com>
2025-12-24 12:47:18 -05:00
Merin George
1ed26473bb driver: timer: cyw20829 clock announce outside of spinlock context
Fixed the sys_clock_announce to be outside of spinlock context to
resolve the issues related to invalid spinlock when CONFIG_PM is
enabled

Signed-off-by: Merin George <merin.george@infineon.com>
2025-12-24 12:47:18 -05:00
Camille BAUD
30fa6fb3d6 tests: build_all: display: Update test cases to behave as intended
move depends on to only apply to default case, remove 'example' case,
remove unnecessary display tag on ai_m62_12f_kit

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-24 12:47:08 -05:00
Martin Hoff
8e2326e43f boards: silabs: siwx91x: add ADC configuration for siwx917 boards
Add the adc exemple configuration in boards dtsi an pinctrl.
Additionally, the SiWx917_rb4338a overlay file has been removed as
its contents have been integrated into the main device tree files.
Also, only siwg917_rb4342a is now tested in CI for adc_dt and
adc_sequence (even thought other boards can run the sample).

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-24 12:46:48 -05:00
Martin Hoff
f2741038aa boards: silabs: siwx91x: pinctrl.dtsi files for rb4338a and rb4342a
This patch moves the definition of the pinctrl for both siwg917_rb4338a
and siwg917_rb4342a boards from the board dtsi to a dedicated file.
It allows better maintenance and consistency with other boards.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-24 12:46:48 -05:00
Martin Hoff
e357c96d4a dt-bindings: adc: add new header file for Silabs SIWX91X ADC bindings
This patch introduces a new header file regarding ADC binding with
SiWx91x SoC. It allows a more friendly definition of ADC channel input.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-24 12:46:48 -05:00
Chun-Chieh Li
55e38dd937 drivers: can: numaker: refine format
Refine the format using clang-format and make no logic changes

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-24 12:46:35 -05:00
Hong Nguyen
e93279e773 drivers: stepper: include enable and microstep pins in common config
- Include the enable, m0, and m1 microstep to the common init config.
- Refactor drivers that manually init these pins to use the pins
from the common config.

Signed-off-by: Hong Nguyen <hong.nguyen.k54@gmail.com>
2025-12-23 19:50:25 +00:00
Robert Lubos
346e4d041e tests: net: lib: lwm2m: interop: Add missing PSA configs
Some PSA configs were missing for DTLS to work in LwM2M interop tests.

CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID was defined twice, so remove
redundant entry.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-12-23 19:50:17 +00:00
Alberto Escolar Piedras
4ad6857e66 tests/subsys/modem/backends/tty: Ensure it is built with proper C lib
This test itself (not the code under test) needs to be build with the
host C library as it calls into its open/close/read/write APIs.
So let's ensure we build it with it, independently of what the
default C library may be.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-23 19:49:50 +00:00
Alberto Escolar Piedras
6ef08d1221 modem: backend: tty: Support building with any C library
Ensure we call into the host C library open/close/read/write
independently of which embedded C library the code is built with.

We do this by:
a) Using the native simulator nsi_host* trampolines when we just want
   to call straight into the host libC.
b) Building in the native_simulator runner context (and therefore with
   the host C library) two functions which we call from the embedded
   side.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-23 19:49:50 +00:00
Robert Perkel
98233a966f samples: sensor: mtch9010 Added MTCH9010 Sample Code
Added sample code for the MTCH9010 device

Signed-off-by: Robert Perkel <robert.perkel@microchip.com>
2025-12-23 19:49:27 +00:00
Neil Chen
59d02942fa board: frdmmcxc444: Enable on-die temperature sensor
Enable and verify samples/sensor/die_temp_polling for frdmmcxc444

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-12-23 19:49:10 +00:00
Alain Volmat
cc7a12b3ff video: remove CONFIG_VIDEO_BUFFER_POOL_NUM_MAX=2 from conf files
VIDEO_BUFFER_POOL_NUM_MAX default value is 2 so remove it from
samples conf files setting it to that default value.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-23 19:49:00 +00:00
Alain Volmat
c4b7b7978b video: removal of VIDEO_BUFFER_POOL_SZ_MAX from Kconfig
Now that VIDEO_BUFFER_POOL_HEAP_SIZE is available is used
in all projects, VIDEO_BUFFER_POOL_SZ_MAX can be removed.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-23 19:49:00 +00:00
Alain Volmat
0b230c50d7 video: remove CONFIG_VIDEO_BUFFER_POOL_SZ_MAX in conf files
Remove all CONFIG_VIDEO_BUFFER_POOL_SZ_MAX settings in
config files.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-23 19:49:00 +00:00
Alain Volmat
3ff323b0ee video: replace CONFIG_VIDEO_BUFFER_POOL_SZ_MAX with POOL_HEAP_SIZE
Update video common code and applications to rely on the
CONFIG_VIDEO_BUFFER_POOL_HEAP_SIZE instead of
CONFIG_VIDEO_BUFFER_POOL_SZ_MAX.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-23 19:49:00 +00:00
Alain Volmat
59a223d028 video: add CONFIG_VIDEO_BUFFER_POOL_HEAP_SIZE in configs
In preparation to the renaming of CONFIG_VIDEO_BUFFER_POOL_SZ_MAX
into CONFIG_VIDEO_BUFFER_POOL_HEAP_SIZE, add the new CONFIG
in all conf files equal to POOL_SZ_MAX multiply by POOL_NUM_MAX.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-23 19:49:00 +00:00
Alain Volmat
7319cd00d5 video: add CONFIG_VIDEO_BUFFER_POOL_HEAP_SIZE description
Clarify the size of the video buffer pool by having a
dedicated CONFIG for it.  Until now the size of the
video buffer pool was equal to VIDEO_BUFFER_POOL_SZ_MAX
multiply by VIDEO_BUFFER_POOL_NUM_MAX.

This commit only add the description, the config doesn't
have yet any effect. Change will be added after all configs
are updated to define it in order to avoid breaking
platforms between 2 commits.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-23 19:49:00 +00:00
Alain Volmat
bd9202e70c boards: stm32h7s78_dk: use ext-sdram instead of SMH for display
Switch to usage of ext-sdram property (ZEPHYR_REGION) for display
buffers instead of usage via the Shared-Multi-Heap API.
The ZEPHYR_REGION mechanism offer more flexibility than the
shared-multi-heap which is allocated on the whole PSRAM.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-23 19:49:00 +00:00
Alain Volmat
184a656e68 boards: stm32n6570_dk: use ZEPHYR_REGION instead of SMH
Switch to usage of ZEPHYR_REGION for display and video
buffers instead of usage via the Shared-Multi-Heap API.
The ZEPHYR_REGION mechanism offer more flexibility than
the shared-multi-heap which is allocated on the whole
PSRAM.
If enabled, add allocation of the VENC internal buffers
from the PSRAM via the HEAP allocator.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-23 19:49:00 +00:00
Alain Volmat
c795dc5ed7 samples: video: tcpserversink: fix stm32 venc max buffer size
The CONFIG_VIDEO_BUFFER_POOL_SZ_MAX represent the size of the
biggest buffer in the pool size and not the whole pool size.
For the stm32-venc this should be 1-000-000 and not 10-000-000.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-23 19:49:00 +00:00
Alain Volmat
a299826287 video: stm32-venc: allow selection of venc internal memory pool
Allow usage of either Shared-Multi-Heap based internal memory pool
allocation or allocation from a HEAP located optional in a
Zephyr region.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-23 19:49:00 +00:00
Alain Volmat
47e031ec85 video: fix VIDEO_BUFFER_USE_SHARED_MULTI_HEAP definition
Avoid default n since this is the default for a bool config

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-23 19:49:00 +00:00
Alain Volmat
9788cedcfb video: allow placement of video buffer pool in a Zephyr region
Addition of two options in order to select the Zephyr region
into which the video buffer pool should be placed.
CONFIG_VIDEO_BUFFER_POOL_ZEPHYR_REGION allows to indicate that the
video video pool should be placed in a specific ZEPHYR region which
name is CONFIG_VIDEO_BUFFER_POOL_ZEPHYR_REGION_NAME

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-23 19:49:00 +00:00
Simone Orru
f00d633d03 MAINTAINERS: Add UUID maintainers
Add UUID library maintainers

Signed-off-by: Simone Orru <simone.orru@secomind.com>
2025-12-23 19:47:38 +00:00
Dat Nguyen Duy
fde41e8792 boards: shields: introduce a shield for s32k5xx mother board
There is no USB port or headers for lpuart on the cvb board,
thus introducing a shield for the mother board in order to
visualize serial output and expand I/O connectivity:

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2025-12-23 15:18:17 +01:00
Ha Duong Quang
b617b92028 boards: nxp: add support for NXP S32K5XXCVB board
Add support for NXP S32K5XXCVB boards which features
S32K566 SoC.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
Co-authored-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2025-12-23 15:18:17 +01:00
Dat Nguyen Duy
377922dfcf drivers: add initial support for NXP S32K566
Initial support for NXP S32K566 M7 & R52: Clock,
Pin control, GPIO and Uart

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2025-12-23 15:18:17 +01:00
Ha Duong Quang
72fb81eb9f soc: arm: introduce support for NXP S32K566 SoC
S32K566 is a member of the S32K5 family which expands
s32k3 series to higher performance and larger memory.

Zephyr port for S32K5 will support cortex-M7 and cortex-R52

After reset, swt_startup is enabled and starts running,
disable it using the watchdog hook.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
Co-authored-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2025-12-23 15:18:17 +01:00
Chun-Chieh Li
50409c7385 drivers: clock_control: numaker: support get_rate/set_rate
This adds support for clock_control_get_rate/clock_control_set_rate
API, so that module clock rate can fetch or modify via them in Hz.
Note only CANFD support is added as an reference example and other
module support will be added as-needed.

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-23 15:15:13 +01:00
Thinh Le Cong
76e8d2b8fc linker: ld: correct GNU linker generator output for block linking
Fix the issue that occurs when building with GNU and
CONFIG_LINKER_GENERATOR=y.

Currently, the GROUP {region} directive does not function properly
with GNU. The input section cannot link to the memory group
defined by "zephyr,memory-region" in the final output linker
script.

This commit updates the GNU section name parser script, allowing
it to look up both group and region for output block generation
in the final output linker script.

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-12-23 15:14:16 +01:00
Haoran Jiang
e5ce6869ff dt-bindings: pinctrl: sf32lb52: Generate pinctrl header file for sf32lb
Previously, the pinctrl macro definitions on the sf32lb platform relied on
manual maintenance, which led to some errors.
We will now use scripts to
generate the metadata, ensuring accuracy

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-12-23 15:13:56 +01:00
Evgenii Kosenko
5006ca5610 tests: Bluetooth: Tester: Enable Encrypted Advertising Data
Btp got support of EAD in f04d0196de, enabling config flag will enable
GAP/SCN/BV-01-C and GAP/ADV/BV-20-C to be executed

Signed-off-by: Evgenii Kosenko <Evgenii.Kosenko@silabs.com>
2025-12-23 15:12:50 +01:00
Benjamin Cabé
4f2ee86cd4 include: adc: add doxygen docs for lmp90xxx extended API
Adds doxygen documentation for the extended API of the LMP90xxx ADC
driver.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-23 09:33:06 +01:00
Benjamin Cabé
cecfb5b9a3 include: adc: add doxygen docs for current_sense_amplifier extended API
Adds doxygen documentation for the extended API of the current sense
amplifier driver.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-23 09:33:06 +01:00
Benjamin Cabé
3aec059e0a include: adc: add doxygen docs for current_sense_shunt extended API
Adds doxygen documentation for the extended API of the current sense
shunt driver.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-23 09:33:06 +01:00
Benjamin Cabé
327969d5ae include: adc: add doxygen docs for voltage_divider extended API
Adds doxygen documentation for the extended API of the voltage divider ADC
driver.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-23 09:33:06 +01:00
Benjamin Cabé
fb62a29b58 include: adc: add doxygen docs for ads131m02 extended API
Adds doxygen documentation for the extended API of the ADS131M02 ADC
driver.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-23 09:33:06 +01:00
Benjamin Cabé
3aa2651680 include: adc: add doxygen docs for ads1x4s0x extended API
Adds doxygen documentation for the extended API of the ADS1x4s0x ADC
driver.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-23 09:33:06 +01:00
Benjamin Cabé
781d35c4f1 include: adc: add doxygen group for device-specific ADC API extensions
Similar to how it's done for other driver classes, create a new doxygen
group to put all device-specific ADC API extensions under.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-23 09:33:06 +01:00
Zhaoxiang Jin
2f56bbc6e4 doc: release-notes-4.4: Record mcux_lpcmp driver change
Update the release-notes-4.4 to document:

1. The mcux_lpcmp driver will be deprecated.
2. The compatible 'nxp,lpcmp' for mcux_lpcmp
has now been changed to 'nxp,sensor-lpcmp'.
3. A new lpcmp driver based on the comparator
driver API has been created, and the 'nxp,lpcmp'
compatible is used for it.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-23 09:32:53 +01:00
Zhaoxiang Jin
62be60aa0f tests: comparator: enable gpio_loopback for nxp boards
enable gpio_loopback for nxp boards, including:
- frdm_mcxa153
- frdm_mcxa156
- frdm_mcxa266
- frdm_mcxa346
- frdm_mcxa366
- frdm_mcxe31b
- frdm_mcxn236
- frdm_mcxn947/mcxn947/cpu0/qspi
- frdm_mcxn947/mcxn947/cpu0
- mcx_n9xx_evk/mcxn947/cpu0/qspi
- mcx_n9xx_evk/mcxn947/cpu0

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-23 09:32:53 +01:00
Zhaoxiang Jin
0f9dcd8a3c samples: sensor: mcux_lpcmp: Update board overlays for lpcmp
Update the board overlay files for mcux_lpcmp sample to use
the sensor-lpcmp driver:

1. Delete the 'compatible' and 'clocks' properties from
   the SoC-level lpcmp nodes.
2. Set the compatible to "nxp,sensor-lpcmp" to use the
   sensor-based lpcmp driver.
3. Add '#io-channel-cells = <2>' property for sensor API.
4. Add pinctrl configuration for lpcmp0.
5. Ensure status is set to "okay".

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-23 09:32:53 +01:00
Zhaoxiang Jin
fdfed339bc boards: nxp: remove the lpcmp nodes from the board level dts
We shall enable lpcmp in application level. Enabling lpcmp
at the board level doesn't make any sense, since the lpcmp
input is determined by the application.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-23 09:32:53 +01:00
Zhaoxiang Jin
f70d57a607 dts: nxp: Update lpcmp nodes for some SoCs
1. We shall set the proper clock source for lpcmp.
2. The property '#io-channel-cells' is currently
not needed for LPCMP.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-23 09:32:53 +01:00
Zhaoxiang Jin
3cf811e302 drivers: clock_control: Enable clock control for lpcmp
1. Enable MCXA/MCXN platforms' LPCMP clock control through
the clock driver (syscon).
2. Enable MCXE platform's LPCMP clock control through the
clock driver (mc_cgm).

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-23 09:32:53 +01:00
Zhaoxiang Jin
f6f8c42b67 drivers: comparator: enable nxp lpcmp driver
enable nxp lpcmp driver based on the comparator driver API

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-23 09:32:53 +01:00
Zhaoxiang Jin
f85158fea5 drivers: sensor: mark mcux_lpcmp as deprecated
We are planning to implement a new lpcmp driver based on the
comparator API and deprecate the current sensor-based driver.
We now mark the mcux_lpcmp as deprecated.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-23 09:32:53 +01:00
Zhaoxiang Jin
7371e94ec7 dts: bindings: rename nxp,lpcmp.yaml to nxp,sensor-lpcmp.yaml
We are planning to implement a new LPCMP driver based on the
comparator API and deprecate the current sensor-based driver.
We would like to use the nxp,lpcmp binding for the new
comparator-based driver implementation. To avoid naming conflicts,
we are renaming the current sensor binding to nxp,sensor-lpcmp.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-23 09:32:53 +01:00
Carlo Caione
54d4cdc897 drivers: lora: lbm: Defer radio initialization until first config
Split device initialization into two phases across all LBM drivers:

1. Boot-time init: Minimal device initialization
2. First config: Radio hardware initialization

This deferred initialization approach provides full control over the
radio hardware, allowing applications to perform any necessary setup
before the radio is initialized. The radio init is automatically
triggered on the first call to lora_config().

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2025-12-23 09:32:34 +01:00
Carlo Caione
c6b369e1a3 drivers: lora: lbm: Add DIO1 GPIO callback API
Add functions to register and unregister user GPIO callbacks for DIO1
interrupts on LBM lora radio devices. This allows external code (e.g., the
LoRa Basics Modem HAL) to receive notifications when DIO1 fires.

The driver configures the pin mask automatically based on the DIO1 pin
from devicetree.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2025-12-23 09:32:34 +01:00
Zhaoxiang Jin
965e921aea scripts: check_compliance: read text files as UTF-8 on Windows
KeepSorted can fail on Windows when the active code page is
not UTF-8 (e.g. GBK), because text files in the Zephyr tree
are UTF-8. Detect file type via libmagic and only process
text/* files, avoiding attempts to decode binary content.
Open text files via GIT_TOP / <path> with encoding="utf-8"
(and errors="surrogateescape") to prevent UnicodeDecodeError
during local compliance runs without changing the KeepSorted
sorting rules.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-23 07:54:10 +01:00
Farsin Nasar V A
c99b9ab3cb drivers: hwinfo: microchip: Update g1 hwinfo driver
replace reset cause masks with RSTC G1 bit names.

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-23 07:53:42 +01:00
Hake Huang
1001d9aad7 boards: frdm_mcxn947: add net:ether support
add support for ethernet for integration and testing

Signed-off-by: Hake Huang <hake.huang@nxp.com>
2025-12-23 07:53:25 +01:00
Braeden Lane
1bc9b2d05a drivers: counter: infineon_tcpwm: refactor to use TCPWM block base
Refactor the Infineon TCPWM counter driver to use the TCPWM block base
address instead of the counter instance base address. This change aligns
with the standard Infineon PDL API which requires the TCPWM block base
and counter index as separate parameters.

This modification maintains functional compatibility while providing
better alignment with the underlying hardware abstraction layer.
This also aligns with PR feedback to move the ifx_tcpwm.h header file
from the include folder (public APIs) to the drivers folder. Instead,
this refactoring prepares to remove that header file entirely.

Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
2025-12-23 07:53:09 +01:00
Kyle Bonnici
4468fbfae0 Boards: align ranges to DTS spec
Spec - Section 2.3.8

> If the property is defined with an <empty> value, it specifies that
the parent and child address space is identical, and no address
translation is required.

Spec - Table 2.3

> <empty>: Value is empty. Used for conveying true-false information,
when the presence or absence of the property itself is sufficiently
descriptive.

`ranges = <>;` should be interpreted as `<prop-encoded-array>` with
empty array, when processing the child the ranges should be used and
given it is and empty array we will fail to map and behaviour
is undefined by the dts spec!

Hence IMO `ranges;` is the correct syntax here. This leaves no space
for uncertainty and undefined behaviour by tools and
user interpretation.

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2025-12-23 07:52:54 +01:00
Benjamin Cabé
0a3bc8fa70 include: disk: add doxygen docs for stm32_sdmmc extended API
Adds doxygen documentation for the extended API of the STM32 SDMMC
driver.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-23 07:52:45 +01:00
Benjamin Cabé
7778a15d1e include: disk: add doxygen group for device-specific Disk Access extensions
Similar to how it's done for other driver classes, create a new doxygen
group to put all device-specific Disk Access extensions under.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-23 07:52:45 +01:00
Andrzej Głąbek
c728da88d8 drivers: mspi_dw: Fix conditionally defined masks
This is a follow-up to commit 59d8fbc0a9.

Add missing brackets in mask definitions that use `COND_CODE_1()`.
Without those, the call to `__DEBRACKET()` that is done inside
`COND_CODE_1()` removes the outer brackets provided by `GENMASK()`,
what causes problems when the mask is directly used with another
operator like `~`.
Remove also no longer needed brackets added in `start_next_packet()`
by the commit mentioned above as a workaround for this problem,
the root cause of which was not identified at that time.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-12-23 07:52:32 +01:00
Fengming Ye
a957c6311d wifi: nxp: support nxp wifi with custom host platform
Add CONFIG_NXP_WIFI_CUSTOM_HOST to build with custom
host platform.

Signed-off-by: Fengming Ye <frank.ye@nxp.com>
2025-12-23 05:08:39 +01:00
Fengming Ye
17c2a3f8fc manifest: update hal_nxp revision to support custom host platform for WiFi
Add CONFIG_NXP_WIFI_CUSTOM_HOST to customize host platform for
NXP Wi-Fi card.

Signed-off-by: Fengming Ye <frank.ye@nxp.com>
2025-12-23 05:08:39 +01:00
Peter Wang
7199c4081f boards: frdm_mcxaxx6,frdm_mcxa577: enable reset driver
1. enable reset driver for frdm mcxa boards below:
    - frdm_mcxa266
    - frdm_mcxa346
    - frdm_mcxa366
    - frdm_mcxa577

Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
2025-12-23 05:08:14 +01:00
Kate Wang
68988108ee drivers: mipi_dbi: add support for DBI color coding
Add new configuration item color_coding in the structure
mipi_dbi_config and in mipi-dbi-device binding property.
The color coding is defined by MIPI Alliance Standard for
Display Bus Interface v2.0, which is required by some display
controllers and device.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-23 05:07:28 +01:00
Kate Wang
5671a4357b drivers: mipi_dbi: Fix typo for color coding
Fix typo for color coding

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-23 05:07:28 +01:00
Nicolas Moreno
9b6c862121 dt-bindings: mipi_dbi: fixing pulse diagrams
Some diagrams on the file dt-bindings/mipi_dbi/mpi_dbi.h
doesn't deploy the correponsing pulse signal, many of them
the rising flag looks moved some spaces before or after
the rising/falling time. This is fixed by replacing
tasb with spaces

Signed-off-by: Nicolas Moreno <niko722795@gmail.com>
2025-12-23 05:05:52 +01:00
Chen Xingyu
595a8e8c11 doc: migration-guide-4.4: Document M5Stack Fire pinctrl changes
Add a migration entry describing the pinctrl changes on the M5Stack Fire
board.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-12-23 05:04:48 +01:00
Chen Xingyu
d7f6275d1c boards: m5stack: fire: Add node label for PORT.A
Add a `zephyr_i2c` node label pointing to `i2c0`, which is the bus used by
Units connected through Grove PORT.A. This follows the convention already
used on the Core2 and CoreS3 boards.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-12-23 05:04:48 +01:00
Chen Xingyu
3c295aa883 boards: m5stack: fire: Fix Grove PORT.C UART pinctrl
According to the M5Stack Fire v2.7 documentation, the HY2.0-4P Grove PORT.C
is wired to GPIO16 and GPIO17.

Update the DTS pinctrl configuration to route the PORT.C UART to these pins
so that the Grove connector matches the official hardware documentation.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-12-23 05:04:48 +01:00
Yangbo Lu
c3a3c2bd99 drivers: sdhc: imx_usdhc: support scatter gather DMA transfer
Supported scatter gather DMA transfer.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-23 05:04:25 +01:00
Yangbo Lu
e212f3e8f4 sd: sd_ops: initialize sdhc_data variables
Initialize sdhc_data variables.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-23 05:04:25 +01:00
Yangbo Lu
f45e1d528b drivers: sdhc: introduce scatter gather transfer support
Introduced scatter gather transfer support.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-23 05:04:25 +01:00
Greter Raffael
fdd6cb4469 drivers: display: ssd1306: Allow rotation at run-time
Implement set_orientation api

Inverting segment_remap and com_invdir at the same time, rotates the
screen by 180 degrees.

Signed-off-by: Greter Raffael <rgreter@baumer.com>
2025-12-23 05:03:01 +01:00
Jordan Yates
d2cd86800c tests: disk: disk_access: test disk_access_erase
Test the disk erase functionality.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-23 05:02:05 +01:00
Jordan Yates
8d51481128 tests: disk: disk_access: align sector and erase sizes
Ensure that `sector-size` and `erase-size` match for the test.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-23 05:02:05 +01:00
Jordan Yates
b11c0f1b60 disk: sdmmc_stm32: implement disk_access_erase
Add support for erasing blocks to the STM32 SDMMC driver.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-23 05:02:05 +01:00
Jordan Yates
f52fa40b04 disk: loopback: implement disk_access_erase
Implement `disk_access_erase`, which requires a sector sized buffer
of 0's to provide to `fs_write`.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-23 05:02:05 +01:00
Jordan Yates
16d0daec8a disk: flashdisk: implement disk_access_erase
Implement `disk_access_erase` for flash disks.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-23 05:02:05 +01:00
Jordan Yates
e02b85a378 disk: ramdisk: implement disk_access_erase
Implement `disk_access_erase` by setting all bytes to 0x00, with the
same bounds checking as `disk_access_write`.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-23 05:02:05 +01:00
Jordan Yates
36a926f932 disk: sdmmc: implement disk_access_erase
Implement the `disk_access_erase` function by calling out to the lower
layer SD card drivers.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-23 05:02:05 +01:00
Jordan Yates
3050daaecc storage: disk_access: add disk_access_erase
Add the `disk_access_erase` command to complement the read and write
commands.

As a backwards compatible new feature, this increments the API version
from `1.0.0` to `1.1.0`.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-23 05:02:05 +01:00
Jordan Yates
2f47985a9e sd: sd_ops: add block_erase implementation
Add a function for erasing a chunk of blocks.

The SD Card Association Pt1 Simplified Physical Layer Specification
recommends to erase many blocks simultaneously in order to enhance data
throughput (4.3.5.1).

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-23 05:02:05 +01:00
Derek Snell
348ae31ccc doc: nxp: add link to Board Support Status
Adds to common footer for all board doc pages.

Signed-off-by: Derek Snell <derek.snell@nxp.com>
2025-12-22 22:40:21 +01:00
Camille BAUD
ae9f04b556 drivers: i2c: bflb: Fix I2C again
Take nuclear option to handling compiler failing at compiling

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-22 22:33:56 +01:00
Benjamin Cabé
81ac3f9a7f include: Bluetooth: Host: add doxygen docs for GAP timer macros
This adds proper doxygen documentation for the GAP timers macros.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-22 22:33:39 +01:00
Peter Mitsis
3a8c9797ca kernel: Re-instate metaIRQ z_is_thread_ready() check
Re-instate a z_is_thread_ready() check on the preempted metaIRQ
thread before selecting it as the preferred next thread to
schedule. This code exists because of a corner case where it is
possible for the thread that was recorded as being pre-empted
by a meta-IRQ thread can be marked as not 'ready to run' when
the meta-IRQ thread(s) complete.

Such a scenario may occur if an interrupt ...
  1. suspends the interrupted thread, then
  2. readies a meta-IRQ thread, then
  3. exits
The resulting reschedule can result in the suspended interrupted
thread being recorded as being interrupted by a meta-IRQ thread.
There may be other scenarios too.

Fixes #101296

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-12-22 22:33:18 +01:00
Grzegorz Swiderski
83d3092d30 samples: fs: zms: Update to showcase 64 bit ID support
ZMS IDs are not necessarily 32 bit anymore, so the sample ought to
reflect that.

When the sample is built with CONFIG_ZMS_ID_64BIT=y, the KEY_VALUE_ID
will use a 64 bit value, chosen so that it would conflict with CNT_ID
only if 64 bit IDs were not handled properly.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2025-12-22 22:32:53 +01:00
Grzegorz Swiderski
298798a4b8 tests: fs: zms: Refine test_zms_id_64bit
By request, add another loop to fill an extra sector with small data
entries only (4 bytes per entry in the 64 bit ID case).

This should cover ZMS' special case handling of different data sizes.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2025-12-22 22:32:53 +01:00
Grzegorz Swiderski
0ebf13c3b7 tests: fs: zms: Add tests for free space calculation functions
Previously, there was no proper test coverage of `zms_calc_free_space()`
or `zms_active_sector_free_space()`, so they had some undiscovered bugs.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2025-12-22 22:32:53 +01:00
Grzegorz Swiderski
a39b2779ee fs: zms: Reformulate zms_calc_free_space
The initial implementation had a couple of flaws, including:

  * Generally overcounting the free space by ATE_SIZE bytes per sector.

  * Counting multiple ATEs of the same ID if placed in the same sector.
    The correct behavior is to only count the most recent entry.

  * When a sector was mostly or completely filled with small data sizes,
    there was a correction term applied in the wrong location.

  * The same correction term would be mistakenly applied when a sector
    was filled with only delete ATEs, which resulted in undercounting
    the free space in that sector.

This is addressed by rewriting the API according to a simple principle:
the total free space in a filesystem should equal the sum of free space
in every GC'd sector (minus 1 sector reserved for GC itself).

This should work because during garbage collection, ATEs are not moved
between sectors arbitrarily. Only one sector gets GC'd at a time and
every entry in sector N gets either removed or copied to sector N-1.
This means that any two valid entries that occupy a single sector would
still occupy a (different) single sector before and after the operation.

This property lets us simplify the total free space calculation by
considering one sector at a time and reapplying the calculation which
was just introduced for `zms_active_sector_free_space()`.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2025-12-22 22:32:53 +01:00
Grzegorz Swiderski
491a86ca53 fs: zms: Reformulate zms_active_sector_free_space
The initial implementation had a flaw in it: when an active sector was
almost full, the naïve calculation could easily underflow and return a
negative value, which would be misinterpreted as an errno.

Rewrite this API to satisfy the following, reasonable expectations:

  * Always return a non-negative value, provided ZMS is initialized.

  * Always return 0 if no more data can be written into the sector
    without triggering garbage collection.

  * Never return a value less than the actual number of bytes that can
    still be written into the sector.

This requires awareness of a few special cases in ZMS. These are now
captured in a helper function, which will be reused later.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2025-12-22 22:32:53 +01:00
Ayush Singh
63ff14e3d8 net: dns: resolve: Combine AR and AN handling
Use the same function to parse all records. The main difference is that
answer record handling matches the answer with the initial query, i.e.
AAAA query will have AAAA answer record. Additional records do not have
any matching with the original query.

Also just warns if an additional record parsing fails. But answer record
parsing is an error.

Tested on BeagleConnect Freedom

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-12-22 20:42:08 +01:00
Ayush Singh
31bc3b016b net: dns: resolve: Add additional record support for PTR query
As described in Section 12 of RFC 6763 [0], DNS-SD responses can contain
SRV, TXT and A/AAAA under additional records. This is done even in the
zephyr DNS service advertisement. So these additional records should be
passed to the user for handling.

Most of the code for additional records is taken from normal dns answer
unpacking. However, I have split the handling into a separate function
since I have only added additional records handling for DNS-SD. The same
code should be usable for answer record as well if required. The main
thing missing from additional record code is that we do not need to
match the query type to the response type.

Tested on BeagleConnect Freedom.

[0]: https://datatracker.ietf.org/doc/html/rfc6763.html#section-12

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-12-22 20:42:08 +01:00
Mathieu Choplain
2c004260b8 drivers: entropy: stm32: fix build breakage on STM32WB06/07
These SoCs don't have LL_PKA_IsEnabled() due to the PKA IP being different.
Since PKA can operate without RNG clock on entire STM32WB0 series, skip
the check on the entire series which avoids the call to non-existent
function on STM32WB06/07 and fixes build.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-22 20:41:35 +01:00
Lukasz Majewski
5fdffd8e1e boards: doc: Update information regarding memory sizes for stm32g474re MCU
According to STM's website:
https://www.st.com/en/microcontrollers-microprocessors/stm32g474re.html

the stm32g474re has larger FLASH and SRAM sizes than stated in the
Zephyr's documentation.

Signed-off-by: Lukasz Majewski <lukma@nabladev.com>
2025-12-22 20:41:22 +01:00
Benjamin Cabé
2954eff7f1 include: display: ssd16xx:: add doxygen docs for ssd16xx extended API
Adds doxygen documentation for the extended API of the Solomon SSD16XX
EPD display controller driver.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-22 20:40:57 +01:00
Benjamin Cabé
29c7d7a3f0 include: display: add doxygen group for Display API extensions
Similar to how it's done for other driver classes, create a new doxygen
group to put all device-specific Display API extensions under.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-22 20:40:57 +01:00
Benjamin Cabé
348ec106d3 include: display: mipi_display: add missing doxygen comments
Ensure that all enumerators have proper doxygen comments.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-22 20:40:36 +01:00
Mathieu Choplain
1aebea1490 soc: st: stm32: handle debug power mode in common code for WBA series
Perform call to LL_DBGMCU_{Dis,En}ableDBGStandbyMode() for STM32WBA series
in the common code, as done with other series. While at it, also add
missing call to LL_DBGMCU_{Dis,En}ableDBGStopMode().

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-22 20:39:53 +01:00
Seppo Takalo
c57042e3ca net: lib: shell: dns: Don't hard code the timeout to 2s
The hard coded 2s timeout might be too small for LTE and Nb-IoT
networks.

Instead use already existing CONFIG_NET_SOCKETS_DNS_TIMEOUT

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-22 20:39:21 +01:00
Seppo Takalo
07eec81f93 modem: cmux: Change default timeouts to match 3GPP TS 27.010
3GPP TS 27.010 defines default timeouts as follows:
* Acknowledgment Timer (T1), min 10ms, max 2.5s default 100ms
* Response Timer for multiplexer control channel (T2),
  min 20ms, max 2.5s, default 300ms
* Add Kconfig for both T1 and T2 timers

The Response Timer for wake-up procedure(T3) is already a Kconfig
and its default match the specification.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-22 20:39:01 +01:00
Qingsong Gou
7774970ccc drivers: i2c: sf32lb: add i2c interrupt-driven support for sf32lb
Add i2c interrupt-driven support for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-22 20:38:27 +01:00
Seppo Takalo
f833ff533d modem: cmux: Add retry counter for SABM, CLD and DISC control messages
Add retry counter for opening and closing CMUX as well as
opening and closing the DLCI channel.

Use same retry counter for both DLCI control messages as well as CMUX
control messages as there is very minimal room for race condition.
DLCI messages are only send when CMUX control channel is open.

Where relevant, use disconnect(cmux) for all closing calls.
So we have one entry point for cleaning.

Similarly refactor modem_cmux_on_dlci_frame_dm() to dlci_close() as
this is the single function to close and clean up a channel.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-22 20:38:15 +01:00
Seppo Takalo
64459fbb50 modem: cmux: Drop invalid response frames
Drop invalid response frames when in connected state.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-22 20:38:15 +01:00
Jamie McCrae
014ccd3c40 boards: nordic: Add default Kconfig for (Q)SPI NOR page size
Changes the default page size to 4096 (4KiB) for SPI/QSPI NOR flash
devices if MCUboot is enabled to allow for swap updates to work by
default

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-12-22 20:37:38 +01:00
Tahsin Mutlugun
58cf208b8f drivers: timer: cortex_m_systick: Restore SysTick config after reset
Restore the clock source and exception bits in the CTRL register after
waking from low-power modes that reset SysTick. Also reconfigure the
interrupt priority.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-12-22 20:37:27 +01:00
Grzegorz Chwierut
29e8a95004 tests: Aligned with changes in pytest-twister-harness plugin
Aligned with changes in pytest plugin, where added support
of multiple connections from one device.

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2025-12-22 20:36:34 +01:00
Grzegorz Chwierut
fca50869b8 samples: icmsg: Updated to verify output from both cores
Changed 'harness: console' to 'harness: pytest' to verify output
from both application and network cores using the new multiple
UART connection support. The pytest test reads from connection_index=0
(application core) and connection_index=1 (network/remote core) to
validate IPC communication on both sides.

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2025-12-22 20:36:34 +01:00
Grzegorz Chwierut
2d80ffafb4 samples: sysbuild: hello_world: Simplify dual UART test with new API
Replace manual serial port handling with the new multiple UART
connection support from pytest-twister-harness. The test now uses
connection_index=1 to read from the second core UART instead of
managing a separate serial connection fixture.

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2025-12-22 20:36:34 +01:00
Grzegorz Chwierut
10533cedbe doc: twister: Add multi-core testing support documentation
Document the new multiple UART connection support in pytest-twister-harness
plugin. Hardware devices can now access multiple connections using the
connection_index parameter (0=main UART, 1=second core UART).
Also update readlines_until() examples to use explicit regex= parameter
for improved API clarity.

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2025-12-22 20:36:34 +01:00
Grzegorz Chwierut
4b6ad9db3c tests: twister: Update unit tests to support miltiple ports
Updated unit tests from pytest-twister-harness
with wupport of multiple connextions.

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2025-12-22 20:36:34 +01:00
Grzegorz Chwierut
1b7810f0cb scripts: twister: Support multiple ports in pytest-twister-harness
Add support for multiple connections (e.g. UART) from one device,
enabling communication with second core UARTs. Feature implemented
by extracting connection logic from DeviceAdapter to new
DeviceConnection class with specialized implementations:
- SerialConnection for hardware UART ports
- ProcessConnection for native simulation
- FifoConnection for QEMU communication
Each connection maintains separate log files (handler.log,
handler_1.log, etc.) and can be accessed via connection_index
parameter in device methods like readline() and write().
This enables testing multi-core applications where different
cores communicate through separate UART interfaces.

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2025-12-22 20:36:34 +01:00
UMA PRASEEDA
0d448cc2c1 doc: Add info about supported boards for nRF52840 debug
Add info about supported boards for nRF52840 debug
in the nRF52840 DK page

Signed-off-by: UMA PRASEEDA <uma.praseeda@nordicsemi.no>
2025-12-22 17:34:05 +01:00
Benjamin Cabé
af171d4d3b drivers: uart: fix incorrect handler check in uart_configure syscall
The z_vrfy_uart_configure function was incorrectly checking for the
existence of the 'config_get' handler instead of 'configure'.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-22 14:50:23 +01:00
Camille BAUD
020d0fe5d8 soc: bflb: Increase default main stack size
Set it to something more appropriate

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-22 14:49:15 +01:00
Kai Vehmanen
6efe5cb687 soc: intel_adsp: tools: add Intel WCL support to cavstool.py
Add PCI DID for Intel Wildcat Lake to cavstool.py.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2025-12-22 14:49:08 +01:00
Kai Vehmanen
afbdea8995 soc: intel_adsp: tools: add Intel NVL support to cavstool.py
Add support for intel_adsp/ace40/nvl platforms into cavstool.py.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2025-12-22 14:49:08 +01:00
Robert Lubos
cf04a04680 net: mqtt: Allow to force native TLS on MQTT socket
Add a parameter to MQTT TLS configuration that allows to force native
TLS on a socket if offload dispatcher is used. This allows for MQTT to
use native TLS implementation with an offloaded TCP socket.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-12-22 14:48:56 +01:00
Håvard Reierstad
ae21970a79 Bluetooth: Host: Add L2CAP chan send warning
Adds a warning to `bt_l2cap_chan_send` that the user must not pass
buffers to this function whose pool has implemented a destroy callback
(net_buf_pool::destroy) that uses synchronization primitives. This is
due to the HCI driver interface not having defined rules for where a
buffer may be freed, leading to the possibility of the callback
being called from the ISR. This warning can be removed at a later point
if the HCI driver interface is redesigned to not pass the net_bufs
directly.

Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
2025-12-22 14:48:48 +01:00
Vincent Liao
8fbdc4bc69 drivers: misc: pio_rpi_pico: fix linker error with -O0
The pio_rpi_pico_get_pio function was defined as 'inline' in the
header file. This caused 'undefined reference' linker errors when
building with CONFIG_NO_OPTIMIZATIONS=y (-O0), as the compiler
doesn't inline the function and no external symbol is provided.

This patch changes the definition to 'static inline' to ensure a
local copy is generated in each translation unit when not inlined,
consistent with other helper functions in Zephyr and the Linux kernel.

Fixes #101155

Signed-off-by: Vincent Liao <vincent932693@gmail.com>
2025-12-22 14:48:30 +01:00
Mark Wang
37b22586f6 samples: bluetooth: a2dp: implement a2dp sink sample
implement the a2dp sink sample, only mimxrt1170_evk@B board's codec is
supported now.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-12-22 14:45:48 +01:00
Mark Wang
a72acbc807 samples: bluetooth: a2dp: implement a2dp source sample
implement the a2dp source sample.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-12-22 14:45:48 +01:00
Mark Wang
9b4501977b bluetooth: a2dp: implement remaining a2dp SBC codec API functions
Add implementations for the following SBC codec parameter getter functions:
bt_a2dp_sbc_get_channel_mode(): returns the channel mode (mono, dual,
stereo, joint stereo); bt_a2dp_sbc_get_subband_num(): returns the number of
subbands (4 or 8); bt_a2dp_sbc_get_block_length(): returns the block length
(4, 8, 12, or 16); bt_a2dp_sbc_get_allocation_method(): returns the
allocation method (SNR or loudness).

These functions parse the SBC codec configuration parameters and return
the corresponding values, completing the API defined in a2dp_codec_sbc.h.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-12-22 14:45:48 +01:00
zjian zhang
d70318f825 boards: add rtl872xd_evb board
add initial version of rtl872xd_evb board

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-22 14:45:39 +01:00
zjian zhang
97d266e777 drivers: gpio: fixed compile warning
fixed gpio driver compile warning

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-22 14:45:39 +01:00
zjian zhang
14e396a3b1 drivers: serial: add amebad loguart support
loguart driver support for amebad

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-22 14:45:39 +01:00
zjian zhang
6ad245a554 soc: add realtek amebad SOC integration
Add initial version of Amebad Soc integration

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-22 14:45:39 +01:00
zjian zhang
acb831f5c0 dts: arm: introduce amebad SOC Devicetree
add initial version of devicetree for amebad SOC.
amebad devicetree file is main platform dtsi file, which should
be included from board dts (e.g rtl872xd_evb.dts)

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-22 14:45:39 +01:00
zjian zhang
6a2bb8b0e2 west.yml: add support for amebad
add low level support for amebad

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-22 14:45:39 +01:00
Martí Bolívar
c960d0ed0f devicetree: clean up some code inconsistencies
The documentation is generally using 'inst' consistently to refer to
instance numbers, but a few helper macros have gone their own way.
Clean this up to restore consistency.

This addresses changes introduced somewhere around the following
commits:

- 4c8ed7dd9a ("devicetree.h: Rework
  DT_ANY_INST_HAS_PROP_STATUS_OKAY")

- ca6645d508 ("devicetree: shorten DT_ANY_INST_HAS_*_STATUS_OKAY")

- 75ab4d5507 ("devicetree: add DT_ALL_INST_HAS_PROP_STATUS_OKAY()
  macro")

- 35a8e37ac2 ("devicetree: add DT_ALL_INST_HAS_BOOL_STATUS_OKAY()
  macro")

Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
2025-12-21 11:06:52 +01:00
Duy Nguyen
419a094499 dts: renesas: ra: Fix adc compatible for ra6-cm4
The `renesas,ra-adc` compatible was replaced by `renesas,ra-adc12`,
at #95710 but one ADC devicetree node was not updated accordingly.

This commit updates the missing node to use the correct
`renesas,ra-adc12` compatible.

Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
2025-12-21 11:06:41 +01:00
Alberto Escolar Piedras
5a58989dad samples/subsys/shell/shell_module: Remove unnecessary header
To use the shell one does not need anymore to pull unistd.h,
if one uses sys_getopt, we need to include sys/sys_getopt.h

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-20 15:04:49 +01:00
Alberto Escolar Piedras
71457bd491 samples/shields/npm6001_ek: Remove unnecessary header
To use the shell one does not need anymore to pull unistd.h,
if one uses sys_getopt, we need to include sys/sys_getopt.h

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-20 15:04:49 +01:00
Alberto Escolar Piedras
f02e15acc2 samples/drivers/ipm/ipm_esp32: Remove unnecessary headers
None of these headers are needed by this file for anything.
Let's just remove them.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-20 15:04:49 +01:00
Daniel Leung
51adafd3f3 kernel: mem_domain: remove extra newline character for logging
There is no need for the newline characters when using logging
macros. So remove them.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-20 15:04:39 +01:00
Alberto Escolar Piedras
242b69e1ac tests: net: dns_resolver: Increase heap size
The test fails on 64bit targets running out of heap.
Let's just increase it.

Circumstantially it started failing after
d5982f0f89

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-20 15:04:29 +01:00
Lucien Zhao
72360f821a dts: arm: nxp: rt118x: correct ocram1_available address
correct ocram1_available reg address to fix warning log

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-20 09:20:20 +01:00
Adrien Lessard
9929ac33f4 drivers: rtc: stm32: fix rtc subsecond register read
According to the reference manual, 'When the BYPSHAD control bit is set
in the RTC_CR register [...] the value of one of the registers may be
incorrect if an RTCCLK edge occurs during the read operation'. We need
to read te subseconds register until two successive reads are equal.

Signed-off-by: Adrien Lessard <adrien.lessard.42@gmail.com>
2025-12-20 09:20:11 +01:00
Adrien Lessard
2cc9d794dc drivers: counter: stm32: fix rtc subsecond register read
According to the reference manual, 'When the BYPSHAD control bit is set
in the RTC_CR register [...] the value of one of the registers may be
incorrect if an RTCCLK edge occurs during the read operation'. We need
to read te subseconds register until two successive reads are equal.

Signed-off-by: Adrien Lessard <adrien.lessard.42@gmail.com>
2025-12-20 09:20:11 +01:00
Holt Sun
0756973f92 MAINTAINERS: Add Holt Sun as RTC driver collaborator
Add Holt Sun as a collaborator for "Drivers: RTC".

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-20 09:19:46 +01:00
Aiden Hu
5116dcc3cd boards: nxp: rw612_bga: enable USB host support
Add USB host support for rw612_bga board:
- Update board YAML to include usb_host
- Add zephyr_uhc0 node in device tree with status "okay"

Signed-off-by: Aiden Hu <weiwei.hu@nxp.com>
2025-12-20 09:19:41 +01:00
Hou Zhiqiang
03699e24fc drivers: serial: mcux_lpuart: add clock enablement
Add the clock emablement in the LPUART driver to avoid
depending on the default enablement settings.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2025-12-20 09:19:19 +01:00
Mohamed Moawad
454c2fae98 tests: crypto: mbedtls_psa: enable malloc arena for Mbed TLS
The PSA Crypto implementation in Mbed TLS requires some heap
to operate.
Provide a small malloc arena to ensure this test remains
compatible with MINIMAL_LIBC configurations
where the arena is disabled by default.

Signed-off-by: Mohamed Moawad <moawad@synopsys.com>
2025-12-20 09:19:06 +01:00
Neil Chen
58f59c13a5 soc: nxp: mcxa156: add new parts for MCXA156
Add new parts MCXA156VFT and MCXA156VLH support

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-12-20 09:17:02 +01:00
Kevin Chan
c17e057dfd soc: infinoen: edge: pse84: system clock
Update system clock related variables
otherwise Cy_SysLib_Delay or Cy_SysLib_DelayUs are incorrect

Signed-off-by: Kevin Chan <kevin.chan3@infineon.com>
2025-12-20 09:16:51 +01:00
Nikhil Namjoshi
c8f8fab1ed drivers: memc: Fix copyright and add example DTS config
Example DTS config comment is meant to help users of the
driver, with the PSRAM device tree configuration.

Signed-off-by: Nikhil Namjoshi <nikhilnamjoshi@google.com>
2025-12-20 09:16:38 +01:00
Nikhil Namjoshi
1a31990457 drivers: memc: Add imx-flexspi-is66wvs8m8 driver
Tested:
Verified that reading and writing data to the PSRAM
with MCU's FlexSPI controller in Quad Mode, works as
expected.

Signed-off-by: Nikhil Namjoshi <nikhilnamjoshi@google.com>
2025-12-20 09:16:38 +01:00
Pieter De Gendt
98ef5b1c44 REUSE.toml: Default annotate json files
It's not possible to add comments to a json file, so there's no option to
add license or copyright text.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-20 09:16:24 +01:00
Jason Yu
5194dfa380 boards: nxp: mcxw23: Add power management MCXW23 board
Add mcxw23_evk and frdm_mcxw23 platforms to the power management
test suite to validate power management functionality on MCXW23
hardware.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-20 09:15:40 +01:00
Jason Yu
dad7f6ae95 soc: nxp: mcxw2xx: Add poweroff support
Add poweroff MCXW2xx SoCs, support btn_wk pin wakeup.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-20 09:15:40 +01:00
Jason Yu
da1df411a5 soc: nxp: mcxw2xx: Enable the power management
Enabled modes:
  idle: SLEEP
  suspend: DEEP-SLEEP
  standby: POWER-DOWN with CPU retention

OS Time Base: OSTIMER with 32K clock source

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-20 09:15:40 +01:00
McAtee Maxwell
ce51e58819 drivers: enable lp_timer default for kit_psc3m5_evk
- Enable lp_timer for kit_psc3m5_evk
- Modify configuration, enabling lp_timer as default before systick

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-12-20 09:15:22 +01:00
Bill Waters
66cf8c502b drivers: timer: infineon pdl lp_timer
Add PDL-based low-power timer for the E84 board

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2025-12-20 09:15:22 +01:00
Appana Durga Kedareswara rao
d98f7ffa38 boards: amd: versalnet_rpu: Document PDI requirements for targets
Clarify the different requirements for QEMU emulation versus real
hardware deployment in the versalnet_rpu board documentation.

For QEMU target:
- XSDB (Xilinx System Debugger) is not used
- PDI (Programmable Device Image) is not required
- QEMU provides direct emulation without hardware initialization files

For real hardware target:
- XSDB and PDI file are required
- PDI contains the hardware initialization and boot configuration
  needed for the physical device

This documentation update helps users understand why PDI is optional
for QEMU testing but mandatory for physical board deployment.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
2025-12-19 13:55:41 -05:00
Vit Stanicek
d98fb0b2e5 Revert "samples: i2s_codec: Modify DMIC channel mapping"
This reverts commit d11474ce64.

Follows the reversal of 1f69b91e90, as
this commit reflects changes made in there.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-12-19 13:55:21 -05:00
Vit Stanicek
5df75500d5 Revert "drivers: audio: dmic_mcux: remove arbitrary mapping of pdm to dmic channel"
This reverts commit 1f69b91e90.

Chose to revert it because its changes constitute a deviation from
the dmic API, resulting in failing tests on affected platforms
(mimxrt685s and mimxrt595s mainly).

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-12-19 13:55:21 -05:00
Pieter De Gendt
7f97d3dd0a scripts: west: packages: Print warning on windows or run new command
On non-Windows systems execute a new program, replacing the west packages
call, when trying to install packages using pip.
For Windows, update the documented way of installing python packages,
or using 'west packages pip --install' print a warning.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-19 13:55:11 -05:00
Vincent Tardy
6497aa45b8 west.yml: update hal_stm32 revision for lib selection thanks to KConfig
Update hal_stm32 revision to support ble and link layer
libraries selection thanks to KConfig
BT_STM32WBA_LIB_CONFIG

Signed-off-by: Vincent Tardy <vincent.tardy@st.com>
2025-12-19 13:54:59 -05:00
Vincent Tardy
05e5bbeb9b bluetooth: stm32wbax: add BT_STM32WBA_LIB_CONFIG KConfig
Add new KConfig BT_STM32WBA_LIB_CONFIG specifying the configuration
of the stm32wba ble library (full or basic) depending to bluetooth
features.

Signed-off-by: Vincent Tardy <vincent.tardy@st.com>
2025-12-19 13:54:59 -05:00
Sylvio Alves
84ac9af572 drivers: bluetooth: hci: esp32: enable coded PHY support
Select BT_CTLR_PHY_CODED_SUPPORT for ESP32 variants that support
Bluetooth 5.0 coded PHY (long range). The original ESP32 series
is excluded as it only supports Bluetooth 4.2.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-19 13:54:51 -05:00
Jukka Rissanen
3824b87c19 doc: net: Update the overview.rst document
The document was missing recent updates, also some entries
were missing RFC links.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-19 13:54:42 -05:00
Lucien Zhao
aecb78a358 boards: nxp: frdm_mcxe247: add lpspi feature
support lpspi feature by enabling spi_loopback case

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-19 13:54:27 -05:00
Lucien Zhao
3756fa3c1a boards: nxp: frdm_mcxe247: add i2c feature
- support accel feature using lpi2c0 and enable accel cases:
  accel_trig/accel_polling
- enable i2c_target_api case using lpi2c0 and lpi2c1

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-19 13:54:27 -05:00
Zhaoxiang Jin
6ef3de03fa MAINTAINERS: add ZhaoxiangJin collaborator for Drivers: ADC
Add ZhaoxiangJin as a collaborator for "Drivers: ADC".

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-19 13:54:13 -05:00
Fabrice DJIATSA
31437d571d tests: boot: with_mcumgr: exclude wba6 platforms
These platforms were mistakenly not excluded during PR #100385

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-19 13:54:04 -05:00
Tom Burdick
7b7966c440 modules: hal_infineon: Fix whd includes
Updates hal_infineon to remove stray includes of cyhal  that broke the
build for folks using our wireless parts with non-Infineon
microcontrollers when building with Zephyr.

Wrap #include's of cyhal such that they are not included when building.

Signed-off-by: Tom Burdick <thomas.burdick@infineon.com>
2025-12-19 13:53:52 -05:00
Alberto Escolar Piedras
074cda5a93 net: websocket: Remove unnecessary includes
Since d45cd6716b this code does not use
types defined in the POSIX_API and therefore we do not need to work
around header include issues.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-19 13:53:14 -05:00
Mathieu Choplain
458e6f8ae3 doc: migration-guide: 4.4: ignore case for order in drivers section
The drivers section of migration guides has always been kept ordered using
a zephyr-keep-sorted block. However, due to the default sorting order, the
list elements are not always in alphabetical order: for example, 'STM32'
comes before 'Shell' because of the uppercase 'T'.

Turn on case-insensitive sorting to ensure the list is sorted in
alphabetical order and adjust the existing contents accordingly.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-19 07:54:03 -06:00
Tomi Fontanilles
9fd0737c7f manifest: add missing group to tf-m-tests
Add tf-m-tests to the tee group for consistency.

Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
2025-12-19 07:53:19 -06:00
Guennadi Liakhovetski
8c200c0f2f xtensa: mmu: (cosmetic) clean up pointer types
Use void * cleanly: avoid needless type-casts and use void * for
generic pointers instead of uint8_t *.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2025-12-19 07:53:07 -06:00
Alberto Escolar Piedras
d74ccc1bdb cmake: Do not warn on deprecated symbols w CONFIG_WARN_DEPRECATED=n
CONFIG_WARN_DEPRECATED is 'y' by default.
When a user actively disables CONFIG_WARN_DEPRECATED, one would expect
that they would stop getting all deprecation warnings, not just the
ones from kconfig.
Otherwise users continue getting tons of these warnings when building
deprecated functionality.

So let's indeed disable them also for symbols and macros.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-19 07:52:31 -06:00
Grzegorz Chwierut
96985a32e8 twister: pytest: fix duplicate log lines from pytest
The combination of pytest's `-s` (--capture=no) option and
`--log-cli-level=DEBUG` was causing duplicate log output.
Fixed by replacing `--log-cli-level=DEBUG` with `--log-level=DEBUG`.
`--log-cli-format` removed as is not used.

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2025-12-19 07:51:49 -06:00
Grzegorz Chwierut
8827ea2643 twister: prevent infinite loop in required app resolution
When using --only-failed with required applications, twister could enter
an infinite loop during application dependency resolution.

Fixes #100808

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2025-12-19 07:51:23 -06:00
Jérôme Pouiller
564c6c1101 manifest: silabs: Include last fixes
hal_silabs has been updated with a few fixes related to WiFi.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-12-19 07:50:54 -06:00
Radosław Koppel
9c69cf1710 tests/flash_simulator: Test callbacks for erase and write operations
This test checks the functionality of the callbacks for erase and write
operations. The callbacks allows the modification of the simulated flash
behaviour during this operations.

Signed-off-by: Radosław Koppel <r.koppel@k-el.com>
2025-12-19 07:50:31 -06:00
Radosław Koppel
63c3c34f74 drivers/flash/flash_simulator: Add write and erase callbacks
Add the functionality that allows to register write and erase callbacks.
The callbacks can modify the behaviour of this operations.
It are meant to be used during testing of the situation when the memory
starts to generate errors or the data cannot be trusted anymore.
It expands the testing possibility, for a situation when the module
is tested that checks the data integrity and and we cannot just jump in
between its internal write and read operations to inject an error.

Signed-off-by: Radosław Koppel <r.koppel@k-el.com>
2025-12-19 07:50:31 -06:00
Michał Bainczyk
e68ae84e5b manifest: update hal_nordic to have fixes for examples
Update hal_nordic to have examples with SPIM+SPIS and
TWIM+TWIS examples fixed.

Signed-off-by: Michał Bainczyk <michal.bainczyk@nordicsemi.no>
2025-12-19 07:49:54 -06:00
Nikodem Kastelik
64be8d84b1 drivers: pwm: nrf: fix nrfx instance being zeroed on suspend
PWM driver clears its runtime state on each suspend event.
However, since nrfx 4.0 integration nrfx driver instance is part
of the runtime state structure, so clear action must be limited.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2025-12-19 07:49:28 -06:00
Ivan Iushkov
c3190d34aa Bluetooth: mesh: suppress clang warning in net.c
struct net_val is a packed struct containing
`struct bt_mesh_key dev_key` member which contains uint32_t
variable inside.
Compiling this code with llvm clang produces the following
warning:

`
error: field dev_key within 'struct net_val' is less aligned
than 'struct bt_mesh_key' and is usually due to 'struct net_val'
being packed, which can lead to unaligned accesses
[-Werror,-Wunaligned-access]
`

However, the `struct bt_mesh_key dev_key` is handled in accordance
to its actual alignment. I.e., it is copied using memcpy() which
prevents any alignment issues.

This commit resolves the following Zephyr issue:
https://github.com/zephyrproject-rtos/zephyr/issues/101144
by suppressing -Wunaligned-access warning
on the `struct net_val` declaration.

Signed-off-by: Ivan Iushkov <ivan.iushkov@nordicsemi.no>
2025-12-19 10:39:11 +01:00
Ivan Iushkov
80b4cdb744 toolchain: llvm: add -Wunaligned-access suppression
TOOLCHAIN_WARNING_UNALIGNED_ACCESS can be used to
suppress false-positive warnings generated
by llvm clang compiler caused by -Wunaligned-access option

Signed-off-by: Ivan Iushkov <ivan.iushkov@nordicsemi.no>
2025-12-19 10:39:11 +01:00
Lucien Zhao
70f6966920 boards: nxp: frdm_mcxe247: support edma feature
Enable dma case for frdm_mcxe247:
- chan_blen_transfer
- chan_link_transfer
- loop_transfer
- scatter_gather

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-19 10:38:13 +01:00
Lucien Zhao
995d289452 drivers: Kconfig.mcux_edma: add slot value for mcxe24x
set DMA_MCUX_TEST_SLOT_START value as 62 for mcxe24x

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-19 10:38:13 +01:00
Thomas Decker
1cb59d8e08 drivers: power_domain: Fix Kconfig endif comments
Fix the endif comments so they match to the corresponding if

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2025-12-19 10:37:29 +01:00
Lyle Zhu
fa8681f57f Samples: Bluetooth: HFP_HF: Enable codec negotiation and codec mSBC
Add callback `codec_negotiate` if the `CONFIG_BT_HFP_HF_CODEC_NEG` is
set.

Calling the function `bt_hfp_hf_select_codec()` if the codec ID is
valid in the callback `codec_negotiate`.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-19 10:23:35 +02:00
Lyle Zhu
fae78f60c4 sample: Bluetooth: HFP: Support voice transmission and playback
Capture the voice from PCM and play voice through Codec if the SCO
connection has been established.

Capture the voice from Codec and send out through PCM if the SCO
connection has been established.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-19 10:23:35 +02:00
Lyle Zhu
5ead2dde41 modules: hal_nxp: mcux: Send VS commands to configure controller
Send VS commands to configure the PCM pins before establishing SCO
connection.

Send VS commands to start the voice transferring when SCO connection
has been established.

Send VS commands to stop the voice transferring when SCO connection
has been broken.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-19 10:23:35 +02:00
Lyle Zhu
c848b05126 Bluetooth: Classic: Monitor setup_sco and accept_sco_req HCI commands
For some controllers, such as NXP IW612 Chipset, the PCM pins of
controller needs to be configured before the SCO connection is
established. And it requires to get the `air_coding_format` to
configure the PCM pins of controller.

So, it requires to known when the SCO connection will be established
and what the `air_coding_format` of the SCO connection.

Add the function `bt_sco_hci_cb_register()` to monitor the HCI
commands `setup_sco` and `accept_sco_req`.

Add the function `bt_sco_hci_cb_unregister()` to remove the monitor.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-19 10:23:35 +02:00
Zhaoxiang Jin
3ee9ac3898 doc: releases: Fix heading underline in migration guide 4.4
Fix the Video section heading underline to use the correct number
of equal signs to match the heading length.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-19 10:22:48 +02:00
Wouter Horré
799d189a28 rtio: executor: release mempool buffer before resetting it
`rtio_executor_handle_multishot` releases the RX buffer in case of
cancellation or error. However, in case of an sqe that uses a mempool,
it reset the buffer before that, making the release a NOOP.  Fix that by
moving the reset of the buffer to right before pushing the sqe back onto
the queue.

Signed-off-by: Wouter Horré <wouter@versasense.com>
2025-12-19 10:22:38 +02:00
Ayush Singh
b0229771d5 net: dns: resolve: Enable discovery of all service instances
The DNS-based Service Discovery has the following abstract:

   This document specifies how DNS resource records are named and
   structured to facilitate service discovery.  Given a type of service
   that a client is looking for, and a domain in which the client is
   looking for that service, this mechanism allows clients to discover
   a list of named instances of that desired service, using standard
   DNS queries.  This mechanism is referred to as DNS-based Service
   Discovery, or DNS-SD.

As is stated here, DNS-based service discovery is designed to find all
instances implementing a service, not just the first one.

Currently, zephyr `dns_resolve_service` will call the callback for only
the first client instance found. It still does receive the responses
from other instances, but those are dropped since the query is already
marked as finished. The seems incorrect behavior.

With that said, the changes in this commit are API breaking, since even
the docs already state that only the first response is currently used.
So I am fine with creating a new function for discovering all instances
if that is more acceptable.

Since DNS-SD queries expect multiple responses, timeout or manual
cancellation are the only methods to stop an in-flight request. When a
timeout happens, the callback is called with one of the following
responses:
- `DNS_EAI_ALLDONE`: If at least one successful response was received.
- `DNS_EAI_CANCELED`: If no successful response was received.

Tested with 3 BeagleConnect Freedoms (2 running mdns_responder and 1
running dns_resolve sample).

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-12-19 10:22:24 +02:00
Jeremy Truttmann
26a08c86f6 net: ethernet: Allow to disable the auto-start of ethernet interfaces
Adds CONFIG_ETH_NET_IF_NO_AUTO_START to allow
pre-configuration of Ethernet interfaces (e.g., filters, mac)
before they become operational. When enabled, net_if_up() must be
explicitly called by the application.

Signed-off-by: Jeremy Truttmann <jetstreeam.code@outlook.com>
2025-12-19 10:22:14 +02:00
Michał Stasiak
e37b89f0b4 drivers: i2s: nrf_tdm: fix application of buffer size workaround
The workaround should be applied only when needed, based
on errata symbols.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-19 10:22:03 +02:00
Biwen Li
c2d201d24e firmware: scmi: fix build issue
arch reboot is not included in PM flow, so drop
the option CONFIG_PM_LOG_LEVEL to
fix build issue:
- error: CONFIG_PM_LOG_LEVEL undeclared here (not in a function)

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-19 10:21:25 +02:00
Jason Yu
010991d049 soc: nxp: imxrt118x: Change to use __rom_region_start symbol
The boot container was using a non-standard symbol name
`__rom_start_address` for the ROM start address. This symbol
is not defined when build with `-DCONFIG_CMAKE_LINKER_GENERATOR=y`.

This commit use the symbol `__rom_region_start` which is
available for both cases.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-19 10:21:16 +02:00
The Nguyen
a713f52fe4 manifest: update hal_renesas rev to latest
Update the hal_renesas rev to fix the USB device not sending ZLP
at the end of the DCP data stage

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-12-19 10:21:07 +02:00
Thinh Le Cong
c66c4fceaa soc: renesas: ra: add rom_padding workaround for IAR ROM placement
The arbitrary ordering of ILINK may cause the .last_section
to be placed between the gaps of consecutive sections in the ROMABLE
region.

This commit adds a workaround for Renesas RA devices, which have OFS
registers placed in FLASH. Adding a small .rom_padding section at
the beginning of the ROM_REGION stabilizes the placement order and
ensures that all ROM sections remain within the expected region.

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-12-19 10:20:35 +02:00
Thinh Le Cong
2a9df8d23b soc: renesas: ra: Resolve issue when using GNU and cmake linker
Switch OFS-related linker sections from GROUP FLASH to GROUP ROM_REGION
to avoid overlapiping placement with .text when build with GNU and
CONFIG_CMAKE_LINKER_GENERATOR=y of RA boards that have OFS in FLASH

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2025-12-19 10:20:35 +02:00
Thinh Le Cong
661536331f soc: renesas: ra: Add condition check for special cases
Add condition check for dts node and multi-image build

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2025-12-19 10:20:35 +02:00
Thinh Le Cong
2baeae776d soc: renesas: ra: Initial support for IAR build tool on Renesas RA
Support IAR build tool on Renesas RA devices

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2025-12-19 10:20:35 +02:00
Yasushi SHOJI
53af11f763 drivers: timer: Remove unused CONFIG_XLNX_PSTTC_TIMER_INDEX
CONFIG_XLNX_PSTTC_TIMER_INDEX has been unused since commit 57784fb9d5
(v2.3 era), which switched to using the `DT_INST_` macro and defaulted to
the first instance via `DT_INST_REG_ADDR(0)`.

Remove the obsolete and broken CONFIG_XLNX_PSTTC_TIMER_INDEX.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2025-12-19 10:20:25 +02:00
Dima Kushchevskyi
e157c16fab tests: bluetooth: ascs: make callback expectation checks more generic
The existing ASCS test callback verification functions scale poorly and are
not easily reusable across different cases.

This change introduces a more generic approach to expectation checks by
adding `expect_bt_bap_unicast_server_cb_release_called(_expected_count,
_streams)` and similar functions, improving readability and maintainability
of ASCS unit tests.

Fixes #58034

Signed-off-by: Dima Kushchevskyi <d.kushchevskyi@sirinsoftware.com>
2025-12-19 10:20:14 +02:00
Jamie McCrae
ecd8a4bc7c cmake: modules: hwm_v2: Skip writing output on no change
Skips updating files if the output already matches the file
contents, this prevents a random occurance whereby sysbuild
reconfigures itself after a reconfiguration for no known
discernable reason

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2025-12-18 23:38:25 +01:00
Bill Waters
acbad46c1b modules: hal_infineon: CMakeLists.txt
- Only compile the mtb-hal-cat1 module's source when
CONFIG_USE_INFINEON_LEGACY_HAL is set.
- The serial-flash sub-module relies on the legacy hal.
It was getting added to all builds, including ones that
don't use the legacy hal.

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2025-12-18 23:38:09 +01:00
Benjamin Cabé
fa352c3030 doc: twister: keep definition lists uninterrupted
Move reference labels within definitions so that they do not break the
flow of definition lists.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-18 23:37:50 +01:00
Benjamin Cabé
18c1a63891 doc: fix bad indentation causing elements to render as definition lists
Fixes documents where blocks where indented to the right of their parent
causing them to render as definition lists.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-18 23:37:50 +01:00
Benjamin Cabé
5224283ea9 doc: css: re-style definition lists
Definition lists are key for explaining terminology, and making them
visually cohesive can help the reader better scan information.

This change introduces a distinct visual hierarchy by:

- Adding a vertical border to group the list items.
- Highlighting terms (dt) with a background color and rounded corners.
- Adding decorative indicators (bullets) to separate entries clearly.

The new style is also intentionally more visually distinct so that
_incorrect_ usage of definition lists (usually due to bad
indentation) can be more easily detected as it won't look good
when not used for things meant to be "definition lists" :)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-18 23:37:50 +01:00
Benjamin Cabé
a0096984dc doc: index.html: fix aria-hiddentypo
fix typo in attribute; add a missing one.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-18 23:37:50 +01:00
Benjamin Cabé
aa9f3f069a doc: update dark-mode-toggle to 0.18.0
Updates the minified JS resources corresponding to latest
dark-mode-toggle (0.18.0) release as it fixes an issue
with accessibility
See GoogleChromeLabs/dark-mode-toggle#99

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-18 23:37:50 +01:00
Benjamin Cabé
e872f2eff1 doc: index.rst: improve wording for version selector usage
Minor wording change to clarify what is meant by "use the version
selector".

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-18 23:37:50 +01:00
Benjamin Cabé
cef4fa9fb5 doc: index.html: css: improve contrast
Some tweaks to the CSS to have better contrast of the cards on the
homepage, and a few other places.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-18 23:37:50 +01:00
Benjamin Cabé
bdd8a67a6f doc: index.html: drop red border on hover for contribute card
This isn't really needed / is incosistent with how other cards react
on hover.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-18 23:37:50 +01:00
Benjamin Cabé
cb2a3aafe4 doc: css: add padding to search form gear icon
"Touch targets with sufficient size and spacing help users who may have
difficulty targeting small controls to activate the targets", so move
the gear icon a bit to give it more air.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-18 23:37:50 +01:00
Jason Yu
24f8ed75cb drivers: dma: dma_mcux_lpc: Add register backup and restore
Add for the case that the registers are not kept in some
low power modes.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-18 23:37:39 +01:00
Jason Yu
ed2af53f59 drivers: dma: dma_mcux_lpc: Support power device constraint
Call pm_policy_device_power_lock_put/pm_policy_device_power_lock_get
to coordinate with system level power modes.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-18 23:37:39 +01:00
Alex Hogen
a73e3df510 drivers: regulator/fixed: Add voltage getter to fix device never ready
When regulator-min-microvolt and regulator-max-microvolt properties are
provided in the devicetree node, a fixed regulator is never ready due to
failed initialization in regulator_common_init().

At at commit 9463d9a51d regulator_common.c
lines 68-71, if min or max voltages are set, then regulator_common_init()
attempts to get the regulator's current voltage setting so that it might
"Snap to closest interval value if out of range." However
regulator-fixed has not implemented the regulator_get_voltage() api, so
regulator_common_init() fails.

Adding an implementation for regulator_get_voltage() which returns
min voltage, just like regulator_fixed_list_voltage() does, resolves
this issue.

Fixes zephyrproject-rtos/zephyr#99339

Signed-off-by: Alex Hogen <alex@edt.com>
2025-12-18 23:37:30 +01:00
Alberto Escolar Piedras
9a0e8a4148 modules: nrf_wifi: Fix net API use
In d45cd6716b the mayority of the
Zephyr codebased was changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:53:10 +00:00
Alberto Escolar Piedras
0a8d5881d4 drivers: wifi: winc1500: Fix net API use
In 55c49cdb8f wifi
drivers were changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:53:10 +00:00
Alberto Escolar Piedras
1fcb102983 drivers: wifi: simplelink: Fix net API use
In 55c49cdb8f wifi
drivers were changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:53:10 +00:00
Alberto Escolar Piedras
9010e20e9f drivers: wifi: nxp: Fix net API use
In 55c49cdb8f wifi
drivers were changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:53:10 +00:00
Alberto Escolar Piedras
b7261fad59 drivers: wifi: eswifi: Fix net API use
In 55c49cdb8f wifi
drivers were changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:53:10 +00:00
Alberto Escolar Piedras
ecb5d3c898 drivers: wifi: esp_at: Fix net API use
In 55c49cdb8f wifi
drivers were changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:53:10 +00:00
Benjamin Cabé
e861b2681d drivers: dts: ti: fix typo in "Texas Instruments" company name
s/Texas Instrument/Texas Instruments/g

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-18 18:52:58 +00:00
Robert Lubos
46cf6e707e tests: net: socket: offload_dispatcher: Add extra test case for TLS
Socket dispatcher should create a native TLS socket with a native
underlying socket even if the socket is only bound to a native interface,
it shouldn't be needed to call ZSOCK_TLS_NATIVE specifically. This works
just fine, so add a test case for this scenario to make sure it remains
that way.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-12-18 18:52:44 +00:00
Fabio Baltieri
4cc278ffc9 drivers: spi: esp32: set dma tx/rx separately
Split the code for DMA setting to consider the tx and rx buffers
separately, this makes the driver work for use cases where tx only or rx
only is needed, such as when using this with the ws2812 driver.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-12-18 18:52:33 +00:00
Alberto Escolar Piedras
edcc44fb80 drivers: modem: hl78xx: Fix net API use
In b5588ed684, and after in
e19d78e607 the mayority of the
Zephyr modem drivers were changed to use the Zephyr native
net_ prefixed types, but a few were missing.

Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:52:23 +00:00
Alberto Escolar Piedras
d9b34059d9 drivers: modem: quectel-bg9x: Fix net API use
In b5588ed684, and after in
e19d78e607 the mayority of the
Zephyr modem drivers were changed to use the Zephyr native
net_ prefixed types, but a few were missing.

Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:52:23 +00:00
Alberto Escolar Piedras
fe41b6daf2 drivers: modem: sim7080: Fix net API use
In b5588ed684, and after in
e19d78e607 the mayority of the
Zephyr modem drivers were changed to use the Zephyr native
net_ prefixed types, but a few were missing.

Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:52:23 +00:00
Alberto Escolar Piedras
3e908843de drivers: modem: wncm14a2a: Fix net API use
In b5588ed684, and after in
e19d78e607 the mayority of the
Zephyr modem drivers were changed to use the Zephyr native
net_ prefixed types, but a few were missing.

Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:52:23 +00:00
Alberto Escolar Piedras
f64dc213fb drivers: ethernet: dsa_nxp_imx_netc: Fix net API use
In e6daacf3c9 the mayority of the
ethernet drivers code was changed to use the Zephyr native net_
prefixed symbols, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:52:13 +00:00
Alberto Escolar Piedras
fe1607844c mgmt: mcumgr: Fix remaining net API use
In d45cd6716b the mayority of the
Zephyr codebased was changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:52:06 +00:00
Alberto Escolar Piedras
bb00357557 net: lib: http: Fix net API use
In d45cd6716b the mayority of the
Zephyr codebased was changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:51:59 +00:00
Alberto Escolar Piedras
3b4cde8132 shell: backends: websocket: Fix net API use
In d45cd6716b the mayority of the
Zephyr codebased was changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:51:59 +00:00
Alberto Escolar Piedras
0be25778f7 net: sockets: objcore: Fix net API use
In d45cd6716b the mayority of the
Zephyr codebased was changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:51:59 +00:00
Alberto Escolar Piedras
88f1faec32 tests: net: all: Also build net shell disabled commands
It seems no other test (or sample) was building this.
So let's enable them in this test, so we at least build test them
somewhere.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:51:59 +00:00
Alberto Escolar Piedras
555887ec11 net: Fix net API use
In d45cd6716b the mayority of the
Zephyr codebased was changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:51:59 +00:00
Alberto Escolar Piedras
1912d88fc9 samples: net: promiscuous_mode: Fix remaining net API use
In d45cd6716b the mayority of the
Zephyr codebased was changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 18:51:59 +00:00
Fabrice DJIATSA
6687372293 tests: drivers: i2c: i2c_target_api: add support for stm32l562e_dk
- add an overlay file and enable i2c1 and i2c2 nodes.
- add stm32l562e_dk to testcase.yaml for CI testing.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-18 18:51:53 +00:00
Fabrice DJIATSA
e4d5f3ba0b tests: drivers: spi: spi_loopback: update stm32l562e_dk spi node
Move from SPI1 to SPI3 node (arduino header).

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-18 18:51:53 +00:00
Fabrice DJIATSA
95f6318b68 boards: st: stm32l562e_dk: enable sdmmc1 iDMA to fix sector write failures
The disk_access test failed during 8‑sector writes with:
- sd write error 16
- Failed to write to sector zero (assert in
tests/drivers/disk/disk_access)

Enabling idma on &sdmmc1 allows proper multi‑block transfers
and eliminates the write failure.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-18 18:51:53 +00:00
Fabrice DJIATSA
47e8e1fd68 boards: st: stm32l562e_dk: add arduino_gpio as supported periph
This is required to perform the
/tests/drivers/gpio/gpio_basic_api test.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-18 18:51:53 +00:00
Bill Waters
4926960746 samples: counter: add Infineon kit_pse84_eval
Add overlay files for the alarm sample

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2025-12-18 18:51:41 +00:00
Bill Waters
36abed5377 drivers: counter: add support for Infineon PSE84 device
- Update the driver to support the PSE84 device
 - Update to new peripheral clock allocation scheme

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2025-12-18 18:51:41 +00:00
Pieter De Gendt
56a84e8111 scripts: ci: Add ignorecase option to zephyr-keep-sorted
Allow making the zephyr-keep-sorted check ignore cases, for example:

// zephyr-keep-sorted-start ignorecase
....
// zephyr-keep-sorted-stop

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-18 18:50:54 +00:00
Alberto Escolar Piedras
64efa7dcb3 modem: ppp: Fix remaining net API use
In d45cd6716b the mayority of the
Zephyr codebased was changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 14:52:30 +00:00
Alberto Escolar Piedras
1a347f6f6c tests: net: all: Do not disable sys_getopt users
Since the shell (and its use of sys_getopt) does not have any dependency
on the POSIX_API anymore, we do not need to disable it when we disable
the POSIX_API compatibility layer.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 14:52:17 +00:00
Alberto Escolar Piedras
ddfdd8b389 tests: net: all: Also build zperf
Also build the zperf common and server code.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 14:52:17 +00:00
Alberto Escolar Piedras
f5959a898a samples: net: zperf: Do not enable the POSIX_API
This sample does not need it, and having it enabled masks uses of the
non native API by this code.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 14:52:17 +00:00
Alberto Escolar Piedras
455a0436e5 net: zperf: Fix net API use
In d45cd6716b the mayority of the
Zephyr codebased was changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 14:52:17 +00:00
Jaagup Averin
89c3443a4d dts: arm: st: f2: add adc2 and adc3
Add missing ADC2 and ADC3 nodes to stm32f2.dtsi.

Signed-off-by: Jaagup Averin <jaagup.averin@gmail.com>
2025-12-18 14:52:04 +00:00
Alberto Escolar Piedras
18bf241ec4 usb: host: usbip: Fix net API use
In c52c206e26 &
32059d7414 the USB code was changed to
use the Zephyr native net_ prefixed API, but some were forgotten
(nto[hn][ls]()). Let's change it now.

Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 14:51:52 +00:00
Alberto Escolar Piedras
b5709a3cf4 usb: next: Fix net API use
In 32059d7414 this code was changed to
use the Zephyr native net_ prefixed API, but some were forgotten
(ntohs()). Let's change it now.

Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 14:51:52 +00:00
Alberto Escolar Piedras
ba84bfea3c usb: legacy: Fix net API use
In c52c206e26 this code was changed to use
the Zephyr native net_ prefixed API, but some were forgotten
(ntohs()). Let's change it now.

Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-18 14:51:52 +00:00
Fabrice DJIATSA
6d17ab8058 test: app_development: vector_table_relocation: exclude stm32f4 serie
The vector_table_relocation.dtcm test assumes that the vector
table can be relocated to a DTCM region and executed from there.
However, on STM32F4 (Cortex-M4),this is not possible due to
architectural constraints.
The CCM RAM on STM32F4 series is connected via the D-bus,
not the ICode bus, and therefore cannot serve as an executable boot
space for the vector table.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-18 14:51:40 +00:00
Fabrice DJIATSA
e6226da734 boards: st: stm32_f3_disco: add zephyr dtcm chosen property
In the STM32F3 series, the CCM RAM can interface with
the Arm Cortex-M4 core via the I-BUS, which makes it
possible to run the vector table relocation test.

See Refman 0316 Page 50.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-18 14:51:40 +00:00
Benjamin Cabé
2bfd150128 cmake: hwmv2: optimize hardware list parsing with CMake lists
Replace inefficient string parsing loop with CMake list iteration for
processing list_hardware.py output. The previous implementation used
repeated string operations on the entire output string for each line,
which is increasingly slow as hardware list grows.

Local tests show hwmv2.cmake module loading in ~350 ms instead of
540 ms on my machine.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-18 14:51:29 +00:00
farsin NASAR V A
f6fccc57e1 tests: drivers: dma: Added sam_e54 test support files
Added sam_e54.overlay for dma test projects.

Signed-off-by: farsin NASAR V A <farsin.nasarva@microchip.com>
2025-12-18 14:51:14 +00:00
Vincent Tardy
7273479e43 soc: st: stm32wba: hci_if: allow forcing ISR registration
Add parameter to the link_layer_register_isr() to force
or not the link layer isr registration in case of multiple
function calls.
This change fixes the interrupt service when resuming
from a PM standby state.

Update Bluetooth hci_stm32wba.c driver and
IEEE 802.15.4 ieee802154_stm32wba.c driver accordingly.

Signed-off-by: Vincent Tardy <vincent.tardy@st.com>
2025-12-18 14:50:58 +00:00
Robert Cheng
44dc69d323 boards: focaltech: ft9001_eval: add evaluation board
Add support for the FocalTech FT9001 evaluation board:
- Board dts/dtsi and pinmux
- defconfig and board.cmake
- Basic documentation

The board has been tested with the following Zephyr sample:
– samples/hello_world

Signed-off-by: Robert Cheng <robert.cheng@focaltech-electronics.com>
2025-12-18 12:13:19 +00:00
Robert Cheng
5e1d28b49c drivers: serial: focaltech: add ft9001 serial driver
Add the UART driver for the FocalTech FT9001 SoC.

Signed-off-by: Robert Cheng <robert.cheng@focaltech-electronics.com>
2025-12-18 12:13:19 +00:00
Robert Cheng
384be5329d drivers: reset: focaltech: add ft9001 reset controller driver
Add reset controller driver for the FocalTech FT9001 SoC.

Signed-off-by: Robert Cheng <robert.cheng@focaltech-electronics.com>
2025-12-18 12:13:19 +00:00
Robert Cheng
8dc2103074 drivers: clock_control: focaltech: add ft9001 clock control driver
Add clock control driver for the FocalTech FT9001 SoC.

Signed-off-by: Robert Cheng <robert.cheng@focaltech-electronics.com>
2025-12-18 12:13:19 +00:00
Robert Cheng
48760eea64 dts: arm: focaltech: add ft9001 SoC dtsi
Introduce the base devicetree description for the FT9001 SoC.

Signed-off-by: Robert Cheng <robert.cheng@focaltech-electronics.com>
2025-12-18 12:13:19 +00:00
Robert Cheng
c3d0a3703f soc: focaltech: ft9001: add SoC support
Add initial support for the FocalTech FT9001 ARM Cortex-M SoC including:
- SoC Kconfig and dtsi integration points
- Early init and core setup
- Pinctrl base definitions

This prepares the tree for the FT9001 board and drivers.

Signed-off-by: Robert Cheng <robert.cheng@focaltech-electronics.com>
2025-12-18 12:13:19 +00:00
Robert Cheng
79f972db89 dt-bindings: focaltech: ft9001: add clock, reset, uart
Add devicetree bindings for the FocalTech FT9001 SoC:
- Clock controller
- Reset controller
- UART

These bindings are required by the SoC and drivers added in subsequent
commits. Headers are placed under include/zephyr/dt-bindings/.

Signed-off-by: Robert Cheng <robert.cheng@focaltech-electronics.com>
2025-12-18 12:13:19 +00:00
Jun Lin
dfe251554b driver: eSPI: npcx: fix minor sonarqube issues
Fix the Quality Gate failed from sonaqube.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2025-12-18 12:10:06 +00:00
Jun Lin
8d525c4f20 driver: eSPI: npcx: fix the missing closing brace
This commit fixed the missing closing brace of the switch statement to
resolve the compiler error.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2025-12-18 12:10:06 +00:00
Chaitanya Tata
9ea5170f09 boards: nordic: nrf54h20dk: Fix CPURAD MPSL init failure
Allocate one GPIOTE channel for coex grant GPIO pin. This fixes a nrfx
assert during MPSL init in CPURAD.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-12-18 12:09:42 +00:00
Chaitanya Tata
d7a22685ec boards: shields: nrf7002eb: Add 54H coex shield
This shield is a standalone coex shield without relying on the base
Wi-Fi shield (edge_connector).

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-12-18 12:09:42 +00:00
Emil Hammarstrom
12986286de lib: hash: Ensure OA/LP hmap inserts don't return tombstones
According to the hashmap interface specification sys_hashmap_remove will
"Erase the entry associated with key `key`, if one exists"

If a rehash is performed OA/LP will return 1 and no old_value for
sys_hashmap_insert.

If a rehash is NOT performed OA/LP will return 0 and a stale old_value for
sys_hashmap_insert even though the user requested the entry for that key to
be removed.

This patch makes OA/LP not return the value of tombstoned entries.

Signed-off-by: Emil Hammarstrom <emil.hammarstrom1@assaabloy.com>
2025-12-18 12:09:36 +00:00
Emil Hammarstrom
48059d126b tests: lib: hash_map: Expect sys_hashmap_remove to erase entry
After removing an entry the user does not expect it back after
sys_hashmap_insert

Signed-off-by: Emil Hammarstrom <emil.hammarstrom1@assaabloy.com>
2025-12-18 12:09:36 +00:00
Qingsong Gou
aaf36d65b5 drivers: spi: sf32lb: add spi_sf32lb_transceive_async async API
Add spi async API support for sf32lb

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-18 12:07:46 +01:00
William Tang
510e4d1cee soc: nxp: rw: fix GAU clock configuration for ADC accuracy
Configure the GAU (General Analog Unit) clock from T3 PLL 256M with
a divider of 4 to achieve 64MHz, replacing the previous configuration
that used the main clock at 260MHz main clock with a divider of 1.

The GAU ADC has a maximum clock frequency limit of 64MHz. The previous
260MHz clock configuration caused incorrect conversion results when
operating at 12-bit and 14-bit resolutions. Using the T3 PLL 256M
source divided by 4 provides the correct 64MHz clock frequency.

This change also corrects a typo in the comment from "Attack clock"
to "Set 64M GAU clock from T3 PLL 256M and reset".

Signed-off-by: William Tang <william.tang@nxp.com>
2025-12-18 12:07:30 +01:00
Andrej Butok
da5755f893 MAINTAINERS: add butok collaborator for NXP drivers
Add butok (Andrej Butok) as a collaborator for "NXP Platform Drivers".

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2025-12-18 12:07:21 +01:00
Ederson de Souza
ace1b87e15 samples/subsys/pmci/mctp: Add npcx4m8f_evb overlays for I2C-GPIO
So that one can run the I2C-GPIO owner/endpoint samples on it.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-12-18 12:07:03 +01:00
Ederson de Souza
621a7aa686 samples/subsys/pmci/mctp: Keep board specific config on board file
So that users of other boards don't see meaningless warnings during
build.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-12-18 12:06:55 +01:00
Ederson de Souza
b9f10bec52 samples/subsys/pmci/mctp: More friendly I2C-GPIO samples messages
This is done by:
  - No more sending periodic messages from endpoint to owner - keep
    parity with UART sample: owner sends periodic ping to endpoint, that
    replies to those;
  - Waiting one second between each message sent by the owner, so people
    can actually see what's going on;
  - Wrapping the content of the messages (strings "ping" and "pong")
    in quotes, so it's clear what they are;
  - Toning down the logging to INF - no need for DBG.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-12-18 12:06:55 +01:00
Ederson de Souza
5f5e17e08c samples/subsys/pmci/mctp: Set allocation functions on I2C samples
Without those, allocation for MCTP packets can cause subtle - or not so
subtle - bugs.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-12-18 12:06:55 +01:00
Ederson de Souza
0cdf8694e0 subsys/pmci/mctp: I2C-GPIO controller interrupt fix
MCTP I2C-GPIO controller wasn't properly reenabling interrupt on the
GPIO line after disabling it during transfer.

This patch also uses `GPIO_INT_LEVEL_ACTIVE` instead of
`GPIO_INT_LEVEL_HIGH` to respect GPIO active state.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-12-18 12:06:55 +01:00
Ederson de Souza
8401bcfb7a subsys/pmci/mctp: Fix I2C-GPIO target reading
State machine handling RX data wasn't transitioning to "receive" mode.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-12-18 12:06:55 +01:00
Albort Xue
df3823b812 samples: drivers: spi_flash: Add supports of flexspi_nor
Added supports of nxp_imx_flexspi_nor flash.

Signed-off-by: Albort Xue <yao.xue@nxp.com>
2025-12-18 12:06:46 +01:00
Qingsong Gou
ccdc0c3007 drivers: adc: sf32lb: add adc read_async support
Add adc read_async support for sf32lb

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-18 12:06:33 +01:00
Fin Maaß
97a2d6bc47 drivers: ethernet: microchip_enc424j600: use timeout directly
use Kconfig timeout directly.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-18 12:06:25 +01:00
Fin Maaß
a7d48d94b4 drivers: ethernet: microchip_enc28j60: use timeout directly
use Kconfig timeout directly.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-18 12:06:25 +01:00
Fin Maaß
f017a99f07 drivers: ethernet: microchip_lan865x: use timeout directly
use Kconfig timeout directly.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-18 12:06:25 +01:00
Fin Maaß
2cf2f8c58a drivers: ethernet: microchip_lan9250: use timeout directly
use Kconfig timeout directly.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-18 12:06:25 +01:00
Biwen Li
b196917f6c tests: bluetooth: audio: ascs: fix build issues
Fix build issues,
- error: format %x expects argument of type
  unsigned int, but argument 7 has type ssize_t
  {aka long int} [-Werror=format=]
  zassert_false(ret < 0, "attr->read returned unexpected (err 0x%02x)"
  , BT_GATT_ERR(ret));

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-18 12:06:06 +01:00
Jordan Yates
235aa1aa7f flash: flash_simulator: static programmable unit buffer
Move the programmable unit buffer used to detect double writes out of
the function stack. This fixes stack overflows when simulating flash
devices with large programming units (SPI-NAND, 2-4 kB).

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-18 09:24:40 +01:00
Jordan Yates
9d88c8cfb0 tests: unit: timeutil: test CONFIG_TIMEUTIL_APPLY_SKEW=n
Test the `timeutil` libraries compile and behave the same way
(excluding the skew application) when `CONFIG_TIMEUTIL_APPLY_SKEW=n`.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-18 09:24:34 +01:00
Jordan Yates
1d92d0b5ff utils: timeutil: option to disable clock skew
Accurately applying clock skew correction in
`timeutil_sync_ref_from_local` and `timeutil_sync_local_from_ref`
requires double-precision floating point operations. If this is the only
usage of double precision logic in the build, but clocks skews are not
used, this can be a significant ROM overhead. Disabling this option can
save ~2.4 kB of ROM.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-18 09:24:34 +01:00
Bartosz Miller
a2661d380a tests: drivers: uart: Extend UART120 testing for nrf54h20 cpuflpr
Run UART tests on 54h20 cpuflpr with uart120

Signed-off-by: Bartosz Miller <bartosz.miller@nordicsemi.no>
2025-12-18 09:19:57 +01:00
Mathieu Choplain
c8e73024da doc: migration: 4.4: place Video drivers section in sorted block
The Video drivers section was mistakenly placed below the end marker of the
zephyr-keep-sorted block.

Move it back inside the block for proper ordering.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-18 09:19:42 +01:00
Petr Buchta
53dfed0455 boards: nxp: frdm_mcxe247: Enable flash controller
This commit enables use of FTFC flash controller.
Together with DT changes it adds support for FTFC into soc_flash_mcux.c
driver.

Signed-off-by: Petr Buchta <petr.buchta@nxp.com>
2025-12-18 09:19:24 +01:00
Jason Yu
2fb46db59b drivers: hwinfo: mcux_rcm: Fix wrong comment
Correct mismatched #endif comment to reference the correct macro
FSL_FEATURE_RCM_HAS_SSRS

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-18 09:18:40 +01:00
Jason Yu
420c0f94ea drivers: hwinfo: rcm: Enable HWINFO RCM for MCXE24x and KE1xZ
Enables the MCUX Reset Control Module (RCM) to support hwinfo

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-18 09:18:40 +01:00
Jason Yu
b185fdea97 drivers: hwinfo: mcux_rcm: Improve get_supported_reset_cause
Remove the conditional compilation guard FSL_FEATURE_RCM_HAS_PARAM.
`hwinfo_mcux_rcm_xlate_reset_sources` has handled the
supported cause using `FSL_FEATURE_xxx` macros, passing `UINT32_MAX`
can get all supported reset cause.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-18 09:18:40 +01:00
Thomas Decker
fef0958ca5 arch: arm: mpu: Add missing define REGION_FLASH_SIZE for 32k and 32M
Add missing REGION_FLASH_SIZE defines when CONFIG_FLASH_SIZE is 32k or 32M

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2025-12-18 09:18:07 +01:00
Ryan McClelland
f897a24e68 drivers: i3c: cdns: fix no ibi payload
There was a misunderstanding in the spec, where if the bcr says there
is no payload, there are NO data bytes that follow the ibi address.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2025-12-18 09:17:57 +01:00
Emil Gydesen
15eb9daa87 samples: Bluetooth: CAP: Initiator: Fix test count name
Renamed total_rx_iso_packet_count to
total_unicast_rx_iso_packet_count to make it consistent
with total_unicast_tx_iso_packet_count.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-18 09:17:48 +01:00
Emil Gydesen
f66f58833f samples: Bluetooth: CAP: Acceptor: Various fixes
The sample recently started supporting multiple sink ASEs,
but only support a single sink stream. Updated the number of
sink streams supported.

Modified how/when we reset the requested_bis_sync and
FLAG_BROADCAST_SYNC_REQUESTED in the broadcast implementation.

Removed a call to bt_bap_broadcast_sink_delete that would
always fail because it was already deleted.

Modified how/when the total_unicast_rx_iso_packet_count
and total_unicast_tx_iso_packet_count values were reset,
to support a future case of CAP handover.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-18 09:17:48 +01:00
Sylvio Alves
5d1e443bdf drivers: spi: esp32: fix CS handling when using GPIO chip select
The driver was unconditionally setting hal_dev->cs_pin_id to the target
number, which activates hardware CS lines even when GPIO-based chip
select (cs-gpios) is used. This caused issues when using hardware CS
via pinctrl with reg > 0.

Also update the binding documentation to clarify the interaction between
cs-gpios and hardware CS via pinctrl.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-18 05:36:14 +01:00
Lyle Zhu
9c710107da bluetooth: hfp_ag: Add Kconfig option for in-band ringtone
Add a new Kconfig option CONFIG_BT_HFP_AG_INBAND_RINGTONE to allow
enabling/disabling the in-band ringtone capability in HFP AG profile.

The in-band ringtone feature is now conditionally compiled based on
this configuration option. When disabled, the feature flags are set
to 0 and the bt_hfp_ag_inband_ringtone() API returns -ENOTSUP.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-18 05:35:53 +01:00
Sylvio Alves
007f4427f3 drivers: serial: esp32: add UHCI SLIP encoding control
Add devicetree properties to control UHCI SLIP encoding/decoding
when using UART with DMA (async API). Both properties default to
disabled to prevent unintended data corruption.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-18 05:35:40 +01:00
John Batch
5ca16a6696 boards: infineon: kit_psc3m5_evk: Adding dma to supported devices
Adds DMA to the supported devices list for the Infineon kit_psc3m5_evk
board.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-12-18 05:35:15 +01:00
John Batch
30307e9fd1 tests: drivers: dma: Adding DMA test overlays for Infineon PSC3 board
Adding test overlays for Infineon kit_psc3m5_evk board.  Added tests:
 * tests/drivers/dma/chan_blen_transfer
 * tests/drivers/dma/loop_transfer

Signed-off-by: John Batch <john.batch@infineon.com>
2025-12-18 05:35:15 +01:00
Ederson de Souza
b13c7a2fe0 MAINTAINERS: Add edersondisouza as MCTP collaborator
Add edersondisouza as a collaborator to MCTP.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-12-18 05:35:04 +01:00
Kai Vehmanen
12a5bb2911 soc: intel_adsp: tools: cavstool.py: add I2S offload support
Program I2S link for DSP offload, allowing to run DSP tests using
the I2S/SSP interface. On ACE1.5 and older, no additional programming
is required, I2S link is available by default.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2025-12-18 05:34:54 +01:00
Wu Yingxiang
6b46f60580 boards: others: add esp32c3_lckfb board support
Add board support for LCKFB ESP32-C3 Development Board.

This board is based on ESP32-C3 with 8MB SPI flash and includes:
- Wi-Fi and Bluetooth Low Energy support
- Complete pin configuration for UART, I2C, SPI2, I2S
- OpenOCD debugging support
- Board documentation with WebP image (optimized size)

Signed-off-by: Wu Yingxiang <wuyingxiang58@gmail.com>
2025-12-18 05:34:22 +01:00
Jason Yu
77225cb32e soc: nxp: mcxw2xx: Improve OS tick timer selection
When os_timer is enabled in dts, then os_timer will be used as
OS tick timer.

To make systick as the default OS tick timer, currently os_timer
is not enabled in dts. When users want to use os_timer as
OS tick timer, they need to override the dts.

Improve the method, enable the os_timer is dts, but not enable
in Kconfig by default. If need to use os_timer as OS tick, just pass
CONFIG_MCUX_OS_TIMER=y

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-18 05:34:07 +01:00
Lyle Zhu
ba2bd21156 tests: Bluetooth: Update at test suites
Remove the dedicated buffer from the test case.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-18 05:33:30 +01:00
Lyle Zhu
9016f96e01 Bluetooth: Classic: HFP_HF: Refactor at parser
In current implementation, the additional buffer is required by AT to
store the parsing AT response data temporarily. To store the parsed
AT response data completely, the buffer size is as high as the MTU of
the RFCOMM connection. And the buffer is dedicated for each HFP HF
connection. That means the RAM usage depends on the MAX HFP HF
connection count. Actually, the RFCOMM receiving buffer is valid when
processing the received AT response. The changes aim to remove the
additional buffer and leverage the receiving buffer to process the AT
response.

And there is an issue found that the type of the additional buffer
length is `uint8_t`, while the configured RFCOMM receiving data length
is 65535. When the additional buffer length exceeds 255, the AT cannot
process the received data normally.

Replace manual buffer management with net_buf_simple in the AT command
parser. This change eliminates the need for manual position tracking
and buffer length management by leveraging Zephyr's existing buffer
utilities. And leverage RFCOMM receiving buffer instead of allocating
dedicated buffer.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-18 05:33:30 +01:00
Muhammad Waleed Badar
854240d26e dts: arm: add dts bindings for ARMv7 timer
This ensures that correct timer node is selected for
ARMv7-based platforms.

Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
2025-12-18 05:32:51 +01:00
Benjamin Cabé
29059ec3d6 scripts: ci: refresh requirements-actions.txt pinned versions and SHAs
Refresh pinned dependencies to pick filelock 3.20.1 version since 3.20.0
is subject to CVE-2025-68146.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-17 14:35:20 -08:00
Kate Wang
2b6283def7 samples: drivers: display: Enable new panel zc143ac72mipi for RT700
Add zc143ac72mipi panel configuration for RT700 platform in display
sample test configuration.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-17 13:59:06 -05:00
Kate Wang
acbd8e409a doc: boards: nxp: Add new supported panels for RT700
Add new supported panels RK055HDMIPI4MA0 and ZC143AC72MIPI
in board doc.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-17 13:59:06 -05:00
Kate Wang
0798beeb34 samples: drivers: display: Enable new panel rk055hdmipi4ma0 for RT700
Add heap size configuration and add new panel rk055hdmipi4ma0 for RT700.
It requires extra space for 720p panel.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-17 13:59:06 -05:00
Kate Wang
036220496b boards: shields: rk055hdmipi4ma0: Update RT700 configuration
Remove the external frame buffer configuration. It shall be set in
device tree instead now.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-17 13:59:06 -05:00
Kate Wang
1ffdbb4b5b boards: nxp: Add memory region definition in board dts for RT700
Add memory region definition for PSRAM space which is controlled
by XPSI2 in board dts for RT700. In this way user/developer
can place the data in the region in code more easily. This space
can be used by media domain masters like DCNano lcdif controller.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-17 13:59:06 -05:00
Kate Wang
cf7f3f672f boards: shields: rk055hdmipi4m: Update RT500 configuration
Remove the external frame buffer configuration. It shall be set in
device tree instead now.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-17 13:59:06 -05:00
Kate Wang
bf2a0f1911 boards: shields: rk055hdmipi4ma0: Update RT500 configuration
Remove the external frame buffer configuration. It shall be set in
device tree instead now.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-17 13:59:06 -05:00
Kate Wang
e55a5022f5 boards: nxp: move memory region definition to board dts for RT500
It is better to let the FLEXSPI2 memory region in the final
linker file be generated from dts, in this way user/developer
can place the data in the region in code more easily.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-17 13:59:06 -05:00
Kate Wang
1c5d236248 drivers: display: dcnano_lcdif: Update framebuffer placement and pitch
1. For the situation when the RAM space is limited and the driver's
frame buffer cannot be place in RAM, add a new property 'ext-ram' in the
binding, so if in device tree this property is assigned to a secondary
RAM space, place the frame buffer there. The old way is to define the
frame bufeer address in Kconfig, which may cause inconvenience if other
data also needs to be placed in the same RAM space.
2. Update the driver to support new requirement on RT700. The IP requires
a 64-byte alignment for the frame buffer stride.
3. Update the calculation of frame buffer size. If the pixel format is
updated, the frame buffer size shall be updated too.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-17 13:59:06 -05:00
Jason Yu
bba3582b8d drivers: interrupt: pint: Add API to get pin used IRQ slot
PINT connects GPIO pin to seperate IRQ slot. This info is
hidden in PINT driver, there is no way to know which IRQ
actually the GPIO pin is connected to.
Add new API to get which IRQ slot is connected to, based on
pin index.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-17 13:58:56 -05:00
Muzaffar Ahmed
d7900d6d5b drivers: wifi: siwx91x: Disable automatic rejoin in NWP
Disable rejoin by setting max_retry_attempts to 1. This is done to keep
the NWP state in sync with Zephyr Host, given that Zephyr does not have
a "rejoin ongoing" state.

Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
2025-12-17 13:58:40 -05:00
Sreeram Tatapudi
11243b1f8c doc: releases: migration: 4.4: Add infineon driver rename update
Adding details regarding the Infineon driver refactoring to drop
cat1 from the driver names and binding files.

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-12-17 13:58:09 -05:00
Sreeram Tatapudi
0a06f5b91a dts: bindings: Drop cat1 from the infineon binding files
Drop cat1 from the binding files to enable reuse by other
category devices as well.

Fixes #99174

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-12-17 13:58:09 -05:00
Charles Hardin
1a738a56c5 drivers: ethernet: w5500: update the driver to use mac config bindings
Since the w5500 is used in arduino shields it should use the current
code patterns since it will be examined as a reference for other
drivers. So, this is just trying to catch up to the changes that have
been made in the microchip, litex, and virtio drivers.

Use the net_eth_mac_load code pattern from those other drivers and
update a few things to the code guidelines as well.

Signed-off-by: Charles Hardin <ckhardin@gmail.com>
2025-12-17 13:57:52 -05:00
Charles Hardin
4c983d00f6 drivers: ethernet: lan9250: cleanup some un-needed code
From the prior change b38a46bade adding
in the mac configuration in the device tree it is appropriate to
remove the local mac address bindings. This is done in this commit.

There is no intended functional change

Signed-off-by: Charles Hardin <ckhardin@gmail.com>
2025-12-17 13:57:52 -05:00
Benjamin Cabé
66d6edaf5c include: firmware: scmi: add proper doxygen groups for SCMI
This adds proper doxygen groups for all public SCMI headers

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-17 13:57:45 -05:00
Benjamin Cabé
0081169359 doc: hardware: scmi: add System power management as supported protocol
There is an implementation of the System power management protocol in
the SCMI driver, so mention it.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-17 13:57:45 -05:00
Benjamin Cabé
b96c49d737 doc: hardware: scmi: fix formatting of SCMI docs
Fix incorrect indentation that caused some elements to render as
defintion lists.

Added proper nesting of the various headings as everything was top-level

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-17 13:57:45 -05:00
Sylvio Alves
f8d2e00a0e includes: remove duplicated entries in zephyr-tree
Remove duplicated #include directives within the same
preprocessor scope across the Zephyr tree.

Duplicates inside different #ifdef branches are preserved
as they may be intentional.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-17 13:57:38 -05:00
Sylvio Alves
6d5754978c drivers: flash: esp32: preserve volatile qualifier in IPM callback
Preserve the volatile qualifier when casting the shared memory pointer
in flash_cpu01_receive_cb() to avoid dropping volatile semantics during
inter-processor communication.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-17 13:57:38 -05:00
Thomas Hebb
58212cd70e drivers: wifi: airoc: Populate band in scan results
The driver gives us this information, so we just need to translate it to
Zephyr's type like we already do for security.

Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2025-12-17 13:56:10 -05:00
Ayush Singh
c64de6f1de samples: net: dns_resolve: Add 802154-subg support
- Tested on BeagleConnect Freedom along with mdns_responder sample.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-12-17 13:56:03 -05:00
Ayush Singh
12b2174e66 samples: net: mdns_responder: Add 802154-subg overlay
- Tested on BeagleConnect Freedom

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-12-17 13:56:03 -05:00
Sebastian Głąb
a5ca188d84 tests: boards: nrf: i2s: Remove test that checks I2S clock divider
Remove test from tests/boards/nrf/i2s/i2s_divider.
The i2s_divider test was relying on debug log from I2S driver.
With the recent NRFX updates log was removed.

Better test, that counts rising edges on I2S_LRCLK line was added
in downstream (https://github.com/nrfconnect/sdk-nrf/pull/26230).

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-12-17 13:55:54 -05:00
Michał Stasiak
a9d1932b23 dts: nordic: nrf54lm20a: remove clockpin from TDM
Not needed as nRF54LM20A does not support clockpin
feature in GPIO.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-17 13:55:43 -05:00
Guennadi Liakhovetski
c88758fdfb llext: make 2 arguments of llext_get_section_header() const
ext and loader aren't modified inside llext_get_section_header(),
they are just passed to llext_section_shndx(), where they're already
const. Make them const in this function too.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2025-12-17 13:55:34 -05:00
Benjamin Cabé
16164b35dc MAINTAINERS: add doc/index.html to Documentation area
add this file to make sure edits to it get proper
maintainers/collaborators pulled in

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-17 13:55:07 -05:00
Benjamin Cabé
0e041f9c59 doc: index.html: fix overflow bug on welcome admonition.
Fix a rare bug where some browsers seem to consider the welcome
admonition is overflowing.
This fixes zephyrproject-rtos/zephyr#101167.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-17 13:55:07 -05:00
Anas Nashif
516bca6e05 ci: assigner: fix condition for running script
Wrong logic in condition results in running the script with the wrong
arguments.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-17 13:54:59 -05:00
Alberto Escolar Piedras
c3229f04b5 manifest: Update nRF hw models to latest
Update the HW models module to:
0f0c43748111c65800c6920f1c0690676423a351

Including the following:
0f0c437 nrfx: Replace nrfx_gppi_domain_id_get() (requires new nrfx)
1bead00 nrf_ppi: Add support for NRF_PPI_ENDPOINT_IS_EVENT in simulation
9f11c2f NHW_misc: Add API to convert from/to simulated addr to real HW
        ones

Note: This requires an nrfx 4.0.x which is newer than 2025/12/03,
i.e. modules/hal/nordic 0dbbf4794156ca09dc2d4bad8c42dcdb54acd662 or
newer which is has been used in Zephyr main since Zephyr's
242bf65d1d

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-17 14:36:19 +02:00
Martin Lampacher
0267faf22c boards: st: update board.cmake and docs for nucleo_u0x
Added stlink_gdbserver as a runner for the nucleo_u0x boards.
Updated the boards' documentation to mention that JLink runners
do not work with the onboard debug probe and removed mention
of the unsupported openocd runner.

Signed-off-by: Martin Lampacher <martin.lampacher@gmail.com>
2025-12-17 14:36:10 +02:00
Jukka Rissanen
d51356fd07 samples: net: pkt_filter: Add example of how to handle UDP/TCP packets
Add support for LOCAL_IN rules that can be tracked UDP or TCP packets.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-17 14:36:01 +02:00
Jukka Rissanen
720408036e net: pkt_filter: Add API for catching UDP/TCP packets
Allow user to setup a hook function that is called for each
received UDP or TCP packet.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-17 14:36:01 +02:00
Lucien Zhao
9a1dd6ebab tests: arch: arm: add ARM MPU write-through test
Add test suite for ARM MPU write-through cache functionality including:
- Cache coherency validation with dma ways
- Cache coherency validation

Support case on mimxrt1180_evk cm33/cm7 cores

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-17 14:35:50 +02:00
Lucien Zhao
9e42f9fc34 arch: arm: mpu: Add Kconfig options for SRAM Write-Through cache policy
- CONFIG_ARM_MPU_SRAM_WRITE_THROUGH: enables Write-Through cache policy
  for SRAM regions instead of default Write-Back

Includes corresponding MPU attribute macros for ARMv7-M and ARMv8-M
architectures. Maintains backward compatibility with existing
configurations.

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-17 14:35:50 +02:00
Thinh Le Cong
5fdd2a67bc doc: releases: Update migration guilde for ADC driver
Update the migration guilde for ADC driver when support
16-bit resolution

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2025-12-17 14:35:27 +02:00
Thinh Le Cong
a218c92592 drivers: adc: Remove doxygen comment blocks
Remove all doxygen comment blocks on driver

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2025-12-17 14:35:27 +02:00
Thinh Le Cong
57361327d8 samples: drivers: adc: Add tests support for ADC driver on EK-RA2A1 board
Add Renesas EK-RA2A1 board support for sample:

- samples/drivers/adc/adc_dt

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2025-12-17 14:35:27 +02:00
Thinh Le Cong
231bf62f7f tests: drivers: adc: Add tests support for ADC driver on EK-RA2A1 board
Add Renesas EK-RA2A1 board support for these tests:

- tests/drivers/adc/adc_api
- tests/drivers/adc/adc_accuracy_test

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2025-12-17 14:35:27 +02:00
Thinh Le Cong
25fd4d2393 boards: renesas: Add ADC device node for EK-RA2A1 board
Add ADC device node on board layer to support ADC 16-bit on EK-RA2A1

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2025-12-17 14:35:27 +02:00
Thinh Le Cong
67284c5515 dts: arm: renesas: Add ADC device node for EK-RA2A1 and set unit prop
Add ADC device node to support ADC 16-bit on EK-RA2A1
Update other Renesas board nodes to include the "unit" property

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2025-12-17 14:35:27 +02:00
Thinh Le Cong
0ed8c6fa93 drivers: adc: Adding ADC 16-bit driver support for board EK-RA2A1
Adding ADC 16-bit driver compatible to support ADC16 on RA2A1

Signed-off-by: Thinh Le Cong <thinh.le.xr@bp.renesas.com>
2025-12-17 14:35:27 +02:00
Alberto Escolar Piedras
f0d78d572e boards renesas cpkcor_ra8d1b: Fix DTS typos
A few typos that prevent building for this target

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-17 14:35:17 +02:00
Lyle Zhu
bf802d0237 Bluetooth: Classic: HFP_AG: Auto-select support highest quality codec
In current implementation, if the codec is not selected, the codec
CVSD will be used to as default value to start audio connection
procedure.

Optimize the codec selection to select the supported highest quality
codec as the default value.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-17 11:29:21 +01:00
Lyle Zhu
466dec3b3e Bluetooth: HFP AG: Add feature support check for voice recognition
Add feature support validation in `bt_hfp_ag_voice_recognition()` to
verify that both HF and AG support voice recognition feature before
attempting to activate/deactivate it.

This prevents attempting voice recognition operations when the feature
is not supported by either the Hands-Free device or the Audio Gateway,
returning -ENOTSUP in such cases.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-17 11:28:55 +01:00
The Nguyen
e45df54ba1 dts: bindings: memc: correct spelling for renesas,ra-sdram
Fix typo for property name in renesas,ra-sdram.
Update property name used in code.

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-12-17 11:24:28 +01:00
The Nguyen
d1d99918e5 dt-binding: memc: renesas: fix macro name misspelling
Some macros defined for SDRAM timing configuration have typo.
This commit fixes the mistake and updates the macro used
in the code.

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-12-17 11:24:28 +01:00
The Nguyen
f3fed0bb8b manifest: update hal_renesas revision
Update hal_renesas revision to fix Renesas RA SDRAM macro typo

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-12-17 11:24:28 +01:00
James Smith
d38432761f drivers: i2c: silabs: Don't fail to init is clock is already enabled
Don't fail to initialize i2c if it was already initialized, for
example by mcuboot.

Signed-off-by: James Smith <james@loopj.com>
2025-12-17 11:23:46 +01:00
Peter Ujfalusi
7c67dea76a intel_adsp: common: gdbstub: Fix compilation DEBUG_SLOT_MANAGER=n
The GDB is not compiled by default and a recent change in the slot manager
series contained a typo in ifdef and missed by not compiling the GDB
support.

Fixes: ebb5625bee ("intel_adsp: Add debug slot manager")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2025-12-17 10:59:00 +02:00
Jordan Yates
b362eca3b0 modules: nrf_wifi: bus: SPI keep ACTIVE
Add an option to keep the SPI bus in `ACTIVE` while the WiFi module is
powered up. Previous testing has shown transitioning the bus on every
SPI transaction to reduce UDP uplink throughput from 8 Mbps to 6 Mbps.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-17 10:58:49 +02:00
Jordan Yates
c13420333c wifi: nrf_wifi: respect SHELL_STACK_SIZE dependencies
`SHELL_STACK_SIZE` should not be redefined as a symbol with no
dependencies, it should be applying a new default to the existing
symbol.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-17 10:58:39 +02:00
Jordan Yates
cbd5687fc2 wifi: nrf_wifi: return errors when bringups fail
The combination of two different return variables (`status` and `ret`)
resulted in most failure paths through the bringup code still returning
success.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-17 10:58:39 +02:00
Holt Sun
97f497155b drivers: flash: mcux_flexspi: fix cache unused variable warning
Preserve original write length for DCACHE_InvalidateByRange()
Guard declaration of `size` with CONFIG_HAS_MCUX_CACHE to avoid
unused-variable warnings when cache is disabled
Add pointer validity checks before cache invalidation

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-17 10:58:30 +02:00
Sylvio Alves
443862ddff drivers: uart: esp32: fix async RX byte count from DMA descriptor
In async UART mode with DMA, the RX completion callback was incorrectly
relying on rx_counter which is never updated in DMA mode since data
bypasses the UART FIFO via UHCI+GDMA.

Fix by reading the actual transferred byte count from the DMA
descriptor's length field using gdma_ll_rx_get_success_eof_desc_addr().
Direct LL calls are used because this runs in ISR context where
dma_get_status() is not IRAM-safe.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-17 10:57:52 +02:00
Tobias Kässer
858acad5ac doc: fix CONFIG_PM_DEVICE_RUNTIME_ASYNC typo
Fixed typo CONFIOG_PM_DEVICE_RUNTIME_ASYNC to
CONFIG_PM_DEVICE_RUNTIME_ASYNC in device runtime PM documentation.

Signed-off-by: Tobias Kässer <t.kaesser@gmail.com>
2025-12-17 10:57:32 +02:00
Yerrajennugari Raj Kumar
9fe6302151 drivers: espi: npcx: Add config to disable auto-ack and use callback
Added configuration option to disable auto acknowledgment for
virtual wire WARN signals and added a callback to handle them.

This change introduces:

1. Support to disable automatic acknowledgment for VW WARN signals.
2. A callback mechanism to notify application firmware for explicit
handling.

Behavior:

1. If auto-ack is disabled, the callback notifies the application to
handle VW WARN signals.
2. If auto-ack is enabled, the driver acknowledges VW WARN signals
without notifying the application.

Signed-off-by: Yerrajennugari Raj Kumar <yerrajennugari.raj.kumar@intel.com>
2025-12-17 10:57:11 +02:00
Waqar Tahir
3e1f0bb5b8 manifest: tf-m: support for mcxn947
Updated the TF-M repo for support of mcxn947

Signed-off-by: Waqar Tahir <waqar.tahir@nxp.com>
2025-12-17 10:56:59 +02:00
Waqar Tahir
48fa32c76f samples: tfm: Add mcxn947 in TF-M samples yaml
Add mcxn947 non secure target for the tfm_ipc
and tfm_regression samples.

Signed-off-by: Waqar Tahir <waqar.tahir@nxp.com>
2025-12-17 10:56:59 +02:00
Guido Roncarolo
3dec364bd8 boards: disable trng in ns-dts and get it working with zephyr 4.3
25a71f3972 changes the behavior so that :
if "zephyr,entropy" is set in the DT then CONFIG_CSPRNG_AVAILABLE get
       enabled;
This breaks our implementation, disable the trng in ns world for now

Signed-off-by: Guido Roncarolo <guido.roncarolo@nxp.com>
2025-12-17 10:56:59 +02:00
Guido Roncarolo
6cf47cae57 modules: tf-m: add MCNX947 in cmake and kconfig
Added MCNX947 support in trusted-firmware-m
module Cmake and Kconfig. Cmake is cleaned,
removed unused variables.

Signed-off-by: Guido Roncarolo <guido.roncarolo@nxp.com>
2025-12-17 10:56:59 +02:00
Guido Roncarolo
120768833c boards: nxp: mcxn947: add ns board support
Add initial TF-M support for mcxn947 target
- added ns_decofnig and yml files
- added non secure dts for the MCXN974 SOC
- added checks with CPU0 enabelement in SOC
- added ns memory slot and configs

Signed-off-by: Guido Roncarolo <guido.roncarolo@nxp.com>
Signed-off-by: Waqar Tahir <waqar.tahir@nxp.com>
2025-12-17 10:56:59 +02:00
Guido Roncarolo
3f3e833745 soc: mcxn947: disable SystemInit when TFM is ON
Avoid initialization as this is already been taken care from TF-M
secure part

Signed-off-by: Guido Roncarolo <guido.roncarolo@nxp.com>
2025-12-17 10:56:59 +02:00
Sebastian Głąb
798652841a boards: nordic: nrf54h20dk: Add workaround for RISC-V debugging
Add workaround that enables `west debug` and `west attach`
on nrf54h20dk/nrf54h20/cpuppr and cpuflpr.

Remove "-if SW" as this generates warning
WARNING: runners.jlink: "f SW" does not match any known pattern

And breaks JLinkGDBServer command by setting option `-select` to
`usb=f SW`.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-12-17 10:56:35 +02:00
Robert Perkel
7f3567cf74 drivers: sensor: mtch9010 Fixed heartbeat bugs
Fixed the following bugs with the heartbeat monitor
- State did not update on CHAN_ALL
- Adjusted semaphore behavior
- Fixed interrupt setup
- Fixed time calculation bug
- Split heartbeat update into seperate function call

Signed-off-by: Robert Perkel <robert.perkel@microchip.com>
2025-12-17 10:56:19 +02:00
Liang Jiaxiang
aca5f0c021 drivers: sensor: bmi08x: fix temperature reading and scaling
The previous implementation had three issues regarding temperature
reading:
1. The unit scaling was incorrect. The datasheet specifies 0.125 C/LSB,
   but the code multiplied by 125 instead of 125000 for micro-degrees,
   resulting in values off by a factor of 1000.
2. The MSB and LSB registers were read in two separate transactions,
   which is not atomic.
3. The bitwise reconstruction of the 11-bit value was inefficient.

This commit fixes the scaling factor to 125000, implements a burst read
for both temperature registers to ensure atomicity, and optimizes the
bit manipulation logic.

Signed-off-by: Liang Jiaxiang <moonbite233@gmail.com>
2025-12-17 10:54:24 +02:00
Camille BAUD
e24574bb16 MAINTAINERS: bflb: Add M0S Dock to bflb area
Adds the board to area

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-17 10:54:15 +02:00
Camille BAUD
a67eee4bb6 boards: sipeed: Introduce Maix M0S Dock
Introduces BL616-based M0S Dock

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-17 10:54:15 +02:00
Fabin V Martin
082a9b349a tests: drivers: i2c: add i2c dma transfer eeprom test
add test project for i2c transfer with callback using dma

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-17 10:54:05 +02:00
Fabin V Martin
f177edfe7c boards: microchip: sam_e54_xpro: update i2c nodes for dma support
add dma properties in i2c node.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-17 10:54:05 +02:00
Fabin V Martin
b16b2b2bcb drivers: i2c: microchip: add dma support
dma support added for i2c transfer

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-17 10:54:05 +02:00
Fabin V Martin
28bc19beab dts: bindings: i2c: add dma properties in i2c yaml
add properties for dma support in binding yaml for i2c

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-17 10:54:05 +02:00
Lyle Zhu
761fcc8d01 tests: Bluetooth: Classic: GAP_S: Fix case tc_gap_s_2 failure issue
In the case, when the connection is established on the local side, the
test script will require peer device to send ACL disconnection
request. But due to the timing issue, the connected event may be not
notified on the peer device side when the peer device received the ACL
disconnection requirement. The exception will happen. It causes the
case to fail.

Wait for the connected event of the peer device before sending the ACL
disconnection request.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-17 10:53:55 +02:00
Lyle Zhu
e660314ffe tests: Bluetooth: Classic: SDP_S: Reduce time consumption
The case `sdp_discover_with_range` will consume much time to
exhaustively enumerate all supported attribute id ranges. It will
consume much time.

Optimize the set of the supported attribute ID ranges to reduce
the time consumption.
Such as, the discovered attribute ID list is [1, 2, 3, 4, 7, 9, 256].
In the original implementation, the range count is 35511. While in
the optimized range count is 105.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-17 10:53:34 +02:00
Lyle Zhu
68ff83079e tests: Bluetooth: Classic: Fix sm_key_persist_004 failure issue
For the case sm_key_persist_004, the disconnected event may be
printed before the log `Pairings successfully cleared` since there
is no order between log `Pairings successfully cleared` and the
disconnected event. It causes the script discards the disconnected
event in this case and rise the assert issue.

For the case sm_key_persist_004, check the disconnected event in
the captured log. If it is not found, wait the disconnected event
until timeout.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-17 10:53:24 +02:00
Luis Ubieda
217f8e660b sensor: afbr_s50: Do not cut data-stream due to payload status
The payload status is evaluated when decoding, which may indicate sharp
distance transitions (from very long to close) and requiring a few more
cycles to stabilize. We don't want to stop the data-stream because of
these, otherwise the data-stream continuity is compromised.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-12-17 10:53:14 +02:00
Lyle Zhu
a9269f2012 Bluetooth: Classic: OBEX: Fix unchecked return value issue
Check the return value of the function `atomic_cas()`. If the new
value cannot be set for the OBEX server, return the error code
`BT_OBEX_RSP_CODE_INTER_ERROR`. If the new value cannot be set for
the OBEX client, return the error code `-EINVAL`.

Fix #100012
Fix #100018
Fix #100019
Fix #100021
Fix #100022
Fix #100023

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-17 10:53:04 +02:00
Lyle Zhu
6fdc675eae tests: Bluetooth: Classic: Fix sm_init_035 failure issue
For the case sm_init_035, the similar issue also be found. The
message `Enter 16 digits wide PIN code for` may be printed after
the shell prompt. The assert issue also be found in this case.

For the case sm_init_035, check the message `Enter 16 digits wide
PIN code for` in the captured log. If it is not found, wait the
message until timeout.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-17 10:52:53 +02:00
Bjarki Arge Andreasen
8292cc4eb8 drivers: clock_control nrf_lfclk: patch clock option order
The clock options used within the driver are supposed to be ordered
from lowest to highest power consumption, so the lowest/default
option is the most power efficient. The order was reversed to make
the init code of the lfclk a bit simpler, and this was accounted for
in the clock option lookup function. However, the common nrf clock
control request/release feature would request the lowest index, not
the lowest clock option, so the lfclk would default to its highest
power consumption mode.

The clock option init and lookup has been refactored to be sorted
from lowest to highest power consumption, and comments have been
adjusted accordingly.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-17 10:52:43 +02:00
Daniel Leung
9d181c561e serial: uart_bitbang: fix incorrect callback device
When doing the callback, it should pass it the UART device
pointer. So fix that.

Fixes #98229

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-17 10:52:33 +02:00
McAtee Maxwell
4d64e59f2c tests: pwm: update Infineon cyw920829m2evk_02 overlays
- Update overlay files for the pwm_api and pwm_gpio_loopback tests

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-12-17 10:52:22 +02:00
McAtee Maxwell
11472639f7 samples: pwm: update Infineon cyw920829m2evk_02 overlays
- Update overlay files for the blinky_pwm and fade_led samples

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-12-17 10:52:22 +02:00
McAtee Maxwell
a40956ffdf dts: Add peri-div clock definitions for cyw20829 soc series
- Add dts blocks for the peri-div clock instances on cyw20829

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-12-17 10:52:22 +02:00
McAtee Maxwell
3f916f3b96 tests: pwm: add Infineon kit_pse84_eval
- Add overlay files for the pwm_api and pwm_gpio_loopback tests
- Update platform_allow for pwm_gpio_loopback

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-12-17 10:52:22 +02:00
McAtee Maxwell
9f42dd0413 samples: pwm: add Infineon kit_pse84_eval
- Add overlay files for the blinky_pwm and fade_led samples

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-12-17 10:52:22 +02:00
McAtee Maxwell
6ad823ab8d drivers: pwm: add support for Infineon kit_pse84_eval
- Update the driver to support the kit_pse84_eval board
- Update to new peripheral clock allocation scheme

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-12-17 10:52:22 +02:00
Biwen Li
ba10774f91 soc: nxp: imx943: m33: fix build issue
Fix build issue from the below commit:
c520b3da1a
soc: nxp: imx943: m33: add and reuse api to initialize clocks

error: soc_clock_enable defined but not used.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-17 10:52:11 +02:00
Bartlomiej Buczek
e02a1b742a Revert "drivers: adc: nrfx: Temporary fix for SAADC power consumption"
New hal_nordic was merged some time ago, fix no longer needed.

This reverts commit fe0b6b3b55.

Signed-off-by: Bartlomiej Buczek <bartlomiej.buczek@nordicsemi.no>
2025-12-16 10:19:51 -06:00
Jaro Van Landschoot
853d33e8e3 soc: atmel: sam: common: add warm reboot to soc_power.c
If a warm reboot is issued (e.g., via mcumgr reset), the sam
controller just hangs because of loop in reboot.c. This can
be devastating if no watchdog is present to reboot the controller.

Signed-off-by: Jaro Van Landschoot <jaro.vanlandschoot@basalte.be>
2025-12-16 10:19:07 -06:00
Cristian Bulacu
c898f775d2 openthread: platform: mdns_socket: Avoid assert in high-traffic networks
This commit implements a rule that will silently discard incoming mDNS
messages if number of OT free message buffers after message conversion
will be under a user-predefined threshold.
mDNS is making use of OT message buffers, if an mDNS TX message can't be
allocated, it will trigger an assert.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-12-16 10:18:25 -06:00
Cristian Bulacu
f865e9d832 openthread: Kconfig: Add OTBR config for mDNS processing
This commit adds a new configuration flag which is used to compute a
threshold that determines if an incoming mDNS packet will be processed.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-12-16 10:18:25 -06:00
Martin Gysel
c42c8a4da4 drivers: flash: stm32 ospi: do not invalidate bet at end of loop
This modification prevents the bet pointer from being nulled at the end
of the loop, which would otherwise render the search for a suitable
erase type ineffective. It also optimize the loop as it omits
unnecessary operations.

Without this change, the erase size defaults to one sector. If the chip
defines fewer than JESD216_NUM_ERASE_TYPES (=4) erase types, this
behavior still works, as the resulting command will correspond to a
sector erase operation. However, if the chip defines all erase types,
the resulting command will be the one specified in the erase type. But
since bet is nulled, the erase size will incorrectly default to the
sector size.

Signed-off-by: Martin Gysel <me@bearsh.org>
2025-12-16 10:17:41 -06:00
Martin Gysel
157b0ddc15 drivers: stm32 spi: mark variable as maybe unused
depending on build configuration, spi_context_cs_configure_all() is a
no-opt, so mark the data variable as maybe unused.

Signed-off-by: Martin Gysel <me@bearsh.org>
2025-12-16 10:17:13 -06:00
Martin Gysel
c141b55635 drivers: stm32 spi: do not unlock context unconditionally in pm action
- call spi_stm32_pm_policy_state_lock_xxx functions wenn context is
locked
- do not call spi_stm32_pm_policy_state_lock_put() in internal helper
spi_stm32_complete() (which gets called from various places) but at the
end of a transfer where it belong

Signed-off-by: Martin Gysel <me@bearsh.org>
2025-12-16 10:17:13 -06:00
Hake Huang
64eba11ee7 scripts: west: runners: add option for debug batch mode
when in batch mode, we do not need manually 'go'.
with this, we can use `west debug` in twister run test
enable for jlink and linkserver which is tested

example:

west debug --runner jlink -- --batch

Signed-off-by: Hake Huang <hake.huang@nxp.com>
2025-12-16 10:16:22 -06:00
Nicolas Moreno
e41faae09a samples: sensor: accel_polling: remove duplicated header
On main.c from sample sensor/accel_polling the header
<zephyr/drivers/sensor.h> is duplicated, as well in
sample sensor/stream_fifo. This is solved on this PR

Signed-off-by: Nicolas Moreno <niko722795@gmail.com>
2025-12-16 10:15:12 -06:00
Roberto Flores
80801d81bb dts: atmel: sam0: fix dac generic clock source
Changes generic clock source for DAC in SAMD5X MCU's.
Generic clock source 0 speed is above the maximum speed
permitted by the DAC.
The generic clock was changed to the same one the ADC uses (0x2).
Compared output of working microchip auto-generated code to the zephyr
implementation to find discrepencaies in register values.

Signed-off-by: Roberto Flores <Roberto.flores@daikincomfort.com>
2025-12-16 10:14:49 -06:00
Jonathan Nilsen
ef587e12f6 modules: hal_nordic: move IronSide SE supporting code to hal_nordic
Move most of the code that is used to interface with IronSide SE on the
nRF54H20/nRF9280 from the soc/nordic directory to the hal_nordic
repository. The interface code is now provided by the new IronSide
support package. Build system code and glue code that makes use of
Zephyr APIs is now located in the modules/hal_nordic directory.

Update the directory path for IronSide SE interface code in
MAINTAINERS.yml to match the move from soc/nordic/ironside to
modules/hal_nordic/ironside.

Also included are some refactoring changes and cleanup to match the new
supporting code.

C code and Kconfigs have been renamed to *ironside_se* / *IRONSIDE_SE*
to match the supporting code changes. Users of these APIs in zephyr
have been updated to match.

Individual configurations for different "IronSide services" have been
removed as the API serialization for all of these is now provided in
a single C file / header file (ironside/se/api.h).

The ironside_boot_report_get() API has been removed. The boot report
structure can be accessed through the IRONSIDE_SE_BOOT_REPORT macro.

Most configs relating to UICR / PERIPHCONF have been moved under the
"IronSide SE" menu to make it clear that these are part of the
IronSide SE interface.

The macros that in uicr.h that were used to add entries to the
PERIPHCONF section have been removed. The supporting code now provides
PERIPHCONF_XYZ() macros that can be used to initialize structures that
go into this section, and the zephyr part now only contains a macro
UICR_PERIPHCONF_ENTRY() that is used to place an arbitrary structure
into the section. The gen_periphconf_entries.py script used to generate
PERIPHCONF entries based on devicetree has been updated to use the new
macro system.

IronSide SE integration code/configs is now guarded by HAS_IRONSIDE_SE.

Note that the UICR build system integration that relies on Sysbuild
remains under the soc/nordic directory for now, but will be moved to
the modules/hal_nordic directory once it is clear how the integration
will look there.

Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
2025-12-16 10:13:56 -06:00
Jonathan Nilsen
2c934f1dd8 manifest: update hal_nordic revision
Update hal_nordic revision to add IronSide support package.

Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
2025-12-16 10:13:56 -06:00
Mark Wang
ac395b2d85 bluetooth: avdtp: Check buf tailroom and len before using it
check buf->len before pulling data from buf, check buf tailroom before
adding data to buf.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-12-16 10:12:12 -06:00
Mark Wang
402edcf81c bluetooth: avdtp: Fix coverity by adding assertion for MTU size validation
Add assertion to ensure MTU is at least the size of the start header
before calculating the remaining length for fragmentation. This prevents
potential underflow when subtracting the header size from MTU.
Fix coverity #551657

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-12-16 10:12:12 -06:00
Chen Xingyu
f809b159e6 boards: waveshare: Add ESP32-S3-GEEK
Add support for the Waveshare ESP32-S3-GEEK USB dongle. It features an
ESP32-S3R2 with 2 MB PSRAM, a 16 MB on-board Flash, a 1.14" LCD, and a
microSD slot.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-12-16 10:11:43 -06:00
Biwen Li
c520b3da1a soc: nxp: imx943: m33: add and reuse api to initialize clocks
Add and reuse apis to initialize clocks for netc and audio

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-16 10:09:55 -06:00
Erwan Gouriou
7de3e6acdd drivers: flash: flash_stm32_xspi: Allow flash driver init in ram load
Current driver protections prevent to initialize driver when run as from
an external application running from ext flash. Aim is to avoid performing
full driver initialization of the NOR flash controller the application
is read from.
But this problem is actually only valid when application is running in XIP
mode (read in memory mapped mode at run time).

In ram load mode, since there is no direct activity from the application
on the NOR device, nothing prevents the ext flash driver to be used fully.
Hence, we should allow the controller initialization to happen, with some
adjustments. Mostly, what we need is to:
- skip the hal init
- abort memory mapping afterwards to let the jedec reading happen.

Remove conditions around `stm32_xspi_is_memorymap()` and
`stm32_xspi_abort()` which can finally be useful in various cases.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-12-16 10:08:43 -06:00
Erwan Gouriou
1877410b2c boards: st: stm32n6570_dk: Instantiate ext flash controller
Instantiate a `soc-nv-flash` compatible node to allow using XSPI flash
driver as a real flash controller on NOR device.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-12-16 10:08:43 -06:00
Daniel Kampert
495bf16234 drivers: input: cst816s: Refactor errors and warnings
Add error code to error and warning log messages to
make debugging easier.

Signed-off-by: Daniel Kampert <DanielKampert@kampis-elektroecke.de>
2025-12-16 16:08:10 +00:00
Daniel Kampert
6a432cfb5e drivers: input: cst816s: Add motion interrupt
Add support for gesture / motion based interrupts
when INPUT_CST816S_EV_DEVICE is enabled.

Signed-off-by: Daniel Kampert <DanielKampert@kampis-elektroecke.de>
2025-12-16 16:08:10 +00:00
Daniel Kampert
11ff520ec7 drivers: input: cst816s: Add power management
Add power management support

Closes: #100300

Signed-off-by: Daniel Kampert <DanielKampert@kampis-elektroecke.de>
2025-12-16 16:08:10 +00:00
Fin Maaß
713ec75a54 litex: i2c: improve litei2c driver
improve litei2c driver

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-16 10:07:32 -06:00
Jeremy Bettis
f14ccdf462 drivers: Add const to rts5912_sha256_process() input
rts5913_sha256_update was changed in #94218, but this function passes
it's input into rts5912_sha256_process also.

Signed-off-by: Jeremy Bettis <jbettis@google.com>
2025-12-16 10:06:45 -06:00
YongWoo Kang
7193d72c9a boards: arm: doc: update wiki url
Update official wiki url.

Signed-off-by: YongWoo Kang <kyw0708@kumoh.ac.kr>
2025-12-16 10:05:54 -06:00
Chun-Chieh Li
3b635196ee drivers: usb: udc: numaker: support USBD/HSUSBD simultaneously
Re-organize to add support for USBD/HSUSBD which can be enabled
at the same time

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-16 10:05:19 -06:00
Chun-Chieh Li
d288a29979 drivers: usb: udc: numaker: support NuMaker M55M1X HSUSBD
Add support for Nuvoton NuMaker M55M1X high-speed USB 2.0 device
controller. Compared to M46X HSUSBD, M55M1X HSUSBD introduces some
differences:
- DMA must handle cache coherency because net_buf can be cache-able
- USB suspend interrupt becomes continuous. Aavoid being locked by
  this interrupt and forward this message just once
- New register bit HSUSBD_OPER_HISHSEN_Msk, which controls to enable
  USB handshake

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-16 10:05:19 -06:00
Chun-Chieh Li
c502ef5b51 drivers: usb: udc: numaker: support HSUSBD DMA
Add DMA support for Nuvoton NuMaker M46X high-speed USB 2.0 device
controller.

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-16 10:05:19 -06:00
Chun-Chieh Li
e64e113700 drivers: usb: udc: numaker: support NuMaker M46X HSUSBD
Add support for Nuvoton NuMaker M46X high-speed USB 2.0 device
controller.

The code is re-organized to implement both usbd and hsusbd in single
source file. Multiple instances of either usbd or hsusbd are supported,
but usbd and hsusbd cannot support simultaneously. This limitation is
for easy implementation with just single source file, assuming that real
application just needs one usb device type.

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-16 10:05:19 -06:00
Chun-Chieh Li
80df5b5ece drivers: usb: udc: numaker: recover from incomplete control transfer
Previous control transfer can be incomplete and then causes not only
net_buf leak but also logic error. This recycles dangling net_buf for
new clean control transfer.

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-16 10:05:19 -06:00
Chun-Chieh Li
a9338eb827 drivers: usb: udc: numaker: report instead of assert in control transfer
On Control Out failure, this changes to report error message instead of
assert failure because USB bus error is allowed to happen.

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-16 10:05:19 -06:00
Chun-Chieh Li
1ae35d3acf drivers: usb: udc: numaker: usbd: refine on ATTR undefined bits
Refine code on ATTR undefined bits:
- Add USBD_ATTR_PWRDN_Msk if it is not defined
- Following BSP USBD driver, add note on BIT(6) for hidden

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-16 10:05:19 -06:00
Chun-Chieh Li
3191254b6c drivers: usb: udc: numaker: usbd: refine MXPLD read
For USBD, this refines MXPLD read to avoid unwanted or reserved bits.

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-16 10:05:19 -06:00
Chun-Chieh Li
511e10ca7d drivers: usb: udc: numaker: usbd: enable usb wake-up early
Same as VBUS detect, this enables USB wake-up early so that device
can also be woken up by VBUS.

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-16 10:05:19 -06:00
Fin Maaß
c8c6379b86 ethernet: stm32: remove phy init and config from HAL_ETH_Init
the phy is already configured by the phy driver in zephyr
and we don't want to overwrite it in the HAL_ETH_Init
function in the stm32 HAL.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-16 10:04:23 -06:00
Bill Waters
e6fd157a93 boards: infineon: cy8cproto_041tp: board.cmake
The openocd --config paramter is not needed.
And it causes an error when used on a ci runner.
The path created by
scripts/west_commands/runners/openocd.py is wrong.

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2025-12-16 10:13:24 +01:00
Krisztian Szilvasi
91681f2221 boards: stm32: b_u585i_iot2a: update flash controller's node
- Refactor the flash controller's node
- Introduce flash device's node under the flash controller's
- Introduce `ranges` property with mem-mapped address

Signed-off-by: Krisztian Szilvasi <krisztian@atym.io>
2025-12-16 10:13:10 +01:00
Martin Hoff
be4723c213 soc: silabs: siwx91x: fix pm when bt is enabled
This patch is a workaround to a know issue when Bluetooth and pm
is activated.
We actually need to set the tx power to the Bluetooth controller
(network coprocessor) before sending power saving request to the
coprocessor.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-16 10:13:00 +01:00
Martin Hoff
e866da994f soc: silabs: siwx91x: remove power profile property
Power profile property doesn't need to be defined in device three.
It is a configuration value that is defined if we want pm with
Bluetooth and/or Wifi .

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-16 10:13:00 +01:00
Zhaoxiang Jin
cfa415e605 tests: dac: Enable dac_api test for frdm_mcxc444
1. Enable dac_api test for frdm_mcxc444.
2. Enable sample/dac for frdm_mcxc444

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-16 10:12:52 +01:00
Zhaoxiang Jin
3d8a570032 boards: frdm_mcxc444: Enable DAC for frdm_mcxc444
Enable DAC for frdm_mcxc444

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-16 10:12:52 +01:00
Mark Rages
37fc90cd1d drivers: sensor: adxl367: fix temperature scaling
The fractional part of the value was getting set incorrectly in
adxl_temp_convert().

Signed-off-by: Mark Rages <markrages@gmail.com>
2025-12-16 10:11:19 +01:00
Gaétan Froissard
9712a58129 drivers: entropy: stm32: Keep RNG clock running during PKA operation
If PKA is running, it needs the RNG clock to properly works.
Don't turn it off when RNG computation is over.

Signed-off-by: Gaétan Froissard <gaetan.froissard@marshmallow.kids>
2025-12-16 10:11:08 +01:00
Biwen Li
0830f9fd38 boards: nxp: imx943_evk: m33: use common dtsi
Use common dtsi imx943_evk_mimx94398_cm.dtsi

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-16 10:10:44 +01:00
Lin Yu-Cheng
dd5f8c483b drivers: spi: spi_rts5912_spi: Add clock-frequency setting from dtsi
The clock-frequency value in dtsi can be used to change
the bus frequency for rts5912 driver and
it support in the range between 15000 to 50000000.

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-12-16 10:10:35 +01:00
Flavio Ceolin
2a8343f0f7 doc: security: Disclose CVE-2025-12035
Disclose information about published CVE.

Signed-off-by: Flavio Ceolin <flavio@hubblenetwork.com>
2025-12-16 10:10:22 +01:00
Flavio Ceolin
d06d49eb7c doc: security: Disclose CVE-2025-9558
Disclose information about published CVE.

Signed-off-by: Flavio Ceolin <flavio@hubblenetwork.com>
2025-12-16 10:10:22 +01:00
Flavio Ceolin
5bdff095f5 doc: security: Disclose CVE-2025-9557
Disclose information about published CVE.

Signed-off-by: Flavio Ceolin <flavio@hubblenetwork.com>
2025-12-16 10:10:22 +01:00
Make Shi
159b4a6d97 Bluetooth: AVRCP: Fix typo in callback name and opid/state
Correct typo and fix opid/state assignment.

Signed-off-by: Make Shi <make.shi@nxp.com>
2025-12-16 10:09:49 +01:00
Aiden Hu
f3e7cde40b drivers: uhc: set right value for pipe by xfer's mps
maxPacketSize and numberPerUframe of pipe should
be set considering additional transactions.

Signed-off-by: Aiden Hu <weiwei.hu@nxp.com>
2025-12-16 10:08:55 +01:00
Aiden Hu
53e3cf281f drivers: uhc: add mcux_eps_interval to save ep interval
mcux_eps_interval is added as the new member of
uhc_mcux_data. It is used to save endpoint's
original interval value and can be compared
with xfer->interval.

Signed-off-by: Aiden Hu <weiwei.hu@nxp.com>
2025-12-16 10:08:55 +01:00
Aiden Hu
b3a6b4d405 drivers: uhc: use correct endpoint type and interval
In the USB transfer allocation, set endpoint type and interval
from the appropriate endpoint descriptor.

Signed-off-by: Aiden Hu <weiwei.hu@nxp.com>
2025-12-16 10:08:55 +01:00
Yongxu Wang
0910ebf469 dts: arm: nxp: add scmi system node for i.MX95 M7
Added scmi system node for NXP i.MX95 M7

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-12-16 10:08:45 +01:00
Yongxu Wang
2223233e98 dts: arm: nxp: add scmi system node for i.MX943
Added scmi system node for NXP i.MX943 Mcore

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-12-16 10:08:45 +01:00
Emil Gydesen
df86199532 tests: Bluetooth: Tester: BAP broadcast BSIM test
Adds BSIM testing of the BAP broadcast features of the BT Tester.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-16 10:06:33 +01:00
Emil Gydesen
4f0f02df90 tests: Bluetooth: Tester: BAP unicast BSIM test
Adds BSIM testing of the BAP unicast features of the BT Tester.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-16 10:06:33 +01:00
2083 changed files with 55602 additions and 13317 deletions

View File

@@ -5,6 +5,8 @@ updates:
directory: "/"
schedule:
interval: "weekly"
cooldown:
default-days: 7
commit-message:
prefix: "ci: github: "
labels: []
@@ -17,6 +19,8 @@ updates:
directory: "/doc"
schedule:
interval: "weekly"
cooldown:
default-days: 7
commit-message:
prefix: "ci: doc: "
labels: []

View File

@@ -63,7 +63,7 @@ jobs:
FLAGS+=" -r ${{ github.event.repository.name }}"
FLAGS+=" -M MAINTAINERS.yml"
if [ "${{ github.event_name }}" = "pull_request_target" ]; then
if [ "${{ github.base_ref }}" != "main" ]; then
if [ "${{ github.base_ref }}" = "main" ]; then
FLAGS+=" -P ${{ github.event.pull_request.number }} --updated-manifest pr_west.yml --updated-maintainer-file pr_MAINTAINERS.yml"
else
FLAGS+=" -P ${{ github.event.pull_request.number }}"

View File

@@ -310,32 +310,14 @@
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
]
"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/binary_adapter.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"SIM103", # https://docs.astral.sh/ruff/rules/needless-bool
]
"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/device_adapter.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
]
"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/factory.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation
"UP035", # https://docs.astral.sh/ruff/rules/deprecated-import
]
"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/fifo_handler.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
]
"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/hardware_adapter.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP024", # https://docs.astral.sh/ruff/rules/os-error-alias
]
"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/qemu_adapter.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
]
"./scripts/pylib/pytest-twister-harness/src/twister_harness/fixtures.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
@@ -956,11 +938,6 @@ exclude = [
"./scripts/net/enumerate_http_status.py",
"./scripts/profiling/stackcollapse.py",
"./scripts/pylib/build_helpers/domains.py",
"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/binary_adapter.py",
"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/device_adapter.py",
"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/fifo_handler.py",
"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/hardware_adapter.py",
"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/qemu_adapter.py",
"./scripts/pylib/pytest-twister-harness/src/twister_harness/fixtures.py",
"./scripts/pylib/pytest-twister-harness/src/twister_harness/helpers/mcumgr.py",
"./scripts/pylib/pytest-twister-harness/src/twister_harness/plugin.py",

View File

@@ -166,7 +166,7 @@ if(CONFIG_COMPILER_WARNINGS_AS_ERRORS)
zephyr_link_libraries($<TARGET_PROPERTY:linker,warnings_as_errors>)
endif()
if(CONFIG_DEPRECATION_TEST)
if(CONFIG_DEPRECATION_TEST OR NOT CONFIG_WARN_DEPRECATED)
zephyr_compile_options($<$<COMPILE_LANGUAGE:C>:$<TARGET_PROPERTY:compiler,no_deprecation_warning>>)
zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:$<TARGET_PROPERTY:compiler,no_deprecation_warning>>)
zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:$<TARGET_PROPERTY:asm,no_deprecation_warning>>)

View File

@@ -1021,7 +1021,8 @@ config WARN_DEPRECATED
prompt "Warn on deprecated usage"
help
Print a warning when the Kconfig tree is parsed if any deprecated
features are enabled.
features are enabled, or at compile time, when deprecated macros or
symbols are used.
config EXPERIMENTAL
bool

View File

@@ -302,7 +302,7 @@ Aesc Platform:
files-regex:
- ^drivers/.*aesc(\.c)?$
labels:
- "area: Aesc Silicon Platform"
- "platform: Aesc Silicon"
Ambiq Platforms:
status: maintained
@@ -738,6 +738,7 @@ Bouffalolab Platforms:
- josuah
files:
- boards/bflb/
- boards/sipeed/maix_m0s_dock/
- drivers/*/*bflb*
- dts/riscv/bflb/
- dts/bindings/*/bflb,*
@@ -1135,6 +1136,8 @@ Devicetree:
Devicetree Bindings:
status: odd fixes
collaborators:
- JarmouniA
files-regex:
- ^dts/bindings/.*zephyr.*
files:
@@ -1142,7 +1145,7 @@ Devicetree Bindings:
- include/zephyr/dt-bindings/
- scripts/bindings_properties_allowlist.yaml
labels:
- "area: Devicetree Bindings"
- "area: Devicetree Binding"
Disk:
status: maintained
@@ -1217,6 +1220,7 @@ Documentation:
- doc/substitutions.txt
- doc/images/Zephyr-Kite-in-tree.png
- doc/index-tex.rst
- doc/index.html
- doc/index.rst
- doc/kconfig.rst
- doc/templates/sample.tmpl
@@ -1253,6 +1257,7 @@ Documentation Infrastructure:
status: odd fixes
collaborators:
- anangl
- ZhaoxiangJin
files:
- drivers/adc/
- include/zephyr/drivers/adc.h
@@ -2186,8 +2191,6 @@ Documentation Infrastructure:
maintainers:
- manuargue
- Dat-NguyenDuy
collaborators:
- congnguyenhuu
files:
- drivers/psi5/
- include/zephyr/drivers/psi5/
@@ -2252,6 +2255,8 @@ Documentation Infrastructure:
status: maintained
maintainers:
- bjarki-andreasen
collaborators:
- Holt-Sun
files:
- drivers/rtc/
- include/zephyr/drivers/rtc/
@@ -2335,8 +2340,6 @@ Documentation Infrastructure:
maintainers:
- manuargue
- Dat-NguyenDuy
collaborators:
- congnguyenhuu
files:
- drivers/sent/
- include/zephyr/drivers/sent/
@@ -3491,6 +3494,7 @@ NXP Platform Drivers:
- dbaluta
- Holt-Sun
- zejiang0jason
- butok
files-regex:
- ^drivers/.*nxp.*
- ^drivers/.*mcux.*
@@ -3712,7 +3716,6 @@ NXP Platforms (S32):
- manuargue
collaborators:
- Dat-NguyenDuy
- congnguyenhuu
files:
- boards/nxp/*s32*/
- boards/common/*nxp_s32*
@@ -4774,6 +4777,14 @@ Settings:
- subsys/settings/src/settings_tfm_psa*
- tests/subsys/settings/functional/tfm_psa/
- tests/subsys/settings/tfm_psa/
- name: ZMS backend
collaborators:
- rghaddab
files:
- subsys/settings/src/settings_zms.c
- subsys/settings/include/settings/settings_zms.h
- tests/subsys/settings/zms/
- tests/subsys/settings/functional/zms/
labels:
- "area: Settings"
tests:
@@ -5265,6 +5276,20 @@ USB-C:
tests:
- sample.usbc
UUID:
status: maintained
maintainers:
- sorru94
files:
- lib/uuid/
- include/zephyr/sys/uuid.h
- tests/lib/uuid/
- samples/subsys/uuid/
labels:
- "area: UUID"
tests:
- libraries.uuid
Userspace:
status: maintained
maintainers:
@@ -5968,6 +5993,7 @@ West:
collaborators:
- nashif
- dkalowsk
- edersondisouza
files: []
labels:
- "area: MCTP"
@@ -6417,7 +6443,7 @@ nRF IronSide SE Platforms:
- karstenkoenig
- SebastianBoe
files:
- soc/nordic/ironside/
- modules/hal_nordic/ironside/
- soc/nordic/common/uicr/
labels:
- "platform: nRF IronSide SE"

View File

@@ -1,6 +1,6 @@
version = 1
# Declare default license and copyright text for files that typically do not include them.
# Declare default license and copyright text for files that typically do not or cannot include them.
[[annotations]]
path = [
# zephyr-keep-sorted-start
@@ -9,6 +9,7 @@ path = [
"**/*.conf",
"**/*.ecl",
"**/*.html",
"**/*.json",
"**/*.rst",
"**/*.yaml",
"**/*.yml",

View File

@@ -460,28 +460,36 @@ SECTION_FUNC(TEXT, z_arm_svc)
.L_oops:
push {r0, lr}
#if defined(CONFIG_EXTRA_EXCEPTION_INFO)
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* Build _callee_saved_t. To match the struct
* definition we push the psp & then r11-r4
*/
mrs r1, PSP
push {r1, r2}
push {r1, r2} /* r2 for padding */
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
push {r4-r11}
#elif defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
mov r1, r10
mov r2, r11
push {r1, r2}
mov r1, r8
mov r2, r9
push {r1, r2}
push {r4-r7}
#else
#error Unknown ARM architecture
#endif
mov r1, sp /* pointer to _callee_saved_t */
#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE */
#endif /* CONFIG_EXTRA_EXCEPTION_INFO */
mov r2, lr /* EXC_RETURN */
bl z_do_kernel_oops
/* return from SVC exception is done here */
#if defined(CONFIG_EXTRA_EXCEPTION_INFO)
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* We do not need to restore any register state here
* because we did not use any callee-saved registers
* in this routine. Therefore, we can just reset
* the MSP to its value prior to entering the function
*/
add sp, #40
#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE */
#endif /* CONFIG_EXTRA_EXCEPTION_INFO */
pop {r0, pc}

View File

@@ -137,21 +137,11 @@ void z_do_kernel_oops(const struct arch_esf *esf, _callee_saved_t *callee_regs,
struct arch_esf esf_copy;
memcpy(&esf_copy, esf, offsetof(struct arch_esf, extra_info));
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* extra exception info is collected in callee_reg param
* on CONFIG_ARMV7_M_ARMV8_M_MAINLINE
*/
/* extra exception info is collected in callee_reg. */
esf_copy.extra_info = (struct __extra_esf_info) {
.callee = callee_regs,
};
#else
/* extra exception info is not collected for kernel oops
* path today so we make a copy of the ESF and zero out
* that information
*/
esf_copy.extra_info = (struct __extra_esf_info) { 0 };
#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE */
z_arm_fatal_error(reason, &esf_copy);
#endif /* CONFIG_EXTRA_EXCEPTION_INFO */

View File

@@ -79,6 +79,12 @@ config ARM_MPU_PXN
unprivileged mode and executing such region from privileged mode will
result in a Memory Management fault.
config ARM_MPU_SRAM_WRITE_THROUGH
bool "Use Write-Through cache policy for SRAM regions"
help
When enabled, SRAM regions will use Write-Through cache policy
instead of the default Write-Back policy.
endif # ARM_MPU
endif # CPU_HAS_MPU

View File

@@ -156,6 +156,11 @@ static int mpu_configure_regions_from_dt(uint8_t *reg_index)
case DT_MEM_ARM_MPU_EXTMEM:
region_conf = _BUILD_REGION_CONF(region[idx], REGION_EXTMEM_ATTR);
break;
#endif
#ifdef REGION_RAM_WT_ATTR
case DT_MEM_ARM_MPU_RAM_WT:
region_conf = _BUILD_REGION_CONF(region[idx], REGION_RAM_WT_ATTR);
break;
#endif
default:
/* Attribute other than ARM-specific is set.

View File

@@ -9,6 +9,12 @@
#include <zephyr/arch/arm/mpu/arm_mpu_mem_cfg.h>
#ifdef CONFIG_ARM_MPU_SRAM_WRITE_THROUGH
#define ARM_MPU_SRAM_REGION_ATTR REGION_RAM_WT_ATTR
#else
#define ARM_MPU_SRAM_REGION_ATTR REGION_RAM_ATTR
#endif
static const struct arm_mpu_region mpu_regions[] = {
#ifdef CONFIG_XIP
/* Region 0 */
@@ -26,10 +32,10 @@ static const struct arm_mpu_region mpu_regions[] = {
MPU_REGION_ENTRY("SRAM_0",
CONFIG_SRAM_BASE_ADDRESS,
#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS, \
ARM_MPU_SRAM_REGION_ATTR(CONFIG_SRAM_BASE_ADDRESS,
CONFIG_SRAM_SIZE * 1024)),
#else
REGION_RAM_ATTR(REGION_SRAM_SIZE)),
ARM_MPU_SRAM_REGION_ATTR(REGION_SRAM_SIZE)),
#endif
};

View File

@@ -62,10 +62,11 @@ elseif(DEFINED NATIVE_TARGET_HOST)
)
endif()
zephyr_compile_options(
${ARCH_FLAG}
)
# We tell the compiler to mark all symbols to have hidden visibility by default.
# Later, after the image from all embedded code has been built, all these symbols will be made local
# (i.e. not linkable anymore from outside that embedded code library).
# If users want to be able to link to a symbol from outside the embedded image, they should annotate
# it with one of NATIVE_SIMULATOR_IF*
zephyr_compile_options(
-fvisibility=hidden
)
@@ -99,17 +100,15 @@ if(NOT CONFIG_EXTERNAL_LIBC)
$<TARGET_PROPERTY:compiler,freestanding>
$<TARGET_PROPERTY:compiler,no_builtin>
)
else()
# No freestanding compilation, i.e. we use the compiler default C library
zephyr_compile_options($<TARGET_PROPERTY:compiler,hosted>)
endif()
if(CONFIG_COMPILER_WARNINGS_AS_ERRORS)
target_compile_options(native_simulator INTERFACE $<TARGET_PROPERTY:compiler,warnings_as_errors>)
endif()
if(CONFIG_EXTERNAL_LIBC)
# @Intent: Obtain compiler specific flags for no freestanding compilation
zephyr_compile_options($<TARGET_PROPERTY:compiler,hosted>)
endif()
if(CONFIG_EXTERNAL_LIBCPP)
target_link_options(native_simulator INTERFACE "-lstdc++")
endif()

View File

@@ -1,7 +1,6 @@
# SPDX-License-Identifier: Apache-2.0
zephyr_library()
zephyr_library_compile_definitions(NO_POSIX_CHEATS)
zephyr_library_sources(
cpuhalt.c
fatal.c

View File

@@ -20,7 +20,6 @@
#include <kernel_internal.h>
#include <mmu.h>
#include <zephyr/drivers/interrupt_controller/loapic.h>
#include <mmu.h>
#include <zephyr/arch/x86/memmap.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);

View File

@@ -53,7 +53,6 @@
#ifndef _ASMLANGUAGE
#include <zephyr/sys/util.h>
#ifdef __cplusplus
extern "C" {

View File

@@ -561,8 +561,7 @@ static inline void __arch_mem_map(void *vaddr, uintptr_t paddr, uint32_t attrs,
{
bool ret;
ret = l2_page_table_map(xtensa_kernel_ptables, (void *)vaddr, paddr,
attrs, is_user);
ret = l2_page_table_map(xtensa_kernel_ptables, vaddr, paddr, attrs, is_user);
__ASSERT(ret, "Cannot map virtual address (%p)", vaddr);
#ifndef CONFIG_USERSPACE
@@ -577,8 +576,7 @@ static inline void __arch_mem_map(void *vaddr, uintptr_t paddr, uint32_t attrs,
SYS_SLIST_FOR_EACH_NODE(&xtensa_domain_list, node) {
domain = CONTAINER_OF(node, struct arch_mem_domain, node);
ret = l2_page_table_map(domain->ptables, (void *)vaddr, paddr,
attrs, is_user);
ret = l2_page_table_map(domain->ptables, vaddr, paddr, attrs, is_user);
__ASSERT(ret, "Cannot map virtual address (%p) for domain %p",
vaddr, domain);
@@ -730,7 +728,7 @@ end:
static inline void __arch_mem_unmap(void *vaddr)
{
l2_page_table_unmap(xtensa_kernel_ptables, (void *)vaddr);
l2_page_table_unmap(xtensa_kernel_ptables, vaddr);
#ifdef CONFIG_USERSPACE
sys_snode_t *node;
@@ -741,7 +739,7 @@ static inline void __arch_mem_unmap(void *vaddr)
SYS_SLIST_FOR_EACH_NODE(&xtensa_domain_list, node) {
domain = CONTAINER_OF(node, struct arch_mem_domain, node);
(void)l2_page_table_unmap(domain->ptables, (void *)vaddr);
(void)l2_page_table_unmap(domain->ptables, vaddr);
}
k_spin_unlock(&z_mem_domain_lock, key);
#endif /* CONFIG_USERSPACE */

View File

@@ -16,7 +16,6 @@
#include <zephyr/zsr.h>
#include <zephyr/arch/common/exc_handle.h>
#include <kernel_internal.h>
#include <xtensa_internal.h>
#include <xtensa_stack.h>

View File

@@ -43,7 +43,8 @@ Hardware
- DMA Controller
More information about STM32F427VIT6 can be found here:
- `STM32F427 on www.st.com`_
- `STM32F427 on www.st.com`_
Supported Features
==================

View File

@@ -67,8 +67,9 @@ Hardware
- Bluetooth LE over SPI, provided by nRF51822
More information about STM32F401RE can be found here:
- `STM32F401RE on www.st.com`_
- `STM32F401 reference manual`_
- `STM32F401RE on www.st.com`_
- `STM32F401 reference manual`_
Supported Features
==================

View File

@@ -110,16 +110,19 @@ exposed via on-board Micro USB connector. Default settings are 115200 8N1.
The default USART mappings for the remaining ones are:
- USART1: Connected to AP via UART0 on the 96Boards Low-Speed Header.
- TX: PA9
- RX: PA10
- TX: PA9
- RX: PA10
- USART2: Connected to D0(RX) and D1(TX) on the Arduino Header.
- TX: PD5
- RX: PD6
- TX: PD5
- RX: PD6
- USART3: Broken out to Grove connector J10.
- TX: PD8
- RX: PD9
- TX: PD8
- RX: PD9
I2C
---

View File

@@ -21,6 +21,11 @@
aliases {
i2c-0 = &i2c0;
watchdog0 = &wdt0;
uart-0 = &uart0;
sw0 = &button0;
led0 = &led0;
led-strip = &led_strip;
fuel-gauge0 = &max17048;
};
chosen {
@@ -32,15 +37,6 @@
zephyr,bt-hci = &esp32_bt_hci;
};
/* These aliases are provided for compatibility with samples */
aliases {
uart-0 = &uart0;
sw0 = &button0;
led0 = &led0;
led-strip = &led_strip;
fuel-gauge0 = &max17048;
};
buttons {
compatible = "gpio-keys";

View File

@@ -23,6 +23,11 @@
i2c-0 = &i2c0;
watchdog0 = &wdt0;
fuel-gauge0 = &max17048;
uart-0 = &uart0;
sw0 = &button0;
led0 = &led0;
led-strip = &led_strip;
backlight = &led1;
};
chosen {
@@ -35,15 +40,6 @@
zephyr,display = &st7789v_tft;
};
/* These aliases are provided for compatibility with samples */
aliases {
uart-0 = &uart0;
sw0 = &button0;
led0 = &led0;
led-strip = &led_strip;
backlight = &led1;
};
buttons {
compatible = "gpio-keys";

View File

@@ -62,12 +62,12 @@ Programming and Debugging
The ``nrf52_adafruit_feather`` board is available in two different versions:
- `Adafruit Feather nRF52 Pro with myNewt Bootloader`_
`Adafruit Feather nRF52 Pro with myNewt Bootloader`_
This board version is the recommended one to use. It has the SWD header
already populated and comes with the Mynewt serial bootloader installed by
default.
- `Adafruit Feather nRF52 Bluefruit LE`_
`Adafruit Feather nRF52 Bluefruit LE`_
This board is identical to the board above, but the SWD header is not
populated and ships with an Arduino friendly bootloader. To be able to work
with this version a 2*5pin 0.5" SWD header (e.g. `Adafruit SWD connector`_)

View File

@@ -344,10 +344,11 @@ using :zephyr:code-sample:`blinky` sample:
:goals: build
The above command will:
* Build a bootloader image (MCUboot)
* Build a TF-M (secure) firmware image
* Build Zephyr application as non-secure firmware image
* Merge them as ``tfm_merged.hex`` which contain all images.
* Build a bootloader image (MCUboot)
* Build a TF-M (secure) firmware image
* Build Zephyr application as non-secure firmware image
* Merge them as ``tfm_merged.hex`` which contain all images.
Note:

View File

@@ -340,10 +340,11 @@ using :zephyr:code-sample:`blinky` sample:
:goals: build
The above command will:
* Build a bootloader image (MCUboot)
* Build a TF-M (secure) firmware image
* Build Zephyr application as non-secure firmware image
* Merge them as ``tfm_merged.hex`` which contain all images.
* Build a bootloader image (MCUboot)
* Build a TF-M (secure) firmware image
* Build Zephyr application as non-secure firmware image
* Merge them as ``tfm_merged.hex`` which contain all images.
Note:

View File

@@ -12,10 +12,11 @@ ADI components.
- USB debug interface supporting CMSIS-DAP through a NXP Freescale
microcontroller
- Flexible board power supply
- USB VBUS 5 V max. 500 mA
- 5.5mm DC power jack 7 - 12 V min. 300 mA
- VIN from Arduino* compatible connectors
- VIN from 120-pin connector 5 V min. 300 mA
- USB VBUS 5 V max. 500 mA
- 5.5mm DC power jack 7 - 12 V min. 300 mA
- VIN from Arduino* compatible connectors
- VIN from 120-pin connector 5 V min. 300 mA
- 3 color LEDs (green, orange, red) and 1 status LED
- One push-buttons: RESET
- 16MB SDRAM
@@ -59,8 +60,9 @@ ADI SDP-K1 provides the following hardware components:
- DMA Controller
More information about STM32F469NI can be found here:
- `STM32F469NI product page`_
- `STM32F469 reference manual`_
- `STM32F469NI product page`_
- `STM32F469 reference manual`_
Supported Features
==================

View File

@@ -19,7 +19,6 @@ supported:
- uart
- dma
- i2c
- display
- spi
- flash
vendor: bflb

View File

@@ -41,41 +41,51 @@ The STM32L475VE SoC provides the following hardware features:
- Ultra-low-power with FlexPowerControl (down to 130 nA Standby mode and 100 uA/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU, frequency up to 80 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
- Clock Sources:
- 4 to 48 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- 3 PLLs for system clock, USB, audio, ADC
- 4 to 48 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- 3 PLLs for system clock, USB, audio, ADC
- RTC with HW calendar, alarms and calibration
- 16x timers:
- 2x 16-bit advanced motor-control
- 2x 32-bit and 7x 16-bit general purpose
- 2x 16-bit basic
- 2x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- SysTick timer
- 2x 16-bit advanced motor-control
- 2x 32-bit and 7x 16-bit general purpose
- 2x 16-bit basic
- 2x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- SysTick timer
- Up to 82 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
- Memories
- Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection
- Up to 128 KB of SRAM including 32 KB with hardware parity check
- External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
- Quad SPI memory interface
- Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection
- Up to 128 KB of SRAM including 32 KB with hardware parity check
- External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
- Quad SPI memory interface
- 4x digital filters for sigma delta modulator
- Rich analog peripherals (independent supply)
- 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS
- 2x 12-bit DAC, low-power sample and hold
- 2x operational amplifiers with built-in PGA
- 2x ultra-low-power comparators
- 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS
- 2x 12-bit DAC, low-power sample and hold
- 2x operational amplifiers with built-in PGA
- 2x ultra-low-power comparators
- 18x communication interfaces
- USB OTG 2.0 full-speed, LPM and BCD
- 2x SAIs (serial audio interface)
- 3x I2C FM+(1 Mbit/s), SMBus/PMBus
- 6x USARTs (ISO 7816, LIN, IrDA, modem)
- 3x SPIs (4x SPIs with the Quad SPI)
- CAN (2.0B Active) and SDMMC interface
- SWPMI single wire protocol master I/F
- USB OTG 2.0 full-speed, LPM and BCD
- 2x SAIs (serial audio interface)
- 3x I2C FM+(1 Mbit/s), SMBus/PMBus
- 6x USARTs (ISO 7816, LIN, IrDA, modem)
- 3x SPIs (4x SPIs with the Quad SPI)
- CAN (2.0B Active) and SDMMC interface
- SWPMI single wire protocol master I/F
- 14-channel DMA controller
- True random number generator
- CRC calculation unit, 96-bit unique ID

View File

@@ -6,6 +6,7 @@ toolchain:
supported:
- scsi
- ufs
- mbox
testing:
ignore_tags:
- net

View File

@@ -54,12 +54,48 @@ Programming and Debugging
.. zephyr:board-supported-runners::
Build and flash in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application.
This board supports two deployment targets:
QEMU Emulation
==============
For QEMU target, XSDB (Xilinx System Debugger) is not used and therefore PDI
(Programmable Device Image) is not required. QEMU provides direct emulation
without needing hardware initialization files.
Build and run with QEMU:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: versalnet_rpu
:goals: build flash
:goals: build run
Alternatively, you can build and run separately:
.. code-block:: console
west build -b versalnet_rpu samples/hello_world
west build -t run
Real Hardware
=============
For deployment on real Versal Net hardware, XSDB and a PDI file are required.
The PDI file contains the hardware initialization and boot configuration needed
for the physical device.
Build the application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: versalnet_rpu
:goals: build
Flash to real hardware with PDI file:
.. code-block:: console
west flash --runner xsdb --pdi /path/to/your.pdi
You should see the following message on the console:

View File

@@ -10,3 +10,4 @@ testing:
vendor: amd
supported:
- sdhc
- mbox

View File

@@ -22,21 +22,7 @@ Hardware
Supported Features
==================
The following hardware features are supported:
+-----------------------+------------+----------------------+
| Interface | Controller | Driver/Component |
+=======================+============+======================+
| GICv3 | on-chip | interrupt controller |
+-----------------------+------------+----------------------+
| PL011 UART | on-chip | serial port |
+-----------------------+------------+----------------------+
| ARM GENERIC TIMER | on-chip | system clock |
+-----------------------+------------+----------------------+
| SMSC_91C111 | on-chip | ethernet device |
+-----------------------+------------+----------------------+
The kernel currently does not support other hardware features on this platform.
.. zephyr:board-supported-hw::
Board Variants
==============

View File

@@ -7,4 +7,7 @@ the links below to get more information about each board target.
* :ref:`mps2_armv6m_board`
* :ref:`mps2_armv7m_board`
Supported Features
===================
.. zephyr:board-supported-hw::

View File

@@ -150,33 +150,7 @@ The mps2/an521 board provides the following user push buttons:
Supported Features
===================
The mps2/an521 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| TIMER | on-chip | timer |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by the port.
See the `MPS2 FPGA Website`_ for a complete list of MPS2+ AN521 board hardware
features.
The default configuration can be found in
:zephyr_file:`boards/arm/mps2/mps2_an521_cpu0_defconfig`.
* Refer to :zephyr:board:`mps2` for details.
Interrupt Controller
====================

View File

@@ -61,33 +61,7 @@ ARM V2M MPS2 AN383 provides the following hardware components:
Supported Features
==================
The ``mps2/an383`` board target supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| TIMER | on-chip | counter |
+-----------+------------+-------------------------------------+
| DUALTIMER | on-chip | counter |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by the port.
See the `V2M MPS2 Website`_ for a complete list of V2M MPS2 board hardware
features.
The default configuration can be found in
:zephyr_file:`boards/arm/mps2/mps2_an383_defconfig`
* Refer to :zephyr:board:`mps2` for details.
Interrupt Controller
====================

View File

@@ -68,34 +68,7 @@ ARM V2M MPS2 provides the following hardware components:
Supported Features
==================
The ``mps2/an385``, ``mps2/an386``, and ``mps2/an500`` board targets support the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| TIMER | on-chip | counter |
+-----------+------------+-------------------------------------+
| DUALTIMER | on-chip | counter |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by the port.
See the `V2M MPS2 Website`_ for a complete list of V2M MPS2 board hardware
features.
The default configuration can be found in
:zephyr_file:`boards/arm/mps2/mps2_an385_defconfig`
or similarly in ``mps2_anxxx_defconfig`` for the other applicable boards.
* Refer to :zephyr:board:`mps2` for details.
Interrupt Controller
====================

View File

@@ -221,31 +221,7 @@ ARM MPS3 provides the following hardware components:
Supported Features
===================
The ``MPS3`` board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by the port.
See the `MPS3 FPGA Website`_ for a complete list of MPS3 AN547 board hardware
features.
The default configuration can be found in
- For AN547: :zephyr_file:`boards/arm/mps3/mps3_corstone300_an547_defconfig`.
- For AN552: :zephyr_file:`boards/arm/mps3/mps3_corstone300_an552_defconfig`.
- For FVP : :zephyr_file:`boards/arm/mps3/mps3_corstone300_fvp_defconfig`.
- For AN555: :zephyr_file:`boards/arm/mps3/mps3_corstone310_an555_defconfig`.
.. zephyr:board-supported-hw::
Serial Port
===========
@@ -352,9 +328,6 @@ For more details refer to:
.. _Corstone-310 FVP:
https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
.. _MPS3 FPGA Website:
https://developer.arm.com/tools-and-software/development-boards/fpga-prototyping-boards/mps3
.. _MPS3 AN547 Technical Reference Manual (TRM):
https://developer.arm.com/-/media/Arm%20Developer%20Community/PDF/DAI0547B_SSE300_PLUS_U55_FPGA_for_mps3.pdf

View File

@@ -1,4 +1,4 @@
.. _v2m_beetle_board:
.. zephyr:board:: v2m_beetle
ARM V2M Beetle
##############
@@ -49,36 +49,7 @@ ARM V2M BEETLE provides the following hardware components:
Supported Features
===================
The v2m_beetle board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| TIMER | on-chip | timer |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by the port.
See the `V2M Beetle Website`_ for a complete list of V2M Beetle board hardware
features.
The default configuration can be found in the defconfig file:
.. code-block:: console
boards/arm/v2m_beetle/v2m_beetle_defconfig
.. zephyr:board-supported-hw::
Interrupt Controller
====================

View File

@@ -1,4 +1,4 @@
.. _v2m_musca_b1_board:
.. zephyr:board:: v2m_musca_b1
ARM V2M Musca B1
################
@@ -72,33 +72,7 @@ The v2m_musca_b1 board provides the following user push buttons:
Supported Features
===================
The v2m_musca_b1 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| TIMER | on-chip | timer |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by the port.
See the `V2M Musca B1 Website`_ for a complete list of V2M Musca board hardware
features.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/arm/v2m_musca_b1/v2m_musca_b1_defconfig`.
.. zephyr:board-supported-hw::
Interrupt Controller
====================

View File

@@ -1,4 +1,4 @@
.. _v2m_musca_s1_board:
.. zephyr:board:: v2m_musca_s1
ARM V2M Musca-S1
################
@@ -69,33 +69,7 @@ The v2m_musca_s1 board provides the following user push buttons:
Supported Features
===================
The v2m_musca_s1 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| TIMER | on-chip | timer |
+-----------+------------+-------------------------------------+
| TrustZone | on-chip | Trusted Firmware-M |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by the port.
See the `V2M Musca-S1 Website`_ for a complete list of V2M Musca-S1 board
hardware features.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/arm/v2m_musca_s1/v2m_musca_s1_defconfig`.
.. zephyr:board-supported-hw::
Interrupt Controller
====================

10
boards/cytron/index.rst Normal file
View File

@@ -0,0 +1,10 @@
.. _boards-cytron:
Cytron
######
.. toctree::
:maxdepth: 1
:glob:
**/*

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@@ -0,0 +1,5 @@
# Copyright (c) 2025 Jonas Berg
# SPDX-License-Identifier: Apache-2.0
config BOARD_MAKER_UNO_RP2040
select RP2_FLASH_W25Q080

View File

@@ -0,0 +1,16 @@
# Copyright (c) 2022 Peter Johanson
# SPDX-License-Identifier: Apache-2.0
if BOARD_MAKER_UNO_RP2040
if I2C_DW
config I2C_DW_CLOCK_SPEED
default 125
endif # I2C_DW
config USB_SELF_POWERED
default n
endif # BOARD_MAKER_UNO_RP2040

View File

@@ -0,0 +1,5 @@
# Copyright (c) 2025 Jonas Berg
# SPDX-License-Identifier: Apache-2.0
config BOARD_MAKER_UNO_RP2040
select SOC_RP2040

View File

@@ -0,0 +1,42 @@
/*
* Copyright (c) 2025 Jonas Berg
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 26 0>, /* A0 */
<1 0 &gpio0 27 0>, /* A1 */
<2 0 &gpio0 28 0>, /* A2 */
<3 0 &gpio0 29 0>, /* A3 */
<4 0 &gpio0 20 0>, /* SDA */
<5 0 &gpio0 21 0>, /* SCL */
<6 0 &gpio0 1 0>, /* GP1 */
<7 0 &gpio0 0 0>, /* GP0 */
<8 0 &gpio0 2 0>, /* GP2 */
<9 0 &gpio0 3 0>, /* GP3 */
<10 0 &gpio0 4 0>, /* GP4 */
<11 0 &gpio0 5 0>, /* GP5 */
<12 0 &gpio0 6 0>, /* GP6 */
<13 0 &gpio0 7 0>, /* GP7 */
<14 0 &gpio0 8 0>, /* GP8 */
<15 0 &gpio0 9 0>, /* GP9 */
<16 0 &gpio0 13 0>, /* GP13 */
<17 0 &gpio0 11 0>, /* GP11 */
<18 0 &gpio0 12 0>, /* GP12 */
<19 0 &gpio0 10 0>, /* GP10 */
<20 0 &gpio0 20 0>, /* GP20 */
<21 0 &gpio0 21 0>; /* GP21 */
};
};
arduino_i2c: &i2c0 {};
arduino_serial: &uart0 {};
arduino_spi: &spi1 {};

View File

@@ -0,0 +1,6 @@
# SPDX-License-Identifier: Apache-2.0
# Copyright (c) 2023 TOKITA Hiroshi
board_runner_args(uf2 "--board-id=RPI-RP2")
include(${ZEPHYR_BASE}/boards/common/uf2.board.cmake)

View File

@@ -0,0 +1,6 @@
board:
name: maker_uno_rp2040
full_name: Cytron Maker Uno RP2040
vendor: cytron
socs:
- name: rp2040

Binary file not shown.

After

Width:  |  Height:  |  Size: 20 KiB

View File

@@ -0,0 +1,293 @@
.. zephyr:board:: maker_uno_rp2040
Overview
********
The `Cytron Maker Uno RP2040`_ board is based on the RP2040 microcontroller from Raspberry Pi Ltd.
The board has an Arduino header, several Grove connectors and a USB type C connector.
Hardware
********
- Microcontroller Raspberry Pi RP2040, with a max frequency of 133 MHz
- Dual ARM Cortex M0+ cores
- 264 kByte SRAM
- 2 Mbyte QSPI flash
- 16 GPIO pins
- 4 ADC pins
- I2C
- SPI
- UART
- USB type C connector
- LiPo charger
- Reset, boot and user buttons
- 2 RGB LEDs (Neopixels)
- Piezo buzzer with mute switch
- 4 servo ports
- Maker/Qwiic/Stemma QT/zephyr_i2c connector
- 6 Grove connectors
- Status indicators for digital pins
Default Zephyr Peripheral Mapping
=================================
The RGB LEDs are connected to GPIO25, and its pin mux setting is PIO0.
Arduino headers (note that GPIO20 and GPIO21 appear twice):
+-------+--------+-----------------+-------------------+
| Label | Pin | Default pin mux | Also in connector |
+=======+========+=================+===================+
| A0 | GPIO26 | ADC0 | Grove 3 |
+-------+--------+-----------------+-------------------+
| A1 | GPIO27 | ADC1 | Grove 4 |
+-------+--------+-----------------+-------------------+
| A2 | GPIO28 | ADC2 | Grove 5 |
+-------+--------+-----------------+-------------------+
| A3 | GPIO29 | ADC3 | Grove 5 |
+-------+--------+-----------------+-------------------+
| SDA | GPIO20 | I2C0 SDA | Grove 6, Maker |
+-------+--------+-----------------+-------------------+
| SCL | GPIO21 | I2C0 SCL | Grove 6, Maker |
+-------+--------+-----------------+-------------------+
| GP1 | GPIO1 | UART0 RX | Grove 1 |
+-------+--------+-----------------+-------------------+
| GP0 | GPIO0 | UART0 TX | Grove 1 |
+-------+--------+-----------------+-------------------+
| GP2 | GPIO2 | GPIO pull-up | User button |
+-------+--------+-----------------+-------------------+
| GP3 | GPIO3 | (Alias led0) | |
+-------+--------+-----------------+-------------------+
| GP4 | GPIO4 | | Grove 2 |
+-------+--------+-----------------+-------------------+
| GP5 | GPIO5 | | Grove 2 |
+-------+--------+-----------------+-------------------+
| GP6 | GPIO6 | | Grove 3 |
+-------+--------+-----------------+-------------------+
| GP7 | GPIO7 | | Grove 4 |
+-------+--------+-----------------+-------------------+
| GP8 | GPIO8 | | Buzzer |
+-------+--------+-----------------+-------------------+
| GP9 | GPIO9 | | |
+-------+--------+-----------------+-------------------+
| GP13 | GPIO13 | SPI1 CS | |
+-------+--------+-----------------+-------------------+
| GP11 | GPIO11 | SPI1 MOSI | SPI header |
+-------+--------+-----------------+-------------------+
| GP12 | GPIO12 | SPI1 MISO | SPI header |
+-------+--------+-----------------+-------------------+
| GP10 | GPIO10 | SPI1 SCK | SPI header |
+-------+--------+-----------------+-------------------+
| GP20 | GPIO20 | I2C0 SDA | Grove 6, Maker |
+-------+--------+-----------------+-------------------+
| GP21 | GPIO21 | I2C0 SCL | Grove 6, Maker |
+-------+--------+-----------------+-------------------+
SPI 6-pin header (pins also available in the Arduino header):
+-------+--------+-----------------+
| Label | Pin | Default pin mux |
+=======+========+=================+
| GP10 | GPIO10 | SPI1 SCK |
+-------+--------+-----------------+
| GP11 | GPIO11 | SPI1 MOSI |
+-------+--------+-----------------+
| GP12 | GPIO12 | SPI1 MISO |
+-------+--------+-----------------+
Servo header:
+-------+--------+-----------------+-----------------+
| Label | Pin | Default pin mux | Zephyr PWM name |
+=======+========+=================+=================+
| GP14 | GPIO14 | PWM7A | 14 |
+-------+--------+-----------------+-----------------+
| GP15 | GPIO15 | PWM7B | 15 |
+-------+--------+-----------------+-----------------+
| GP16 | GPIO16 | PWM0A | 0 |
+-------+--------+-----------------+-----------------+
| GP17 | GPIO17 | PWM0B | 1 |
+-------+--------+-----------------+-----------------+
Grove connector 1 (pins also available in the Arduino header):
+-------+--------+-----------------+
| Label | Pin | Default pin mux |
+=======+========+=================+
| GP1 | GPIO1 | UART0 RX |
+-------+--------+-----------------+
| GP0 | GPIO0 | UART0 TX |
+-------+--------+-----------------+
Grove connector 2 (pins also available in the Arduino header):
+-------+--------+
| Label | Pin |
+=======+========+
| GP4 | GPIO4 |
+-------+--------+
| GP5 | GPIO5 |
+-------+--------+
Grove connector 3 (pins also available in the Arduino header):
+-------+--------+-----------------+
| Label | Pin | Default pin mux |
+=======+========+=================+
| GP6 | GPIO6 | |
+-------+--------+-----------------+
| A0 | GPIO26 | ADC0 |
+-------+--------+-----------------+
Grove connector 4 (pins also available in the Arduino header):
+-------+--------+-----------------+
| Label | Pin | Default pin mux |
+=======+========+=================+
| GP7 | GPIO7 | |
+-------+--------+-----------------+
| A1 | GPIO27 | ADC1 |
+-------+--------+-----------------+
Grove connector 5 (pins also available in the Arduino header):
+-------+--------+-----------------+
| Label | Pin | Default pin mux |
+=======+========+=================+
| A2 | GPIO28 | ADC2 |
+-------+--------+-----------------+
| A3 | GPIO29 | ADC3 |
+-------+--------+-----------------+
Grove connector 6 (pins also available in the Maker connector and Arduino header):
+-------+--------+-----------------+
| Label | Pin | Default pin mux |
+=======+========+=================+
| GP20 | GPIO20 | I2C0 SDA |
+-------+--------+-----------------+
| GP21 | GPIO21 | I2C0 SCL |
+-------+--------+-----------------+
Maker connector, also known as Qwiic/Stemma QT/zephyr_i2c. The pins are also
available in Grove 6 and the Arduino header:
+-------+--------+-----------------+
| Label | Pin | Default pin mux |
+=======+========+=================+
| GP20 | GPIO20 | I2C0 SDA |
+-------+--------+-----------------+
| GP21 | GPIO21 | I2C0 SCL |
+-------+--------+-----------------+
See also `schematic`_.
Supported Features
==================
.. zephyr:board-supported-hw::
Programming and Debugging
*************************
.. zephyr:board-supported-runners::
The Maker Uno RP2040 board does not expose the SWDIO and SWCLK pins, so programming must be
done via the USB port. Press and hold the BOOT button, and then press the RST button,
and the device will appear as a USB mass storage unit.
Building your application will result in a :file:`build/zephyr/zephyr.uf2` file.
Drag and drop the file to the USB mass storage unit, and the board will be reprogrammed.
For more details on programming RP2040-based boards, see :ref:`rpi_pico_programming_and_debugging`.
Flashing
========
To run the :zephyr:code-sample:`led-strip` sample:
.. zephyr-app-commands::
:zephyr-app: samples/drivers/led/led_strip/
:board: maker_uno_rp2040
:goals: build flash
Try also the :zephyr:code-sample:`hello_world`, :zephyr:code-sample:`blinky`,
:zephyr:code-sample:`button`, :zephyr:code-sample:`input-dump` and
:zephyr:code-sample:`adc_dt` samples.
The use of the Maker/Qwiic/Stemma QT I2C connector is demonstrated using the
:zephyr:code-sample:`light_sensor_polling` sample and a separate shield:
.. zephyr-app-commands::
:zephyr-app: samples/sensor/light_polling
:board: maker_uno_rp2040
:shield: adafruit_veml7700
:goals: build flash
Use the shell to control the GPIO pins:
.. zephyr-app-commands::
:zephyr-app: samples/sensor/sensor_shell
:board: maker_uno_rp2040
:gen-args: -DCONFIG_GPIO=y -DCONFIG_GPIO_SHELL=y
:goals: build flash
To set one of the GPIO pins high, use these commands in the shell, and study the indicator LEDs:
.. code-block:: shell
gpio conf gpio0 2 o
gpio set gpio0 2 1
Servo motor control is done via PWM outputs. The :zephyr:code-sample:`servo-motor`
sample sets servo position timing (via an overlay file) for the output GP14:
.. zephyr-app-commands::
:zephyr-app: samples/basic/servo_motor/
:board: maker_uno_rp2040
:goals: build flash
It is also possible to control servos via the pwm shell:
.. zephyr-app-commands::
:zephyr-app: samples/sensor/sensor_shell
:board: maker_uno_rp2040
:gen-args: -DCONFIG_PWM=y -DCONFIG_PWM_SHELL=y
:goals: build flash
Use shell commands to set the posiotion of the server. Most servo motor can handle pulse
times between 800 and 2000 microseconds:
.. code-block:: shell
pwm usec pwm@40050000 14 20000 800
pwm usec pwm@40050000 14 20000 2000
To use the buzzer, you must set the pin mux for GPIO8 to PWM. This is done by adding ``PWM_4A_P8``
to the ``pwm_default`` section in the
:zephyr_file:`boards/cytron/maker_uno_rp2040/maker_uno_rp2040-pinctrl.dtsi` file.
Turn on the buzzer switch on the long side of the board. Then build using the same command
as above for the sensor_shell.
Use these shell commands to turn on and off the buzzer:
.. code-block:: shell
pwm usec pwm@40050000 8 1000 500
pwm usec pwm@40050000 8 1000 0
References
**********
.. target-notes::
.. _Cytron Maker Uno RP2040:
https://www.cytron.io/p-maker-uno-rp2040
.. _schematic:
https://drive.google.com/file/d/1BNqbxXScMXnL3-2YYfbR66nFCD1li71X/view

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@@ -0,0 +1,57 @@
/*
* Copyright (c) 2025 Jonas Berg
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
&pinctrl {
adc_default: adc_default {
group1 {
pinmux = <ADC_CH0_P26>, <ADC_CH1_P27>, <ADC_CH2_P28>, <ADC_CH3_P29>;
input-enable;
};
};
spi1_default: spi1_default {
group1 {
pinmux = <SPI1_TX_P11>, <SPI1_SCK_P10>, <SPI1_CSN_P13>;
};
group2 {
pinmux = <SPI1_RX_P12>;
input-enable;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_P20>, <I2C0_SCL_P21>;
input-enable;
};
};
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_P0>;
};
group2 {
pinmux = <UART0_RX_P1>;
input-enable;
};
};
pwm_default: pwm_default {
group1 {
pinmux = <PWM_7A_P14>, <PWM_7B_P15>, <PWM_0A_P16>, <PWM_0B_P17>;
};
};
ws2812_pio0_default: ws2812_pio0_default {
ws2812 {
pinmux = <PIO0_P25>;
};
};
};

View File

@@ -0,0 +1,214 @@
/*
* Copyright (c) 2021 Yonatan Schachter
* Copyright (c) 2022 Peter Johanson
* Copyright (c) 2025 Jonas Berg
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <raspberrypi/rpi_pico/rp2040.dtsi>
#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/led/led.h>
#include "arduino_r3_connector.dtsi"
#include "maker_uno_rp2040-pinctrl.dtsi"
/ {
model = "Cytron Maker Uno RP2040";
compatible = "cytron,maker_uno_rp2040";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,flash-controller = &ssi;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,code-partition = &code_partition;
};
aliases {
led0 = &led_gp3;
led-strip = &ws2812;
sw0 = &user_button;
watchdog0 = &wdt0;
};
zephyr,user {
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>;
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpio0 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_0>;
};
};
leds {
compatible = "gpio-leds";
led_gp3: led_gp3 {
gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
label = "LED GP3";
};
};
stemma_connector: stemma_connector {
compatible = "stemma-qt-connector";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 21 0>, /* SCL */
<1 0 &gpio0 20 0>; /* SDA */
};
};
&flash0 {
reg = <0x10000000 DT_SIZE_M(2)>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserved memory for the second stage bootloader */
second_stage_bootloader: partition@0 {
label = "second_stage_bootloader";
reg = <0x00000000 0x100>;
read-only;
};
/*
* Usable flash. Starts at 0x100, after the bootloader. The partition
* size is 2 MB minus the 0x100 bytes taken by the bootloader.
*/
code_partition: partition@100 {
label = "code-partition";
reg = <0x100 (DT_SIZE_M(2) - 0x100)>;
read-only;
};
};
};
&gpio0 {
status = "okay";
};
&uart0 {
current-speed = <115200>;
status = "okay";
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
zephyr_i2c: &i2c0 {
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
pinctrl-0 = <&spi1_default>;
pinctrl-names = "default";
status = "okay";
};
&timer {
status = "okay";
};
&wdt0 {
status = "okay";
};
&adc {
status = "okay";
pinctrl-0 = <&adc_default>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
};
channel@1 {
reg = <1>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
};
channel@2 {
reg = <2>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
};
channel@3 {
reg = <3>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
};
};
&pwm {
pinctrl-0 = <&pwm_default>;
pinctrl-names = "default";
status = "okay";
};
&pio0 {
status = "okay";
pio-ws2812 {
compatible = "worldsemi,ws2812-rpi_pico-pio";
status = "okay";
pinctrl-0 = <&ws2812_pio0_default>;
pinctrl-names = "default";
bit-waveform = <3>, <3>, <4>;
ws2812: ws2812 {
status = "okay";
gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
chain-length = <2>;
color-mapping = <LED_COLOR_ID_GREEN
LED_COLOR_ID_RED
LED_COLOR_ID_BLUE>;
reset-delay = <280>;
frequency = <800000>;
};
};
};
zephyr_udc0: &usbd {
status = "okay";
};
&die_temp {
status = "okay";
};
&vreg {
regulator-always-on;
regulator-allowed-modes = <REGULATOR_RPI_PICO_MODE_NORMAL>;
};
&xosc {
startup-delay-multiplier = <64>;
};

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identifier: maker_uno_rp2040
name: Cytron Maker Uno RP2040
type: mcu
arch: arm
flash: 2048
ram: 264
toolchain:
- zephyr
- gnuarmemb
supported:
- adc
- clock
- counter
- dma
- flash
- gpio
- hwinfo
- i2c
- pwm
- spi
- uart
- watchdog

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# Copyright (c) 2025 Jonas Berg
# SPDX-License-Identifier: Apache-2.0
CONFIG_BUILD_OUTPUT_UF2=y
CONFIG_CLOCK_CONTROL=y
CONFIG_CONSOLE=y
CONFIG_GPIO=y
CONFIG_PIO_RPI_PICO=y
CONFIG_RESET=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_USE_DT_CODE_PARTITION=y

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# Copyright (c) 2025 Stephano Cetola
# SPDX-License-Identifier: Apache-2.0
if BOARD_MOTION_2350_PRO
config USB_SELF_POWERED
default n
endif # BOARD_MOTION_2350_PRO

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# Copyright (c) 2025 Jonas Berg
# SPDX-License-Identifier: Apache-2.0
config BOARD_MOTION_2350_PRO
select SOC_RP2350A_HAZARD3 if BOARD_MOTION_2350_PRO_RP2350A_HAZARD3
select SOC_RP2350A_M33 if BOARD_MOTION_2350_PRO_RP2350A_M33

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# SPDX-License-Identifier: Apache-2.0
# Adapted from boards/raspberrypi/rpi_pico2/board.cmake
if("${RPI_PICO_DEBUG_ADAPTER}" STREQUAL "")
set(RPI_PICO_DEBUG_ADAPTER "cmsis-dap")
endif()
board_runner_args(openocd --cmd-pre-init "source [find interface/${RPI_PICO_DEBUG_ADAPTER}.cfg]")
if(CONFIG_ARM)
board_runner_args(openocd --cmd-pre-init "source [find target/rp2350.cfg]")
else()
board_runner_args(openocd --cmd-pre-init "source [find target/rp2350-riscv.cfg]")
endif()
# The adapter speed is expected to be set by interface configuration.
# The Raspberry Pi's OpenOCD fork doesn't, so match their documentation at
# https://www.raspberrypi.com/documentation/microcontrollers/debug-probe.html#debugging-with-swd
board_runner_args(openocd --cmd-pre-init "adapter speed 5000")
board_runner_args(probe-rs "--chip=RP235x")
board_runner_args(jlink "--device=RP2350_M33_0")
board_runner_args(uf2 "--board-id=RP2350")
# Default runner should be listed first
include(${ZEPHYR_BASE}/boards/common/uf2.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/probe-rs.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

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board:
name: motion_2350_pro
full_name: Motion 2350 Pro
vendor: cytron
socs:
- name: rp2350a

Binary file not shown.

After

Width:  |  Height:  |  Size: 51 KiB

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.. zephyr:board:: motion_2350_pro
Overview
********
The `Cytron Motion 2350 Pro`_ board is based on the RP2350A microcontroller from Raspberry Pi Ltd.
The board has motor drivers, servo headers, Maker connectors and a USB type C connector.
Hardware
********
- Microcontroller Raspberry Pi RP2350A, with a max frequency of 150 MHz
- Dual ARM Cortex M33 cores, and dual RISC-V Hazard3 cores.
- 520 kByte SRAM
- 2 Mbyte QSPI flash
- 12 GPIO pins
- 4 ADC pins
- I2C
- UART
- USB type C connector
- USB host (USB type A connector)
- Reset, boot and 2 user buttons
- 2 RGB LEDs (Neopixels)
- Piezo buzzer with mute switch
- 8 servo ports
- 4 Motor drivers, with 8 manual test bottons
- 3 Maker connectors, of which one can be used as a Qwiic/Stemma QT/zephyr_i2c connector
- 16 status indicators for digital pins
Default Zephyr Peripheral Mapping
=================================
+---------------+--------+-----------------------------+-----------------+
| Description | Pin | Default pin mux | Zephyr PWM name |
+===============+========+=============================+=================+
| Button 1 | GPIO20 | (Alias sw0) | |
+---------------+--------+-----------------------------+-----------------+
| Button 2 | GPIO21 | (Alias sw1) | |
+---------------+--------+-----------------------------+-----------------+
| Buzzer | GPIO22 | PWM3A (also used for servo) | 6 |
+---------------+--------+-----------------------------+-----------------+
| RGB LEDs | GPIO23 | PIO0 | |
+---------------+--------+-----------------------------+-----------------+
| USB host D+ | GPIO24 | | |
+---------------+--------+-----------------------------+-----------------+
| USB host D- | GPIO25 | | |
+---------------+--------+-----------------------------+-----------------+
GPIO header:
+-------+--------+-----------------+----------------------+
| Label | Pin | Default pin mux | Also in connector |
+=======+========+=================+======================+
| GP16 | GPIO16 | I2C0 SDA | Maker port GP16+GP17 |
+-------+--------+-----------------+----------------------+
| GP17 | GPIO17 | I2C0 SCL | Maker port GP16+GP17 |
+-------+--------+-----------------+----------------------+
| GP18 | GPIO18 | (Alias led0) | |
+-------+--------+-----------------+----------------------+
| GP19 | GPIO19 | (Alias led1) | |
+-------+--------+-----------------+----------------------+
| GP26 | GPIO26 | ADC0 | Maker port GP26+GP27 |
+-------+--------+-----------------+----------------------+
| GP27 | GPIO27 | ADC1 | Maker port GP26+GP27 |
+-------+--------+-----------------+----------------------+
| GP28 | GPIO28 | UART0 TX | Maker port GP28+GP29 |
+-------+--------+-----------------+----------------------+
| GP29 | GPIO29 | UART0 RX | Maker port GP28+GP29 |
+-------+--------+-----------------+----------------------+
Servo header (Note that PWM3A is also used for the buzzer):
+-------+--------+-----------------+-----------------+
| Label | Pin | Default pin mux | Zephyr PWM name |
+=======+========+=================+=================+
| GP0 | GPIO0 | PWM0A | 0 |
+-------+--------+-----------------+-----------------+
| GP1 | GPIO1 | PWM0B | 1 |
+-------+--------+-----------------+-----------------+
| GP2 | GPIO2 | PWM1A | 2 |
+-------+--------+-----------------+-----------------+
| GP3 | GPIO3 | PWM1B | 3 |
+-------+--------+-----------------+-----------------+
| GP4 | GPIO4 | PWM2A | 4 |
+-------+--------+-----------------+-----------------+
| GP5 | GPIO5 | PWM2B | 5 |
+-------+--------+-----------------+-----------------+
| GP6 | GPIO6 | PWM3A | 6 |
+-------+--------+-----------------+-----------------+
| GP7 | GPIO7 | PWM3B | 7 |
+-------+--------+-----------------+-----------------+
Motor drivers:
+-------+--------+-----------------+-----------------+
| Label | Pin | Default pin mux | Zephyr PWM name |
+=======+========+=================+=================+
| M1A | GPIO8 | PWM4A | 8 |
+-------+--------+-----------------+-----------------+
| M1B | GPIO9 | PWM4B | 9 |
+-------+--------+-----------------+-----------------+
| M2A | GPIO10 | PWM5A | 10 |
+-------+--------+-----------------+-----------------+
| M2B | GPIO11 | PWM5B | 11 |
+-------+--------+-----------------+-----------------+
| M3A | GPIO12 | PWM6A | 12 |
+-------+--------+-----------------+-----------------+
| M3B | GPIO13 | PWM6B | 13 |
+-------+--------+-----------------+-----------------+
| M4A | GPIO14 | PWM7A | 14 |
+-------+--------+-----------------+-----------------+
| M4B | GPIO15 | PWM7B | 15 |
+-------+--------+-----------------+-----------------+
Connector GP16+GP17:
Connect Qwiic/Stemma QT sensors (that use I2C) to this connector.
The pins are also available in the GPIO header.
+-------+--------+-----------------+
| Label | Pin | Default pin mux |
+=======+========+=================+
| GP16 | GPIO16 | I2C0 SDA |
+-------+--------+-----------------+
| GP17 | GPIO17 | I2C0 SCL |
+-------+--------+-----------------+
Connector GP26+GP27:
The pins are also available in the GPIO header.
+-------+--------+-----------------+
| Label | Pin | Default pin mux |
+=======+========+=================+
| GP26 | GPIO26 | ADC0 |
+-------+--------+-----------------+
| GP27 | GPIO27 | ADC1 |
+-------+--------+-----------------+
Connector GP28+GP29:
The pins are also available in the GPIO header.
+-------+--------+-----------------+
| Label | Pin | Default pin mux |
+=======+========+=================+
| GP28 | GPIO28 | UART0 TX |
+-------+--------+-----------------+
| GP29 | GPIO29 | UART0 RX |
+-------+--------+-----------------+
See also `pinout`_.
Supported Features
==================
Note that USB host (the big USB type A connector) is not yet supported.
.. zephyr:board-supported-hw::
Programming and Debugging
*************************
.. zephyr:board-supported-runners::
By default programming is done via the USB connector. Press and hold the BOOT button, and then
press the RST button, and the device will appear as a USB mass storage unit.
Building your application will result in a :file:`build/zephyr/zephyr.uf2` file.
Drag and drop the file to the USB mass storage unit, and the board will be reprogrammed.
It is also possible to program and debug the board via the SWDIO and SWCLK pins in the DEBUG
connector. You must solder a 3-pin header to the board in order to use this feature.
A separate programming hardware tool is required, and for example the :command:`openocd` software
is used. You might need to use Raspberry Pi's forked version of OpenOCD.
Typically the ``OPENOCD`` and ``OPENOCD_DEFAULT_PATH`` values should be set when
building, and the ``--runner openocd`` argument should be used when flashing.
For more details on programming RP2040-based and RP2350-based boards,
see :ref:`rpi_pico_programming_and_debugging`.
Flashing the M33 core
=====================
To run the :zephyr:code-sample:`blinky` sample:
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky/
:board: motion_2350_pro/rp2350a/m33
:goals: build flash
Try also the :zephyr:code-sample:`led-strip`, :zephyr:code-sample:`hello_world`,
:zephyr:code-sample:`button`, :zephyr:code-sample:`input-dump` and
:zephyr:code-sample:`adc_dt` samples.
The use of the Maker/Qwiic/Stemma QT I2C connector (GP16+GP17) is demonstrated using the
:zephyr:code-sample:`light_sensor_polling` sample and a separate shield:
.. zephyr-app-commands::
:zephyr-app: samples/sensor/light_polling
:board: motion_2350_pro/rp2350a/m33
:shield: adafruit_veml7700
:goals: build flash
Use the shell to control the GPIO pins:
.. zephyr-app-commands::
:zephyr-app: samples/sensor/sensor_shell
:board: motion_2350_pro/rp2350a/m33
:gen-args: -DCONFIG_GPIO=y -DCONFIG_GPIO_SHELL=y
:goals: build flash
To set one of the GPIO pins high, use these commands in the shell, and study the indicator LEDs:
.. code-block:: shell
gpio conf gpio0 18 o
gpio set gpio0 18 1
Servo motor control is done via PWM outputs. The :zephyr:code-sample:`servo-motor`
sample sets servo position timing (via an overlay file) for the output GP0:
.. zephyr-app-commands::
:zephyr-app: samples/basic/servo_motor/
:board: motion_2350_pro/rp2350a/m33
:goals: build flash
It is also possible to control servos via the pwm shell:
.. zephyr-app-commands::
:zephyr-app: samples/sensor/sensor_shell
:board: motion_2350_pro/rp2350a/m33
:gen-args: -DCONFIG_PWM=y -DCONFIG_PWM_SHELL=y
:goals: build flash
Use shell commands to set the position of the servo. Most servo motors can handle pulse
times between 800 and 2000 microseconds:
.. code-block:: shell
pwm usec pwm@400a8000 0 20000 800
pwm usec pwm@400a8000 0 20000 2000
To use the buzzer, you must turn on the buzzer switch on the short side of the board.
Then build using the same command as above for the sensor_shell.
Use these shell commands to turn on and off the buzzer:
.. code-block:: shell
pwm usec pwm@400a8000 6 1000 500
pwm usec pwm@400a8000 6 1000 0
You can also control the motor outputs via the shell. To set the speed of motor 1 to
100%, 50%, 20% and 0% respectively, use these commands:
.. code-block:: shell
pwm usec pwm@400a8000 8 1000 1000
pwm usec pwm@400a8000 8 1000 500
pwm usec pwm@400a8000 8 1000 200
pwm usec pwm@400a8000 8 1000 0
To run the motor in the opposite direction at 80% speed:
.. code-block:: shell
pwm usec pwm@400a8000 9 1000 800
Flashing the Hazard3 core
=========================
The RP2350A microcontroller has two ARM M33 cores and two RISC-V Hazard3 cores.
To flash one of the Hazard3 cores, use the board argument ``motion_2350_pro/rp2350a/hazard3``.
The samples :zephyr:code-sample:`blinky` and :zephyr:code-sample:`input-dump` have been
verified for this core. Use the USB mass storage programming method described above.
References
**********
.. target-notes::
.. _Cytron Motion 2350 Pro:
https://www.cytron.io/p-motion-2350-pro
.. _pinout:
https://static.cytron.io/image/catalog/products/MOTION-2350-PRO/pinout-diagram-motion-2350-pro3.png

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/*
* Copyright (c) 2025 Jonas Berg
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2350a-pinctrl.h>
&pinctrl {
adc_default: adc_default {
group1 {
pinmux = <ADC_CH0_P26>, <ADC_CH1_P27>;
input-enable;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_P16>, <I2C0_SCL_P17>;
input-enable;
};
};
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_P28>;
};
group2 {
pinmux = <UART0_RX_P29>;
input-enable;
};
};
pwm_default: pwm_default {
group1 {
pinmux = <PWM_0A_P0>, <PWM_0B_P1>, <PWM_1A_P2>, <PWM_1B_P3>,
<PWM_2A_P4>, <PWM_2B_P5>, <PWM_3A_P6>, <PWM_3B_P7>,
<PWM_4A_P8>, <PWM_4B_P9>, <PWM_5A_P10>, <PWM_5B_P11>,
<PWM_6A_P12>, <PWM_6B_P13>, <PWM_7A_P14>, <PWM_7B_P15>,
<PWM_3A_P22>;
};
};
ws2812_pio0_default: ws2812_pio0_default {
ws2812 {
pinmux = <PIO0_P23>;
};
};
};

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/*
* Copyright (c) 2025 Stephano Cetola
* Copyright (c) 2025 Jonas Berg
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <freq.h>
#include <zephyr/dt-bindings/i2c/i2c.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/led/led.h>
#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2350a-pinctrl.h>
#include <zephyr/dt-bindings/pwm/pwm.h>
#include "motion_2350_pro-pinctrl.dtsi"
/ {
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
};
aliases {
led-strip = &ws2812;
led0 = &led_gp18;
led1 = &led_gp19;
sw0 = &button_gp20;
sw1 = &button_gp21;
watchdog0 = &wdt0;
};
zephyr,user {
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>;
};
gpio_keys {
compatible = "gpio-keys";
button_gp20: button_gp20 {
label = "Button GP20";
gpios = <&gpio0 20 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_0>;
};
button_gp21: button_gp21 {
label = "Button GP21";
gpios = <&gpio0 21 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_1>;
};
};
leds: leds {
compatible = "gpio-leds";
led_gp18: led_gp18 {
gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
label = "LED GP18";
};
led_gp19: led_gp19 {
gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
label = "LED GP10";
};
};
stemma_connector: stemma_connector {
compatible = "stemma-qt-connector";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 17 0>, /* SCL */
<1 0 &gpio0 16 0>; /* SDA */
};
};
&flash0 {
reg = <0x10000000 DT_SIZE_M(2)>;
};
&gpio0 {
status = "okay";
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
zephyr_i2c: &i2c0 {
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>;
};
&adc {
status = "okay";
pinctrl-0 = <&adc_default>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
};
channel@1 {
reg = <1>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
};
channel@2 {
reg = <2>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
};
channel@3 {
reg = <3>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
};
};
&pio0 {
status = "okay";
pio-ws2812 {
compatible = "worldsemi,ws2812-rpi_pico-pio";
status = "okay";
pinctrl-0 = <&ws2812_pio0_default>;
pinctrl-names = "default";
bit-waveform = <3>, <3>, <4>;
ws2812: ws2812 {
status = "okay";
gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
chain-length = <2>;
color-mapping = <LED_COLOR_ID_RED
LED_COLOR_ID_GREEN
LED_COLOR_ID_BLUE>;
reset-delay = <280>;
frequency = <DT_FREQ_K(800)>;
};
};
};
&pwm {
status = "okay";
pinctrl-0 = <&pwm_default>;
pinctrl-names = "default";
divider-int-0 = <255>;
};
&timer0 {
status = "okay";
};
&wdt0 {
status = "okay";
};
zephyr_udc0: &usbd {
status = "okay";
};

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/*
* Copyright (c) 2025 Jonas Berg
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <raspberrypi/rpi_pico/rp2350a.dtsi>
#include <riscv/raspberrypi/hazard3.dtsi>
#include "motion_2350_pro.dtsi"

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identifier: motion_2350_pro/rp2350a/hazard3
name: Cytron Motion 2350 Pro (Hazard3)
type: mcu
arch: riscv
flash: 2048
ram: 520
toolchain:
- zephyr
supported:
- adc
- clock
- counter
- dma
- flash
- gpio
- hwinfo
- i2c
- pwm
- spi
- uart
- usbd
- watchdog

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# Copyright (c) 2025 Jonas Berg
# SPDX-License-Identifier: Apache-2.0
CONFIG_BUILD_OUTPUT_HEX=y
CONFIG_BUILD_OUTPUT_UF2=y
CONFIG_CLOCK_CONTROL=y
CONFIG_CONSOLE=y
CONFIG_GPIO=y
CONFIG_PIO_RPI_PICO=y
CONFIG_RESET=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_USE_DT_CODE_PARTITION=y

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/*
* Copyright (c) 2025 Jonas Berg
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <raspberrypi/rpi_pico/rp2350a.dtsi>
#include <raspberrypi/rpi_pico/m33.dtsi>
#include "motion_2350_pro.dtsi"

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identifier: motion_2350_pro/rp2350a/m33
name: Cytron Motion 2350 Pro (Cortex M33)
type: mcu
arch: arm
flash: 2048
ram: 520
toolchain:
- zephyr
- gnuarmemb
supported:
- adc
- clock
- counter
- dma
- flash
- gpio
- hwinfo
- i2c
- pwm
- spi
- uart
- usbd
- watchdog

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@@ -0,0 +1,14 @@
# Copyright (c) 2025 Jonas Berg
# SPDX-License-Identifier: Apache-2.0
CONFIG_BUILD_OUTPUT_HEX=y
CONFIG_BUILD_OUTPUT_UF2=y
CONFIG_CLOCK_CONTROL=y
CONFIG_CONSOLE=y
CONFIG_GPIO=y
CONFIG_PIO_RPI_PICO=y
CONFIG_RESET=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_USE_DT_CODE_PARTITION=y

View File

@@ -79,3 +79,9 @@ set(fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp_DEPRECATED
set(fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp/ns_DEPRECATED
fvp_base_revc_2xaem/v8a/smp/ns
)
set(esp32s3_devkitm/esp32s3/procpu_DEPRECATED
esp32s3_devkitc/esp32s3/procpu
)
set(esp32s3_devkitm/esp32s3/appcpu_DEPRECATED
esp32s3_devkitc/esp32s3/appcpu
)

View File

@@ -0,0 +1,6 @@
# Copyright (c) 2025 Mikołaj Rosowski
# SPDX-License-Identifier: Apache-2.0
config HEAP_MEM_POOL_ADD_SIZE_BOARD
int
default 4096

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@@ -0,0 +1,5 @@
# Copyright (c) 2025 Mikołaj Rosowski
# SPDX-License-Identifier: Apache-2.0
config BOARD_BEETLE_ESP32C3
select SOC_ESP32C3_FN4

View File

@@ -1,4 +1,4 @@
# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
# Copyright (c) 2025 Mikołaj Rosowski
# SPDX-License-Identifier: Apache-2.0
choice BOOTLOADER

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@@ -0,0 +1,52 @@
/*
* Copyright (c) 2025 Mikołaj Rosowski
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <zephyr/dt-bindings/pinctrl/esp32c3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32c3-gpio-sigmap.h>
&pinctrl {
uart0_default: uart0_default {
group1 {
pinmux = <UART0_RX_GPIO20>;
bias-pull-up;
};
group2 {
pinmux = <UART0_TX_GPIO21>;
output-high;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_GPIO8>,
<I2C0_SCL_GPIO9>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
spim2_default: spim2_default {
group1 {
pinmux = <SPIM2_SCLK_GPIO4>,
<SPIM2_MISO_GPIO5>;
};
group2 {
pinmux = <SPIM2_MOSI_GPIO6>;
output-low;
};
};
twai_default: twai_default {
group1 {
pinmux = <TWAI_TX_GPIO0>,
<TWAI_RX_GPIO1>;
};
};
};

View File

@@ -0,0 +1,104 @@
/*
* Copyright (c) 2025 Mikołaj Rosowski
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <espressif/esp32c3/esp32c3_fx4.dtsi>
#include <espressif/partitions_0x0_default.dtsi>
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/i2c/i2c.h>
#include <zephyr/dt-bindings/pwm/pwm.h>
#include "beetle_esp32c3-pinctrl.dtsi"
/ {
model = "DFRobot Beetle ESP32-C3";
compatible = "dfrobot,beetle_esp32c3";
chosen {
zephyr,sram = &sram0;
zephyr,console = &usb_serial;
zephyr,shell-uart = &usb_serial;
zehpyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,canbus = &twai;
zephyr,bt-hci = &esp32_bt_hci;
};
aliases {
i2c-0 = &i2c0;
led0 = &blue_led;
watchdog0 = &wdt0;
};
leds {
compatible = "gpio-leds";
blue_led: led0 {
gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
label = "Blue LED";
};
};
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&usb_serial {
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
};
&trng0 {
status = "okay";
};
&spi2 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
};
&gpio0 {
status = "okay";
};
&wdt0 {
status = "okay";
};
&timer0 {
status = "okay";
};
&timer1 {
status = "okay";
};
&twai {
status = "okay";
pinctrl-0 = <&twai_default>;
pinctrl-names = "default";
};
&esp32_bt_hci {
status = "okay";
};
&wifi {
status = "okay";
};

View File

@@ -0,0 +1,21 @@
identifier: beetle_esp32c3
name: DFRobot Beetle ESP32-C3
type: mcu
arch: riscv
toolchain:
- zephyr
supported:
- adc
- counter
- crypto
- dma
- entropy
- gpio
- i2c
- input
- nvs
- pwm
- spi
- uart
- watchdog
vendor: dfrobot

View File

@@ -0,0 +1,20 @@
identifier: beetle_esp32c3@1.0.0
name: DFRobot Beetle ESP32-C3 (rev. 1.0.0)
type: mcu
arch: riscv
toolchain:
- zephyr
supported:
- adc
- counter
- crypto
- dma
- entropy
- gpio
- i2c
- nvs
- pwm
- spi
- uart
- watchdog
vendor: dfrobot

View File

@@ -0,0 +1,24 @@
/*
* Copyright (c) 2025 Mikołaj Rosowski
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
aliases {
sw0 = &boot_button;
};
buttons {
compatible = "gpio-keys";
boot_button: button0 {
gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "BOOT button";
zephyr,code = <INPUT_KEY_0>;
};
};
};

View File

@@ -0,0 +1,7 @@
# Copyright (c) 2025 Mikołaj Rosowski
# SPDX-License-Identifier: Apache-2.0
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_GPIO=y

View File

@@ -0,0 +1,10 @@
# Copyright (c) 2025 Mikołaj Rosowski
# SPDX-License-Identifier: Apache-2.0
if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
set(OPENOCD OPENOCD-NOTFOUND)
endif()
find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

View File

@@ -0,0 +1,12 @@
board:
name: beetle_esp32c3
full_name: DFRobot Beetle ESP32-C3
vendor: dfrobot
revision:
format: major.minor.patch
default: "2.0.0"
revisions:
- name: "1.0.0"
- name: "2.0.0"
socs:
- name: esp32c3

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@@ -0,0 +1,63 @@
.. zephyr:board:: beetle_esp32c3
Overview
********
The `DFRobot Beetle ESP32-C3`_ board, mainly intended for IoT
applications, is based on the ESP32-C3 WiFi/Bluetooth
dual-mode chip from Espressif.
Hardware
********
This board is based on the ESP32-C3 with 4MB of flash, WiFi and BLE support.
It has an USB-C port for programming and debugging, built-in battery
charging management function via TP4057 chip and 13 IO ports.
.. include:: ../../../espressif/common/soc-esp32c3-features.rst
:start-after: espressif-soc-esp32c3-features
Supported Features
==================
.. zephyr:board-supported-hw::
Connections and IOs
===================
.. figure:: img/beetle_esp32c3_pinout.webp
:align: center
:alt: Beetle ESP32-C3 Pinout
Beetle ESP32-C3 Pinout
For more details please refer to `DFRobot Beetle ESP32-C3 Wiki`_
System Requirements
*******************
.. include:: ../../../espressif/common/system-requirements.rst
:start-after: espressif-system-requirements
Programming and debugging
*************************
.. zephyr:board-supported-runners::
.. include:: ../../../espressif/common/building-flashing.rst
:start-after: espressif-building-flashing
Debugging
=========
.. include:: ../../../espressif/common/openocd-debugging.rst
:start-after: espressif-openocd-debugging
References
**********
.. target-notes::
.. _`DFRobot Beetle ESP32-C3`: https://www.dfrobot.com/product-2566.html
.. _`DFRobot Beetle ESP32-C3 Wiki`: https://wiki.dfrobot.com/SKU_DFR0868_Beetle_ESP32_C3

View File

@@ -0,0 +1,6 @@
set ESP_RTOS Zephyr
source [find interface/esp_usb_jtag.cfg]
source [find target/esp32c3.cfg]
adapter speed 5000

View File

@@ -13,8 +13,10 @@ This kit provides:
- STM32L072CZ MCU
- Quectel BC95-G NB-IoT
- Expansion connectors:
- PMOD
- Expansion connectors
- PMOD
- Li/SOCI2 Unchargable Battery
- GPIOs exposed via screw terminals on the carrier board
- Housing

View File

@@ -0,0 +1,120 @@
/*
* Copyright (c) 2024 ELAN Microelectronics Corp.
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <arm/armv7-m.dtsi>
#include <elan/em32fxxx.dtsi>
#include <elan/em32f967-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "ELAN EM32F967 Development Board";
compatible = "elan,em32f967_dv";
chosen {
zephyr,sram = &sram0;
zephyr,flash-controller = &em32_flash_controller;
zephyr,flash = &flash0;
};
};
&clk_ahb {
status = "okay";
};
&clk_apb {
clocks = <&clk_ahb>;
status = "okay";
};
&sram0 {
reg = <0x20000000 DT_SIZE_K(272)>;
};
&spi2 {
status = "disabled";
pinctrl-0 = <&spi2_sck_pb5 &spi2_miso_pb6 &spi2_mosi_pb7>;
pinctrl-names = "default";
cs-gpios = <&gpiob 4 GPIO_ACTIVE_LOW>;
};
&uart1 {
status = "disabled";
current-speed = <115200>;
pinctrl-0 = <&uart1_rx_pa1 &uart1_tx_pa2>;
pinctrl-names = "default";
};
&em32_flash_controller {
status = "okay";
};
&gpioa {
status = "disabled";
};
&gpiob {
status = "disabled";
};
zephyr_udc0: &usbd {
status = "disabled";
};
&uid {
status = "disabled";
};
&bbram0 {
status = "disabled";
};
&trng0 {
status = "disabled";
};
&wdt0 {
status = "disabled";
};
&crypto0 {
status = "disabled";
};
/* Enable Timer controllers */
&timer1 {
status = "disabled";
};
&timer2 {
status = "disabled";
};
/* Enable RTC */
&rtc0 {
status = "disabled";
};
/* Enable PWM Controller - PWMB N output on PA3 */
&pwm0 {
status = "disabled";
use-port-a; /* Use Port A pins (PWM_S=0) */
output-type = <1>; /* N output only */
pinctrl-0 = <&pwmb_pa3_n>;
pinctrl-names = "default";
};
&sysctrl {
status = "disabled";
};
&pwrctrl {
status = "disabled";
};
&clkctrl {
status = "disabled";
};

View File

@@ -0,0 +1,12 @@
identifier: 32f967_dv
name: ELAN EM32F967 dv Board
vendor: elan
type: mcu
arch: arm
toolchain:
- zephyr
testing:
default: false
supported: []
ram: 272
flash: 536

View File

@@ -0,0 +1,6 @@
# Copyright (c) 2025 ELAN Microelectronics Corp.
#
# SPDX-License-Identifier: Apache-2.0
config BOARD_32F967_DV
select SOC_EM32F967

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@@ -0,0 +1,12 @@
# Copyright (c) 2025 ELAN Microelectronics Corp.
#
# SPDX-License-Identifier: Apache-2.0
config UART_USE_RUNTIME_CONFIGURE
default n
config UART_INTERRUPT_DRIVEN
default n
config UART_ASYNC_API
default n

View File

@@ -0,0 +1,4 @@
# SPDX-License-Identifier: Apache-2.0
board_set_flasher_ifnset(misc-flasher)
board_finalize_runner_args(misc-flasher)

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@@ -0,0 +1,6 @@
board:
name: 32f967_dv
full_name: ELAN EM32F967
vendor: elan
socs:
- name: em32f967

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@@ -0,0 +1,84 @@
.. zephyr:board:: 32f967_dv
Elan 32f967_dv
##############
Overview
********
The Elan 32f967_dv is a B2B development board based on the Elan em32f967
SoC (ARM Cortex-M4). This board is used to validate the initial SoC
integration with Zephyr.
Hardware
********
The platform provides the following hardware components:
- SoC: Elan em32f967 (ARM Cortex-M4)
- Maximum CPU frequency: 96 MHz
- Embedded Flash: 536 KB
- Embedded RAM: 272 KB
- UART (debug via soldered jump wires, no dedicated connector)
- SPI
- GPIO
- PWM
- USB (used for firmware flashing and application communication)
- Watchdog Timer (WDT)
- Backup domain registers (accessed via Zephyr BBRAM interface)
- True Random Number Generator (TRNG)
- Hardware Crypto Engine
- Timer
- Real-Time Clock (RTC)
Supported Features
==================
.. zephyr:board-supported-hw::
Connections and IOs
===================
- **UART_1 TX/RX** : PA2 / PA1
- **SPI_2 NSS/SCK/MISO/MOSI** : PB4 / PB5 / PB6 / PB7
- **PWM_0 LED** : PA3
Programming and Debugging
*************************
.. zephyr:board-supported-runners::
This board does not use a standard flashing interface such as J-Link or OpenOCD.
Flashing
========
The flashing tool is distributed only to Elan's customers for production and
evaluation purposes. It is not publicly available.
At this stage, the Zephyr ``west flash`` command is not supported.
You can build applications in the usual way. Here is an example for
the :zephyr:code-sample:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: 32f967_dv
:goals: build
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:zephyr:code-sample:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: 32f967_dv
:goals: debug
References
**********
Documentation for this board and the Elan em32f967 SoC is available to Elan customers.
Please contact Elan for datasheets, technical reference manuals, and tooling information.

10
boards/elan/index.rst Normal file
View File

@@ -0,0 +1,10 @@
.. _boards-elan:
Elan Microelectronics Corp.
###########################
.. toctree::
:maxdepth: 1
:glob:
**/*

View File

@@ -18,6 +18,8 @@
aliases {
i2c-0 = &i2c0;
watchdog0 = &wdt0;
uart-0 = &uart0;
sw0 = &button0;
};
chosen {
@@ -29,11 +31,6 @@
zephyr,bt-hci = &esp32_bt_hci;
};
aliases {
uart-0 = &uart0;
sw0 = &button0;
};
buttons {
compatible = "gpio-keys";

View File

@@ -17,6 +17,7 @@ supported:
- pwm
- dma
- input
- video
- crypto
- retained_mem
vendor: espressif

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@@ -1,7 +0,0 @@
# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0
config HEAP_MEM_POOL_ADD_SIZE_BOARD
int
default 4096 if BOARD_ESP32S3_DEVKITM_ESP32S3_PROCPU
default 256 if BOARD_ESP32S3_DEVKITM_ESP32S3_APPCPU

View File

@@ -1,7 +0,0 @@
# Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0
config BOARD_ESP32S3_DEVKITM
select SOC_ESP32S3_MINI_N8
select SOC_ESP32S3_PROCPU if BOARD_ESP32S3_DEVKITM_ESP32S3_PROCPU
select SOC_ESP32S3_APPCPU if BOARD_ESP32S3_DEVKITM_ESP32S3_APPCPU

View File

@@ -1,6 +0,0 @@
board:
name: esp32s3_devkitm
full_name: ESP32-S3-DevKitM
vendor: espressif
socs:
- name: esp32s3

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