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39 Commits

Author SHA1 Message Date
David Brown
f67ff24ff0 cmake: rust: Comment typo fix
Fix a mispelled word "al" -> "all".

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
646ee215c7 cmake: rust: Remove redundant call
Remove a redundant call that does exactly what the previous function
call accomplishes.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
f7fed4da0f doc: develop: rust: Various cleanups to docs
Minor fixes to the documentation from review feedback.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
71619deaee cmake: rust: Add header dependencies to cargo
With bindgen needing to read the headers, make sure CMake knows about
this.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
389c78d573 .gitignore: Ignore Rust 'target' directories
Although the Cmake rules to build Rust applications keeps the target
directory inside of the build directory, some IDE tools may generate a
target directory while editing the code.  Ignore these so they never get
checked in.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
60fde89b38 rust: zephyr-sys: Fixup clang targets for RISCV
Rustc for RISCV encodes optional features on the CPU available as part
of the target tuple.  Clang, on the other hand does not.  In order to be
able to use libclang with bindgen on RISCV, we need to simplify the
target tuples a bit.  Do this by just matching 'riscv32' or 'riscv64'
and then passing in a generic tuple.  We aren't generating any code, and
the structs should always match between the targets.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
0332ce8554 rust: Workaround gcc/clang differences with soft fp
GCC automatically defines a `__SOFTFP__` define on targets that are
using software floating point.  The clang compiler does not do this by
default, so check this, and define it.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
a57ceb78ed Revert "include: Add dummy field for Rust as well as CPP"
This reverts commit 2046760e71.

Put these back so we get the zero element structures when using just
rust and not CPP.  A subsequent patch will suppress the warning.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
c93d7a5ee6 rust: Suppress warning about improper C types
Zephyr takes advantage of a gcc/clang extension that allows structs that
have no elements.  Rust is perfectly happy with this (it is quite common
in Rust code), but generates a warning when a struct containing no
elements is passed to C code.

For now, suppress this warning on the generated bindings.  This has the
disadvantage of suppressing it entirely, which might possibly detect
other cases of invalid structs.  However, the bindings are
auto-generated from C structs so should always be valid.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
a40ddef8d9 cmake: rust: Fix typo on variable name
Fix `WRAPPER_FiLE` to `WRAPPER_FILE`.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
0756a9cfbb rust: Export zephyr-sys as zephyr::raw
Re-export all of the bindgen generated bindings in the zephyr-sys crate
into `zephyr::raw`.  This keeps things easier, as users of `zephyr` only
need to worry about the single `zephyr` crate.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
fc8d858ce8 doc: rust: Add docs on bindings
Add documentation on the bindings between Rust and C, and the bindgen
tool used to generate them.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
d98eae8ca9 rust: zephyr-sys: Use absolute path for wrapper
Change the header passed into bindgen to be an absolute path.  This will
cause the generated wrapper to refer to this file also using an absolute
path.  As such, remove the explicit include path added as part of the
build.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
c440acd3a9 cmake: rust: Compile the bindgen wrapper
When compiling Rust programs, the bindgen utility generates a wrapper file
to expand inline functions, as these otherwise cannot be accessed from
rust.  Pass a consistent name to the cargo build, and add it to our source
build so that this wrapper get compiled.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
8dc77158ff include: Add dummy field for Rust as well as CPP
For CPP builds, a few structs that end up empty in some configurations will
generate compile errors.  With the Rust tools, bindgen ends up producing
empty structsw for these as well.  Although the code compiles, it generates
warnings.  For now, add CONFIG_RUST to the ifdef checks so that these
structs don't end up empty with Rust either.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
acac09ec6d rust: Convert k_str_out to bindgen one
Remove the manual k_str_out wrapper, and use the one generated by bindgen.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
542d65fcd4 rust: Use zephyr-sys to get bindings
Instead of trying to manually generate the bindings, use those generated by
bindgen in the zephyr-sys crate.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
f806a3f9e5 rust: Create zephyr-sys for low-level bindings
With a lot of work done by Mario Jaun <mario.jaun@zuehlke.com>.

Use the rust-bindgen tool to extract bindings from the Zephyr header files.
The tool is run with the exact configuration of the current build, and
therefore the bindings will match the current target.  The ifdefs and such
are not translated into the Rust code, and this must be generated live for
each build.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-09-06 09:15:47 -06:00
David Brown
4dd43cafbd samples: rust: Include rust samples in docs
Include the Sample Rust applications in the doc generation.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
be6c708901 doc: languages: rust: typo fixes
Fix various minor typos in the Rust documentation.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
efd15c89d1 doc: languagues: rust: Reformat
Refill the text to 100 columns instead of 72 to match the rest of the
project.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
63097dfac5 samples: rust: Rename hello world
Rename the sample to just hello world.  As long as the actual sample
name is different, there won't be index conflicts in the documentation.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
21a58bebed samples: rust: Add README for rust hello world
Create a Readme for this sample, explaining how to build and what it
does.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
42b25ccef0 rust: Move ignores to top .gitignore
Apply the rules to ignore some cargo generated or used files to the
whole tree, not just the samples.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
9daf9a6238 samples: rust: Tag the rust sample as rust
Add the 'rust' tag so that CI will invoke this test when rust support
files have changed.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
5249c82425 ci: tags: Add rust tag
The rust tag associates rust tests and samples with code that adds rust
support to Zephyr.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
24a71d59b4 cmake: rust: Add Cortex M7 support
The Cortex-M7 is build the same as M4.  Catch it in the same rules.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
6c8b63cee6 rust: Ignore unknown cfgs in the zephyr crate
We use the `#[cfg(...)]` directive in rust to pass Kconfig values through.
Because it is possible for the code to depend on a Kconfig value that isn't
present in a given build, there isn't a way for us to tell the Rust
toolchain about all possible config values.

For now, just disable this warning entirely.  This functionality could be
supported by the patch validation scripts, which seems like a better place
than trying to gather a list of all possible configs at build time.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
15556acd18 doc: languages: Add Rust documentation
Add initial docs for Rust language support.  Explains the support
currently present, how to install the toolchain needed, and explains
what is in the current sample.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
6b436713f1 MAINTAINERS: Add Rust to maintainers file
Indicate the new code is maintained.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
3f8ebadde7 rust: Simple rust hello_world application
Create the Rust equivalent of the hello_world application.  This shows
the use of printk from Rust as well as accessing a string value from
Kconfig.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
68e2023837 lib: rust: Add simple printk support to Rust
When `CONFIG_PRINTK` is enabled, provide macros `printk` and `printkln`
within the `zephyr` crate that applications can use to print.  This
currently sends messages, with a small amount of buffering, using
`k_str_out`.

Until C functions are made generally available from the Rust side,
we use a small wrapper function to call `k_str_out`, as it is
implemented as an inline syscall.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
1ed0aeab6b rust: Add cmake support for building rust apps
This provides the function `rust_cargo_application()` within Cmake to
give applications written in Rust a simple way to start.

This implements the basic functionality needed to build a rust
application on Arm, including target mapping, and invoking cargo during
the build.

Most of the functionality is about passing the appropriate flags to
`cargo`, which is used to perform the actual build of the rust code.
Cargo generates `librustapp.a` which is added to the link dependencies
for the application.

The cargo rule is written such that cargo will always be built (provided
`app` is being built), as there will be complex dependencies on the
cargo side.  Cargo will not modify the `librustapp.a` file if nothing
needs to be build, so this will generally be fast if there are no
changes to files that affect the Rust build.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
5230bb462e rust: Basic zephyr crates
This is the initial Zephyr-specific crates that provide support for Rust
on Zephyr.  Currently, what they do is fairly minimal, but important.

`zephyr-build` is a build time crate (linked against the `zephyr`
crate's build.rs) that processes the current build's Kconfig settings,
and does three things with them:

  - Boolean Kconfig values given given to the Rust toolchain so that
    conditional compilation can be based off of them.
  - Numeric Kconfig settings end up as constants in `zephyr::kconfig`.
  - String valued Kconfig settings end up as constants in
    `zephyr::kconfig`.

None of these cause code or data to be generated or allocated (but note
that if there is a reference to a string, that string will be placed in
read-only memory).

The `zephyr` crate is built for the target, and intended to be
referenced by the application.  It provides minimal support needed for a
"bare" Rust build, notably a panic handler.  At this point, the panic
handler is not implemented as we need better support for calling into
Zephyr's C code, so it just stops in an infinite loop.

It also ensures that `CONFIG_RUST` is set as a sanity check, and
includes the generated kconfig.rs file with the kconfig definitions for
the current build.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
148e135137 rust: Simple main wrapper
Until further variants are needed, this provides a `main()` function
that simply calls into the `rust_main()` function.  This is adequate for
applications where main can be directly written in Rust.

The reason that this is written here, rather than just writing `main`
directly in Rust is that `kernel/main_weak.c` provides a weak default
implementation that will be brought in before the Rust application's
`main` is linked in.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
3496844d37 rust: Initial config option
Add the `CONFIG_RUST` Kconfig.  This can be set to indicate that an
application wishes to use Rust support.

Adds `CONFIG_RUST_SUPPORTED` to indicate what platforms Rust is known to
work on.  This is set to the targets that are supported by subsequent
commits.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-27 08:47:59 -06:00
David Brown
5cbb204210 github: workflows: Update other docker image reference
The twister workflow contains two references to the docker image to use.
The earlier change only updated one of these.  Update the other to
match.  This should allow rust code to be built in the whole twister
workflow.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-24 07:58:26 -04:00
David Brown
45c96c74e2 github: workflows: Add cargo support to twister
Add cargo's bin to the path, and print out the versioning of the tool to
make it easy to ensure the right version has been installed.

Signed-off-by: David Brown <david.brown@linaro.org>
2024-08-23 09:13:35 -06:00
David Brown
8c4b1635ba github: workflows: Update docker image
Use the v0.24.14 docker image, which adds rust target support.

Signed-off-by: David Brown <david.brown@linaro.org>

fix
2024-08-23 09:13:35 -06:00
11165 changed files with 106289 additions and 324948 deletions

View File

@@ -46,7 +46,6 @@ ForEachMacros:
- 'SYS_DLIST_FOR_EACH_CONTAINER_SAFE'
- 'SYS_DLIST_FOR_EACH_NODE'
- 'SYS_DLIST_FOR_EACH_NODE_SAFE'
- 'SYS_SEM_LOCK'
- 'SYS_SFLIST_FOR_EACH_CONTAINER'
- 'SYS_SFLIST_FOR_EACH_CONTAINER_SAFE'
- 'SYS_SFLIST_FOR_EACH_NODE'
@@ -80,8 +79,6 @@ ForEachMacros:
- 'HTTP_SERVER_CONTENT_TYPE_FOREACH'
- 'HTTP_SERVICE_FOREACH'
- 'HTTP_SERVICE_FOREACH_RESOURCE'
- 'I3C_BUS_FOR_EACH_I3CDEV'
- 'I3C_BUS_FOR_EACH_I2CDEV'
IfMacros:
- 'CHECKIF'
# Disabled for now, see bug https://github.com/zephyrproject-rtos/zephyr/issues/48520
@@ -104,10 +101,5 @@ SpaceBeforeParens: ControlStatementsExceptControlMacros
SortIncludes: Never
UseTab: ForContinuationAndIndentation
WhitespaceSensitiveMacros:
- COND_CODE_0
- COND_CODE_1
- IF_DISABLED
- IF_ENABLED
- LISTIFY
- STRINGIFY
- Z_STRINGIFY

View File

@@ -1,21 +0,0 @@
# SPDX-License-Identifier: Apache-2.0
#
# Copyright (c) 2024, Basalte bv
analyzer:
# Start by disabling all
- --disable-all
# Enable the sensitive profile
- --enable=sensitive
# Disable unused cases
- --disable=boost
- --disable=mpi
# Many identifiers in zephyr start with _
- --disable=clang-diagnostic-reserved-identifier
- --disable=clang-diagnostic-reserved-macro-identifier
# Cleanup
- --clean

View File

@@ -2,20 +2,12 @@ name: Backport Issue Check
on:
pull_request_target:
types:
- edited
- opened
- reopened
- synchronize
branches:
- v*-branch
jobs:
backport:
name: Backport Issue Check
concurrency:
group: backport-issue-check-${{ github.ref }}
cancel-in-progress: true
runs-on: ubuntu-22.04
if: github.repository == 'zephyrproject-rtos/zephyr'

View File

@@ -13,7 +13,7 @@ jobs:
steps:
- name: Download artifacts
uses: dawidd6/action-download-artifact@v6
uses: dawidd6/action-download-artifact@v3
with:
run_id: ${{ github.event.workflow_run.id }}

View File

@@ -8,8 +8,6 @@ on:
- "west.yml"
- "subsys/bluetooth/**"
- "tests/bsim/**"
- "boards/nordic/nrf5*/*dt*"
- "dts/*/nordic/**"
- "tests/bluetooth/common/testlib/**"
- "samples/bluetooth/**"
- "boards/posix/**"
@@ -18,7 +16,6 @@ on:
- "include/zephyr/arch/posix/**"
- "scripts/native_simulator/**"
- "samples/net/sockets/echo_*/**"
- "modules/mbedtls/**"
- "modules/openthread/**"
- "subsys/net/l2/openthread/**"
- "include/zephyr/net/openthread.h"
@@ -37,7 +34,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.27.4.20241026
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
options: '--entrypoint /bin/bash'
env:
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
@@ -78,7 +75,6 @@ jobs:
git config --global user.name "Zephyr Bot"
rm -fr ".git/rebase-apply"
git rebase origin/${BASE_REF}
git clean -f -d
git log --pretty=oneline | head -n 10
west init -l . || true
west config manifest.group-filter -- +ci
@@ -89,7 +85,7 @@ jobs:
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Check common triggering files
uses: tj-actions/changed-files@v45
uses: tj-actions/changed-files@v44
id: check-common-files
with:
files: |
@@ -102,12 +98,9 @@ jobs:
include/zephyr/arch/posix/
scripts/native_simulator/
tests/bsim/*
boards/nordic/nrf5*/*dt*
dts/*/nordic/
modules/mbedtls/**
- name: Check if Bluethooth files changed
uses: tj-actions/changed-files@v45
uses: tj-actions/changed-files@v44
id: check-bluetooth-files
with:
files: |
@@ -116,7 +109,7 @@ jobs:
subsys/bluetooth/
- name: Check if Networking files changed
uses: tj-actions/changed-files@v45
uses: tj-actions/changed-files@v44
id: check-networking-files
with:
files: |
@@ -129,7 +122,7 @@ jobs:
include/zephyr/net/ieee802154*
- name: Check if UART files changed
uses: tj-actions/changed-files@v45
uses: tj-actions/changed-files@v44
id: check-uart-files
with:
files: |
@@ -139,10 +132,10 @@ jobs:
- name: Update BabbleSim to manifest revision
if: >
steps.check-bluetooth-files.outputs.any_modified == 'true'
|| steps.check-networking-files.outputs.any_modified == 'true'
|| steps.check-uart-files.outputs.any_modified == 'true'
|| steps.check-common-files.outputs.any_modified == 'true'
steps.check-bluetooth-files.outputs.any_changed == 'true'
|| steps.check-networking-files.outputs.any_changed == 'true'
|| steps.check-uart-files.outputs.any_changed == 'true'
|| steps.check-common-files.outputs.any_changed == 'true'
run: |
export BSIM_VERSION=$( west list bsim -f {revision} )
echo "Manifest points to bsim sha $BSIM_VERSION"
@@ -153,17 +146,17 @@ jobs:
make everything -s -j 8
- name: Run Bluetooth Tests with BSIM
if: steps.check-bluetooth-files.outputs.any_modified == 'true' || steps.check-common-files.outputs.any_modified == 'true'
if: steps.check-bluetooth-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
tests/bsim/ci.bt.sh
- name: Run Networking Tests with BSIM
if: steps.check-networking-files.outputs.any_modified == 'true' || steps.check-common-files.outputs.any_modified == 'true'
if: steps.check-networking-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
tests/bsim/ci.net.sh
- name: Run UART Tests with BSIM
if: steps.check-uart-files.outputs.any_modified == 'true' || steps.check-common-files.outputs.any_modified == 'true'
if: steps.check-uart-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
tests/bsim/ci.uart.sh

View File

@@ -12,7 +12,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.27.4.20241026
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
@@ -62,7 +62,6 @@ jobs:
git config --global user.name "Zephyr Bot"
rm -fr ".git/rebase-apply"
git rebase origin/${BASE_REF}
git clean -f -d
git log --pretty=oneline | head -n 10
west init -l . || true
west config --global update.narrow true

View File

@@ -14,7 +14,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.27.4.20241026
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
@@ -34,7 +34,7 @@ jobs:
CCACHE_REMOTE_STORAGE: "redis://cache-*.keydb-cache.svc.cluster.local|shards=1,2,3"
CCACHE_REMOTE_ONLY: "true"
# `--specs` is ignored because ccache is unable to resovle the toolchain specs file path.
CCACHE_IGNOREOPTIONS: '-specs=* --specs=*'
CCACHE_IGNOREOPTIONS: '--specs=*'
steps:
- name: Apply container owner mismatch workaround
run: |

View File

@@ -41,7 +41,6 @@ jobs:
git config --global user.name "Github Actions"
git remote -v
git rebase origin/${BASE_REF}
git clean -f -d
source zephyr-env.sh
# debug
ls -la

View File

@@ -38,7 +38,7 @@ jobs:
run: |
pip3 install setuptools
pip3 install wheel
pip3 install python-magic lxml junitparser gitlint pylint pykwalify yamllint clang-format unidiff sphinx-lint
pip3 install python-magic lxml junitparser gitlint pylint pykwalify yamllint clang-format unidiff
pip3 install west
- name: west setup
@@ -52,7 +52,6 @@ jobs:
[[ "$(git rev-list --merges --count origin/${BASE_REF}..)" == "0" ]] || \
(echo "::error ::Merge commits not allowed, rebase instead";false)
git rebase origin/${BASE_REF}
git clean -f -d
# debug
git log --pretty=oneline | head -n 10
west init -l . || true

View File

@@ -26,8 +26,13 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12', '3.13']
python-version: ['3.10', '3.11', '3.12']
os: [ubuntu-22.04, macos-14, windows-2022]
exclude:
- os: macos-14
python-version: 3.6
- os: windows-2022
python-version: 3.6
steps:
- name: checkout
uses: actions/checkout@v4

View File

@@ -29,7 +29,7 @@ jobs:
if: >
github.repository_owner == 'zephyrproject-rtos'
outputs:
file_check: ${{ steps.check-doc-files.outputs.any_modified }}
file_check: ${{ steps.check-doc-files.outputs.any_changed }}
steps:
- name: checkout
uses: actions/checkout@v4
@@ -37,12 +37,11 @@ jobs:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Check if Documentation related files changed
uses: tj-actions/changed-files@v45
uses: tj-actions/changed-files@v44
id: check-doc-files
with:
files: |
doc/
boards/**/doc/
**.rst
include/
kernel/include/kernel_arch_interface.h
@@ -63,13 +62,20 @@ jobs:
if: >
github.repository_owner == 'zephyrproject-rtos' &&
( needs.doc-file-check.outputs.file_check == 'true' || github.event_name != 'pull_request' )
runs-on: ubuntu-22.04
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
timeout-minutes: 90
concurrency:
group: doc-build-html-${{ github.ref }}
cancel-in-progress: true
steps:
- name: Print cloud service information
run: |
echo "ZEPHYR_RUNNER_CLOUD_PROVIDER = ${ZEPHYR_RUNNER_CLOUD_PROVIDER}"
echo "ZEPHYR_RUNNER_CLOUD_NODE = ${ZEPHYR_RUNNER_CLOUD_NODE}"
echo "ZEPHYR_RUNNER_CLOUD_POD = ${ZEPHYR_RUNNER_CLOUD_POD}"
- name: install-pkgs
run: |
sudo apt-get update
@@ -95,7 +101,6 @@ jobs:
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git rebase origin/${BASE_REF}
git clean -f -d
git log --graph --oneline HEAD...${PR_HEAD}
- name: cache-pip
@@ -187,7 +192,8 @@ jobs:
if: |
github.event_name != 'pull_request' &&
github.repository_owner == 'zephyrproject-rtos'
runs-on: ubuntu-22.04
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container: texlive/texlive:latest
timeout-minutes: 120
concurrency:
@@ -199,6 +205,12 @@ jobs:
run: |
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: Print cloud service information
run: |
echo "ZEPHYR_RUNNER_CLOUD_PROVIDER = ${ZEPHYR_RUNNER_CLOUD_PROVIDER}"
echo "ZEPHYR_RUNNER_CLOUD_NODE = ${ZEPHYR_RUNNER_CLOUD_NODE}"
echo "ZEPHYR_RUNNER_CLOUD_POD = ${ZEPHYR_RUNNER_CLOUD_POD}"
- name: checkout
uses: actions/checkout@v4

View File

@@ -21,24 +21,16 @@ jobs:
steps:
- name: Download artifacts
id: download-artifacts
uses: dawidd6/action-download-artifact@v6
uses: dawidd6/action-download-artifact@v3
with:
workflow: doc-build.yml
run_id: ${{ github.event.workflow_run.id }}
if_no_artifact_found: ignore
- name: Load PR number
if: steps.download-artifacts.outputs.found_artifact == 'true'
uses: actions/github-script@v7
with:
script: |
let fs = require("fs");
let pr_number = Number(fs.readFileSync("./pr_num/pr_num"));
core.exportVariable("PR_NUM", pr_number);
run: |
echo "PR_NUM=$(<pr_num/pr_num)" >> $GITHUB_ENV
- name: Check PR number
if: steps.download-artifacts.outputs.found_artifact == 'true'
id: check-pr
uses: carpentries/actions/check-valid-pr@v0.14.0
with:
@@ -46,15 +38,12 @@ jobs:
sha: ${{ github.event.workflow_run.head_sha }}
- name: Validate PR number
if: |
steps.download-artifacts.outputs.found_artifact == 'true' &&
steps.check-pr.outputs.VALID != 'true'
if: steps.check-pr.outputs.VALID != 'true'
run: |
echo "ABORT: PR number validation failed!"
exit 1
- name: Uncompress HTML docs
if: steps.download-artifacts.outputs.found_artifact == 'true'
run: |
tar xf html-output/html-output.tar.xz -C html-output
if [ -f api-coverage/api-coverage.tar.xz ]; then
@@ -62,7 +51,6 @@ jobs:
fi
- name: Configure AWS Credentials
if: steps.download-artifacts.outputs.found_artifact == 'true'
uses: aws-actions/configure-aws-credentials@v4
with:
aws-access-key-id: ${{ vars.AWS_BUILDS_ZEPHYR_PR_ACCESS_KEY_ID }}
@@ -70,7 +58,6 @@ jobs:
aws-region: us-east-1
- name: Upload to AWS S3
if: steps.download-artifacts.outputs.found_artifact == 'true'
env:
HEAD_BRANCH: ${{ github.event.workflow_run.head_branch }}
run: |

View File

@@ -24,7 +24,7 @@ jobs:
steps:
- name: Download artifacts
uses: dawidd6/action-download-artifact@v6
uses: dawidd6/action-download-artifact@v3
with:
workflow: doc-build.yml
run_id: ${{ github.event.workflow_run.id }}

View File

@@ -10,7 +10,7 @@ jobs:
check-errno:
runs-on: ubuntu-22.04
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.27.4
image: ghcr.io/zephyrproject-rtos/ci:v0.26.13
steps:
- name: Apply container owner mismatch workaround

View File

@@ -26,11 +26,8 @@ jobs:
group: zephyr-runner-v2-linux-x64-4xlarge
if: github.repository_owner == 'zephyrproject-rtos'
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.27.4.20241026
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
options: '--entrypoint /bin/bash'
defaults:
run:
shell: bash
strategy:
fail-fast: false
env:
@@ -96,33 +93,3 @@ jobs:
. .venv/bin/activate
pip3 install awscli
aws s3 sync --quiet footprint_data/ s3://testing.zephyrproject.org/footprint_data/
- name: Transform Footprint data to Twister JSON reports
run: |
shopt -s globstar
export ZEPHYR_BASE=${PWD}
python3 ./scripts/footprint/pack_as_twister.py -vvv \
--plan ./scripts/footprint/plan.txt \
--test-name='name.feature' \
./footprint_data/**/
- name: Upload to ElasticSearch
env:
ELASTICSEARCH_KEY: ${{ secrets.ELASTICSEARCH_KEY }}
ELASTICSEARCH_SERVER: "https://elasticsearch.zephyrproject.io:443"
ELASTICSEARCH_INDEX: ${{ vars.FOOTPRINT_TRACKING_INDEX }}
run: |
shopt -s globstar
pip3 install -U elasticsearch
run_date=`date --iso-8601=minutes`
python3 ./scripts/ci/upload_test_results_es.py -r ${run_date} \
--flatten footprint \
--flatten-list-names "{'children':'name'}" \
--transform "{ 'footprint_name': '^(?P<footprint_area>([^\/]+\/){0,2})(?P<footprint_path>([^\/]*\/)*)(?P<footprint_symbol>[^\/]*)$' }" \
--run-id "${{ github.run_id }}" \
--run-attempt "${{ github.run_attempt }}" \
--run-workflow "footprint-tracking:${{ github.event_name }}" \
--run-branch "${{ github.ref_name }}" \
-i ${ELASTICSEARCH_INDEX} \
./footprint_data/**/twister_footprint.json
#

View File

@@ -46,7 +46,6 @@ jobs:
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git rebase origin/${BASE_REF}
git clean -f -d
git log --graph --oneline HEAD...${PR_HEAD}
- name: Set up Python
@@ -69,7 +68,7 @@ jobs:
elif [ "${{ runner.os }}" = "Windows" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O/tmp/twister-out"
fi
./scripts/twister --force-color --inline-logs -T samples/hello_world -T samples/cpp/hello_world -v $EXTRA_TWISTER_FLAGS
./scripts/twister --force-color --inline-logs -T samples/hello_world -v $EXTRA_TWISTER_FLAGS
- name: Upload artifacts
if: failure()
@@ -78,4 +77,3 @@ jobs:
if-no-files-found: ignore
path:
zephyr/twister-out/*/samples/hello_world/sample.basic.helloworld/build.log
zephyr/twister-out/*/samples/cpp/hello_world/sample.cpp.helloworld/build.log

View File

@@ -25,7 +25,7 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12', '3.13']
python-version: ['3.10', '3.11', '3.12']
os: [ubuntu-22.04]
steps:
- name: checkout

View File

@@ -21,7 +21,7 @@ jobs:
echo "TRIMMED_VERSION=${GITHUB_REF#refs/tags/v}" >> $GITHUB_OUTPUT
- name: REUSE Compliance Check
uses: fsfe/reuse-action@v4
uses: fsfe/reuse-action@v1
with:
args: spdx -o zephyr-${{ steps.get_version.outputs.VERSION }}.spdx

View File

@@ -25,7 +25,7 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12', '3.13']
python-version: ['3.10', '3.11', '3.12']
os: [ubuntu-20.04]
steps:
- name: checkout
@@ -43,7 +43,6 @@ jobs:
git config --global user.email "actions@zephyrproject.org"
git config --global user.name "Github Actions"
git rebase origin/${BASE_REF}
git clean -f -d
git log --graph --oneline HEAD...${PR_HEAD}
- name: Set up Python ${{ matrix.python-version }}

View File

@@ -9,7 +9,7 @@ jobs:
runs-on: ubuntu-22.04
if: github.repository == 'zephyrproject-rtos/zephyr'
steps:
- uses: actions/stale@v9
- uses: actions/stale@v8
with:
stale-pr-message: 'This pull request has been marked as stale because it has been open (more
than) 60 days with no activity. Remove the stale label or add a comment saying that you

View File

@@ -25,7 +25,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.27.4.20241026
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.14.20240823
options: '--entrypoint /bin/bash'
outputs:
subset: ${{ steps.output-services.outputs.subset }}
@@ -77,7 +77,6 @@ jobs:
git config --global user.name "Zephyr Bot"
rm -fr ".git/rebase-apply"
git rebase origin/${BASE_REF}
git clean -f -d
git log --pretty=oneline | head -n 10
west init -l . || true
west config manifest.group-filter -- +ci,+optional
@@ -130,7 +129,7 @@ jobs:
needs: twister-build-prep
if: needs.twister-build-prep.outputs.size != 0
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.27.4.20241026
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.14.20240823
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
@@ -142,13 +141,13 @@ jobs:
CCACHE_REMOTE_STORAGE: "redis://cache-*.keydb-cache.svc.cluster.local|shards=1,2,3"
CCACHE_REMOTE_ONLY: "true"
# `--specs` is ignored because ccache is unable to resolve the toolchain specs file path.
CCACHE_IGNOREOPTIONS: '-specs=* --specs=*'
CCACHE_IGNOREOPTIONS: '--specs=*'
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
TWISTER_COMMON: ' --force-color --inline-logs -v -N -M --retry-failed 3 --timeout-multiplier 2 '
DAILY_OPTIONS: ' -M --build-only --all --show-footprint'
PR_OPTIONS: ' --clobber-output --integration'
PUSH_OPTIONS: ' --clobber-output -M --show-footprint --report-filtered'
PUSH_OPTIONS: ' --clobber-output -M --show-footprint'
COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
BASE_REF: ${{ github.base_ref }}
steps:
@@ -186,7 +185,6 @@ jobs:
git config --global user.name "Zephyr Builder"
rm -fr ".git/rebase-apply"
git rebase origin/${BASE_REF}
git clean -f -d
git log --pretty=oneline | head -n 10
fi
echo "$HOME/.local/bin" >> $GITHUB_PATH
@@ -315,7 +313,7 @@ jobs:
if: success() || failure()
steps:
# Needed for elasticearch and upload script
# Needed for opensearch and upload script
- if: github.event_name == 'push' || github.event_name == 'schedule'
name: Checkout
uses: actions/checkout@v4
@@ -329,7 +327,7 @@ jobs:
path: artifacts
- if: github.event_name == 'push' || github.event_name == 'schedule'
name: Upload to elasticsearch
name: Upload to opensearch
run: |
pip3 install elasticsearch
# set run date on upload to get consistent and unified data across the matrix.

View File

@@ -32,7 +32,7 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12', '3.13']
python-version: ['3.10', '3.11', '3.12']
os: [ubuntu-22.04]
steps:
- name: checkout

View File

@@ -21,10 +21,10 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12', '3.13']
python-version: ['3.10', '3.11', '3.12']
os: [ubuntu-22.04]
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.27.4
image: ghcr.io/zephyrproject-rtos/ci:v0.26.13
steps:
- name: Apply Container Owner Mismatch Workaround

View File

@@ -29,8 +29,13 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12', '3.13']
python-version: ['3.10', '3.11', '3.12']
os: [ubuntu-22.04, macos-14, windows-2022]
exclude:
- os: macos-14
python-version: 3.6
- os: windows-2022
python-version: 3.6
steps:
- name: checkout
uses: actions/checkout@v4
@@ -66,7 +71,7 @@ jobs:
- name: install pytest
run: |
pip3 install wheel
pip3 install pytest west pyelftools canopen natsort progress mypy intelhex psutil ply pyserial anytree
pip3 install pytest west pyelftools canopen natsort progress mypy intelhex psutil ply pyserial
- name: run pytest-win
if: runner.os == 'Windows'
run: |

5
.gitignore vendored
View File

@@ -63,7 +63,8 @@ new.info
# We don't want to record these.
Cargo.lock
# Cargo encourages a .cargo/config.toml file to symlink to a generated file. Don't save these.
# Cargo encourages a .cargo/config.toml file to symlink to a generated
# file. Don't save these.
.cargo/
# Normal west builds will place the Rust target directory under the build directory. However,
@@ -102,6 +103,4 @@ MaintainersFormat.txt
ModulesMaintainers.txt
Nits.txt
Pylint.txt
SphinxLint.txt
TextEncoding.txt
YAMLLint.txt

View File

@@ -152,7 +152,6 @@ zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:$<TARGET_PROPERTY:compiler-cpp,
# Extra warnings options for twister run
if (CONFIG_COMPILER_WARNINGS_AS_ERRORS)
zephyr_compile_options($<$<COMPILE_LANGUAGE:C>:$<TARGET_PROPERTY:compiler,warnings_as_errors>>)
zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:$<TARGET_PROPERTY:compiler,warnings_as_errors>>)
zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:$<TARGET_PROPERTY:asm,warnings_as_errors>>)
zephyr_link_libraries($<TARGET_PROPERTY:linker,warnings_as_errors>)
endif()
@@ -361,21 +360,8 @@ zephyr_compile_options(
$<$<COMPILE_LANGUAGE:ASM>:-D_ASMLANGUAGE>
)
find_package(Deprecated COMPONENTS toolchain_ld_base)
if(DEFINED TOOLCHAIN_LD_FLAGS)
zephyr_ld_options(${TOOLCHAIN_LD_FLAGS})
endif()
zephyr_link_libraries(PROPERTY base)
zephyr_link_libraries_ifndef(CONFIG_LINKER_USE_RELAX PROPERTY no_relax)
zephyr_link_libraries_ifdef(CONFIG_LINKER_USE_RELAX PROPERTY relax)
# Sort the common symbols and each input section by alignment
# in descending order to minimize padding between these symbols.
zephyr_link_libraries_ifdef(CONFIG_LINKER_SORT_BY_ALIGNMENT PROPERTY sort_alignment)
# @Intent: Set fundamental linker specific flags
toolchain_ld_base()
toolchain_ld_force_undefined_symbols(
_OffsetAbsSyms
@@ -383,37 +369,13 @@ toolchain_ld_force_undefined_symbols(
)
if(NOT CONFIG_NATIVE_BUILD)
find_package(Deprecated COMPONENTS toolchain_ld_baremetal)
zephyr_link_libraries(PROPERTY baremetal)
# Note that some architectures will skip this flag if set to error, even
# though the compiler flag check passes (e.g. ARC and Xtensa). So warning
# should be the default for now.
#
# Skip this for native application as Zephyr only provides
# additions to the host toolchain linker script. The relocation
# sections (.rel*) requires us to override those provided
# by host toolchain. As we can't account for all possible
# combination of compiler and linker on all machines used
# for development, it is better to turn this off.
#
# CONFIG_LINKER_ORPHAN_SECTION_PLACE is to place the orphan sections
# without any warnings or errors, which is the default behavior.
# So there is no need to explicitly set a linker flag.
if(CONFIG_LINKER_ORPHAN_SECTION_WARN)
zephyr_link_libraries(PROPERTY orphan_warning)
elseif(CONFIG_LINKER_ORPHAN_SECTION_ERROR)
zephyr_link_libraries(PROPERTY orphan_error)
endif()
# @Intent: Set linker specific flags for bare metal target
toolchain_ld_baremetal()
endif()
if(CONFIG_CPP)
if(NOT CONFIG_MINIMAL_LIBCPP AND NOT CONFIG_NATIVE_LIBRARY)
find_package(Deprecated COMPONENTS toolchain_ld_cpp)
endif()
zephyr_link_libraries(PROPERTY cpp_base)
if(CONFIG_CPP AND NOT CONFIG_MINIMAL_LIBCPP AND NOT CONFIG_NATIVE_LIBRARY)
# @Intent: Set linker specific flags for C++
toolchain_ld_cpp()
endif()
# @Intent: Add the basic toolchain warning flags
@@ -598,8 +560,6 @@ add_custom_command(
COMMAND_EXPAND_LISTS
)
add_custom_target(version_h DEPENDS ${PROJECT_BINARY_DIR}/include/generated/zephyr/version.h)
zephyr_get(KERNEL_VERSION_CUSTOMIZATION SYSBUILD LOCAL)
set_property(TARGET version_h PROPERTY KERNEL_VERSION_CUSTOMIZATION ${KERNEL_VERSION_CUSTOMIZATION})
if(EXISTS ${APPLICATION_SOURCE_DIR}/VERSION)
add_custom_command(
@@ -618,8 +578,6 @@ if(EXISTS ${APPLICATION_SOURCE_DIR}/VERSION)
app_version_h
DEPENDS ${PROJECT_BINARY_DIR}/include/generated/zephyr/app_version.h)
add_dependencies(zephyr_interface app_version_h)
zephyr_get(APP_VERSION_CUSTOMIZATION SYSBUILD LOCAL)
set_property(TARGET app_version_h PROPERTY APP_VERSION_CUSTOMIZATION ${APP_VERSION_CUSTOMIZATION})
endif()
# Unfortunately, the order in which CMakeLists.txt code is processed
@@ -2237,12 +2195,3 @@ add_subdirectory_ifdef(
CONFIG_MAKEFILE_EXPORTS
cmake/makefile_exports
)
toolchain_linker_finalize()
yaml_context(EXISTS NAME build_info result)
if(result)
build_info(zephyr version VALUE ${PROJECT_VERSION_STR})
build_info(zephyr zephyr-base VALUE ${ZEPHYR_BASE})
yaml_save(NAME build_info)
endif()

View File

@@ -210,8 +210,6 @@
/drivers/ethernet/*adin2111* @GeorgeCGV
/drivers/ethernet/*oa_tc6* @lmajewski
/drivers/ethernet/*lan865x* @lmajewski
/drivers/ethernet/dwc_xgmac @Smale-12048867
/drivers/ethernet/dwc_xgmac/dwc_xgmac @Smale-12048867
/drivers/ethernet/phy/ @rlubos @tbursztyka @arvinf @jukkar
/drivers/ethernet/phy/*adin2111* @GeorgeCGV
/drivers/mdio/*adin2111* @GeorgeCGV

View File

@@ -17,13 +17,13 @@ osource "${APPLICATION_SOURCE_DIR}/VERSION"
# Shield defaults should have precedence over board defaults, which should have
# precedence over SoC defaults, so include them in that order.
#
# $ARCH and $KCONFIG_BOARD_DIR will be glob patterns when building documentation.
# $ARCH and $BOARD_DIR will be glob patterns when building documentation.
# This loads custom shields defconfigs (from BOARD_ROOT)
osource "$(KCONFIG_BINARY_DIR)/Kconfig.shield.defconfig"
# This loads Zephyr base shield defconfigs
source "boards/shields/*/Kconfig.defconfig"
osource "$(KCONFIG_BOARD_DIR)/Kconfig.defconfig"
osource "$(BOARD_DIR)/Kconfig.defconfig"
# This loads Zephyr specific SoC root defconfigs
source "$(KCONFIG_BINARY_DIR)/soc/Kconfig.defconfig"
@@ -260,20 +260,6 @@ config LINKER_USE_PINNED_SECTION
Requires that pinned sections exist in the architecture, SoC,
board or custom linker script.
config LINKER_USE_ONDEMAND_SECTION
bool "Use Evictable Linker Section"
depends on DEMAND_MAPPING
depends on !LINKER_USE_PINNED_SECTION
depends on !ARCH_MAPS_ALL_RAM
help
If enabled, the symbols which may be evicted from memory
will be put into a linker section reserved for on-demand symbols.
During boot, the corresponding memory will be mapped as paged out.
This is conceptually the opposite of CONFIG_LINKER_USE_PINNED_SECTION.
Requires that on-demand sections exist in the architecture, SoC,
board or custom linker script.
config LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT
bool "Generic sections are present at boot" if DEMAND_PAGING && LINKER_USE_PINNED_SECTION
default y
@@ -289,7 +275,7 @@ config LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT
config LINKER_LAST_SECTION_ID
bool "Last section identifier"
default y if !ARM64
default y
depends on ARM || ARM64 || RISCV
help
If enabled, the last section will contain an identifier.
@@ -536,10 +522,11 @@ config NO_OPTIMIZATIONS
endchoice
config LTO
bool "Link Time Optimization"
bool "Link Time Optimization [EXPERIMENTAL]"
depends on !(GEN_ISR_TABLES || GEN_IRQ_VECTOR_TABLE) || ISR_TABLES_LOCAL_DECLARATION
depends on !NATIVE_LIBRARY
depends on !CODE_DATA_RELOCATION
select EXPERIMENTAL
help
This option enables Link Time Optimization.

View File

@@ -305,22 +305,22 @@ Bluetooth HCI:
status: maintained
maintainers:
- jhedberg
- alwa-nordic
- jori-nordic
collaborators:
- hermabe
- alwa-nordic
- Thalley
- sjanc
- theob-pro
- HoZHel
files:
- include/zephyr/drivers/bluetooth/
- include/zephyr/drivers/bluetooth.h
- drivers/bluetooth/
- samples/bluetooth/hci_*/
- tests/bsim/bluetooth/hci_uart/
- dts/bindings/bluetooth/
labels:
- "area: Bluetooth HCI"
- "area: Bluetooth Host"
- "area: Bluetooth"
tests:
- bluetooth
@@ -345,8 +345,13 @@ Bluetooth controller:
- subsys/bluetooth/common/
- subsys/bluetooth/controller/
- subsys/bluetooth/crypto/
- subsys/bluetooth/shell/ll.c
- subsys/bluetooth/shell/ll.h
- subsys/bluetooth/shell/ticker.c
- tests/bluetooth/controller/
- tests/bsim/bluetooth/ll/
- tests/bluetooth/ctrl*/
- tests/bluetooth/ll_settings/
labels:
- "area: Bluetooth Controller"
- "area: Bluetooth"
@@ -356,13 +361,13 @@ Bluetooth controller:
Bluetooth Host:
status: maintained
maintainers:
- jori-nordic
- jhedberg
- alwa-nordic
collaborators:
- hermabe
- rugeGerritsen
- sjanc
- alwa-nordic
- Thalley
- sjanc
- theob-pro
files:
- doc/connectivity/bluetooth/
@@ -373,6 +378,7 @@ Bluetooth Host:
- subsys/bluetooth/host/
- subsys/bluetooth/lib/
- subsys/bluetooth/services/
- subsys/bluetooth/shell/
- subsys/bluetooth/CMakeLists.txt
- subsys/bluetooth/Kconfig*
- tests/bluetooth/
@@ -385,6 +391,7 @@ Bluetooth Host:
- include/zephyr/bluetooth/iso.h
- include/zephyr/bluetooth/controller.h
- include/zephyr/bluetooth/mesh.h
- include/zephyr/bluetooth/testing.h
- doc/connectivity/bluetooth/bluetooth-ctlr-arch.rst
- doc/connectivity/bluetooth/autopts/
- doc/connectivity/bluetooth/img/ctlr*
@@ -398,18 +405,21 @@ Bluetooth Host:
- samples/bluetooth/hci_*/
- samples/bluetooth/pbp*/
- samples/bluetooth/tmap*/
- samples/bluetooth/*_iso/
- samples/bluetooth/iso_*/
- samples/bluetooth/mesh*/
- subsys/bluetooth/shell/bredr.c
- subsys/bluetooth/shell/iso.c
- subsys/bluetooth/shell/ll.c
- subsys/bluetooth/shell/ll.h
- subsys/bluetooth/shell/ticker.c
- subsys/bluetooth/Kconfig.iso
- subsys/bluetooth/host/iso.c
- subsys/bluetooth/host/iso_internal.h
- subsys/bluetooth/host/shell/iso.c
- tests/bluetooth/audio/
- tests/bluetooth/controller/
- tests/bluetooth/ctrl*/
- tests/bluetooth/ll_settings/
- tests/bluetooth/mesh*/
- tests/bluetooth/qualification/
- tests/bluetooth/shell/audio.conf
- tests/bluetooth/shell/mesh.conf
- tests/bluetooth/tester/
- tests/bsim/bluetooth/audio/
- tests/bsim/bluetooth/audio_samples/
@@ -437,10 +447,10 @@ Bluetooth Mesh:
- doc/connectivity/bluetooth/api/mesh/
- include/zephyr/bluetooth/mesh/
- include/zephyr/bluetooth/mesh.h
- include/zephyr/bluetooth/testing.h
- samples/bluetooth/mesh*/
- subsys/bluetooth/mesh/
- tests/bluetooth/mesh*/
- tests/bluetooth/shell/mesh.conf
- tests/bsim/bluetooth/mesh/
labels:
- "area: Bluetooth Mesh"
@@ -464,7 +474,6 @@ Bluetooth Audio:
- pin-zephyr
- niym-ot
- jthm-ot
- babrsn
files:
- subsys/bluetooth/audio/
- include/zephyr/bluetooth/audio/
@@ -492,9 +501,11 @@ Bluetooth Classic:
- lylezhu2012
collaborators:
- jhedberg
- sjanc
files:
- subsys/bluetooth/common/
- subsys/bluetooth/host/classic/
- subsys/bluetooth/shell/bredr.c
- include/zephyr/bluetooth/classic/
labels:
- "area: Bluetooth Classic"
@@ -508,16 +519,13 @@ Bluetooth ISO:
- Thalley
collaborators:
- jhedberg
- kruithofa
- rugeGerritsen
files:
- include/zephyr/bluetooth/iso.h
- doc/connectivity/bluetooth/api/shell/iso.rst
- samples/bluetooth/*_iso/
- samples/bluetooth/iso_*/
- subsys/bluetooth/shell/iso.c
- subsys/bluetooth/Kconfig.iso
- subsys/bluetooth/host/iso.c
- subsys/bluetooth/host/iso_internal.h
- subsys/bluetooth/host/shell/iso.c
labels:
- "area: Bluetooth ISO"
- "area: Bluetooth"
@@ -572,9 +580,6 @@ Build system:
- misc/generated/
- snippets/
- modules/Kconfig.sysbuild
- scripts/list_boards.py
- scripts/list_hardware.py
- scripts/schemas/*-schema.yml
labels:
- "area: Build System"
tests:
@@ -758,8 +763,8 @@ Coding Guidelines:
- "area: Coding Guidelines"
Common Architecture Interface:
status: maintained
maintainers:
status: odd fixes
collaborators:
- dcpleung
- nashif
files:
@@ -885,7 +890,6 @@ Devicetree:
- galak
files-regex:
- dts/bindings/.*zephyr.*
- dts/bindings/[^,]+$
files:
- scripts/dts/
- dts/common/
@@ -920,7 +924,6 @@ Disk:
- subsys/sd/
- tests/subsys/sd/
- tests/drivers/disk/
- tests/drivers/build_all/disk/
- include/zephyr/sd/
- dts/bindings/sd/
- dts/bindings/mmc/
@@ -991,10 +994,10 @@ Documentation Infrastructure:
status: maintained
maintainers:
- gmarull
- kartben
collaborators:
- carlescufi
- nashif
- kartben
files:
- doc/_*/
- doc/CMakeLists.txt
@@ -1021,6 +1024,8 @@ Release Notes:
status: maintained
maintainers:
- anangl
collaborators:
- decsny
files:
- drivers/adc/
- include/zephyr/drivers/adc.h
@@ -1041,6 +1046,7 @@ Release Notes:
collaborators:
- lyakh
- lgirdwood
- marc-hb
- kv2019i
files:
- drivers/audio/
@@ -1055,7 +1061,6 @@ Release Notes:
- yperess
files:
- tests/drivers/bbram/
- tests/drivers/build_all/bbram/
- drivers/bbram/
- include/zephyr/drivers/bbram.h
- doc/hardware/peripherals/bbram.rst
@@ -1157,23 +1162,6 @@ Release Notes:
tests:
- drivers.clock
"Drivers: Comparator":
status: maintained
maintainers:
- bjarki-andreasen
files:
- drivers/comparator/
- dts/bindings/comparator/
- include/zephyr/drivers/comparator.h
- include/zephyr/drivers/comparator/
- tests/drivers/build_all/comparator/
- tests/drivers/comparator/
- doc/hardware/peripherals/comparator.rst
labels:
- "area: Comparator"
tests:
- drivers.comparator
"Drivers: Console":
status: odd fixes
files:
@@ -1228,7 +1216,6 @@ Release Notes:
- samples/drivers/crypto/
- tests/crypto/
- doc/services/crypto/
- tests/drivers/build_all/crypto/
labels:
- "area: Crypto / RNG"
tests:
@@ -1387,8 +1374,6 @@ Release Notes:
- dts/bindings/ethernet/
- tests/drivers/ethernet/
- include/zephyr/drivers/ethernet/
- include/zephyr/net/phy.h
- include/zephyr/net/ethernet.h
labels:
- "area: Ethernet"
tests:
@@ -1398,8 +1383,6 @@ Release Notes:
status: maintained
maintainers:
- de-nordic
collaborators:
- rghaddab
files:
- drivers/flash/
- dts/bindings/flash_controller/
@@ -1411,7 +1394,6 @@ Release Notes:
- doc/hardware/peripherals/flash.rst
- include/zephyr/drivers/flash/
- tests/drivers/flash_simulator/
- tests/drivers/build_all/flash/
labels:
- "area: Flash"
tests:
@@ -1587,7 +1569,9 @@ Release Notes:
- drivers.i3c
"Drivers: IEEE 802.15.4":
status: odd fixes
status: maintained
maintainers:
- fgrandel
collaborators:
- rlubos
- ankuns
@@ -1640,7 +1624,6 @@ Release Notes:
- doc/hardware/peripherals/mdio.rst
- drivers/mdio/
- include/zephyr/drivers/mdio.h
- include/zephyr/net/mdio.h
- tests/drivers/build_all/mdio/
- dts/bindings/mdio/
labels:
@@ -1757,7 +1740,7 @@ Release Notes:
- drivers/led/
- include/zephyr/drivers/led/
- include/zephyr/drivers/led.h
- samples/drivers/led/
- samples/drivers/led_*/
- tests/drivers/led/
- doc/hardware/peripherals/led.rst
- tests/drivers/build_all/led/
@@ -2073,21 +2056,6 @@ Release Notes:
tests:
- drivers.spi
"Drivers: Stepper":
status: maintained
maintainers:
- jilaypandya
files:
- drivers/stepper/
- include/zephyr/drivers/stepper.h
- dts/bindings/stepper/
- doc/hardware/peripherals/stepper.rst
- tests/drivers/build_all/stepper/
labels:
- "area: Stepper"
tests:
- drivers.stepper
"Drivers: System timer":
status: maintained
maintainers:
@@ -2106,8 +2074,6 @@ Release Notes:
status: odd fixes
collaborators:
- loicpoulain
- josuah
- ngphibang
files:
- drivers/video/
- include/zephyr/drivers/video.h
@@ -2115,7 +2081,6 @@ Release Notes:
- doc/hardware/peripherals/video.rst
- tests/drivers/*/video/
- dts/bindings/video/
- samples/drivers/video/
labels:
- "area: Video"
tests:
@@ -2134,7 +2099,6 @@ Release Notes:
- include/zephyr/drivers/w1.h
- include/zephyr/drivers/sensor/w1_sensor.h
- tests/drivers/w1/
- tests/drivers/build_all/w1/
- samples/drivers/w1/
labels:
- "area: W1"
@@ -2190,8 +2154,6 @@ Release Notes:
maintainers:
- krish2718
- jukkar
collaborators:
- sachinthegreen
files:
- drivers/wifi/nrfwifi/
- dts/bindings/wifi/nordic,nrf70.yaml
@@ -2301,6 +2263,18 @@ Filesystems:
tests:
- filesystem
"Filesystems: FatFs reentrant support":
status: maintained
maintainers:
- ox11
files:
- modules/fatfs/zfs_ffsystem.c
- tests/subsys/fs/fat_fs_api/src/test_fat_file_reentrant.c
labels:
- "area: File System"
tests:
- filesystem.fat
Formatted Output:
status: maintained
maintainers:
@@ -2329,7 +2303,7 @@ Google Platforms:
- duda-patryk
files:
- boards/google/
- samples/boards/google/
- samples/boards/google_*/
Hash Utilities:
status: maintained
@@ -2376,8 +2350,6 @@ Input:
IPC:
status: maintained
maintainers:
- doki-nordic
collaborators:
- carlocaione
- arnopo
files:
@@ -2730,9 +2702,10 @@ hawkBit:
status: maintained
maintainers:
- maass-hamburg
collaborators:
- ycsin
files:
- subsys/mgmt/hawkbit/
- include/zephyr/mgmt/hawkbit/
- include/zephyr/mgmt/hawkbit.h
- samples/subsys/mgmt/hawkbit/
labels:
@@ -2816,6 +2789,7 @@ Networking:
- samples/net/lwm2m_client/
- samples/net/wifi/
- samples/net/dhcpv4_client/
- subsys/net/buf*.c
- subsys/net/l2/ethernet/gptp/
- subsys/net/l2/ieee802154/
- subsys/net/l2/wifi/
@@ -2848,7 +2822,7 @@ Networking:
tests:
- net.socket
"Networking Buffers":
"Networking: Buffers":
status: maintained
maintainers:
- jhedberg
@@ -2857,15 +2831,13 @@ Networking:
- tbursztyka
- jukkar
files:
- doc/services/net_buf/
- include/zephyr/net/buf.h
- include/zephyr/net_buf.h
- lib/net_buf/
- tests/lib/net_buf/
- subsys/net/buf*.c
- tests/net/buf/
labels:
- "area: Networking Buffers"
tests:
- libraries.net_buf
- net.buf
"Networking: Connection Manager":
status: maintained
@@ -2922,6 +2894,8 @@ Networking:
status: maintained
maintainers:
- jukkar
collaborators:
- fgrandel
files:
- doc/connectivity/networking/api/gptp.rst
- include/zephyr/net/gptp.h
@@ -2993,7 +2967,9 @@ Networking:
- sample.net.ptp
"Networking: Native IEEE 802.15.4":
status: odd fixes
status: maintained
maintainers:
- fgrandel
collaborators:
- rlubos
- jukkar
@@ -3098,18 +3074,6 @@ Open AMP:
tests:
- sample.ipc.openamp
PHYTEC Platforms:
status: maintained
maintainers:
- dnltz
collaborators:
- jonas-rem
- pefech
files:
- boards/phytec/
labels:
- "platform: PHYTEC"
POSIX API layer:
status: maintained
maintainers:
@@ -3133,7 +3097,6 @@ Power management:
status: maintained
maintainers:
- ceolin
- bjarki-andreasen
collaborators:
- nashif
- teburd
@@ -3209,6 +3172,17 @@ Retention:
labels:
- "area: Retention"
Rust:
status: maintained
maintainers:
- d3zd3z
files:
- cmake/modules/rust.cmake
- lib/rust/
- samples/rust/
labels:
- "area: Rust"
Samples:
status: maintained
maintainers:
@@ -3401,11 +3375,11 @@ Broadcom Platforms:
GD32 Platforms:
status: maintained
maintainers:
- cameled
- nandojve
collaborators:
- gmarull
- soburi
- cameled
files:
- boards/gd/
- drivers/*/*gd32*
@@ -3495,9 +3469,9 @@ Nuvoton NPCM Platforms:
Raspberry Pi Pico Platforms:
status: maintained
maintainers:
- soburi
collaborators:
- yonsch
collaborators:
- soburi
files:
- boards/raspberrypi/
- boards/adafruit/kb2040/
@@ -3523,46 +3497,10 @@ Silabs Platforms:
- boards/silabs/
- dts/arm/silabs/
- dts/bindings/*/silabs*
- drivers/*/*gecko*
- drivers/bluetooth/hci/hci_silabs_*
- drivers/*/*silabs*
- drivers/*/*_gecko*
labels:
- "platform: Silabs"
Silabs SiM3U Platforms:
status: maintained
maintainers:
- rettichschnidi
collaborators:
- M1cha
- asmellby
- jerome-pouiller
- jhedberg
files:
- boards/silabs/dev_kits/sim3u1xx_dk/
- drivers/*/*_si32*
- drivers/*/Kconfig.si32
- dts/arm/silabs/sim3u*
- dts/bindings/*/*silabs,si32*
- soc/silabs/silabs_sim3/
labels:
- "platform: Silabs SiM3U"
description: >-
SiM3U SoCs, dts files, and related drivers. Boards based on SiM3U SoCs.
Gardena Platforms:
status: maintained
maintainers:
- rettichschnidi
collaborators:
- M1cha
files:
- boards/gardena/
labels:
- "platform: Gardena"
description: >-
Gardena board(s).
Intel Platforms (X86):
status: maintained
maintainers:
@@ -3594,6 +3532,7 @@ Intel Platforms (Xtensa):
- andyross
- lyakh
- lgirdwood
- marc-hb
- kv2019i
- ceolin
- tmleman
@@ -3606,7 +3545,7 @@ Intel Platforms (Xtensa):
- soc/intel/intel_adsp/
- dts/xtensa/intel/
- tests/boards/intel_adsp/
- samples/boards/intel/adsp/
- samples/boards/intel_adsp/
- dts/bindings/*/intel,adsp*
- scripts/west_commands/runners/intel_adsp.py
labels:
@@ -3649,8 +3588,8 @@ NXP Drivers:
status: maintained
maintainers:
- dleach02
- mmahadevan108
collaborators:
- mmahadevan108
- danieldegrasse
- decsny
- manuargue
@@ -3686,8 +3625,8 @@ NXP Platforms (MCU):
status: maintained
maintainers:
- dleach02
- mmahadevan108
collaborators:
- mmahadevan108
- danieldegrasse
- DerekSnell
- yvanderv
@@ -3708,8 +3647,6 @@ NXP Platforms (MCU):
- soc/nxp/mcx/
- dts/arm/nxp/
- samples/boards/nxp*/
files-exclude:
- dts/arm/nxp/nxp_imx*
files-regex-exclude:
- .*s32.*
labels:
@@ -3734,7 +3671,7 @@ NXP Platforms (S32):
- drivers/misc/*nxp_s32*/
- dts/bindings/*/nxp,s32*
- dts/arm/nxp/*s32*
- samples/boards/nxp/s32/
- samples/boards/nxp_s32/
- include/zephyr/dt-bindings/*/nxp-s32*
- include/zephyr/dt-bindings/*/nxp_s32*
- include/zephyr/drivers/*/*nxp_s32*
@@ -3751,10 +3688,10 @@ NXP Platforms (MPU):
- dbaluta
- iuliana-prodan
- danieldegrasse
- decsny
- yvanderv
files:
- dts/arm64/nxp/
- dts/arm/nxp/nxp_imx*
- soc/nxp/imx/
- soc/nxp/layerscape/
files-regex:
@@ -3841,7 +3778,7 @@ nRF Platforms:
- drivers/*/*nrf*.c
- drivers/*/*nordic*/
- soc/nordic/
- samples/boards/nordic/
- samples/boards/nrf/
- dts/*/nordic/
- dts/bindings/*/nordic,*
- tests/drivers/*/*nrf*/
@@ -3966,7 +3903,7 @@ STM32 Platforms:
- dts/arm/st/
- dts/bindings/*/*stm32*
- soc/st/stm32/
- samples/boards/st/
- samples/boards/stm32/
labels:
- "platform: STM32"
description: >-
@@ -3981,8 +3918,6 @@ Espressif Platforms:
- LucasTambor
- marekmatej
- uLipe
- raffarost
- wmrsouza
files:
- drivers/*/*esp32*.c
- boards/espressif/
@@ -3990,8 +3925,8 @@ Espressif Platforms:
- dts/xtensa/espressif/
- dts/riscv/espressif/
- dts/bindings/*/*esp32*
- samples/boards/espressif/
- tests/boards/espressif/
- samples/boards/esp32*/
- tests/boards/espressif_esp32/
- drivers/*/*esp32*/
labels:
- "platform: ESP32"
@@ -4047,6 +3982,8 @@ TI K3 Platforms:
- gramsay0
- dnltz
files:
- boards/phytec/phyboard_lyra/
- boards/phytec/phyboard_electra/
- boards/ti/*am62*/
- drivers/*/*ti_k3*
- dts/bindings/*/ti,k3*
@@ -4067,12 +4004,8 @@ Xilinx Platforms:
collaborators:
- henrikbrixandersen
- ibirnbaum
- michalsimek
files:
- boards/amd/
- drivers/*/*xilinx*
- drivers/*/*xlnx*
- drivers/*/*zynq*
- dts/*/xilinx/
- dts/bindings/*/*xlnx*
- include/zephyr/*/*/*xlnx*
@@ -4118,7 +4051,7 @@ LiteX Platforms:
- dts/bindings/*/litex*
- dts/riscv/riscv32-litex-vexriscv.dtsi
- include/zephyr/drivers/*/*litex*
- samples/boards/enjoydigital/litex/
- samples/boards/litex/
- samples/drivers/*litex/
- soc/litex/
labels:
@@ -4151,20 +4084,6 @@ RTIO:
tests:
- rtio
Secure storage:
status: maintained
maintainers:
- tomi-font
files:
- subsys/secure_storage/
- samples/psa/
- doc/services/secure_storage.rst
- tests/subsys/secure_storage/
labels:
- "area: Secure storage"
tests:
- psa.secure_storage
Storage:
status: odd fixes
files:
@@ -4177,17 +4096,6 @@ Storage:
tests:
- storage
Storage ZMS:
status: maintained
maintainers:
- rghaddab
files:
- subsys/fs/zms/
- include/zephyr/fs/zms.h
- samples/subsys/fs/zms/
- tests/subsys/fs/zms/
- doc/services/storage/zms/zms.rst
Sysbuild:
status: maintained
maintainers:
@@ -4422,7 +4330,6 @@ West:
- mbolivar-ampere
- carlescufi
- swinslow
- pdgendt
files:
- scripts/west-commands.yml
- scripts/west_commands/
@@ -4731,11 +4638,6 @@ West:
collaborators:
- hubertmis
- nordic-krch
- krish2718
- sachinthegreen
- udaynordic
- rajb9
- srkanordic
files:
- modules/hal_nordic/
labels:
@@ -4754,8 +4656,8 @@ West:
status: maintained
maintainers:
- dleach02
- mmahadevan108
collaborators:
- mmahadevan108
- danieldegrasse
- manuargue
- PetervdPerk-NXP
@@ -4804,8 +4706,6 @@ West:
"West project: hal_rpi_pico":
status: maintained
maintainers:
- soburi
collaborators:
- yonsch
files:
- modules/hal_rpi_pico/
@@ -4822,9 +4722,8 @@ West:
- sateeshkotapati
- yonsch
- mnkp
- rettichschnidi
files:
- modules/hal_silabs/
- modules/Kconfig.silabs
labels:
- "platform: Silabs"
@@ -4898,14 +4797,6 @@ West:
labels:
- "platform: Intel"
"West project: zephyr-lang-rust":
status: maintained
maintainers:
- d3zd3z
files: []
labels:
- "area: Rust"
"West project: libmetal":
status: odd fixes
collaborators:
@@ -4987,7 +4878,6 @@ West:
tests:
- benchmark.crypto.mbedtls
- crypto.mbedtls
- psa.secure_storage
"West project: mcuboot":
status: maintained
@@ -5107,6 +4997,7 @@ West:
- nashif
- lyakh
- lgirdwood
- marc-hb
files:
- modules/Kconfig.sof
labels:
@@ -5160,7 +5051,6 @@ West:
- "area: TF-M"
tests:
- trusted-firmware-m
- psa.secure_storage
"West project: tf-m-tests":
status: maintained
@@ -5233,8 +5123,6 @@ West:
- modules/hostap/
labels:
- "area: Wi-Fi"
tests:
- net.wifi
Xtensa arch:
status: maintained
@@ -5251,6 +5139,7 @@ Xtensa arch:
- boards/qemu/xtensa/
- boards/cdns/xt-sim/
- soc/cdns/dc233c/
- soc/cdns/dc233c/
- soc/cdns/xtensa_sample_controller/
- tests/arch/xtensa/
labels:
@@ -5361,8 +5250,6 @@ Testing with Renode:
- fkokosinski
files:
- cmake/emu/renode.cmake
- soc/renode/
- boards/renode/
- boards/**/*/support/*.repl
- boards/**/*/support/*.resc
labels:
@@ -5391,7 +5278,6 @@ zbus:
- lyakh
- pillo79
files:
- cmake/llext-edk.cmake
- samples/subsys/llext/
- include/zephyr/llext/
- tests/subsys/llext/

View File

@@ -10,9 +10,15 @@
</p>
</a>
<a href="https://bestpractices.coreinfrastructure.org/projects/74"><img src="https://bestpractices.coreinfrastructure.org/projects/74/badge"></a>
<a href="https://scorecard.dev/viewer/?uri=github.com/zephyrproject-rtos/zephyr"><img src="https://api.securityscorecards.dev/projects/github.com/zephyrproject-rtos/zephyr/badge"></a>
<a href="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml?query=branch%3Amain"><img src="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml/badge.svg?event=push"></a>
<a href="https://bestpractices.coreinfrastructure.org/projects/74">
<img src="https://bestpractices.coreinfrastructure.org/projects/74/badge">
</a>
<a href="https://scorecard.dev/viewer/?uri=github.com/zephyrproject-rtos/zephyr">
<img src="https://api.securityscorecards.dev/projects/github.com/zephyrproject-rtos/zephyr/badge">
</a>
<a href="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml?query=branch%3Amain">
<img src="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml/badge.svg?event=push">
</a>
The Zephyr Project is a scalable real-time operating system (RTOS) supporting

View File

@@ -1 +1 @@
0.17.0
0.16.8

View File

@@ -1,5 +1,5 @@
VERSION_MAJOR = 4
VERSION_MINOR = 0
PATCHLEVEL = 0
VERSION_MAJOR = 3
VERSION_MINOR = 7
PATCHLEVEL = 99
VERSION_TWEAK = 0
EXTRAVERSION =

View File

@@ -53,8 +53,6 @@ config ARM64
select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD
select BARRIER_OPERATIONS_ARCH
select ARCH_HAS_DIRECTED_IPIS
select ARCH_HAS_DEMAND_PAGING
select ARCH_HAS_DEMAND_MAPPING
help
ARM64 (AArch64) architecture
@@ -83,7 +81,6 @@ config X86
select ARCH_IS_SET
select ATOMIC_OPERATIONS_BUILTIN
select ARCH_SUPPORTS_COREDUMP
select ARCH_SUPPORTS_COREDUMP_PRIV_STACKS
select ARCH_SUPPORTS_ROM_START if !X86_64
select CPU_HAS_MMU
select ARCH_MEM_DOMAIN_DATA if USERSPACE && !X86_COMMON_PAGE_TABLE
@@ -92,14 +89,12 @@ config X86
select ARCH_HAS_TIMING_FUNCTIONS
select ARCH_HAS_THREAD_LOCAL_STORAGE
select ARCH_HAS_DEMAND_PAGING if !X86_64
select ARCH_HAS_DEMAND_MAPPING if ARCH_HAS_DEMAND_PAGING
select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD
select NEED_LIBC_MEM_PARTITION if USERSPACE && TIMING_FUNCTIONS \
&& !BOARD_HAS_TIMING_FUNCTIONS \
&& !SOC_HAS_TIMING_FUNCTIONS
select ARCH_HAS_STACK_CANARIES_TLS
select ARCH_SUPPORTS_MEM_MAPPED_STACKS if X86_MMU && !DEMAND_PAGING
select ARCH_HAS_THREAD_PRIV_STACK_SPACE_GET if USERSPACE
help
x86 architecture
@@ -116,18 +111,17 @@ config RISCV
bool
select ARCH_IS_SET
select ARCH_SUPPORTS_COREDUMP
select ARCH_SUPPORTS_COREDUMP_PRIV_STACKS
select ARCH_SUPPORTS_ROM_START if !SOC_FAMILY_ESPRESSIF_ESP32
select ARCH_SUPPORTS_EMPTY_IRQ_SPURIOUS
select ARCH_HAS_CODE_DATA_RELOCATION
select ARCH_HAS_THREAD_LOCAL_STORAGE
select ARCH_HAS_STACKWALK
select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD
select USE_SWITCH_SUPPORTED
select USE_SWITCH
select SCHED_IPI_SUPPORTED if SMP
select ARCH_HAS_DIRECTED_IPIS
select BARRIER_OPERATIONS_BUILTIN
select ARCH_HAS_THREAD_PRIV_STACK_SPACE_GET if USERSPACE
imply XIP
help
RISCV architecture
@@ -142,7 +136,6 @@ config XTENSA
select ARCH_MEM_DOMAIN_DATA if USERSPACE
select ARCH_HAS_DIRECTED_IPIS
select THREAD_STACK_INFO
select ARCH_HAS_THREAD_PRIV_STACK_SPACE_GET if USERSPACE
help
Xtensa architecture
@@ -153,7 +146,6 @@ config ARCH_POSIX
select ARCH_HAS_CUSTOM_SWAP_TO_MAIN
select ARCH_HAS_CUSTOM_BUSY_WAIT
select ARCH_HAS_THREAD_ABORT
select ARCH_HAS_THREAD_NAME_HOOK
select NATIVE_BUILD
select HAS_COVERAGE_SUPPORT
select BARRIER_OPERATIONS_BUILTIN
@@ -189,9 +181,8 @@ config BIG_ENDIAN
Little-endian architecture is the default and should leave this option
unselected. This option is selected by arch/$ARCH/Kconfig,
soc/**/Kconfig, or boards/**/Kconfig and the user should generally avoid
modifying it. The option is used to select linker script OUTPUT_FORMAT,
the toolchain flags (TOOLCHAIN_C_FLAGS, TOOLCHAIN_LD_FLAGS), and command
line option for gen_isr_tables.py.
modifying it. The option is used to select linker script OUTPUT_FORMAT
and command line option for gen_isr_tables.py.
config LITTLE_ENDIAN
# Hidden Kconfig option representing the default little-endian architecture
@@ -423,17 +414,10 @@ config FRAME_POINTER
Select Y here to gain precise stack traces at the expense of slightly
increased size and decreased speed.
config ARCH_STACKWALK
bool "Compile the stack walking function"
default y
depends on ARCH_HAS_STACKWALK
help
Select Y here to compile the `arch_stack_walk()` function
config ARCH_STACKWALK_MAX_FRAMES
int "Max depth for stack walk function"
default 8
depends on ARCH_STACKWALK
depends on ARCH_HAS_STACKWALK
help
Depending on implementation, this can place a hard limit on the depths of the stack
for the stack walk function to examine.
@@ -615,14 +599,6 @@ config SIMPLIFIED_EXCEPTION_CODES
down to the generic K_ERR_CPU_EXCEPTION, which makes testing code
much more portable.
config EMPTY_IRQ_SPURIOUS
bool "Create empty spurious interrupt handler"
depends on ARCH_SUPPORTS_EMPTY_IRQ_SPURIOUS
help
This option changes body of spurious interrupt handler. When enabled,
handler contains only an infinite while loop, when disabled, handler
contains the whole Zephyr fault handling procedure.
endmenu # Interrupt configuration
config INIT_ARCH_HW_AT_BOOT
@@ -682,24 +658,23 @@ config ARCH_SUPPORTS_COREDUMP
config ARCH_SUPPORTS_COREDUMP_THREADS
bool
config ARCH_SUPPORTS_COREDUMP_PRIV_STACKS
bool
config ARCH_SUPPORTS_ARCH_HW_INIT
bool
config ARCH_SUPPORTS_ROM_START
bool
config ARCH_SUPPORTS_EMPTY_IRQ_SPURIOUS
bool
config ARCH_HAS_EXTRA_EXCEPTION_INFO
bool
config ARCH_HAS_GDBSTUB
bool
config ARCH_HAS_STACKWALK
bool
help
This is selected when the architecture implemented the arch_stack_walk() API.
config ARCH_HAS_COHERENCE
bool
help
@@ -723,11 +698,6 @@ config ARCH_SUPPORTS_MEM_MAPPED_STACKS
help
Select when the architecture supports memory mapped stacks.
config ARCH_HAS_THREAD_PRIV_STACK_SPACE_GET
bool
help
Select when the architecture implements arch_thread_priv_stack_space_get().
#
# Other architecture related options
#
@@ -793,13 +763,6 @@ config ARCH_HAS_DEMAND_PAGING
This hidden configuration should be selected by the architecture if
demand paging is supported.
config ARCH_HAS_DEMAND_MAPPING
bool
help
This hidden configuration should be selected by the architecture if
demand paging is supported and arch_mem_map() supports
K_MEM_MAP_UNPAGED.
config ARCH_HAS_RESERVED_PAGE_FRAMES
bool
help
@@ -825,7 +788,7 @@ config CPU_CACHE_INCOHERENT
help
This hidden configuration should be selected when the CPU has
incoherent cache. This applies to intra-CPU multiprocessing
incoherence and makes only sense when MP_MAX_NUM_CPUS > 1.
incoherence and makes only sense when MP_NUM_CPUS > 1.
config CPU_HAS_ICACHE
bool
@@ -1031,7 +994,7 @@ config CACHE_DOUBLEMAP
point to the same cached/uncached memory at different locations.
This applies to intra-CPU multiprocessing incoherence and makes only
sense when MP_MAX_NUM_CPUS > 1.
sense when MP_NUM_CPUS > 1.
config CACHE_MANAGEMENT
bool "Cache management features"

View File

@@ -343,15 +343,6 @@ config ARC_NORMAL_FIRMWARE
resources of the ARC processors, and, therefore, it shall avoid
accessing them.
config ARC_VPX_COOPERATIVE_SHARING
bool "Cooperative sharing of ARC VPX vector registers"
select SCHED_CPU_MASK if MP_MAX_NUM_CPUS > 1
help
This option enables the cooperative sharing of the ARC VPX vector
registers. Threads that want to use those registers must successfully
call arc_vpx_lock() before using them, and call arc_vpx_unlock()
when done using them.
source "arch/arc/core/dsp/Kconfig"
menu "ARC MPU Options"

View File

@@ -227,8 +227,4 @@ static int init_dcache(void)
return 0;
}
void arch_cache_init(void)
{
init_dcache();
}
SYS_INIT(init_dcache, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);

View File

@@ -54,7 +54,7 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
}
/* need to be executed on every core in the system */
void arch_irq_offload_init(void)
int arc_irq_offload_init(void)
{
IRQ_CONNECT(IRQ_OFFLOAD_LINE, IRQ_OFFLOAD_PRIO, arc_irq_offload_handler, NULL, 0);
@@ -64,4 +64,8 @@ void arch_irq_offload_init(void)
* with generic irq_enable() but via z_arc_v2_irq_unit_int_enable().
*/
z_arc_v2_irq_unit_int_enable(IRQ_OFFLOAD_LINE);
return 0;
}
SYS_INIT(arc_irq_offload_init, POST_KERNEL, 0);

View File

@@ -238,7 +238,7 @@ int arc_core_mpu_buffer_validate(const void *addr, size_t size, int write)
* This function provides the default configuration mechanism for the Memory
* Protection Unit (MPU).
*/
void arc_mpu_init(void)
static int arc_mpu_init(void)
{
uint32_t num_regions = get_num_regions();
@@ -246,6 +246,7 @@ void arc_mpu_init(void)
if (mpu_config.num_regions > num_regions) {
__ASSERT(0, "Request to configure: %u regions (supported: %u)\n",
mpu_config.num_regions, num_regions);
return -EINVAL;
}
/* Disable MPU */
@@ -277,7 +278,10 @@ void arc_mpu_init(void)
/* Enable MPU */
arc_core_mpu_enable();
return 0;
}
SYS_INIT(arc_mpu_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_COMMON_INTERNAL_H_ */

View File

@@ -814,7 +814,7 @@ int arc_core_mpu_buffer_validate(const void *addr, size_t size, int write)
* This function provides the default configuration mechanism for the Memory
* Protection Unit (MPU).
*/
void arc_mpu_init(void)
static int arc_mpu_init(void)
{
uint32_t num_regions;
uint32_t i;
@@ -826,7 +826,7 @@ void arc_mpu_init(void)
__ASSERT(0,
"Request to configure: %u regions (supported: %u)\n",
mpu_config.num_regions, num_regions);
return;
return -EINVAL;
}
static_regions_num = 0U;
@@ -851,7 +851,7 @@ void arc_mpu_init(void)
MPU_DYNAMIC_REGION_AREAS_NUM) {
LOG_ERR("not enough dynamic regions %d",
dynamic_regions_num);
return;
return -EINVAL;
}
dyn_reg_info[dynamic_regions_num].index = i;
@@ -886,8 +886,10 @@ void arc_mpu_init(void)
/* Enable MPU */
arc_core_mpu_enable();
return;
return 0;
}
SYS_INIT(arc_mpu_init, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* ZEPHYR_ARCH_ARC_CORE_MPU_ARC_MPU_V4_INTERNAL_H_ */

View File

@@ -23,8 +23,6 @@
#include <zephyr/arch/arc/cluster.h>
#include <zephyr/kernel_structs.h>
#include <kernel_internal.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
/* XXX - keep for future use in full-featured cache APIs */
#if 0
@@ -115,9 +113,6 @@ static void dev_state_zero(void)
#endif
extern FUNC_NORETURN void z_cstart(void);
extern void arc_mpu_init(void);
extern void arc_secureshield_init(void);
/**
* @brief Prepare to and run C code
*
@@ -126,10 +121,6 @@ extern void arc_secureshield_init(void);
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
#ifdef CONFIG_ISA_ARCV3
arc_cluster_scm_enable();
#endif
@@ -139,15 +130,6 @@ void z_prep_c(void)
dev_state_zero();
#endif
z_data_copy();
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
#ifdef CONFIG_ARC_MPU
arc_mpu_init();
#endif
#ifdef CONFIG_ARC_SECURE_FIRMWARE
arc_secureshield_init();
#endif
z_cstart();
CODE_UNREACHABLE;
}

View File

@@ -48,7 +48,7 @@ static void sjli_table_init(void)
/*
* @brief initialization of secureshield related functions.
*/
void arc_secureshield_init(void)
static int arc_secureshield_init(void)
{
sjli_table_init();
@@ -60,4 +60,9 @@ void arc_secureshield_init(void)
*
*/
__asm__ volatile("sflag 0x20");
return 0;
}
SYS_INIT(arc_secureshield_init, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);

View File

@@ -19,15 +19,10 @@
#include <zephyr/arch/arc/v2/mpu/arc_core_mpu.h>
#endif
#if defined(CONFIG_ARC_VPX_COOPERATIVE_SHARING) || defined(CONFIG_DSP_SHARING)
#if defined(CONFIG_ARC_DSP) && defined(CONFIG_DSP_SHARING)
#include <zephyr/arch/arc/v2/dsp/arc_dsp.h>
static struct k_spinlock lock;
#endif
#if defined(CONFIG_ARC_VPX_COOPERATIVE_SHARING)
static struct k_sem vpx_sem[CONFIG_MP_MAX_NUM_CPUS];
#endif
/* initial stack frame */
struct init_stack_frame {
uintptr_t pc;
@@ -325,65 +320,3 @@ void arc_dsp_enable(struct k_thread *thread, unsigned int options)
k_spin_unlock(&lock, key);
}
#endif /* CONFIG_ARC_DSP && CONFIG_DSP_SHARING */
#if defined(CONFIG_ARC_VPX_COOPERATIVE_SHARING)
int arc_vpx_lock(k_timeout_t timeout)
{
k_spinlock_key_t key;
unsigned int id;
key = k_spin_lock(&lock);
id = _current_cpu->id;
#if (CONFIG_MP_MAX_NUM_CPUS > 1) && defined(CONFIG_SCHED_CPU_MASK)
__ASSERT(!arch_is_in_isr() && (_current->base.cpu_mask == BIT(id)), "");
#endif
k_spin_unlock(&lock, key);
/*
* It is assumed that the thread is (still) pinned to
* the same CPU identified by <id>.
*/
return k_sem_take(&vpx_sem[id], timeout);
}
void arc_vpx_unlock(void)
{
k_spinlock_key_t key;
unsigned int id;
key = k_spin_lock(&lock);
#if (CONFIG_MP_MAX_NUM_CPUS > 1) && defined(CONFIG_SCHED_CPU_MASK)
__ASSERT(!arch_is_in_isr() && (_current->base.cpu_mask == BIT(id)), "");
#endif
id = _current_cpu->id;
k_spin_unlock(&lock, key);
/*
* It is assumed that this thread is (still) pinned to
* the CPU identified by <id>, and that it is the same CPU
* used by arc_vpx_lock().
*/
k_sem_give(&vpx_sem[id]);
}
void arc_vpx_unlock_force(unsigned int id)
{
__ASSERT(id < CONFIG_MP_MAX_NUM_CPUS, "");
k_sem_give(&vpx_sem[id]);
}
static int arc_vpx_sem_init(void)
{
for (unsigned int i = 0; i < CONFIG_MP_MAX_NUM_CPUS; i++) {
k_sem_init(vpx_sem, 1, 1);
}
return 0;
}
SYS_INIT(arc_vpx_sem_init, PRE_KERNEL_2, CONFIG_KERNEL_INIT_PRIORITY_OBJECTS);
#endif

View File

@@ -9,9 +9,11 @@
#ifdef CONFIG_IRQ_OFFLOAD
int arc_irq_offload_init(const struct device *unused);
static inline void arc_irq_offload_init_smp(void)
{
arch_irq_offload_init();
arc_irq_offload_init(NULL);
}
#else

View File

@@ -166,14 +166,11 @@ config RUNTIME_NMI
needed, enable this option and attach it via z_arm_nmi_set_handler().
config PLATFORM_SPECIFIC_INIT
bool "Platform (SOC) specific startup hook [DEPRECATED]"
select DEPRECATED
bool "Platform (SOC) specific startup hook"
help
The platform specific initialization code (z_arm_platform_init) is
executed at the beginning of the startup code (__start).
This option is deprecated, use SOC_RESET_HOOK instead.
config FAULT_DUMP
int "Fault dump level"
default 2

View File

@@ -93,14 +93,6 @@ config CPU_CORTEX_R7
help
This option signifies the use of a Cortex-R7 CPU
config CPU_CORTEX_R8
bool
select CPU_AARCH32_CORTEX_R
select ARMV7_R
select ARMV7_R_FP if CPU_HAS_FPU
help
This option signifies the use of a Cortex-R8 CPU
config CPU_CORTEX_R52
bool
select CPU_AARCH32_CORTEX_R

View File

@@ -14,5 +14,5 @@ SECTION_FUNC(text, __aeabi_read_tp)
/*
* TPIDRURW will be used as a base pointer point to TLS aera.
*/
mrc p15, 0, r0, c13, c0, 2
mrc 15, 0, r0, c13, c0, 2
bx lr

View File

@@ -217,7 +217,3 @@ int arch_icache_flush_and_invd_range(void *start_addr, size_t size)
}
#endif
void arch_cache_init(void)
{
}

View File

@@ -147,9 +147,8 @@ bool z_arm_fault_undef_instruction_fp(void)
* the FP was already enabled then this was an actual undefined
* instruction.
*/
if (__get_FPEXC() & FPEXC_EN) {
if (__get_FPEXC() & FPEXC_EN)
return true;
}
__set_FPEXC(FPEXC_EN);
@@ -163,9 +162,8 @@ bool z_arm_fault_undef_instruction_fp(void)
struct __fpu_sf *spill_esf =
(struct __fpu_sf *)_current_cpu->fp_ctx;
if (spill_esf == NULL) {
if (spill_esf == NULL)
return false;
}
_current_cpu->fp_ctx = NULL;

View File

@@ -1,6 +1,5 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -22,13 +21,29 @@
#include <zephyr/linker/linker-defs.h>
#include <zephyr/sys/barrier.h>
#include <zephyr/arch/arm/cortex_a_r/lib_helpers.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
#if defined(CONFIG_ARMV7_R) || defined(CONFIG_ARMV7_A)
#include <cortex_a_r/stack.h>
#endif
#if defined(__GNUC__)
/*
* GCC can detect if memcpy is passed a NULL argument, however one of
* the cases of relocate_vector_table() it is valid to pass NULL, so we
* suppress the warning for this case. We need to do this before
* string.h is included to get the declaration of memcpy.
*/
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wnonnull"
#endif
#include <string.h>
#if defined(CONFIG_SW_VECTOR_RELAY) || defined(CONFIG_SW_VECTOR_RELAY_CLIENT)
Z_GENERIC_SECTION(.vt_pointer_section) __attribute__((used))
void *_vector_table_pointer;
#endif
#ifdef CONFIG_ARM_MPU
extern void z_arm_mpu_init(void);
extern void z_arm_configure_static_mpu_regions(void);
@@ -36,6 +51,38 @@ extern void z_arm_configure_static_mpu_regions(void);
extern int z_arm_mmu_init(void);
#endif
#if defined(CONFIG_AARCH32_ARMV8_R)
#define VECTOR_ADDRESS ((uintptr_t)_vector_start)
static inline void relocate_vector_table(void)
{
write_sctlr(read_sctlr() & ~HIVECS);
write_vbar(VECTOR_ADDRESS & VBAR_MASK);
barrier_isync_fence_full();
}
#else
#define VECTOR_ADDRESS 0
void __weak relocate_vector_table(void)
{
#if defined(CONFIG_XIP) && (CONFIG_FLASH_BASE_ADDRESS != 0) || \
!defined(CONFIG_XIP) && (CONFIG_SRAM_BASE_ADDRESS != 0)
write_sctlr(read_sctlr() & ~HIVECS);
size_t vector_size = (size_t)_vector_end - (size_t)_vector_start;
(void)memcpy(VECTOR_ADDRESS, _vector_start, vector_size);
#elif defined(CONFIG_SW_VECTOR_RELAY) || defined(CONFIG_SW_VECTOR_RELAY_CLIENT)
_vector_table_pointer = _vector_start;
#endif
}
#if defined(__GNUC__)
#pragma GCC diagnostic pop
#endif
#endif /* CONFIG_AARCH32_ARMV8_R */
#if defined(CONFIG_CPU_HAS_FPU)
static inline void z_arm_floating_point_init(void)
@@ -62,6 +109,7 @@ static inline void z_arm_floating_point_init(void)
__set_CPACR(reg_val);
barrier_isync_fence_full();
#if !defined(CONFIG_FPU_SHARING)
/*
* FPEXC: Floating-Point Exception Control register
* comp. ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition,
@@ -83,6 +131,7 @@ static inline void z_arm_floating_point_init(void)
*/
__set_FPEXC(FPEXC_EN);
#endif
#endif
}
#endif /* CONFIG_CPU_HAS_FPU */
@@ -98,12 +147,10 @@ extern FUNC_NORETURN void z_cstart(void);
*/
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
/* Initialize tpidruro with our struct _cpu instance address */
write_tpidruro((uintptr_t)&_kernel.cpus[0]);
relocate_vector_table();
#if defined(CONFIG_CPU_HAS_FPU)
z_arm_floating_point_init();
#endif
@@ -113,9 +160,6 @@ void z_prep_c(void)
z_arm_init_stacks();
#endif
z_arm_interrupt_init();
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
#ifdef CONFIG_ARM_MPU
z_arm_mpu_init();
z_arm_configure_static_mpu_regions();

View File

@@ -1,6 +1,5 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -13,56 +12,6 @@
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/sys/util.h>
#include <zephyr/linker/linker-defs.h>
#if defined(CONFIG_AARCH32_ARMV8_R)
#define VECTOR_ADDRESS ((uintptr_t)_vector_start)
static inline void relocate_vector_table(void)
{
write_sctlr(read_sctlr() & ~HIVECS);
write_vbar(VECTOR_ADDRESS & VBAR_MASK);
barrier_isync_fence_full();
}
#else
#if defined(__GNUC__)
/*
* GCC can detect if memcpy is passed a NULL argument, however one of
* the cases of relocate_vector_table() it is valid to pass NULL, so we
* suppress the warning for this case. We need to do this before
* string.h is included to get the declaration of memcpy.
*/
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wnonnull"
#endif /* __GNUC__ */
#include <string.h>
#define VECTOR_ADDRESS 0
void __weak relocate_vector_table(void)
{
#if defined(CONFIG_XIP) && (CONFIG_FLASH_BASE_ADDRESS != 0) || \
!defined(CONFIG_XIP) && (CONFIG_SRAM_BASE_ADDRESS != 0)
write_sctlr(read_sctlr() & ~HIVECS);
size_t vector_size = (size_t)_vector_end - (size_t)_vector_start;
(void)memcpy(VECTOR_ADDRESS, _vector_start, vector_size);
#endif
}
#if defined(__GNUC__)
#pragma GCC diagnostic pop
#endif
#endif /* !CONFIG_AARCH32_ARMV8_R */
void z_arm_relocate_vector_table(void)
{
relocate_vector_table();
}
/**
*

View File

@@ -1,7 +1,6 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright (c) 2019 Stephanos Ioannidis <root@stephanos.io>
* Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -31,8 +30,8 @@ GDATA(z_arm_sys_stack)
GDATA(z_arm_fiq_stack)
GDATA(z_arm_abort_stack)
GDATA(z_arm_undef_stack)
#if defined(CONFIG_SOC_RESET_HOOK)
GTEXT(soc_reset_hook)
#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
GTEXT(z_arm_platform_init)
#endif
/**
@@ -306,9 +305,9 @@ _primary_core:
msr CPSR_c, #(MODE_SYS | I_BIT | F_BIT)
mov sp, r10
#if defined(CONFIG_SOC_RESET_HOOK)
#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
/* Execute platform-specific initialisation if applicable */
bl soc_reset_hook
bl z_arm_platform_init
#endif
#if defined(CONFIG_WDOG_INIT)
@@ -320,6 +319,4 @@ _primary_core:
bl z_arm_tcm_disable_ecc
#endif
bl z_arm_relocate_vector_table
bx r4

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2023, 2024 Arm Limited (or its affiliates).
* Copyright (c) 2023 Arm Limited (or its affiliates). All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*/
@@ -139,14 +139,10 @@ void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz, arch_cpustart_
arm_cpu_boot_params.arg = arg;
arm_cpu_boot_params.cpu_num = cpu_num;
/* we need the barrier here to make sure the above changes to
* arm_cpu_boot_params are completed before we set the mpid
*/
barrier_dsync_fence_full();
/* store mpid last as this is our synchronization point */
arm_cpu_boot_params.mpid = cpu_mpid;
barrier_dsync_fence_full();
sys_cache_data_invd_range(
(void *)&arm_cpu_boot_params,
sizeof(arm_cpu_boot_params));

View File

@@ -126,7 +126,7 @@ out_fp_inactive:
* TPIDRURW is used as a base pointer to all
* thread variables with offsets added by toolchain.
*/
mcr p15, 0, r0, c13, c0, 2
mcr 15, 0, r0, c13, c0, 2
#endif
#if defined(CONFIG_ARM_STORE_EXC_RETURN)
@@ -336,14 +336,12 @@ _context_switch:
_oops:
/*
* Pass the exception frame to z_do_kernel_oops.
* Pass the exception frame to z_do_kernel_oops. r0 contains the
* exception reason.
*/
cps #MODE_SYS
mov r0, sp
cps #MODE_SVC
/* Zero callee_regs and exc_return (only used on Cortex-M) */
mov r1, #0
mov r2, #0
bl z_do_kernel_oops
b z_arm_int_exit

View File

@@ -150,12 +150,10 @@ offload:
_oops:
/*
* Pass the exception frame to z_do_kernel_oops.
* Pass the exception frame to z_do_kernel_oops. r0 contains the
* exception reason.
*/
mov r0, sp
/* Zero callee_regs and exc_return (only used on Cortex-M) */
mov r1, #0
mov r2, #0
bl z_do_kernel_oops
inv:

View File

@@ -110,7 +110,3 @@ int arch_icache_flush_and_invd_range(void *start_addr, size_t size)
{
return -ENOTSUP;
}
void arch_cache_init(void)
{
}

View File

@@ -58,7 +58,7 @@ BUILD_ASSERT(!(CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE &
(CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE - 1)),
"the size of the partition must be power of 2");
int z_arm_debug_enable_null_pointer_detection(void)
static int z_arm_debug_enable_null_pointer_detection(void)
{
z_arm_dwt_init();
@@ -118,4 +118,7 @@ int z_arm_debug_enable_null_pointer_detection(void)
return 0;
}
SYS_INIT(z_arm_debug_enable_null_pointer_detection, PRE_KERNEL_1,
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT */

View File

@@ -40,6 +40,54 @@ LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#define EACD(edr) (((edr) & SYSMPU_EDR_EACD_MASK) >> SYSMPU_EDR_EACD_SHIFT)
#endif
/* Exception Return (EXC_RETURN) is provided in LR upon exception entry.
* It is used to perform an exception return and to detect possible state
* transition upon exception.
*/
/* Prefix. Indicates that this is an EXC_RETURN value.
* This field reads as 0b11111111.
*/
#define EXC_RETURN_INDICATOR_PREFIX (0xFF << 24)
/* bit[0]: Exception Secure. The security domain the exception was taken to. */
#define EXC_RETURN_EXCEPTION_SECURE_Pos 0
#define EXC_RETURN_EXCEPTION_SECURE_Msk \
BIT(EXC_RETURN_EXCEPTION_SECURE_Pos)
#define EXC_RETURN_EXCEPTION_SECURE_Non_Secure 0
#define EXC_RETURN_EXCEPTION_SECURE_Secure EXC_RETURN_EXCEPTION_SECURE_Msk
/* bit[2]: Stack Pointer selection. */
#define EXC_RETURN_SPSEL_Pos 2
#define EXC_RETURN_SPSEL_Msk BIT(EXC_RETURN_SPSEL_Pos)
#define EXC_RETURN_SPSEL_MAIN 0
#define EXC_RETURN_SPSEL_PROCESS EXC_RETURN_SPSEL_Msk
/* bit[3]: Mode. Indicates the Mode that was stacked from. */
#define EXC_RETURN_MODE_Pos 3
#define EXC_RETURN_MODE_Msk BIT(EXC_RETURN_MODE_Pos)
#define EXC_RETURN_MODE_HANDLER 0
#define EXC_RETURN_MODE_THREAD EXC_RETURN_MODE_Msk
/* bit[4]: Stack frame type. Indicates whether the stack frame is a standard
* integer only stack frame or an extended floating-point stack frame.
*/
#define EXC_RETURN_STACK_FRAME_TYPE_Pos 4
#define EXC_RETURN_STACK_FRAME_TYPE_Msk BIT(EXC_RETURN_STACK_FRAME_TYPE_Pos)
#define EXC_RETURN_STACK_FRAME_TYPE_EXTENDED 0
#define EXC_RETURN_STACK_FRAME_TYPE_STANDARD EXC_RETURN_STACK_FRAME_TYPE_Msk
/* bit[5]: Default callee register stacking. Indicates whether the default
* stacking rules apply, or whether the callee registers are already on the
* stack.
*/
#define EXC_RETURN_CALLEE_STACK_Pos 5
#define EXC_RETURN_CALLEE_STACK_Msk BIT(EXC_RETURN_CALLEE_STACK_Pos)
#define EXC_RETURN_CALLEE_STACK_SKIPPED 0
#define EXC_RETURN_CALLEE_STACK_DEFAULT EXC_RETURN_CALLEE_STACK_Msk
/* bit[6]: Secure or Non-secure stack. Indicates whether a Secure or
* Non-secure stack is used to restore stack frame on exception return.
*/
#define EXC_RETURN_RETURN_STACK_Pos 6
#define EXC_RETURN_RETURN_STACK_Msk BIT(EXC_RETURN_RETURN_STACK_Pos)
#define EXC_RETURN_RETURN_STACK_Non_Secure 0
#define EXC_RETURN_RETURN_STACK_Secure EXC_RETURN_RETURN_STACK_Msk
/* Integrity signature for an ARMv8-M implementation */
#if defined(CONFIG_ARMV7_M_ARMV8_M_FP)
#define INTEGRITY_SIGNATURE_STD 0xFEFA125BUL
@@ -695,7 +743,7 @@ static inline bool z_arm_is_pc_valid(uintptr_t pc)
return true;
}
#if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_itcm))
#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_itcm), okay)
/* Is it in the ITCM */
if ((((uintptr_t)&__itcm_start) <= pc) && (pc < ((uintptr_t)&__itcm_end))) {
return true;
@@ -1064,7 +1112,9 @@ void z_arm_fault(uint32_t msp, uint32_t psp, uint32_t exc_return,
__ASSERT(esf != NULL,
"ESF could not be retrieved successfully. Shall never occur.");
z_arm_set_fault_sp(esf, exc_return);
#ifdef CONFIG_DEBUG_COREDUMP
z_arm_coredump_fault_sp = POINTER_TO_UINT(esf);
#endif
reason = fault_handle(esf, fault, &recoverable);
if (recoverable) {

View File

@@ -27,11 +27,6 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
* r0: address of the system_off function
*/
push {r4-r12, lr}
/* Move system_off to protected register. */
mov r4, r0
/* Store CPU context */
ldr r1, =_cpu_context
mrs r2, msp
@@ -70,15 +65,13 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
/*
* Mark entering suspend to RAM.
*/
mov r1, lr
bl pm_s2ram_mark_set
mov lr, r1
bl pm_s2ram_mark_set
/*
* Call the system_off function passed as parameter. This should never
* return.
*/
blx r4
blx r0
/*
* The system_off function returns here only when the powering off was
@@ -88,12 +81,9 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
/*
* Reset the marking of suspend to RAM, return is ignored.
*/
mov r1, lr
bl pm_s2ram_mark_check_and_clear
mov lr, r1
/* Move system_off back to r0 as return value */
mov r0, r4
push {r0}
bl pm_s2ram_mark_check_and_clear
pop {r0}
pop {r4-r12, lr}
bx lr
@@ -104,12 +94,12 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_resume)
/*
* Check if reset occurred after suspending to RAM.
*/
mov r1, lr
bl pm_s2ram_mark_check_and_clear
mov lr, r1
cmp r0, #0x1
beq resume
bx lr
push {lr}
bl pm_s2ram_mark_check_and_clear
cmp r0, #0x1
pop {lr}
beq resume
bx lr
resume:
/*

View File

@@ -22,44 +22,20 @@ __noinit _cpu_context_t _cpu_context;
*/
static __noinit uint32_t marker;
void __attribute__((naked)) pm_s2ram_mark_set(void)
void pm_s2ram_mark_set(void)
{
__asm__ volatile(
/* Set the marker to MAGIC value */
"str %[_magic_val], [%[_marker]]\n"
"bx lr\n"
:
: [_magic_val] "r"(MAGIC), [_marker] "r"(&marker)
: "r1", "r4", "memory");
marker = MAGIC;
}
bool __attribute__((naked)) pm_s2ram_mark_check_and_clear(void)
bool pm_s2ram_mark_check_and_clear(void)
{
__asm__ volatile(
/* Set return value to 0 */
"mov r0, #0\n"
if (marker == MAGIC) {
marker = 0;
/* Check the marker */
"ldr r3, [%[_marker]]\n"
"cmp r3, %[_magic_val]\n"
"bne exit\n"
return true;
}
/*
* Reset the marker
*/
"str r0, [%[_marker]]\n"
/*
* Set return value to 1
*/
"mov r0, #1\n"
"exit:\n"
"bx lr\n"
:
: [_magic_val] "r"(MAGIC), [_marker] "r"(&marker)
: "r0", "r1", "r3", "r4", "memory");
return false;
}
#endif /* CONFIG_PM_S2RAM_CUSTOM_MARKING */

View File

@@ -20,8 +20,6 @@
#include <kernel_internal.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/sys/barrier.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
#if defined(__GNUC__)
/*
@@ -183,10 +181,6 @@ extern FUNC_NORETURN void z_cstart(void);
*/
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
relocate_vector_table();
#if defined(CONFIG_CPU_HAS_FPU)
z_arm_floating_point_init();
@@ -199,13 +193,6 @@ void z_prep_c(void)
#else
z_arm_interrupt_init();
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
#ifdef CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT
z_arm_debug_enable_null_pointer_detection();
#endif
z_cstart();
CODE_UNREACHABLE;
}

View File

@@ -24,8 +24,8 @@ GDATA(z_interrupt_stacks)
#if defined(CONFIG_DEBUG_THREAD_INFO)
GDATA(z_sys_post_kernel)
#endif
#if defined(CONFIG_SOC_RESET_HOOK)
GTEXT(soc_reset_hook)
#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
GTEXT(z_arm_platform_init)
#endif
#if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)
GTEXT(z_arm_init_arch_hw_at_boot)
@@ -93,8 +93,8 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
bl arch_pm_s2ram_resume
#endif /* CONFIG_PM_S2RAM */
#if defined(CONFIG_SOC_RESET_HOOK)
bl soc_reset_hook
#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
bl z_arm_platform_init
#endif
#if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)

View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2018 Linaro, Limited
* Copyright (c) 2023 Arm Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -47,3 +48,63 @@ int arch_swap(unsigned int key)
*/
return _current->arch.swap_return_value;
}
uintptr_t z_arm_pendsv_c(uintptr_t exc_ret)
{
/* Store LSB of LR (EXC_RETURN) to the thread's 'mode' word. */
IF_ENABLED(CONFIG_ARM_STORE_EXC_RETURN,
(_kernel.cpus[0].current->arch.mode_exc_return = (uint8_t)exc_ret;));
/* Protect the kernel state while we play with the thread lists */
uint32_t basepri = arch_irq_lock();
/* fetch the thread to run from the ready queue cache */
struct k_thread *current = _kernel.cpus[0].current = _kernel.ready_q.cache;
/*
* Clear PendSV so that if another interrupt comes in and
* decides, with the new kernel state based on the new thread
* being context-switched in, that it needs to reschedule, it
* will take, but that previously pended PendSVs do not take,
* since they were based on the previous kernel state and this
* has been handled.
*/
SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk;
/* For Cortex-M, store TLS pointer in a global variable,
* as it lacks the process ID or thread ID register
* to be used by toolchain to access thread data.
*/
IF_ENABLED(CONFIG_THREAD_LOCAL_STORAGE,
(extern uintptr_t z_arm_tls_ptr; z_arm_tls_ptr = current->tls));
IF_ENABLED(CONFIG_ARM_STORE_EXC_RETURN,
(exc_ret = (exc_ret & 0xFFFFFF00) | current->arch.mode_exc_return));
/* Restore previous interrupt disable state (irq_lock key)
* (We clear the arch.basepri field after restoring state)
*/
basepri = current->arch.basepri;
current->arch.basepri = 0;
arch_irq_unlock(basepri);
#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
/* Re-program dynamic memory map */
z_arm_configure_dynamic_mpu_regions(current);
#endif
/* restore mode */
IF_ENABLED(CONFIG_USERSPACE, ({
CONTROL_Type ctrl = {.w = __get_CONTROL()};
/* exit privileged state when returning to thread mode. */
ctrl.b.nPRIV = 0;
/* __set_CONTROL inserts an ISB which is may not be necessary here
* (stack pointer may not be touched), but it's recommended to avoid
* executing pre-fetched instructions with the previous privilege.
*/
__set_CONTROL(ctrl.w | current->arch.mode);
}));
return exc_ret;
}

View File

@@ -27,6 +27,7 @@ _ASM_FILE_PROLOGUE
GTEXT(z_arm_svc)
GTEXT(z_arm_pendsv)
GTEXT(z_do_kernel_oops)
GTEXT(z_arm_pendsv_c)
#if defined(CONFIG_USERSPACE)
GTEXT(z_arm_do_syscall)
#endif
@@ -117,125 +118,20 @@ out_fp_endif:
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
/* Protect the kernel state while we play with the thread lists */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
cpsid i
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
movs.n r0, #_EXC_IRQ_DEFAULT_PRIO
msr BASEPRI_MAX, r0
isb /* Make the effect of disabling interrupts be realized immediately */
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
mov r4, lr
mov r0, lr
bl z_arm_pendsv_c
mov lr, r4
/*
* Prepare to clear PendSV with interrupts unlocked, but
* don't clear it yet. PendSV must not be cleared until
* the new thread is context-switched in since all decisions
* to pend PendSV have been taken with the current kernel
* state and this is what we're handling currently.
*/
ldr r7, =_SCS_ICSR
ldr r6, =_SCS_ICSR_UNPENDSV
/* _kernel is still in r1 */
/* fetch the thread to run from the ready queue cache */
ldr r2, [r1, #_kernel_offset_to_ready_q_cache]
str r2, [r1, #_kernel_offset_to_current]
/*
* Clear PendSV so that if another interrupt comes in and
* decides, with the new kernel state based on the new thread
* being context-switched in, that it needs to reschedule, it
* will take, but that previously pended PendSVs do not take,
* since they were based on the previous kernel state and this
* has been handled.
*/
/* _SCS_ICSR is still in r7 and _SCS_ICSR_UNPENDSV in r6 */
str r6, [r7, #0]
#if defined(CONFIG_THREAD_LOCAL_STORAGE)
/* Grab the TLS pointer */
ldr r4, =_thread_offset_to_tls
adds r4, r2, r4
ldr r0, [r4]
/* For Cortex-M, store TLS pointer in a global variable,
* as it lacks the process ID or thread ID register
* to be used by toolchain to access thread data.
*/
ldr r4, =z_arm_tls_ptr
str r0, [r4]
#endif
ldr r1, =_kernel
ldr r2, [r1, #_kernel_offset_to_current]
#if defined(CONFIG_ARM_STORE_EXC_RETURN)
/* Restore EXC_RETURN value. */
ldrsb lr, [r2, #_thread_offset_to_mode_exc_return]
#endif
/* Restore previous interrupt disable state (irq_lock key)
* (We clear the arch.basepri field after restoring state)
*/
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) && (_thread_offset_to_basepri > 124)
/* Doing it this way since the offset to thread->arch.basepri can in
* some configurations be larger than the maximum of 124 for ldr/str
* immediate offsets.
*/
ldr r4, =_thread_offset_to_basepri
adds r4, r2, r4
ldr r0, [r4]
movs.n r3, #0
str r3, [r4]
#else
ldr r0, [r2, #_thread_offset_to_basepri]
movs r3, #0
str r3, [r2, #_thread_offset_to_basepri]
mov lr, r0
#endif
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* BASEPRI not available, previous interrupt disable state
* maps to PRIMASK.
*
* Only enable interrupts if value is 0, meaning interrupts
* were enabled before irq_lock was called.
*/
cmp r0, #0
bne _thread_irq_disabled
cpsie i
_thread_irq_disabled:
#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
/* Re-program dynamic memory map */
push {r2,lr}
mov r0, r2
bl z_arm_configure_dynamic_mpu_regions
pop {r2,r3}
mov lr, r3
#endif
#ifdef CONFIG_USERSPACE
/* restore mode */
ldr r3, =_thread_offset_to_mode
adds r3, r2, r3
ldr r0, [r3]
mrs r3, CONTROL
movs.n r1, #1
bics r3, r1
orrs r3, r0
msr CONTROL, r3
/* ISB is not strictly necessary here (stack pointer is not being
* touched), but it's recommended to avoid executing pre-fetched
* instructions with the previous privilege.
*/
isb
#endif
ldr r4, =_thread_offset_to_callee_saved
adds r0, r2, r4
@@ -253,9 +149,6 @@ _thread_irq_disabled:
subs r0, #36
ldmia r0!, {r4-r7}
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* restore BASEPRI for the incoming thread */
msr BASEPRI, r0
#ifdef CONFIG_FPU_SHARING
/* Assess whether switched-in thread had been using the FP registers. */
tst lr, #_EXC_RETURN_FTYPE_Msk
@@ -285,30 +178,6 @@ in_fp_endif:
isb
#endif
#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
/* Re-program dynamic memory map */
push {r2,lr}
mov r0, r2 /* _current thread */
bl z_arm_configure_dynamic_mpu_regions
pop {r2,lr}
#endif
#ifdef CONFIG_USERSPACE
/* restore mode */
ldr r0, [r2, #_thread_offset_to_mode]
mrs r3, CONTROL
bic r3, #1
orr r3, r0
msr CONTROL, r3
/* ISB is not strictly necessary here (stack pointer is not being
* touched), but it's recommended to avoid executing pre-fetched
* instructions with the previous privilege.
*/
isb
#endif
/* load callee-saved + psp from thread */
add r0, r2, #_thread_offset_to_callee_saved
ldmia r0, {r4-r11, ip}
@@ -431,7 +300,6 @@ _stack_frame_endif:
/* exception return is done in z_arm_int_exit() */
ldr r0, =z_arm_int_exit
bx r0
#endif
_oops:
@@ -447,7 +315,6 @@ _oops:
mov r1, sp /* pointer to _callee_saved_t */
#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE */
#endif /* CONFIG_EXTRA_EXCEPTION_INFO */
mov r2, lr /* EXC_RETURN */
bl z_do_kernel_oops
/* return from SVC exception is done here */
#if defined(CONFIG_EXTRA_EXCEPTION_INFO)

View File

@@ -586,9 +586,9 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, char *stack_ptr,
"mov r3, #0\n"
"ldr r4, =z_thread_entry\n"
"bx r4\n" /* We dont intend to return, so there is no need to link. */
:
: "r" (_main), "r" (stack_ptr)
: "r0", "r1", "r2", "r3", "r4", "ip", "lr", "memory");
: "+r" (_main)
: "r" (stack_ptr)
: "r0", "r1", "r2", "r3", "r4", "ip", "lr");
CODE_UNREACHABLE;
}

View File

@@ -104,7 +104,7 @@ timing_t arch_timing_counter_get(void)
uint64_t arch_timing_cycles_get(volatile timing_t *const start,
volatile timing_t *const end)
{
return ((uint32_t)*end - (uint32_t)*start);
return (*end - *start);
}
uint64_t arch_timing_freq_get(void)

View File

@@ -12,34 +12,6 @@
LOG_MODULE_REGISTER(elf, CONFIG_LLEXT_LOG_LEVEL);
#define R_ARM_NONE 0
#define R_ARM_PC24 1
#define R_ARM_ABS32 2
#define R_ARM_REL32 3
#define R_ARM_COPY 20
#define R_ARM_GLOB_DAT 21
#define R_ARM_JUMP_SLOT 22
#define R_ARM_RELATIVE 23
#define R_ARM_CALL 28
#define R_ARM_JUMP24 29
#define R_ARM_TARGET1 38
#define R_ARM_V4BX 40
#define R_ARM_PREL31 42
#define R_ARM_MOVW_ABS_NC 43
#define R_ARM_MOVT_ABS 44
#define R_ARM_MOVW_PREL_NC 45
#define R_ARM_MOVT_PREL 46
#define R_ARM_ALU_PC_G0_NC 57
#define R_ARM_ALU_PC_G1_NC 59
#define R_ARM_LDR_PC_G2 63
#define R_ARM_THM_CALL 10
#define R_ARM_THM_JUMP24 30
#define R_ARM_THM_MOVW_ABS_NC 47
#define R_ARM_THM_MOVT_ABS 48
#define R_ARM_THM_MOVW_PREL_NC 49
#define R_ARM_THM_MOVT_PREL 50
#define OPCODE2ARMMEM(x) ((uint32_t)(x))
#define OPCODE2THM16MEM(x) ((uint16_t)(x))
#define MEM2ARMOPCODE(x) OPCODE2ARMMEM(x)

View File

@@ -101,9 +101,8 @@ void z_arm_fatal_error(unsigned int reason, const struct arch_esf *esf)
*
* @param esf exception frame
* @param callee_regs Callee-saved registers (R4-R11)
* @param exc_return EXC_RETURN value present in LR after exception entry.
*/
void z_do_kernel_oops(const struct arch_esf *esf, _callee_saved_t *callee_regs, uint32_t exc_return)
void z_do_kernel_oops(const struct arch_esf *esf, _callee_saved_t *callee_regs)
{
#if !(defined(CONFIG_EXTRA_EXCEPTION_INFO) && defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE))
ARG_UNUSED(callee_regs);
@@ -111,8 +110,6 @@ void z_do_kernel_oops(const struct arch_esf *esf, _callee_saved_t *callee_regs,
/* Stacked R0 holds the exception reason. */
unsigned int reason = esf->basic.r0;
z_arm_set_fault_sp(esf, exc_return);
#if defined(CONFIG_USERSPACE)
if (z_arm_preempted_thread_in_user_mode(esf)) {
/*

View File

@@ -42,7 +42,3 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
offload_routine = NULL;
k_sched_unlock();
}
void arch_irq_offload_init(void)
{
}

View File

@@ -37,13 +37,6 @@ BUILD_ASSERT((DT_FOREACH_STATUS_OKAY_NODE_VARGS(
NODE_HAS_PROP_AND_OR, zephyr_memory_region_mpu) false) == false,
"`zephyr,memory-region-mpu` was deprecated in favor of `zephyr,memory-attr`");
#define NULL_PAGE_DETECT_NODE_FINDER(node_id, prop) \
(DT_NODE_HAS_PROP(node_id, prop) && (DT_REG_ADDR(node_id) == 0) && \
(DT_REG_SIZE(node_id) >= CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE)) ||
#define DT_NULL_PAGE_DETECT_NODE_EXIST \
(DT_FOREACH_STATUS_OKAY_NODE_VARGS(NULL_PAGE_DETECT_NODE_FINDER, zephyr_memory_attr) false)
/*
* Global status variable holding the number of HW MPU region indices, which
* have been reserved by the MPU driver to program the static (fixed) memory
@@ -477,9 +470,7 @@ int z_arm_mpu_init(void)
*/
#if defined(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_MPU)
#if (defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)) && \
(CONFIG_FLASH_BASE_ADDRESS > CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE) && \
(!DT_NULL_PAGE_DETECT_NODE_EXIST)
(CONFIG_FLASH_BASE_ADDRESS > CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE)
#pragma message "Null-Pointer exception detection cannot be configured on un-mapped flash areas"
#else
const struct z_arm_mpu_partition unmap_region = {

View File

@@ -43,15 +43,6 @@ static ALWAYS_INLINE bool arch_is_in_nested_exception(const struct arch_esf *esf
return (arch_curr_cpu()->arch.exc_depth > 1U) ? (true) : (false);
}
/**
* @brief No current implementation where core dump is not supported
*
* @param esf exception frame
* @param exc_return EXC_RETURN value present in LR after exception entry.
*/
static ALWAYS_INLINE void z_arm_set_fault_sp(const struct arch_esf *esf, uint32_t exc_return)
{}
#if defined(CONFIG_USERSPACE)
/*
* This function is used by privileged code to determine if the thread

View File

@@ -39,54 +39,6 @@ extern volatile irq_offload_routine_t offload_routine;
*/
#define AIRCR_VECT_KEY_PERMIT_WRITE 0x05FAUL
/* Exception Return (EXC_RETURN) is provided in LR upon exception entry.
* It is used to perform an exception return and to detect possible state
* transition upon exception.
*/
/* Prefix. Indicates that this is an EXC_RETURN value.
* This field reads as 0b11111111.
*/
#define EXC_RETURN_INDICATOR_PREFIX (0xFF << 24)
/* bit[0]: Exception Secure. The security domain the exception was taken to. */
#define EXC_RETURN_EXCEPTION_SECURE_Pos 0
#define EXC_RETURN_EXCEPTION_SECURE_Msk \
BIT(EXC_RETURN_EXCEPTION_SECURE_Pos)
#define EXC_RETURN_EXCEPTION_SECURE_Non_Secure 0
#define EXC_RETURN_EXCEPTION_SECURE_Secure EXC_RETURN_EXCEPTION_SECURE_Msk
/* bit[2]: Stack Pointer selection. */
#define EXC_RETURN_SPSEL_Pos 2
#define EXC_RETURN_SPSEL_Msk BIT(EXC_RETURN_SPSEL_Pos)
#define EXC_RETURN_SPSEL_MAIN 0
#define EXC_RETURN_SPSEL_PROCESS EXC_RETURN_SPSEL_Msk
/* bit[3]: Mode. Indicates the Mode that was stacked from. */
#define EXC_RETURN_MODE_Pos 3
#define EXC_RETURN_MODE_Msk BIT(EXC_RETURN_MODE_Pos)
#define EXC_RETURN_MODE_HANDLER 0
#define EXC_RETURN_MODE_THREAD EXC_RETURN_MODE_Msk
/* bit[4]: Stack frame type. Indicates whether the stack frame is a standard
* integer only stack frame or an extended floating-point stack frame.
*/
#define EXC_RETURN_STACK_FRAME_TYPE_Pos 4
#define EXC_RETURN_STACK_FRAME_TYPE_Msk BIT(EXC_RETURN_STACK_FRAME_TYPE_Pos)
#define EXC_RETURN_STACK_FRAME_TYPE_EXTENDED 0
#define EXC_RETURN_STACK_FRAME_TYPE_STANDARD EXC_RETURN_STACK_FRAME_TYPE_Msk
/* bit[5]: Default callee register stacking. Indicates whether the default
* stacking rules apply, or whether the callee registers are already on the
* stack.
*/
#define EXC_RETURN_CALLEE_STACK_Pos 5
#define EXC_RETURN_CALLEE_STACK_Msk BIT(EXC_RETURN_CALLEE_STACK_Pos)
#define EXC_RETURN_CALLEE_STACK_SKIPPED 0
#define EXC_RETURN_CALLEE_STACK_DEFAULT EXC_RETURN_CALLEE_STACK_Msk
/* bit[6]: Secure or Non-secure stack. Indicates whether a Secure or
* Non-secure stack is used to restore stack frame on exception return.
*/
#define EXC_RETURN_RETURN_STACK_Pos 6
#define EXC_RETURN_RETURN_STACK_Msk BIT(EXC_RETURN_RETURN_STACK_Pos)
#define EXC_RETURN_RETURN_STACK_Non_Secure 0
#define EXC_RETURN_RETURN_STACK_Secure EXC_RETURN_RETURN_STACK_Msk
/*
* The current executing vector is found in the IPSR register. All
* IRQs and system exceptions are considered as interrupt context.
@@ -232,43 +184,6 @@ static ALWAYS_INLINE void z_arm_clear_faults(void)
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
}
/**
* @brief Set z_arm_coredump_fault_sp to stack pointer value expected by GDB
*
* @param esf exception frame
* @param exc_return EXC_RETURN value present in LR after exception entry.
*/
static ALWAYS_INLINE void z_arm_set_fault_sp(const struct arch_esf *esf, uint32_t exc_return)
{
#ifdef CONFIG_DEBUG_COREDUMP
z_arm_coredump_fault_sp = POINTER_TO_UINT(esf);
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) || defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* Gdb expects a stack pointer that does not include the exception stack frame in order to
* unwind. So adjust the stack pointer accordingly.
*/
z_arm_coredump_fault_sp += sizeof(esf->basic);
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
/* Assess whether thread had been using the FP registers and add size of additional
* registers if necessary
*/
if ((exc_return & EXC_RETURN_STACK_FRAME_TYPE_STANDARD) ==
EXC_RETURN_STACK_FRAME_TYPE_EXTENDED) {
z_arm_coredump_fault_sp += sizeof(esf->fpu);
}
#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
#if !(defined(CONFIG_ARMV8_M_MAINLINE) || defined(CONFIG_ARMV8_M_BASELINE))
if ((esf->basic.xpsr & SCB_CCR_STKALIGN_Msk) == SCB_CCR_STKALIGN_Msk) {
/* Adjust stack alignment after PSR bit[9] detected */
z_arm_coredump_fault_sp |= 0x4;
}
#endif /* !CONFIG_ARMV8_M_MAINLINE */
#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE || CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif /* CONFIG_DEBUG_COREDUMP */
}
/**
* @brief Assess whether a debug monitor event should be treated as an error
*

View File

@@ -9,7 +9,6 @@ zephyr_library_sources(
irq_init.c
irq_manage.c
prep_c.c
reboot.c
reset.S
reset.c
switch.S
@@ -29,7 +28,6 @@ if(${SRAM_LENGTH} GREATER 11 OR ${KERNEL_VM_LENGTH} GREATER 11)
zephyr_cc_option(-mcmodel=large)
endif()
zephyr_library_sources_ifdef(CONFIG_LLEXT elf.c)
zephyr_library_sources_ifdef(CONFIG_FPU_SHARING fpu.c fpu.S)
zephyr_library_sources_ifdef(CONFIG_ARM_MMU mmu.c mmu.S)
zephyr_library_sources_ifdef(CONFIG_ARM_MPU cortex_r/arm_mpu.c)

View File

@@ -161,14 +161,6 @@ config ARM64_EXCEPTION_STACK_TRACE
help
Internal config to enable runtime stack traces on fatal exceptions.
config ARCH_HAS_STACKWALK
bool
default y
depends on FRAME_POINTER
help
Internal config to indicate that the arch_stack_walk() API is implemented
and it can be enabled.
config ARM64_SAFE_EXCEPTION_STACK_SIZE
int "The stack size of the safe exception stack"
default 4096

View File

@@ -1,515 +0,0 @@
/*
* Copyright (c) 2024 BayLibre SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/llext/elf.h>
#include <zephyr/llext/llext.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/util.h>
#include <zephyr/sys/byteorder.h>
LOG_MODULE_REGISTER(elf, CONFIG_LLEXT_LOG_LEVEL);
#define R_ARM_NONE 0
#define R_AARCH64_NONE 256
/* Static data relocations */
#define R_AARCH64_ABS64 257
#define R_AARCH64_ABS32 258
#define R_AARCH64_ABS16 259
#define R_AARCH64_PREL64 260
#define R_AARCH64_PREL32 261
#define R_AARCH64_PREL16 262
/* Static relocations */
#define R_AARCH64_MOVW_UABS_G0 263
#define R_AARCH64_MOVW_UABS_G0_NC 264
#define R_AARCH64_MOVW_UABS_G1 265
#define R_AARCH64_MOVW_UABS_G1_NC 266
#define R_AARCH64_MOVW_UABS_G2 267
#define R_AARCH64_MOVW_UABS_G2_NC 268
#define R_AARCH64_MOVW_UABS_G3 269
#define R_AARCH64_MOVW_SABS_G0 270
#define R_AARCH64_MOVW_SABS_G1 271
#define R_AARCH64_MOVW_SABS_G2 272
#define R_AARCH64_MOVW_PREL_G0 287
#define R_AARCH64_MOVW_PREL_G0_NC 288
#define R_AARCH64_MOVW_PREL_G1 289
#define R_AARCH64_MOVW_PREL_G1_NC 290
#define R_AARCH64_MOVW_PREL_G2 291
#define R_AARCH64_MOVW_PREL_G2_NC 292
#define R_AARCH64_MOVW_PREL_G3 293
#define R_AARCH64_LD_PREL_LO19 273
#define R_AARCH64_ADR_PREL_LO21 274
#define R_AARCH64_ADR_PREL_PG_HI21 275
#define R_AARCH64_ADR_PREL_PG_HI21_NC 276
#define R_AARCH64_ADD_ABS_LO12_NC 277
#define R_AARCH64_LDST8_ABS_LO12_NC 278
#define R_AARCH64_TSTBR14 279
#define R_AARCH64_CONDBR19 280
#define R_AARCH64_JUMP26 282
#define R_AARCH64_CALL26 283
#define R_AARCH64_LDST16_ABS_LO12_NC 284
#define R_AARCH64_LDST32_ABS_LO12_NC 285
#define R_AARCH64_LDST64_ABS_LO12_NC 286
#define R_AARCH64_LDST128_ABS_LO12_NC 299
/* Masks for immediate values */
#define AARCH64_MASK_IMM12 BIT_MASK(12)
#define AARCH64_MASK_IMM14 BIT_MASK(14)
#define AARCH64_MASK_IMM16 BIT_MASK(16)
#define AARCH64_MASK_IMM19 BIT_MASK(19)
#define AARCH64_MASK_IMM26 BIT_MASK(26)
/* MOV instruction helper symbols */
#define AARCH64_MASK_MOV_OPCODE BIT_MASK(8)
#define AARCH64_SHIFT_MOV_OPCODE (23)
#define AARCH64_SHIFT_MOV_IMM16 (5)
#define AARCH64_OPCODE_MOVN (0b00100101)
#define AARCH64_OPCODE_MOVZ (0b10100101)
/* ADR instruction helper symbols */
#define AARCH64_MASK_ADR_IMMLO BIT_MASK(2)
#define AARCH64_MASK_ADR_IMMHI BIT_MASK(19)
#define AARCH64_SHIFT_ADR_IMMLO (29)
#define AARCH64_SHIFT_ADR_IMMHI (5)
#define AARCH64_ADR_IMMLO_BITS (2)
#define AARCH64_PAGE(expr) ((expr) & ~0xFFF)
enum aarch64_reloc_type {
AARCH64_RELOC_TYPE_NONE,
AARCH64_RELOC_TYPE_ABS,
AARCH64_RELOC_TYPE_PREL,
AARCH64_RELOC_TYPE_PAGE,
};
/**
* @brief Function computing a relocation (X in AArch64 ELF).
*
* @param[in] reloc_type Type of relocation operation.
* @param[in] loc Address of an opcode to rewrite (P in AArch64 ELF).
* @param[in] sym_base_addr Address of the symbol referenced by relocation (S in AArch64 ELF).
* @param[in] addend Addend from RELA relocation.
*
* @return Result of the relocation operation (X in AArch64 ELF)
*/
static uint64_t reloc(enum aarch64_reloc_type reloc_type, uintptr_t loc, uintptr_t sym_base_addr,
int64_t addend)
{
switch (reloc_type) {
case AARCH64_RELOC_TYPE_ABS:
return sym_base_addr + addend;
case AARCH64_RELOC_TYPE_PREL:
return sym_base_addr + addend - loc;
case AARCH64_RELOC_TYPE_PAGE:
return AARCH64_PAGE(sym_base_addr + addend) - AARCH64_PAGE(loc);
case AARCH64_RELOC_TYPE_NONE:
return 0;
}
CODE_UNREACHABLE;
}
/**
* @brief Handler for static data relocations.
*
* @param[in] rel Relocation data provided by ELF
* @param[in] reloc_type Type of relocation operation.
* @param[in] loc Address of an opcode to rewrite (P in AArch64 ELF).
* @param[in] sym_base_addr Address of the symbol referenced by relocation (S in AArch64 ELF).
*
* @retval -ERANGE Relocation value overflow
* @retval 0 Successful relocation
*/
static int data_reloc_handler(elf_rela_t *rel, elf_word reloc_type, uintptr_t loc,
uintptr_t sym_base_addr)
{
int64_t x;
switch (reloc_type) {
case R_AARCH64_ABS64:
*(int64_t *)loc = reloc(AARCH64_RELOC_TYPE_ABS, loc, sym_base_addr, rel->r_addend);
break;
case R_AARCH64_ABS32:
x = reloc(AARCH64_RELOC_TYPE_ABS, loc, sym_base_addr, rel->r_addend);
if (x < 0 || x > UINT32_MAX) {
return -ERANGE;
}
*(uint32_t *)loc = (uint32_t)x;
break;
case R_AARCH64_ABS16:
x = reloc(AARCH64_RELOC_TYPE_ABS, loc, sym_base_addr, rel->r_addend);
if (x < 0 || x > UINT16_MAX) {
return -ERANGE;
}
*(uint16_t *)loc = (uint16_t)x;
break;
case R_AARCH64_PREL64:
*(int64_t *)loc = reloc(AARCH64_RELOC_TYPE_PREL, loc, sym_base_addr, rel->r_addend);
break;
case R_AARCH64_PREL32:
x = reloc(AARCH64_RELOC_TYPE_PREL, loc, sym_base_addr, rel->r_addend);
if (x < INT32_MIN || x > INT32_MAX) {
return -ERANGE;
}
*(int32_t *)loc = (int32_t)x;
break;
case R_AARCH64_PREL16:
x = reloc(AARCH64_RELOC_TYPE_PREL, loc, sym_base_addr, rel->r_addend);
if (x < INT16_MIN || x > INT16_MAX) {
return -ERANGE;
}
*(int16_t *)loc = (int16_t)x;
break;
default:
CODE_UNREACHABLE;
}
return 0;
}
/**
* @brief Handler for relocations using MOV* instructions.
*
* @param[in] rel Relocation data provided by ELF
* @param[in] reloc_type Type of relocation operation.
* @param[in] loc Address of an opcode to rewrite (P in AArch64 ELF).
* @param[in] sym_base_addr Address of the symbol referenced by relocation (S in AArch64 ELF).
*
* @retval -ERANGE Relocation value overflow
* @retval 0 Successful relocation
*/
static int movw_reloc_handler(elf_rela_t *rel, elf_word reloc_type, uintptr_t loc,
uintptr_t sym_base_addr)
{
int64_t x;
uint32_t imm;
int lsb = 0; /* LSB of X to be used */
bool is_movnz = false;
enum aarch64_reloc_type type = AARCH64_RELOC_TYPE_ABS;
uint32_t opcode = sys_le32_to_cpu(*(uint32_t *)loc);
switch (reloc_type) {
case R_AARCH64_MOVW_SABS_G0:
is_movnz = true;
case R_AARCH64_MOVW_UABS_G0_NC:
case R_AARCH64_MOVW_UABS_G0:
break;
case R_AARCH64_MOVW_SABS_G1:
is_movnz = true;
case R_AARCH64_MOVW_UABS_G1_NC:
case R_AARCH64_MOVW_UABS_G1:
lsb = 16;
break;
case R_AARCH64_MOVW_SABS_G2:
is_movnz = true;
case R_AARCH64_MOVW_UABS_G2_NC:
case R_AARCH64_MOVW_UABS_G2:
lsb = 32;
break;
case R_AARCH64_MOVW_UABS_G3:
lsb = 48;
break;
case R_AARCH64_MOVW_PREL_G0:
is_movnz = true;
case R_AARCH64_MOVW_PREL_G0_NC:
type = AARCH64_RELOC_TYPE_PREL;
break;
case R_AARCH64_MOVW_PREL_G1:
is_movnz = true;
case R_AARCH64_MOVW_PREL_G1_NC:
type = AARCH64_RELOC_TYPE_PREL;
lsb = 16;
break;
case R_AARCH64_MOVW_PREL_G2:
is_movnz = true;
case R_AARCH64_MOVW_PREL_G2_NC:
type = AARCH64_RELOC_TYPE_PREL;
lsb = 32;
break;
case R_AARCH64_MOVW_PREL_G3:
is_movnz = true;
type = AARCH64_RELOC_TYPE_PREL;
lsb = 48;
break;
default:
CODE_UNREACHABLE;
}
x = reloc(type, loc, sym_base_addr, rel->r_addend);
imm = x >> lsb;
/* Manipulate opcode for signed relocations. Result depends on sign of immediate value. */
if (is_movnz) {
opcode &= ~(AARCH64_MASK_MOV_OPCODE << AARCH64_SHIFT_MOV_OPCODE);
if (x >= 0) {
opcode |= (AARCH64_OPCODE_MOVN << AARCH64_SHIFT_MOV_OPCODE);
} else {
opcode |= (AARCH64_OPCODE_MOVZ << AARCH64_SHIFT_MOV_OPCODE);
/* Need to invert immediate value for MOVZ. */
imm = ~imm;
}
}
opcode &= ~(AARCH64_MASK_IMM16 << AARCH64_SHIFT_MOV_IMM16);
opcode |= (imm & AARCH64_MASK_IMM16) << AARCH64_SHIFT_MOV_IMM16;
*(uint32_t *)loc = sys_cpu_to_le32(opcode);
if (imm > UINT16_MAX) {
return -ERANGE;
}
return 0;
}
/**
* @brief Handler for static relocations except these related to MOV* instructions.
*
* @param[in] rel Relocation data provided by ELF
* @param[in] reloc_type Type of relocation operation.
* @param[in] loc Address of an opcode to rewrite (P in AArch64 ELF).
* @param[in] sym_base_addr Address of the symbol referenced by relocation (S in AArch64 ELF).
*
* @retval -ERANGE Relocation value overflow
* @retval 0 Successful relocation
*/
static int imm_reloc_handler(elf_rela_t *rel, elf_word reloc_type, uintptr_t loc,
uintptr_t sym_base_addr)
{
int lsb = 2; /* LSB of X to be used */
int len; /* bit length of immediate value */
int shift = 10; /* shift of the immediate in instruction encoding */
uint64_t imm;
uint32_t bitmask = AARCH64_MASK_IMM12;
int64_t x;
bool is_adr = false;
enum aarch64_reloc_type type = AARCH64_RELOC_TYPE_ABS;
uint32_t opcode = sys_le32_to_cpu(*(uint32_t *)loc);
switch (reloc_type) {
case R_AARCH64_ADD_ABS_LO12_NC:
case R_AARCH64_LDST8_ABS_LO12_NC:
lsb = 0;
len = 12;
break;
case R_AARCH64_LDST16_ABS_LO12_NC:
lsb = 1;
len = 11;
break;
case R_AARCH64_LDST32_ABS_LO12_NC:
len = 10;
break;
case R_AARCH64_LDST64_ABS_LO12_NC:
lsb = 3;
len = 9;
break;
case R_AARCH64_LDST128_ABS_LO12_NC:
lsb = 4;
len = 8;
break;
case R_AARCH64_LD_PREL_LO19:
case R_AARCH64_CONDBR19:
type = AARCH64_RELOC_TYPE_PREL;
bitmask = AARCH64_MASK_IMM19;
shift = 5;
len = 19;
break;
case R_AARCH64_ADR_PREL_LO21:
type = AARCH64_RELOC_TYPE_PREL;
is_adr = true;
lsb = 0;
len = 21;
break;
case R_AARCH64_TSTBR14:
type = AARCH64_RELOC_TYPE_PREL;
bitmask = AARCH64_MASK_IMM14;
shift = 5;
len = 14;
break;
case R_AARCH64_ADR_PREL_PG_HI21_NC:
case R_AARCH64_ADR_PREL_PG_HI21:
type = AARCH64_RELOC_TYPE_PAGE;
is_adr = true;
lsb = 12;
len = 21;
break;
case R_AARCH64_CALL26:
case R_AARCH64_JUMP26:
type = AARCH64_RELOC_TYPE_PREL;
bitmask = AARCH64_MASK_IMM26;
shift = 0;
len = 26;
break;
default:
CODE_UNREACHABLE;
}
x = reloc(type, loc, sym_base_addr, rel->r_addend);
x >>= lsb;
imm = x & BIT_MASK(len);
/* ADR instruction has immediate value split into two fields. */
if (is_adr) {
uint32_t immlo, immhi;
immlo = (imm & AARCH64_MASK_ADR_IMMLO) << AARCH64_SHIFT_ADR_IMMLO;
imm >>= AARCH64_ADR_IMMLO_BITS;
immhi = (imm & AARCH64_MASK_ADR_IMMHI) << AARCH64_SHIFT_ADR_IMMHI;
imm = immlo | immhi;
shift = 0;
bitmask = ((AARCH64_MASK_ADR_IMMLO << AARCH64_SHIFT_ADR_IMMLO) |
(AARCH64_MASK_ADR_IMMHI << AARCH64_SHIFT_ADR_IMMHI));
}
opcode &= ~(bitmask << shift);
opcode |= (imm & bitmask) << shift;
*(uint32_t *)loc = sys_cpu_to_le32(opcode);
/* Mask X sign bit and upper bits. */
x = (int64_t)(x & ~BIT_MASK(len - 1)) >> (len - 1);
/* Incrementing X will either overflow and set it to 0 or
* set it 1. Any other case indicates that there was an overflow in relocation.
*/
if ((int64_t)x++ > 1) {
return -ERANGE;
}
return 0;
}
/**
* @brief Architecture specific function for relocating partially linked (static) elf
*
* Elf files contain a series of relocations described in a section. These relocation
* instructions are architecture specific and each architecture supporting extensions
* must implement this.
*
* The relocation codes for arm64 are well documented
* https://github.com/ARM-software/abi-aa/blob/main/aaelf64/aaelf64.rst#relocation
*
* @param[in] rel Relocation data provided by ELF
* @param[in] loc Address of an opcode to rewrite (P in AArch64 ELF)
* @param[in] sym_base_addr Address of the symbol referenced by relocation (S in AArch64 ELF)
* @param[in] sym_name Name of symbol referenced by relocation
* @param[in] load_bias `.text` load address
* @retval 0 Success
* @retval -ENOTSUP Unsupported relocation
* @retval -ENOEXEC Invalid relocation
*/
int arch_elf_relocate(elf_rela_t *rel, uintptr_t loc, uintptr_t sym_base_addr, const char *sym_name,
uintptr_t load_bias)
{
int ret = 0;
bool overflow_check = true;
elf_word reloc_type = ELF_R_TYPE(rel->r_info);
switch (reloc_type) {
case R_ARM_NONE:
case R_AARCH64_NONE:
overflow_check = false;
break;
case R_AARCH64_ABS64:
case R_AARCH64_PREL64:
overflow_check = false;
case R_AARCH64_ABS16:
case R_AARCH64_ABS32:
case R_AARCH64_PREL16:
case R_AARCH64_PREL32:
ret = data_reloc_handler(rel, reloc_type, loc, sym_base_addr);
break;
case R_AARCH64_MOVW_UABS_G0_NC:
case R_AARCH64_MOVW_UABS_G1_NC:
case R_AARCH64_MOVW_UABS_G2_NC:
case R_AARCH64_MOVW_UABS_G3:
case R_AARCH64_MOVW_PREL_G0_NC:
case R_AARCH64_MOVW_PREL_G1_NC:
case R_AARCH64_MOVW_PREL_G2_NC:
case R_AARCH64_MOVW_PREL_G3:
overflow_check = false;
case R_AARCH64_MOVW_UABS_G0:
case R_AARCH64_MOVW_UABS_G1:
case R_AARCH64_MOVW_UABS_G2:
case R_AARCH64_MOVW_SABS_G0:
case R_AARCH64_MOVW_SABS_G1:
case R_AARCH64_MOVW_SABS_G2:
case R_AARCH64_MOVW_PREL_G0:
case R_AARCH64_MOVW_PREL_G1:
case R_AARCH64_MOVW_PREL_G2:
ret = movw_reloc_handler(rel, reloc_type, loc, sym_base_addr);
break;
case R_AARCH64_ADD_ABS_LO12_NC:
case R_AARCH64_LDST8_ABS_LO12_NC:
case R_AARCH64_LDST16_ABS_LO12_NC:
case R_AARCH64_LDST32_ABS_LO12_NC:
case R_AARCH64_LDST64_ABS_LO12_NC:
case R_AARCH64_LDST128_ABS_LO12_NC:
overflow_check = false;
case R_AARCH64_LD_PREL_LO19:
case R_AARCH64_ADR_PREL_LO21:
case R_AARCH64_TSTBR14:
case R_AARCH64_CONDBR19:
ret = imm_reloc_handler(rel, reloc_type, loc, sym_base_addr);
break;
case R_AARCH64_ADR_PREL_PG_HI21_NC:
overflow_check = false;
case R_AARCH64_ADR_PREL_PG_HI21:
ret = imm_reloc_handler(rel, reloc_type, loc, sym_base_addr);
break;
case R_AARCH64_CALL26:
case R_AARCH64_JUMP26:
ret = imm_reloc_handler(rel, reloc_type, loc, sym_base_addr);
/* TODO Handle case when address exceeds +/- 128MB */
break;
default:
LOG_ERR("unknown relocation: %llu\n", reloc_type);
return -ENOEXEC;
}
if (overflow_check && ret == -ERANGE) {
LOG_ERR("sym '%s': relocation out of range (%#lx -> %#lx)\n", sym_name, loc,
sym_base_addr);
return -ENOEXEC;
}
return 0;
}

View File

@@ -21,8 +21,6 @@
#include <zephyr/sys/poweroff.h>
#include <kernel_arch_func.h>
#include "paging.h"
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_ARM64_SAFE_EXCEPTION_STACK
@@ -196,13 +194,9 @@ static void esf_dump(const struct arch_esf *esf)
LOG_ERR("x16: 0x%016llx x17: 0x%016llx", esf->x16, esf->x17);
LOG_ERR("x18: 0x%016llx lr: 0x%016llx", esf->x18, esf->lr);
}
#endif /* CONFIG_EXCEPTION_DEBUG */
#ifdef CONFIG_ARCH_STACKWALK
typedef bool (*arm64_stacktrace_cb)(void *cookie, unsigned long addr, void *fp);
static void walk_stackframe(arm64_stacktrace_cb cb, void *cookie, const struct arch_esf *esf,
int max_frames)
#ifdef CONFIG_EXCEPTION_STACK_TRACE
static void esf_unwind(const struct arch_esf *esf)
{
/*
* For GCC:
@@ -224,61 +218,30 @@ static void walk_stackframe(arm64_stacktrace_cb cb, void *cookie, const struct a
* + +-----------------+
*/
uint64_t *fp;
uint64_t *fp = (uint64_t *) esf->fp;
unsigned int count = 0;
uint64_t lr;
if (esf != NULL) {
fp = (uint64_t *) esf->fp;
} else {
return;
}
for (int i = 0; (fp != NULL) && (i < max_frames); i++) {
LOG_ERR("");
for (int i = 0; (fp != NULL) && (i < CONFIG_EXCEPTION_STACK_TRACE_MAX_FRAMES); i++) {
lr = fp[1];
if (!cb(cookie, lr, fp)) {
break;
}
#ifdef CONFIG_SYMTAB
uint32_t offset = 0;
const char *name = symtab_find_symbol_name(lr, &offset);
LOG_ERR("backtrace %2d: fp: 0x%016llx lr: 0x%016llx [%s+0x%x]",
count++, (uint64_t) fp, lr, name, offset);
#else
LOG_ERR("backtrace %2d: fp: 0x%016llx lr: 0x%016llx",
count++, (uint64_t) fp, lr);
#endif
fp = (uint64_t *) fp[0];
}
}
void arch_stack_walk(stack_trace_callback_fn callback_fn, void *cookie,
const struct k_thread *thread, const struct arch_esf *esf)
{
ARG_UNUSED(thread);
walk_stackframe((arm64_stacktrace_cb)callback_fn, cookie, esf,
CONFIG_ARCH_STACKWALK_MAX_FRAMES);
}
#endif /* CONFIG_ARCH_STACKWALK */
#ifdef CONFIG_EXCEPTION_STACK_TRACE
static bool print_trace_address(void *arg, unsigned long lr, void *fp)
{
int *i = arg;
#ifdef CONFIG_SYMTAB
uint32_t offset = 0;
const char *name = symtab_find_symbol_name(lr, &offset);
LOG_ERR(" %d: fp: 0x%016llx lr: 0x%016lx [%s+0x%x]", (*i)++, (uint64_t)fp, lr, name,
offset);
#else
LOG_ERR(" %d: fp: 0x%016llx lr: 0x%016lx", (*i)++, (uint64_t)fp, lr);
#endif /* CONFIG_SYMTAB */
return true;
}
static void esf_unwind(const struct arch_esf *esf)
{
int i = 0;
LOG_ERR("");
LOG_ERR("call trace:");
walk_stackframe(print_trace_address, &i, esf, CONFIG_ARCH_STACKWALK_MAX_FRAMES);
LOG_ERR("");
}
#endif /* CONFIG_EXCEPTION_STACK_TRACE */
#endif
#endif /* CONFIG_EXCEPTION_DEBUG */
#ifdef CONFIG_ARM64_STACK_PROTECTION
static bool z_arm64_stack_corruption_check(struct arch_esf *esf, uint64_t esr, uint64_t far)
@@ -324,9 +287,8 @@ static bool z_arm64_stack_corruption_check(struct arch_esf *esf, uint64_t esr, u
static bool is_recoverable(struct arch_esf *esf, uint64_t esr, uint64_t far,
uint64_t elr)
{
if (!esf) {
if (!esf)
return false;
}
#ifdef CONFIG_USERSPACE
for (int i = 0; i < ARRAY_SIZE(exceptions); i++) {
@@ -375,12 +337,6 @@ void z_arm64_fatal_error(unsigned int reason, struct arch_esf *esf)
}
#endif
if (IS_ENABLED(CONFIG_DEMAND_PAGING) &&
reason != K_ERR_STACK_CHK_FAIL &&
z_arm64_do_demand_paging(esf, esr, far)) {
return;
}
if (GET_EL(el) != MODE_EL0) {
#ifdef CONFIG_EXCEPTION_DEBUG
bool dump_far = false;
@@ -389,9 +345,8 @@ void z_arm64_fatal_error(unsigned int reason, struct arch_esf *esf)
dump_esr(esr, &dump_far);
if (dump_far) {
if (dump_far)
LOG_ERR("FAR_ELn: 0x%016llx", far);
}
LOG_ERR("TPIDRRO: 0x%016llx", read_tpidrro_el0());
#endif /* CONFIG_EXCEPTION_DEBUG */

View File

@@ -23,7 +23,3 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
: [svid] "i" (_SVC_CALL_IRQ_OFFLOAD),
"r" (x0), "r" (x1));
}
void arch_irq_offload_init(void)
{
}

View File

@@ -11,7 +11,6 @@
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <zephyr/kernel/mm/demand_paging.h>
#include <kernel_arch_func.h>
#include <kernel_arch_interface.h>
#include <kernel_internal.h>
@@ -22,10 +21,8 @@
#include <zephyr/linker/linker-defs.h>
#include <zephyr/spinlock.h>
#include <zephyr/sys/util.h>
#include <mmu.h>
#include "mmu.h"
#include "paging.h"
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
@@ -142,12 +139,6 @@ int arm64_mmu_tables_total_usage(void)
static inline bool is_free_desc(uint64_t desc)
{
return desc == 0;
}
static inline bool is_inval_desc(uint64_t desc)
{
/* invalid descriptors aren't necessarily free */
return (desc & PTE_DESC_TYPE_MASK) == PTE_INVALID_DESC;
}
@@ -212,10 +203,8 @@ static void debug_show_pte(uint64_t *pte, unsigned int level)
if (is_block_desc(*pte)) {
MMU_DEBUG("[Block] ");
} else if (!is_inval_desc(*pte)) {
MMU_DEBUG("[Page] ");
} else {
MMU_DEBUG("[paged-out] ");
MMU_DEBUG("[Page] ");
}
uint8_t mem_type = (*pte >> 2) & MT_TYPE_MASK;
@@ -227,7 +216,6 @@ static void debug_show_pte(uint64_t *pte, unsigned int level)
MMU_DEBUG((*pte & PTE_BLOCK_DESC_AP_ELx) ? "-ELx" : "-ELh");
MMU_DEBUG((*pte & PTE_BLOCK_DESC_PXN) ? "-PXN" : "-PX");
MMU_DEBUG((*pte & PTE_BLOCK_DESC_UXN) ? "-UXN" : "-UX");
MMU_DEBUG((*pte & PTE_SW_WRITABLE) ? "-WRITABLE" : "");
MMU_DEBUG("\n");
}
#else
@@ -243,15 +231,8 @@ static void set_pte_table_desc(uint64_t *pte, uint64_t *table, unsigned int leve
static void set_pte_block_desc(uint64_t *pte, uint64_t desc, unsigned int level)
{
if (level != XLAT_LAST_LEVEL) {
desc |= PTE_BLOCK_DESC;
} else if (!IS_ENABLED(CONFIG_DEMAND_PAGING) || (desc & PTE_BLOCK_DESC_AF) != 0) {
desc |= PTE_PAGE_DESC;
} else {
/*
* Demand paging configured and AF unset: leave the descriptor
* type to "invalid" as in arch_mem_page_out().
*/
if (desc) {
desc |= (level == XLAT_LAST_LEVEL) ? PTE_PAGE_DESC : PTE_BLOCK_DESC;
}
*pte = desc;
debug_show_pte(pte, level);
@@ -392,11 +373,6 @@ static void del_mapping(uint64_t *table, uintptr_t virt, size_t size,
continue;
}
if (step != level_size && is_block_desc(*pte)) {
/* need to split this block mapping */
expand_to_table(pte, level);
}
if (is_table_desc(*pte, level)) {
subtable = pte_desc_table(*pte);
del_mapping(subtable, virt, step, level + 1);
@@ -404,6 +380,12 @@ static void del_mapping(uint64_t *table, uintptr_t virt, size_t size,
continue;
}
dec_table_ref(subtable);
} else {
/*
* We assume that block mappings will be unmapped
* as a whole and not partially.
*/
__ASSERT(step == level_size, "");
}
/* free this entry */
@@ -675,8 +657,6 @@ static uint64_t get_region_desc(uint32_t attrs)
/* AP bits for Data access permission */
desc |= (attrs & MT_RW) ? PTE_BLOCK_DESC_AP_RW : PTE_BLOCK_DESC_AP_RO;
desc |= (IS_ENABLED(CONFIG_DEMAND_PAGING) && (attrs & MT_RW)) ?
PTE_SW_WRITABLE : 0;
/* Mirror permissions to EL0 */
desc |= (attrs & MT_RW_AP_ELx) ?
@@ -684,11 +664,6 @@ static uint64_t get_region_desc(uint32_t attrs)
/* the access flag */
desc |= PTE_BLOCK_DESC_AF;
if (IS_ENABLED(CONFIG_DEMAND_PAGING) && (attrs & MT_PAGED_OUT) != 0) {
/* set it up for demand paging like arch_mem_page_out() */
desc &= ~PTE_BLOCK_DESC_AF;
desc |= PTE_BLOCK_DESC_AP_RO;
}
/* memory attribute index field */
mem_type = MT_TYPE(attrs);
@@ -711,20 +686,17 @@ static uint64_t get_region_desc(uint32_t attrs)
case MT_NORMAL_NC:
case MT_NORMAL:
/* Make Normal RW memory as execute never */
if ((attrs & MT_RW) || (attrs & MT_P_EXECUTE_NEVER)) {
if ((attrs & MT_RW) || (attrs & MT_P_EXECUTE_NEVER))
desc |= PTE_BLOCK_DESC_PXN;
}
if (((attrs & MT_RW) && (attrs & MT_RW_AP_ELx)) ||
(attrs & MT_U_EXECUTE_NEVER)) {
(attrs & MT_U_EXECUTE_NEVER))
desc |= PTE_BLOCK_DESC_UXN;
}
if (mem_type == MT_NORMAL) {
if (mem_type == MT_NORMAL)
desc |= PTE_BLOCK_DESC_INNER_SHARE;
} else {
else
desc |= PTE_BLOCK_DESC_OUTER_SHARE;
}
}
/* non-Global bit */
@@ -783,12 +755,6 @@ static void invalidate_tlb_all(void)
: : : "memory");
}
static inline void invalidate_tlb_page(uintptr_t virt)
{
/* to be refined */
invalidate_tlb_all();
}
/* zephyr execution regions with appropriate attributes */
struct arm_mmu_flat_range {
@@ -878,9 +844,8 @@ static void setup_page_tables(struct arm_mmu_ptables *ptables)
uintptr_t max_va = 0, max_pa = 0;
MMU_DEBUG("xlat tables:\n");
for (index = 0U; index < CONFIG_MAX_XLAT_TABLES; index++) {
for (index = 0U; index < CONFIG_MAX_XLAT_TABLES; index++)
MMU_DEBUG("%d: %p\n", index, xlat_tables + index * Ln_XLAT_NUM_ENTRIES);
}
for (index = 0U; index < mmu_config.num_regions; index++) {
region = &mmu_config.mmu_regions[index];
@@ -1102,10 +1067,6 @@ static int __arch_mem_map(void *virt, uintptr_t phys, size_t size, uint32_t flag
entry_flags |= MT_RW_AP_ELx;
}
if (IS_ENABLED(CONFIG_DEMAND_PAGING) && (flags & K_MEM_MAP_UNPAGED) != 0) {
entry_flags |= MT_PAGED_OUT;
}
return add_map(ptables, "generic", phys, (uintptr_t)virt, size, entry_flags);
}
@@ -1368,9 +1329,8 @@ void z_arm64_thread_mem_domains_init(struct k_thread *incoming)
{
struct arm_mmu_ptables *ptables;
if ((incoming->base.user_options & K_USER) == 0) {
if ((incoming->base.user_options & K_USER) == 0)
return;
}
ptables = incoming->arch.ptables;
@@ -1386,311 +1346,3 @@ void z_arm64_swap_mem_domains(struct k_thread *incoming)
}
#endif /* CONFIG_USERSPACE */
#ifdef CONFIG_DEMAND_PAGING
static uint64_t *get_pte_location(struct arm_mmu_ptables *ptables,
uintptr_t virt)
{
uint64_t *pte;
uint64_t *table = ptables->base_xlat_table;
unsigned int level = BASE_XLAT_LEVEL;
for (;;) {
pte = &table[XLAT_TABLE_VA_IDX(virt, level)];
if (level == XLAT_LAST_LEVEL) {
return pte;
}
if (is_table_desc(*pte, level)) {
level++;
table = pte_desc_table(*pte);
continue;
}
/* anything else is unexpected */
return NULL;
}
}
void arch_mem_page_out(void *addr, uintptr_t location)
{
uintptr_t virt = (uintptr_t)addr;
uint64_t *pte = get_pte_location(&kernel_ptables, virt);
uint64_t desc;
__ASSERT(pte != NULL, "");
desc = *pte;
/* mark the entry invalid to the hardware */
desc &= ~PTE_DESC_TYPE_MASK;
desc |= PTE_INVALID_DESC;
/* store the location token in place of the physical address */
__ASSERT((location & ~PTE_PHYSADDR_MASK) == 0, "");
desc &= ~PTE_PHYSADDR_MASK;
desc |= location;
/*
* The location token may be 0. Make sure the whole descriptor
* doesn't end up being zero as this would be seen as a free entry.
*/
desc |= PTE_BLOCK_DESC_AP_RO;
*pte = desc;
MMU_DEBUG("page_out: virt=%#lx location=%#lx\n", virt, location);
debug_show_pte(pte, XLAT_LAST_LEVEL);
sync_domains(virt, CONFIG_MMU_PAGE_SIZE, "page_out");
invalidate_tlb_page(virt);
}
void arch_mem_page_in(void *addr, uintptr_t phys)
{
uintptr_t virt = (uintptr_t)addr;
uint64_t *pte = get_pte_location(&kernel_ptables, virt);
uint64_t desc;
__ASSERT((phys & ~PTE_PHYSADDR_MASK) == 0, "");
__ASSERT(pte != NULL, "");
desc = *pte;
__ASSERT(!is_free_desc(desc), "");
/* mark the entry valid again to the hardware */
desc &= ~PTE_DESC_TYPE_MASK;
desc |= PTE_PAGE_DESC;
/* store the physical address */
desc &= ~PTE_PHYSADDR_MASK;
desc |= phys;
/* mark as clean */
desc |= PTE_BLOCK_DESC_AP_RO;
/* and make it initially unaccessible to track unaccessed pages */
desc &= ~PTE_BLOCK_DESC_AF;
*pte = desc;
MMU_DEBUG("page_in: virt=%#lx phys=%#lx\n", virt, phys);
debug_show_pte(pte, XLAT_LAST_LEVEL);
sync_domains(virt, CONFIG_MMU_PAGE_SIZE, "page_in");
invalidate_tlb_page(virt);
}
enum arch_page_location arch_page_location_get(void *addr, uintptr_t *location)
{
uintptr_t virt = (uintptr_t)addr;
uint64_t *pte = get_pte_location(&kernel_ptables, virt);
uint64_t desc;
enum arch_page_location status;
if (!pte) {
return ARCH_PAGE_LOCATION_BAD;
}
desc = *pte;
if (is_free_desc(desc)) {
return ARCH_PAGE_LOCATION_BAD;
}
switch (desc & PTE_DESC_TYPE_MASK) {
case PTE_PAGE_DESC:
status = ARCH_PAGE_LOCATION_PAGED_IN;
break;
case PTE_INVALID_DESC:
status = ARCH_PAGE_LOCATION_PAGED_OUT;
break;
default:
return ARCH_PAGE_LOCATION_BAD;
}
*location = desc & PTE_PHYSADDR_MASK;
return status;
}
uintptr_t arch_page_info_get(void *addr, uintptr_t *phys, bool clear_accessed)
{
uintptr_t virt = (uintptr_t)addr;
uint64_t *pte = get_pte_location(&kernel_ptables, virt);
uint64_t desc;
uintptr_t status = 0;
if (!pte) {
return ARCH_DATA_PAGE_NOT_MAPPED;
}
desc = *pte;
if (is_free_desc(desc)) {
return ARCH_DATA_PAGE_NOT_MAPPED;
}
switch (desc & PTE_DESC_TYPE_MASK) {
case PTE_PAGE_DESC:
status |= ARCH_DATA_PAGE_LOADED;
break;
case PTE_INVALID_DESC:
/* page not loaded */
break;
default:
return ARCH_DATA_PAGE_NOT_MAPPED;
}
if (phys) {
*phys = desc & PTE_PHYSADDR_MASK;
}
if ((status & ARCH_DATA_PAGE_LOADED) == 0) {
return status;
}
if ((desc & PTE_BLOCK_DESC_AF) != 0) {
status |= ARCH_DATA_PAGE_ACCESSED;
}
if ((desc & PTE_BLOCK_DESC_AP_RO) == 0) {
status |= ARCH_DATA_PAGE_DIRTY;
}
if (clear_accessed) {
desc &= ~PTE_BLOCK_DESC_AF;
*pte = desc;
MMU_DEBUG("page_info: virt=%#lx (clearing AF)\n", virt);
debug_show_pte(pte, XLAT_LAST_LEVEL);
sync_domains(virt, CONFIG_MMU_PAGE_SIZE, "unaccessible");
invalidate_tlb_page(virt);
}
return status;
}
#define MT_SCRATCH (MT_NORMAL | MT_P_RW_U_NA | MT_DEFAULT_SECURE_STATE)
void arch_mem_scratch(uintptr_t phys)
{
uintptr_t virt = (uintptr_t)K_MEM_SCRATCH_PAGE;
size_t size = CONFIG_MMU_PAGE_SIZE;
int ret = add_map(&kernel_ptables, "scratch", phys, virt, size, MT_SCRATCH);
if (ret) {
LOG_ERR("add_map() returned %d", ret);
} else {
sync_domains(virt, size, "scratch");
invalidate_tlb_page(virt);
}
}
static bool do_mem_page_fault(struct arch_esf *esf, uintptr_t virt)
{
/*
* The k_mem_page_fault() code expects to be called with IRQs enabled
* if the fault happened in a context where IRQs were enabled.
*/
if (arch_irq_unlocked(esf->spsr)) {
enable_irq();
}
bool ok = k_mem_page_fault((void *)virt);
disable_irq();
return ok;
}
/* Called from the fault handler. Returns true if the fault is resolved. */
bool z_arm64_do_demand_paging(struct arch_esf *esf, uint64_t esr, uint64_t far)
{
uintptr_t virt = far;
uint64_t *pte, desc;
uintptr_t phys;
/* filter relevant exceptions */
switch (GET_ESR_EC(esr)) {
case 0x21: /* insn abort from current EL */
case 0x25: /* data abort from current EL */
break;
default:
return false;
}
/* make sure the fault happened in the expected range */
if (!IN_RANGE(virt,
(uintptr_t)K_MEM_VIRT_RAM_START,
((uintptr_t)K_MEM_VIRT_RAM_END - 1))) {
return false;
}
virt = ROUND_DOWN(virt, CONFIG_MMU_PAGE_SIZE);
pte = get_pte_location(&kernel_ptables, virt);
if (!pte) {
/* page mapping doesn't exist, let the core code do its thing */
return do_mem_page_fault(esf, virt);
}
desc = *pte;
if ((desc & PTE_DESC_TYPE_MASK) != PTE_PAGE_DESC) {
/* page is not loaded/mapped */
return do_mem_page_fault(esf, virt);
}
/*
* From this point, we expect only 2 cases:
*
* 1) the Access Flag was not set so we set it marking the page
* as accessed;
*
* 2) the page was read-only and a write occurred so we clear the
* RO flag marking the page dirty.
*
* We bail out on anything else.
*
* Fault status codes for Data aborts (DFSC):
* 0b0010LL Access flag fault
* 0b0011LL Permission fault
*/
uint32_t dfsc = GET_ESR_ISS(esr) & GENMASK(5, 0);
bool write = (GET_ESR_ISS(esr) & BIT(6)) != 0; /* WnR */
if (dfsc == (0b001000 | XLAT_LAST_LEVEL) &&
(desc & PTE_BLOCK_DESC_AF) == 0) {
/* page is being accessed: set the access flag */
desc |= PTE_BLOCK_DESC_AF;
if (write) {
if ((desc & PTE_SW_WRITABLE) == 0) {
/* we don't actually have write permission */
return false;
}
/*
* Let's avoid another fault immediately after
* returning by making the page read-write right away
* effectively marking it "dirty" as well.
*/
desc &= ~PTE_BLOCK_DESC_AP_RO;
}
*pte = desc;
sync_domains(virt, CONFIG_MMU_PAGE_SIZE, "accessed");
/* no TLB inval needed after setting AF */
/* tell the eviction algorithm about it */
phys = desc & PTE_PHYSADDR_MASK;
k_mem_paging_eviction_accessed(phys);
return true;
}
if (dfsc == (0b001100 | XLAT_LAST_LEVEL) && write &&
(desc & PTE_BLOCK_DESC_AP_RO) != 0 &&
(desc & PTE_SW_WRITABLE) != 0) {
/* make it "dirty" i.e. read-write */
desc &= ~PTE_BLOCK_DESC_AP_RO;
*pte = desc;
sync_domains(virt, CONFIG_MMU_PAGE_SIZE, "dirtied");
invalidate_tlb_page(virt);
/* this also counts as an access refresh */
phys = desc & PTE_PHYSADDR_MASK;
k_mem_paging_eviction_accessed(phys);
return true;
}
return false;
}
#endif /* CONFIG_DEMAND_PAGING */

View File

@@ -126,14 +126,6 @@
*/
#define PTE_PHYSADDR_MASK GENMASK64(47, PAGE_SIZE_SHIFT)
/*
* Descriptor bits 58 to 55 are defined as "Reserved for Software Use".
*
* When using demand paging, RW memory is marked RO to trap the first write
* for dirty page tracking. Bit 55 indicates if memory is actually writable.
*/
#define PTE_SW_WRITABLE (1ULL << 55)
/*
* TCR definitions.
*/

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@@ -1,12 +0,0 @@
/*
* Copyright (c) 2024 BayLibre SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef Z_ARM64_PAGING_H
#define Z_ARM64_PAGING_H
bool z_arm64_do_demand_paging(struct arch_esf *esf, uint64_t esr, uint64_t far);
#endif /* Z_ARM64_PAGING_H */

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@@ -16,8 +16,6 @@
#include <kernel_internal.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
extern void z_arm64_mm_init(bool is_primary_core);
@@ -32,10 +30,6 @@ __weak void z_arm64_mm_init(bool is_primary_core) { }
*/
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
/* Initialize tpidrro_el0 with our struct _cpu instance address */
write_tpidrro_el0((uintptr_t)&_kernel.cpus[0]);
@@ -58,9 +52,6 @@ extern FUNC_NORETURN void arch_secondary_cpu_init(void);
void z_arm64_secondary_prep_c(void)
{
arch_secondary_cpu_init();
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
CODE_UNREACHABLE;
}

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@@ -1,35 +0,0 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/reboot.h>
#include <zephyr/drivers/pm_cpu_ops.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_PM_CPU_OPS_PSCI
void __weak sys_arch_reboot(int type)
{
unsigned char reset_type;
if (type == SYS_REBOOT_COLD) {
reset_type = SYS_COLD_RESET;
} else if (type == SYS_REBOOT_WARM) {
reset_type = SYS_WARM_RESET;
} else {
LOG_ERR("Invalid reboot type");
return;
}
pm_system_reset(reset_type);
}
#else
void __weak sys_arch_reboot(int type)
{
LOG_WRN("%s is not implemented", __func__);
ARG_UNUSED(type);
}
#endif

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@@ -4,5 +4,8 @@
# Needed to separate definitions in common Xen headers
zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:-D__ASSEMBLY__>)
# Xen interface version used in headers for correct definition
zephyr_compile_options(-D__XEN_INTERFACE_VERSION__=0x00040e00)
zephyr_library_sources(hypercall.S)
zephyr_library_sources(enlighten.c)

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@@ -25,11 +25,3 @@ config XEN_DOM0LESS
help
Configures Zephyr as DomU, that can be started on Dom0less
setup.
config XEN_INTERFACE_VERSION
hex "Xen interface version"
default 0x00040e00
depends on XEN
help
Xen interface version to use. This is the version of the
interface that Zephyr will use to communicate with the hypervisor.

View File

@@ -42,7 +42,7 @@ static int xen_map_shared_info(const shared_info_t *shared_page)
return HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp);
}
int xen_enlighten_init(void)
static int xen_enlighten_init(void)
{
int ret = 0;
shared_info_t *info = (shared_info_t *) shared_info_buf;
@@ -66,3 +66,5 @@ int xen_enlighten_init(void)
return 0;
}
SYS_INIT(xen_enlighten_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);

View File

@@ -28,13 +28,8 @@ extern "C" {
#ifndef _ASMLANGUAGE
extern void xen_enlighten_init(void);
static ALWAYS_INLINE void arch_kernel_init(void)
{
#ifdef CONFIG_XEN
xen_enlighten_init();
#endif
}
static inline void arch_switch(void *switch_to, void **switched_from)

View File

@@ -11,12 +11,9 @@
#include <zephyr/sys/__assert.h>
#include <zephyr/sys/util.h>
BUILD_ASSERT(CONFIG_MAX_IRQ_PER_AGGREGATOR < BIT(CONFIG_2ND_LEVEL_INTERRUPT_BITS),
BUILD_ASSERT((CONFIG_NUM_2ND_LEVEL_AGGREGATORS * CONFIG_MAX_IRQ_PER_AGGREGATOR) <=
BIT(CONFIG_2ND_LEVEL_INTERRUPT_BITS),
"L2 bits not enough to cover the number of L2 IRQs");
#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
BUILD_ASSERT(CONFIG_MAX_IRQ_PER_AGGREGATOR < BIT(CONFIG_3RD_LEVEL_INTERRUPT_BITS),
"L3 bits not enough to cover the number of L3 IRQs");
#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */
/**
* @brief Get the aggregator that's responsible for the given irq
@@ -88,8 +85,7 @@ unsigned int z_get_sw_isr_table_idx(unsigned int irq)
table_idx -= CONFIG_GEN_IRQ_START_VECTOR;
__ASSERT(table_idx < IRQ_TABLE_SIZE, "table_idx(%d) < IRQ_TABLE_SIZE(%d)", table_idx,
IRQ_TABLE_SIZE);
__ASSERT_NO_MSG(table_idx < IRQ_TABLE_SIZE);
return table_idx;
}

View File

@@ -9,7 +9,6 @@
SECTION_DATA_PROLOGUE(.ramfunc,,)
{
__ramfunc_region_start = .;
MPU_ALIGN(__ramfunc_size);
__ramfunc_start = .;
*(.ramfunc)

View File

@@ -92,8 +92,8 @@ void z_isr_install(unsigned int irq, void (*routine)(const void *),
for (i = 0; i < shared_entry->client_num; i++) {
client = &shared_entry->clients[i];
__ASSERT((client->isr == routine && client->arg == param) == false,
"ISR/arg combination is already registered");
__ASSERT(client->isr != routine && client->arg != param,
"trying to register duplicate ISR/arg pair");
}
shared_entry->clients[shared_entry->client_num].isr = routine;

View File

@@ -48,7 +48,3 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
irq_unlock(key);
}
void arch_irq_offload_init(void)
{
}

View File

@@ -70,7 +70,6 @@ GTEXT(_Fault)
GTEXT(_k_neg_eagain)
GTEXT(z_thread_mark_switched_in)
GTEXT(z_thread_mark_switched_out)
/* exports */
GTEXT(__isr_vec)
@@ -210,9 +209,6 @@ on_thread_stack:
#endif /* CONFIG_PREEMPT_ENABLED */
reschedule:
#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
jal z_thread_mark_switched_out
#endif
/*
* Check if the current thread is the same as the thread on the ready Q. If
* so, do not reschedule.

View File

@@ -11,8 +11,6 @@
#include <kernel_internal.h>
#include <zephyr/irq.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
static void interrupt_init(void)
{
@@ -46,15 +44,9 @@ static void interrupt_init(void)
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
z_bss_zero();
interrupt_init();
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
z_cstart();
CODE_UNREACHABLE;

View File

@@ -41,7 +41,3 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
irq_unlock(key);
}
void arch_irq_offload_init(void)
{
}

View File

@@ -21,8 +21,6 @@
#include <zephyr/linker/linker-defs.h>
#include <zephyr/kernel_structs.h>
#include <kernel_internal.h>
#include <zephyr/platform/hooks.h>
#include <zephyr/arch/cache.h>
/**
* @brief Prepare to and run C code
@@ -32,10 +30,6 @@
void z_prep_c(void)
{
#if defined(CONFIG_SOC_PREP_HOOK)
soc_prep_hook();
#endif
z_bss_zero();
z_data_copy();
/* In most XIP scenarios we copy the exception code into RAM, so need
@@ -50,9 +44,6 @@ void z_prep_c(void)
*/
z_nios2_dcache_flush_all();
#endif
#endif
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
z_cstart();
CODE_UNREACHABLE;

View File

@@ -14,10 +14,6 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
{
posix_irq_offload(routine, parameter);
}
void arch_irq_offload_init(void)
{
}
#endif
void arch_irq_enable(unsigned int irq)

View File

@@ -57,8 +57,3 @@ int posix_arch_get_unique_thread_id(int thread_idx)
{
return nct_get_unique_thread_id(te_state, thread_idx);
}
int posix_arch_thread_name_set(int thread_idx, const char *str)
{
return nct_thread_name_set(te_state, thread_idx, str);
}

View File

@@ -13,7 +13,6 @@
* architecture
*/
#include <stdio.h>
#include <zephyr/toolchain.h>
#include <zephyr/kernel_structs.h>
#include <ksched.h>
@@ -55,40 +54,6 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
thread_status->thread_idx = posix_new_thread((void *)thread_status);
}
int arch_thread_name_set(struct k_thread *thread, const char *str)
{
#define MAX_HOST_THREAD_NAME 16
int ret;
int thread_index;
posix_thread_status_t *thread_status;
char th_name[MAX_HOST_THREAD_NAME];
thread_status = thread->callee_saved.thread_status;
if (!thread_status) {
return -EAGAIN;
}
thread_index = thread_status->thread_idx;
if (!str) {
return -EAGAIN;
}
snprintf(th_name, MAX_HOST_THREAD_NAME,
#if (CONFIG_NATIVE_SIMULATOR_NUMBER_MCUS > 1)
STRINGIFY(CONFIG_NATIVE_SIMULATOR_MCU_N) ":"
#endif
"%s", str);
ret = posix_arch_thread_name_set(thread_index, th_name);
if (ret) {
return -EAGAIN;
}
return 0;
}
void posix_arch_thread_entry(void *pa_thread_status)
{
posix_thread_status_t *ptr = pa_thread_status;

View File

@@ -47,7 +47,6 @@ void posix_main_thread_start(int next_allowed_thread_nbr);
int posix_new_thread(void *payload);
void posix_abort_thread(int thread_idx);
int posix_arch_get_unique_thread_id(int thread_idx);
int posix_arch_thread_name_set(int thread_idx, const char *str);
#ifndef POSIX_ARCH_DEBUG_PRINTS
#define POSIX_ARCH_DEBUG_PRINTS 0

View File

@@ -37,6 +37,13 @@ config RISCV_ALWAYS_SWITCH_THROUGH_ECALL
and most people should say n here to minimize context switching
overhead.
config RISCV_EXCEPTION_STACK_TRACE
bool
default y
imply THREAD_STACK_INFO
help
Internal config to enable runtime stack traces on fatal exceptions.
menu "RISCV Processor Options"
config INCLUDE_RESET_VECTOR
@@ -238,14 +245,6 @@ config RISCV_HART_MASK
i.e. 128, 129, ..(0x80, 8x81, ..), this can be configured to 63 (0x7f)
such that we can extract the bits that start from 0.
config EXTRA_EXCEPTION_INFO
bool "Collect extra exception info"
depends on EXCEPTION_DEBUG
help
This option enables the collection of extra information, such as
register state, when a fault occurs. This information can be useful
to collect for post-mortem analysis and debug of issues.
config RISCV_PMP
bool "RISC-V PMP Support"
select THREAD_STACK_INFO
@@ -384,14 +383,6 @@ config GEN_IRQ_VECTOR_TABLE
config ARCH_HAS_SINGLE_THREAD_SUPPORT
default y if !SMP
config ARCH_HAS_STACKWALK
bool
default y
imply THREAD_STACK_INFO
help
Internal config to indicate that the arch_stack_walk() API is implemented
and it can be enabled.
rsource "Kconfig.isa"
endmenu

View File

@@ -25,6 +25,5 @@ zephyr_library_sources_ifdef(CONFIG_RISCV_PMP pmp.c pmp.S)
zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c)
zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)
zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c)
zephyr_library_sources_ifdef(CONFIG_ARCH_STACKWALK stacktrace.c)
zephyr_library_sources_ifdef(CONFIG_EXCEPTION_STACK_TRACE stacktrace.c)
zephyr_linker_sources(ROM_START SORT_KEY 0x0vectors vector_table.ld)
zephyr_library_sources_ifdef(CONFIG_LLEXT elf.c)

View File

@@ -5,7 +5,6 @@
*/
#include <string.h>
#include <zephyr/kernel.h>
#include <zephyr/debug/coredump.h>
#ifndef CONFIG_64BIT
@@ -117,21 +116,3 @@ uint16_t arch_coredump_tgt_code_get(void)
{
return COREDUMP_TGT_RISC_V;
}
#if defined(CONFIG_DEBUG_COREDUMP_DUMP_THREAD_PRIV_STACK)
void arch_coredump_priv_stack_dump(struct k_thread *thread)
{
uintptr_t start_addr, end_addr;
/* See: zephyr/include/zephyr/arch/riscv/arch.h */
if (IS_ENABLED(CONFIG_PMP_POWER_OF_TWO_ALIGNMENT)) {
start_addr = thread->arch.priv_stack_start + Z_RISCV_STACK_GUARD_SIZE;
} else {
start_addr = thread->stack_info.start - CONFIG_PRIVILEGED_STACK_SIZE;
}
end_addr = Z_STACK_PTR_ALIGN(thread->arch.priv_stack_start + K_KERNEL_STACK_RESERVED +
CONFIG_PRIVILEGED_STACK_SIZE);
coredump_memory_dump(start_addr, end_addr);
}
#endif /* CONFIG_DEBUG_COREDUMP_DUMP_THREAD_PRIV_STACK */

View File

@@ -1,373 +0,0 @@
/** @file
* @brief Architecture-specific relocations for RISC-V instruction sets.
*/
/*
* Copyright (c) 2024 CISPA Helmholtz Center for Information Security gGmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/llext/elf.h>
#include <zephyr/llext/llext.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/util.h>
#include <zephyr/arch/riscv/elf.h>
#include <stdlib.h>
LOG_MODULE_REGISTER(elf, CONFIG_LLEXT_LOG_LEVEL);
/*
* RISC-V relocations commonly use pairs of U-type and I-type instructions.
* U-type instructions have 20-bit immediates, I-type instructions have 12-bit immediates.
* Immediates in RISC-V are always sign-extended.
* Thereby, this type of relocation can reach any address within a 2^31-1 byte range.
*/
#define RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE INT32_MAX
/* S-type has 12-bit signed immediate */
#define RISCV_MAX_JUMP_DISTANCE_S_TYPE ((1 << 11) - 1)
/* I-type has 12-bit signed immediate also */
#define RISCV_MAX_JUMP_DISTANCE_I_TYPE ((1 << 11) - 1)
/* B-type has 13-bit signed immediate */
#define RISCV_MAX_JUMP_DISTANCE_B_TYPE ((1 << 12) - 1)
/* CB-type has 9-bit signed immediate */
#define RISCV_MAX_JUMP_DISTANCE_CB_TYPE ((1 << 8) - 1)
/* CJ-type has 12-bit signed immediate (last bit implicit 0) */
#define RISCV_MAX_JUMP_DISTANCE_CJ_TYPE ((1 << 11) - 1)
static inline int riscv_relocation_fits(long long jump_target, long long max_distance,
elf_word reloc_type)
{
if (llabs(jump_target) > max_distance) {
LOG_ERR("%lld byte relocation is not possible for type %" PRIu64 " (max %lld)!",
jump_target, (uint64_t)reloc_type, max_distance);
return -ENOEXEC; /* jump too far */
}
return 0;
}
static long long last_u_type_jump_target;
/**
* @brief RISC-V specific function for relocating partially linked ELF binaries
*
* This implementation follows the official RISC-V specification:
* https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
*
*/
int arch_elf_relocate(elf_rela_t *rel, uintptr_t loc_unsigned, uintptr_t sym_base_addr_unsigned,
const char *sym_name, uintptr_t load_bias)
{
/* FIXME currently, RISC-V relocations all fit in ELF_32_R_TYPE */
elf_word reloc_type = ELF32_R_TYPE(rel->r_info);
/*
* The RISC-V specification uses the following symbolic names for the relocations:
*
* A - addend (rel->r_addend)
* B - base address (load_bias)
* G - global offset table (not supported yet)
* P - position of the relocation (loc)
* S - symbol value (sym_base_addr)
* V - value at the relocation position (*loc)
* GP - value of __global_pointer$ (not supported yet)
* TLSMODULE - TLS module for the object (not supported yet)
* TLSOFFSET - TLS static block for the object (not supported yet)
*/
intptr_t loc = (intptr_t)loc_unsigned;
uint8_t *loc8 = (uint8_t *)loc, tmp8;
uint16_t *loc16 = (uint16_t *)loc, tmp16;
uint32_t *loc32 = (uint32_t *)loc, tmp32;
uint64_t *loc64 = (uint64_t *)loc, tmp64;
/* uint32_t or uint64_t */
r_riscv_wordclass_t *loc_word = (r_riscv_wordclass_t *)loc;
uint32_t modified_operand;
uint16_t modified_compressed_operand;
int32_t imm8;
long long original_imm8, jump_target;
int16_t compressed_imm8;
__typeof__(rel->r_addend) target_alignment = 1;
const intptr_t sym_base_addr = (intptr_t)sym_base_addr_unsigned;
LOG_DBG("Relocating symbol %s at %p with base address %p load address %p type %" PRIu64,
sym_name, (void *)loc, (void *)sym_base_addr, (void *)load_bias,
(uint64_t)reloc_type);
/* FIXME not all types of relocations currently supported, especially TLS */
switch (reloc_type) {
case R_RISCV_NONE:
break;
case R_RISCV_32:
jump_target = sym_base_addr + rel->r_addend; /* S + A */
UNALIGNED_PUT((uint32_t)jump_target, loc32);
return riscv_relocation_fits(jump_target, INT32_MAX, reloc_type);
case R_RISCV_64:
/* full 64-bit range, need no range check */
UNALIGNED_PUT(sym_base_addr + rel->r_addend, loc64); /* S + A */
break;
case R_RISCV_RELATIVE:
/* either full 32-bit or 64-bit range, need no range check */
UNALIGNED_PUT(load_bias + rel->r_addend, loc_word); /* B + A */
break;
case R_RISCV_JUMP_SLOT:
/* either full 32-bit or 64-bit range, need no range check */
UNALIGNED_PUT(sym_base_addr, loc_word); /* S */
break;
case R_RISCV_BRANCH:
jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
modified_operand = UNALIGNED_GET(loc32);
imm8 = jump_target;
modified_operand = R_RISCV_CLEAR_BTYPE_IMM8(modified_operand);
modified_operand = R_RISCV_SET_BTYPE_IMM8(modified_operand, imm8);
UNALIGNED_PUT(modified_operand, loc32);
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_B_TYPE,
reloc_type);
case R_RISCV_JAL:
jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
modified_operand = UNALIGNED_GET(loc32);
imm8 = jump_target;
modified_operand = R_RISCV_CLEAR_JTYPE_IMM8(modified_operand);
modified_operand = R_RISCV_SET_JTYPE_IMM8(modified_operand, imm8);
UNALIGNED_PUT(modified_operand, loc32);
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
reloc_type);
case R_RISCV_CALL:
case R_RISCV_CALL_PLT:
case R_RISCV_PCREL_HI20:
modified_operand = UNALIGNED_GET(loc32);
jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
imm8 = jump_target;
/* bit 12 of the immediate goes to I-type instruction and might
* change the sign of the number
*/
/* in order to avoid that, we add 1 to the upper immediate if bit 12 is one */
/* see RISC-V la pseudo instruction */
imm8 += imm8 & 0x800;
original_imm8 = imm8;
modified_operand = R_RISCV_CLEAR_UTYPE_IMM8(modified_operand);
modified_operand = R_RISCV_SET_UTYPE_IMM8(modified_operand, imm8);
UNALIGNED_PUT(modified_operand, loc32);
if (reloc_type != R_RISCV_PCREL_HI20) {
/* PCREL_HI20 is only U-type, not truly U+I-type */
/* for the others, need to also modify following I-type */
loc32++;
imm8 = jump_target;
modified_operand = UNALIGNED_GET(loc32);
modified_operand = R_RISCV_CLEAR_ITYPE_IMM8(modified_operand);
modified_operand = R_RISCV_SET_ITYPE_IMM8(modified_operand, imm8);
UNALIGNED_PUT(modified_operand, loc32);
}
last_u_type_jump_target = jump_target;
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
reloc_type);
case R_RISCV_PCREL_LO12_I:
/* need the same jump target as preceding U-type relocation */
if (last_u_type_jump_target == 0) {
LOG_ERR("R_RISCV_PCREL_LO12_I relocation without preceding U-type "
"relocation!");
return -ENOEXEC;
}
modified_operand = UNALIGNED_GET(loc32);
jump_target = last_u_type_jump_target; /* S - P */
last_u_type_jump_target = 0;
imm8 = jump_target;
modified_operand = R_RISCV_CLEAR_ITYPE_IMM8(modified_operand);
modified_operand = R_RISCV_SET_ITYPE_IMM8(modified_operand, imm8);
UNALIGNED_PUT(modified_operand, loc32);
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
reloc_type);
break;
case R_RISCV_PCREL_LO12_S:
/* need the same jump target as preceding U-type relocation */
if (last_u_type_jump_target == 0) {
LOG_ERR("R_RISCV_PCREL_LO12_I relocation without preceding U-type "
"relocation!");
return -ENOEXEC;
}
modified_operand = UNALIGNED_GET(loc32);
jump_target = last_u_type_jump_target; /* S - P */
last_u_type_jump_target = 0;
imm8 = jump_target;
modified_operand = R_RISCV_CLEAR_STYPE_IMM8(modified_operand);
modified_operand = R_RISCV_SET_STYPE_IMM8(modified_operand, imm8);
UNALIGNED_PUT(modified_operand, loc32);
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
reloc_type);
case R_RISCV_HI20:
jump_target = sym_base_addr + rel->r_addend; /* S + A */
modified_operand = UNALIGNED_GET(loc32);
imm8 = jump_target;
/* bit 12 of the immediate goes to I-type instruction and might
* change the sign of the number
*/
/* in order to avoid that, we add 1 to the upper immediate if bit 12 is one*/
/* see RISC-V la pseudo instruction */
original_imm8 = imm8;
imm8 += imm8 & 0x800;
modified_operand = R_RISCV_CLEAR_UTYPE_IMM8(modified_operand);
modified_operand = R_RISCV_SET_UTYPE_IMM8(modified_operand, imm8);
UNALIGNED_PUT(modified_operand, loc32);
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
reloc_type);
case R_RISCV_LO12_I:
modified_operand = UNALIGNED_GET(loc32);
jump_target = sym_base_addr + rel->r_addend; /* S + A */
imm8 = jump_target;
/* this is always used with R_RISCV_HI20 */
modified_operand = R_RISCV_CLEAR_ITYPE_IMM8(modified_operand);
modified_operand = R_RISCV_SET_ITYPE_IMM8(modified_operand, imm8);
UNALIGNED_PUT(modified_operand, loc32);
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
reloc_type);
case R_RISCV_LO12_S:
modified_operand = UNALIGNED_GET(loc32);
imm8 = sym_base_addr + rel->r_addend; /* S + A */
/*
* S-type is used for stores/loads etc.
* size check is done at compile time, as it depends on the size of
* the structure we are trying to load/store
*/
modified_operand = R_RISCV_CLEAR_STYPE_IMM8(modified_operand);
modified_operand = R_RISCV_SET_STYPE_IMM8(modified_operand, imm8);
UNALIGNED_PUT(modified_operand, loc32);
break;
/* for add/sub/set, compiler needs to ensure that the ELF sections are close enough */
case R_RISCV_ADD8:
tmp8 = UNALIGNED_GET(loc8);
tmp8 += sym_base_addr + rel->r_addend; /* V + S + A */
UNALIGNED_PUT(tmp8, loc8);
break;
case R_RISCV_ADD16:
tmp16 = UNALIGNED_GET(loc16);
tmp16 += sym_base_addr + rel->r_addend; /* V + S + A */
UNALIGNED_PUT(tmp16, loc16);
break;
case R_RISCV_ADD32:
tmp32 = UNALIGNED_GET(loc32);
tmp32 += sym_base_addr + rel->r_addend; /* V + S + A */
UNALIGNED_PUT(tmp32, loc32);
break;
case R_RISCV_ADD64:
tmp64 = UNALIGNED_GET(loc64);
tmp64 += sym_base_addr + rel->r_addend; /* V + S + A */
UNALIGNED_PUT(tmp64, loc64);
break;
case R_RISCV_SUB8:
tmp8 = UNALIGNED_GET(loc8);
tmp8 -= sym_base_addr + rel->r_addend; /* V - S - A */
UNALIGNED_PUT(tmp8, loc8);
break;
case R_RISCV_SUB16:
tmp16 = UNALIGNED_GET(loc16);
tmp16 -= sym_base_addr + rel->r_addend; /* V - S - A */
UNALIGNED_PUT(tmp16, loc16);
break;
case R_RISCV_SUB32:
tmp32 = UNALIGNED_GET(loc32);
tmp32 -= sym_base_addr + rel->r_addend; /* V - S - A */
UNALIGNED_PUT(tmp32, loc32);
break;
case R_RISCV_SUB64:
tmp64 = UNALIGNED_GET(loc64);
tmp64 -= sym_base_addr + rel->r_addend; /* V - S - A */
UNALIGNED_PUT(tmp64, loc64);
break;
case R_RISCV_SUB6:
tmp8 = UNALIGNED_GET(loc8) & (0x1F);
UNALIGNED_PUT(tmp8, loc8);
tmp8 = tmp8 - sym_base_addr - rel->r_addend; /* V - S - A */
tmp8 = tmp8 & (0x1F);
tmp8 = tmp8 | UNALIGNED_GET(loc8);
UNALIGNED_PUT(tmp8, loc8);
break;
case R_RISCV_SET6:
tmp8 = UNALIGNED_GET(loc8) & (0x1F);
UNALIGNED_PUT(tmp8, loc8);
tmp8 = sym_base_addr + rel->r_addend; /* S + A */
tmp8 = tmp8 | UNALIGNED_GET(loc8);
UNALIGNED_PUT(tmp8, loc8);
break;
case R_RISCV_SET8:
tmp8 = sym_base_addr + rel->r_addend; /* S + A */
UNALIGNED_PUT(tmp8, loc8);
break;
case R_RISCV_SET16:
tmp16 = sym_base_addr + rel->r_addend; /* S + A */
UNALIGNED_PUT(tmp16, loc16);
break;
case R_RISCV_SET32:
tmp32 = sym_base_addr + rel->r_addend; /* S + A */
UNALIGNED_PUT(tmp32, loc32);
break;
case R_RISCV_32_PCREL:
jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
tmp32 = jump_target;
UNALIGNED_PUT(tmp32, loc32);
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
reloc_type);
case R_RISCV_PLT32:
jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
tmp32 = jump_target;
UNALIGNED_PUT(tmp32, loc32);
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
reloc_type);
case R_RISCV_RVC_BRANCH:
jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
modified_compressed_operand = UNALIGNED_GET(loc16);
compressed_imm8 = jump_target;
modified_compressed_operand =
R_RISCV_CLEAR_CBTYPE_IMM8(modified_compressed_operand);
modified_compressed_operand =
R_RISCV_SET_CBTYPE_IMM8(modified_compressed_operand, compressed_imm8);
UNALIGNED_PUT(modified_compressed_operand, loc16);
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_CB_TYPE,
reloc_type);
case R_RISCV_RVC_JUMP:
jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
modified_compressed_operand = UNALIGNED_GET(loc16);
compressed_imm8 = jump_target;
modified_compressed_operand =
R_RISCV_CLEAR_CJTYPE_IMM8(modified_compressed_operand);
modified_compressed_operand =
R_RISCV_SET_CJTYPE_IMM8(modified_compressed_operand, compressed_imm8);
UNALIGNED_PUT(modified_compressed_operand, loc16);
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_CJ_TYPE,
reloc_type);
case R_RISCV_ALIGN:
/* we are supposed to move the symbol such that it is aligned to the next power of
* two >= addend
*/
/* this involves moving the symbol */
while (target_alignment < rel->r_addend) {
target_alignment *= 2;
}
LOG_ERR("Symbol %s with location %p requires alignment to %" PRIu64 " bytes!",
sym_name, (void *)loc, (uint64_t)target_alignment);
LOG_ERR("Alignment relocation is currently not supported!");
return -ENOEXEC;
/* ignored, this is primarily intended for removing instructions during link-time
* optimization
*/
case R_RISCV_RELAX:
break;
default:
LOG_ERR("Unsupported relocation type: %" PRIu64 " for symbol: %s",
(uint64_t)reloc_type, sym_name);
return -ENOEXEC;
}
return 0;
}

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