posix: c_lib_ext: fnmatch: fix llvm warning

The tolower() function takes an int parameter. LLVM compilers generate a
warning if a char is passed instead.

Signed-off-by: Keith Short <keithshort@google.com>

.github/SECURITY.md

@@ -8,11 +8,11 @@ updates:
   - The most recent release, and the release prior to that.
   - Active LTS releases.
 
-At this time, with the latest release of v4.3, the supported
+At this time, with the latest release of v4.2, the supported
 versions are:
 
-  - v4.3: Current release
-  - v4.2: Prior release
+  - v4.2: Current release
+  - v4.1: Prior release
   - v3.7: Current LTS
 
 ## Reporting process

.github/dependabot.yml

@@ -5,8 +5,6 @@ updates:
     directory: "/"
     schedule:
       interval: "weekly"
-    cooldown:
-      default-days: 7
     commit-message:
       prefix: "ci: github: "
     labels: []
@@ -19,8 +17,6 @@ updates:
     directory: "/doc"
     schedule:
       interval: "weekly"
-    cooldown:
-      default-days: 7
     commit-message:
       prefix: "ci: doc: "
     labels: []

.github/workflows/assigner.yml

@@ -28,23 +28,22 @@ jobs:
 
     steps:
     - name: Check out source code
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
       with:
         fetch-depth: 0
         persist-credentials: false
 
     - name: Set up Python
-      uses: zephyrproject-rtos/action-python-env@32e53bef090c33d53aa94f1d9a9d29c93cfdc5f7 # main
+      uses: zephyrproject-rtos/action-python-env@ace91a63fd503cd618ff1eb83fbcf302dabd7d44 # main
       with:
         python-version: 3.12
 
-    - name: Fetch west.yml/Maintainer.yml from pull request
+    - name: Fetch west.yml from pull request
       if: >
-        github.event_name == 'pull_request_target' && github.base_ref == 'main'
+        github.event_name == 'pull_request_target'
       run: |
         git fetch origin pull/${{ github.event.pull_request.number }}/merge
         git show FETCH_HEAD:west.yml > pr_west.yml
-        git show FETCH_HEAD:MAINTAINERS.yml > pr_MAINTAINERS.yml
 
     - name: west setup
       if: >
@@ -63,11 +62,7 @@ jobs:
         FLAGS+=" -r ${{ github.event.repository.name }}"
         FLAGS+=" -M MAINTAINERS.yml"
         if [ "${{ github.event_name }}" = "pull_request_target" ]; then
-          if [ "${{ github.base_ref }}" = "main" ]; then
-            FLAGS+=" -P ${{ github.event.pull_request.number }} --updated-manifest pr_west.yml --updated-maintainer-file pr_MAINTAINERS.yml"
-          else
-            FLAGS+=" -P ${{ github.event.pull_request.number }}"
-          fi
+          FLAGS+=" -P ${{ github.event.pull_request.number }} --updated-manifest pr_west.yml"
         elif [ "${{ github.event_name }}" = "issues" ]; then
           FLAGS+=" -I ${{ github.event.issue.number }}"
         elif [ "${{ github.event_name }}" = "schedule" ]; then
@@ -76,13 +71,4 @@ jobs:
           echo "Unknown event: ${{ github.event_name }}"
           exit 1
         fi
-        python3 scripts/ci/set_assignees.py $FLAGS
-
-    - name: Check maintainer file changes
-      if: >
-        github.event_name == 'pull_request_target' && github.base_ref == 'main'
-      env:
-        GITHUB_TOKEN: ${{ secrets.ZB_PR_ASSIGNER_GITHUB_TOKEN }}
-      run: |
-        python  ./scripts/ci/check_maintainer_changes.py  \
-          --repo zephyrproject-rtos/zephyr MAINTAINERS.yml pr_MAINTAINERS.yml
+        python3 scripts/set_assignees.py $FLAGS

.github/workflows/backport_issue_check.yml

@@ -26,7 +26,7 @@ jobs:
 
     steps:
       - name: Check out source code
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
 
       - name: Set up Python
         uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0

.github/workflows/bsim-tests-publish.yaml

@@ -19,12 +19,12 @@ jobs:
 
     steps:
       - name: Download artifacts
-        uses: dawidd6/action-download-artifact@0bd50d53a6d7fb5cb921e607957e9cc12b4ce392 # v12
+        uses: dawidd6/action-download-artifact@ac66b43f0e6a346234dd65d4d0c8fbb31cb316e5 # v11
         with:
           run_id: ${{ github.event.workflow_run.id }}
 
       - name: Publish BabbleSim Test Results
-        uses: EnricoMi/publish-unit-test-result-action@27d65e188ec43221b20d26de30f4892fad91df2f # v2.22.0
+        uses: EnricoMi/publish-unit-test-result-action@3a74b2957438d0b6e2e61d67b05318aa25c9e6c6 # v2.20.0
         with:
           check_name: BabbleSim Test Results
           comment_mode: off

.github/workflows/bsim-tests.yaml

@@ -42,7 +42,7 @@ jobs:
     runs-on:
       group: zephyr-runner-v2-linux-x64-4xlarge
     container:
-      image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.7.20251127
+      image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
       options: '--entrypoint /bin/bash'
     env:
       ZEPHYR_TOOLCHAIN_VARIANT: zephyr
@@ -74,7 +74,7 @@ jobs:
           git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
 
       - name: Checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           fetch-depth: 0
 
@@ -102,7 +102,7 @@ jobs:
           pip install -r scripts/requirements-actions.txt --require-hashes
 
       - name: Check common triggering files
-        uses: tj-actions/changed-files@e0021407031f5be11a464abee9a0776171c79891 # v47.0.1
+        uses: tj-actions/changed-files@24d32ffd492484c1d75e0c0b894501ddb9d30d62 # v47.0.0
         id: check-common-files
         with:
           files: |
@@ -121,7 +121,7 @@ jobs:
             modules/hal_nordic/**
 
       - name: Check if Bluethooth files changed
-        uses: tj-actions/changed-files@e0021407031f5be11a464abee9a0776171c79891 # v47.0.1
+        uses: tj-actions/changed-files@24d32ffd492484c1d75e0c0b894501ddb9d30d62 # v47.0.0
         id: check-bluetooth-files
         with:
           files: |
@@ -131,7 +131,7 @@ jobs:
             tests/bsim/bluetooth/
 
       - name: Check if Networking files changed
-        uses: tj-actions/changed-files@e0021407031f5be11a464abee9a0776171c79891 # v47.0.1
+        uses: tj-actions/changed-files@24d32ffd492484c1d75e0c0b894501ddb9d30d62 # v47.0.0
         id: check-networking-files
         with:
           files: |
@@ -144,7 +144,7 @@ jobs:
             include/zephyr/net/ieee802154*
 
       - name: Check if UART files changed
-        uses: tj-actions/changed-files@e0021407031f5be11a464abee9a0776171c79891 # v47.0.1
+        uses: tj-actions/changed-files@24d32ffd492484c1d75e0c0b894501ddb9d30d62 # v47.0.0
         id: check-uart-files
         with:
           files: |
@@ -189,7 +189,7 @@ jobs:
 
       - name: Upload Unit Test Results in HTML
         if: always()
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         with:
           name: HTML Unit Test Results
           if-no-files-found: ignore
@@ -197,7 +197,7 @@ jobs:
             junit.html
 
       - name: Publish Unit Test Results
-        uses: EnricoMi/publish-unit-test-result-action@27d65e188ec43221b20d26de30f4892fad91df2f # v2.22.0
+        uses: EnricoMi/publish-unit-test-result-action@3a74b2957438d0b6e2e61d67b05318aa25c9e6c6 # v2.20.0
         with:
           check_name: Bsim Test Results
           files: "junit.xml"
@@ -205,7 +205,7 @@ jobs:
 
       - name: Upload Event Details
         if: always()
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         with:
           name: event
           path: |

.github/workflows/bug_snapshot.yaml

@@ -23,7 +23,7 @@ jobs:
 
     steps:
     - name: Checkout
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
 
     - name: Set up Python
       uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
@@ -51,7 +51,7 @@ jobs:
         echo "BUGS_PICKLE_PATH=${BUGS_PICKLE_PATH}" >> ${GITHUB_ENV}
 
     - name: Configure AWS Credentials
-      uses: aws-actions/configure-aws-credentials@61815dcd50bd041e203e49132bacad1fd04d2708 # v5.1.1
+      uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
       with:
         aws-access-key-id: ${{ vars.AWS_BUILDS_ZEPHYR_BUG_SNAPSHOT_ACCESS_KEY_ID }}
         aws-secret-access-key: ${{ secrets.AWS_BUILDS_ZEPHYR_BUG_SNAPSHOT_SECRET_ACCESS_KEY }}

.github/workflows/clang.yaml

@@ -18,7 +18,7 @@ jobs:
     runs-on:
       group: zephyr-runner-v2-linux-x64-4xlarge
     container:
-      image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.7.20251127
+      image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
       options: '--entrypoint /bin/bash'
     strategy:
       fail-fast: false
@@ -53,7 +53,7 @@ jobs:
           git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
 
       - name: Checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           fetch-depth: 0
           persist-credentials: false
@@ -123,7 +123,7 @@ jobs:
 
       - name: Upload Unit Test Results
         if: always()
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         with:
           name: Unit Test Results (Subset ${{ matrix.subset }})
           path: |
@@ -140,13 +140,13 @@ jobs:
     if: (success() || failure())
     steps:
       - name: Checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           fetch-depth: 0
           persist-credentials: false
 
       - name: Download Artifacts
-        uses: actions/download-artifact@37930b1c2abaa49bbe596cd826c3c89aef350131 # v7.0.0
+        uses: actions/download-artifact@634f93cb2916e3fdff6788551b99b062d0335ce0 # v5.0.0
         with:
           path: artifacts
 
@@ -168,7 +168,7 @@ jobs:
 
       - name: Upload Unit Test Results in HTML
         if: always()
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         with:
           name: HTML Unit Test Results
           if-no-files-found: ignore
@@ -176,7 +176,7 @@ jobs:
             junit-clang.html
 
       - name: Publish Unit Test Results
-        uses: EnricoMi/publish-unit-test-result-action@27d65e188ec43221b20d26de30f4892fad91df2f # v2.22.0
+        uses: EnricoMi/publish-unit-test-result-action@3a74b2957438d0b6e2e61d67b05318aa25c9e6c6 # v2.20.0
         if: always()
         with:
           check_name: Unit Test Results

.github/workflows/codecov.yaml

@@ -20,7 +20,7 @@ jobs:
     runs-on:
       group: zephyr-runner-v2-linux-x64-4xlarge
     container:
-      image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.7.20251127
+      image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
       options: '--entrypoint /bin/bash'
     strategy:
       fail-fast: false
@@ -67,7 +67,7 @@ jobs:
           git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
 
       - name: checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           fetch-depth: 0
 
@@ -126,7 +126,7 @@ jobs:
 
       - name: Upload Doxygen Coverage Results
         if: matrix.platform == 'unit_testing'
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         with:
           name: doxygen-coverage-results
           path: |
@@ -145,7 +145,7 @@ jobs:
 
       - name: Upload Coverage Results
         if: always()
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         with:
           name: Coverage Data (Subset ${{ matrix.normalized }})
           path: |
@@ -161,7 +161,7 @@ jobs:
 
     steps:
       - name: checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           fetch-depth: 0
 
@@ -177,7 +177,7 @@ jobs:
           pip install -r scripts/requirements-actions.txt --require-hashes
 
       - name: Download Artifacts
-        uses: actions/download-artifact@37930b1c2abaa49bbe596cd826c3c89aef350131 # v7.0.0
+        uses: actions/download-artifact@634f93cb2916e3fdff6788551b99b062d0335ce0 # v5.0.0
         with:
           path: coverage/reports
 
@@ -242,7 +242,7 @@ jobs:
 
       - name: Upload Merged Coverage Results and Report
         if: always()
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         with:
           name: Coverage Data and report
           path: |
@@ -253,7 +253,7 @@ jobs:
 
       - name: Upload test coverage to Codecov
         if: always()
-        uses: codecov/codecov-action@671740ac38dd9b0130fbe1cec585b89eea48d3de # v5.5.2
+        uses: codecov/codecov-action@5a1091511ad55cbe89839c7260b706298ca349f7 # v5.5.1
         with:
           env_vars: OS,PYTHON
           fail_ci_if_error: false
@@ -264,7 +264,7 @@ jobs:
 
       - name: Upload Doxygen coverage to Codecov
         if: always()
-        uses: codecov/codecov-action@671740ac38dd9b0130fbe1cec585b89eea48d3de # v5.5.2
+        uses: codecov/codecov-action@5a1091511ad55cbe89839c7260b706298ca349f7 # v5.5.1
         with:
           env_vars: OS,PYTHON
           fail_ci_if_error: false

.github/workflows/codeql.yml

@@ -36,10 +36,10 @@ jobs:
             config: ./.github/codeql/codeql-js-config.yml
     steps:
       - name: Checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
 
       - name: Initialize CodeQL
-        uses: github/codeql-action/init@cdefb33c0f6224e58673d9004f47f7cb3e328b89 # v4.31.10
+        uses: github/codeql-action/init@64d10c13136e1c5bce3e5fbde8d4906eeaafc885 # v3.30.6
         with:
           languages: ${{ matrix.language }}
           build-mode: ${{ matrix.build-mode }}
@@ -53,6 +53,6 @@ jobs:
           exit 0
 
       - name: Perform CodeQL Analysis
-        uses: github/codeql-action/analyze@cdefb33c0f6224e58673d9004f47f7cb3e328b89 # v4.31.10
+        uses: github/codeql-action/analyze@64d10c13136e1c5bce3e5fbde8d4906eeaafc885 # v3.30.6
         with:
           category: "/language:${{matrix.language}}"

.github/workflows/coding_guidelines.yml

@@ -11,7 +11,7 @@ jobs:
     name: Run coding guidelines checks on patch series (PR)
     steps:
     - name: Checkout the code
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
       with:
         ref: ${{ github.event.pull_request.head.sha }}
         fetch-depth: 0

.github/workflows/compliance.yml

@@ -21,7 +21,7 @@ jobs:
         echo "$HOME/.local/bin" >> $GITHUB_PATH
 
     - name: Checkout the code
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
       with:
         ref: ${{ github.event.pull_request.head.sha }}
         fetch-depth: 0
@@ -61,7 +61,7 @@ jobs:
         west update -o=--depth=1 -n 2>&1 1> west.update.log || west update -o=--depth=1 -n 2>&1 1> west.update2.log
 
     - name: Setup Node.js
-      uses: actions/setup-node@6044e13b5dc448c55e2357c09f80417699197238 # v6.2.0
+      uses: actions/setup-node@2028fbc5c25fe9cf00d9f06a71cc4710d4507903 # v6.0.0
       with:
         node-version: "lts/*"
         cache: npm
@@ -91,14 +91,14 @@ jobs:
         ./scripts/ci/check_compliance.py --annotate $excludes -c origin/${BASE_REF}..
 
     - name: upload-results
-      uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+      uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
       continue-on-error: true
       with:
         name: compliance.xml
         path: compliance.xml
 
     - name: Upload dts linter patch
-      uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+      uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
       continue-on-error: true
       if: hashFiles('dts_linter.patch') != ''
       with:

.github/workflows/daily_test_version.yml

@@ -20,14 +20,14 @@ jobs:
 
     steps:
     - name: Configure AWS Credentials
-      uses: aws-actions/configure-aws-credentials@61815dcd50bd041e203e49132bacad1fd04d2708 # v5.1.1
+      uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
       with:
         aws-access-key-id: ${{ vars.AWS_TESTING_ACCESS_KEY_ID }}
         aws-secret-access-key: ${{ secrets.AWS_TESTING_SECRET_ACCESS_KEY }}
         aws-region: us-east-1
 
     - name: checkout
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
       with:
         fetch-depth: 0
 

.github/workflows/devicetree_checks.yml

@@ -33,7 +33,7 @@ jobs:
         os: [ubuntu-22.04, macos-14, windows-2022]
     steps:
     - name: checkout
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
 
     - name: Set up Python ${{ matrix.python-version }}
       uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0

.github/workflows/doc-build.yml

@@ -15,8 +15,8 @@ permissions:
   contents: read
 
 env:
-  DOXYGEN_VERSION: 1.15.0
-  DOXYGEN_SHA256SUM: 0ec2e5b2c3cd82b7106d19cb42d8466450730b8cb7a9e85af712be38bf4523a1
+  DOXYGEN_VERSION: 1.14.0
+  DOXYGEN_MD5SUM: e761a5097ae20ecccfd02041925f102a
   JOB_COUNT: 8
 
 jobs:
@@ -27,12 +27,12 @@ jobs:
       file_check: ${{ steps.check-doc-files.outputs.any_modified }}
     steps:
     - name: checkout
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
       with:
         ref: ${{ github.event.pull_request.head.sha }}
         fetch-depth: 0
     - name: Check if Documentation related files changed
-      uses: tj-actions/changed-files@e0021407031f5be11a464abee9a0776171c79891 # v47.0.1
+      uses: tj-actions/changed-files@24d32ffd492484c1d75e0c0b894501ddb9d30d62 # v47.0.0
       id: check-doc-files
       with:
         files: |
@@ -59,7 +59,7 @@ jobs:
     runs-on:
       group: zephyr-runner-v2-linux-x64-4xlarge
     container:
-      image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.7.20251127
+      image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
       options: '--entrypoint /bin/bash'
     timeout-minutes: 60
     concurrency:
@@ -92,7 +92,7 @@ jobs:
         git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
 
     - name: Checkout
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
       with:
         ref: ${{ github.event.pull_request.head.sha }}
         fetch-depth: 0
@@ -156,13 +156,13 @@ jobs:
         tar --use-compress-program="xz -T0" -cf api-coverage.tar.xz coverage-report
 
     - name: Upload HTML output
-      uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+      uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
       with:
         name: html-output
         path: html-output.tar.xz
 
     - name: Upload Doxygen coverage artifacts
-      uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+      uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
       with:
         name: api-coverage
         path: api-coverage.tar.xz
@@ -183,7 +183,7 @@ jobs:
         echo "API Coverage Report will be available shortly at: ${API_COVERAGE_URL}" >> $GITHUB_STEP_SUMMARY
 
     - name: Upload PR number
-      uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+      uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
       if: github.event_name == 'pull_request'
       with:
         name: pr_num
@@ -202,7 +202,7 @@ jobs:
 
     steps:
     - name: checkout
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
       with:
         path: zephyr
 
@@ -221,7 +221,7 @@ jobs:
           texlive-fonts-recommended texlive-fonts-extra texlive-xetex \
           imagemagick fonts-noto xindy
         wget --no-verbose "https://github.com/doxygen/doxygen/releases/download/Release_${DOXYGEN_VERSION//./_}/doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz"
-        echo "${DOXYGEN_SHA256SUM}  doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz" | sha256sum -c
+        echo "${DOXYGEN_MD5SUM}  doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz" | md5sum -c
         if [ $? -ne 0 ]; then
           echo "Failed to verify doxygen tarball"
           exit 1
@@ -230,7 +230,7 @@ jobs:
         echo "/opt/doxygen-${DOXYGEN_VERSION}/bin" >> $GITHUB_PATH
 
     - name: Setup Zephyr project
-      uses: zephyrproject-rtos/action-zephyr-setup@360ff9b36e58499d9eb28015cdcde7ca03a5b04d # v1.0.12
+      uses: zephyrproject-rtos/action-zephyr-setup@c125c5ebeeadbd727fa740b407f862734af1e52a # v1.0.9
       with:
         app-path: zephyr
         toolchains: 'arm-zephyr-eabi'
@@ -259,7 +259,7 @@ jobs:
 
     - name: upload-build
       if: always()
-      uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+      uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
       with:
         name: pdf-output
         if-no-files-found: ignore

.github/workflows/doc-publish-pr.yml

@@ -25,7 +25,7 @@ jobs:
     steps:
     - name: Download artifacts
       id: download-artifacts
-      uses: dawidd6/action-download-artifact@0bd50d53a6d7fb5cb921e607957e9cc12b4ce392 # v12
+      uses: dawidd6/action-download-artifact@ac66b43f0e6a346234dd65d4d0c8fbb31cb316e5 # v11
       with:
         workflow: doc-build.yml
         run_id: ${{ github.event.workflow_run.id }}
@@ -43,7 +43,7 @@ jobs:
     - name: Check PR number
       if: steps.download-artifacts.outputs.found_artifact == 'true'
       id: check-pr
-      uses: carpentries/actions/check-valid-pr@083bb9952b1414bd2b9e10ecec1717c938aba4c5 # v0.17.0
+      uses: carpentries/actions/check-valid-pr@2e20fd5ee53b691e27455ce7ca3b16ea885140e8 # v0.15.0
       with:
         pr: ${{ env.PR_NUM }}
         sha: ${{ github.event.workflow_run.head_sha }}
@@ -66,7 +66,7 @@ jobs:
 
     - name: Configure AWS Credentials
       if: steps.download-artifacts.outputs.found_artifact == 'true'
-      uses: aws-actions/configure-aws-credentials@61815dcd50bd041e203e49132bacad1fd04d2708 # v5.1.1
+      uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
       with:
         aws-access-key-id: ${{ vars.AWS_BUILDS_ZEPHYR_PR_ACCESS_KEY_ID }}
         aws-secret-access-key: ${{ secrets.AWS_BUILDS_ZEPHYR_PR_SECRET_ACCESS_KEY }}

.github/workflows/doc-publish.yml

@@ -27,7 +27,7 @@ jobs:
 
     steps:
     - name: Download artifacts
-      uses: dawidd6/action-download-artifact@0bd50d53a6d7fb5cb921e607957e9cc12b4ce392 # v12
+      uses: dawidd6/action-download-artifact@ac66b43f0e6a346234dd65d4d0c8fbb31cb316e5 # v11
       with:
         workflow: doc-build.yml
         run_id: ${{ github.event.workflow_run.id }}
@@ -40,7 +40,7 @@ jobs:
         fi
 
     - name: Configure AWS Credentials
-      uses: aws-actions/configure-aws-credentials@61815dcd50bd041e203e49132bacad1fd04d2708 # v5.1.1
+      uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
       with:
         aws-access-key-id: ${{ vars.AWS_DOCS_ACCESS_KEY_ID }}
         aws-secret-access-key: ${{ secrets.AWS_DOCS_SECRET_ACCESS_KEY }}

.github/workflows/errno.yml

@@ -15,12 +15,12 @@ jobs:
     runs-on: ubuntu-24.04
     steps:
       - name: checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           path: zephyr
 
       - name: Setup Zephyr project
-        uses: zephyrproject-rtos/action-zephyr-setup@360ff9b36e58499d9eb28015cdcde7ca03a5b04d # v1.0.12
+        uses: zephyrproject-rtos/action-zephyr-setup@c125c5ebeeadbd727fa740b407f862734af1e52a # v1.0.9
         with:
           app-path: zephyr
           toolchains: 'arm-zephyr-eabi'

.github/workflows/footprint-tracking.yml

@@ -28,7 +28,7 @@ jobs:
       group: zephyr-runner-v2-linux-x64-4xlarge
     if: github.repository_owner == 'zephyrproject-rtos'
     container:
-      image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.7.20251127
+      image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
       options: '--entrypoint /bin/bash'
     defaults:
       run:
@@ -62,7 +62,7 @@ jobs:
           sudo apt-get install -y python3-venv
 
       - name: checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           ref: ${{ github.event.pull_request.head.sha }}
           fetch-depth: 0
@@ -89,7 +89,7 @@ jobs:
           west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
 
       - name: Configure AWS Credentials
-        uses: aws-actions/configure-aws-credentials@61815dcd50bd041e203e49132bacad1fd04d2708 # v5.1.1
+        uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
         with:
           aws-access-key-id: ${{ vars.AWS_TESTING_ACCESS_KEY_ID }}
           aws-secret-access-key: ${{ secrets.AWS_TESTING_SECRET_ACCESS_KEY }}

.github/workflows/greet_first_time_contributor.yml

@@ -18,7 +18,7 @@ jobs:
       issues: write        # to comment on issues
 
     steps:
-      - uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      - uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
       - uses: zephyrproject-rtos/action-first-interaction@58853996b1ac504b8e0f6964301f369d2bb22e5c # v1.1.1+zephyr.6
         with:
           repo-token: ${{ secrets.GITHUB_TOKEN }}

.github/workflows/hello_world_multiplatform.yaml

@@ -32,7 +32,7 @@ jobs:
     runs-on: ${{ matrix.os }}
     steps:
       - name: Checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           path: zephyr
           fetch-depth: 0
@@ -59,10 +59,10 @@ jobs:
           python-version: 3.12
 
       - name: Setup Zephyr project
-        uses: zephyrproject-rtos/action-zephyr-setup@360ff9b36e58499d9eb28015cdcde7ca03a5b04d # v1.0.12
+        uses: zephyrproject-rtos/action-zephyr-setup@c125c5ebeeadbd727fa740b407f862734af1e52a # v1.0.9
         with:
           app-path: zephyr
-          toolchains: arm-zephyr-eabi:riscv64-zephyr-elf
+          toolchains: aarch64-zephyr-elf:arc-zephyr-elf:arc64-zephyr-elf:arm-zephyr-eabi:mips-zephyr-elf:riscv64-zephyr-elf:sparc-zephyr-elf:x86_64-zephyr-elf:xtensa-dc233c_zephyr-elf:xtensa-sample_controller32_zephyr-elf:rx-zephyr-elf
           ccache-cache-key: hw-${{ matrix.os }}
 
       - name: Build firmware
@@ -76,19 +76,11 @@ jobs:
           elif [ "${{ runner.os }}-${{ runner.arch }}" == "Linux-ARM64" ]; then
             EXTRA_TWISTER_FLAGS="--exclude-platform native_sim/native"
           fi
-          west twister \
-              -p native_sim -p qemu_cortex_m0 -p qemu_riscv32 -p qemu_riscv64 \
-              --runtime-artifact-cleanup \
-              --force-color \
-              --inline-logs \
-              -T samples/hello_world \
-              -T samples/cpp/hello_world \
-              -v \
-              $EXTRA_TWISTER_FLAGS
+          west twister --runtime-artifact-cleanup --force-color --inline-logs -T samples/hello_world -T samples/cpp/hello_world -v $EXTRA_TWISTER_FLAGS
 
       - name: Upload artifacts
         if: failure()
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         with:
           if-no-files-found: ignore
           path:

.github/workflows/issue_count.yml

@@ -38,14 +38,14 @@ jobs:
         token: ${{ secrets.GITHUB_TOKEN }}
 
     - name: upload-stats
-      uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+      uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
       continue-on-error: true
       with:
         name: ${{ env.OUTPUT_FILE_NAME }}
         path: ${{ env.OUTPUT_FILE_NAME }}
 
     - name: Configure AWS Credentials
-      uses: aws-actions/configure-aws-credentials@61815dcd50bd041e203e49132bacad1fd04d2708 # v5.1.1
+      uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
       with:
         aws-access-key-id: ${{ vars.AWS_TESTING_ACCESS_KEY_ID }}
         aws-secret-access-key: ${{ secrets.AWS_TESTING_SECRET_ACCESS_KEY }}

.github/workflows/license_check.yml

@@ -11,7 +11,7 @@ jobs:
     name: Scan code for licenses
     steps:
     - name: Checkout the code
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
       with:
         fetch-depth: 0
     - name: Scan the code
@@ -20,7 +20,7 @@ jobs:
       with:
         directory-to-scan: 'scan/'
     - name: Artifact Upload
-      uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+      uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
       with:
         name: scancode
         path: ./artifacts

.github/workflows/maintainer_check.yml

@@ -0,0 +1,43 @@
+name: Maintainer file check
+
+on:
+  pull_request_target:
+    branches:
+      - main
+    paths:
+      - MAINTAINERS.yml
+
+permissions:
+  contents: read
+
+jobs:
+  assignment:
+    name: Check MAINTAINERS.yml changes
+    runs-on: ubuntu-24.04
+
+    steps:
+      - name: Check out source code
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
+
+      - name: Set up Python
+        uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
+        with:
+          python-version: 3.12
+          cache: pip
+          cache-dependency-path: scripts/requirements-actions.txt
+
+      - name: Install Python packages
+        run: |
+          pip install -r scripts/requirements-actions.txt --require-hashes
+
+      - name: Fetch MAINTAINERS.yml from pull request
+        run: |
+          git fetch origin pull/${{ github.event.pull_request.number }}/merge
+          git show FETCH_HEAD:MAINTAINERS.yml > pr_MAINTAINERS.yml
+
+      - name: Check maintainer file changes
+        env:
+          GITHUB_TOKEN: ${{ secrets.ZB_PR_ASSIGNER_GITHUB_TOKEN }}
+        run: |
+          python  ./scripts/ci/check_maintainer_changes.py  \
+            --repo zephyrproject-rtos/zephyr MAINTAINERS.yml pr_MAINTAINERS.yml

.github/workflows/manifest.yml

@@ -13,7 +13,7 @@ jobs:
     name: Manifest
     steps:
       - name: Checkout the code
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           path: zephyrproject/zephyr
           fetch-depth: 0

.github/workflows/pinned-gh-actions.yml

@@ -14,6 +14,6 @@ jobs:
     runs-on: ubuntu-latest
     steps:
       - name: Checkout code
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
       - name: Ensure SHA pinned actions
-        uses: zgosalvez/github-actions-ensure-sha-pinned-actions@6124774845927d14c601359ab8138699fa5b70c3 # v4.0.1
+        uses: zgosalvez/github-actions-ensure-sha-pinned-actions@9e9574ef04ea69da568d6249bd69539ccc704e74 # v4.0.0

.github/workflows/pr_metadata_check.yml

@@ -8,22 +8,18 @@ on:
       - reopened
       - labeled
       - unlabeled
+      - edited
 
 permissions:
   contents: read
 
-concurrency:
-  group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
-  cancel-in-progress: true
-
 jobs:
   do-not-merge:
     name: Prevent Merging
     runs-on: ubuntu-24.04
-    timeout-minutes: 30
     steps:
       - name: Checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
 
       - name: Set up Python
         uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0

.github/workflows/pylib_tests.yml

@@ -32,7 +32,7 @@ jobs:
         os: [ubuntu-24.04]
     steps:
     - name: checkout
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
 
     - name: Set up Python ${{ matrix.python-version }}
       uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0

.github/workflows/release.yml

@@ -15,7 +15,7 @@ jobs:
     permissions:
       contents: write # to create GitHub release entry
     steps:
-      - uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      - uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           fetch-depth: 0
 
@@ -31,7 +31,7 @@ jobs:
           args: spdx -o zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
 
       - name: upload-results
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         continue-on-error: true
         with:
           name: zephyr-${{ steps.get_version.outputs.VERSION }}.spdx

.github/workflows/scorecards.yml

@@ -29,7 +29,7 @@ jobs:
 
     steps:
       - name: "Checkout code"
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           persist-credentials: false
 
@@ -47,7 +47,7 @@ jobs:
       # uploads of run results in SARIF format to the repository Actions tab.
       # https://docs.github.com/en/actions/advanced-guides/storing-workflow-data-as-artifacts
       - name: "Upload artifact"
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         with:
           name: SARIF file
           path: results.sarif
@@ -56,6 +56,6 @@ jobs:
       # Upload the results to GitHub's code scanning dashboard (optional).
       # Commenting out will disable upload of results to your repo's Code Scanning dashboard
       - name: "Upload to code-scanning"
-        uses: github/codeql-action/upload-sarif@cdefb33c0f6224e58673d9004f47f7cb3e328b89 # v4.31.10
+        uses: github/codeql-action/upload-sarif@64d10c13136e1c5bce3e5fbde8d4906eeaafc885 # v3.30.6
         with:
           sarif_file: results.sarif

.github/workflows/scripts_tests.yml

@@ -32,7 +32,7 @@ jobs:
         os: [ubuntu-24.04]
     steps:
       - name: checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           ref: ${{ github.event.pull_request.head.sha }}
           fetch-depth: 0

.github/workflows/stale_issue.yml

@@ -16,7 +16,7 @@ jobs:
       issues: write        # to comment on stale issues
 
     steps:
-    - uses: actions/stale@997185467fa4f803885201cee163a9f38240193d # v10.1.1
+    - uses: actions/stale@5f858e3efba33a5ca4407a664cc011ad407f2008 # v10.1.0
       with:
         stale-pr-message: 'This pull request has been marked as stale because it has been open (more
           than) 60 days with no activity. Remove the stale label or add a comment saying that you

.github/workflows/stats_merged_prs.yml

@@ -16,7 +16,7 @@ jobs:
     runs-on: ubuntu-24.04
     steps:
       - name: checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
 
       - name: Set up Python
         uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0

.github/workflows/twister-publish.yaml

@@ -23,7 +23,7 @@ jobs:
     steps:
       # Needed for elasticearch and upload script
       - name: Checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           fetch-depth: 0
           persist-credentials: false
@@ -39,7 +39,7 @@ jobs:
 
       - name: Download Artifacts
         id: download-artifacts
-        uses: dawidd6/action-download-artifact@0bd50d53a6d7fb5cb921e607957e9cc12b4ce392 # v12
+        uses: dawidd6/action-download-artifact@ac66b43f0e6a346234dd65d4d0c8fbb31cb316e5 # v11
         with:
           path: artifacts
           workflow: twister.yml

.github/workflows/twister.yaml

@@ -42,7 +42,7 @@ jobs:
     steps:
       - name: Checkout
         if: github.event_name == 'pull_request'
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           ref: ${{ github.event.pull_request.head.sha }}
           fetch-depth: 0
@@ -65,7 +65,7 @@ jobs:
 
       - name: Setup Zephyr project
         if: github.event_name == 'pull_request'
-        uses: zephyrproject-rtos/action-zephyr-setup@360ff9b36e58499d9eb28015cdcde7ca03a5b04d # v1.0.12
+        uses: zephyrproject-rtos/action-zephyr-setup@c125c5ebeeadbd727fa740b407f862734af1e52a # v1.0.9
         with:
           app-path: zephyr
           enable-ccache: false
@@ -127,7 +127,7 @@ jobs:
     needs: twister-build-prep
     if: needs.twister-build-prep.outputs.size != 0
     container:
-      image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.7.20251127
+      image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
       options: '--entrypoint /bin/bash'
     strategy:
       fail-fast: false
@@ -171,7 +171,7 @@ jobs:
           git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
 
       - name: Checkout
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           ref: ${{ github.event.pull_request.head.sha }}
           fetch-depth: 0
@@ -192,7 +192,7 @@ jobs:
           echo "$HOME/.cargo/bin" >> $GITHUB_PATH
 
           west init -l . || true
-          west config manifest.group-filter -- +ci,+optional,+testing
+          west config manifest.group-filter -- +ci,+optional
           west config --global update.narrow true
           west update --path-cache /repo-cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /repo-cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /repo-cache/zephyrproject)
           west forall -c 'git reset --hard HEAD'
@@ -283,7 +283,7 @@ jobs:
 
       - name: Upload Unit Test Results
         if: always()
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         with:
           name: Unit Test Results (Subset ${{ matrix.subset }})
           if-no-files-found: ignore
@@ -305,7 +305,7 @@ jobs:
 
       - if: matrix.subset == 1 && github.event_name == 'push'
         name: Upload the list of Python packages
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         with:
           name: Frozen PIP package set
           path: |
@@ -323,7 +323,7 @@ jobs:
 
     steps:
       - name: Check out source code
-        uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+        uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
         with:
           ref: ${{ github.event.pull_request.head.sha }}
           fetch-depth: 0
@@ -341,7 +341,7 @@ jobs:
           pip install -r scripts/requirements-actions.txt --require-hashes
 
       - name: Download Artifacts
-        uses: actions/download-artifact@37930b1c2abaa49bbe596cd826c3c89aef350131 # v7.0.0
+        uses: actions/download-artifact@634f93cb2916e3fdff6788551b99b062d0335ce0 # v5.0.0
         with:
           path: artifacts
 
@@ -352,7 +352,7 @@ jobs:
 
       - name: Upload Unit Test Results
         if: always()
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         with:
           name: Unit Test Results
           if-no-files-found: ignore
@@ -362,12 +362,12 @@ jobs:
 
       - name: Upload test results to Codecov
         if: ${{ !cancelled() && (github.event_name == 'push') }}
-        uses: codecov/test-results-action@0fa95f0e1eeaafde2c782583b36b28ad0d8c77d3 # v1.2.1
+        uses: codecov/test-results-action@47f89e9acb64b76debcd5ea40642d25a4adced9f # v1.1.1
         with:
           token: ${{ secrets.CODECOV_TOKEN }}
 
       - name: Publish Unit Test Results
-        uses: EnricoMi/publish-unit-test-result-action@27d65e188ec43221b20d26de30f4892fad91df2f # v2.22.0
+        uses: EnricoMi/publish-unit-test-result-action@3a74b2957438d0b6e2e61d67b05318aa25c9e6c6 # v2.20.0
         with:
           check_name: Unit Test Results
           files: "**/twister.xml"
@@ -384,7 +384,7 @@ jobs:
 
       - name: Upload Twister Analysis Results
         if: needs.twister-build.result == 'failure'
-        uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0
+        uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
         with:
           name: Twister Analysis Results
           if-no-files-found: ignore

.github/workflows/twister_tests.yml

@@ -39,7 +39,7 @@ jobs:
         os: [ubuntu-24.04]
     steps:
     - name: checkout
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
 
     - name: Set up Python ${{ matrix.python-version }}
       uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0

.github/workflows/twister_tests_blackbox.yml

@@ -27,11 +27,12 @@ jobs:
     strategy:
       matrix:
         python-version: ['3.10', '3.11', '3.12', '3.13']
+        os: [ubuntu-24.04, macos-14, windows-2022]
       fail-fast: false
-    runs-on: ubuntu-24.04
+    runs-on: ${{ matrix.os }}
     steps:
     - name: Checkout
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
       with:
         path: zephyr
         fetch-depth: 0
@@ -44,15 +45,14 @@ jobs:
         cache-dependency-path: scripts/requirements-actions.txt
 
     - name: Setup Zephyr project
-      uses: zephyrproject-rtos/action-zephyr-setup@360ff9b36e58499d9eb28015cdcde7ca03a5b04d # v1.0.12
+      uses: zephyrproject-rtos/action-zephyr-setup@c125c5ebeeadbd727fa740b407f862734af1e52a # v1.0.9
       with:
         app-path: zephyr
-        toolchains: 'arm-zephyr-eabi:riscv64-zephyr-elf:x86_64-zephyr-elf'
+        toolchains: all
         enable-ccache: false
-        west-group-filter: -tools,-bootloader,-babblesim,-hal
-        west-project-filter: -nrf_hw_models,+cmsis,+hal_xtensa,+cmsis_6
 
     - name: Run Pytest For Twister Black Box Tests
+      if: ${{ runner.os == 'Linux' }}
       working-directory: zephyr
       shell: bash
       env:
@@ -64,3 +64,125 @@ jobs:
         echo "Run twister tests"
         source zephyr-env.sh
         PYTHONPATH="./scripts/tests" pytest ./scripts/tests/twister_blackbox/
+
+    - name: Build firmware No. 1 - basic
+      working-directory: zephyr
+      shell: bash
+      run: |
+        if [ "${{ runner.os }}" = "macOS" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
+        elif [ "${{ runner.os }}" = "Windows" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
+        fi
+        ./scripts/twister --runtime-artifact-cleanup --force-color --inline-logs -T samples/hello_world -T samples/cpp/hello_world -v $EXTRA_TWISTER_FLAGS
+
+    - name: Build firmware No. 2 - save and load with emulation only
+      working-directory: zephyr
+      shell: bash
+      run: |
+        if [ "${{ runner.os }}" = "macOS" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
+        elif [ "${{ runner.os }}" = "Windows" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
+        fi
+        BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -T samples/hello_world -T samples/cpp/hello_world -v $EXTRA_TWISTER_FLAGS"
+        ./scripts/twister --save-tests tests.file $BASIC_FLAGS
+        ./scripts/twister --load-tests tests.file --emulation-only $BASIC_FLAGS
+        rm tests.file
+
+    - name: Build firmware No. 3 - print out test plan
+      working-directory: zephyr
+      shell: bash
+      run: |
+        if [ "${{ runner.os }}" = "macOS" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
+        elif [ "${{ runner.os }}" = "Windows" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
+        fi
+        BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
+        ./scripts/twister --test-tree -T tests/kernel/spinlock $BASIC_FLAGS
+
+    - name: Build firmware No. 4 - integration, exclude tag, filter, shuffle, dry run
+      working-directory: zephyr
+      shell: bash
+      run: |
+        if [ "${{ runner.os }}" = "macOS" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
+        elif [ "${{ runner.os }}" = "Windows" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
+        fi
+        BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
+        ./scripts/twister --dry-run --integration --subset 1/3 --shuffle-tests --shuffle-tests-seed 1 --filter runnable --exclude-tag audio --exclude-tag driver $BASIC_FLAGS
+
+    - name: Build firmware No. 5 - test, arch, vendor, exclude-platform, platform-reports
+      working-directory: zephyr
+      shell: bash
+      run: |
+        if [ "${{ runner.os }}" = "macOS" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
+        elif [ "${{ runner.os }}" = "Windows" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
+        fi
+        BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
+        ./scripts/twister --test kernel.multiprocessing.spinlock --arch x86 --exclude-platform qemu_x86_64 --vendor qemu --platform-reports $BASIC_FLAGS
+
+    - name: Build firmware No. 6 - subtest, platform, rom-ram report, ROM footprint report from buildlog, size report
+      working-directory: zephyr
+      shell: bash
+      run: |
+        if [ "${{ runner.os }}" = "macOS" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
+        elif [ "${{ runner.os }}" = "Windows" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
+        fi
+        BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
+        ./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --platform qemu_x86 --create-rom-ram-report --footprint-report ROM --enable-size-report --footprint-from-buildlog $BASIC_FLAGS --detailed-test-id
+
+    - name: Build firmware No. 7 - list tags
+      working-directory: zephyr
+      shell: bash
+      run: |
+        if [ "${{ runner.os }}" = "macOS" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
+        elif [ "${{ runner.os }}" = "Windows" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
+        fi
+        BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
+        ./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --list-tags $BASIC_FLAGS --detailed-test-id
+
+    - name: Build firmware No. 8 - list tests
+      working-directory: zephyr
+      shell: bash
+      run: |
+        if [ "${{ runner.os }}" = "macOS" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
+        elif [ "${{ runner.os }}" = "Windows" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
+        fi
+        BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
+        ./scripts/twister -T tests/posix/common --list-tests $BASIC_FLAGS
+
+    - name: Build firmware No. 9 - report flags - dir, name, suffix, summary, all-options, filtered
+      working-directory: zephyr
+      shell: bash
+      run: |
+        if [ "${{ runner.os }}" = "macOS" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
+        elif [ "${{ runner.os }}" = "Windows" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
+        fi
+        BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
+        ./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --platform qemu_x86 --report-dir . --report-name test_name --report-suffix suffix --report-summary 0 --report-all-options --report-filtered $BASIC_FLAGS --detailed-test-id
+
+    - name: Build firmware No. 10 - force platform and toolchain, log level, timestamps, logfile
+      working-directory: zephyr
+      shell: bash
+      run: |
+        if [ "${{ runner.os }}" = "macOS" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
+        elif [ "${{ runner.os }}" = "Windows" ]; then
+          EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
+        fi
+        BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
+        ./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --force-platform --platform qemu_x86 --force-toolchain --log-level WARNING --log-file log.file $BASIC_FLAGS --detailed-test-id
+        rm log.file

.github/workflows/west_cmds.yml

@@ -36,7 +36,7 @@ jobs:
         os: [ubuntu-22.04, macos-14, windows-2022]
     steps:
     - name: checkout
-      uses: actions/checkout@de0fac2e4500dabe0009e67214ff5f5447ce83dd # v6.0.2
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
 
     - name: Set up Python ${{ matrix.python-version }}
       uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0

.gitignore

@@ -17,7 +17,6 @@
 build*/
 !doc/build/
 !scripts/build
-!share/sysbuild/build
 !tests/drivers/build_all
 !scripts/pylib/build_helpers
 cscope.*

.ruff-excludes.toml

@@ -5,6 +5,21 @@
 # remove entries for files that pass CI compliance testing.
 
 [lint.per-file-ignores]
+"./arch/x86/gen_gdt.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+]
+"./arch/x86/gen_idt.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP030",    # https://docs.astral.sh/ruff/rules/format-literals
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+]
+"./arch/x86/gen_mmu.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+    "UP034",    # https://docs.astral.sh/ruff/rules/extraneous-parentheses
+    "UP039",    # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
+]
 "./arch/x86/zefi/zefi.py" = [
     "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
     "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
@@ -119,8 +134,196 @@
     "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
     "SIM112",   # https://docs.astral.sh/ruff/rules/uncapitalized-environment-variables
 ]
+"./scripts/build/check_init_priorities.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "F401",     # https://docs.astral.sh/ruff/rules/unused-import
+    "F541",     # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+    "UP039",    # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
+]
+"./scripts/build/check_init_priorities_test.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+]
+"./scripts/build/elf_parser.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "SIM115",   # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
+]
+"./scripts/build/file2hex.py" = [
+    "B023",     # https://docs.astral.sh/ruff/rules/function-uses-loop-variable
+    "B905",     # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
+]
 "./scripts/build/gen_app_partitions.py" = [
     "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP030",    # https://docs.astral.sh/ruff/rules/format-literals
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
+]
+"./scripts/build/gen_cfb_font_header.py" = [
+    "E101",     # https://docs.astral.sh/ruff/rules/mixed-spaces-and-tabs
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
+]
+"./scripts/build/gen_device_deps.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
+]
+"./scripts/build/gen_image_info.py" = [
+    "F541",     # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "SIM115",   # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
+]
+"./scripts/build/gen_isr_tables.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
+]
+"./scripts/build/gen_isr_tables_parser_carrays.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "F541",     # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP030",    # https://docs.astral.sh/ruff/rules/format-literals
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
+]
+"./scripts/build/gen_isr_tables_parser_local.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "F541",     # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP030",    # https://docs.astral.sh/ruff/rules/format-literals
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
+]
+"./scripts/build/gen_kobject_list.py" = [
+    "E101",     # https://docs.astral.sh/ruff/rules/mixed-spaces-and-tabs
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "SIM102",   # https://docs.astral.sh/ruff/rules/collapsible-if
+    "SIM115",   # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
+    "SIM401",   # https://docs.astral.sh/ruff/rules/if-else-block-instead-of-dict-get
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
+    "W191",     # https://docs.astral.sh/ruff/rules/tab-indentation
+]
+"./scripts/build/gen_kobject_placeholders.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "SIM115",   # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
+]
+"./scripts/build/gen_offset_header.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+]
+"./scripts/build/gen_relocate_app.py" = [
+    "E101",     # https://docs.astral.sh/ruff/rules/mixed-spaces-and-tabs
+]
+"./scripts/build/gen_strerror_table.py" = [
+    "F541",     # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
+    "SIM105",   # https://docs.astral.sh/ruff/rules/suppressible-exception
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+]
+"./scripts/build/gen_strsignal_table.py" = [
+    "SIM105",   # https://docs.astral.sh/ruff/rules/suppressible-exception
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+]
+"./scripts/build/gen_symtab.py" = [
+    "B007",     # https://docs.astral.sh/ruff/rules/unused-loop-control-variable
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "F541",     # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+]
+"./scripts/build/gen_syscalls.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "E713",     # https://docs.astral.sh/ruff/rules/not-in-test
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
+]
+"./scripts/build/llext_inject_slids.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "SIM113",   # https://docs.astral.sh/ruff/rules/enumerate-for-loop
+    "SIM115",   # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
+    "UP039",    # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
+]
+"./scripts/build/llext_prepare_exptab.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "F541",     # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "SIM113",   # https://docs.astral.sh/ruff/rules/enumerate-for-loop
+    "SIM115",   # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
+    "UP039",    # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
+]
+"./scripts/build/mergehex.py" = [
+    "B904",     # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
+]
+"./scripts/build/parse_syscalls.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+]
+"./scripts/build/process_gperf.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+]
+"./scripts/build/subfolder_list.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+]
+"./scripts/build/uf2conv.py" = [
+    "B011",     # https://docs.astral.sh/ruff/rules/assert-false
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "E711",     # https://docs.astral.sh/ruff/rules/none-comparison
+    "E722",     # https://docs.astral.sh/ruff/rules/bare-except
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "SIM102",   # https://docs.astral.sh/ruff/rules/collapsible-if
+    "SIM103",   # https://docs.astral.sh/ruff/rules/needless-bool
+    "SIM118",   # https://docs.astral.sh/ruff/rules/in-dict-keys
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
+]
+"./scripts/ci/check_compliance.py" = [
+    "B904",     # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "E741",     # https://docs.astral.sh/ruff/rules/ambiguous-variable-name
+    "F401",     # https://docs.astral.sh/ruff/rules/unused-import
+    "SIM112",   # https://docs.astral.sh/ruff/rules/uncapitalized-environment-variables
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+]
+"./scripts/ci/coverage/coverage_analysis.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+]
+"./scripts/ci/errno.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+]
+"./scripts/ci/guideline_check.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
+]
+"./scripts/ci/stats/merged_prs.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+]
+"./scripts/ci/test_plan.py" = [
+    "B006",     # https://docs.astral.sh/ruff/rules/mutable-argument-default
+    "E401",     # https://docs.astral.sh/ruff/rules/multiple-imports-on-one-line
+    "E402",     # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "F541",     # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "SIM102",   # https://docs.astral.sh/ruff/rules/collapsible-if
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
 ]
 "./scripts/ci/upload_test_results_es.py" = [
     "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
@@ -128,14 +331,62 @@
     "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
     "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
 ]
-"./scripts/coredump/coredump_parser/elf_parser.py" = [
+"./scripts/ci/version_mgr.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
     "SIM115",   # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+]
+"./scripts/coredump/coredump_gdbserver.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+]
+"./scripts/coredump/coredump_parser/elf_parser.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "SIM115",   # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+    "UP039",    # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
 ]
 "./scripts/coredump/coredump_parser/log_parser.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
     "SIM115",   # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
+    "UP030",    # https://docs.astral.sh/ruff/rules/format-literals
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+    "UP032",    # https://docs.astral.sh/ruff/rules/f-string
 ]
 "./scripts/coredump/coredump_serial_log_parser.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
     "SIM115",   # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
+    "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
+]
+"./scripts/coredump/gdbstubs/arch/arm64.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP039",    # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
+]
+"./scripts/coredump/gdbstubs/arch/arm_cortex_m.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP039",    # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
+]
+"./scripts/coredump/gdbstubs/arch/risc_v.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP039",    # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
+]
+"./scripts/coredump/gdbstubs/arch/x86.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP039",    # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
+]
+"./scripts/coredump/gdbstubs/arch/x86_64.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP039",    # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
+]
+"./scripts/coredump/gdbstubs/arch/xtensa.py" = [
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "SIM113",   # https://docs.astral.sh/ruff/rules/enumerate-for-loop
+    "UP031",    # https://docs.astral.sh/ruff/rules/printf-string-formatting
+]
+"./scripts/coredump/gdbstubs/gdbstub.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
 ]
 "./scripts/dts/gen_defines.py" = [
     "B007",     # https://docs.astral.sh/ruff/rules/unused-loop-control-variable
@@ -310,14 +561,32 @@
     "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
     "UP015",    # https://docs.astral.sh/ruff/rules/redundant-open-modes
 ]
+"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/binary_adapter.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "SIM103",   # https://docs.astral.sh/ruff/rules/needless-bool
+]
+"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/device_adapter.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+]
 "./scripts/pylib/pytest-twister-harness/src/twister_harness/device/factory.py" = [
     "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
     "UP006",    # https://docs.astral.sh/ruff/rules/non-pep585-annotation
     "UP035",    # https://docs.astral.sh/ruff/rules/deprecated-import
 ]
 "./scripts/pylib/pytest-twister-harness/src/twister_harness/device/fifo_handler.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
     "SIM115",   # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
 ]
+"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/hardware_adapter.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+    "UP024",    # https://docs.astral.sh/ruff/rules/os-error-alias
+]
+"./scripts/pylib/pytest-twister-harness/src/twister_harness/device/qemu_adapter.py" = [
+    "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
+    "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
+]
 "./scripts/pylib/pytest-twister-harness/src/twister_harness/fixtures.py" = [
     "E501",     # https://docs.astral.sh/ruff/rules/line-too-long
     "I001",     # https://docs.astral.sh/ruff/rules/unsorted-imports
@@ -873,6 +1142,9 @@
 
 [format]
 exclude = [
+    "./arch/x86/gen_gdt.py",
+    "./arch/x86/gen_idt.py",
+    "./arch/x86/gen_mmu.py",
     "./arch/x86/zefi/zefi.py",
     "./boards/microchip/mec172xevb_assy6906/support/mec172x_remote_flasher.py",
     "./doc/_scripts/gen_devicetree_rest.py",
@@ -902,8 +1174,52 @@ exclude = [
     "./samples/subsys/testsuite/pytest/basic/pytest/conftest.py",
     "./samples/subsys/testsuite/pytest/basic/pytest/test_sample.py",
     "./samples/subsys/zbus/remote_mock/remote_mock.py",
+    "./scripts/build/check_init_priorities.py",
+    "./scripts/build/check_init_priorities_test.py",
+    "./scripts/build/elf_parser.py",
+    "./scripts/build/file2hex.py",
+    "./scripts/build/gen_app_partitions.py",
+    "./scripts/build/gen_cfb_font_header.py",
+    "./scripts/build/gen_device_deps.py",
+    "./scripts/build/gen_image_info.py",
+    "./scripts/build/gen_isr_tables.py",
+    "./scripts/build/gen_isr_tables_parser_carrays.py",
+    "./scripts/build/gen_isr_tables_parser_local.py",
+    "./scripts/build/gen_kobject_list.py",
+    "./scripts/build/gen_kobject_placeholders.py",
+    "./scripts/build/gen_offset_header.py",
+    "./scripts/build/gen_strerror_table.py",
+    "./scripts/build/gen_strsignal_table.py",
+    "./scripts/build/gen_symtab.py",
+    "./scripts/build/gen_syscalls.py",
+    "./scripts/build/llext_inject_slids.py",
+    "./scripts/build/llext_prepare_exptab.py",
+    "./scripts/build/mergehex.py",
+    "./scripts/build/parse_syscalls.py",
+    "./scripts/build/process_gperf.py",
+    "./scripts/build/subfolder_list.py",
+    "./scripts/build/uf2conv.py",
     "./scripts/check_maintainers.py",
+    "./scripts/ci/check_compliance.py",
+    "./scripts/ci/coverage/coverage_analysis.py",
+    "./scripts/ci/errno.py",
+    "./scripts/ci/guideline_check.py",
+    "./scripts/ci/stats/merged_prs.py",
+    "./scripts/ci/test_plan.py",
+    "./scripts/ci/twister_report_analyzer.py",
     "./scripts/ci/upload_test_results_es.py",
+    "./scripts/ci/version_mgr.py",
+    "./scripts/coredump/coredump_gdbserver.py",
+    "./scripts/coredump/coredump_parser/elf_parser.py",
+    "./scripts/coredump/coredump_parser/log_parser.py",
+    "./scripts/coredump/coredump_serial_log_parser.py",
+    "./scripts/coredump/gdbstubs/arch/arm64.py",
+    "./scripts/coredump/gdbstubs/arch/arm_cortex_m.py",
+    "./scripts/coredump/gdbstubs/arch/risc_v.py",
+    "./scripts/coredump/gdbstubs/arch/x86.py",
+    "./scripts/coredump/gdbstubs/arch/x86_64.py",
+    "./scripts/coredump/gdbstubs/arch/xtensa.py",
+    "./scripts/coredump/gdbstubs/gdbstub.py",
     "./scripts/dts/gen_defines.py",
     "./scripts/dts/gen_driver_kconfig_dts.py",
     "./scripts/dts/gen_dts_cmake.py",
@@ -934,10 +1250,24 @@ exclude = [
     "./scripts/list_boards.py",
     "./scripts/list_hardware.py",
     "./scripts/list_shields.py",
+    "./scripts/logging/dictionary/database_gen.py",
+    "./scripts/logging/dictionary/dictionary_parser/data_types.py",
+    "./scripts/logging/dictionary/dictionary_parser/log_database.py",
+    "./scripts/logging/dictionary/dictionary_parser/log_parser.py",
+    "./scripts/logging/dictionary/dictionary_parser/log_parser_v1.py",
+    "./scripts/logging/dictionary/dictionary_parser/log_parser_v3.py",
+    "./scripts/logging/dictionary/dictionary_parser/utils.py",
+    "./scripts/logging/dictionary/log_parser.py",
+    "./scripts/logging/dictionary/log_parser_uart.py",
     "./scripts/make_bugs_pickle.py",
     "./scripts/net/enumerate_http_status.py",
     "./scripts/profiling/stackcollapse.py",
     "./scripts/pylib/build_helpers/domains.py",
+    "./scripts/pylib/pytest-twister-harness/src/twister_harness/device/binary_adapter.py",
+    "./scripts/pylib/pytest-twister-harness/src/twister_harness/device/device_adapter.py",
+    "./scripts/pylib/pytest-twister-harness/src/twister_harness/device/fifo_handler.py",
+    "./scripts/pylib/pytest-twister-harness/src/twister_harness/device/hardware_adapter.py",
+    "./scripts/pylib/pytest-twister-harness/src/twister_harness/device/qemu_adapter.py",
     "./scripts/pylib/pytest-twister-harness/src/twister_harness/fixtures.py",
     "./scripts/pylib/pytest-twister-harness/src/twister_harness/helpers/mcumgr.py",
     "./scripts/pylib/pytest-twister-harness/src/twister_harness/plugin.py",
@@ -1031,6 +1361,7 @@ exclude = [
     "./scripts/utils/pinctrl_nrf_migrate.py",
     "./scripts/utils/twister_to_list.py",
     "./scripts/west_commands/bindesc.py",
+    "./scripts/west_commands/blobs.py",
     "./scripts/west_commands/boards.py",
     "./scripts/west_commands/build.py",
     "./scripts/west_commands/build_helpers.py",
@@ -1143,5 +1474,6 @@ exclude = [
     "./tests/net/socket/tls_configurations/pytest/test_app_vs_openssl.py",
     "./tests/net/socket/udp/generate-c-string.py",
     "./tests/subsys/debug/gdbstub/pytest/test_gdbstub.py",
+    "./tests/subsys/logging/dictionary/pytest/test_logging_dictionary.py",
     "./tests/ztest/ztest_param/pytest/test_parameters.py",
 ]

CMakeLists.txt

@@ -166,7 +166,7 @@ if(CONFIG_COMPILER_WARNINGS_AS_ERRORS)
   zephyr_link_libraries($<TARGET_PROPERTY:linker,warnings_as_errors>)
 endif()
 
-if(CONFIG_DEPRECATION_TEST OR NOT CONFIG_WARN_DEPRECATED)
+if(CONFIG_DEPRECATION_TEST)
   zephyr_compile_options($<$<COMPILE_LANGUAGE:C>:$<TARGET_PROPERTY:compiler,no_deprecation_warning>>)
   zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:$<TARGET_PROPERTY:compiler,no_deprecation_warning>>)
   zephyr_compile_options($<$<COMPILE_LANGUAGE:ASM>:$<TARGET_PROPERTY:asm,no_deprecation_warning>>)
@@ -311,15 +311,8 @@ compiler_simple_options(simple_options)
 toolchain_linker_add_compiler_options(${simple_options})
 
 if(CONFIG_LTO)
-  if(CONFIG_LTO_SINGLE_THREADED)
-    zephyr_compile_options($<TARGET_PROPERTY:compiler,optimization_lto_st>)
-    add_link_options($<TARGET_PROPERTY:linker,lto_arguments_st>)
-  else()
-    set(genex_tgt_lto "$<TARGET_PROPERTY:LTO>")
-    set(genex_lto "$<TARGET_PROPERTY:compiler,optimization_lto>")
-    zephyr_compile_options("$<$<OR:$<STREQUAL:${genex_tgt_lto},>,${genex_tgt_lto}>:${genex_lto}>")
-    add_link_options($<TARGET_PROPERTY:linker,lto_arguments>)
-  endif()
+  zephyr_compile_options($<TARGET_PROPERTY:compiler,optimization_lto>)
+  add_link_options($<TARGET_PROPERTY:linker,lto_arguments>)
 endif()
 
 if(CONFIG_STD_C23)
@@ -475,6 +468,8 @@ zephyr_compile_options(
   $<$<COMPILE_LANGUAGE:ASM>:-D_ASMLANGUAGE>
 )
 
+find_package(Deprecated COMPONENTS toolchain_ld_base)
+
 if(DEFINED TOOLCHAIN_LD_FLAGS)
   zephyr_ld_options(${TOOLCHAIN_LD_FLAGS})
 endif()
@@ -505,6 +500,8 @@ toolchain_ld_force_undefined_symbols(
 )
 
 if(NOT CONFIG_NATIVE_BUILD)
+  find_package(Deprecated COMPONENTS toolchain_ld_baremetal)
+
   zephyr_link_libraries(PROPERTY baremetal)
 
   # Note that some architectures will skip this flag if set to error, even
@@ -529,6 +526,10 @@ if(NOT CONFIG_NATIVE_BUILD)
 endif()
 
 if(CONFIG_CPP)
+  if(NOT CONFIG_MINIMAL_LIBCPP AND NOT CONFIG_NATIVE_LIBRARY)
+    find_package(Deprecated COMPONENTS toolchain_ld_cpp)
+  endif()
+
   zephyr_link_libraries(PROPERTY cpp_base)
 endif()
 
@@ -820,12 +821,12 @@ set(struct_tags_json ${CMAKE_CURRENT_BINARY_DIR}/misc/generated/struct_tags.json
 # The syscalls subdirs txt file is constructed by python containing a list of folders to use for
 # dependency handling, including empty folders.
 # Windows:  The list is used to specify DIRECTORY list with CMAKE_CONFIGURE_DEPENDS attribute.
-# Other OS: The list file is updated whenever a directory is added or removed.
+# Other OS: The list will update whenever a file is added/removed/modified and ensure a re-build.
 set(syscalls_subdirs_txt ${CMAKE_CURRENT_BINARY_DIR}/misc/generated/syscalls_subdirs.txt)
 
-# As syscalls_subdirs_txt is updated only on directory add or remove, this file can not be used for
-# monitoring of syscall changes. A trigger file is thus used for correct dependency handling. The
-# trigger file will update when syscalls change.
+# As syscalls_subdirs_txt is updated whenever a file is modified, this file can not be used for
+# monitoring of added / removed folders. A trigger file is thus used for correct dependency
+# handling. The trigger file will update when a folder is added / removed.
 set(syscalls_subdirs_trigger ${CMAKE_CURRENT_BINARY_DIR}/misc/generated/syscalls_subdirs.trigger)
 
 if(NOT (${CMAKE_HOST_SYSTEM_NAME} STREQUAL Windows))
@@ -844,13 +845,14 @@ execute_process(
 )
 file(STRINGS ${syscalls_subdirs_txt} PARSE_SYSCALLS_PATHS_DEPENDS ENCODING UTF-8)
 
-# Each header file must be monitored as file modifications are not reflected on directory level.
-file(GLOB_RECURSE PARSE_SYSCALLS_HEADER_DEPENDS ${ZEPHYR_BASE}/include/*.h)
-
 if(${CMAKE_HOST_SYSTEM_NAME} STREQUAL Windows)
   # On windows only adding/removing files or folders will be reflected in depends.
   # Hence adding a file requires CMake to re-run to add this file to the file list.
   set_property(DIRECTORY APPEND PROPERTY CMAKE_CONFIGURE_DEPENDS ${PARSE_SYSCALLS_PATHS_DEPENDS})
+
+  # Also On Windows each header file must be monitored as file modifications are not reflected
+  # on directory level.
+  file(GLOB_RECURSE PARSE_SYSCALLS_HEADER_DEPENDS ${ZEPHYR_BASE}/include/*.h)
 else()
   # The syscall parsing depends on the folders in order to detect add/removed/modified files.
   # When a folder is removed, CMake will try to find a target that creates that dependency.
@@ -881,10 +883,10 @@ else()
     file(WRITE ${syscalls_subdirs_txt} "")
   endif()
 
-  # On other OS'es, using git checkout is reflected on the folder timestamp and hence detected
+  # On other OS'es, modifying a file is reflected on the folder timestamp and hence detected
   # when using depend on directory level.
   # Thus CMake only needs to re-run when sub-directories are added / removed, which is indicated
-  # by syscalls_subdirs_txt being updated.
+  # using a trigger file.
   set_property(DIRECTORY APPEND PROPERTY CMAKE_CONFIGURE_DEPENDS ${syscalls_subdirs_txt})
 endif()
 
@@ -2287,7 +2289,7 @@ endif()
 add_custom_command(
   TARGET ${logical_target_for_zephyr_elf}
   POST_BUILD
-  COMMAND ${CMAKE_COMMAND} -E echo "Generating files from ${PROJECT_BINARY_DIR}/${KERNEL_ELF_NAME} for board: ${BOARD}${BOARD_QUALIFIERS}"
+  COMMAND ${CMAKE_COMMAND} -E echo "Generating files from ${PROJECT_BINARY_DIR}/${KERNEL_ELF_NAME} for board: ${BOARD}"
   ${post_build_commands}
   BYPRODUCTS
   ${post_build_byproducts}

CODE_OF_CONDUCT.md

@@ -1,4 +1,4 @@
-# Zephyr Project Code of Conduct
+# Contributor Covenant Code of Conduct
 
 ## Our Pledge
 

Kconfig.zephyr

@@ -9,10 +9,6 @@ source "Kconfig.constants"
 
 osource "$(APPLICATION_SOURCE_DIR)/VERSION"
 
-# This should be sourced early since the autogen Kconfig.dts options
-# and macros may get used by shields/boards/SoC defconfig or modules.
-source "dts/Kconfig"
-
 # Include Kconfig.defconfig files first so that they can override defaults and
 # other symbol/choice properties by adding extra symbol/choice definitions.
 # After merging all definitions for a symbol/choice, Kconfig picks the first
@@ -37,6 +33,10 @@ osource "$(TOOLCHAIN_KCONFIG_DIR)/Kconfig.defconfig"
 # This loads the testsuite defconfig
 source "subsys/testsuite/Kconfig.defconfig"
 
+# This should be early since the autogen Kconfig.dts symbols may get
+# used by modules
+source "dts/Kconfig"
+
 menu "Modules"
 
 source "modules/Kconfig"
@@ -357,19 +357,18 @@ menu "Compiler Options"
 
 config REQUIRES_STD_C99
 	bool
-	select DEPRECATED
 	help
 	  Hidden option to select compiler support C99 standard or higher.
 
 config REQUIRES_STD_C11
 	bool
-	select DEPRECATED
 	select REQUIRES_STD_C99
 	help
 	  Hidden option to select compiler support C11 standard or higher.
 
 config REQUIRES_STD_C17
 	bool
+	select REQUIRES_STD_C11
 	help
 	  Hidden option to select compiler support C17 standard or higher.
 
@@ -382,28 +381,27 @@ config REQUIRES_STD_C23
 choice STD_C
 	prompt "C Standard"
 	default STD_C23 if REQUIRES_STD_C23
-	default STD_C17
+	default STD_C17 if REQUIRES_STD_C17
+	default STD_C11 if REQUIRES_STD_C11
+	default STD_C99
 	help
 	  C Standards.
 
 config STD_C90
-	bool "C90 [DEPRECATED]"
-	select DEPRECATED
+	bool "C90"
 	depends on !REQUIRES_STD_C99
 	help
 	  1989 C standard as completed in 1989 and ratified by ISO/IEC
 	  as ISO/IEC 9899:1990. This version is known as "ANSI C".
 
 config STD_C99
-	bool "C99 [DEPRECATED]"
-	select DEPRECATED
+	bool "C99"
 	depends on !REQUIRES_STD_C11
 	help
 	  1999 C standard.
 
 config STD_C11
-	bool "C11 [DEPRECATED]"
-	select DEPRECATED
+	bool "C11"
 	depends on !REQUIRES_STD_C17
 	help
 	  2011 C standard.
@@ -531,14 +529,6 @@ config LTO
 	help
 	  This option enables Link Time Optimization.
 
-config LTO_SINGLE_THREADED
-	bool "Single-threaded LTO"
-	depends on LTO
-	help
-	  This option instructs the linker to use a single thread to process
-	  LTO. See the following issue for more info:
-	  https://github.com/zephyrproject-rtos/sdk-ng/issues/1038
-
 config COMPILER_WARNINGS_AS_ERRORS
 	bool "Treat warnings as errors"
 	help
@@ -1021,8 +1011,7 @@ config WARN_DEPRECATED
 	prompt "Warn on deprecated usage"
 	help
 	  Print a warning when the Kconfig tree is parsed if any deprecated
-	  features are enabled, or at compile time, when deprecated macros or
-	  symbols are used.
+	  features are enabled.
 
 config EXPERIMENTAL
 	bool
@@ -1072,6 +1061,8 @@ menu "Boot Options"
 
 config IS_BOOTLOADER
 	bool "Act as a bootloader"
+	depends on XIP
+	depends on ARM
 	help
 	  This option indicates that Zephyr will act as a bootloader to execute
 	  a separate Zephyr image payload.

REUSE.toml

@@ -1,6 +1,6 @@
 version = 1
 
-# Declare default license and copyright text for files that typically do not or cannot include them.
+# Declare default license and copyright text for files that typically do not include them.
 [[annotations]]
 path = [
     # zephyr-keep-sorted-start
@@ -9,7 +9,6 @@ path = [
     "**/*.conf",
     "**/*.ecl",
     "**/*.html",
-    "**/*.json",
     "**/*.rst",
     "**/*.yaml",
     "**/*.yml",

VERSION

@@ -1,5 +1,5 @@
 VERSION_MAJOR = 4
 VERSION_MINOR = 3
-PATCHLEVEL = 99
+PATCHLEVEL = 0
 VERSION_TWEAK = 0
 EXTRAVERSION =

arch/Kconfig

@@ -137,8 +137,6 @@ config XTENSA
 	select THREAD_STACK_INFO
 	select ARCH_HAS_THREAD_PRIV_STACK_SPACE_GET if USERSPACE
 	select ARCH_SUPPORTS_COREDUMP_STACK_PTR if !SMP
-	select ARCH_HAS_USERSPACE if XTENSA_MMU || XTENSA_MPU
-	imply ARCH_HAS_RESERVED_PAGE_FRAMES if XTENSA_MMU
 	help
 	  Xtensa architecture
 
@@ -155,6 +153,12 @@ config ARCH_POSIX
 	select BARRIER_OPERATIONS_BUILTIN
 	# POSIX arch based targets get their memory cleared on entry by the host OS
 	select SKIP_BSS_CLEAR
+	# Override the C standard used for compilation to C 2011
+	# This is due to some tests using _Static_assert which is a 2011 feature, but
+	# otherwise relying on compilers supporting it also when set to C99.
+	# This was in general ok, but with some host compilers and C library versions
+	# it led to problems. So we override it to 2011 for the native targets.
+	select REQUIRES_STD_C11
 	help
 	  POSIX (native) architecture
 
@@ -760,6 +764,13 @@ config ARCH_HAS_EXTRA_EXCEPTION_INFO
 config ARCH_HAS_GDBSTUB
 	bool
 
+config ARCH_HAS_COHERENCE
+	bool
+	help
+	  When selected, the architecture supports the
+	  arch_mem_coherent() API and can link into incoherent/cached
+	  memory using the ".cached" linker section.
+
 config ARCH_HAS_THREAD_LOCAL_STORAGE
 	bool
 
@@ -1078,22 +1089,10 @@ config ICACHE
 	help
 	  This option enables the support for the instruction cache (i-cache).
 
-config CACHE_HAS_MIRRORED_MEMORY_REGIONS
-	bool "Mirrored memory region(s) for both cached and uncached access"
-	depends on CPU_CACHE_INCOHERENT
-	help
-	  Enable this if hardware has mirrored memory regions at different
-	  addressed when accessing one would go through cache, but accessing
-	  the other would go to memory directly. A pointer can be cheaply
-	  converted to cached or uncached access.
-
-	  This applies to intra-CPU multiprocessing incoherence and makes only
-	  sense when MP_MAX_NUM_CPUS > 1.
-
 config CACHE_DOUBLEMAP
 	bool "Cache double-mapping support"
-	select CACHE_HAS_MIRRORED_MEMORY_REGIONS
-	select DEPRECATED
+	depends on CPU_CACHE_INCOHERENT
+	default y
 	help
 	  Double-mapping behavior where a pointer can be cheaply converted to
 	  point to the same cached/uncached memory at different locations.
@@ -1171,14 +1170,6 @@ config ARCH_CACHE
 	help
 	  Integrated on-core cache controller
 
-config SOC_CACHE
-	bool "SoC specific cache controller"
-	depends on SOC_HAS_CACHE_FUNCTIONS
-	help
-	  SoC specific cache controller.
-
-	  This requires soc_cache.h file to exist in search path.
-
 config EXTERNAL_CACHE
 	bool "External cache controller"
 	help
@@ -1186,14 +1177,6 @@ config EXTERNAL_CACHE
 
 endchoice
 
-config CACHE_CAN_SAY_MEM_COHERENCE
-	bool
-	help
-	  sys_cache_is_mem_coherent() is defined when enabled. This function can be
-	  used to determine if a pointer lies inside "coherence regions" and can be
-	  safely used in multiprocessor code without explicit flush or invalidate
-	  operations.
-
 endif # CACHE_MANAGEMENT
 
 endmenu

arch/arc/core/smp.c

@@ -117,7 +117,9 @@ void arch_secondary_cpu_init(int cpu_num)
 	irq_enable(DT_IRQN(DT_NODELABEL(ici)));
 #endif
 
+#ifdef CONFIG_SOC_PER_CORE_INIT_HOOK
 	soc_per_core_init_hook();
+#endif /* CONFIG_SOC_PER_CORE_INIT_HOOK */
 
 	/* call the function set by arch_cpu_start */
 	fn = arc_cpu_init[cpu_num].fn;

arch/arc/core/thread.c

@@ -318,7 +318,7 @@ void arc_dsp_disable(struct k_thread *thread, unsigned int options)
 	k_spinlock_key_t key = k_spin_lock(&lock);
 
 	/* Disable DSP or AGU capabilities for the thread */
-	thread->base.user_options &= ~(uint16_t)options;
+	thread->base.user_options &= ~(uint8_t)options;
 
 	k_spin_unlock(&lock, key);
 }
@@ -329,7 +329,7 @@ void arc_dsp_enable(struct k_thread *thread, unsigned int options)
 	k_spinlock_key_t key = k_spin_lock(&lock);
 
 	/* Enable dsp or agu capabilities for the thread */
-	thread->base.user_options |= (uint16_t)options;
+	thread->base.user_options |= (uint8_t)options;
 
 	k_spin_unlock(&lock, key);
 }

arch/arc/include/kernel_arch_func.h

@@ -36,7 +36,9 @@ static ALWAYS_INLINE void arch_kernel_init(void)
 {
 	z_irq_setup();
 
+#ifdef CONFIG_SOC_PER_CORE_INIT_HOOK
 	soc_per_core_init_hook();
+#endif /* CONFIG_SOC_PER_CORE_INIT_HOOK */
 }
 
 

arch/arc/include/v2/irq.h

@@ -68,7 +68,7 @@ static ALWAYS_INLINE void z_irq_setup(void)
 
 #ifdef CONFIG_ARC_NORMAL_FIRMWARE
 	/* normal mode cannot write irq_ctrl, ignore it */
-	ARG_UNUSED(aux_irq_ctrl_value);
+	aux_irq_ctrl_value = aux_irq_ctrl_value;
 #else
 	z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_CTRL, aux_irq_ctrl_value);
 #endif

arch/arm/Kconfig

@@ -190,43 +190,4 @@ config HAS_SWO
 	help
 	  When enabled, indicates that SoC has an SWO output
 
-DT_CHOSEN_Z_DTCM := zephyr,dtcm
-DT_CHOSEN_Z_ITCM := zephyr,itcm
-
-choice
-	prompt "Vector table memory location"
-	depends on SRAM_VECTOR_TABLE
-	default ARM_VECTOR_TABLE_SRAM
-
-config ARM_VECTOR_TABLE_SRAM
-	bool "Place the vector table in DT Chosen SRAM instead of DT Chosen Flash"
-	help
-	  When executing in place (XiP), selecting this option will result in the
-	  interrupt vector table being relocated from DT 'zephyr,flash' chosen
-	  memory to DT 'zephyr,sram' chosen memory.
-
-config ARM_VECTOR_TABLE_DTCM
-	bool "Place the vector table in DT Chosen DTCM instead of DT Chosen Flash"
-	depends on $(dt_chosen_enabled,$(DT_CHOSEN_Z_DTCM))
-	help
-	  When executing in place (XiP), selecting this option will result in the
-	  interrupt vector table being relocated from DT 'zephyr,flash' chosen
-	  memory to DT 'zephyr,dtcm' chosen memory. While the vector table is
-	  instruction-fetched during exception entry, a DTCM option is provided
-	  for systems where ITCM is unavailable. DTCM still offers low-latency,
-	  deterministic access compared to normal RAM, but is not the optimal
-	  location for instruction fetch performance.
-
-config ARM_VECTOR_TABLE_ITCM
-	bool "Place the vector table in DT Chosen ITCM instead of DT Chosen Flash"
-	depends on $(dt_chosen_enabled,$(DT_CHOSEN_Z_ITCM))
-	help
-	  When executing in place (XiP), selecting this option will result in the
-	  interrupt vector table being relocated from DT 'zephyr,flash' chosen
-	  memory to DT 'zephyr,itcm' chosen memory. ITCM provides single-cycle,
-	  deterministic instruction fetches via the CPU instruction bus, it offers
-	  the lowest interrupt latency and is the preferred location when available.
-
-endchoice
-
 endmenu

arch/arm/core/cortex_a_r/smp.c

@@ -98,18 +98,18 @@ void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz, arch_cpustart_
 {
 	int cpu_count, i, j;
 	uint32_t cpu_mpid = 0;
-	uint32_t primary_core_mpid;
+	uint32_t master_core_mpid;
 
-	/* Now it is on primary core */
+	/* Now it is on master core */
 	__ASSERT(arch_curr_cpu()->id == 0, "");
-	primary_core_mpid = MPIDR_TO_CORE(GET_MPIDR());
+	master_core_mpid = MPIDR_TO_CORE(GET_MPIDR());
 
 	cpu_count = ARRAY_SIZE(cpu_node_list);
 	__ASSERT(cpu_count == CONFIG_MP_MAX_NUM_CPUS,
 		"The count of CPU Cores nodes in dts is not equal to CONFIG_MP_MAX_NUM_CPUS\n");
 
 	for (i = 0, j = 0; i < cpu_count; i++) {
-		if (cpu_node_list[i] == primary_core_mpid) {
+		if (cpu_node_list[i] == master_core_mpid) {
 			continue;
 		}
 		if (j == cpu_num - 1) {
@@ -199,7 +199,9 @@ void arch_secondary_cpu_init(void)
 	 */
 #endif
 
+#ifdef CONFIG_SOC_PER_CORE_INIT_HOOK
 	soc_per_core_init_hook();
+#endif /* CONFIG_SOC_PER_CORE_INIT_HOOK */
 
 	fn = arm_cpu_boot_params.fn;
 	arg = arm_cpu_boot_params.arg;

arch/arm/core/cortex_a_r/swap_helper.S

@@ -69,7 +69,7 @@ SECTION_FUNC(TEXT, z_arm_do_swap)
     cps #MODE_SVC
 
 #if defined(CONFIG_FPU_SHARING)
-    ldrh r0, [r2, #_thread_offset_to_user_options]
+    ldrb r0, [r2, #_thread_offset_to_user_options]
     tst r0, #K_FP_REGS /* _current->base.user_options & K_FP_REGS */
     beq out_fp_inactive
 
@@ -151,7 +151,7 @@ out_fp_inactive:
     cps #MODE_SVC
 
 #if defined(CONFIG_FPU_SHARING)
-    ldrh r0, [r2, #_thread_offset_to_user_options]
+    ldrb r0, [r2, #_thread_offset_to_user_options]
     tst r0, #K_FP_REGS /* _current->base.user_options & K_FP_REGS */
     beq in_fp_inactive
 

arch/arm/core/cortex_m/CMakeLists.txt

@@ -49,9 +49,9 @@ if(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
 endif()
 
 if(CONFIG_CORTEX_M_DWT)
-  if(CONFIG_TIMING_FUNCTIONS)
-    zephyr_library_sources(timing.c)
-  endif()
+	if(CONFIG_TIMING_FUNCTIONS)
+		zephyr_library_sources(timing.c)
+	endif()
 endif()
 
 if(CONFIG_SW_VECTOR_RELAY)

arch/arm/core/cortex_m/Kconfig

@@ -192,7 +192,6 @@ config CPU_CORTEX_M_HAS_CMSE
 
 config ARMV6_M_ARMV8_M_BASELINE
 	bool
-	select ATOMIC_OPERATIONS_BUILTIN if ARMV8_M_BASELINE
 	select ATOMIC_OPERATIONS_C if !ARMV8_M_BASELINE
 	select ISA_THUMB2
 	help

arch/arm/core/cortex_m/ram_vector_table.ld

@@ -28,11 +28,5 @@ SECTION_PROLOGUE(.sram_vt,,)
 	. += _vector_end - _vector_start;
 	MPU_ALIGN(_sram_vector_size);
 	_sram_vector_end = .;
-#if defined(CONFIG_ARM_VECTOR_TABLE_ITCM)
-} GROUP_DATA_LINK_IN(ITCM, ROMABLE_REGION)
-#elif defined(CONFIG_ARM_VECTOR_TABLE_DTCM)
-} GROUP_DATA_LINK_IN(DTCM, ROMABLE_REGION)
-#else
 } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
-#endif
 _sram_vector_size = _sram_vector_end - _sram_vector_start;

arch/arm/core/cortex_m/swap_helper.S

@@ -460,36 +460,28 @@ SECTION_FUNC(TEXT, z_arm_svc)
 .L_oops:
     push {r0, lr}
 #if defined(CONFIG_EXTRA_EXCEPTION_INFO)
+#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
     /* Build _callee_saved_t. To match the struct
      * definition we push the psp & then r11-r4
      */
     mrs r1, PSP
-    push {r1, r2} /* r2 for padding */
-#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
+    push {r1, r2}
     push {r4-r11}
-#elif defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
-    mov  r1, r10
-    mov  r2, r11
-    push {r1, r2}
-    mov  r1, r8
-    mov  r2, r9
-    push {r1, r2}
-    push {r4-r7}
-#else
-#error Unknown ARM architecture
-#endif
     mov  r1, sp /* pointer to _callee_saved_t */
+#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE */
 #endif /* CONFIG_EXTRA_EXCEPTION_INFO */
     mov r2, lr /* EXC_RETURN */
     bl z_do_kernel_oops
     /* return from SVC exception is done here */
 #if defined(CONFIG_EXTRA_EXCEPTION_INFO)
+#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
     /* We do not need to restore any register state here
      * because we did not use any callee-saved registers
      * in this routine. Therefore, we can just reset
      * the MSP to its value prior to entering the function
      */
     add sp, #40
+#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE */
 #endif /* CONFIG_EXTRA_EXCEPTION_INFO */
     pop {r0, pc}
 

arch/arm/core/cortex_m/timing.c

@@ -75,7 +75,7 @@ static inline uint64_t z_arm_dwt_freq_get(void)
 		dwt_frequency = (cyc_freq * ddwt) / dcyc;
 	}
 	return dwt_frequency;
-#endif
+#endif /* CONFIG_SOC_FAMILY_NORDIC_NRF */
 }
 
 void arch_timing_init(void)

arch/arm/core/fatal.c

@@ -137,11 +137,21 @@ void z_do_kernel_oops(const struct arch_esf *esf, _callee_saved_t *callee_regs,
 	struct arch_esf esf_copy;
 
 	memcpy(&esf_copy, esf, offsetof(struct arch_esf, extra_info));
-	/* extra exception info is collected in callee_reg. */
+#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
+	/* extra exception info is collected in callee_reg param
+	 * on CONFIG_ARMV7_M_ARMV8_M_MAINLINE
+	 */
 
 	esf_copy.extra_info = (struct __extra_esf_info) {
 		.callee = callee_regs,
 	};
+#else
+	/* extra exception info is not collected for kernel oops
+	 * path today so we make a copy of the ESF and zero out
+	 * that information
+	 */
+	esf_copy.extra_info = (struct __extra_esf_info) { 0 };
+#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE */
 
 	z_arm_fatal_error(reason, &esf_copy);
 #endif /* CONFIG_EXTRA_EXCEPTION_INFO */

arch/arm/core/mpu/Kconfig

@@ -79,12 +79,6 @@ config ARM_MPU_PXN
 	  unprivileged mode and executing such region from privileged mode will
 	  result in a Memory Management fault.
 
-config ARM_MPU_SRAM_WRITE_THROUGH
-	bool "Use Write-Through cache policy for SRAM regions"
-	help
-	  When enabled, SRAM regions will use Write-Through cache policy
-	  instead of the default Write-Back policy.
-
 endif # ARM_MPU
 
 endif # CPU_HAS_MPU

arch/arm/core/mpu/arm_mpu.c

@@ -156,11 +156,6 @@ static int mpu_configure_regions_from_dt(uint8_t *reg_index)
 		case DT_MEM_ARM_MPU_EXTMEM:
 			region_conf = _BUILD_REGION_CONF(region[idx], REGION_EXTMEM_ATTR);
 			break;
-#endif
-#ifdef REGION_RAM_WT_ATTR
-		case DT_MEM_ARM_MPU_RAM_WT:
-			region_conf = _BUILD_REGION_CONF(region[idx], REGION_RAM_WT_ATTR);
-			break;
 #endif
 		default:
 			/* Attribute other than ARM-specific is set.
@@ -210,11 +205,11 @@ static int mpu_configure_region(const uint8_t index,
 	!defined(CONFIG_MPU_GAP_FILLING)
 /* This internal function programs a set of given MPU regions
  * over a background memory area, optionally performing a
- * coherence check of the memory regions to be programmed.
+ * sanity check of the memory regions to be programmed.
  */
 static int mpu_configure_regions(const struct z_arm_mpu_partition
 	regions[], uint8_t regions_num, uint8_t start_reg_index,
-	bool do_coherence_check)
+	bool do_sanity_check)
 {
 	int i;
 	int reg_index = start_reg_index;
@@ -225,9 +220,9 @@ static int mpu_configure_regions(const struct z_arm_mpu_partition
 		}
 		/* Non-empty region. */
 
-		if (do_coherence_check &&
+		if (do_sanity_check &&
 				(!mpu_partition_is_valid(&regions[i]))) {
-			LOG_ERR("Partition %u: coherence check failed.", i);
+			LOG_ERR("Partition %u: sanity check failed.", i);
 			return -EINVAL;
 		}
 
@@ -620,7 +615,7 @@ int z_arm_mpu_init(void)
 #endif
 #endif /* CONFIG_NULL_POINTER_EXCEPTION_DETECTION_MPU */
 
-	/* Coherence check for number of regions in Cortex-M0+, M3, and M4. */
+	/* Sanity check for number of regions in Cortex-M0+, M3, and M4. */
 #if defined(CONFIG_CPU_CORTEX_M0PLUS) || \
 	defined(CONFIG_CPU_CORTEX_M3) || \
 	defined(CONFIG_CPU_CORTEX_M4)

arch/arm/core/mpu/arm_mpu_regions.c

@@ -9,12 +9,6 @@
 
 #include <zephyr/arch/arm/mpu/arm_mpu_mem_cfg.h>
 
-#ifdef CONFIG_ARM_MPU_SRAM_WRITE_THROUGH
-#define ARM_MPU_SRAM_REGION_ATTR  REGION_RAM_WT_ATTR
-#else
-#define ARM_MPU_SRAM_REGION_ATTR  REGION_RAM_ATTR
-#endif
-
 static const struct arm_mpu_region mpu_regions[] = {
 #ifdef CONFIG_XIP
 	/* Region 0 */
@@ -32,10 +26,10 @@ static const struct arm_mpu_region mpu_regions[] = {
 	MPU_REGION_ENTRY("SRAM_0",
 			 CONFIG_SRAM_BASE_ADDRESS,
 #if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
-			 ARM_MPU_SRAM_REGION_ATTR(CONFIG_SRAM_BASE_ADDRESS,
+			 REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS, \
 				 CONFIG_SRAM_SIZE * 1024)),
 #else
-			 ARM_MPU_SRAM_REGION_ATTR(REGION_SRAM_SIZE)),
+			 REGION_RAM_ATTR(REGION_SRAM_SIZE)),
 #endif
 };
 

arch/arm/core/mpu/arm_mpu_v7_internal.h

@@ -52,9 +52,9 @@ static void region_init(const uint32_t index,
 #endif
 }
 
-/* @brief Partition coherence check
+/* @brief Partition sanity check
  *
- * This internal function performs run-time coherence check for
+ * This internal function performs run-time sanity check for
  * MPU region start address and size.
  *
  * @param part Pointer to the data structure holding the partition
@@ -207,7 +207,7 @@ static int mpu_configure_region(const uint8_t index,
 
 static int mpu_configure_regions(const struct z_arm_mpu_partition
 	regions[], uint8_t regions_num, uint8_t start_reg_index,
-	bool do_coherence_check);
+	bool do_sanity_check);
 
 /* This internal function programs the static MPU regions.
  *

arch/arm/core/mpu/arm_mpu_v8_internal.h

@@ -184,9 +184,9 @@ static void region_init(const uint32_t index,
 			region_conf->attr.mair_idx, region_conf->attr.r_limit);
 }
 
-/* @brief Partition coherence check
+/* @brief Partition sanity check
  *
- * This internal function performs run-time coherence check for
+ * This internal function performs run-time sanity check for
  * MPU region start address and size.
  *
  * @param part Pointer to the data structure holding the partition
@@ -519,19 +519,19 @@ static int mpu_configure_region(const uint8_t index,
 #if !defined(CONFIG_MPU_GAP_FILLING)
 static int mpu_configure_regions(const struct z_arm_mpu_partition
 	regions[], uint8_t regions_num, uint8_t start_reg_index,
-	bool do_coherence_check);
+	bool do_sanity_check);
 #endif
 
 /* This internal function programs a set of given MPU regions
  * over a background memory area, optionally performing a
- * coherence check of the memory regions to be programmed.
+ * sanity check of the memory regions to be programmed.
  *
  * The function performs a full partition of the background memory
  * area, effectively, leaving no space in this area uncovered by MPU.
  */
 static int mpu_configure_regions_and_partition(const struct z_arm_mpu_partition
 	regions[], uint8_t regions_num, uint8_t start_reg_index,
-	bool do_coherence_check)
+	bool do_sanity_check)
 {
 	int i;
 	int reg_index = start_reg_index;
@@ -542,9 +542,9 @@ static int mpu_configure_regions_and_partition(const struct z_arm_mpu_partition
 		}
 		/* Non-empty region. */
 
-		if (do_coherence_check &&
+		if (do_sanity_check &&
 			(!mpu_partition_is_valid(&regions[i]))) {
-			LOG_ERR("Partition %u: coherence check failed.", i);
+			LOG_ERR("Partition %u: sanity check failed.", i);
 			return -EINVAL;
 		}
 

arch/arm/core/mpu/nxp_mpu.c

@@ -51,9 +51,9 @@ static inline uint8_t get_num_regions(void)
 	return FSL_FEATURE_SYSMPU_DESCRIPTOR_COUNT;
 }
 
-/* @brief Partition coherence check
+/* @brief Partition sanity check
  *
- * This internal function performs run-time coherence check for
+ * This internal function performs run-time sanity check for
  * MPU region start address and size.
  *
  * @param part Pointer to the data structure holding the partition
@@ -297,11 +297,11 @@ static int mpu_sram_partitioning(uint8_t index,
 
 /* This internal function programs a set of given MPU regions
  * over a background memory area, optionally performing a
- * coherence check of the memory regions to be programmed.
+ * sanity check of the memory regions to be programmed.
  */
 static int mpu_configure_regions(const struct z_arm_mpu_partition regions[],
 				 uint8_t regions_num, uint8_t start_reg_index,
-				 bool do_coherence_check)
+				 bool do_sanity_check)
 {
 	int i;
 	int reg_index = start_reg_index;
@@ -312,9 +312,9 @@ static int mpu_configure_regions(const struct z_arm_mpu_partition regions[],
 		}
 		/* Non-empty region. */
 
-		if (do_coherence_check &&
+		if (do_sanity_check &&
 				(!mpu_partition_is_valid(&regions[i]))) {
-			LOG_ERR("Partition %u: coherence check failed.", i);
+			LOG_ERR("Partition %u: sanity check failed.", i);
 			return -EINVAL;
 		}
 

arch/arm/core/vector_table.ld

@@ -1,6 +1,5 @@
 /*
  * Copyright (c) 2019 - 2020 Nordic Semiconductor ASA
- * Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -58,8 +57,4 @@ INCLUDE isr_tables_vt.ld
 KEEP(*(.vectors))
 #endif
 
-#ifdef CONFIG_CPU_AARCH32_CORTEX_R
-KEEP(*(._bindesc_entry.*))
-#endif
-
 _vector_end = .;

arch/arm/include/cortex_a_r/kernel_arch_func.h

@@ -31,7 +31,9 @@ extern "C" {
 
 static ALWAYS_INLINE void arch_kernel_init(void)
 {
+#ifdef CONFIG_SOC_PER_CORE_INIT_HOOK
 	soc_per_core_init_hook();
+#endif /* CONFIG_SOC_PER_CORE_INIT_HOOK */
 }
 
 #ifndef CONFIG_USE_SWITCH

arch/arm/include/cortex_m/dwt.h

@@ -82,7 +82,7 @@ static inline void dwt_access(bool ena)
 static inline int z_arm_dwt_init(void)
 {
 	/* Enable tracing */
-	DCB->DEMCR |= DCB_DEMCR_TRCENA_Msk;
+	CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
 
 	/* Unlock DWT access if any */
 	dwt_access(true);
@@ -149,7 +149,7 @@ static inline void z_arm_dwt_enable_debug_monitor(void)
 	 * unpredictable if the DebugMonitor exception is triggered. We
 	 * assert that the CPU is in normal mode.
 	 */
-	__ASSERT((DCB->DHCSR & DCB_DHCSR_C_DEBUGEN_Msk) == 0,
+	__ASSERT((CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk) == 0,
 		 "Cannot enable DBM when CPU is in Debug mode\n");
 
 #if defined(CONFIG_ARMV8_M_SE) && !defined(CONFIG_ARM_NONSECURE_FIRMWARE)
@@ -160,7 +160,7 @@ static inline void z_arm_dwt_enable_debug_monitor(void)
 	 * when enabling the DebugMonitor exception, assert that
 	 * it is not targeting the Non Secure domain.
 	 */
-	__ASSERT((DCB->DEMCR & DCB_DEMCR_SDME_Msk) != 0, "DebugMonitor targets Non-Secure\n");
+	__ASSERT((CoreDebug->DEMCR & DCB_DEMCR_SDME_Msk) != 0, "DebugMonitor targets Non-Secure\n");
 #endif
 
 	/* The DebugMonitor handler priority is set already
@@ -169,7 +169,7 @@ static inline void z_arm_dwt_enable_debug_monitor(void)
 	 */
 
 	/* Enable debug monitor exception triggered on debug events */
-	DCB->DEMCR |= DCB_DEMCR_MON_EN_Msk;
+	CoreDebug->DEMCR |= CoreDebug_DEMCR_MON_EN_Msk;
 }
 
 #endif /* CONFIG_CORTEX_M_DWT */

arch/arm/include/cortex_m/kernel_arch_func.h

@@ -57,7 +57,9 @@ static ALWAYS_INLINE void arch_kernel_init(void)
 	z_arm_configure_static_mpu_regions();
 #endif /* CONFIG_ARM_MPU */
 
+#ifdef CONFIG_SOC_PER_CORE_INIT_HOOK
 	soc_per_core_init_hook();
+#endif /* CONFIG_SOC_PER_CORE_INIT_HOOK */
 }
 
 static ALWAYS_INLINE void arch_thread_return_value_set(struct k_thread *thread, unsigned int value)

arch/arm64/core/Kconfig

@@ -79,26 +79,6 @@ config CPU_CORTEX_A78
 	help
 	  This option signifies the use of a Cortex-A78 CPU
 
-config CPU_CORTEX_A510
-	bool
-	select CPU_CORTEX_A
-	select ARMV9_A
-	help
-	  This option signifies the use of a Cortex-A510 CPU, which is Arm's
-	  efficiency core implementing the ARMv9-A architecture. It provides
-	  power-efficient processing optimized for embedded applications with
-	  ARMv9-A features.
-
-config CPU_CORTEX_A320
-	bool
-	select CPU_CORTEX_A
-	select ARMV9_A
-	help
-	  This option signifies the use of a Cortex-A320 CPU, which implements
-	  the ARMv9.2-A architecture. It provides advanced features including
-	  enhanced SVE2, improved security extensions, and specialized performance
-	  optimizations.
-
 config CPU_CORTEX_R82
 	bool
 	select CPU_AARCH64_CORTEX_R
@@ -121,15 +101,10 @@ config MAIN_STACK_SIZE
 config IDLE_STACK_SIZE
 	default 4096
 
-config PRIVILEGED_STACK_SIZE
-	default 4096 if FPU_SHARING
-	default 2048
-
 config ISR_STACK_SIZE
 	default 4096
 
 config TEST_EXTRA_STACK_SIZE
-	default 4096 if FPU_SHARING
 	default 2048
 
 config SYSTEM_WORKQUEUE_STACK_SIZE
@@ -176,6 +151,21 @@ config ARM64_SAFE_EXCEPTION_STACK
 	  used for user stack overflow checking, because kernel stack support
 	  the checking work.
 
+config ARM64_EXCEPTION_STACK_TRACE
+	bool
+	default y
+	depends on FRAME_POINTER
+	help
+	  Internal config to enable runtime stack traces on fatal exceptions.
+
+config ARCH_HAS_STACKWALK
+	bool
+	default y
+	depends on FRAME_POINTER
+	help
+	  Internal config to indicate that the arch_stack_walk() API is implemented
+	  and it can be enabled.
+
 config ARM64_SAFE_EXCEPTION_STACK_SIZE
 	int "The stack size of the safe exception stack"
 	default 4096
@@ -206,14 +196,6 @@ config ARM64_STACK_PROTECTION
 
 if CPU_CORTEX_A
 
-config ARCH_HAS_STACKWALK
-	bool
-	default y
-	depends on FRAME_POINTER
-	help
-	  Internal config to indicate that the arch_stack_walk() API is implemented
-	  and it can be enabled.
-
 config ARMV8_A_NS
 	bool "ARMv8-A Normal World (Non-Secure world of Trustzone)"
 	help
@@ -241,20 +223,6 @@ config ARMV8_A
 	  so that it can support some features included in the AArch64 state.
 	  It supports the T32 and A32 instruction sets.
 
-config ARMV9_A
-	bool
-	select ATOMIC_OPERATIONS_BUILTIN
-	select CPU_HAS_MMU
-	select ARCH_HAS_USERSPACE if ARM_MMU
-	select ARCH_HAS_NOCACHE_MEMORY_SUPPORT if ARM_MMU
-	imply ARM64_SVE if FPU_SHARING
-	help
-	  This option signifies the use of an ARMv9-A processor
-	  implementation.
-	  ARMv9-A builds on ARMv8-A and introduces additional security,
-	  performance, and machine learning capabilities while maintaining
-	  backward compatibility with ARMv8-A software.
-
 rsource "xen/Kconfig"
 
 endif # CPU_CORTEX_A
@@ -380,8 +348,6 @@ config ARM64_PA_BITS
 
 config MAX_XLAT_TABLES
 	int "Maximum numbers of translation tables"
-	default 32 if USERSPACE && TEST && SMP
-	default 24 if USERSPACE && TEST
 	default 20 if USERSPACE && (ARM64_VA_BITS >= 40)
 	default 16 if USERSPACE
 	default 12 if (ARM64_VA_BITS >= 40)
@@ -414,27 +380,4 @@ config ARM64_BOOT_DISABLE_DCACHE
 	  cache and then disable data cache, it will will be re-enabled after
 	  MMU is configured and enabled.
 
-config ARM64_SVE
-	bool "Scalable Vector Extension (SVE) support"
-	depends on ARMV9_A
-	help
-	  Enable support for ARM64 Scalable Vector Extension (SVE).
-	  This allows threads to use SVE/SVE2 instructions and automatically
-	  handles context switching of SVE registers (Z0-Z31, P0-P15, FFR)
-	  if CONFIG_FPU_SHARING is also set. Requires ARMv9-A architecture.
-
-config ARM64_SVE_VL_MAX
-	int "Maximum SVE vector length in bytes"
-	depends on ARM64_SVE
-	default 16
-	range 16 256
-	help
-	  Maximum supported SVE vector length in bytes. This determines
-	  the SVE context size within each thread structure. Valid values
-	  are any power of two from 16 to 256 inclusive (128 to 2048 bits).
-	  This can be smaller than the hardware supported vector length to
-	  save some per-thread memory in which case the hardware will be
-	  limited to the specified length. Having a larger value than what
-	  the hardware supports will only waste memory.
-
 endif # CPU_CORTEX_A || CPU_AARCH64_CORTEX_R

arch/arm64/core/fatal.c

@@ -337,7 +337,7 @@ static bool z_arm64_stack_corruption_check(struct arch_esf *esf, uint64_t esr, u
 			 * a new nested exception triggered by FPU accessing (var_args).
 			 */
 			arch_flush_local_fpu();
-			write_cpacr_el1(read_cpacr_el1() | CPACR_EL1_FPEN);
+			write_cpacr_el1(read_cpacr_el1() | CPACR_EL1_FPEN_NOTRAP);
 #endif
 			arch_curr_cpu()->arch.corrupted_sp = 0UL;
 			EXCEPTION_DUMP("STACK OVERFLOW FROM KERNEL,"

arch/arm64/core/fpu.S

@@ -7,20 +7,12 @@
 
 #include <zephyr/toolchain.h>
 #include <zephyr/linker/sections.h>
-#include <zephyr/offsets.h>
 
 _ASM_FILE_PROLOGUE
 
 GTEXT(z_arm64_fpu_save)
 SECTION_FUNC(TEXT, z_arm64_fpu_save)
 
-	mrs	x1, fpsr
-	mrs	x2, fpcr
-	str	w1, [x0, #__z_arm64_fp_context_fpsr_OFFSET]
-	str	w2, [x0, #__z_arm64_fp_context_fpcr_OFFSET]
-
-	/* Save NEON registers */
-	add	x0, x0, #__z_arm64_fp_context_neon_OFFSET
 	stp	q0,  q1,  [x0, #(16 *  0)]
 	stp	q2,  q3,  [x0, #(16 *  2)]
 	stp	q4,  q5,  [x0, #(16 *  4)]
@@ -38,18 +30,16 @@ SECTION_FUNC(TEXT, z_arm64_fpu_save)
 	stp	q28, q29, [x0, #(16 * 28)]
 	stp	q30, q31, [x0, #(16 * 30)]
 
+	mrs	x1, fpsr
+	mrs	x2, fpcr
+	str	w1, [x0, #(16 * 32 + 0)]
+	str	w2, [x0, #(16 * 32 + 4)]
+
 	ret
 
 GTEXT(z_arm64_fpu_restore)
 SECTION_FUNC(TEXT, z_arm64_fpu_restore)
 
-	ldr	w1, [x0, #__z_arm64_fp_context_fpsr_OFFSET]
-	ldr	w2, [x0, #__z_arm64_fp_context_fpcr_OFFSET]
-	msr	fpsr, x1
-	msr	fpcr, x2
-
-	/* Restore NEON registers */
-	add	x0, x0, #__z_arm64_fp_context_neon_OFFSET
 	ldp	q0,  q1,  [x0, #(16 *  0)]
 	ldp	q2,  q3,  [x0, #(16 *  2)]
 	ldp	q4,  q5,  [x0, #(16 *  4)]
@@ -67,164 +57,9 @@ SECTION_FUNC(TEXT, z_arm64_fpu_restore)
 	ldp	q28, q29, [x0, #(16 * 28)]
 	ldp	q30, q31, [x0, #(16 * 30)]
 
-	ret
-
-#ifdef CONFIG_ARM64_SVE
-
-GTEXT(z_arm64_sve_save)
-SECTION_FUNC(TEXT, z_arm64_sve_save)
-
-	/* Save control registers */
-	mrs	x2, fpsr
-	mrs	x3, fpcr
-	str	w2, [x0, #__z_arm64_fp_context_fpsr_OFFSET]
-	str	w3, [x0, #__z_arm64_fp_context_fpcr_OFFSET]
-
-	/* Get Z registers base address */
-	add	x2, x0, #__z_arm64_fp_context_sve_z_regs_OFFSET
-
-	/* Save Z registers */
-	str	z0, [x2, #0, MUL VL]
-	str	z1, [x2, #1, MUL VL]
-	str	z2, [x2, #2, MUL VL]
-	str	z3, [x2, #3, MUL VL]
-	str	z4, [x2, #4, MUL VL]
-	str	z5, [x2, #5, MUL VL]
-	str	z6, [x2, #6, MUL VL]
-	str	z7, [x2, #7, MUL VL]
-	str	z8, [x2, #8, MUL VL]
-	str	z9, [x2, #9, MUL VL]
-	str	z10, [x2, #10, MUL VL]
-	str	z11, [x2, #11, MUL VL]
-	str	z12, [x2, #12, MUL VL]
-	str	z13, [x2, #13, MUL VL]
-	str	z14, [x2, #14, MUL VL]
-	str	z15, [x2, #15, MUL VL]
-	str	z16, [x2, #16, MUL VL]
-	str	z17, [x2, #17, MUL VL]
-	str	z18, [x2, #18, MUL VL]
-	str	z19, [x2, #19, MUL VL]
-	str	z20, [x2, #20, MUL VL]
-	str	z21, [x2, #21, MUL VL]
-	str	z22, [x2, #22, MUL VL]
-	str	z23, [x2, #23, MUL VL]
-	str	z24, [x2, #24, MUL VL]
-	str	z25, [x2, #25, MUL VL]
-	str	z26, [x2, #26, MUL VL]
-	str	z27, [x2, #27, MUL VL]
-	str	z28, [x2, #28, MUL VL]
-	str	z29, [x2, #29, MUL VL]
-	str	z30, [x2, #30, MUL VL]
-	str	z31, [x2, #31, MUL VL]
-
-	/* Get P registers base address */
-	mov	x3, #__z_arm64_fp_context_sve_p_regs_OFFSET
-	add	x3, x0, x3
-
-	/* Save P registers */
-	str	p0, [x3, #0, MUL VL]
-	str	p1, [x3, #1, MUL VL]
-	str	p2, [x3, #2, MUL VL]
-	str	p3, [x3, #3, MUL VL]
-	str	p4, [x3, #4, MUL VL]
-	str	p5, [x3, #5, MUL VL]
-	str	p6, [x3, #6, MUL VL]
-	str	p7, [x3, #7, MUL VL]
-	str	p8, [x3, #8, MUL VL]
-	str	p9, [x3, #9, MUL VL]
-	str	p10, [x3, #10, MUL VL]
-	str	p11, [x3, #11, MUL VL]
-	str	p12, [x3, #12, MUL VL]
-	str	p13, [x3, #13, MUL VL]
-	str	p14, [x3, #14, MUL VL]
-	str	p15, [x3, #15, MUL VL]
-
-	/* Get FFR base address */
-	mov	x4, #__z_arm64_fp_context_sve_ffr_OFFSET
-	add	x4, x0, x4
-
-	/* Save FFR */
-	rdffr	p0.b
-	str	p0, [x4]
+	ldr	w1, [x0, #(16 * 32 + 0)]
+	ldr	w2, [x0, #(16 * 32 + 4)]
+	msr	fpsr, x1
+	msr	fpcr, x2
 
 	ret
-
-GTEXT(z_arm64_sve_restore)
-SECTION_FUNC(TEXT, z_arm64_sve_restore)
-
-	/* Get Z registers base address */
-	add	x2, x0, #__z_arm64_fp_context_sve_z_regs_OFFSET
-
-	/* Restore Z registers */
-	ldr	z0, [x2, #0, MUL VL]
-	ldr	z1, [x2, #1, MUL VL]
-	ldr	z2, [x2, #2, MUL VL]
-	ldr	z3, [x2, #3, MUL VL]
-	ldr	z4, [x2, #4, MUL VL]
-	ldr	z5, [x2, #5, MUL VL]
-	ldr	z6, [x2, #6, MUL VL]
-	ldr	z7, [x2, #7, MUL VL]
-	ldr	z8, [x2, #8, MUL VL]
-	ldr	z9, [x2, #9, MUL VL]
-	ldr	z10, [x2, #10, MUL VL]
-	ldr	z11, [x2, #11, MUL VL]
-	ldr	z12, [x2, #12, MUL VL]
-	ldr	z13, [x2, #13, MUL VL]
-	ldr	z14, [x2, #14, MUL VL]
-	ldr	z15, [x2, #15, MUL VL]
-	ldr	z16, [x2, #16, MUL VL]
-	ldr	z17, [x2, #17, MUL VL]
-	ldr	z18, [x2, #18, MUL VL]
-	ldr	z19, [x2, #19, MUL VL]
-	ldr	z20, [x2, #20, MUL VL]
-	ldr	z21, [x2, #21, MUL VL]
-	ldr	z22, [x2, #22, MUL VL]
-	ldr	z23, [x2, #23, MUL VL]
-	ldr	z24, [x2, #24, MUL VL]
-	ldr	z25, [x2, #25, MUL VL]
-	ldr	z26, [x2, #26, MUL VL]
-	ldr	z27, [x2, #27, MUL VL]
-	ldr	z28, [x2, #28, MUL VL]
-	ldr	z29, [x2, #29, MUL VL]
-	ldr	z30, [x2, #30, MUL VL]
-	ldr	z31, [x2, #31, MUL VL]
-
-	/* Get FFR base address */
-	mov	x4, #__z_arm64_fp_context_sve_ffr_OFFSET
-	add	x4, x0, x4
-
-	/* Restore FFR */
-	ldr	p0, [x4]
-	wrffr	p0.b
-
-	/* Get P registers base address */
-	mov	x3, #__z_arm64_fp_context_sve_p_regs_OFFSET
-	add	x3, x0, x3
-
-	/* Restore P registers intervals */
-	ldr	p0, [x3, #0, MUL VL]
-	ldr	p1, [x3, #1, MUL VL]
-	ldr	p2, [x3, #2, MUL VL]
-	ldr	p3, [x3, #3, MUL VL]
-	ldr	p4, [x3, #4, MUL VL]
-	ldr	p5, [x3, #5, MUL VL]
-	ldr	p6, [x3, #6, MUL VL]
-	ldr	p7, [x3, #7, MUL VL]
-	ldr	p8, [x3, #8, MUL VL]
-	ldr	p9, [x3, #9, MUL VL]
-	ldr	p10, [x3, #10, MUL VL]
-	ldr	p11, [x3, #11, MUL VL]
-	ldr	p12, [x3, #12, MUL VL]
-	ldr	p13, [x3, #13, MUL VL]
-	ldr	p14, [x3, #14, MUL VL]
-	ldr	p15, [x3, #15, MUL VL]
-
-	/* Restore control registers */
-	ldr	w2, [x0, #__z_arm64_fp_context_fpsr_OFFSET]
-	ldr	w3, [x0, #__z_arm64_fp_context_fpcr_OFFSET]
-	msr	fpsr, x2
-	msr	fpcr, x3
-
-	ret
-
-#endif /* CONFIG_ARM64_SVE */

arch/arm64/core/fpu.c

@@ -15,8 +15,6 @@
 /* to be found in fpu.S */
 extern void z_arm64_fpu_save(struct z_arm64_fp_context *saved_fp_context);
 extern void z_arm64_fpu_restore(struct z_arm64_fp_context *saved_fp_context);
-extern void z_arm64_sve_save(struct z_arm64_fp_context *saved_fp_context);
-extern void z_arm64_sve_restore(struct z_arm64_fp_context *saved_fp_context);
 
 #define FPU_DEBUG 0
 
@@ -55,7 +53,7 @@ static void DBG(char *msg, struct k_thread *th)
 	if (th == NULL) {
 		th = _current;
 	}
-	v = *(unsigned char *)&th->arch.saved_fp_context.neon;
+	v = *(unsigned char *)&th->arch.saved_fp_context;
 	*p++ = ' ';
 	*p++ = ((v >> 4) < 10) ? ((v >> 4) + '0') : ((v >> 4) - 10 + 'a');
 	*p++ = ((v & 15) < 10) ? ((v & 15) + '0') : ((v & 15) - 10 + 'a');
@@ -93,46 +91,6 @@ static inline void DBG_PC(char *msg, uintptr_t pc) { }
 
 #endif /* FPU_DEBUG */
 
-#ifdef CONFIG_ARM64_SVE
-
-/* Get current SVE vector length */
-static inline uint32_t z_arm64_sve_get_vl(void)
-{
-	uint32_t vl;
-
-	__asm__("rdvl %0, #1" : "=r"(vl));
-	return vl;
-}
-
-#define USE_SVE(t) ((t) && (t)->arch.saved_fp_context.sve.simd_mode == SIMD_SVE)
-
-/* Convert NEON V registers to SVE Z registers in place */
-static void convert_Vx_to_Zx(struct z_arm64_fp_context *context)
-{
-	uint32_t vl = z_arm64_sve_get_vl();
-
-	if (CONFIG_ARM64_SVE_VL_MAX <= 16 || vl <= 16) {
-		return;
-	}
-
-	/*
-	 * Since it's a union, we need to extend each 128-bit NEON register
-	 * to the full SVE vector length, working backwards to avoid overwriting
-	 * data we still need to copy.
-	 */
-	for (int i = 31; i >= 0; i--) {
-		/* Copy the 128-bit NEON value to the low 128 bits of the Z register */
-		*(__int128 *)&context->sve.z_regs[i * vl] = context->neon.v_regs[i];
-
-		/* Zero the upper part of the Z register (beyond 128 bits) */
-		memset(&context->sve.z_regs[i * vl + 16], 0, vl - 16);
-	}
-}
-
-#else
-#define USE_SVE(t) false
-#endif
-
 /*
  * Flush FPU content and disable access.
  * This is called locally and also from flush_fpu_ipi_handler().
@@ -147,30 +105,19 @@ void arch_flush_local_fpu(void)
 		uint64_t cpacr = read_cpacr_el1();
 
 		/* turn on FPU access */
-		cpacr |= CPACR_EL1_FPEN;
-		if (USE_SVE(owner)) {
-			cpacr |= CPACR_EL1_ZEN;
-		}
-		write_cpacr_el1(cpacr);
+		write_cpacr_el1(cpacr | CPACR_EL1_FPEN_NOTRAP);
 		barrier_isync_fence_full();
 
 		/* save current owner's content */
-		if (USE_SVE(owner)) {
-			z_arm64_sve_save(&owner->arch.saved_fp_context);
-		} else {
-			z_arm64_fpu_save(&owner->arch.saved_fp_context);
-		}
-
+		z_arm64_fpu_save(&owner->arch.saved_fp_context);
 		/* make sure content made it to memory before releasing */
 		barrier_dsync_fence_full();
-
 		/* release ownership */
 		atomic_ptr_clear(&_current_cpu->arch.fpu_owner);
 		DBG("disable", owner);
 
 		/* disable FPU access */
-		cpacr &= ~(CPACR_EL1_FPEN | CPACR_EL1_ZEN);
-		write_cpacr_el1(cpacr);
+		write_cpacr_el1(cpacr & ~CPACR_EL1_FPEN_NOTRAP);
 		barrier_isync_fence_full();
 	}
 }
@@ -226,7 +173,7 @@ void z_arm64_fpu_enter_exc(void)
 	__ASSERT(read_daif() & DAIF_IRQ_BIT, "must be called with IRQs disabled");
 
 	/* always deny FPU access whenever an exception is entered */
-	write_cpacr_el1(read_cpacr_el1() & ~(CPACR_EL1_FPEN | CPACR_EL1_ZEN));
+	write_cpacr_el1(read_cpacr_el1() & ~CPACR_EL1_FPEN_NOTRAP);
 	barrier_isync_fence_full();
 }
 
@@ -306,48 +253,29 @@ static bool simulate_str_q_insn(struct arch_esf *esf)
  * don't get interrupted that is. To ensure that we mask interrupts to
  * the triggering exception context.
  */
-void z_arm64_fpu_trap(struct arch_esf *esf, uint32_t exception_class)
+void z_arm64_fpu_trap(struct arch_esf *esf)
 {
 	__ASSERT(read_daif() & DAIF_IRQ_BIT, "must be called with IRQs disabled");
 
 	/* check if a quick simulation can do it */
-	if (!(IS_ENABLED(CONFIG_ARM64_SVE) && exception_class == 0x19) &&
-	    simulate_str_q_insn(esf)) {
+	if (simulate_str_q_insn(esf)) {
 		return;
 	}
 
 	DBG_PC("trap entry", esf->elr);
 
-	struct k_thread *owner = atomic_ptr_get(&_current_cpu->arch.fpu_owner);
-	uint64_t cpacr = read_cpacr_el1();
-
 	/* turn on FPU access */
-	cpacr |= CPACR_EL1_FPEN;
-	if (USE_SVE(owner)) {
-		cpacr |= CPACR_EL1_ZEN;
-	}
-	write_cpacr_el1(cpacr);
+	write_cpacr_el1(read_cpacr_el1() | CPACR_EL1_FPEN_NOTRAP);
 	barrier_isync_fence_full();
 
 	/* save current owner's content  if any */
+	struct k_thread *owner = atomic_ptr_get(&_current_cpu->arch.fpu_owner);
+
 	if (owner) {
-		if (USE_SVE(owner)) {
-			z_arm64_sve_save(&owner->arch.saved_fp_context);
-			DBG("sve_save", owner);
-		} else {
-			z_arm64_fpu_save(&owner->arch.saved_fp_context);
-			DBG("fpu_save", owner);
-		}
+		z_arm64_fpu_save(&owner->arch.saved_fp_context);
 		barrier_dsync_fence_full();
 		atomic_ptr_clear(&_current_cpu->arch.fpu_owner);
-	}
-
-	if (IS_ENABLED(CONFIG_ARM64_SVE) && exception_class == 0x19 &&
-	    !(cpacr & CPACR_EL1_ZEN)) {
-		/* SVE trap - also enable SVE access */
-		cpacr |= CPACR_EL1_ZEN;
-		write_cpacr_el1(cpacr);
-		barrier_isync_fence_full();
+		DBG("save", owner);
 	}
 
 	if (arch_exception_depth() > 1) {
@@ -372,45 +300,9 @@ void z_arm64_fpu_trap(struct arch_esf *esf, uint32_t exception_class)
 	/* become new owner */
 	atomic_ptr_set(&_current_cpu->arch.fpu_owner, _current);
 
-#ifdef CONFIG_ARM64_SVE
-	if (exception_class == 0x19) {
-		/* SVE trap */
-		if (_current->arch.saved_fp_context.sve.simd_mode == SIMD_NEON) {
-			/* upgrade from Neon to SVE before loading regs */
-			convert_Vx_to_Zx(&_current->arch.saved_fp_context);
-		}
-		_current->arch.saved_fp_context.sve.simd_mode = SIMD_SVE;
-	} else if (_current->arch.saved_fp_context.sve.simd_mode != SIMD_SVE) {
-		/* not SVE trap and context is not SVE either */
-		if ((cpacr & CPACR_EL1_ZEN) != 0) {
-			/* disable SVE access leaving only FP */
-			cpacr &= ~CPACR_EL1_ZEN;
-			write_cpacr_el1(cpacr);
-			barrier_isync_fence_full();
-		}
-		_current->arch.saved_fp_context.sve.simd_mode = SIMD_NEON;
-	} else if ((cpacr & CPACR_EL1_ZEN) == 0) {
-		/*
-		 * Not SVE trap but context is SVE and CPACR_EL1_ZEN not set.
-		 * This is an edge case that happens when previous owner
-		 * didn't use SVE and we are not using SVE right now either
-		 * although we did in the past. We're about to restore an
-		 * SVE context so make sure SVE access is enabled.
-		 */
-		cpacr |= CPACR_EL1_ZEN;
-		write_cpacr_el1(cpacr);
-		barrier_isync_fence_full();
-	}
-#endif
-
 	/* restore our content */
-	if (USE_SVE(_current)) {
-		z_arm64_sve_restore(&_current->arch.saved_fp_context);
-		DBG("sve_restore", NULL);
-	} else {
-		z_arm64_fpu_restore(&_current->arch.saved_fp_context);
-		DBG("fpu_restore", NULL);
-	}
+	z_arm64_fpu_restore(&_current->arch.saved_fp_context);
+	DBG("restore", NULL);
 }
 
 /*
@@ -431,14 +323,10 @@ static void fpu_access_update(unsigned int exc_update_level)
 		/* We're about to execute non-exception code */
 		if (atomic_ptr_get(&_current_cpu->arch.fpu_owner) == _current) {
 			/* turn on FPU access */
-			cpacr |= CPACR_EL1_FPEN;
-			if (USE_SVE(_current)) {
-				cpacr |= CPACR_EL1_ZEN;
-			}
-			write_cpacr_el1(cpacr);
+			write_cpacr_el1(cpacr | CPACR_EL1_FPEN_NOTRAP);
 		} else {
 			/* deny FPU access */
-			write_cpacr_el1(cpacr & ~(CPACR_EL1_FPEN | CPACR_EL1_ZEN));
+			write_cpacr_el1(cpacr & ~CPACR_EL1_FPEN_NOTRAP);
 		}
 	} else {
 		/*
@@ -446,7 +334,7 @@ static void fpu_access_update(unsigned int exc_update_level)
 		 * access as we want to make sure IRQs are disabled before
 		 * granting it access (see z_arm64_fpu_trap() documentation).
 		 */
-		write_cpacr_el1(cpacr & ~(CPACR_EL1_FPEN | CPACR_EL1_ZEN));
+		write_cpacr_el1(cpacr & ~CPACR_EL1_FPEN_NOTRAP);
 	}
 	barrier_isync_fence_full();
 }

arch/arm64/core/mmu.c

@@ -54,15 +54,7 @@ static uint64_t *new_table(void)
 		}
 	}
 
-#if defined(CONFIG_LOG)
-	LOG_ERR("CONFIG_MAX_XLAT_TABLES is too small");
-#else
-	printk("ERROR: CONFIG_MAX_XLAT_TABLES is too small\n");
-#endif
-
-	/* Unfortunately many code paths are not ready for failure */
-	k_panic();
-
+	LOG_ERR("CONFIG_MAX_XLAT_TABLES, too small");
 	return NULL;
 }
 

arch/arm64/core/offsets/offsets.c

@@ -29,7 +29,6 @@
 #include <zephyr/kernel.h>
 #include <kernel_arch_data.h>
 #include <kernel_offsets.h>
-#include <zephyr/arch/arm64/thread.h>
 
 GEN_OFFSET_SYM(_thread_arch_t, exception_depth);
 
@@ -78,20 +77,6 @@ GEN_NAMED_OFFSET_SYM(arm_smccc_res_t, a6, a6_a7);
 
 #endif /* CONFIG_HAS_ARM_SMCCC */
 
-#ifdef CONFIG_FPU_SHARING
-GEN_OFFSET_SYM(z_arm64_fp_context, fpsr);
-GEN_OFFSET_SYM(z_arm64_fp_context, fpcr);
-GEN_OFFSET_SYM(z_arm64_fp_context, neon);
-#ifdef CONFIG_ARM64_SVE
-GEN_ABSOLUTE_SYM(__z_arm64_fp_context_sve_z_regs_OFFSET,
-	offsetof(struct z_arm64_fp_context, sve.z_regs));
-GEN_ABSOLUTE_SYM(__z_arm64_fp_context_sve_p_regs_OFFSET,
-	offsetof(struct z_arm64_fp_context, sve.p_regs));
-GEN_ABSOLUTE_SYM(__z_arm64_fp_context_sve_ffr_OFFSET,
-	offsetof(struct z_arm64_fp_context, sve.ffr));
-#endif
-#endif
-
 GEN_ABS_SYM_END
 
 #endif /* _ARM_OFFSETS_INC_ */

arch/arm64/core/reset.c

@@ -78,22 +78,7 @@ void z_arm64_el3_init(void)
 	reg &= ~(CPTR_TTA_BIT |		/* Do not trap sysreg accesses */
 		 CPTR_TFP_BIT |		/* Do not trap SVE, SIMD and FP */
 		 CPTR_TCPAC_BIT);	/* Do not trap CPTR_EL2 / CPACR_EL1 accesses */
-
-#ifdef CONFIG_ARM64_SVE
-	/* Enable SVE for EL2 and below if SVE is implemented */
-	if (is_sve_implemented()) {
-		reg |= CPTR_EZ_BIT;		/* Enable SVE access for lower ELs */
-		write_cptr_el3(reg);
-
-		/* Initialize ZCR_EL3 for full SVE vector length */
-		/* ZCR_EL3.LEN = 0x1ff means full hardware vector length */
-		write_zcr_el3(0x1ff);
-	} else {
-		write_cptr_el3(reg);
-	}
-#else
 	write_cptr_el3(reg);
-#endif
 
 	reg = 0U;			/* Reset */
 #ifdef CONFIG_ARMV8_A_NS
@@ -171,24 +156,8 @@ void z_arm64_el2_init(void)
 	reg = 0U;			/* RES0 */
 	reg |= CPTR_EL2_RES1;		/* RES1 */
 	reg &= ~(CPTR_TFP_BIT |		/* Do not trap SVE, SIMD and FP */
-		 CPTR_TCPAC_BIT |	/* Do not trap CPACR_EL1 accesses */
-		 CPTR_EL2_TZ_BIT);	/* Do not trap SVE to EL2 */
-#ifdef CONFIG_ARM64_SVE
-	/* Enable SVE for EL1 and EL0 if SVE is implemented */
-	if (is_sve_implemented()) {
-		reg &= ~CPTR_EL2_ZEN_MASK;
-		reg |= (CPTR_EL2_ZEN_EL1_EN | CPTR_EL2_ZEN_EL0_EN);
-		write_cptr_el2(reg);
-
-		/* Initialize ZCR_EL2 for full SVE vector length */
-		/* ZCR_EL2.LEN = 0x1ff means full hardware vector length */
-		write_zcr_el2(0x1ff);
-	} else {
-		write_cptr_el2(reg);
-	}
-#else
+		 CPTR_TCPAC_BIT);	/* Do not trap CPACR_EL1 accesses */
 	write_cptr_el2(reg);
-#endif
 
 	zero_cntvoff_el2();		/* Set 64-bit virtual timer offset to 0 */
 	zero_cnthctl_el2();
@@ -222,22 +191,9 @@ void z_arm64_el1_init(void)
 	barrier_isync_fence_full();
 
 	reg = 0U;			/* RES0 */
-	reg |= CPACR_EL1_FPEN;		/* Do not trap NEON/SIMD/FP initially */
+	reg |= CPACR_EL1_FPEN_NOTRAP;	/* Do not trap NEON/SIMD/FP initially */
 					/* TODO: CONFIG_FLOAT_*_FORBIDDEN */
-#ifdef CONFIG_ARM64_SVE
-	/* Enable SVE access if SVE is implemented */
-	if (is_sve_implemented()) {
-		reg |= CPACR_EL1_ZEN;	/* Do not trap SVE initially */
-		write_cpacr_el1(reg);
-
-		/* Initialize ZCR_EL1 SVE vector length */
-		write_zcr_el1(CONFIG_ARM64_SVE_VL_MAX/16 - 1);
-	} else {
-		write_cpacr_el1(reg);
-	}
-#else
 	write_cpacr_el1(reg);
-#endif
 
 	reg = read_sctlr_el1();
 	reg |= (SCTLR_EL1_RES1 |	/* RES1 */

arch/arm64/core/smp.c

@@ -166,7 +166,9 @@ void arch_secondary_cpu_init(int cpu_num)
 #endif
 #endif
 
+#ifdef CONFIG_SOC_PER_CORE_INIT_HOOK
 	soc_per_core_init_hook();
+#endif /* CONFIG_SOC_PER_CORE_INIT_HOOK */
 
 	fn = arm64_cpu_boot_params.fn;
 	arg = arm64_cpu_boot_params.arg;

arch/arm64/core/switch.S

@@ -153,15 +153,8 @@ SECTION_FUNC(TEXT, z_arm64_sync_exc)
 
 #ifdef CONFIG_FPU_SHARING
 	cmp	x1, #0x07 /*Access to SIMD or floating-point */
-	beq	fpu_sve_trap
-#ifdef CONFIG_ARM64_SVE
-	cmp	x1, #0x19 /*Trapped access to SVE functionality */
-	beq	fpu_sve_trap
-#endif
-	b	1f
-fpu_sve_trap:
-	mov	x0, sp  /* ESF pointer */
-	/* x1 already contains exception class (EC) - pass as second argument */
+	bne	1f
+	mov	x0, sp
 	bl	z_arm64_fpu_trap
 	b	z_arm64_exit_exc_fpu_done
 1:

arch/arm64/core/xen/Kconfig

@@ -33,25 +33,3 @@ config XEN_INTERFACE_VERSION
 	help
 	  Xen interface version to use. This is the version of the
 	  interface that Zephyr will use to communicate with the hypervisor.
-
-config XEN_DOMCTL_INTERFACE_VERSION
-	hex "Xen Domctl interface version"
-	default 0x17
-	range 0x15 0x17
-	depends on XEN
-	help
-	  Xen Domctl interface version to use. This is the version of the
-	  domctl interface that Zephyr will use to communicate with
-	  the hypervisor. The default value is the latest version supported
-	  by the kernel.
-
-config XEN_SYSCTL_INTERFACE_VERSION
-	hex "Xen Sysctl interface version"
-	default 0x15
-	range 0x15 0x15
-	depends on XEN
-	help
-	  Xen Sysctl interface version to use. This is the version of the
-	  domctl interface that Zephyr will use to communicate with
-	  the hypervisor. The default value is the latest version supported
-	  by the kernel.

arch/arm64/core/xen/hypercall.S

@@ -23,10 +23,7 @@ HYPERCALL(sched_op);
 HYPERCALL(event_channel_op);
 HYPERCALL(hvm_op);
 HYPERCALL(memory_op);
-HYPERCALL(dm_op);
-HYPERCALL(xen_version);
 
 #ifdef CONFIG_XEN_DOM0
 HYPERCALL(domctl);
-HYPERCALL(sysctl);
 #endif

arch/arm64/include/kernel_arch_func.h

@@ -32,7 +32,10 @@ extern "C" {
 
 static ALWAYS_INLINE void arch_kernel_init(void)
 {
+
+#ifdef CONFIG_SOC_PER_CORE_INIT_HOOK
 	soc_per_core_init_hook();
+#endif /* CONFIG_SOC_PER_CORE_INIT_HOOK */
 }
 
 static inline void arch_switch(void *switch_to, void **switched_from)

arch/common/init.c

@@ -55,6 +55,11 @@ void arch_bss_zero(void)
 	}
 
 	arch_early_memset(__bss_start, 0, __bss_end - __bss_start);
+#if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_ccm))
+	arch_early_memset(&__ccm_bss_start, 0,
+		       (uintptr_t) &__ccm_bss_end
+		       - (uintptr_t) &__ccm_bss_start);
+#endif
 #if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_dtcm))
 	arch_early_memset(&__dtcm_bss_start, 0,
 		       (uintptr_t) &__dtcm_bss_end

arch/common/xip.c

@@ -38,6 +38,10 @@ void arch_data_copy(void)
 		       (uintptr_t) &_nocache_load_ram_size);
 #endif /* CONFIG_NOCACHE_MEMORY */
 #endif /* CONFIG_ARCH_HAS_NOCACHE_MEMORY_SUPPORT */
+#if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_ccm))
+	arch_early_memcpy(&__ccm_data_start, &__ccm_data_load_start,
+		       __ccm_data_end - __ccm_data_start);
+#endif
 #if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_itcm))
 	arch_early_memcpy(&__itcm_start, &__itcm_load_start,
 		       (uintptr_t) &__itcm_size);

arch/mips/CMakeLists.txt

@@ -7,9 +7,9 @@
 #
 
 if(CONFIG_BIG_ENDIAN)
-  set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT "elf32-bigmips")
+	set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT "elf32-bigmips")
 else()
-  set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT "elf32-littlemips")
+	set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT "elf32-littlemips")
 endif()
 
 add_subdirectory(core)

arch/mips/include/kernel_arch_func.h

@@ -28,7 +28,9 @@ extern "C" {
 #ifndef _ASMLANGUAGE
 static ALWAYS_INLINE void arch_kernel_init(void)
 {
+#ifdef CONFIG_SOC_PER_CORE_INIT_HOOK
 	soc_per_core_init_hook();
+#endif /* CONFIG_SOC_PER_CORE_INIT_HOOK */
 }
 
 static ALWAYS_INLINE void

arch/posix/CMakeLists.txt

@@ -39,34 +39,38 @@ set_property(TARGET native_simulator PROPERTY LOCALIZE_EXTRA_OPTIONS "")
 
 set(NSI_DIR ${ZEPHYR_BASE}/scripts/native_simulator CACHE PATH "Path to the native simulator")
 
-if(NATIVE_TARGET_HOST) # Allow users to manually select the target for cross-compiling use cases
-  set(TARGET_HOST ${NATIVE_TARGET_HOST})
-else()
-  if("${CMAKE_HOST_SYSTEM_PROCESSOR}" MATCHES "arm.*")
-    # All 32bit arm variants
-    set(TARGET_HOST "arm")
-  elseif("${CMAKE_HOST_SYSTEM_PROCESSOR}" MATCHES ".*86.*")
-    # x86_64/i*86
-    set(TARGET_HOST "x86_64")
+if(EXISTS ${CMAKE_CURRENT_LIST_DIR}/${CMAKE_HOST_SYSTEM_NAME}.${CMAKE_HOST_SYSTEM_PROCESSOR}.cmake)
+  # @Intent: Set necessary compiler & linker options for this specific host architecture & OS
+  include(${CMAKE_HOST_SYSTEM_NAME}.${CMAKE_HOST_SYSTEM_PROCESSOR}.cmake)
+else() # Linux.x86_64
+  if(CONFIG_64BIT)
+    # some gcc versions fail to build without -fPIC
+    zephyr_compile_options(-m64 -fPIC)
+    zephyr_link_libraries(-m64)
+
+    target_link_options(native_simulator INTERFACE "-m64")
+    target_compile_options(native_simulator INTERFACE "-m64")
   else()
-    set(TARGET_HOST ${CMAKE_HOST_SYSTEM_PROCESSOR})
+    zephyr_compile_options(-m32)
+    zephyr_link_libraries(-m32)
+
+    target_link_options(native_simulator INTERFACE "-m32")
+    target_compile_options(native_simulator INTERFACE "-m32")
+
+    # When building for 32bits x86, gcc defaults to using the old 8087 float arithmetic
+    # which causes some issues with literal float comparisons. So we set it
+    # to use the SSE2 float path instead
+    # (clang defaults to use SSE, but, setting this option for it is safe)
+    check_set_compiler_property(APPEND PROPERTY fpsse2 "SHELL:-msse2 -mfpmath=sse")
+    zephyr_compile_options($<TARGET_PROPERTY:compiler,fpsse2>)
+    target_compile_options(native_simulator INTERFACE "$<TARGET_PROPERTY:compiler,fpsse2>")
   endif()
 endif()
 
-if(EXISTS ${CMAKE_CURRENT_LIST_DIR}/${TARGET_HOST}.cmake)
-  # Set necessary compiler & linker options for this specific host architecture
-  include(${TARGET_HOST}.cmake)
-elseif(DEFINED NATIVE_TARGET_HOST)
-  message(WARNING "NATIVE_TARGET_HOST set to ${NATIVE_TARGET_HOST}, but ${CMAKE_CURRENT_LIST_DIR}/"
-          "${TARGET_HOST}.cmake not found. No custom target options will be applied."
+zephyr_compile_options(
+  ${ARCH_FLAG}
   )
-endif()
 
-# We tell the compiler to mark all symbols to have hidden visibility by default.
-# Later, after the image from all embedded code has been built, all these symbols will be made local
-# (i.e. not linkable anymore from outside that embedded code library).
-# If users want to be able to link to a symbol from outside the embedded image, they should annotate
-# it with one of NATIVE_SIMULATOR_IF*
 zephyr_compile_options(
   -fvisibility=hidden
 )
@@ -100,15 +104,17 @@ if(NOT CONFIG_EXTERNAL_LIBC)
     $<TARGET_PROPERTY:compiler,freestanding>
     $<TARGET_PROPERTY:compiler,no_builtin>
   )
-else()
-  # No freestanding compilation, i.e. we use the compiler default C library
-  zephyr_compile_options($<TARGET_PROPERTY:compiler,hosted>)
 endif()
 
 if(CONFIG_COMPILER_WARNINGS_AS_ERRORS)
   target_compile_options(native_simulator INTERFACE $<TARGET_PROPERTY:compiler,warnings_as_errors>)
 endif()
 
+if(CONFIG_EXTERNAL_LIBC)
+  # @Intent: Obtain compiler specific flags for no freestanding compilation
+  zephyr_compile_options($<TARGET_PROPERTY:compiler,hosted>)
+endif()
+
 if(CONFIG_EXTERNAL_LIBCPP)
   target_link_options(native_simulator INTERFACE "-lstdc++")
 endif()

arch/posix/Linux.aarch64.cmake

@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: Apache-2.0
+
+# For Aarch64, multilib is not an actively pursued solution for most Linux
+# distributions. Userspace is (generally) either 32-bit or 64-bit but not
+# both.
+
+# @Intent: Call a script to get userspace wordsize for comparison with CONFIG_64BIT
+execute_process(
+  COMMAND
+  ${PYTHON_EXECUTABLE}
+  ${ZEPHYR_BASE}/scripts/build/user_wordsize.py
+  OUTPUT_VARIABLE
+  WORDSIZE
+  OUTPUT_STRIP_TRAILING_WHITESPACE
+)
+
+if(CONFIG_64BIT)
+  if(${WORDSIZE} STREQUAL "32")
+    message(FATAL_ERROR
+      "CONFIG_64BIT=y but this Aarch64 machine has a 32-bit userspace.\n"
+      "If you were targeting native_sim/native/64, target native_sim instead.\n"
+      "Otherwise, be sure to define CONFIG_64BIT appropriately.\n"
+    )
+  endif()
+  zephyr_compile_options(-fPIC)
+else()
+  if(${WORDSIZE} STREQUAL "64")
+    message(FATAL_ERROR
+      "CONFIG_64BIT=n but this Aarch64 machine has a 64-bit userspace.\n"
+      "If you were targeting native_sim, target native_sim/native/64 instead.\n"
+      "Otherwise, be sure to define CONFIG_64BIT appropriately.\n"
+    )
+  endif()
+endif()

arch/posix/aarch64.cmake

@@ -1,34 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0
-
-# For Aarch64, multilib is not an actively pursued solution for most Linux
-# distributions. Userspace is (generally) either 32-bit or 64-bit but not
-# both.
-
-# Get userspace wordsize for comparison with CONFIG_64BIT
-execute_process(
-  COMMAND
-  ${PYTHON_EXECUTABLE}
-  ${ZEPHYR_BASE}/scripts/build/user_wordsize.py
-  OUTPUT_VARIABLE
-  WORDSIZE
-  OUTPUT_STRIP_TRAILING_WHITESPACE
-)
-
-if(CONFIG_64BIT)
-  if(${WORDSIZE} STREQUAL "32")
-    message(FATAL_ERROR
-      "CONFIG_64BIT=y but this Aarch64 machine has a 32-bit userspace.\n"
-      "If you were targeting native_sim/native/64, target native_sim instead.\n"
-      "Otherwise, be sure to define CONFIG_64BIT appropriately.\n"
-    )
-  endif()
-  zephyr_compile_options(-fPIC)
-else()
-  if(${WORDSIZE} STREQUAL "64")
-    message(FATAL_ERROR
-      "CONFIG_64BIT=n but this Aarch64 machine has a 64-bit userspace.\n"
-      "If you were targeting native_sim, target native_sim/native/64 instead.\n"
-      "Otherwise, be sure to define CONFIG_64BIT appropriately.\n"
-    )
-  endif()
-endif()

arch/posix/arm.cmake

@@ -1,9 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0
-
-if(CONFIG_64BIT)
-  message(FATAL_ERROR
-    "CONFIG_64BIT=y while targeting a 32-bit ARM processor.\n"
-    "If you were targeting native_sim/native/64, target native_sim instead.\n"
-    "Otherwise, be sure to define CONFIG_64BIT appropriately.\n"
-  )
-endif()

arch/posix/core/CMakeLists.txt

@@ -1,18 +1,19 @@
 # SPDX-License-Identifier: Apache-2.0
 
 zephyr_library()
+zephyr_library_compile_definitions(NO_POSIX_CHEATS)
 zephyr_library_sources(
-  cpuhalt.c
-  fatal.c
-  irq.c
-  swap.c
-  thread.c
-)
+	cpuhalt.c
+	fatal.c
+	irq.c
+	swap.c
+	thread.c
+	)
 
 if(CONFIG_ARCH_POSIX_TRAP_ON_FATAL)
   target_sources(native_simulator INTERFACE fatal_trap.c)
 endif()
 
 zephyr_library_sources(
-  posix_core_nsi.c
+	posix_core_nsi.c
 )

arch/posix/include/kernel_arch_func.h

@@ -22,7 +22,9 @@ extern "C" {
 
 static inline void arch_kernel_init(void)
 {
+#ifdef CONFIG_SOC_PER_CORE_INIT_HOOK
 	soc_per_core_init_hook();
+#endif /* CONFIG_SOC_PER_CORE_INIT_HOOK */
 }
 
 static ALWAYS_INLINE void

arch/posix/x86_64.cmake

@@ -1,24 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0
-
-if(CONFIG_64BIT)
-  # some gcc versions fail to build without -fPIC
-  zephyr_compile_options(-m64 -fPIC)
-  zephyr_link_libraries(-m64)
-
-  target_link_options(native_simulator INTERFACE "-m64")
-  target_compile_options(native_simulator INTERFACE "-m64")
-else()
-  zephyr_compile_options(-m32)
-  zephyr_link_libraries(-m32)
-
-  target_link_options(native_simulator INTERFACE "-m32")
-  target_compile_options(native_simulator INTERFACE "-m32")
-
-  # When building for 32bits x86, gcc defaults to using the old 8087 float arithmetic
-  # which causes some issues with literal float comparisons. So we set it
-  # to use the SSE2 float path instead
-  # (clang defaults to use SSE, but, setting this option for it is safe)
-  check_set_compiler_property(APPEND PROPERTY fpsse2 "SHELL:-msse2 -mfpmath=sse")
-  zephyr_compile_options($<TARGET_PROPERTY:compiler,fpsse2>)
-  target_compile_options(native_simulator INTERFACE "$<TARGET_PROPERTY:compiler,fpsse2>")
-endif()

arch/riscv/Kconfig

@@ -361,7 +361,6 @@ config RISCV_PMP
 	select THREAD_LOCAL_STORAGE if USERSPACE
 	select ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS
 	select MEM_DOMAIN_ISOLATED_STACKS
-	select PMP_KERNEL_MODE_DYNAMIC if MEM_ATTR
 	help
 	  MCU implements Physical Memory Protection.
 
@@ -410,20 +409,11 @@ config PMP_GRANULARITY
 	  (ie 4, 8, 16, ...), but if neither TOR mode nor NA4 mode is
 	  supported, the minimum granularity is 8.
 
-config PMP_NO_LOCK_GLOBAL
-	bool "Do not lock the global PMP entries"
-	select PMP_KERNEL_MODE_DYNAMIC
-	help
-	  Configure the PMP entries as unlocked (L=0) to implement PMP relative
-	  features. This allows application to dynamically reconfigure PMP
-	  entries without requiring hard reset.
-
 endif #RISCV_PMP
 
 config PMP_STACK_GUARD
 	def_bool y
 	depends on HW_STACK_PROTECTION
-	select PMP_KERNEL_MODE_DYNAMIC if MULTITHREADING
 
 config PMP_STACK_GUARD_MIN_SIZE
 	int "Stack Guard area size"
@@ -440,12 +430,6 @@ config PMP_STACK_GUARD_MIN_SIZE
 	  wiggle room to accommodate the eventual overflow exception
 	  stack usage.
 
-config PMP_KERNEL_MODE_DYNAMIC
-	bool
-	help
-	  Enable this to dynamically reconfigure and activate PMP entries for
-	  Machine mode when switching between kernel (ISR, syscall) and threads.
-
 # Implement the null pointer detection using the Physical Memory Protection
 # (PMP) Unit.
 config NULL_POINTER_EXCEPTION_DETECTION_PMP
@@ -476,17 +460,6 @@ config RISCV_IMPRECISE_FPU_STATE_TRACKING
 	  the floating-point register state imprecisely by reporting the state to be
 	  dirty even when it has not been modified. This option reflects that.
 
-config RISCV_SMRNMI_ENABLE_NMI_DELIVERY
-	bool "NMI delivery on SMRNMI hardware (MNSTATUS.NMIE=1)"
-	select RISCV_ISA_EXT_ZICSR
-	help
-	  Set MNSTATUS.NMIE bit to 1 during boot to enable NMI delivery on
-	  RISC-V hardware implementing the SMRNMI extension.
-
-	  This option only enables NMI delivery. It does not provide RNMI
-	  handlers or mnret instruction support. Proper RNMI handlers must
-	  be implemented in SoC-specific code to handle NMI events.
-
 endmenu
 
 config MAIN_STACK_SIZE

arch/riscv/Kconfig.isa

@@ -119,15 +119,6 @@ config RISCV_ISA_EXT_ZICSR
 	  The "Zicsr" extension introduces support for the full set of CSR
 	  instructions that operate on CSRs registers.
 
-config RISCV_ISA_EXT_SMCSRIND
-	bool
-	depends on RISCV_ISA_EXT_ZICSR
-	help
-	  (Smcsrind) - Standard Extension for Indirect CSR Access
-
-	  The Smcsrind extension provides indirect access to CSRs through
-	  the MISELECT and MIREG registers.
-
 config RISCV_ISA_EXT_ZIFENCEI
 	bool
 	help
@@ -237,14 +228,6 @@ config RISCV_ISA_EXT_ZBC
 	  The Zbc instructions can be used for carry-less multiplication that
 	  is the multiplication in the polynomial ring over GF(2).
 
-config RISCV_ISA_EXT_ZBKB
-	bool
-	help
-	  (Zbkb) - Zbkb BitManip Extension (Bit-manipulation for Cryptography)
-
-	  The Zbkb instructions can be used for accelerating cryptography workloads
-	  and contain rotation, reversion, packing and some advanced bit-manipulation.
-
 config RISCV_ISA_EXT_ZBS
 	bool
 	help

arch/riscv/core/CMakeLists.txt

@@ -28,7 +28,6 @@ zephyr_library_sources_ifdef(CONFIG_DEBUG_COREDUMP coredump.c)
 zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c)
 zephyr_library_sources_ifdef(CONFIG_USE_ISR_WRAPPER isr.S)
 zephyr_library_sources_ifdef(CONFIG_RISCV_PMP pmp.c pmp.S)
-zephyr_linker_sources_ifdef(CONFIG_RISCV_PMP ROM_SECTIONS pmp.ld)
 zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c)
 zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)
 zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c)

arch/riscv/core/fatal.c

@@ -221,12 +221,12 @@ void z_riscv_fault(struct arch_esf *esf)
 	unsigned int reason = K_ERR_CPU_EXCEPTION;
 
 	if (bad_stack_pointer(esf)) {
-#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
+#ifdef CONFIG_PMP_STACK_GUARD
 		/*
 		 * Remove the thread's PMP setting to prevent triggering a stack
 		 * overflow error again due to the previous configuration.
 		 */
-		z_riscv_pmp_kernelmode_disable();
+		z_riscv_pmp_stackguard_disable();
 #endif /* CONFIG_PMP_STACK_GUARD */
 		reason = K_ERR_STACK_CHK_FAIL;
 	}

arch/riscv/core/isr.S

@@ -368,19 +368,19 @@ no_fp:	/* increment _current->arch.exception_depth */
 	li t1, RISCV_EXC_ECALLU
 	beq t0, t1, is_user_syscall
 
-#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
+#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
 	/*
 	 * Determine if we come from user space. If so, reconfigure the PMP for
-	 * kernel mode configuration.
+	 * kernel mode stack guard.
 	 */
 	csrr t0, mstatus
 	li t1, MSTATUS_MPP
 	and t0, t0, t1
 	bnez t0, 1f
 	lr a0, ___cpu_t_current_OFFSET(s0)
-	call z_riscv_pmp_kernelmode_enable
+	call z_riscv_pmp_stackguard_enable
 1:
-#endif /* CONFIG_PMP_KERNEL_MODE_DYNAMIC */
+#endif /* CONFIG_PMP_STACK_GUARD */
 
 #endif /* CONFIG_USERSPACE */
 
@@ -422,7 +422,7 @@ is_kernel_syscall:
 	addi t0, t0, 4
 	sr t0, __struct_arch_esf_mepc_OFFSET(sp)
 
-#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
+#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
 	/* Re-activate PMP for m-mode */
 	li t1, MSTATUS_MPP
 	csrc mstatus, t1
@@ -515,13 +515,13 @@ do_irq_offload:
 #ifdef CONFIG_USERSPACE
 is_user_syscall:
 
-#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
+#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
 	/*
 	 * We came from userspace and need to reconfigure the
-	 * PMP for kernel mode configuration.
+	 * PMP for kernel mode stack guard.
 	 */
 	lr a0, ___cpu_t_current_OFFSET(s0)
-	call z_riscv_pmp_kernelmode_enable
+	call z_riscv_pmp_stackguard_enable
 #endif
 
 	/* It is safe to re-enable IRQs now */
@@ -585,18 +585,18 @@ valid_syscall_id:
 
 is_interrupt:
 
-#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
+#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
 #ifdef CONFIG_USERSPACE
 	/*
 	 * If we came from userspace then we need to reconfigure the
-	 * PMP for kernel mode configuration.
+	 * PMP for kernel mode stack guard.
 	 */
 	lr t0, __struct_arch_esf_mstatus_OFFSET(sp)
 	li t1, MSTATUS_MPP
 	and t0, t0, t1
 	bnez t0, 1f
 	lr a0, ___cpu_t_current_OFFSET(s0)
-	call z_riscv_pmp_kernelmode_enable
+	call z_riscv_pmp_stackguard_enable
 	j 2f
 #endif /* CONFIG_USERSPACE */
 1:	/* Re-activate PMP for m-mode */
@@ -769,8 +769,8 @@ fp_trap_exit:
 	and t0, t2, t1
 	bnez t0, 1f
 
-#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
-	/* Remove kernel mode configuration and Reconfigure PMP for user mode */
+#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
+	/* Remove kernel stack guard and Reconfigure PMP for user mode */
 	lr a0, ___cpu_t_current_OFFSET(s0)
 	call z_riscv_pmp_usermode_enable
 #endif

arch/riscv/core/pmp.S

@@ -93,18 +93,6 @@ pmpcfg_done:
 	add t0, t0, a0
 	jr t0
 
-/*
- * Prototype:
- *
- * void z_riscv_clear_all_pmp_entries(void)
- *
- * Called from pmp.c to clear all PMP entries.
- *
- * Note: this is shared with tail clearing code above, hence the same section.
- */
-GTEXT(z_riscv_clear_all_pmp_entries)
-z_riscv_clear_all_pmp_entries:
-
 pmpcfg_zerotail:
 
 	.option push

arch/riscv/core/pmp.c

@@ -15,26 +15,22 @@
  * cycles on corresponding CSR registers. Relevant CSR registers are always
  * written in batch from their shadow copy in RAM for better efficiency.
  *
- * In the kernel mode case we keep an m-mode copy for each thread. Each user
+ * In the stackguard case we keep an m-mode copy for each thread. Each user
  * mode threads also has a u-mode copy. This makes faster context switching
  * as precomputed content just have to be written to actual registers with
  * no additional processing.
  *
  * Thread-specific m-mode and u-mode PMP entries start from the PMP slot
- * indicated by global_pmp_end_index[M_MODE] and global_pmp_end_index[U_MODE],
- * respectively. Lower slots are used by global entries which are never
- * modified.
+ * indicated by global_pmp_end_index. Lower slots are used by global entries
+ * which are never modified.
  */
 
-#include "zephyr/toolchain.h"
 #include <zephyr/kernel.h>
 #include <kernel_internal.h>
 #include <zephyr/linker/linker-defs.h>
 #include <pmp.h>
 #include <zephyr/arch/arch_interface.h>
 #include <zephyr/arch/riscv/csr.h>
-#include <zephyr/dt-bindings/memory-attr/memory-attr-riscv.h>
-#include <zephyr/mem_mgmt/mem_attr.h>
 
 #define LOG_LEVEL CONFIG_MPU_LOG_LEVEL
 #include <zephyr/logging/log.h>
@@ -58,47 +54,6 @@ LOG_MODULE_REGISTER(mpu);
 
 #define PMP_NONE 0
 
-#define PMP_PERM_MASK (PMP_R | PMP_W | PMP_X)
-
-/**
- * @brief Decodes PMP configuration and address registers into a memory region's
- * start/end addresses.
- *
- * @param cfg_byte The PMP configuration byte (pmpcfg_n).
- * @param pmp_addr A pointer to the full array of PMP address registers (pmpaddr_n).
- * @param index The current PMP entry index.
- * @param start Pointer to where the calculated start address should be stored.
- * @param end Pointer to where the calculated end address should be stored.
- */
-IF_DISABLED(CONFIG_ZTEST, (static))
-void pmp_decode_region(uint8_t cfg_byte, unsigned long *pmp_addr, unsigned int index,
-		       unsigned long *start, unsigned long *end)
-{
-	unsigned long tmp;
-	unsigned long pmp_addr_val = pmp_addr[index];
-	unsigned long pmp_prev_addr_val = (index == 0) ? 0 : pmp_addr[index - 1];
-
-	switch (cfg_byte & PMP_A) {
-	case PMP_TOR:
-		*start = (index == 0) ? 0 : (pmp_prev_addr_val << 2);
-		*end   = (pmp_addr_val << 2) - 1;
-		break;
-	case PMP_NA4:
-		*start = pmp_addr_val << 2;
-		*end   = *start + 3;
-		break;
-	case PMP_NAPOT:
-		tmp = (pmp_addr_val << 2) | 0x3;
-		*start = tmp & (tmp + 1);
-		*end   = tmp | (tmp + 1);
-		break;
-	default:
-		*start = 0;
-		*end   = 0;
-		break;
-	}
-}
-
 static void print_pmp_entries(unsigned int pmp_start, unsigned int pmp_end,
 			      unsigned long *pmp_addr, unsigned long *pmp_cfg,
 			      const char *banner)
@@ -108,9 +63,27 @@ static void print_pmp_entries(unsigned int pmp_start, unsigned int pmp_end,
 
 	LOG_DBG("PMP %s:", banner);
 	for (index = pmp_start; index < pmp_end; index++) {
-		unsigned long start, end;
+		unsigned long start, end, tmp;
 
-		pmp_decode_region(pmp_n_cfg[index], pmp_addr, index, &start, &end);
+		switch (pmp_n_cfg[index] & PMP_A) {
+		case PMP_TOR:
+			start = (index == 0) ? 0 : (pmp_addr[index - 1] << 2);
+			end = (pmp_addr[index] << 2) - 1;
+			break;
+		case PMP_NA4:
+			start = pmp_addr[index] << 2;
+			end = start + 3;
+			break;
+		case PMP_NAPOT:
+			tmp = (pmp_addr[index] << 2) | 0x3;
+			start = tmp & (tmp + 1);
+			end   = tmp | (tmp + 1);
+			break;
+		default:
+			start = 0;
+			end = 0;
+			break;
+		}
 
 		if (end == 0) {
 			LOG_DBG("%3d: "PR_ADDR" 0x%02x", index,
@@ -139,8 +112,7 @@ static void print_pmp_entries(unsigned int pmp_start, unsigned int pmp_end,
  * @param pmp_cfg Pointer to the array where the CSR contents will be stored.
  * @param pmp_cfg_size The size of the pmp_cfg array, measured in unsigned long entries.
  */
-IF_DISABLED(CONFIG_ZTEST, (static inline))
-void z_riscv_pmp_read_config(unsigned long *pmp_cfg, size_t pmp_cfg_size)
+static inline void z_riscv_pmp_read_config(unsigned long *pmp_cfg, size_t pmp_cfg_size)
 {
 	__ASSERT(pmp_cfg_size == (size_t)(CONFIG_PMP_SLOTS / PMPCFG_STRIDE),
 		 "Invalid PMP config array size");
@@ -172,8 +144,7 @@ void z_riscv_pmp_read_config(unsigned long *pmp_cfg, size_t pmp_cfg_size)
  * @param pmp_addr Pointer to the array where the CSR contents will be stored.
  * @param pmp_addr_size The size of the pmp_addr array, measured in unsigned long entries.
  */
-IF_DISABLED(CONFIG_ZTEST, (static inline))
-void z_riscv_pmp_read_addr(unsigned long *pmp_addr, size_t pmp_addr_size)
+static inline void z_riscv_pmp_read_addr(unsigned long *pmp_addr, size_t pmp_addr_size)
 {
 	__ASSERT(pmp_addr_size == (size_t)(CONFIG_PMP_SLOTS), "PMP address array size mismatch");
 
@@ -265,7 +236,7 @@ static bool set_pmp_entry(unsigned int *index_p, uint8_t perm,
 	return ok;
 }
 
-#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
+#ifdef CONFIG_PMP_STACK_GUARD
 static inline bool set_pmp_mprv_catchall(unsigned int *index_p,
 					 unsigned long *pmp_addr, unsigned long *pmp_cfg,
 					 unsigned int index_limit)
@@ -293,7 +264,7 @@ static inline bool set_pmp_mprv_catchall(unsigned int *index_p,
 
 	return ok;
 }
-#endif /* CONFIG_PMP_KERNEL_MODE_DYNAMIC */
+#endif /* CONFIG_PMP_STACK_GUARD */
 
 /**
  * @brief Write a range of PMP entries to corresponding PMP registers
@@ -318,7 +289,7 @@ extern void z_riscv_write_pmp_entries(unsigned int start, unsigned int end,
 /**
  * @brief Write a range of PMP entries to corresponding PMP registers
  *
- * This performs some coherence checks before calling z_riscv_write_pmp_entries().
+ * This performs some sanity checks before calling z_riscv_write_pmp_entries().
  *
  * @param start Start of the PMP range to be written
  * @param end End (exclusive) of the PMP range to be written
@@ -377,86 +348,6 @@ static void write_pmp_entries(unsigned int start, unsigned int end,
 				  pmp_addr, pmp_cfg);
 }
 
-#ifdef CONFIG_MEM_ATTR
-/**
- * @brief Install PMP entries from devicetree mem-attr regions.
- *
- * Iterates over devicetree-provided memory-attr regions and programs PMP
- * via set_pmp_entry(). Ordering matters because PMP checks entries from lowest
- * to highest index and uses the first entry that matches the address.
- *
- * @param index_p Location of the current PMP slot index to use. This index
- *                will be updated according to the number of slots used.
- * @param pmp_addr Array of pmpaddr values (starting at entry 0).
- * @param pmp_cfg Array of pmpcfg values (starting at entry 0).
- * @param index_limit Index value representing the size of the provided arrays.
- * @return Number of PMP slots consumed by installed mem-attr regions.
- *
- * @note DT_MEM_RISCV_TYPE_IO_X Limitation:
- * Since the current PMP entries are non-locked, the eXecute (X)
- * permission restriction applied by DT_MEM_RISCV_TYPE_IO_X does
- * not prevent execution in higher privilege modes (M-mode/kernel).
- * This is because the mstatus.MPRV register bit only affects
- * M-mode load/store operations, not instruction fetches.
- * The execute restriction still applies to User mode because PMP
- * is always enforced for lower privilege modes.
- */
-static unsigned int set_pmp_mem_attr(unsigned int *index_p,
-				     unsigned long *pmp_addr, unsigned long *pmp_cfg,
-				     unsigned int index_limit)
-{
-	const struct mem_attr_region_t *region;
-	unsigned int entry_cnt = *index_p;
-	size_t num_regions;
-
-	num_regions = mem_attr_get_regions(&region);
-
-	for (size_t idx = 0; idx < num_regions; ++idx) {
-
-		uint8_t perm = DT_MEM_RISCV_TO_PMP_PERM(region[idx].dt_attr);
-
-		if (perm || (region[idx].dt_attr & DT_MEM_RISCV_TYPE_EMPTY)) {
-			set_pmp_entry(index_p, perm,
-				(uintptr_t)(region[idx].dt_addr),
-				(size_t)(region[idx].dt_size),
-				pmp_addr, pmp_cfg, index_limit);
-		}
-	}
-
-	entry_cnt = *index_p - entry_cnt;
-
-	return entry_cnt;
-}
-#endif /* CONFIG_MEM_ATTR */
-
-/**
- * @brief Clear and disable all Physical Memory Protection (PMP) entries.
- *
- * This function clears all PMP configuration CSRs (pmpcfgX) by writing
- * zero to them for all entries defined by CONFIG_PMP_SLOTS.
- *
- * This unconditional write sets the Address Matching Mode ('A' field) to
- * 'OFF' (0x00) for every entry, effectively disabling the PMP mechanism.
- *
- * This routine does not check the Lock bit. Changes to locked PMP entries
- * will be silently ignored by the hardware.
- *
- * It is implemented in assembly (pmp.S) for efficient RISC-V CSR access.
- */
-extern void z_riscv_clear_all_pmp_entries(void);
-
-void z_riscv_pmp_clear_all(void)
-{
-	/*
-	 * Ensure we are in M-mode and that memory accesses use M-mode privileges
-	 * (MPRV=0). We also set MPP to M-mode to establish a predictable prior privilege level.
-	 */
-	csr_clear(mstatus, MSTATUS_MPRV);
-	csr_set(mstatus, MSTATUS_MPP);
-
-	z_riscv_clear_all_pmp_entries();
-}
-
 /**
  * @brief Abstract the last 3 arguments to set_pmp_entry() and
  *        write_pmp_entries( for m-mode.
@@ -477,115 +368,16 @@ void z_riscv_pmp_clear_all(void)
 
 /*
  * Stores the initial values of the pmpcfg CSRs, covering all global
- * m-mode and u-mode PMP entries. This array is sized to hold all pmpcfg
- * registers necessary for CONFIG_PMP_SLOTS. It is used to seed the
- * per-thread PMP configuration copies. Locked entries aren't modifiable
- * but we could have non-locked entries here too.
+ * m-mode PMP entries. This array is sized to hold all pmpcfg registers
+ * necessary for CONFIG_PMP_SLOTS. It is used to seed the per-thread
+ * PMP configuration copies. Locked entries aren't modifiable but
+ * we could have non-locked entries here too.
  */
 static unsigned long global_pmp_cfg[CONFIG_PMP_SLOTS / PMPCFG_STRIDE];
+static unsigned long global_pmp_last_addr;
 
-/*
- * Defines an enumeration for PMP operating modes (M or U) to index the
- * PMP state arrays.
- */
-enum pmp_mode {
-	M_MODE = 0,
-#if defined(CONFIG_USERSPACE)
-	U_MODE,
-#endif /* CONFIG_USERSPACE */
-	MODE_TOTAL
-};
-
-/* Last address of global PMP entry range for each mode (M or U). */
-static unsigned long global_pmp_last_addr[MODE_TOTAL];
-/* End of global PMP entry range for each mode (M or U). */
-static unsigned int global_pmp_end_index[MODE_TOTAL];
-
-#if defined(CONFIG_MEM_ATTR) && defined(CONFIG_USERSPACE)
-/* Stores the initial pmpaddr values for the memory attribute region. */
-static unsigned long mem_attr_pmp_addr[CONFIG_PMP_SLOTS];
-#endif
-
-#ifdef CONFIG_MEM_ATTR
-int z_riscv_pmp_change_permissions(size_t region_idx, uint8_t perm)
-{
-	if (perm & ~PMP_PERM_MASK) {
-		LOG_ERR("Invalid PMP permission 0x%x. Only R, W, X (0x%x) are allowed.", perm,
-			PMP_PERM_MASK);
-		return -EINVAL;
-	}
-
-	const struct mem_attr_region_t *region;
-	size_t num_regions;
-
-	num_regions = mem_attr_get_regions(&region);
-
-	if (region_idx >= num_regions) {
-		LOG_ERR("region_idx %zu is out of bounds (num_regions: %zu)", region_idx,
-			num_regions);
-		return -EINVAL;
-	}
-
-	uintptr_t region_start_address = region[region_idx].dt_addr;
-	size_t region_size = region[region_idx].dt_size;
-	int entry_index = -1;
-
-	size_t pmp_cfg_size = CONFIG_PMP_SLOTS / PMPCFG_STRIDE;
-	unsigned long pmp_addr[CONFIG_PMP_SLOTS];
-	unsigned long pmp_cfg[pmp_cfg_size];
-
-	/*
-	 * The PMP configuration update (reading and writing) must be performed with
-	 * interrupts disabled. This prevents thread preemption from splitting the
-	 * atomic read-modify-write operation, which could lead to a catastrophic
-	 * half-configured state. Unlike other PMP functions, this is not called
-	 * from an already-atomic context.
-	 */
-	unsigned int key = arch_irq_lock();
-
-	z_riscv_pmp_read_addr(pmp_addr, (size_t)(CONFIG_PMP_SLOTS));
-	z_riscv_pmp_read_config(pmp_cfg, pmp_cfg_size);
-
-	uint8_t *pmp_n_cfg = (uint8_t *)pmp_cfg;
-
-	for (unsigned int index = 0; index < CONFIG_PMP_SLOTS; ++index) {
-		unsigned long start, end;
-
-		pmp_decode_region(pmp_n_cfg[index], pmp_addr, index, &start, &end);
-		if (start == region_start_address &&
-		    end == (region_start_address + region_size - 1)) {
-			entry_index = index;
-			break;
-		}
-	}
-
-	if (entry_index == -1) {
-		LOG_ERR("PMP entry for address 0x%lx not found", region_start_address);
-		arch_irq_unlock(key);
-		return -ENOENT;
-	}
-
-	/*
-	 * Clear the old R/W/X bits while preserving all other bits and tet the new R/W/X bits from
-	 * the 'perm' variable.
-	 */
-	pmp_n_cfg[entry_index] &= ~PMP_PERM_MASK;
-	pmp_n_cfg[entry_index] |= perm;
-
-	/*
-	 * Disable (non-locked) PMP entries for m-mode while we update them.
-	 * While at it, also clear MSTATUS_MPP as it must be cleared for
-	 * MSTATUS_MPRV to be effective later.
-	 */
-	csr_clear(mstatus, MSTATUS_MPRV | MSTATUS_MPP);
-	write_pmp_entries(entry_index, entry_index + 1, false, pmp_addr, pmp_cfg,
-			  ARRAY_SIZE(pmp_addr));
-	csr_set(mstatus, MSTATUS_MPRV);
-	arch_irq_unlock(key);
-
-	return 0;
-}
-#endif /* CONFIG_MEM_ATTR */
+/* End of global PMP entry range */
+static unsigned int global_pmp_end_index;
 
 /**
  * @Brief Initialize the PMP with global entries on each CPU
@@ -593,101 +385,72 @@ int z_riscv_pmp_change_permissions(size_t region_idx, uint8_t perm)
 void z_riscv_pmp_init(void)
 {
 	unsigned long pmp_addr[CONFIG_PMP_SLOTS];
-	unsigned long pmp_cfg[CONFIG_PMP_SLOTS / PMPCFG_STRIDE] = {0};
+	unsigned long pmp_cfg[CONFIG_PMP_SLOTS / PMPCFG_STRIDE];
 	unsigned int index = 0;
-	unsigned int attr_cnt = 0;
-
-	ARG_UNUSED(attr_cnt);
 
 #ifdef CONFIG_NULL_POINTER_EXCEPTION_DETECTION_PMP
 	/*
 	 * Use a PMP slot to make region (starting at address 0x0) inaccessible
 	 * for detecting null pointer dereferencing.
 	 */
-	set_pmp_entry(&index, PMP_NONE | COND_CODE_1(CONFIG_PMP_NO_LOCK_GLOBAL, (0x0), (PMP_L)),
+	set_pmp_entry(&index, PMP_NONE | PMP_L,
 		      0,
 		      CONFIG_NULL_POINTER_EXCEPTION_REGION_SIZE,
 		      pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
 #endif
 
 	/* The read-only area is always there for every mode */
-	set_pmp_entry(&index,
-		      PMP_R | PMP_X | COND_CODE_1(CONFIG_PMP_NO_LOCK_GLOBAL, (0x0), (PMP_L)),
+	set_pmp_entry(&index, PMP_R | PMP_X | PMP_L,
 		      (uintptr_t)__rom_region_start,
 		      (size_t)__rom_region_size,
 		      pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
 
-	/* SoC-specific PMP regions defined via iterable sections */
-	STRUCT_SECTION_FOREACH(pmp_soc_region, region) {
-		uintptr_t start = (uintptr_t)region->start;
-		size_t size = (uintptr_t)region->end - start;
-
-		if (size > 0) {
-			set_pmp_entry(&index, region->perm | COND_CODE_1(CONFIG_PMP_NO_LOCK_GLOBAL,
-								 (0x0), (PMP_L)), start,
-									  size, pmp_addr, pmp_cfg,
-									  ARRAY_SIZE(pmp_addr));
-		}
-	}
-
 #ifdef CONFIG_PMP_STACK_GUARD
 #ifdef CONFIG_MULTITHREADING
 	/*
 	 * Set the stack guard for this CPU's IRQ stack by making the bottom
-	 * addresses inaccessible. This will never change so we do it here.
+	 * addresses inaccessible. This will never change so we do it here
+	 * and lock it too.
 	 */
-	set_pmp_entry(&index, PMP_NONE | COND_CODE_1(CONFIG_PMP_NO_LOCK_GLOBAL, (0x0), (PMP_L)),
+	set_pmp_entry(&index, PMP_NONE | PMP_L,
 		      (uintptr_t)z_interrupt_stacks[_current_cpu->id],
 		      Z_RISCV_STACK_GUARD_SIZE,
 		      pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
-#else
-	/* Without multithreading setup stack guards for IRQ and main stacks */
-	set_pmp_entry(&index, PMP_NONE | COND_CODE_1(CONFIG_PMP_NO_LOCK_GLOBAL, (0x0), (PMP_L)),
-		      (uintptr_t)z_interrupt_stacks,
-		      Z_RISCV_STACK_GUARD_SIZE,
-		      pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
 
-	set_pmp_entry(&index, PMP_NONE | COND_CODE_1(CONFIG_PMP_NO_LOCK_GLOBAL, (0x0), (PMP_L)),
-		      (uintptr_t)z_main_stack,
-		      Z_RISCV_STACK_GUARD_SIZE,
-		      pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
-
-#endif /* CONFIG_MULTITHREADING */
-#ifdef CONFIG_SMP
-	unsigned int irq_index = index;
-#endif /* CONFIG_SMP */
-#endif
-
-#ifdef CONFIG_MEM_ATTR
 	/*
-	 * Set the memory attribute region as temporary PMP entries for early
-	 * kernel initialization. This provides essential protection before
-	 * the kernel mode memory attribute permission is fully operational.
-	 */
-	attr_cnt = set_pmp_mem_attr(&index, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
-#endif /* CONFIG_MEM_ATTR */
-
-#if defined(CONFIG_MEM_ATTR) || defined(CONFIG_PMP_NO_LOCK_GLOBAL)
-	/*
-	 * This early, we want to protect unlock PMP entries as soon as
-	 * possible. But we need a temporary default "catch all" PMP entry for
-	 * MPRV to work. Later on, this entry will be set for each thread by
-	 * z_riscv_pmp_kernelmode_prepare().
+	 * This early, the kernel init code uses the IRQ stack and we want to
+	 * safeguard it as soon as possible. But we need a temporary default
+	 * "catch all" PMP entry for MPRV to work. Later on, this entry will
+	 * be set for each thread by z_riscv_pmp_stackguard_prepare().
 	 */
 	set_pmp_mprv_catchall(&index, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
 
-	/* Write those entries to PMP regs. */
+	 /* Write those entries to PMP regs. */
 	write_pmp_entries(0, index, true, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
 
 	/* Activate our non-locked PMP entries for m-mode */
-	csr_clear(mstatus, MSTATUS_MPP);
 	csr_set(mstatus, MSTATUS_MPRV);
 
 	/* And forget about that last entry as we won't need it later */
 	index--;
 #else
+	/* Without multithreading setup stack guards for IRQ and main stacks */
+	set_pmp_entry(&index, PMP_NONE | PMP_L,
+		      (uintptr_t)z_interrupt_stacks,
+		      Z_RISCV_STACK_GUARD_SIZE,
+		      pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
+
+	set_pmp_entry(&index, PMP_NONE | PMP_L,
+		      (uintptr_t)z_main_stack,
+		      Z_RISCV_STACK_GUARD_SIZE,
+		      pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
+
 	/* Write those entries to PMP regs. */
 	write_pmp_entries(0, index, true, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
+#endif /* CONFIG_MULTITHREADING */
+#else
+	 /* Write those entries to PMP regs. */
+	write_pmp_entries(0, index, true, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
 #endif
 
 #ifdef CONFIG_SMP
@@ -697,36 +460,21 @@ void z_riscv_pmp_init(void)
 	 * Make sure TOR entry sharing won't be attempted with it by
 	 * remembering a bogus address for those entries.
 	 */
-	pmp_addr[irq_index - 1] = -1L;
+	pmp_addr[index - 1] = -1L;
 #endif
 
 	/* Make sure secondary CPUs produced the same values */
-	if (global_pmp_end_index[M_MODE] != 0) {
-		__ASSERT(global_pmp_end_index[M_MODE] == index, "");
+	if (global_pmp_end_index != 0) {
+		__ASSERT(global_pmp_end_index == index, "");
 		__ASSERT(global_pmp_cfg[index / PMPCFG_STRIDE] == pmp_cfg[index / PMPCFG_STRIDE],
 			 "");
-		__ASSERT(global_pmp_last_addr[M_MODE] == pmp_addr[index - 1], "");
+		__ASSERT(global_pmp_last_addr == pmp_addr[index - 1], "");
 	}
 #endif
 
 	memcpy(global_pmp_cfg, pmp_cfg, sizeof(pmp_cfg));
-	global_pmp_last_addr[M_MODE] = pmp_addr[index - 1];
-	global_pmp_end_index[M_MODE] = index;
-
-#ifdef CONFIG_USERSPACE
-	global_pmp_last_addr[U_MODE] = pmp_addr[index - attr_cnt - 1];
-	global_pmp_end_index[U_MODE] = index - attr_cnt;
-#endif /* CONFIG_USERSPACE */
-
-#if defined(CONFIG_MEM_ATTR) && defined(CONFIG_USERSPACE)
-	/*
-	 * Copy the memory attribute pmpaddr entries to the global buffer.
-	 * These kernel mode pmpaddr entries are saved for restoration when
-	 * switching back from user mode.
-	 */
-	memcpy(mem_attr_pmp_addr, &pmp_addr[global_pmp_end_index[U_MODE]],
-	       attr_cnt * PMPCFG_STRIDE);
-#endif
+	global_pmp_last_addr = pmp_addr[index - 1];
+	global_pmp_end_index = index;
 
 	if (PMP_DEBUG_DUMP) {
 		dump_pmp_regs("initial register dump");
@@ -736,9 +484,9 @@ void z_riscv_pmp_init(void)
 /**
  * @Brief Initialize the per-thread PMP register copy with global values.
  */
-#if defined(CONFIG_PMP_KERNEL_MODE_DYNAMIC) || defined(CONFIG_USERSPACE)
-static inline unsigned int z_riscv_pmp_thread_init(enum pmp_mode mode,
-						   unsigned long *pmp_addr, unsigned long *pmp_cfg,
+#if (defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)) || defined(CONFIG_USERSPACE)
+static inline unsigned int z_riscv_pmp_thread_init(unsigned long *pmp_addr,
+						   unsigned long *pmp_cfg,
 						   unsigned int index_limit)
 {
 	ARG_UNUSED(index_limit);
@@ -752,38 +500,23 @@ static inline unsigned int z_riscv_pmp_thread_init(enum pmp_mode mode,
 	 * Retrieve the pmpaddr value matching the last global PMP slot.
 	 * This is so that set_pmp_entry() can safely attempt TOR with it.
 	 */
-	unsigned int pmp_end_index = global_pmp_end_index[mode];
+	pmp_addr[global_pmp_end_index - 1] = global_pmp_last_addr;
 
-	pmp_addr[pmp_end_index - 1] = global_pmp_last_addr[mode];
-
-#if defined(CONFIG_MEM_ATTR) && defined(CONFIG_USERSPACE)
-	/*
-	 * This block restores the PMP entries used for memory attributes (set in
-	 * mem_attr_pmp_addr) that were overwritten when switching from user mode
-	 * back to kernel mode. It only applies when running in M_MODE pmp mode.
-	 */
-	if (mode == M_MODE) {
-		memcpy(&pmp_addr[global_pmp_end_index[U_MODE]], mem_attr_pmp_addr,
-		       (global_pmp_end_index[M_MODE] - global_pmp_end_index[U_MODE]) *
-			       PMPCFG_STRIDE);
-	}
-#endif
-
-	return pmp_end_index;
+	return global_pmp_end_index;
 }
 #endif
 
-#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
+#ifdef CONFIG_PMP_STACK_GUARD
+
+#ifdef CONFIG_MULTITHREADING
 /**
- * @brief Prepare the PMP kernelmode content for given thread.
+ * @brief Prepare the PMP stackguard content for given thread.
  *
  * This is called once during new thread creation.
  */
-void z_riscv_pmp_kernelmode_prepare(struct k_thread *thread)
+void z_riscv_pmp_stackguard_prepare(struct k_thread *thread)
 {
-	unsigned int index = z_riscv_pmp_thread_init(M_MODE, PMP_M_MODE(thread));
-
-#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
+	unsigned int index = z_riscv_pmp_thread_init(PMP_M_MODE(thread));
 	uintptr_t stack_bottom;
 
 	/* make the bottom addresses of our stack inaccessible */
@@ -794,12 +527,10 @@ void z_riscv_pmp_kernelmode_prepare(struct k_thread *thread)
 	} else if (z_stack_is_user_capable(thread->stack_obj)) {
 		stack_bottom = thread->stack_info.start - K_THREAD_STACK_RESERVED;
 	}
-#endif /* CONFIG_USERSPACE */
+#endif
 	set_pmp_entry(&index, PMP_NONE,
 		      stack_bottom, Z_RISCV_STACK_GUARD_SIZE,
 		      PMP_M_MODE(thread));
-#endif /* CONFIG_PMP_STACK_GUARD */
-
 	set_pmp_mprv_catchall(&index, PMP_M_MODE(thread));
 
 	/* remember how many entries we use */
@@ -807,13 +538,13 @@ void z_riscv_pmp_kernelmode_prepare(struct k_thread *thread)
 }
 
 /**
- * @brief Write PMP kernel mode content to actual PMP registers
+ * @brief Write PMP stackguard content to actual PMP registers
  *
  * This is called on every context switch.
  */
-void z_riscv_pmp_kernelmode_enable(struct k_thread *thread)
+void z_riscv_pmp_stackguard_enable(struct k_thread *thread)
 {
-	LOG_DBG("pmp_kernelmode_enable for thread %p", thread);
+	LOG_DBG("pmp_stackguard_enable for thread %p", thread);
 
 	/*
 	 * Disable (non-locked) PMP entries for m-mode while we update them.
@@ -823,17 +554,9 @@ void z_riscv_pmp_kernelmode_enable(struct k_thread *thread)
 	csr_clear(mstatus, MSTATUS_MPRV | MSTATUS_MPP);
 
 	/* Write our m-mode MPP entries */
-#ifdef CONFIG_USERSPACE
-	write_pmp_entries(global_pmp_end_index[U_MODE],
-			  thread->arch.m_mode_pmp_end_index,
+	write_pmp_entries(global_pmp_end_index, thread->arch.m_mode_pmp_end_index,
 			  false /* no need to clear to the end */,
 			  PMP_M_MODE(thread));
-#else
-	write_pmp_entries(global_pmp_end_index[M_MODE],
-			  thread->arch.m_mode_pmp_end_index,
-			  false /* no need to clear to the end */,
-			  PMP_M_MODE(thread));
-#endif /* CONFIG_USERSPACE */
 
 	if (PMP_DEBUG_DUMP) {
 		dump_pmp_regs("m-mode register dump");
@@ -843,18 +566,20 @@ void z_riscv_pmp_kernelmode_enable(struct k_thread *thread)
 	csr_set(mstatus, MSTATUS_MPRV);
 }
 
+#endif /* CONFIG_MULTITHREADING */
+
 /**
- * @brief Remove PMP kernel mode content to actual PMP registers
+ * @brief Remove PMP stackguard content to actual PMP registers
  */
-void z_riscv_pmp_kernelmode_disable(void)
+void z_riscv_pmp_stackguard_disable(void)
 {
 
 	unsigned long pmp_addr[CONFIG_PMP_SLOTS];
 	unsigned long pmp_cfg[CONFIG_PMP_SLOTS / PMPCFG_STRIDE];
-	unsigned int index = global_pmp_end_index[M_MODE];
+	unsigned int index = global_pmp_end_index;
 
 	/* Retrieve the pmpaddr value matching the last global PMP slot. */
-	pmp_addr[index - 1] = global_pmp_last_addr[M_MODE];
+	pmp_addr[global_pmp_end_index - 1] = global_pmp_last_addr;
 
 	/* Disable (non-locked) PMP entries for m-mode while we update them. */
 	csr_clear(mstatus, MSTATUS_MPRV);
@@ -866,14 +591,15 @@ void z_riscv_pmp_kernelmode_disable(void)
 	set_pmp_mprv_catchall(&index, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
 
 	/* Write "catch all" entry and clear unlocked entries to PMP regs. */
-	write_pmp_entries(global_pmp_end_index[M_MODE], index,
+	write_pmp_entries(global_pmp_end_index, index,
 			  true, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
 
 	if (PMP_DEBUG_DUMP) {
 		dump_pmp_regs("catch all register dump");
 	}
 }
-#endif /* CONFIG_PMP_KERNEL_MODE_DYNAMIC */
+
+#endif /* CONFIG_PMP_STACK_GUARD */
 
 #ifdef CONFIG_USERSPACE
 
@@ -895,7 +621,7 @@ void z_riscv_pmp_usermode_init(struct k_thread *thread)
  */
 void z_riscv_pmp_usermode_prepare(struct k_thread *thread)
 {
-	unsigned int index = z_riscv_pmp_thread_init(U_MODE, PMP_U_MODE(thread));
+	unsigned int index = z_riscv_pmp_thread_init(PMP_U_MODE(thread));
 
 	LOG_DBG("pmp_usermode_prepare for thread %p", thread);
 
@@ -939,52 +665,8 @@ static void resync_pmp_domain(struct k_thread *thread,
 			continue;
 		}
 
-#ifdef CONFIG_MEM_ATTR
-		/*
-		 * Determine whether the partition is covered by a memory
-		 * attribute region.
-		 *
-		 * Constraint due to number of PMP entry limitation:
-		 * The logic asserts against any cases that requires splitting
-		 * a partition into multiple permissions, such as partial
-		 * overlap or the partition fully containing the memory
-		 * attribute region but not fully match.
-		 *
-		 * Supported cases:
-		 * 1. Partition excludes all memory attribute regions
-		 *    The partition's permission is applied directly.
-		 * 2. Partition is contained in a memory attribute region:
-		 *    The partition's permission is masked with the memory
-		 *    attribute.
-		 */
-		const struct mem_attr_region_t *region;
-		uint8_t attr_mask = PMP_R | PMP_W | PMP_X;
-
-		for (int idx = 0; idx < mem_attr_get_regions(&region); idx++) {
-			uintptr_t dt_start = (uintptr_t)(region[idx].dt_addr);
-			uintptr_t dt_end = dt_start + (size_t)(region[idx].dt_size);
-			bool covered = false;
-
-			/* No overlap at all, skip this memory region */
-			if ((part->start + part->size) <= dt_start || part->start >= dt_end) {
-				continue;
-			}
-
-			/* Check if the partition is contained in the memory attribute region. */
-			covered = part->start >= dt_start && (part->start + part->size) <= dt_end;
-			__ASSERT(covered, "No allowed partition partially overlaps memory region");
-
-			attr_mask = DT_MEM_RISCV_TO_PMP_PERM(region[idx].dt_attr);
-			break;
-		}
-
-		ok = set_pmp_entry(&index, part->attr.pmp_attr & attr_mask, part->start, part->size,
-				   PMP_U_MODE(thread));
-#else
-		ok = set_pmp_entry(&index, part->attr.pmp_attr, part->start, part->size,
-				   PMP_U_MODE(thread));
-#endif
-
+		ok = set_pmp_entry(&index, part->attr.pmp_attr,
+				   part->start, part->size, PMP_U_MODE(thread));
 		__ASSERT(ok,
 			 "no PMP slot left for %d remaining partitions in domain %p",
 			 remaining_partitions + 1, domain);
@@ -1020,14 +702,13 @@ void z_riscv_pmp_usermode_enable(struct k_thread *thread)
 		resync_pmp_domain(thread, domain);
 	}
 
-#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
+#ifdef CONFIG_PMP_STACK_GUARD
 	/* Make sure m-mode PMP usage is disabled before we reprogram it */
 	csr_clear(mstatus, MSTATUS_MPRV);
 #endif
 
 	/* Write our u-mode MPP entries */
-	write_pmp_entries(global_pmp_end_index[U_MODE],
-			  thread->arch.u_mode_pmp_end_index,
+	write_pmp_entries(global_pmp_end_index, thread->arch.u_mode_pmp_end_index,
 			  true /* must clear to the end */,
 			  PMP_U_MODE(thread));
 
@@ -1041,7 +722,7 @@ int arch_mem_domain_max_partitions_get(void)
 	int available_pmp_slots = CONFIG_PMP_SLOTS;
 
 	/* remove those slots dedicated to global entries */
-	available_pmp_slots -= global_pmp_end_index[U_MODE];
+	available_pmp_slots -= global_pmp_end_index;
 
 	/*
 	 * User thread stack mapping: