Commit Graph

103604 Commits

Author SHA1 Message Date
Daniel Schultz
464b64af6f configs: phycore_am62x_r5_ethboot_defconfig: Drop NET_RANDOM_ETHADDR
BOOTP does not support dynamic lease expiration. Using random MAC
addresses on R5 network boot binaries would result in continuously
allocated IPs without proper release.

Since only one interface is enabled for network boot, rely on the
MAC address provided by the efuses instead.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2026-01-21 09:17:17 -06:00
Wadim Egorov
3396e7d4aa configs: phycore_am6xx_a53_defconfig: Enable CMD_DDR4
Enable command for verifying DDRSS inline ECC features.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2026-01-21 09:17:17 -06:00
Tom Rini
84fac64026 gardena-smart-gateway-mt7688: Disable CMD_LICENSE
This platform is unfortunately frequently very close to the binary
size limit. Currently it is so close that generic bug fixes can trigger
build failure. Remove the license command from the image as that frees
up nearly 7KiB of space.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-13 08:43:45 -06:00
Beleswar Padhi
711150fc6f configs: am57xx_hs_evm_defconfig: Reserve EMIF memory used by PPA
The AM571x SoC has 1 GB DDR space. As part of normal re-location process
U-Boot copies itself to the top of DDR bank. However, on HS devices, the
top 37 MB is used by PPA and is firewalled. This results in an exception
and the boot fails. Set CONFIG_SYS_MEM_TOP_HIDE to reserve the top 38 MB
memory (aligned to 2MB as per page size for ARM32) to fix the boot.

Note: This limitation does not exist for other AM57x devices, but this
config is applied in the common defconfig since adding a separate
defconfig only for AM571x is not justified. Losing 38MB of memory at the
bootloader stage on other devices is acceptable.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
2026-01-12 19:29:00 -06:00
Tom Rini
21e64d0c92 Merge patch series "a few test.py improvements"
David Lechner <dlechner@baylibre.com> says:

While trying to run the test suite for the first time, I encountered a
few minor issues. Here are a few patches to address them.

Link: https://lore.kernel.org/r/20260105-a-few-test-py-improvements-v3-0-fea38243ca5b@baylibre.com
2026-01-12 15:12:47 -06:00
David Lechner
487ab1c991 pylibfdt: add requirements.txt for setuptools
Add a requirements.txt file to the pylibfdt script directory to specify
setuptools as a dependency. This follows the pattern of each tool in
U-Boot having its own requirements.txt file. The version is set to
78.1.1 to avoid conflict with the same in tools/patman/requirements.txt.

Reviewed-by: Simon Glass <simon.glass@canonical.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> # sandbox
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 15:12:41 -06:00
David Lechner
c85d302bf2 doc: pytest: mention additional requirements for venv
Add a paragraph explaining that in addition to the requirements.txt
for test/py/test.py itself, users may need to install additional python
packages depending on the U-Boot configuration being built.

Reviewed-by: Simon Glass <simon.glass@canonical.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> # sandbox
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 15:12:41 -06:00
David Lechner
637942ac8e test.py: check ubconfig exists before using it
Set ubconfig to None and add a check in the show_timings() function of
test/py/test.py to ensure that the global ubconfig variable was actually
initialized before access attributes.

If tests fail early, e.g. because --build failed, ubconfig may not have
been initialized yet and results in an exception in an atexit handler.
Adding this check avoids unnecessary noise in the output.

    Exception ignored in atexit callback: <function cleanup at 0x7de475ea6b60>
    Traceback (most recent call last):
    File "u-boot/test/py/conftest.py", line 669, in cleanup
        show_timings()
    File "u-boot/test/py/conftest.py", line 616, in show_timings
        if ubconfig.timing:
        ^^^^^^^^
    NameError: name 'ubconfig' is not defined

Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> # sandbox
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 15:12:41 -06:00
Tom Rini
476c59be74 Merge patch series "pinctl: mediatek: add mt8365 support"
David Lechner <dlechner@baylibre.com> says:

MT8365 has different pinctrl register layout compared to other SoCs in
the family, so needs its own driver.

This is also the first SoC in this family supported in U-Boot using an
upstream devicetree that has the mediatek,pctl-regmap property, so we
need to add support for that to the common mediatek pinctrl code first.

Link: https://lore.kernel.org/r/20260106-pinctl-mtk-mt8365-v1-0-0ca3eb382468@baylibre.com
2026-01-12 13:41:54 -06:00
David Lechner
b58573e894 configs: mt8365_evk: enable pinctrl
Enable PINCTRL, PINCONF and the SoC-specific driver for MediaTek MT8365
EVK.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:41:17 -06:00
Vitor Sato Eschholz
5f836e52be pinctrl: mediatek: add pinctrl driver for MT8365 SoC
Add pinctrl support for MT8365 SoC.

Signed-off-by: Julien Masson <jmasson@baylibre.com>
Signed-off-by: Vitor Sato Eschholz <vsatoes@baylibre.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:41:17 -06:00
David Lechner
424ceba18b pinctrl: mediatek: support mediatek,pctl-regmap property
Add support for the mediatek,pctl-regmap devicetree property to the
common MediaTek pinctrl driver.

In upstream devicetrees from Linux, the pinctrl nodes may be on the
interrupt controller register address space rather than the pinctrl
register address space. In this case, there is a syscon node linking to
the actual pinctrl registers. This uses a common property name of
mediatek,pctl-regmap for the phandle to the syscon node.

The logic here is that if this property is present, we look up the
syscon node and use it's address as the base address of the pinctrl
registers and ignore the pinctrl node's own reg property. (Support
for interrupts could be added later if needed.)

There is also at least one SoC in Linux that has two syscon phandles
in this property. This implementation support parsing this, but doesn't
do anything with the second syscon yet (the 2nd syscon is for interrupts
which we are saving for later).

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:41:17 -06:00
Tom Rini
2d8d220d70 Merge patch series "clk: mediatek: mt8365: fix clocks"
David Lechner <dlechner@baylibre.com> says:

There were a number of bugs in the clock definitions for the mt8365
clock drivers. This series aims to fix the obvious issues.

This builds on [1] that implements the clk dump command to inspect the
clock trees at runtime. Using that revealed quite a few mistakes in
the clock definitions.

Additionally, the topckgen-cg hack is removed for mt8365 since it would
require an extra devicetree node using the same address space as the
topckgen node. This would not be accepted upstream in Linux, so we
shouldn't do it in U-Boot either. mt85{12,16,18} also have this hack.
I didn't attempt to remove it from those platforms since I don't have
hardware to test on.

Patches have been runtime tested on mt8365_evk hardware and compile-
tested on other platforms using:

    ./tools/buildman/buildman --boards=mt7986a_bpir3_sd,mt7620_rfb,mt7986_rfb,mt7987_emmc_rfb,mt7987_rfb,mt7622_rfb,mt7987_sd_rfb,mt7623a_unielec_u7623_02,mt7988_rfb,mt7623n_bpir2,mt7988_sd_rfb,mt7628_rfb,mt8183_pumpkin,mt7629_rfb,mt8365_evk,mt7981_emmc_rfb,mt8512_bm1_emmc,mt7981_rfb,mt8516_pumpkin,mt7981_sd_rfb,mt8518_ap1_emmc -b HEAD -c 9

[1]: https://lore.kernel.org/u-boot/20251218-clk-mtk-improvements-v1-0-72db131ba148@baylibre.com/
Link: https://lore.kernel.org/r/20260107-clk-mtk-mt8365-fixes-v2-0-3294a5d2f239@baylibre.com
2026-01-12 13:35:03 -06:00
David Lechner
682528df20 clk: mediatek: mt8365: fix missing topckgen IDs
Use a ID map to add clocks for the missing CLK_TOP_CLK32K and
CLK_TOP_CLK26M that were not included in the devicetree definitions.

This fixes getting the rate of any clock that had one of these as a
parent.

CLK_TOP_UNIVPLL does not appear to be a real clock, so it is omitted
now since we can do that with the ID map as well.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:35:03 -06:00
David Lechner
ba207d7f54 clk: mediatek: mt8365: remove separate topckgen-cg driver
Remove the separate topckgen-cg driver for handling clock gates in the
topckgen address space. The devicetree bindings for this were not
acceptable upstream because it was creating a separate clock controller
using the same address space as the main topckgen clock controller. The
gates are moved to the topckgen tree instead.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:35:03 -06:00
David Lechner
8aeeeff50d clk: mediatek: allow gates in topckgen drivers
Add handling for gates in the topckgen clk drivers. This avoids the need
to have separate topckgen-cg drivers and devicetree nodes for the same
address space and clock ID range.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:35:03 -06:00
David Lechner
4cc0f1b318 clk: mediatek: mt8365: split struct mtk_clk_tree
Split the struct mtk_clk_tree for MT8365 into separate structures for
the apmixedsys, topckgen and infracfg clock controllers. This is needed
to support moving the topckgen gates into the struct mtk_clk_tree. Since
apmixedsys can also have gates, we need separate structures.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:35:03 -06:00
David Lechner
72f56becc0 clk: mediatek: mt8365: fix some clock parents
Fix a number of clock parent definitions for MT8365 clocks. Most of
these are just informational or don't make a function change.

The clocks with the new PLL_FACTOR2 macro and the change in apu_parents
are fixing actual bugs.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:35:03 -06:00
David Lechner
9e84e145e3 clk: mediatek: fix fixed clock parents
Add a flags field to struct mtk_fixed_clk to allow properly resolving
the parent clock. All chip-specific clocks are updated to populate this
field correctly.

The parent is currently only used for printing debug information, so
there are no functional bugs being fixed.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:35:03 -06:00
David Lechner
a694df199a clk: mediatek: add separate gates_offs for cg gates
Add a gates_offs field to struct mtk_cg_priv and use that instead of
struct mtk_clk_tree.gates_offs.

Prior to this change, struct mtk_clk_tree.gates_offs could be the offset
of struct mtk_clk_tree.gates or struct mtk_cg_priv.gates depending on
the context. This was confusing and error-prone. For example, in mt8365
there is one set of gates that needs an offset and one that does not
that share the same struct mtk_clk_tree. This is fixed in this patch by
giving the correct offset for each gate separately.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:35:03 -06:00
David Lechner
32087f61ad clk: mediatek: mt8365: fix missing and out of order clocks
Fix a few missing clocks and even more clocks in the incorrect order.
Since the clocks are looked up by index, having them out of order or
skipping an ID will lead to incorrect clocks being used.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:35:03 -06:00
David Lechner
488c396e71 mt8365_evk_defconfig: enable clk command
Enable CONFIG_CMD_CLK in the mt8365_evk_defconfig to allow using the
clk dump command for debugging clock configurations.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:35:03 -06:00
Tom Rini
8cfb0ad1a0 Merge patch series "clk: mediatek: implement of_xlate and dump"
David Lechner <dlechner@baylibre.com> says:

I started looking into fixing some bugs in the mt8365 clock driver and
realized that there was no way to inspect or debug the clock trees.

I set out to implement the dump function to help with this. The driver
architecture didn't make this easy since there was no way to know the
number of elements in each of the clock arrays. The first few patches
in this series are adding fields to the data structures to hold this
information.

Once that was fixed, I was still getting crashes due to other bugs. To
work around this, I implemented the of_xlate function to validate clk
IDs as early as possible and return errors instead of crashing when
requested IDs are invalid. This also makes use of the new size fields
to prevent out of bounds array accesses. There are a couple of drivers
that remap IDs, so there are a few extra patches to handle that as well.

Then finally, I was able to implement the dump function to print out the
clock tree information without crashing. In the v1 cover letter, there
is an example of the output (it is quite long and doesn't need to be
repeated here).

Link: https://lore.kernel.org/r/20260107-clk-mtk-improvements-v2-0-7d4338e520a1@baylibre.com
2026-01-12 13:17:00 -06:00
David Lechner
c8ebe42b3f clk: mediatek: implement dump callbacks
Implement dump callbacks for Mediatek clocks. On these platforms, there
are 100s of clocks, so it can be easy to miss mistakes. The dump
callbacks will be useful for debugging and verifying clock configs.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:14:02 -06:00
David Lechner
eb2bf2bc83 clk: mediatek: mt7623: set unmapped IDs to -1
Add range initializers to the id_offs_map arrays in the mt7623 clk
driver to set unmapped IDs to -1. This prevents accidental usage of
unmapped IDs that would otherwise map to 0.

mtk_common_clk_of_xlate() checks these values for < 0 and returns
-ENOENT in that case.

A range initializer covering the entire array is used since it is less
error-prone than manually looking up the value of each macro in the
existing initializers and checking for gaps. It is placed first so that
the specific initializers override it.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:14:02 -06:00
David Lechner
cc1a458a3d clk: mediatek: clarify mapped vs. unmapped ID
Update documentation comments to clarify the difference between which
.id fields are mapped (only struct clk.id) vs. unmapped (all struct
mtk_*.id and .parent fields). The unmapped IDs are the ones defined
in the devicetree bindings, while the mapped IDs are the ones used as
the index into the various clk arrays.

Also fix spelling of "parent" while we are touching this.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:14:02 -06:00
David Lechner
b135891572 clk: mediatek: add of_xlate ops
Add driver-specific of_xlate ops for MediaTek clocks. This provides
better checking of the args passed from the devicetree. Compared to
the default of_xlate implementation, this will return -EINVAL if there
are zero args (id is always required) and -ENOENT if the id is out of
range for the clock type. This will protect against out of bounds array
accesses later on when the clk->id is used to index into the clock
data arrays.

If there is a id_offs_map, then we have to do that translation first
before checking the id to see if it is in range. There is no sense in
doing the mapping multiple times, so we save the mapped ID in clk->id
and remove mtk_clk_get_id().

mtk_clk_find_parent_rate() also had to be updated since it creates a
temporary struct clk to represent the parent clock. It now has do the
translation in case the parent clock also uses an id_offs_map.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:14:02 -06:00
David Lechner
159825bdd5 clk: mediatek: organize infrasys functions
Move all infrasys ops and related functions next to each other in the
file for better organization.

Generally all ops functions are grouped together like this for the other
ops types (apmixedsys, topckgen, etc). However the infrasys functions
were mixed in with the other sections making them harder to find. This
will also give a logical place to add any future infrasys-specific
functions.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:14:02 -06:00
David Lechner
6094f0a040 clk: mediatek: add array size field for id_offs_map
Add id_offs_map_size field to struct mtk_clk_tree and populate it for
all existing drivers.

Currently, there is no bounds checking when accessing the id_offs_map
array. Adding this field will allow for bounds checking in the future.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:14:02 -06:00
David Lechner
538f72f403 clk: mediatek: add array size fields to cg gates
Add num_gates field to struct mtk_cg_priv and populate it for all
existing drivers.

Currently, there is no bounds checking when accessing the gates array.
Adding this field will allow for bounds checking in the future.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:14:02 -06:00
David Lechner
3d54f47ae5 clk: mediatek: add array size fields to clk trees
Add num_plls, num_fclks, num_fdivs, num_muxes, and num_gates fields to
the mtk_clk_tree struct and populate them in the clk trees for all
existing drivers.

Currently, there is no bounds checking when accessing the arrays in
the clk tree structs. Adding these fields will allow for bounds checking
in the future.

Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-01-12 13:14:02 -06:00
Tom Rini
1bcb2fe324 Merge patch series "Enable / require DEVRES for devm_.alloc usage outside xPL"
Tom Rini <trini@konsulko.com> says:

As seen by a number of patches fixing memory leaks, U-Boot has a problem
with developer expectations around devm_kmalloc and friends. Namely,
whereas in Linux these memory allocations will be freed automatically in
most cases, in U-Boot this is only true if DEVRES is enabled. Now,
intentionally, in xPL phases, we do not (and do not offer as an option)
enabling DEVRES. However in full U-Boot this is left either to the user,
or some drivers have select'd DEVRES on their own. This inconsistency is
a problem. This series goes and deals with two small issues that were
shown by having all drivers that use devm_.alloc to allocate memory also
select DEVRES and then we make DEVRES no longer be a prompted option and
instead select'd as needed. We do not make this unconditional as it
would result in growing the resulting binary on the many platforms which
have no users of the devm_.alloc family of functions.

Link: https://lore.kernel.org/r/20251227223833.3019311-1-trini@konsulko.com
2026-01-09 10:19:57 -06:00
Tom Rini
217cf656e2 dm: core: Default to using DEVRES outside of xPL
The devm alloc functions that we have may follow the Linux kernel model
where allocations are (almost always) automatically free()'d. However,
quite often we don't enable, in full U-Boot, the tracking and free()'ing
functionality. This in turn leads to memory leaks because the driver
author expects that since the functions have the same name as in the
Linux Kernel they have the same behavior. In turn we then get
functionally correct commits such as commit 00e1fed93c ("firmware:
ti_sci: Fix memory leaks in devm_ti_sci_get_of_resource") that manually
add these calls. Rather than manually tracking allocations and
implementing free()s, rework things so that we follow expectations by
enabling the DEVRES functionality (outside of xPL phases).

This turns DEVRES from a prompted symbol to a symbol that must be
select'd, and we now remove our non-managed alloc/free functions from
outside of xPL builds.

Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-09 09:08:14 -06:00
Tom Rini
284e1a00f4 x86: Increase SYS_MALLOC_F_LEN to 0x1000
A few x86 platforms use a SYS_MALLOC_F_LEN value of 0x1000 or higher.
With the impending move to having DEVRES enabled by default, we will
need a little more room here. Raise the default value.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-09 09:08:14 -06:00
Tom Rini
cf51247c63 Gitlab CI: Add BeagleBone Black to sage lab
This adds support for a BeagleBone Black platform to the sage lab. We
test with both the legacy network stack and lwIP.

Signed-off-by: Tom Rini <trini@konsulko.com>
2026-01-09 09:07:17 -06:00
Bryan Brattlof
ce19a4af0a configs: am62[ap]x_evm_r5: enable SUPPORT_EMMC_BOOT
When unifying the SD/eMMC boot behavior between the different AM62*
reference boards we missed enabling SUPPORT_EMMC_BOOT. This causes the
SPL in tiboot3.bin to look for the tispl.bin in the UDA partition in the
eMMC and fail.

Enable SUPPORT_EMMC_BOOT at the tiboot3 stage to load the next boot
binary from the active boot partition when in RAW MMC boot modes.

Fixes: 3b7893145e ("mach-k3: add eMMC FS boot support for am62[ap]")
Signed-off-by: Bryan Brattlof <bb@ti.com>
2026-01-09 09:07:13 -06:00
Tom Rini
c05dba22f1 Merge branch 'master' of git://source.denx.de/u-boot-usb
- DWC3 for exynos7870
- Avoid a noisy message on xhci controllers
2026-01-08 10:28:15 -06:00
Tom Rini
ed4ec707e0 Merge tag 'mmc-for-2026.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-mmc
CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/28960

- Revert "Use max-frequency from device tree with default handling"
- Select CRC16 MMC_SPI_CRC_ON
- Add 1ms delay with 1ms margin after mmc power on to follow spec
2026-01-08 10:27:17 -06:00
Tanmay Kathpalia
c4f5b1d4b0 Revert "mmc: mmc-uclass: Use max-frequency from device tree with default handling"
This reverts commit aebb523a23.

The change to use dev_read_u32_default() with a default value of 0
causes regression for host controller drivers that hardcode f_max
before calling mmc_of_parse().

When the "max-frequency" property is not specified in the device tree,
dev_read_u32_default() returns 0, which overwrites the previously
configured f_max value set by the driver. This effectively resets
the maximum frequency to 0, breaking MMC functionality for those
controllers.

Revert to the original dev_read_u32() behavior which only updates
cfg->f_max when the "max-frequency" property is explicitly present
in the device tree, preserving driver-configured values otherwise.

Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-01-08 22:23:48 +08:00
Kaustabh Chakraborty
14d9e84fc5 usb: dwc3-generic: add support for exynos7870
Exynos7870's DWC3 glue layer is quite simple, consisting of a few
clocks, which is handled by this driver. Add the compatible string in
here.

Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
2026-01-08 15:13:19 +01:00
Kaustabh Chakraborty
218ad7ba3f usb: dwc3-generic: allow fallback of dr_mode property to "otg"
Documentation [1] states that the default value of the dr_mode property
is "otg". It also isn't marked a mandatory node, so it may or may not be
set. So, accordingly if dr_mode is not mentioned in the devicetree node,
OTG mode must be assumed.

In this driver however, this case is not handled. If dr_mode is not
mentioned, USB_DR_MODE_UNKNOWN is set. The logic implemented raises an
error, instead of falling back to USB_DR_MODE_OTG. Correct this to
conform to the specification.

Link: https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/tree/Bindings/usb/usb-drd.yaml?h=v6.18-dts [1]
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
2026-01-08 15:13:19 +01:00
Heinrich Schuchardt
13c9c975e7 usb: xhci: avoid noisy 'Starting the controller' message.
We should avoid overwhelming users with non-essential messages.

The message 'Starting the controller' is not written for EHCI.
We should not write it for XHCI either.

Adjust the Python test accordingly.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2026-01-08 15:12:59 +01:00
Daniel Palmer
3f208e1a99 mmc: mmc_spi: Select CRC16 if CRC checking is enabled
Currently CRC16 is not selected when CRC checking is enabled and
if it wasn't enabled in the config otherwise the build will fail
because of references to crc16_ccitt() that doesn't exist.

Signed-off-by: Daniel Palmer <daniel@thingy.jp>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-01-08 22:05:53 +08:00
Christoph Stoidner
21cdfd1992 mmc: Fix missing 1 ms delay after mmc power up
mmc/sd specification requires a 1 ms delay (stable supply voltage)
after vdd was enabled and before issuing first command.

For most sdcard/soc combinations, the missing delay seems to be not a
problem because the processing time between enabling vdd and the first
command is often hundreds of microseconds or more. However, in our
specific case, some sdcards were not detected by u-boot:
* soc: NXP i.MX 93
* sdcards: SanDisk Ultra, 64GB micro SDXC 1,
           MediaRange, 8GB, SDHC
* measured time between vdd and first command: approx. 784us
* symptom: both sdcards did not respond at all to first commands,
           u-boot mmc subsystem ran into timeout and stops to
           initialize the cards

Signed-off-by: Christoph Stoidner <c.stoidner@phytec.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-01-08 21:57:20 +08:00
Tom Rini
141be72e2a Merge patch series "test: env: Add test for environment storage in SPI NOR"
This patch series from Marek Vasut <marek.vasut+renesas@mailbox.org>
adds support for having a platform be able to convert from a
non-redundant envrionment to a redundant one at run-time.

Link: https://lore.kernel.org/r/20251223143130.16266-1-marek.vasut+renesas@mailbox.org
2026-01-07 12:31:56 -06:00
Tom Rini
94a4e845db Merge tag 'i2c-updates-for-2026.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-i2c
Updates for 2026.04-rc1

CI: https://dev.azure.com/hs0298/hs/_build/results?buildId=198&view=results

- add support for Exynos7 HS-I2C
  from Kaustabh Chakraborty
2026-01-07 12:31:26 -06:00
Marek Vasut
8dd76166e3 configs: sandbox: Enable environment in SPI NOR support
Make environment support in SPI NOR available in sandbox,
so the environment storage in SPI NOR can be tested in CI.
Enable redundant environment support as well to cover this
in CI tests too.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-01-07 12:31:26 -06:00
Kaustabh Chakraborty
2dd6c145ab i2c: samsung: add support for Exynos7 HS-I2C
Exynos7 (and later) HS-I2C blocks have special interrupts regarding
various data transfer states (see HSI2C_INT_I2C_TRANS_EN). Add support
for enabling and handling these interrupt bits.

Add the corresponding compatible, 'samsung,exynos7-hsi2c'. In order to
differentiate between the multiple device variants, an enum is
introduced which is used where difference in implementations exist.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
2026-01-07 12:31:26 -06:00
Marek Vasut
1f13138581 env: Add single to redundant environment upgrade path
Add support for converting single-copy environment to redundant environment.
In case CRC checks on both redundant environment copies fail, try one more
CRC check on the primary environment copy and treat it as single environment.
If that check does pass, rewrite the single-copy environment into redundant
environment format, indicate the environment is valid, and import that as
usual primary copy of redundant environment. Follow up 'env save' will then
store two environment copies and the system will continue to operate as
regular redundant environment system.

Add test which validates this upgrade path. The test starts with spi.bin
which is pre-populated as single-copy environment and then upgrades that
environment to dual-copy environment.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-01-07 12:31:26 -06:00
Marek Vasut
88de22a4db test: env: Add test for environment storage in SPI NOR
Add test for environment stored in SPI NOR. The test works in a very
similar way to the current test for environment stored in ext4 FS,
except it generates spi.bin file backing the SPI NOR.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2026-01-07 12:31:26 -06:00