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967 Commits

Author SHA1 Message Date
Jamie McCrae
57302b5bfb soc: Remove soc_legacy folder and move ARM Kconfig
Removes the soc_legacy folder which is left over from the
transition to hwmv2 and moves the Kconfig for ARM to arch

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 19:03:21 +00:00
Daniel DeGrasse
f12cb0979f scripts: ci: check_compliance: remove HWMv1 checks
Remove HWMv1 check compliance code, since no HWMv1 boards or SOCs
now exist in tree

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Co-authored-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
1807bcf4d4 boards: mimx8mq_evk: port to HWMv2
Port mimx8mq_evk to HWMv2. As this is the final SOC in the legacy
boards folder, that folder is also removed

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
3ec2299c62 soc: nxp: port imx8mq SOC to HWMv2
Port IMX8M Quad SOC to HWMv2. Only the M4 core is enabled.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
8ea02f4e63 boards: verdin_imx8mp: convert to HVMv2
Convert verdin_imx8mp to HWMv2. Only the M7 core of the iMX8MP is
currently supported

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
f2eb7652ce boards: phyboard_pollux: move to HVMv2
Move phyboard_pollux to HWMv2

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
ab509a5ee0 boards: nxp: mimx8mp_evk: port M7 core to HWMv2
Port M7 core of mimx8mp_evk to HWMv2

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
06ad037f99 soc: nxp: imx8mp: port M7 core to HWMv2
Port M7 core of imx8mp to HWMv2

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
3f9e706859 boards: mimx8mm_phyboard: convert to HVMv2
Convert mimx8mm_phyboard to HVMv2. This port only enables the M4 core of
the iMX8MM SOC present on this board.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
204372d264 boards: imx8mm_evk: port CM4 core to HWMv2
Port CM4 core to HVMv2. This core is merged with the existing board
definition, which supported the A53 target.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
f82c961a46 soc: nxp: imx8mm: port iMX8MM M4 core to HVMv2
Port iMX8MM M4 core of iMX8MM SOC  to HVMv2. The A53 core has already
been ported, so this port adds to that SOC definition.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
6987b2e305 boards: pico_pi: convert to HVMv2
Convert pico_pi board to HWMv2. This board port only supports the M4
core on the SOC

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
84484e6707 boards: warp7: convert to HWMv2
Convert warp7 board to HWMv2. This board was originally ported
using the iMX7D SOC (despite the fact that board uses an iMX7S
SOC). For HWMv2, this board continues to use the IMX7D SOC port,
since only the M4 core is enabled.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
ae443d1e3c boards: meerkat96: port to HWMv2
Port 96boards meerkat96b board to HWMv2. This board port only supports
the M4 core present on the iMX7D SOC.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
e3629c64e6 boards: colibri_imx7d: port to HWMv2
Port Colibri iMX7D board to HWMv2. This port only supports the M4 core
of the iMX7D SOC.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
fc835d893d soc: nxp: convert iMX7 Dual core to HWMv2
Convert iMX7 Dual core to HWMv2. As in HWMv1, Only M4 core is supported
by this port.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
29ef2f23eb boards: udoo_neo_full: convert to HWMv2
Convert udoo_neo_full board to HWMv2.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
fd49b1749e soc: nxp: convert iMX6 SoloX core to HWMv2
Convert iMX6 SoloX core to HWMv2. This port currently only supports the
M4 core (as it did in HWMv1)

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Daniel DeGrasse
1e59b7a3fd soc: nxp: imxrt11xx: only set CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION for M7
Only set CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION for Cortex M7 cores, as the
M4 core on iMXRT11xx parts does have a double precision FPU

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 17:29:02 +00:00
Declan Snyder
69bb0eb258 hwmv2: MAINTAINERS: Fix NXP maintainer yaml
Fix orphaned areas and wrong assigns of NXP platform areas,
add MPU area, and clean up files patterns using regex

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-01 18:19:13 +01:00
Jamie McCrae
1c4458890f boards: firefly: roc_rk3568_pc: Fix SMP configuration
Fixes the build configuration

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:14 +01:00
Jamie McCrae
651a4370ad boards: Fix variants and revisions
Fixes revisions and variants which do not have the soc name in
the filenames

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:14 +01:00
Jamie McCrae
196cfda66d tests/samples: Drop default revision identifiers
Drops default identifiers

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:14 +01:00
Jamie McCrae
6ec6b1d75a boards: Drop revision from twister identifiers for default revisions
Drops default revisions for twister usage for the default board
revisions

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:14 +01:00
Gerard Marull-Paretas
b774cdd59f scripts: utils: board_v1_to_v2: drop board_legacy prefix
So that script can be used for out of tree boards from now on. All
in-tree boards have been already ported, so the prefix no longer makes
sense.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:50:14 +01:00
Sylvio Alves
7aa36e6640 boards: riscv: esp32c3_luatos_core: make usb variant
Converts the board above to use variant option.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:14 +01:00
Torsten Rasmussen
fe25709a9c twister: add unit_testing soc and board
Create board.yml and soc.yml for the unit_testing board so that
list_board.py can correctly find those boards for twister unit test
test-cases.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:14 +01:00
Fabio Baltieri
f88f211b4e scripts: ci: check_compliance: improve the "not sorted" command
Add a message to the KeepSorted error message with a oneline command to
sort the block failing the check.

Looks something like:

KeepSorted:sorted block is not sorted, sort by running:
"ex -s -c '14,757 sort i|x' dts/bindings/vendor-prefixes.txt"

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:50:14 +01:00
Jamie McCrae
b21a455dfb bluetooth: controller: Fix openisa checks
Fixes openisa checks which has been renamed

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:14 +01:00
Jamie McCrae
fdc76c48a7 workflow: compliance: Add rename limit
Adds a rename limit to allow CI checks to run

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:14 +01:00
Jamie McCrae
14ecafc67d dts: bindings: vendor-prefixes: Sort entries
Fixes out of order entries

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:14 +01:00
Jamie McCrae
dbc366c3c7 soc: nxp: lpc: Move wrong configurations
Moves wrong configuration items to the correct files

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:14 +01:00
Jamie McCrae
8e02c08f96 maintainers: Fix invalid paths
Fixes invalid paths

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:14 +01:00
Jamie McCrae
b1b85e2495 boards: up: Fix spaces
Fixes compliance issue

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:14 +01:00
Jamie McCrae
58cc4013b3 maintainers: Fix xen path
Fixes a path which was not updated for the xen soc

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Jamie McCrae
66ce5c0b09 boards/soc: Add missing copyright headers
Adds missing copyright headers

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Jamie McCrae
bb47243254 boards: qemu: x86: Remove pointless file
Removes a pointless file

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Sylvio Alves
2e816a8a3a samples: tests: update esp32-based board naming
Make sure all those samples and tests use cpu cluster naming.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
9aeab17139 samples: tests: remove platform_exclude of esp32 boards
Those related tests are automatically filtered out and
the boards can be removed from there.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
a4fe97b9de boards: shields: m5stack_core2_ext: update board name
Update documentation to meet HWMv2 naming convention.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
615fcab94a samples: ipm_esp32: fix board labels and skip testing
This sample code is currently not yet read for HWMv2 and sysbuild.
Skip this test for now and have a fix later.

Make sure sample code uses HWMv2 for board
naming convention.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
7752f69b7f boards: legacy: remove index entry for xtensa/riscv boards.
There are no documents to be build within this
board_legacy folder.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
3eba827956 MAINTAINERS: update Espressif entries
Make sure there is no invalid folder.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
914362bbd5 boards: xtensa: yd_esp32: Convert to v2
Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
a62278fd23 boards: xtensa: xiao_esp32s3: Convert to v2
Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
b6a11ccec4 boards: xtensa: olimex_esp32_evb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
c1067c16d2 boards: xtensa: odroid_go: Convert to v2
Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
b8340b0109 boards: xtensa: m5stickc_plus: Convert to v2
Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
9d81e417be boards: xtensa: m5stack_stamps3: Convert to v2
Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
c296672720 boards: xtensa: m5stack_core2: Convert to v2
Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
fada12aa9d boards: xtensa: m5stack_atoms3_lite: Convert to v2
Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
fe37ebac1e boards: xtensa: m5stack_atoms3: Convert to v2
Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
d32828fe6a boards: xtensa: kincony_kc868_a32: Convert to v2
Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
5afba7855b boards: xtensa: heltec_wireless_stick_lite_v3: Convert to v2
Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
ca48c17723 boards: xtensa: heltec_wifi_lora32_v2: Convert to v2
Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Sylvio Alves
db1fd4d229 boards: xtensa: esp32s3_luatos_core: Convert to v2
Converts the board to hwmv2

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:13 +01:00
Jamie McCrae
a78b2552eb boards: xtensa: esp32s3_devkitm: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Jamie McCrae
cc96061d96 boards: xtensa: esp32s2_saola: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Jamie McCrae
ed854e05d1 boards: xtensa: esp32s2_lolin_mini: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Jamie McCrae
4fa1ae8110 boards: xtensa: esp32s2_franzininho: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Jamie McCrae
5543040a18 boards: xtensa: esp_wrover_kit: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Jamie McCrae
2335ae79b3 boards: xtensa: esp32_ethernet_kit: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Jamie McCrae
f910b7ad4f boards: xtensa: esp32_devkitc_wrover: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Jamie McCrae
32104db555 boards: xtensa: esp32_devkitc_wroom: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Jamie McCrae
e23a41200d boards: riscv: icev_wireless: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Jamie McCrae
3c670e4e53 boards: riscv: xiao_esp32c3: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Jamie McCrae
fc7c6a060b boards: riscv: stamp_c3: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:13 +01:00
Jamie McCrae
22c2edb89c boards: riscv: esp32c3_luatos_core: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Jamie McCrae
0a96dcb778 boards: riscv: esp32c3_devkitm: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Sylvio Alves
be1ee1c446 vendors: update vendors lists
Add esp32-based board vendors.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-03-01 15:50:12 +01:00
Jamie McCrae
5e6c62137f soc: espressif_esp32: Port to HWMv2
Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Torsten Rasmussen
037a3b52a4 boards: Raspberry Pi pico pwm led adjustment
The Raspberry Pi pico defines PWM leds, but on the Raspberry Pi pico
w-variant the gpio to the led is routed to the WiFi/Bluetooth module,
thus the led is not available.

Introduce a HAS_DT_PWM_LED define which allows devicetree overlays for
the rpi_pico board to distinguish between board variants with a pwm
controlled led, and those without.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Torsten Rasmussen
7277cae6fa samples: blinky_pwm: enable pwm_leds in rpi_pico overlay
Twister skips the blinky_pwm sample for the rpi_pico board because the
pwm-leds compatible is disabled.

Enable /pwm_leds node so that twister build the sample for the rpi_pico
board.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Daniel DeGrasse
da3e49d34e boards: nxp: update selection of FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET
Update selection of FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET to now depend on
FLASH_MCUX_FLEXSPI_XIP, as this is the symbol that drives the need to
relocate critical FlexSPI files to RAM.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 15:50:12 +01:00
Daniel DeGrasse
bc8424dd3b soc: nxp: imxrt: move FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET to SOC level
FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET definition is required to relocate SOC
level files, as well as Flash and MEMC drivers. Therefore, move the
Kconfig definition to the SOC level, and update the dependencies to
better reflect when the definition is needed.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 15:50:12 +01:00
Jamie McCrae
041cb52939 soc: brcm: bcm_vk: Rename to bcnvk
Fixes a name mismatch with a family

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Jamie McCrae
576b43a95c soc: Fix SOC_FAMILY name mismatches
Fixes mismatches or missing SOC_FAMILY entries

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Dmitrii Golovanov
e8f3e6494d hwmv2: boards: intel: adsp: Fix runner after paths renamed
Fix intel_adsp runner unable to find boards for flash after
'drop duplicate prefix' folder renames #69505

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:12 +01:00
Jamie McCrae
550399e927 boards: weact: stm32g431_core: Add wrongly deleted file back
Adds a file back that was wrongly deleted in an unrelated
commit

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Jamie McCrae
08708c909e tests: drivers: flash: Renamed missed board rename
Fixes a test which missed the rename of a board

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
David Leach
06dac41e68 hwmv2: Convert Seagate Faze board to hwmv2
Convert Faze board

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:12 +01:00
David Leach
dd8f842b40 hwmv2: nxp: update MAINTAINER paths for hwmv2
Update for hwmv2

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:12 +01:00
Emilio Benavente
b4d1c04978 hwmv2: lpc: updated overlay and conf files in samples and tests
Fixup for LPC54114 and LPC55S69

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:12 +01:00
David Leach
067c69089e boards: nxp: convert lpcxpresso55s69 to hwmv2
Convert lpcxpresso55s69

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:12 +01:00
David Leach
097205b40a hwmv2: Global fix of lpc54114_m4 overlay and conf files
Global fixup of overlay and conf files

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:12 +01:00
David Leach
d8cfa6fb29 boards: nxp: convert lpcxpresso54114 to hwmv2
Convert lpcxpresso54114

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:12 +01:00
David Leach
c29ed228c6 boards: nxp: convert lpcxpresso55s36 to hwmv2
Convert lpcxpresso55s36

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:12 +01:00
David Leach
88cfd3d6ac boards: nxp: convert lpcxpresso55s28 to hwmv2
Convert lpcxpresso55s28

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:12 +01:00
David Leach
ad30c940ee boards: nxp: convert lpcxpresso55s16 to hwmv2
Convert lpcxpresso55s16

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:12 +01:00
David Leach
9e5a10ec80 boards: nxp: convert lpcxpresso55s06 to hwmv2
Convert lpcxpresso55s06

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:12 +01:00
David Leach
5650c83268 boards: nxp: convert lpcxpresso51u68 to hwmv2
Convert lpcxpresso51u68

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:12 +01:00
David Leach
82cf44be45 boards: nxp: convert lpcxpresso11u68 to hwmv2
Convert lpcxpresso11u68

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:12 +01:00
David Leach
1a9c405a6f soc: nxp: convert LPC SOC family to hardware model V2
Move LPC family to HWMv2

Signed-off-by: David Leach <david.leach@nxp.com>

soc: nxp: convert LPC SOC family to hardware model V2

Move LPC family to HWMv2

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:12 +01:00
Dmitrii Golovanov
f2b536d253 boards: intel: doc: hwmv2: Fix some renamed paths
Fix some paths affected by 'drop duplicate prefix' at folder
names in boards change.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:12 +01:00
Jamie McCrae
5ee6058710 samples/tests: Use board revisions
Updates boards so that the correct revision/revisions is/are tested

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Jamie McCrae
b76687602f boards: Add yaml files for boards missing revisions
Adds dedicated yaml files for board that have revisions

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Jamie McCrae
32ae4918d0 boards: nordic: Fix board names
Fixes some board names in documentation that wasn't updated

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Jamie McCrae
cc1dabca65 MAINTAINERS: Update for renamed folders
Updates for folders renamed to have their vendor prefix names

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Jamie McCrae
a37ddce659 soc: xilinx: Rename to xlnx
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Jamie McCrae
a1393a07f6 soc: xenvm: Rename to xen
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Jamie McCrae
813ed00f67 soc: raspberry_pi: Rename to raspberrypi
Aligns with the vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:12 +01:00
Jamie McCrae
71317d6798 soc: cadence: Rename to cdns
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
8cb0c51ec6 soc: broadcom: Rename to brcm
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
2b9db15c69 soc: andes: Rename to andestech
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
0101216ce1 soc: altera: Rename to altr
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
4b4c3ca65d boards: wurth_elektronik: Rename to we
Aligns with the vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
cdc3ef499f boards: ublox: Rename to u-blox
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
cabdd4ad05 boards: space_cubics: Rename to sc
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
4b5bd7ae8a boards: seeed_studio: Rename to seeed
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
a992785ceb boards: raspberry_pi: Rename to raspberrypi
Aligns with the vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
3c1cdc20fe boards: laird_connect: Rename to lairdconnect
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
291c7cde2b boards: cadence: Rename to cdns
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
95db897526 boards: broadcom: Rename to brcm
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
0a47b94879 boards: beagleboard: Change to beagle
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
9f9f221c24 boards: andes: Rename to andestech
Aligns with vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
e7869ca38a boards: altera: Rename to altr
Aligns with the vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
bf2fb5eca3 various: Change SOC_FAMILY_NRF to SOC_FAMILY_NORDIC_NRF
Fixes the name to include the vendor in it

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
e25730ba56 modules: tf-m: Rename from nordic_nrf to nordic
Aligns with the vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
9e3466606a boards: nordic_nrf: Rename to nordic
Aligns with the vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
09a398dcc8 soc: nordic_nrf: Rename to nordic
Renames to align with the vendor prefix

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
cb8ffc74f8 boards: renode: Add documentation index
Adds a documentation index file

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
2291ff4b55 boards: arm: riscv32_virtual: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
484b7f1996 soc: riscv_renode_virtual: Port to HWMv2
Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
cc5c2fb0c7 soc: raspberry_pi: Fix SOC_SERIES and SOC mismatch
Fixes mismatch between values and names

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
59cb580513 soc: arm: designstart: Fix SOC_SERIES and SOC mismatch
Fixes mismatch between values and names

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:11 +01:00
Jamie McCrae
aa9e0de7af samples: Fix invalid links
Fixes links that are invalid

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
a1480cf1cf maintainers: Fix paths
Updates paths from hwmv2 changes

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
0d719e004b boards: Update documentation links
Updates documentation links for shortened paths

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
eb5c3e6f79 boards: wurth_elektronik: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
a34a3640b7 boards: waveshare: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
cf50e950e7 boards: weact: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
737cfb548f boards: sparkfun: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
505494c97a boards: segger: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
4eaf69f37a boards: ruuvi: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
a1335caeae boards: ronoth: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
a9f7f30bf6 boards: raytac: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
80db4c81b3 boards: qemu: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
433d7e9976 boards: particle: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
4ea79d19e7 boards: olimex: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
fd4ae6f6a8 boards: mikroe: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
36080549bd boards: khados: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
169bf8ae1d boards: intel: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
25f04d5222 boards: holyiot: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
11c2af0de8 boards: google: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
d5128f4016 boards: ebyte: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
44fbc68cad boards: dragino: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
f7fe431b44 boards: contextual_electronics: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
9094fea63b boards: circuit_dojo: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
b632acc1fc boards: blue_clover: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
1a3316ebdc boards: bbc: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
71c0344f8c boards: arduino: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
f0176fc25f boards: altera: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
36b920ed0f boards: adi: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:10 +01:00
Jamie McCrae
22520368d9 boards: adafruit: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:09 +01:00
Jamie McCrae
296acfb2bc boards: actinius: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:09 +01:00
Jamie McCrae
55063380b7 boards: 96boards: Drop duplicate prefix
Drops the prefix since the parent folder has it already

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:09 +01:00
Daniel DeGrasse
1f93394b55 boards: nxp: convert mimxrt595_evk to hardware model v2
Convert mimxrt595_evk to hardware model v2. Both the CM33 and Fusion F1
DSP devicetrees are moved to reside in the same board folder

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 15:50:09 +01:00
Daniel DeGrasse
e7a4fd2ec1 soc: nxp: rt5xx: convert RT5xx SOC to HWMv2
Convert NXP iMX RT5xx SOC to hardware model V2. This core is dual
architecture, so both the ARM Cortex M33 and Xtensa Fusion F1 DSP have
been unified within one SOC port folder.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 15:50:09 +01:00
Anas Nashif
01942f1d11 twister: normalize platform name when storing files/data
Convert slashes into underscores to allow saving of data related to
platforms on disk.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-03-01 15:50:09 +01:00
Anas Nashif
477c8b84dd twister: tests: test with slashes in platform names
Use mps2/an385 for testing the hwmv2 board names.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-03-01 15:50:09 +01:00
Jamie McCrae
64e3e816c4 soc: Add include guards
Adds include guards to prevent contamination of bleeding
Kconfigs from irrelevent devices

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:09 +01:00
Fabio Baltieri
3a7aa2fa49 gitignore: update the compliance file list
Update the list of gitignore file with the current list of compliance
checks.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:50:09 +01:00
Fabio Baltieri
84e1c17ad9 scripts: ci: check_compliance: add a check for board yml file
Add a check for board.yml file, just check for valid vendor prefixes for
now.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:50:09 +01:00
Fabio Baltieri
a90f53ad57 boards: sync up the vendor tags and vendor-list
Add various board vendor prefixes to vendor-prefixes.txt and fix up all
board.yml file to only use the prefixes from that file.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:50:09 +01:00
Fabio Baltieri
af9aa65299 dts: vendor-prefixes: add keep-sorted markers
Add the keep sorted marker to the list so it's kept sorter by the
compliance check.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:50:09 +01:00
Fabio Baltieri
50f0bf05a3 dts: vendor-prefixes: sort the vendor list
Sort the list alphabetically.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:50:09 +01:00
Fabio Baltieri
a10b614aa4 dts: vendor-prefixes: ensure all prefixes are lowercase
There's only three outliers, make sure all prefixes are lowercasel.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:50:09 +01:00
Iuliana Prodan
5abe735e93 manifest: update SOF sha for NXP HWMv2
Update SOF for NXP's new boards name and configs.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2024-03-01 15:50:09 +01:00
Iuliana Prodan
9ab8f64ca9 modules: rename SOC_FAMILY_IMX
Rename SOC_FAMILY_IMX to SOC_FAMILY_NXP_IMX.

I've also kept SOC_FAMILY_IMX since there are
still legacy socs/boards that use it. When all
are ported to HWMv2 this should be removed.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2024-03-01 15:50:09 +01:00
Iuliana Prodan
483ff8dd4d modules: mcux: remove SOC_FAMILY_NXP_ADSP
Remove SOC_FAMILY_NXP_ADSP since this is not used
anymore for the ADSP.
With HWMv2 ADSP is part of SOC_FAMILY_IMX.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2024-03-01 15:50:09 +01:00
Iuliana Prodan
f113dd5342 samples: update board name
Update board name and rename files for
openamp_rsc_table sample.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2024-03-01 15:50:09 +01:00
Iuliana Prodan
39b31287d9 boards: nxp: Convert i.MX ADSP boards to hardware model v2
Convert i.MX ADSP boards to HMV2 including:
- imx8mp_evk
- imx8qxp_mek
- imx8qm_mek
- imx8ulp_evk

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2024-03-01 15:50:09 +01:00
Iuliana Prodan
1511e356a2 soc: nxp: Port i.MX ADSP family to hardware model v2
Port i.MX ADSP family to HWMv2, including series:
- imx8
- imx8m
- imx8x
- imx8ulp

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2024-03-01 15:50:09 +01:00
Fabio Baltieri
c91e25ab47 soc: mec: rename all mec1501x reference to mec15xx
Fix a bunch of references to "mec1501x" to be named "mec15xx" instead,
which is better representative of what is supported and also matches the
soc series name and value.

Fix the clock div option name as well while at it since it apparently
applies to the whole family.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:50:09 +01:00
Declan Snyder
1c231fd939 hwmv2: boards: Convert IMXRT boards
Convert IMXRT boards except RT595

Co-authored-by: Declan Snyder <declan.snyder@nxp.com>
Co-authored-by: Daniel DeGrasse <daniel.degrasse@nxp.com>

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-01 15:50:09 +01:00
Declan Snyder
417cff1e60 hwmv2: soc: Port IMXRT family to HWMV2
Port IMXRT family to HWMV2, including series:
- RT11XX
- RT10XX
- RT6XX

Not including RT5XX

Co-authored-by: Declan Snyder <declan.snyder@nxp.com>
Co-authored-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Co-authored-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Co-authored-by: David Leach <david.leach@nxp.com>
Co-authored-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Co-authored-by: Emilio Benavente <emilio.benavente@nxp.com>

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-01 15:50:09 +01:00
Jiafei Pan
28d4e41b1b hwmv2: clean up arm64 soc and board empty directory
There is no legacy ARM64 SoC and Board available, so delete
the arm64 directory.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-03-01 15:50:09 +01:00
Jiafei Pan
2b520f83cb hwmv2: port NXP SoC LS1046A to V2
Port NXP SoC LS1046A to hardware model v2.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-03-01 15:50:09 +01:00
Jiafei Pan
bf7899c645 hwmv2: port nxp_ls1046ardb board to V2
Port NXP ls1046ardb board to hardware model v2.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-03-01 15:50:08 +01:00
Jamie McCrae
33f7b61866 samples/tests: Rename numaker boards
Renames boards due to hwmv2 changes

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
8f20ea6e93 boards: nuvoton: numaker_pfm: Split into 2 boards
Splits up a wrongly unified board into 2 boards

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jiafei Pan
7cf4ff43a1 drivers: pinctrl: imx: align with hwm v2
Changed SoC configuration item name.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-03-01 15:50:08 +01:00
Jiafei Pan
c68e1fea4e drivers: clock_control: ccm_rev2: align with hwm v2 update
Modified SoC configuration item name.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-03-01 15:50:08 +01:00
Jiafei Pan
3b49014a0f hwmv2: move imx8mn EVK board to V2
Port EVK board for NXP imx8mn to hwm V2.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-03-01 15:50:08 +01:00
Jiafei Pan
14f344eeab hwmv2: move imx8mp EVK board to V2
Port EVK board for NXP imx8mp to hwm V2.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-03-01 15:50:08 +01:00
Jiafei Pan
40f3f8f22d hwmv2: move imx8mm EVK board to V2
Port EVK board for NXP imx8mm to hwm V2.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-03-01 15:50:08 +01:00
Jiafei Pan
10bf79ea51 hwmv2: move imx8m soc for a-core to V2
Port NXP imx8m serial SoC to hwm V2, it includes imx8mm, imx8mn and
imx8mp.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-03-01 15:50:08 +01:00
Jiafei Pan
8727d5ca80 hwmv2: move imx93 EVK board to V2
Port EVK board for NXP imx93 to hwm V2.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-03-01 15:50:08 +01:00
Jiafei Pan
c81ef01563 hwmv2: move imx93 soc to V2
Port NXP imx93 SoC to hwm V2.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-03-01 15:50:08 +01:00
Daniel DeGrasse
5836c1b699 modules: mcux: introduce CONFIG_MCUX_CORE_SUFFIX
MCUX SDK depends on "core suffixes" in order to identify which core a
build is targeting on a multicore part. Previously, this information was
parsed from the CONFIG_SOC string, but with hardware model v2 this is no
longer possible. Introduce the Kconfig MCUX_CORE_SUFFIX, which multicore
SOCs can set to inform MCUX which core the build is targeting.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 15:50:08 +01:00
Torsten Rasmussen
338f6f2bf1 doc: update board porting guide to match new hardware model
Update board porting guide to the design changes in the new hw model.

New section added:
- board.yml file description

Updated sections:
- Board on SoCs example table updated to new format and extra examples
  added.
- Board directory description and its files
- Writing devicetree file section updated to match new lookup patterns
- Writing Kconfig file section updated to match new lookup patterns
- Board revision handling updated

In getting started guide a note has been added with short description
of the new board and board identifier scheme.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jérôme Pouiller
9639a1b5dc soc: silabs: drop useless defconfigs
Currently, some soc subdirectories contains Kconfig.defconfig.<soc-name>
and Kconfig.defconfig. However:
  - Kconfig.defconfig.<soc-name> is included unconditionally by
    Kconfig.defconfig
  - each subdirectory only contains one SoC

So, it does not make sense to keep these two files.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2024-03-01 15:50:08 +01:00
Jérôme Pouiller
981807444e soc: silabs: introduce SOC_GECKO_SDID
Silabs hardware layer uses Silicon Die ID (SDID) for conditional
code. This patch defines SDID directly from Kconfig so Silabs HAL does
not have define it.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2024-03-01 15:50:08 +01:00
Jérôme Pouiller
5d07e82485 soc: silabs: SOC_FAMILY_* replace SOC_GECKO_SERIES*
SOC_GECKO_SERIES* is now redundant with SOC_FAMILY_*.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2024-03-01 15:50:08 +01:00
Jérôme Pouiller
2fd081ac86 soc: silabs: align comments with soc tree
Cosmetics changes to reflect the tree organisation.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2024-03-01 15:50:08 +01:00
Jérôme Pouiller
66d425f571 soc: silabs: split in families
EXX32 does not really makes sense. Silabs tends to talk about "series
0", "series 1" and "series 2".

Note all Silabs chipsets (whatever their family) tend to share
components. So this PR introduces SOC_VENDOR_SILABS to match these
common parts.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2024-03-01 15:50:08 +01:00
Jamie McCrae
5bd38f47a9 arch: arch: kconfig: Fix wrong placement of endmenu
Fixes a bug whereby endmenu was placed before the end of the file
causes what should be ARC-only Kconfig choices to bleed into
every other architecture

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
00c6ef25be tests/samples: Rename overlay files for renamed boards
These overlay files were not being used after board name changes
in hwmv2, rename them to have them used

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
0c639b8378 boards: Fix bools and selections
Fixes issues with some outstanding bools being defined and wrong
usage of soc selection

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
c2ef907d1d drivers: flash: it8xxx2: Add missing Kconfigs
The original hwmv1 Kconfigs for this flash driver were in the
complete wrong place and should not have been merged, which then
caused confusion when porting to hwmv2, this adds in the missing
Kconfigs to where they should have been in the first place

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
553de2ebc9 soc: ite: ec: it8xxx2: Fix SOC_SERIES being in wrong file
Fixes this line being in the wrong file

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
b8ec0080c2 boards: Documentation link fixes
Fixes missing or broken documentation links

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
eb7025e50f tests: Update board names for hwmv2
Updates names used in tests for hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
10ef3d4bd2 boards: silab: Add documentation index file
Adds a file with the vendor name for documentation indexing

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
ba9fdaa1d6 boards: arm: efr32_radio: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
86c8d4a0ca boards: arm: efm32pg_stk3402a: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
575ac5cafb manifest: Update hal_silabs
Updates the repo to include hwmv2 changes

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
87b2907304 boards: arm: efr32_thunderboard: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
14b30055ab boards: arm: efr32mg_sltb004a: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
0012bfc15d boards: arm: efr32xg24_dk2601b: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
f526225ead boards: arm: efm32wg_stk3800: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
19e7df29df boards: arm: efm32pg_stk3401a: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:08 +01:00
Jamie McCrae
0bd7d963d6 boards: arm: efm32hg_slstk3400a: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
795a90f9bf boards: arm: efm32gg_stk3701a: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
43d5540be7 boards: arm: efm32gg_slwstk6121a: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
065148d856 boards: arm: efm32gg_sltb009a: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
1dc9a8aa17 soc: silabs_exx32: Port to HWMv2
Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
763571e878 tests: Expand names
Expands names to include identifiers

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
dae301b8a3 boards: xen: xenvm: Expand name
Expands name to include identifier

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
19e60eef36 boards: qemu: qemu_cortex_a53: Expand names
Expands names to include the SoC

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
a0a7c30f28 soc: intel: intel_adsp: Fix issues
Fixes issues with missing protection guards and selections in
wrong files, and one case of missing bools on 2 fields

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Torsten Rasmussen
df9a4223fe scripts: ci: introduce soc name check in check_compliance
soc.yml files define SoC names which are used in board.yml.
All SoC names and directories are exported to the build system and
can be referenced using the SoC name as identifier.

Kconfig defines a CONFIG_SOC setting with the same name which can be
used in build system and is selected by the board.

Thus the CONFIG_SOC value can be used to lookup the details of the SoC.

This commit introduces a new compliance check which ensures the SoC name
and the CONFIG_SOC name value are in sync.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Torsten Rasmussen
ed401abaff soc: emsdsp: align SoC name defined in soc.yml to Kconfig SOC setting
This commit aligns the SoC name for emsdp_em4 SoC defined in Kconfig.soc
to to name in soc.yml

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Filip Kokosinski
fc78e5eaa4 MAINTAINERS: update RISC-V arch area paths
This commit updates the paths assigned to the RISC-V area of maintenance to
include targets based on the SiFive Freedom SoC family.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-03-01 15:50:07 +01:00
Filip Kokosinski
4e586958ff boards: convert QEMU RISC-V 64 bit board to Zephyr HWMv2
This commit converts the QEMU RISCV-V 64 bit board to Zephyr HWMvW. This
includes the following former targets:
* qemu_riscv64
* qemu_riscv64_smp

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-03-01 15:50:07 +01:00
Filip Kokosinski
f4c31a2b86 boards: convert QEMU RV32E board to Zephyr HWMv2
This commit converts the QEMU RV32E board to Zephyr HWMvW. This includes
the following former target: qemu_riscv32e.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-03-01 15:50:07 +01:00
Filip Kokosinski
5b2ffc652b boards: convert QEMU RISC-V 32 bit board to Zephyr HWMv2
This commit converts the QEMU RISCV-V 32 bit board to Zephyr HWMvW. This
includes the following former targets:
* qemu_riscv32
* qemu_riscv32_smp
* qemu_riscv32_xip

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-03-01 15:50:07 +01:00
Filip Kokosinski
5db061a4c6 soc/riscv: convert the QEMU virt RISCV-32 SoC to HWMv2
This commit converts the virt SoC (generic virt machine) to the Zephyr
HWMv2.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-03-01 15:50:07 +01:00
Filip Kokosinski
6547845e9d boards: convert SparkFun RED-V Things Plus to Zephyr HWMv2
This commit converts the SparkFun RED-V Things Plus board
(`sparkfun_red_v_things_plus` target) to the Zephyr Hardware Model v2.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-03-01 15:50:07 +01:00
Filip Kokosinski
95a1f96399 boards: convert SiFive HiFive Unmatched to Zephyr HWMv2
This commit converts the SiFive HiFive Unmatched board (`hifive_unmatched`
target) to the Zephyr Hardware Model v2.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-03-01 15:50:07 +01:00
Filip Kokosinski
e563eb0a62 soc/sifive/sifive_freedom: add SiFive Freedom FU740 SoC
This commit adds support for the SiFive Freedom U740 SoC for the Zephyr
Hardware Model v2.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-03-01 15:50:07 +01:00
Filip Kokosinski
8914bc58b6 boards: convert SiFive HiFive Unleashed to Zephyr HWMv2
This commit converts the SiFive HiFive Unleashed board (`hifive_unleashed`
target) to the Zephyr Hardware Model v2.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-03-01 15:50:07 +01:00
Filip Kokosinski
7e8de1e781 soc/sifive/sifive_freedom: add SiFive Freedom U540 SoC
This commit adds support for the SiFive Freedom U540 SoC for the Zephyr
Hardware Model v2.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-03-01 15:50:07 +01:00
Filip Kokosinski
bfcc2ed18f boards: convert SiFive HiFive1 Rev. B to Zephyr HWMv2
This commit converts the SiFive HiFive1 Rev. B board (`hifive1_revb`
target) to the Zephyr Hardware Model v2.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-03-01 15:50:07 +01:00
Filip Kokosinski
330fc38f9f boards: convert SiFive HiFive1 to Zephyr HWMv2
This commit converts the SiFive HiFive1 board (`hifive1` target) to the
Zephyr Hardware Model v2.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-03-01 15:50:07 +01:00
Filip Kokosinski
b9e06f4c38 soc/sifive/sifive_freedom: add SiFive Freedom E310 SoC
This commit adds support for the SiFive Freedom E310 SoC for the Zephyr
Hardware Model v2.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-03-01 15:50:07 +01:00
Jamie McCrae
4b90b30b9d scripts: west_commands: completion: Add hwmv2 complete to fish
Adds hwmv2 board completetion support to fish

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
0f6842e2fa scripts: west_commands: completion: Add hwmv2 complete to zsh
Adds hwmv2 board completetion support to zsh

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
b2af1e1737 scripts: west: list_boards: Fix hwmv2 output
Fixes the output of list_boards to be in csv format rather than
python array format

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
686a4b78b8 scripts: west_commands: completion: Add hwmv2 complete to bash
Adds hwmv2 board completetion support to bash

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Torsten Rasmussen
396b6bb856 soc: nxp: fix typo in SoC name
Follow-up: #68778

There is a typo in nxp/kinetics/soc.yml.
The SoC `mk82f215` was added, however the correct SoC is `mk80f25615`,
which this commit corrects.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Torsten Rasmussen
765299c627 soc: broadcom: align SoC names defined in soc.yml to Kconfig SOC setting
This commit aligns the SoC names for bcm58402 SoCs defined in soc.yml
to Kconfig SOC setting.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Torsten Rasmussen
7efd46eb41 soc: arm: align SoC names defined in soc.yml to Kconfig SOC setting
This commit aligns the SoC names for arm an547 SoCs defined in soc.yml
to Kconfig SOC setting.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Torsten Rasmussen
505cbc5c42 soc: mec: align SoC names defined in soc.yml to Kconfig SOC setting
This commit aligns the SoC names for mec SoCs defined in soc.yml to
Kconfig SOC setting.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Torsten Rasmussen
951a140701 soc: ti: define SOC name in Kconfig
Add Kconfig SoC name am6234 which matches the SoC name in soc.yml.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Grzegorz Swiderski
a795d28810 snippets: Initial HWMv2 support
Very simple adaptation to directly replace the use of HWMv1 board names
with the new identifiers:

   boards:
     <name>/<identifier>:
       append: ...

All snippets in-tree are aligned with this format where needed.

Since the `boards` key supports regex, appends can also be applied to
multiple targets grouped by board name, SoC, CPU cluster, or variant.
Later, this can be followed up with native support for these items in
the snippet schema.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
f9a957e6f6 boards: nordic: nrf9160dk: Fix missing nrf52840 config
Fixes an issue with missing configuration from the nrf52840 on
the nrf9160dk

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
df994e7ee8 soc: xilinx: zync7000: Remove xilinx from soc series name
Removes the vendor name from a Kconfig symbol

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
8dfabd56ca soc: cypress: Add protection guard to file
Adds a protection guard to prevent Kconfigs leaking

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
447b951593 tests: kernel: tickless: Remove old board name
Removes a duplicated old board name

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Jamie McCrae
bad5dfa71f boards: nordic: nrf5340dk: Fix board names
Updates to new board names

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:07 +01:00
Gerson Fernando Budke
ad2e863f39 soc: atmel: Use new family prefix
The newer HWMv2 impose a different semantic in the family names. This
update from SOC_FAMILY_SAMx to SOC_FAMILY_ATMEL_SAMx to comply with.

Fixes #69046

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:06 +01:00
Dmitrii Golovanov
3f08e714b2 soc: intel_adsp: hwmv2: Align SOC_SERIES_INTEL_ACE name and value
Align `ace` to 'intel_adsp_ace` SoC Series name and value to match
the new HWMv2 compliance check, also renaming:

  SOC_SERIES_INTEL_ACE --> SOC_SERIES_INTEL_ADSP_ACE

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:06 +01:00
Dmitrii Golovanov
6734597a76 soc: intel_adsp_cavs: hwmv2: Align SOC_SERIES name and value
Align 'intel_adsp_cavs` SoC Series name and value to match
new HWMv2 compliance check.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:06 +01:00
Torsten Rasmussen
2908af0bcc boards: nrf51dk/dongle: change SoC to nRF51822
The physical nRF51dk / nRF51dongle hardware contains a nRF51422 SoC.
In Zephyr, only the nRF51822 SoC, is implemented.

In Zephyr, the nRF51422 SoC is build as a nRF51822, therefore use the
nRF51822 SoC model for those kits instead on the non-existing nRF51422.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Torsten Rasmussen
d1ceb29fca soc: align CONFIG_SOC values to match soc.yml names
This commit aligns CONFIG_SOC values for Nordic nRF SoCs to the names
defined in soc.yml.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Manuel Argüelles
4768ccaf70 tests: drivers: gpio: gpio_api_1pin: exclude hifive1
Test seems to be failing consistently on `hifive1` board.
See #69350

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-03-01 15:50:06 +01:00
Manuel Argüelles
ebdb0879ad boards: nxp: s32z2xxdc2: convert to hwmv2
Convert `s32z270dc2` boards to hardware model v2. The board has been
renamed to `s32z2xxdc2` to be able to support in the future other
SoCs from this series that can also work on this board.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-03-01 15:50:06 +01:00
Manuel Argüelles
ae82580d08 boards: nxp: mr_canhubk3: convert to hwmv2
Convert mr_canhubk3 board to hardware model v2.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-03-01 15:50:06 +01:00
Manuel Argüelles
c5f0defbae boards: nxp: ucans32k1sic: convert to hwmv2
Convert ucans32k1sic board to hardware model v2.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-03-01 15:50:06 +01:00
Manuel Argüelles
1e46cabce6 soc: nxp: convert NXP S32 family to hwmv2
Convert NXP S32 family to hardware model v2.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-03-01 15:50:06 +01:00
Erwan Gouriou
f2f85133f2 soc: stm32: Rename series path
Since symbol is used by CMake to locate matching series folder, rename
folders.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:50:06 +01:00
Erwan Gouriou
86642f4e78 soc: stm32: Rename Kconfig SOC_SERIES symbols
SOC symbol is expected to match SOC_SERIES_FOO symbol.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:50:06 +01:00
Erwan Gouriou
c61e807896 soc: stm32: Cleanup Kconfig.defconfig files
SOC related symbols are defined in Kconfig.soc

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:50:06 +01:00
Jamie McCrae
ca46c8abc9 tests: Fix board names
Fixes some invalid board names

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
fbfed5f48f maintainers: Update synopsys entries
Updates entries to account for hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
8cd8b1cc47 boards: synopsys: Add documentation index
Adds a documentation index file

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
6f6cc57a04 boards: arc: hsdk4xd: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
c4c14a54ca soc: snps_arc_hsdk4xd: Port to HWMv2
Ports the snps_arc_hsdk4xd SoC configuration to hardware model
version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
06c2054e5c boards: arc: iotdk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
ff0e0fce1b soc: snps_arc_iot: Port to HWMv2
Ports the snps_arc_iot SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
334264c46a boards: arc: emsdp: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
8b947a0e91 soc: snps_emsdp: Port to HWMv2
Ports the snps_emsdp SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
990417bbde tests: Update board names for hwmv2
Updates tests that use board names which have changed with boards v2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
e12719154a boards: arc: em_starterkit: Convert to v2
Converts the board to hwmv2, documentation for this board needs to
be vastly updated

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
437a430fbe soc: snps_emsk: Port to HWMv2
Ports the snps_emsk SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
f93387f968 boards: arc: hsdk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
1cf2498b13 soc: snps_arc_hsdk: Port to HWMv2
Ports the snps_arc_hsdk SoC configuration to hardware model
version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
47abe81256 boards: arc: nsim: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
1e33786dc4 soc: snps_nsim: Port to HWMv2
Ports the snps_nsim SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
7f081914db boards: arc: qemu_arc: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
bc97349dbd soc: snps_qemu: Port to HWMv2
Ports the snps_qemu SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:06 +01:00
Jamie McCrae
a9902ff58e boards: Use zephyr_file for file links
Replaces normal text with :zephyr_file: blocks

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
126e1a4e72 boards: Fix invalid documentation links
Fixes issues with links in documentation

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Erwan Gouriou
899f0257c3 boards: stm32wb: Restore missing .defconfig files
Kconfig.defconfig files has been lost during migration.
Put them back.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:50:05 +01:00
Anas Nashif
790c10b1ee soc: x86/atom: imply mmu, do not select it
Board should be able to deselect mmu, so imply instead of strict
selection.

userspace is selected for atom already on the CPU level, so do not
reselect.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-03-01 15:50:05 +01:00
Anas Nashif
faee62088d boards: x86: remove qemu_x86_tiny_768
Having a board to just measure coverage for certain features is a bit of
any overkill. We will instead add overlays to the specific tests this
board mostly covers.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-03-01 15:50:05 +01:00
Anas Nashif
c34d186a57 x86: atom: remove soc.h with unused content
None of the code in soc.h is being used anywhere, so remove it and
remove include from various places.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-03-01 15:50:05 +01:00
Anas Nashif
1be3a9e9d3 x86: remove legacy ia32, use atom instead
ia32 is legacy and is just an atom, so deduplicate and use generic
atom soc instead.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-03-01 15:50:05 +01:00
Anas Nashif
60e6b400f9 boards: qemu: move qemu_x86 -> x86
Just follow others and drop qemu_ from the name, we have that in the
folder already.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-03-01 15:50:05 +01:00
Jamie McCrae
c4fbac27e8 boards: infineon: Add documentation index
Adds documentation index file

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
b4dd29a9c4 maintainers: Update paths for hwmv2
Updates paths which have changed in hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
380f5fdb2b boards: cypress: Add documentation index
Adds documentation index file

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
9de981be05 boards: arm: xmc47_relax_kit: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
6394e8a348 boards: arm: xmc45_relax_kit: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
04dbf17e19 soc: xmc_4xxx: Port to HWMv2
Ports the xmc_4xxx SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
c9731f1bce boards: arm: cy8cproto_063_ble: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
53d41869d1 boards: arm: cy8cproto_062_4343w: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
46c4f01427 boards: arm: cy8ckit_062s4: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
d285e19cf2 boards: arm: cy8ckit_062_wifi_bt: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
2bebd7298c boards: arm: cy8ckit_062_ble: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
af243274c2 soc: psoc6 and psoc_6: Port to HWMv2
Ports the psoc6 and psoc_6 SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Grzegorz Swiderski
105a2bae84 cmake: modules: boards: Fix board deprecation for HWMv2
Deprecating boards comes with similar challenges as with board aliases,
since BOARD_DEPRECATED is also set after parsing BOARD as user input.

With this patch, a deprecated board can be properly translated to a
board with identifiers. This opens up the possibility of recording all
legacy board names in `boards/deprecated.cmake`, such as:

   set(mps2_an521_remote_DEPRECATED mps2/an521/cpu1)

Unlike with aliases, though, there are additional restrictions for
building with BOARD=<deprecated>, which only makes this feature suitable
for deprecating v1 boards:

 * BOARD=<deprecated>/<identifier> is never allowed.
 * BOARD=<deprecated>@<revision> is not allowed if the old board already
   corresponds to a new board revision:

   set(<deprecated>_DEPRECATED <new-board>@<new-revision>)

Future enhancements will be needed for deprecating v2 boards.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Grzegorz Swiderski
dca54e000a cmake: modules: boards: Enhance board aliases for HWMv2
To address concerns about lengthy board identifiers in HWMv2, the
proposal is to apply the existing BOARD_ALIAS feature, like so:

   set(<alias>_BOARD_ALIAS <board>/<soc>)

It should then be possible to build with either:

   -DBOARD=<alias>            # expands to <board>/<soc>
   -DBOARD=<alias>/<variant>  # expands to <board>/<soc>/<variant>

However, this wouldn't work out of the box. A board alias can only be
expanded to a board name, without revision or identifier, because the
alias substitution happens after having parsed BOARD as user input -
namely, into BOARD (name), BOARD_REVISION, and BOARD_IDENTIFIER.

Furthermore, this means that in the legacy model, it was possible to
build with `-DBOARD=<alias>@<revision>`, and it would resolve to the
actual board name + revision.

To support both the old and new use cases, we can parse the alias just
like BOARD itself, then concatenate their identifiers as shown above.
Adding a revision works as before, but now it is also possible for the
alias to set its own revision. In this example:

   set(<alias>_BOARD_ALIAS <board>@<rev-A>/<soc>/<variant>)

`<rev-A>` is treated as the default revision, and it can be overridden:

   -DBOARD=<alias>          # expands to <board>@<rev-A>/<soc>/<variant>
   -DBOARD=<alias>@<rev-B>  # expands to <board>@<rev-B>/<soc>/<variant>

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Grzegorz Swiderski
fc314e8e3f cmake: modules: boards: Fix BOARD_ALIAS
`--format` is not a valid argument to `list_boards.py`.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
9a7c2ce6d5 soc: gaisler: Move Kconfig file
Moves a Kconfig file from hwmv1 to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Jamie McCrae
1ac56d0501 soc: soc_legacy: mips: Remove out file
Removes a file that is no longer used

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:05 +01:00
Fabio Baltieri
c054381a7a boards: adjust few boards/ paths
Adjust few paths in the board document and maintainer file to reflect
the new file location.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:50:05 +01:00
Fabio Baltieri
4d93b8d9fd boards: convert all microchip MEC boards to hwmv2
Convert mec1501modular_assy6885, mec15xxevb_assy6853,
mec172xevb_assy6906 and mec172xmodular_assy6930 to hwmv2.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:50:05 +01:00
Fabio Baltieri
ab2fcb1245 soc: convert microchip_mec to hwmv2
Convert the Microchip MEC soc/ to hardware model v2.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:50:05 +01:00
Dmitrii Golovanov
ead4b57a7b soc: arm64: intel_socfpga: hwmv2: Rename SoCs
Rename SoC for better HWMv2 use:
  `intel_socfpga_agilex`  --> `agilex`
  `intel_socfpga_agilex5` --> `agilex5`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:05 +01:00
Dmitrii Golovanov
d4c143d306 MAINTAINERS: intel_socfpga: Adjust to HWMv2 move
Adjust intel/intel_socfpga to HWMv2 move.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:05 +01:00
Dmitrii Golovanov
70a66ac03a boards: arm64: intel_socfpga: Move boards to subdirectories
Adjust boards directory structure to SoC structure:

 `boards/intel/intel_socfpga_agilex_socdk` ->
     `boards/intel/intel_socfpga/agilex_socdk`
 `boards/intel/intel_socfpga_agilex5_socdk` ->
     `boards/intel/intel_socfpga/agilex5_socdk`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:05 +01:00
Dmitrii Golovanov
8a85c07799 boards: arm64: intel_socfpga_agilex5_socdk: move to HWMv2
Move and convert to HWMv2 `intel_socfpga_agilex5_socdk`
board configuration.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:05 +01:00
Dmitrii Golovanov
8c253a99fc boards: arm64: intel_socfpga_agilex_socdk: move to HWMv2
Move and convert to HWMv2 `intel_socfpga_agilex_socdk`
board configuration.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:05 +01:00
Dmitrii Golovanov
ab883b8019 soc: arm64: intel_socfpga: Move and convert to HWMv2
Move and convert soc/arm64/intel_socfpga SoC family
`intel_socfpga` configuration to HWMv2 with its SoC
series: `agilex` and `agilex5` and related SoCs:
`intel_socfpga_agilex` and `intel_socfpga_agilex5`.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:04 +01:00
Dmitrii Golovanov
7c8b7a153b soc: arm: intel_socfpga_std: Rename with HWMv2
Rename SoC for better HWMv2 use:
 `intel_socfpga_std_cyclonev` --> `cyclonev`

The resulting shortened board name:
 `cyclonev_socdk/intel_socfpga_std_cyclonev` -->
 `cyclonev_socdk/cyclonev`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:04 +01:00
Dmitrii Golovanov
8dc2b911f6 soc: board: intel_socfpga_std: Align names to 'Cyclone V'
Align all names to `cyclonev` instead of using `cyclone5`.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:04 +01:00
Dmitrii Golovanov
402366117a soc: arm: intel_socfpga_std: Align board subdirectory
Aligh board directory to other Intel FPGA boards moving
`boards/intel/cyclonev_socdk` -->
`boards/intel/intel_socfpga_std/cyclonev_socdk`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:04 +01:00
Dmitrii Golovanov
f0a8d12745 boards: arm: cyclonev_socdk: Move to HWMv2
Move and convert to HWMv2 `cyclonev_socdk` board configuration.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:04 +01:00
Dmitrii Golovanov
2271f17a86 soc: arm: intel_socfpga_std: Move and convert to HWMv2
Move and convert to HWMv2 `soc/arm/intel_socfpga_std`
SoC family configuration, its SoC series `cyclonev`,
and SoC `intel_socfpga_std_cyclonev`.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:04 +01:00
Jamie McCrae
841c2a9d99 boards: riscv: beaglev_fire: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
3b314531ab boards: riscv: mpfs_icicle: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
d4ea2bf70b boards: riscv: m2gl025_miv: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
5256e9fcc3 soc: microchip_miv: Port to HWMv2
Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
18e5cf1d51 maintainers: Update path for hwmv2
Updates paths for hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
eab8628f98 boards: arm: qemu_cortex_m3: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
1532f2fee1 soc: ti_lm3s6965: Port to HWMv2
Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
430ca6a475 maintainers: Update ambiq paths
Updates ambiq SoC and board paths for hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
a9b9b41b91 boards: ambiq: Add index
Adds a documentation index file

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
db0271ecbb boards: arm: apollo4p_blue_kxr_evb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
957e2b2061 boards: arm: apollo4p_evb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
5a90a44454 soc: ambiq: Port to HWMv2
Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Daniel DeGrasse
a20c113fbd boards: nxp: convert ip_k66f to hwmv2
Convert ip_k66f to hardware model v2

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 15:50:04 +01:00
Daniel DeGrasse
34e3852a54 boards: nxp: convert usb_kw24d512 to hwmv2
Convert usb_kw24d512 to hardware model v2

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 15:50:04 +01:00
Declan Snyder
20ad604de6 boards: nxp: convert twr_kv58f220m to hwmv2
Convert twr_kv58f220m to hardware model v2

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-01 15:50:04 +01:00
Declan Snyder
2e2a7b7656 boards: nxp: twr_ke18f: convert to hwmv2
Convert twr_ke18f to hardware model v2

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-01 15:50:04 +01:00
Daniel DeGrasse
f7dcc2eb5e boards: nxp: convert rddrone_fmuk66 to hwmv2
Convert rddrone_fmuk66 to to hardware model v2

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 15:50:04 +01:00
Daniel DeGrasse
b58e90a2e9 boards: nxp: convert hexiwear to hwmv2
Convert hexiwear to hardware model v2. As multiple SOCs exist on this
board, the hexiwear_k64 and hexiwear_kw40z boards are combined into one
target.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 15:50:04 +01:00
Daniel DeGrasse
aae6e9e454 boards: nxp: frdm_kw41z: convert to hwmv2
Convert frdm_kw41z to hardware model v2

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 15:50:04 +01:00
Declan Snyder
1d3baac2d6 boards: nxp: convert frdm_kl25z to hwmv2
Convert frdm_kl25z to hardware model v2

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-03-01 15:50:04 +01:00
Mahesh Mahadevan
3b1d21483f boards: nxp: frdm_k82f: port to hwmv2
Port frdm_k82f to hardware model v2

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2024-03-01 15:50:04 +01:00
Daniel DeGrasse
6046e6ded9 boards: nxp: port frdm_k64f to hwmv2
Port frdm_k642 to hardware model v2

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 15:50:04 +01:00
David Leach
0a7bf9fd79 boards: nxp: port frdm_k22f to hwmv2
Port frdm_k22f to hardware model v2

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 15:50:04 +01:00
Daniel DeGrasse
dce697c823 boards: nxp: add toctree placeholder
Add table of contents tree placeholder for NXP boards, in preparation
for porting boards to HWMv2

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-01 15:50:04 +01:00
Daniel DeGrasse
666a353409 soc: nxp: kinetis: convert kinetis SOC family to hardware model V2
Convert kinetis SOC family to hardware model V2. Rework SOC Kconfig and
defconfig definitions to align with hardware model V2 guidelines.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Co-authored-by: Emilio Benavente <emilio.benavente@nxp.com>
Co-authored-by: David Leach <david.leach@nxp.com>
Co-authored-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Co-authored-by: Declan Snyder <declan.snyder@nxp.com>
Co-authored-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2024-03-01 15:50:04 +01:00
Jamie McCrae
89f0a6034b maintainers: Update paths for renesas boards/socs
Updates paths to account for changes in hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
004bd43c48 tests/samples/snippets: Update board names for hwmv2
Updates board names which have changed with hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
a6d756923d boards: arm and arm64: rcar_h3ulcb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
3801216b8d boards: arm64: rcar_salvator_xs_m3: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
b7cc30aaea boards: arm: rcar_h3_salvatorx_cr7: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:04 +01:00
Jamie McCrae
866427ea29 boards: arm: arduino_uno_r4: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:03 +01:00
Jamie McCrae
2689b3f0ee soc: ra: Port to HWMv2
Ports the ra SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:03 +01:00
Jamie McCrae
e7ebc727c8 boards: arm: da1469x_dk_pro: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:03 +01:00
Jamie McCrae
903265b2bb boards: arm: da14695_dk_usb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:03 +01:00
Jamie McCrae
529a78ed51 soc: smartbond: Port to HWMv2
Ports the smartbond SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:03 +01:00
Jamie McCrae
97cf636ae0 boards: arm: rcar_spider_cr52: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:03 +01:00
Jamie McCrae
6d0c53f3a1 soc: rcar: Port to HWMv2
Ports the rcar SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:03 +01:00
Jamie McCrae
44e0aa0668 soc: renesas: rzt2m: Move folder structure for more SoCs
Updates the folder structure to allow for more SoCs to be added,
and fixes some minor issues

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:03 +01:00
Erwan Gouriou
85238fc205 boards: misc: Fixed STM32 based boards doc links
Fix few bad links following board migration.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
dffc08af56 boards: riscv: niosv_m: move and convert to HWMv2
Move and convert to HWMv2 riscv/niosv_m board configuration.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
545093abe4 boards: riscv: niosv_g: move and convert to HWMv2
Move and convert to HWMv2 riscv/niosv_g board configuration.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
ecfa192f1b soc: riscv: intel_niosv: move and convert to HWMv2
Move to HWMv2 and convert from soc/riscv/intel_niosv SoC family
`INTEL_NIOSV` series `NIOSV` SoCs `NIOSV_M` and `NIOSV_G`.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
fd1e8cdc30 hwmv2: sof: intel_adsp: submanifest provisional link
Provisional link to SOF with adjustment to the HWMv2 new
intel_adsp board names.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
8bf067e625 doc: boards: intel_adsp: Re-order pages
Index boards/intel/intel_adsp pages.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
4833275ccd MAINTAINERS: intel_adsp: Adjust to HWMv2 move
Adjust intel_adsp paths to HWMv2 move.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
b9a70e5ea2 soc: intel_adsp: tools: pylint compliance workaround
Disable Pylint compliance check warning `R0801:Similar lines`.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
18c70cc4bf hwmv2: tests: boards: intel_adsp: Adjust board names
Adjust tests to HWMv2 intel_adsp_ace board name changes.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
ca52baf9de hwmv2: boards: intel_adsp: Overhaul board configurations
Rename and join configurations for intel_adsp CAVS and ACE
boards to benefit from HWMv2 shortened names with resulting
names change:

  `intel_adsp_ace15_mtpm` --> `intel_adsp/ace15_mtpm`
  `intel_adsp_ace20_lnl`  --> `intel_adsp/ace20_lnl`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
d1b3bcce64 soc: boards: xtensa: intel_adsp_ace: Rename with HWMv2
Rename for better HWMv2 use:

  SoC - `intel_ace15_mtpm` --> `ace15_mtpm`
  SoC - `intel_ace20_lnl`  --> `ace20_lnl`

Resulting shortened name for boards:

  `intel_adsp_ace15_mtpm/intel_ace15_mtpm` -->
  `intel_adsp_ace15_mtpm/ace15_mtpm`

  `intel_adsp_ace20_lnl/intel_ace20_lnl` -->
  `intel_adsp_ace20_lnl/ace20_lnl`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
f362a8ae2c doc: soc: boards: intel_adsp_cavs25: Rename with HWMv2
Adjust documentation to HWMv2 board rename:
  `intel_adsp_cavs25`      -> `intel_adsp/cavs25`
  `intel_adsp_cavs25_tgph` -> `intel_adsp/cavs25/tgph`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
51dee5da92 tests: samples: boards: intel_adsp_cavs25: Rename with HWMv2
Adjust tests and samples to HWMv2 board rename:
     `intel_adsp_cavs25`      -> `intel_adsp/cavs25`
     `intel_adsp_cavs25_tgph` -> `intel_adsp/cavs25/tgph`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
e66c35e0d0 boards: xtensa: intel_adsp_cavs25: Rename board with HWMv2
Rename for better HWMv2 use:
 board - `intel_adsp_cavs25` to `intel_adsp`

Resulting name changes for boards:
 `intel_adsp_cavs25/cavs25`      -> `intel_adsp/cavs25`
 `intel_adsp_cavs25/cavs25/tgph` -> `intel_adsp/cavs25/tgph`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
d1491a4810 soc: boards: xtensa: intel_adsp_cavs25: Rename with HWMv2
Rename for better HWMv2 use:
 SoC - `intel_tgl_adsp` to `cavs25`

Resulting name changes for boards:
 `intel_adsp_cavs25/intel_tgl_adsp`      -> `intel_adsp_cavs25/cavs25`
 `intel_adsp_cavs25/intel_tgl_adsp/tgph` -> `intel_adsp_cavs25/cavs25/tgph`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
fa0fca79c4 scripts: west: runners: intel_adsp: Adjust path to HWMv2
Adjust script path to HWMv2 location at `soc/intel/intel_adsp/tools`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
acd18bfaf7 boards: xtensa: intel_adsp_ace20_lnl: move and convert to HWMv2
Move and convert to HWMv2 intel_adsp_ace20_lnl board configuration.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
546c94b958 boards: xtensa: intel_adsp_ace15_mtpm: move and convert to HWMv2
Move and convert to HWMv2 intel_adsp_ace15_mptm board configuration.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
8aab718c3e boards: xtensa: intel_adsp_cavs25_tgph: change to board variant
Change `intel_adsp_cavs25_tgph` board definition to be HWMv2 board
variant `intel_adsp_cavs25/intel_tgl_adsp/tgph`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
30f17424a4 boards: xtensa: intel_adsp_cavs25: move and convert to HWMv2
Move and convert to HWMv2 intel_adsp_cavs25 board configuration.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
35a97cb524 soc: xtensa: intel_adsp: HWMv2 workaround for SOF config
Apply a workaround at Kconfig.defconfig for CORE_COUNT default
value set overriding SOF arch/host incorrect defaults chosen
without ARCH specified by the changed HWMv2 cmake sequence.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Dmitrii Golovanov
fdc20fdff6 soc: xtensa: intel_adsp: move and convert to HWMv2
Move and convert soc/xtensa/intel_adsp SoC family configurations
to HWMv2 with its SoC series:
`ace` (INTEL_ACE) and `cavs` (INTEL_ADSP_CAVS).

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:03 +01:00
Torsten Rasmussen
22dc2b6391 cmake: improved board handling for revisions
This commit improves board handling for boards in HWMv2.
On a CMake rerun, then BOARD_DIR is passed to `list_boards.py` which
is extended to take such parameter.

This allows to run `list_boards.py` whenever CMake reruns without the
penalty of searching for all board.yml files, as only the board.yml of
the current BOARD_DIR is processed.

This allows `list_boards.py` to be invoked and from there obtain list
of valid revisions and board identifiers for further board validation.

This removes the need for caching additional CMake variables related to
the board identifier and revision and thereby remove the risk of
settings becoming out of sync as only the board provided by user is
needed.

This work further ensure that use-cases described in #50536 is still
supported.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:02 +01:00
Torsten Rasmussen
2f1e33a2e6 cmake: improve arch error message for invalid arch selection
Legacy hw model picked the arch based on folder names.
The new hw model allows for greater flexibility and instead uses the
architecture defined by `CONFIG_ARCH` in Kconfig.

Therefore check that ARCH is defined and fail with a better error
message if ARCH is not defined. The error message includes the board and
SoC selected to make it easier to trace such errors.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:50:02 +01:00
Jamie McCrae
c47c37d3db sample: basic: blinky_pwm: Exclude rpi_pico w variant
Adds an exclusion because this board does not have an LED defined
and will try to use the base board overlay file, resulting in
failure

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:02 +01:00
Jamie McCrae
7a788b9a18 boards: raspberry_pi: rpi_pico: Use full name for w variant
Updates the name to have the SoC in

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
7046b92d41 tests: atmel_sam: adc: Fix sam4e_xpro adc build
This add a missing sam4e_xpro overlay in the tests/drivers/adc for the
sam4e_xpro board.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
253ee9638c tests: atmel_sam0: Update platform name
This update all atmel_sam0 related entries to use the new
platform name.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
ccb4c63324 samples: atmel_sam0: Update platform name
This update all atmel_sam0 related entries to use the new
platform name.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
2d4acf9230 boards: arduino_nano_33_iot: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
a60d28969a boards: arduino_mkrzero: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
0409e51d3f boards: arduino_zero: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
1b2528df1b boards: wio_terminal: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
af1096e7ca boards: ev11l78a: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
0b1db9c53d boards: adafruit_trinket_m0: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
e9874671e2 boards: adafruit_itsybitsy_m4_express: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
ba6c014071 boards: adafruit_grand_central_m4_express: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
33ad4a51ca boards: adafruit_feather_m0_lora: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
9812f3d54e boards: adafruit_feather_m0_basic_proto: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
c76b1fbeca boards: serpente: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
649789e433 boards: seeeduino_xiao: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
6b3bdb7364 boards: same54_xpro: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
93dda5ee4b boards: samr34_xpro: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
e48e1f5d5b boards: samc21n_xpro: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
f11cf73df1 boards: saml21_xpro: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
ac73ed6dcd boards: samd20_xpro: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
0fdbe3552e boards: samd21_xpro: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
854cff3905 boards: samr21_xpro: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
a87ea5bc0a soc: atmel: sam0: Port to HWMv2
Port all Atmel SAM0 SoCs to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Jamie McCrae
706e5d27cd boards: riscv: neorv32: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:02 +01:00
Jamie McCrae
d1edcdd088 soc: neorv32: Port to HWMv2
Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:02 +01:00
Alberto Escolar Piedras
0f7add89ca boards: native_sim/posix: Add 64bit versions as variants
For native_sim and native_posix add the 64 bit version
definitions as board variants.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-01 15:50:02 +01:00
Francois Ramu
b6edad8d68 soc: soc_legacy: remove the arm/st_stm32 folder
Remove the entire soc/soc_legacy/arm/st_stm32 folder

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-03-01 15:50:02 +01:00
Francois Ramu
c58e0822a6 boards: Convert nucleo_f207zg to HWM v2
Port the board to HWMv2.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-03-01 15:50:02 +01:00
Francois Ramu
b987093a80 soc: v2: stm32: Migrate STM32F2 series
Port STM32F2 series to HW model V2

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-03-01 15:50:02 +01:00
Jamie McCrae
2096fd4652 samples: bluetooth: hci_uart: Fix wrongly converted board names
Fixes an issue whereby converted board names were wrong

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
830f9c5a82 MAINTAINERS: Update Atmel entries
Update Atmel related rules to keep consistent.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
527cd9d8cd CODEOWNERS: Update Atmel entries
Update Atmel related rules to keep consistent.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
83af7d0c1c samples: atmel_sam: Update platform name
This update all atmel_sam entries to use the new platform name related
to sam_e70_xplained and sam_v71_xult.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:02 +01:00
Gerson Fernando Budke
fd9b84d457 tests: atmel_sam: Update platform name
This update all atmel_sam entries to use the new platform name related
to sam_e70_xplained and sam_v71_xult.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:01 +01:00
Gerson Fernando Budke
3c72fe863c boards: arduino_due: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:01 +01:00
Gerson Fernando Budke
37dfacbf9e boards: RoboKit1: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:01 +01:00
Gerson Fernando Budke
1108d7b0ed boards: sam_v71_xult: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:01 +01:00
Gerson Fernando Budke
bed44a5c28 boards: sam_e70_xplained: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:01 +01:00
Gerson Fernando Budke
40448c5a9f boards: sam4s_xplained: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:01 +01:00
Gerson Fernando Budke
31273692c0 boards: sam4l_ek: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:01 +01:00
Gerson Fernando Budke
35b5d33ef0 boards: sam4e_xpro: Convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:01 +01:00
Gerson Fernando Budke
3b84b9910a soc: atmel: Port SAM family to HWMv2
Port all the Atmel SAM SoCs to HWMv2.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
da00d0e7b9 boards: Convert nucleo_wba55cg to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
fb2103f89e boards: Convert nucleo_wba52cg to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
1f9a533fbc soc: st: stm32: Migrate STM32WBA series
Port STM32WBA series to HW model v2

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
3f92f65b28 boards: fix documentation for alientek and blues boards
Fix documentation for alientek and blues boards

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
7646b74aaf boards: stm32l4: doc: add zephyr_file to defconfig path
Add :zephyr_file: to the defconfig path for STM32L4 boards

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
fea54ddcd9 boards: Convert adi_eval_adin2111ebz to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
d47f1878b1 boards: Convert adi_eval_adin1110ebz to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
ae42be236b boards: Convert swan_r5 to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
83bd1a9ecc boards: Convert stm32l4r9i_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
39c26f09ed boards: Convert stm32l496g_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
29d03c970b boards: Convert stm32l476g_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
74acec315c boards: Convert sensortile_box to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
fee6d8676e boards: Convert pandora_stm32l475 to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
008b5d9392 boards: Convert nucleo_l4r5zi to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
24e357d623 boards: Convert nucleo_l4a6zg to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
2c5f9dcce0 boards: Convert nucleo_l496zg to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
4da061646f boards: Convert nucleo_l476rg to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
15956a69b8 tests: drivers: flash: stm32: update platform name
Update Nucleo L452RE-P name

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
80324f7707 boards: Convert nucleo_l452re_p to HWM v2
Port the board to HWMv2. Introduce it as variant of nucleo_l452re

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
9893e0d111 boards: Convert nucleo_l452re to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
46f92b227b boards: Convert nucleo_l433rc_p to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
ed5d1bb4cd boards: Convert nucleo_l432kc to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:01 +01:00
Guillaume Gautier
325f95ec20 boards: Convert nucleo_l412rb_p to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:00 +01:00
Guillaume Gautier
d055676307 boards: Convert disco_l475_iot1 to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:00 +01:00
Guillaume Gautier
c7a415d92c boards: Convert b_l4s5i_iot01a to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:00 +01:00
Guillaume Gautier
d15144f582 soc: st: stm32: Migrate STM32L4 series
Port STM32L4 series to HW model v2

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:00 +01:00
Alberto Escolar Piedras
a63ff71bcb boards: nrf_bsim: Add new nrf5340 board definitions
With the proper structure for the hwmv2, and matching the
real HW ones.
Also add a note about the old ones being just a middle step
for backwards compatibility.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-01 15:50:00 +01:00
Alberto Escolar Piedras
b53c6f412c boards: nrf_bsim: Remove redundant option setting
The BOARD value is set in a common place for hwmv2.
No need to set it here also.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-01 15:50:00 +01:00
Dmitrii Golovanov
83eb4fc069 MAINTAINERS: intel_ish: Adjust to HWMv2 move
Adjust intel/intel_ish SoC and board maintainers to HWMv2 move.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:00 +01:00
Dmitrii Golovanov
715685b19f boards: x86: intel_ish: move and convert intel_ish boards to HWMv2
Move and convert to HWMv2 the following board configurations:
intel_ish_5_4_1, intel_ish_5_6_0, intel_ish_5_8_0

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:00 +01:00
Dmitrii Golovanov
5b9ef94106 soc: x86: intel_ish: move and convert to HWMv2
Move and convert soc/x86/intel_ish to HWMv2 as soc/intel/intel_ish

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:00 +01:00
Guillaume Gautier
12b297707a boards: Convert stm32wb5mmg to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:00 +01:00
Guillaume Gautier
cdcea932bc boards: Convert stm32wb5mm_dk to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:00 +01:00
Guillaume Gautier
0a3ae2b223 boards: Convert nucleo_wb55rg to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:00 +01:00
Guillaume Gautier
20b4ce17d5 soc: st: stm32: Migrate STM32WB series
Port STM32WB series to HW model v2

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:00 +01:00
Guillaume Gautier
47c65400d6 soc: st: stm32: fix stm32l0 family
Fix the name of the stm32l0 family.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:00 +01:00
Guillaume Gautier
59ec56f9e6 boards: Convert stm32h573i_dk to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:00 +01:00
Guillaume Gautier
dc5977dbba boards: Convert nucleo_h563zi to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:00 +01:00
Guillaume Gautier
a6e4928543 soc: st: stm32: Migrate STM32H5 series
Port STM32H5 series to HW model v2

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 15:50:00 +01:00
Erwan Gouriou
99f248e048 soc: stm32u5: Fix references after conversion to hw modelv2
b_u585i_iot02a_ns is now b_u585i_iot02a/stm32u585xx/ns.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:50:00 +01:00
Erwan Gouriou
15f16834e6 boards: Convert stm32u5a9j_dk to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:50:00 +01:00
Erwan Gouriou
c1ee449ef1 boards: Convert sensortile_box_pro to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:50:00 +01:00
Erwan Gouriou
db4deddf9d boards: Convert nucleo_u5a5zj_q to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:50:00 +01:00
Erwan Gouriou
2fd3ed43d2 boards: Convert nucleo_u575zi_q to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:50:00 +01:00
Erwan Gouriou
902fceb173 boards: Convert b_u585i_iot02a to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:50:00 +01:00
Erwan Gouriou
d716ca1a10 soc: st: Migrate stm32u5 series to new hw model
Migrate STM2U5 series to new HW model.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:50:00 +01:00
Dmitrii Golovanov
b7abc89428 hwmv2: boards: x86: doc: Adjust common docs to new locations
Adjust x86/common doc location to HWMv2 move.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:50:00 +01:00
Alberto Escolar Piedras
69b334f54b MAINTAINERS: Change paths to native and nrf*bsim boards
To match the current placement.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-01 15:50:00 +01:00
Alberto Escolar Piedras
614611a528 boards: nrf*_bsim: Convert to HW model v2
With a new board.yml file and reorganizing their
Kconfig options.

Note: the nrf5340 variants remain as their own
targets, instead of being variants of the base ones
to avoid breakage in this commit
(while not having a massime commit)

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-01 15:50:00 +01:00
Alberto Escolar Piedras
5821b9ec2e board: native_sim/posix: Convert to hwmv2
With new board.yml files and reorganizing their
Kconfig options.

Note: native_posix_64 & native_sim_64 remain as their own
targets, instead of being variants of the base ones
to avoid breakage in this commit, while not
having a massive commit.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-01 15:50:00 +01:00
Alberto Escolar Piedras
04cbad174e soc: native: Convert to HWMv2
Add a soc.yml and reorganize the Kconfig options

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-01 15:50:00 +01:00
Alberto Escolar Piedras
24ca0febfc boards: nrf_bsim: Fix path to pinctrl_soc.h
Just fix the path, it was not correct.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-01 15:50:00 +01:00
Alberto Escolar Piedras
9a32559a2d cmake: FindHostTools: Fix for hwmv2 for host based targets
With hwmv2, the ARCH variable is not yet defined
when this module is loaded (kconfig is parsed after this).
So we cannot rely on it to detect if we are building for a
host target.
For this case, let's instead detect it by the BOARD or
BOARD_DIR which are some of the very few things defined
at this point.
We retain the old check to support hwmv1 boards which
may be in other folders.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-01 15:50:00 +01:00
Gerard Marull-Paretas
c4b11e0251 boards: longan_nano: port to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:50:00 +01:00
Gerard Marull-Paretas
97edd05be3 boards: gd32vf103c_starter: port to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:50:00 +01:00
Gerard Marull-Paretas
9cf624c410 boards: gd32vf103v_eval: port to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:59 +01:00
Gerard Marull-Paretas
b40bf25e5e soc: gd_gd32: reorganize folders
Move soc/gd_gd32 to soc/gd/gd32.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:59 +01:00
Gerard Marull-Paretas
71600d7e95 soc: gd_gd32: move pinctrl_soc.h content back to soc folder
Because we can now group all architectures within the same family, so
there's no need to place files outside of soc/family folder.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:59 +01:00
Gerard Marull-Paretas
2bd84a1bc5 soc: gd_gd32: port gd32vf103 series to HWMv2
Port the only RISC-V SoC from GigaDevice to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:59 +01:00
Fabio Baltieri
9dc342143b boards: doc: fix a bunch of broken reference
Fix a bunch of broken reference to configuration and other files. Drop
two TI ones that were stale, file were long gone, add few zephyr_file
tags.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:49:59 +01:00
Gerard Marull-Paretas
10392d693d doc: boards: split out shields
So that they have their own list, independent of boards list.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:59 +01:00
Gerard Marull-Paretas
b2def8ed3a boards: acrn: fix title
Use a better title so that it fits the board list.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:59 +01:00
Jamie McCrae
bf7d3efe78 boards: riscv: tlsr9518adk80d: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:59 +01:00
Jamie McCrae
c579770e1d soc: telink_tlsr: Port to HWMv2
Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
9131540109 soc: stm32h7: Couple of tests fixes following migration
This should cover all issues.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
2efcefc089 boards: Convert stm32h7b3i_dk to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
d9b295a85b boards: Convert stm32h750b_dk to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
a2f56bdcd5 boards: Convert stm32h747i_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
00314155df boards: Convert stm32h735g_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
b08819dff7 boards: Convert nucleo_h7a3zi_q to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
56456c16e5 boards: Convert nucleo_h753zi to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
91f9198dc4 boards: Convert nucleo_h745zi_q to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
96f1bafbf9 boards: Convert nucleo_h743zi to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
b290f25baa boards: Convert nucleo_h723zg to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
9fbe6bf191 boards: Convert fk7b0m1_vbt6 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
44bcfe57c7 boards: Convert arduino_portenta_h7 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
4c86af7eae boards: Convert arduino_opta_m4 to HWM v2
Port the board to HWMv2.

Additionally, change the board name to arduino_opta
as the compilation target is now fully explicit on the
core in use.
Besides, it will ease a potential addition of the m7 core.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
b4f852f738 boards: Convert arduino_giga_r1 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
bac9789264 soc: st: Migrate stm32h7 series to new hw model
Migrate STM2H7 series to new HW model.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
a954e1722d boards: stm32l0: Cleanup board _defconfig files after migration
Remove obsolete comments.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
7e8515b241 boards: Convert ronoth_lodev to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
25246c21ef boards: Convert nucleo_l073rz to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
09396eb2e6 boards: Convert nucleo_l053r8 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
70c004fd83 boards: Convert nucleo_l031k6 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
e3daa98e79 boards: Convert nucleo_l011k4 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
a2de60c6da boards: Convert dragino_nbsn95 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
e877ce9cec boards: Convert dragino_lsn50 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
2b50218c23 boards: Convert b_l072z_lrwan1 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
4a65f55916 soc: st: Migrate stm32l0 series to new hw model
Migrate STM2L0 series to new HW model.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:59 +01:00
Fabio Baltieri
cc6e6be01f boards: fix few leftover ITE board references
Fix few leftover ITE references from the conversion to hwmv2.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:49:59 +01:00
Erwan Gouriou
a837303268 soc: stm32: Protect Kconfig symbols by SOC_FAMILY_STM32
Should avoid polluting other socs.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 15:49:58 +01:00
Alberto Escolar Piedras
88e5959f17 hwm2: Fix unit_testing: it is also a legacy board by now
b3243bb501
missed moving the unit_testing target board and soc
definition to the corresponding legacy folders
leaving them broken. Fix it by doing the equivalent
move.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Alberto Escolar Piedras
95e06e8663 cmake: Fix uses of old SOC path
In quite a few places in the cmake files
${SOC_DIR}/${ARCH}/${SOC_PATH}
was used to get to something in the soc folder,
but these are only defined for soc_v1.
socv2 defines a full SOC_V2_DIR.
Let's define a common variable for the full path which
can be used in other cmake files,
and correct the current uses.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Torsten Rasmussen
d517d3cc24 soc: set linker script for ra4m1
Follow-up: #66648

Commit 595b06aaa9 accidentally removed
linker.ld for the ra4m1 SoC.

As the linker.ld anyway included the common arm cortex_m linker script
then fix this by setting a correct SOC_LINKER_SCRIPT value.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Fabio Baltieri
68f9aeddab soc: ite: add SOC_SERIES_ITE_IT8XXX2 guards around ITE options
Add a check for SOC_SERIES_ITE_IT8XXX2 around ITE options so that they
only get set when building for ITE platforms.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:49:58 +01:00
Fabio Baltieri
ccf4f48f01 boards: convert ite boards to hwmv2
Convert it82xx2_evb and it8xxx2_evb to hwmv2.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:49:58 +01:00
Fabio Baltieri
4a6e286a3b soc: convert ite_ec to hwmv2
Convert the ite_ec soc to the hardware model v2.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-03-01 15:49:58 +01:00
Torsten Rasmussen
12e375f826 doc: handle arch / soc / board docs in new hardware model
Updates to Zephyr Kconfig doc generation for new hardware model.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
b4db917de9 boards: Add documentation index files
Adds index files for newly converted boards

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
d6e0d27efe samples: bluetooth: hci_uart: Fix wrong named files
Fixes an issue whereby some overlay filenames were wrongly
updated in a prior commit

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
bc16a7a727 tests: Update board names for hwmv2
Updates tests that use board names which have changed with
boards v2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
2834883843 boards: riscv: rv32m1_vega: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
9c68231ba9 soc: openisa_rv32m1: Port to HWMv2
Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
986e9619fd soc: starfive_jh71xx: Port to HWMv2
Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
e82932e787 boards: riscv: litex_vexriscv: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
cb9339f88f soc: litex_vexriscv: Port to HWMv2
Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
1cd4c34654 boards: riscv: opentitan_earlgrey: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
92eadf06b8 soc: opentitan: Port to HWMv2
Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
a8659e170b boards: riscv: titanium_ti60_f225: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
359133d725 soc: efinix_sapphire: Port to HWMv2
Ports the SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
6d466429ed soc: soc_legacy: riscv: litex_vexriscv: Add updated paths
Adds updates paths for this SoC with the new riscv common folder
to prevent build failures until it is converted to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
a1ff441eb3 boards: riscv: adp_xc7k_ae350: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
ef82a8255c soc: ae350: Port to HWMv2
Ports the ae350 SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Gerard Marull-Paretas
282204758a samples: boards: stm32: ccm: fix include path
Update with the new board path.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:58 +01:00
Gerard Marull-Paretas
8ca9341195 samples: basic: threads: fix broken reference
Sphinx reference was updated by mistake.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:58 +01:00
Gerard Marull-Paretas
8a947f446d boards: nrf52840dk: fix rst syntax
Add a missing blank line.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:58 +01:00
Gerard Marull-Paretas
324cb41153 boards: nordic_nrf: fix broken references
Those were likely updated by mistake when changing to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:58 +01:00
Gerard Marull-Paretas
963c74df1c boards: intel_(ish|adl|ehl|rpl), up_squared: fix include paths
Update some included file paths according to the new directory layout.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:58 +01:00
Gerard Marull-Paretas
8d518ce504 boards: legacy: drop empty folders
Drop folders that no longer have boards.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:58 +01:00
Gerard Marull-Paretas
0fef0cef5b boards: mps2: fix table formatting
Table had wrong formatting, causing documentation warnings.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:58 +01:00
Gerard Marull-Paretas
e52ccc244f boards: add HWMv2 board index
Add a new board index based on HWMv2 structure (vendor based).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:58 +01:00
Gerard Marull-Paretas
c7426eca5e boards: arm: add legacy tag
So that it does not collide with the ARM Ltd. boards.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:58 +01:00
Gerard Marull-Paretas
1eba9d8a8f boards: acrn: create vendor folder
So that the same structure is followed by all boards, easing the
standardization of tables in the documentation.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:58 +01:00
Dmitrii Golovanov
8d92edc727 tests: kernel: Adjust qemu_x86_tiny_768 configuration HWMv2
Adjust qemu_x86_tiny/ia32/768 configuration for:
 tests/kernel/mbox/mbox_api
 tests/kernel/mem_protect/stackprot

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 15:49:58 +01:00
Torsten Rasmussen
75117d1b2d scripts: ensure posix path is used with --cmakeformat
When printing with --cmakeformat format specifier then dir output should
be printed as posix path, that is with forward slashes '/'.

This will make output compatible with CMake path style.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Gerard Marull-Paretas
0b0384b56a maintainers: update paths after HWMv2 changes
This is a follow-up update of the MAINTAINERS.yml file with new paths
due to the HWMv2 changes.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 15:49:58 +01:00
Jamie McCrae
c1b77b223d boards: arm: pan1783: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
91a077b2ab boards: posix: nrf_bsim: Update paths
Updates paths for the moved nordic_nrf SoC folder

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:58 +01:00
Jamie McCrae
413b6c2a40 cmake: modules: configuration_files: Add board identifier overlay file
Fixes an issue in hwmv2 whereby an overlay file exists with the full
board name and identifier which worked in hwmv1

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
4f572ba24f treewide: Update board names for hwmv2
Updates tests that use board names which have changed with boards v2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
cb348c7edf boards: arm: nrf54l15pdk_nrf54l15: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
811ad90566 boards: arm: nrf54h20pdk_nrf54h20: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
d44ef90cf8 soc: nordic_nrf: Migrate nRF54H/nRF54L to v2 and fix nrf
Moves this SoC over from v1 to v2 so it can be used in HWMv2, and
fix the SoC configuration for existing nordic_nrf devices which
was not ported properly

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
c860f205de boards: arm: nrf9151dk_nrf9151: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
fba98a1763 soc: nordic_nrf: Migrate nRF9151 to v2
Moves this SoC over from v1 to v2 so it can be used in HWMv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
5c156a2d35 boards: arm: 96b_carbon_nrf51: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
cfc47a3a4b boards: arm: nrf9161dk_nrf9161: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
37129b4e44 boards: arm: nrf9131ek_nrf9131: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
a923beba5d boards: arm: bl5340_dvk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
d242b2703b boards: arm: raytac_mdbt53v_db_40_nrf5340: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
9c80d4e644 boards: arm: raytac_mdbt53_db_40: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
28268c4938 boards: arm: nrf5340_audio_dk_nrf5340: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
33ad2b5bc6 boards: arm: thingy53_nrf5340: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
40daa94f2d boards: arm: nrf9160_innblue22: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
2b0dbb9d51 boards: arm: nrf9160_innblue21: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
ee6f7697ac boards: arm: sparkfun_thing_plus_nrf9160: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
594e4bad6b boards: arm: circuitdojo_feather_nrf9160: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
a5803ba099 boards: arm: actinius_icarus: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
db8c275456 boards: arm: actinius_icarus_bee: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
30177cf53d boards: arm: actinius_icarus_som: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
486504cf24 boards: arm: actinius_icarus_som_dk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
dd0672a64c boards: arm: nrf9160dk_*: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
c1565b3d14 boards: arm: xiao_ble: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
6dd2723314 boards: arm: qemu_cortex_m0: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
ee1ce24a42 boards: arm: bbc_microbit: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
1952d559f2 boards: arm: rm1xx_dvk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
9e12c3d8bd boards: arm: nrf51dongle_nrf51422: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
0ffbc1da33 boards: arm: nrf51_blenano: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:57 +01:00
Jamie McCrae
be52dfb7b6 boards: arm: nrf51_vbluno51: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
4c29d1827f boards: arm: nrf51_ble400: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
5b4a9556fd boards: arm: raytac_mdbt53_db_40_nrf5340: Fix typo
Fixes a typo that ruins grep searches when trying to find
nrf52840-based boards

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
69e5d87a15 boards: arm: contextualelectronics_abc: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
5e4ace1bbe boards: arm: degu_evk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
2762460a64 boards: arm: pan1781_evb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
fdc3913e76 boards: arm: ubx_evkninab1_nrf52832: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
9c9c3a09a1 boards: arm: holyiot_yj16019: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
109edc296f boards: arm: blueclover_plt_demo_v2_nrf52832: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
7bfcdbbe8f boards: arm: decawave_dwm1001_dev: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
0fbb543983 boards: arm: acn52832: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
073e0f8080 boards: arm: we_proteus2ev_nrf52832: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
197a19f396 boards: arm: ebyte_e73_tbb_nrf52832: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
1616fc8ae5 boards: arm: nrf52_vbluno52: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
5622077738 boards: arm: nrf52_sparkfun: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
a6289516e4 boards: arm: 96b_nitrogen: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
439d836883 boards: arm: nrf52_blenano2: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
16e65f09c4 boards: arm: arduino_nicla_sense_me: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
862efd5a21 boards: arm: thingy52_nrf52832: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
dede0f6cd3 boards: arm: nrf52_adafruit_feather: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
91e864ea29 boards: arm: nrf52832_mdk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
47ec3e416b boards: arm: ruuvi_ruuvitag: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
52f797a227 boards: arm: pinetime_devkit0: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
433db339f9 boards: arm: ubx_evkannab1_nrf52832: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
a646d3f2d5 boards: arm: ubx_bmd300eval_nrf52832: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
d0d434bf86 cmake: print identifier instead of variant
Update board info printing to use the common term identifier.
Variant is used for the final part of the identifier when a board has
multiple build variants.

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
c3f5ed8157 boards: arm: we_proteus3ev_nrf52840: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
eecff8ee7a boards: arm: nrf52840_mdk_usb_dongle: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
34507614f6 boards: arm: nrf52840_mdk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
f02b56cb96 boards: arm: nrf52840_blip: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
600c55c92a boards: arm: nrf52840_papyr: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
f294bfc5e4 boards: arm: reel_board: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
882524d2a0 boards: arm: nrf21540dk_nrf52840: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
4bce0e9b39 boards: arm: nrf52840dongle_nrf52840: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
d0229c771f boards: arm: particle_argon: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:56 +01:00
Jamie McCrae
23a0570e64 boards: arm: particle_boron: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
b6d3e1764f boards: arm: particle_xenon: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
499f3e7902 boards: arm: rak5010_nrf52840: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
9ae6b1804d boards: arm: rak4631_nrf52840: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
fe2c90da5c boards: arm: pinnacle_100_dvk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
3d4d46698c boards: arm: ubx_evkninab3_nrf52840: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
b1afbf0158 boards: arm: ubx_bmd380eval_nrf52840: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
9f9897c872 boards: arm: ubx_bmd345eval_nrf52840: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
f7fb2030c7 boards: arm: ubx_bmd340eval_nrf52840: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
7186432662 boards: arm: raytac_mdbt50q_db_40_nrf52840: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
32c4bdc0c4 boards: arm: pan1780_evb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
7b64c638a8 boards: arm: pan1770_evb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
156ee8ad8a boards: arm: mg100: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
3d33dadeb0 boards: arm: arduino_nano_33_ble: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
4fee7371d2 boards: arm: adafruit_itsybitsy_nrf52840: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
ad37a0c222 boards: arm: adafruit_feather_nrf52840: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
cf85b7169f boards: arm: bt510: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
44b67ac430 boards: arm: bt610: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
7dbb65d371 boards: arm: ubx_evkninab4_nrf52833: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
5e79cb957d boards: arm: raytac_mdbt50q_db_33_nrf52833: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
12bd83a218 boards: arm: pan1782_evb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
1a135ec352 boards: arm: bbc_microbit_v2: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
4dbe97e5ea boards: arm: nrf52833dk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
d632b90043 boards: arm: ubx_bmd360eval_nrf52811: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
cc1a30f24b boards: arm: we_ophelia1ev_nrf52805: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
df0df9000b boards: arm: ubx_bmd330eval_nrf52810: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
d2c7972a9a boards: arm: nrf52dk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
202c2bf447 boards: arm: bl654_sensor_board: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
c3e36f2042 boards: arm: bl654_usb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
b9dd58aea1 boards: arm: bl654_dvk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
0e1898b093 boards: arm: bl653_dvk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
286f4a7524 boards: arm: bl652_dvk: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
d1709cdb37 boards: update nRF51dk board to board scheme v2.
This commit updates nrf51dk_nrf51422 to use board scheme v2, and
thus becomes board nrf51dk with the SoC nrf51422.

It also uses the new SoC approach, and thereby ensuring that the right
SoC is always used, and cannot accidentially be changed by the user.

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
8f040cff2c boards: Update nrf5340dk_nrf5340 to HWMv2 scheme
This commit updates nrf5340dk_nrf5340 to use board scheme v2, and
thereby remove the Kconfig BOARD setting, as this is now passed from
CMake.

The nRF5340dk now support cpuapp and cpunet as cpusets, and the ns as
a build variant.

It also uses the new SoC approach, and thereby ensuring that the right
SoC is always used, and cannot accidentially be changed by the user.

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:55 +01:00
Jamie McCrae
8c90fae8e0 boards: update nRF52840dk_nrf52840/nrf52811 board to board scheme v2.
This commit updates nrf52840dk_nrf52840 and nrf52840_nrf52811 to use
board scheme v2, and thereby remove the Kconfig BOARD setting, as this
is now passed from CMake.

It combines both boards in a common nrf52840dk board folder where each
SoC is an entry in the board.yml file.

It also uses the new SoC approach, and thereby ensuring that the right
SoC is always used, and cannot accidentially be changed by the user.

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
c828dcc60e boards: common: openocd-nrf5: Add HWMv2 support
Adds support for determining the running from the identifier
which is needed for HWMv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
c79f1b0d94 kconfig: soc: adopt Nordic SoC series to support hw model v2 scheme
This commit adopts hw model v2 to nRF SoC family.

This ensures that when hw model v2 is used for an nRF51, nRF52, nRF53,
and nRF91 SoC series, so that all SoC selections are handled internally
by Kconfig, and no selection / re-configuration is possible by end-user
or through configuration files.

Hw model v2 requires the SoC to be self-contained, that is no
references are allowed out-side the SoC Kconfig tree.

All Zephyr Kconfig specifics are therefore sourced into the Zephyr
Kconfig tree through Kconfig.zephyr and Kconfig.zephyr.defconfig.

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
3584b30fc1 tests: Update board names for hwmv2
Updates tests that use board names which have changed with boards v2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
94024d940e boards: arm: arty_a7: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
8053c3a8df boards: arm: scobc_module1: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
d5473b76fe soc: designstart: Port to HWMv2
Ports the designstart SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
f5792b05e7 boards: arm: fvp_baser_aemv8r_aarch32: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
ff202daa8e soc: fvp_aemv8r_aarch32: Port to HWMv2
Ports the fvp_aemv8r_aarch32 SoC configuration to hardware model
version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
e66cbc2945 boards: arm: v2m_musca_s1: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
33b47b2edb boards: arm: v2m_musca_b1: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
baeebd31d2 soc: musca: Port to HWMv2
Ports the musca SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
73b257a3f9 boards: arm: v2m_beetle: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
85de0888ec soc: beetle: Port to HWMv2
Ports the beetle SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 15:49:54 +01:00
Jamie McCrae
867960a891 manifest: Update modules
Updates modules with fixes for board names changed as part of hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2024-03-01 15:49:52 +01:00
Jamie McCrae
6ca677ed3a boards: arm: mps2: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:19:39 +00:00
Anas Nashif
bcf4ad19d4 twister: build_dir: convert / to _ to support hwmv2
Convert platform name in the build_dir variable to use _ instead of /.
Otherwise we will be creating deep hierachy of directories based on the
new platform name containing slashes.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-03-01 14:17:26 +00:00
David Leach
0ac386683f soc: Kconfig.v2: Add SOC_PART_NUMBER
Add SOC_PART_NUMBER to set of SOC configuration parameters

Signed-off-by: David Leach <david.leach@nxp.com>
2024-03-01 14:17:26 +00:00
Abderrahmane Jarmouni
9242c3c78f soc: stm32: soc.yml: reorder series
reorder series in alphabetical order

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:26 +00:00
Abderrahmane Jarmouni
248d17f160 boards: stm32: cleanup
delete obsolete .conf files

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:26 +00:00
Abderrahmane Jarmouni
0a67265e99 boards: stm32: fix for boards with revisions
fix .overlay name for boards with revisions.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:26 +00:00
Erwan Gouriou
f8d44317ee soc: stm32l5: Rename overlays for nucleo_l552ze_q ns target.
File name should now be nucleo_l552ze_q_stm32l552xx_ns.overlay

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:26 +00:00
Erwan Gouriou
400343d17e soc: stm32: Set default on USE_DT_CODE_PARTITION
Rather than configuring USE_DT_CODE_PARTITION in all ns targets,
do it conditionally as part of SoC description.

This allows cleaning up some BOARD dedicated symbols that are now
useless.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:26 +00:00
Erwan Gouriou
d783ef549a soc: stm32l5: Update stm32l5 non secure targets in various places
Need to update board name scheme for L5 ns targets.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:26 +00:00
Erwan Gouriou
643aeac552 boards: Convert stm32l562e_dk to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:26 +00:00
Erwan Gouriou
e601d64344 boards: Convert nucleo_l552ze_q to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:26 +00:00
Erwan Gouriou
2f7a387b32 soc: st: Migrate stm32l5 series to new hw model
Migrate STM2L5 series to new HW model.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:26 +00:00
Grzegorz Swiderski
519752efcd boards: xenvm: doc: Remove reference to deleted file
`xenvm_xenvm_defconfig` no longer exists. Take this opportunity to refer
to board configurations by their actual identifiers.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-03-01 14:17:26 +00:00
Grzegorz Swiderski
06263dd717 boards: xenvm: Unset HEAP_MEM_POOL_SIZE in gicv3 variant
In HWMv1, the `xenvm` and `xenvm_gicv3` boards used different heap sizes
- 16384 and 0 (default) respectively. Due to HWMv2 defconfig inheritance
the setting must be moved to `Kconfig.defconfig`.

As a result, `xenvm_xenvm_gicv3_defconfig` can be removed, because it is
now equal to `xenvm_defconfig` (base).

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-03-01 14:17:26 +00:00
Grzegorz Swiderski
66b0df5526 boards: qemu_cortex_a53: Fix Kconfig warnings in SMP variant
A combination of multiple defconfigs resulted in this:

   CONFIG_QEMU_ICOUNT=y
   CONFIG_QEMU_ICOUNT_SHIFT=4  # depends on QEMU_ICOUNT
   CONFIG_QEMU_ICOUNT_SLEEP=y  # depends on QEMU_ICOUNT
   CONFIG_QEMU_ICOUNT=n        # warning: unsatisfied dependencies

Fix this by setting the symbols in `Kconfig.defconfig` instead. Not only
does this allow for proper defconfig inheritance, it also allows samples
to control the value of QEMU_ICOUNT.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-03-01 14:17:26 +00:00
Grzegorz Swiderski
fa07bd9419 boards: mps3: Fix non-secure variant
Both TRUSTED_EXECUTION_SECURE and TRUSTED_EXECUTION_NONSECURE were being
enabled, through a combination of multiple defconfigs.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-03-01 14:17:26 +00:00
Erwan Gouriou
8f6f0726dd boards: Move xenvm under xen
Doesn't looks ok to be directly under boards.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:25 +00:00
Erwan Gouriou
7b155a7031 boards: Raspberry Pi vendor fix
Use same vendor name for all R-Pi boards.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:25 +00:00
Erwan Gouriou
804697afa5 boards: Move 96b_aerocore to 96boards
Debatable, but since doc link points to www.96boards.org, it would make
more sense to me.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:25 +00:00
Dmitrii Golovanov
d2f001e320 boards: x86: acrn: move and convert to HWMv2
Move and convert to HWMv2 `acrn` and `acrn_ehl_crb` board
configurations.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:25 +00:00
Dmitrii Golovanov
ec7f7b3c30 tests: kernel: qemu_x86: adjust to the HWMv2
Adjust qemu_x86 board configuration names to HWMv2 scheme.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:25 +00:00
Dmitrii Golovanov
89dfcddc7e boards: x86: qemu_x86_tiny@768: change to board variant
Change `qemu_x86_tiny@768` board revision to `qemu_x86_tiny/ia32/768`
board variant configuration.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:25 +00:00
Dmitrii Golovanov
eb724eb6a7 boards: x86: qemu_x86: optimize default HWMv2 configurations
Remove duplicated Kconfig default options from qemu_x86 board
variants' configuration keeping only differences in regard
of the appropriate board configurations.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:25 +00:00
Dmitrii Golovanov
6f1043cde6 boards: x86: qemu_x86: move and convert to HWMv2
Move and convert qemu_x86 board configurations to HWMv2.

Several board configurations have changed their identifiers
to the HWMv2 scheme:

 - qemu_x86_nokpti --> qemu_x86/ia32/nokpti
 - qemu_x86_nommu  --> qemu_x86/ia32/nommu
 - qemu_x86_nopae  --> qemu_x86/ia32/nopae
 - qemu_x86_virt   --> qemu_x86/ia32/virt
 - qemu_x86_xip    --> qemu_x86/ia32/xip

 - qemu_x86_64_nokpti --> qemu_x86_64/ia32/nokpti

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:25 +00:00
Dmitrii Golovanov
cab924cbfb soc: x86: ia32: move and convert to HWMv2
Move and convert soc/x86/ia32 to HWMv2.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:25 +00:00
Dmitrii Golovanov
237fdff918 soc: x86: lakemont: move and convert to HWMv2
Move and convert soc/x86/lakemont to HWMv2

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:25 +00:00
Abderrahmane Jarmouni
03042b7704 boards: move 96b_carbon to 96boards folder
move 96b_carbon board to 96boards folder

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:25 +00:00
Abderrahmane Jarmouni
767b94414e boards: rename vendor seeed to seeed_studio
rename seeed folder to seeed_studio

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:25 +00:00
Abderrahmane Jarmouni
07fa3a3d79 boards: Convert olimex_lora_stm32wl_devkit to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:25 +00:00
Abderrahmane Jarmouni
ba01d3beca boards: Convert nucleo_wl55jc to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:25 +00:00
Abderrahmane Jarmouni
7ce84f4041 boards: Convert lora_e5_mini to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:25 +00:00
Abderrahmane Jarmouni
b988bae576 boards: Convert lora_e5_dev_board to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:24 +00:00
Abderrahmane Jarmouni
6fbf39c726 soc: v2: stm32: Migrate STM32WL series
Port STM32WL series to HW model V2

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:24 +00:00
Guillaume Gautier
4a41878442 soc: st: stm32g4: add missing include
Add missing soc.h include.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:24 +00:00
Guillaume Gautier
1e79ba15f6 boards: Convert weact_stm32g431_core to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:24 +00:00
Guillaume Gautier
ffdcb60185 boards: Convert nucleo_g474re to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:24 +00:00
Guillaume Gautier
d6acb08d3e boards: Convert nucleo_g431rb to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:24 +00:00
Guillaume Gautier
90e592ffd1 boards: Convert b_g474e_dpow1 to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:24 +00:00
Guillaume Gautier
eb8a7e3441 soc: st: stm32: Migrate STM32G4 series
Port STM32G4 series to HW model v2

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:24 +00:00
Jamie McCrae
ada469f237 tests: Update board names for hwmv2
Updates tests that use board names which have changed with
boards v2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:24 +00:00
Jamie McCrae
0342433187 boards: arm: npcx9m6f_evb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:24 +00:00
Jamie McCrae
c10248d964 boards: arm: npcx7m6fb_evb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:24 +00:00
Jamie McCrae
21ddc5e6a6 boards: arm: npcx4m8f_evb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:24 +00:00
Jamie McCrae
5500f3ef21 soc: npcx*: Port to HWMv2
Ports the npcx* SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:24 +00:00
Jamie McCrae
e7baf09ede soc: m48x: Port to HWMv2
Ports the m48x SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:24 +00:00
Jamie McCrae
5bae4a6480 boards: arm: numaker_pfm_m467: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:24 +00:00
Jamie McCrae
3b0bd70c8c soc: m46x: Port to HWMv2
Ports the m46x SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:23 +00:00
Guillaume Gautier
d52eab9e83 boards: Convert stm32g081b_eval to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:23 +00:00
Guillaume Gautier
6f2835cb11 boards: Convert stm32g071b_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:23 +00:00
Guillaume Gautier
ca36d331d2 boards: Convert stm32g0316_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:23 +00:00
Guillaume Gautier
662cc4e09b boards: Convert nucleo_g0b1re to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:23 +00:00
Guillaume Gautier
dd9bc29769 boards: Convert nucleo_g071rb to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:23 +00:00
Guillaume Gautier
353da23ffb boards: Convert nucleo_g070rb to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:23 +00:00
Guillaume Gautier
acc932b424 boards: Convert nucleo_g031k8 to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:23 +00:00
Guillaume Gautier
cea9b140fd boards: Convert google_twinkie_v2 to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:23 +00:00
Guillaume Gautier
52e025943a soc: st: stm32: Migrate STM32G0 series
Port STM32G0 series to HW model v2

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:23 +00:00
Torsten Rasmussen
1c7347686a ci: update check_compliance to not create duplicate lines in Kconfig
check_compliance generates Kconfig files for sourcing board and soc
Kconfig tree in order to run compliance.

Each board and soc generated a source entry, however several socs are
using same soc dir and thus multiple identical source lines where
created.

Use a set() to ensure unique folders before generating Kconfig files.
This ensures that each Kconfig file is only sourced once.
This improves both compliance as fewer lines needs to be written, as
well as improves Kconfiglib as fewer Kconfig files must be sourced, as
redundant sourcing is not avoided.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:23 +00:00
Dmitrii Golovanov
9debd98799 hwmv2: boards: up_squared_pro_700: Add missed intel_adl changes
Align with changes at `boards/x86/intel_adl` done by #62694
and #67452 while the `up_squared_pro_700` board was in migration
to HWMv2 at `collab-hwm' branch.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:23 +00:00
Jamie McCrae
adab07c42f boards: Convert msp_exp432p401r_launchxl to HWM v2
Port the board to HWMv2.

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:23 +00:00
Jamie McCrae
642aacdcdf soc: ti_simplelink: Add missing SoC
Adds a missing SoC that was previously converted

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:23 +00:00
Jamie McCrae
48637066d3 boards: Fix file paths in documentation
Fixes file paths which have not been updated since converting
boards to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:23 +00:00
Jamie McCrae
e983bc2a23 samples/tests: Fix mps3 board name
Fixes an issue with missed board name updates

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:22 +00:00
Abderrahmane Jarmouni
61e0f32716 boards: Convert stm32f3_seco_d23 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:22 +00:00
Abderrahmane Jarmouni
a1688ff641 boards: Convert stm32f3_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:22 +00:00
Abderrahmane Jarmouni
35fb228599 boards: Convert stm32373c_eval to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:22 +00:00
Abderrahmane Jarmouni
10e5d1122b boards: Convert nucleo_f334r8 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:22 +00:00
Abderrahmane Jarmouni
c319cb19f0 boards: Convert nucleo_f303re to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:22 +00:00
Abderrahmane Jarmouni
11725ccac1 boards: Convert nucleo_f303k8 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:22 +00:00
Abderrahmane Jarmouni
400f7f6a4f boards: Convert nucleo_f302r8 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:22 +00:00
Abderrahmane Jarmouni
8d84861390 soc: v2: stm32: Migrate STM32F3 series
Port STM32F3 series to HW model V2

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:22 +00:00
Jamie McCrae
85b9eee7e8 boards: arm: kv260_r5: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:22 +00:00
Jamie McCrae
dafbd638e4 boards: arm: mercury_xu: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:22 +00:00
Jamie McCrae
3ecd12f415 boards: arm: qemu_cortex_r5: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:22 +00:00
Jamie McCrae
5db2390e9d soc: xilinx_zyncmp: Port to HWMv2
Ports the xilinx_zynqmp SoC configuration to hardware model
version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:22 +00:00
Jamie McCrae
9ba8195cdc boards: arm: qemu_cortex_a9: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:22 +00:00
Jamie McCrae
8e94b85361 boards: arm: zybo: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:21 +00:00
Jamie McCrae
c970127fc2 soc: xilinx_zynq7000: Port to HWMv2
Ports the xilinx_zynq7000 SoC configuration to hardware model
version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:21 +00:00
Jamie McCrae
394c75373c boards: arm: ast1030_evb: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:21 +00:00
Jamie McCrae
f2a1cc8714 soc: ast10x0: Port to HWMv2
Ports the ast10x0 SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:21 +00:00
Jamie McCrae
28f3f25945 boards: arm: cc3235sf_launchxl: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:21 +00:00
Jamie McCrae
c3e480f740 boards: arm: cc3220sf_launchxl: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:21 +00:00
Jamie McCrae
fd5847123f boards: arm: beagleconnect_freedom: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:21 +00:00
Jamie McCrae
76ba9a0587 boards: arm: cc1352p1_launchxl: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:21 +00:00
Jamie McCrae
719baa8850 boards: arm: cc1352r1_launchxl: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:21 +00:00
Jamie McCrae
5060a61ae1 boards: arm: cc1352r_sensortag: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:21 +00:00
Jamie McCrae
99584be1c5 boards: arm: cc26x2r1_launchxl: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:21 +00:00
Jamie McCrae
2dc8933942 soc: ti_simplelink: Port to HWMv2
Ports the ti_simplelink SoC configurations to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:21 +00:00
Yves Vandervennet
a5b004663b scripts/utils/board_v1_to_v2.py: couple of fixes
- the variable 'copyright' can be accessed without
   being initialized
 - the yaml package (ruamel) has been changed, the API
   yaml.safe_load() is deprecated. See error message
   with the original code below.

$ python3 ./scripts/utils/board_v1_to_v2.py -b frdm_k64f -g blob -v blob -s k6x

New board already exists, updating board with additional SoC
Moving files to the new board folder...
Creating or updating board.yaml...
Traceback (most recent call last):
File "/home/yves/sw/zephyr/zephyrproject/zephyr/./scripts/utils/board_v1_to_v2.py", line 206, in
board_v1_to_v2(
File "/home/yves/sw/zephyr/zephyrproject/zephyr/./scripts/utils/board_v1_to_v2.py", line 78, in board_v1_to_v2
board_settings = ruamel.yaml.safe_load(f) # pylint: disable=assignment-from-no-return
File "/home/yves/.local/lib/python3.10/site-packages/ruamel/yaml/main.py", line 1105, in safe_load
error_deprecation('safe_load', 'load', arg="typ='safe', pure=True")
File "/home/yves/.local/lib/python3.10/site-packages/ruamel/yaml/main.py", line 1039, in error_deprecation
raise AttributeError(s, name=None)
AttributeError:

"safe_load()" has been removed, use
yaml = YAML(typ='safe', pure=True)

yaml.load(...)

instead of file "/home/yves/sw/zephyr/zephyrproject/zephyr/./scripts/utils/board_v1_to_v2.py", line 78

Signed-off-by: yves <yves.vandervennet@nxp.com>
2024-03-01 14:17:21 +00:00
Abderrahmane Jarmouni
77c2c333e5 boards: move 96b_stm32_sensor_mez to 96boards
move 96b_stm32_sensor_mez from ST to 96boards' folder

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:21 +00:00
Abderrahmane Jarmouni
c14ff98650 boards: stm32f411e_disco: delete obsolete file
delete revision.cmake & fix default revision

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:21 +00:00
Abderrahmane Jarmouni
bcdc268ccf boards: Convert stm32mp157c_dk2 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:20 +00:00
Abderrahmane Jarmouni
0c8ba92e1f boards: Convert 96b_avenger96 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:20 +00:00
Abderrahmane Jarmouni
b54fe33077 soc: v2: stm32: Migrate STM32MP1 series
Port STM32MP1 series to HW model V2

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:20 +00:00
Guillaume Gautier
2ba3639b2a boards: Convert nucleo_c031c6 to HWM v2
Port the board to HWMv2.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:20 +00:00
Guillaume Gautier
dbc5ed79f5 soc: st: stm32: Migrate STM32C0 series
Port STM32C0 series to HW model v2

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2024-03-01 14:17:20 +00:00
Abderrahmane Jarmouni
ce6d493aa3 boards: Convert stm32l1_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:20 +00:00
Abderrahmane Jarmouni
a28086a9ca boards: Convert nucleo_l152re to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:20 +00:00
Abderrahmane Jarmouni
1b2a511d06 boards: Convert 96b_wistrio to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:20 +00:00
Abderrahmane Jarmouni
ce281f09ab soc: v2: stm32: Migrate STM32L1 series
Port STM32L1 series to HW model V2

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:20 +00:00
Erwan Gouriou
cdb5364fd7 boards: Convert stm32f769i_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:20 +00:00
Erwan Gouriou
768f173dcb boards: Convert stm32f7508_dk to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:20 +00:00
Erwan Gouriou
21bbbbd9cb boards: Convert stm32f746g_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:20 +00:00
Erwan Gouriou
bab4265693 boards: Convert stm32f723e_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:20 +00:00
Erwan Gouriou
58f8fe82ba boards: Convert nucleo_f767zi to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:20 +00:00
Erwan Gouriou
37e9084070 boards: Convert nucleo_f756zg to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:20 +00:00
Erwan Gouriou
d467e7053a boards: Convert nucleo_f746zg to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:19 +00:00
Erwan Gouriou
5f2808d7cc boards: Convert nucleo_f722ze to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:19 +00:00
Erwan Gouriou
bbb73e7550 soc: st: Migrate stm32f7 series to new hw model
Migrate STM2F7 series to new HW model.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:19 +00:00
Abderrahmane Jarmouni
e9094afc4d soc: st: stm32: stm32f4: change SOC_STM32F405XG to SOC_STM32F405XX
Change SOC_STM32F405XG flag to SOC_STM32F405XX since it refers to SoC
stm32f405xx in kconfig.soc

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:19 +00:00
Abderrahmane Jarmouni
a1712cdd53 boards: Convert stm32f4_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:19 +00:00
Abderrahmane Jarmouni
5be404b365 boards: Convert stm32f469i_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:19 +00:00
Abderrahmane Jarmouni
baaa697ab2 boards: Convert stm32f429i_disc1 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:19 +00:00
Abderrahmane Jarmouni
69ecab3c90 boards: Convert stm32f412g_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:19 +00:00
Abderrahmane Jarmouni
2a572e3fb0 boards: Convert stm32f411e_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:19 +00:00
Abderrahmane Jarmouni
ecfbf42757 boards: Convert stm32f401_mini to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:19 +00:00
Abderrahmane Jarmouni
e0191d03bb boards: Convert steval_fcu001v1 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:19 +00:00
Abderrahmane Jarmouni
4454648976 boards: Convert segger_trb_stm32f407 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:19 +00:00
Abderrahmane Jarmouni
f0ad6ee6b8 boards: Convert olimex_stm32_p405 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:19 +00:00
Abderrahmane Jarmouni
1f5e228ec8 boards: Convert olimex_stm32_h407 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:19 +00:00
Abderrahmane Jarmouni
834bdb615e boards: Convert olimex_stm32_h405 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:18 +00:00
Abderrahmane Jarmouni
8f27fa8de2 boards: Convert olimex_stm32_e407 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:18 +00:00
Abderrahmane Jarmouni
f8633a9038 boards: Convert nucleo_f446ze to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:18 +00:00
Abderrahmane Jarmouni
07e0bd2c07 boards: Convert nucleo_f446re to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:18 +00:00
Abderrahmane Jarmouni
24d7f625dc boards: Convert nucleo_f429zi to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:18 +00:00
Abderrahmane Jarmouni
157a8cde53 boards: Convert nucleo_f413zh to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:18 +00:00
Abderrahmane Jarmouni
4ec99c31b0 boards: Convert nucleo_f412zg to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:18 +00:00
Abderrahmane Jarmouni
a21546140a boards: Convert nucleo_f411re to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:18 +00:00
Abderrahmane Jarmouni
43f01ab6de boards: Convert nucleo_f410rb to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:18 +00:00
Abderrahmane Jarmouni
60c16bcb8b boards: Convert nucleo_f401re to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:18 +00:00
Abderrahmane Jarmouni
2db228d730 boards: Convert mikroe_mini_m4_for_stm32 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:18 +00:00
Abderrahmane Jarmouni
73fc26225c boards: Convert mikroe_clicker_2 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:18 +00:00
Abderrahmane Jarmouni
6b62d90114 boards: Convert google_dragonclaw to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:18 +00:00
Abderrahmane Jarmouni
fa845af309 boards: Convert blackpill_f411ce to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Abderrahmane Jarmouni
5c8c3c3be0 boards: Convert blackpill_f401ce to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Abderrahmane Jarmouni
3c02db1290 boards: Convert blackpill_f401cc to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Abderrahmane Jarmouni
7eeb723cb7 boards: Convert black_f407zg_pro to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Abderrahmane Jarmouni
4f9461d068 boards: Convert black_f407ve to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Abderrahmane Jarmouni
a821de8532 boards: Convert az3166_iotdevkit to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Abderrahmane Jarmouni
ba580c7236 boards: Convert adi_sdp_k1 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Abderrahmane Jarmouni
eb272ddf19 boards: Convert adafruit_feather_stm32f405 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Abderrahmane Jarmouni
58ed121c3a boards: Convert 96b_stm32_sensor_mez to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Abderrahmane Jarmouni
b0d70959d3 boards: Convert 96b_neonkey to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Abderrahmane Jarmouni
b1088baadc boards: Convert 96b_carbon to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Abderrahmane Jarmouni
18d867b0a9 boards: Convert 96b_argonkey to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Abderrahmane Jarmouni
ee6ede7119 boards: Convert 96b_aerocore2 to HWM v2
Port the board to HWMv2.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Abderrahmane Jarmouni
b48e70ead9 soc: v2: stm32: Migrate STM32F4 series
Port STM32F4 series to HW model V2

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-03-01 14:17:17 +00:00
Torsten Rasmussen
14d2b955da cmake: convert path to CMake style before writing Kconfig files
Fixes: #68667

Kconfig is not fond of mixed path separators, therefore ensure CMake
style path is used in generated Kconfig files. CMake path style uses
`/`, and thus ensures correct behavior in Kconfig.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:17 +00:00
Jamie McCrae
9c4ac6a202 boards: posix: bsim: Update paths
Updates paths to account for legacy in them to prevent build
failures

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:16 +00:00
Jamie McCrae
14b57f56d7 tests: drivers: gpio: gpio_ite_it8xxx2_v2: Temp fix
Resolves a test failure by changing the paths as riscv boards
cannot currently be ported

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:16 +00:00
Erwan Gouriou
f3b173be18 scripts: board_v1_to_v2: Update following move to boards_legacy
Migration script requires update now that boards to be migrated
seat under boards_legacy and move directly under boards/

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:16 +00:00
Torsten Rasmussen
05b50f6691 cmake: CMake soc dir variable improvements for HWMv2
Create SOC_<soc>_DIR in addition to SOC_<SOC>_DIR variable.
Clear intermediate variables constructed by cmake_parse_arguments.

Set SOC_V2_DIR to point to the SoC dir of the actual SoC in use.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:16 +00:00
Torsten Rasmussen
a188e01a12 hwmv2: move all ported boards and socs to their final location
To un-block continuing of soc and board porting then move all socs and
boards and support building of updated docs then move all ported socs
and boards to their final location.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:16 +00:00
Jamie McCrae
22c53e97b5 hwmv2: move all non-ported legacy boards and socs to legacy folders
To un-block continuing of soc and board porting then move all socs and
boards which have not yet been ported to boards_legacy / soc_legacy
folders.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:16 +00:00
Torsten Rasmussen
53f3b181b0 soc: ti_k3: Port to HWMv2
Ports the ti_k3 SoC configuration to hardware model version 2

This commit is a followup to commit
5207600e16

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:15 +00:00
Torsten Rasmussen
9f19a2075a soc: rk3568: Port to HWMv2
Ports the rk3568 SoC configuration to hardware model version 2

This commit is a followup to commit
e5be4e435c

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:15 +00:00
Torsten Rasmussen
b8928b1628 soc: rk3399: Port to HWMv2
Ports the rk3399 SoC configuration to hardware model version 2

This commit is a followup to commit
cc51974523

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:15 +00:00
Torsten Rasmussen
cda3a74868 boards: arm64: qemu_kvm_arm64: Convert to v2
Converts the board to hwmv2

This commit is a followup to commit
1a59434162

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:15 +00:00
Dmitrii Golovanov
70d704bd20 soc: x86: atom: move and convert to HWMv2
Move and convert soc/x86/atom to HWMv2

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:15 +00:00
Dmitrii Golovanov
4789e1068e boards: x86: intel_rpl: move and convert raptor_lake boards to HWMv2
Move and convert intel_rpl_p_crb and intel_rpl_s_crb boards to HWMv2.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:15 +00:00
Dmitrii Golovanov
384307e3dc soc: x86: raptor_lake: move and convert to HWMv2
Move and convert soc/x86/raptor_lake to HWMv2

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:15 +00:00
Dmitrii Golovanov
ed025df674 boards: x86: intel_ehl: move and convert elkhart_lake boards to HWMv2
Move and convert `intel_ehl_crb` and `intel_ehl_crb_sbl` board
configurations to HWMv2.

`intel_ehl_crb_sbl` is changed to a variant `intel_ehl_crb/elkhart_lake/sbl`

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:15 +00:00
Dmitrii Golovanov
994b6e1731 soc: x86: elkhart_lake: move and convert to HWMv2
Move and convert soc/x86/elkhart_lake ot HWMv2

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:15 +00:00
Dmitrii Golovanov
73b30a04cf boards: x86: up_squared_pro_7000: move and convert to HWMv2
Move and convert boards/x86/up_squared_pro_7000 to HWMv2

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:14 +00:00
Dmitrii Golovanov
83b133c207 boards: x86: intel_adl: move and convert alder_lake boards to HWMv2
Move and convert intel_adl_crb and intel_adl_rvp boards to HWMv2.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:14 +00:00
Dmitrii Golovanov
847a12f1e4 soc: alder_lake: move and convert to HWMv2
Move and convert soc/x86/alder_lake to HWMv2

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:14 +00:00
Dmitrii Golovanov
67f4c8d2a1 samples: up_squared: adjust gpio_counter to HWMv2
Adjust samples/boards/up_squared/gpio_counter to HWMv2 changes
of the up_squared board.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:14 +00:00
Dmitrii Golovanov
5326b5bfc0 boards: x86: up_squared: move and convert to HWMv2
Move and convert boards/x86/up_squared to HWMv2

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:14 +00:00
Dmitrii Golovanov
cfd5e691b4 soc: apollo_lake: move and convert to HWMv2
Move and convert soc/x86/apollo_lake to HWMv2.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2024-03-01 14:17:14 +00:00
Torsten Rasmussen
ac9c235741 boards: xtensa: qemu_xtensa: Convert to v2
Converts the board to hwmv2.

This commit is a followup to commit
86d612086e

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:14 +00:00
Torsten Rasmussen
f198c3a761 ci: update to osource for soc/Kconfig.defconfig files
This commit aligns check_compliance to use osource for SoC
Kconfig.defconfig, as that is also the rule for the Kconfig tree in
Zephyr itself.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:14 +00:00
Torsten Rasmussen
e438e6cad4 ci: add SOC_SERIES_ as false positive in check_compliance.py
CONFIG_SOC_SERIES_ is as regex in scripts/utils/board_v1_to_v2.py.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:14 +00:00
Erwan Gouriou
95e34da7c1 soc: v2: Convert st_stm32 to st/stm32
Make stm32 soc path more path more consistent using an actual vendor (st)
directory.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:14 +00:00
Jamie McCrae
313717df76 soc: mps3: Fix missing family
Fixes an issue with a missing family in the mp3 soc

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:14 +00:00
Jamie McCrae
392c3969ed boards: arm: am62x_m4: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:14 +00:00
Jamie McCrae
8f245d764d tests: Update board names for hwmv2
Updates tests that use board names which have changed with
boards v2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:14 +00:00
Jamie McCrae
8f71bb7b4f boards: arm64: khadas_edgev: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:14 +00:00
Jamie McCrae
e27d23aad0 soc: rk3399: Port to HWMv2
Ports the rk3399 SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:14 +00:00
Jamie McCrae
80823b860e boards: arm64: roc_rk3568_pc: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:14 +00:00
Jamie McCrae
72e4483dec soc: rk3568: Port to HWMv2
Ports the rk3568 SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Jamie McCrae
bed94669e3 boards: arm64: phycore_am62x_a53: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Jamie McCrae
c01af5a7b8 soc: ti_k3: Port to HWMv2
Ports the ti_k3 SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Jamie McCrae
1e563b4ca3 boards: arm64: xenvm: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Jamie McCrae
76e484adae soc: xenvm: Port to HWMv2
Ports the xenvm SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Jamie McCrae
34412f7fe2 boards: arm64: rpi_4b: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Jamie McCrae
9be50e2ca9 soc: bcm2711: Port to HWMv2
Ports the bcm2711 SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Jamie McCrae
bbbed12c2f boards: arm64: qemu_kvm_arm64: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Jamie McCrae
4f5ec7ff8f soc: qemu_virt_arm64: Port to HWMv2
Ports the qemu_virt_arm64 SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Jamie McCrae
d8d1b9f200 boards: arm64: qemu_cortex_a53: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Jamie McCrae
30bd34b31e soc: qemu_cortex_a53: Port to HWMv2
Ports the qemu_cortex_a53 SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Jamie McCrae
c20d0dcbb6 boards: arm64: fvp_baser_aemv8r: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Jamie McCrae
02ed6af463 boards: arm64: fvp_base_revc_2xaemv8a: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Jamie McCrae
1b175003a4 soc: fvp_aemv8*: Port to HWMv2
Ports the fvp_aemv8* SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:13 +00:00
Erwan Gouriou
de231b911d boards: v2: Clean up obsolete comments
Following migration, some comments don't apply anymore.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:13 +00:00
Erwan Gouriou
aa9597f6d9 boards: Convert waveshare_open103z to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:12 +00:00
Erwan Gouriou
9644828c81 boards: Convert stm32vl_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:12 +00:00
Erwan Gouriou
86ab2bd430 boards: Convert stm32_min_dev to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:12 +00:00
Erwan Gouriou
d88d3ddcc4 boards: Convert stm32f103_mini to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:12 +00:00
Erwan Gouriou
0ccc0204e1 boards: Convert stm3210c_eval to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:12 +00:00
Erwan Gouriou
dd9972d782 boards: Convert olimex_stm32_h103 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:12 +00:00
Erwan Gouriou
a2c2e1406d boards: Convert olimexino_stm32 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:12 +00:00
Erwan Gouriou
2d9c62e118 boards: Convert nucleo_f103rb to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:12 +00:00
Erwan Gouriou
e8ba99dc59 soc: v2: stm32: Migrate STM32F1 series
Port STM32F1 series to HW model V2

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:12 +00:00
Jamie McCrae
9a93916604 tests: Update board names for hwmv2
Updates tests that use board names which have changed with
boards v2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:12 +00:00
Jamie McCrae
9c4d94844d boards: arm: bcm958401m2: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:12 +00:00
Jamie McCrae
feaf4ffba1 boards: arm: bcm958402m2: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:12 +00:00
Jamie McCrae
87f0827121 soc: bcm_vk: Port to HWMv2
Ports the bcm_vk SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:12 +00:00
Jamie McCrae
4526be24a5 boards: arm: quick_feather: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:12 +00:00
Jamie McCrae
cd921d2b97 boards: arm: qomu: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:11 +00:00
Jamie McCrae
b3c04051fc soc: quicklogic_eos_s3: Port to HWMv2
Ports the quicklogic_eos_s3 SoC configuration to hardware model
version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
a73a9e7533 boards: v2: Clean up obsolete comments
Following migration, some comments don't apply anymore.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
8d87bcc167 boards: Convert stm32f0_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
1933585785 boards: Convert stm32f072_eval to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
6f9fe5429d boards: Convert stm32f072b_disco to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
9dc78e4025 boards: Convert stm32f030_demo to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
35113e8923 boards: Convert nucleo_f091rc to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
b276aee9a4 boards: Convert nucleo_f070rb to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
795f8d611b boards: Convert nucleo_f042k6 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
2d82646443 boards: Convert nucleo_f031k6 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
959786f12d boards: Convert nucleo_f030r8 to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
81670db2e9 boards: Convert legend to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
8980430aad boards: Convert google_kukui to HWM v2
Port the board to HWMv2.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
ac020f66e0 dts: stm32f0: fix few warnings
Fixes following warnings:
- zephyr.dts:419.10-426.5: Warning (simple_bus_reg): /soc/clocks:
missing or empty reg/ranges property
- zephyr.dts:477.27-484.5: Warning (simple_bus_reg): /soc/serial@40011C00:
simple-bus unit address format error, expected "40011c00"

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:11 +00:00
Erwan Gouriou
5140e4551a boards: v2: doc: Add vendors
Minimum modification to make boards doc visible in v2 model.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:10 +00:00
Erwan Gouriou
77d640e0c9 soc: v2: stm32: Migrate STM32F0 series
Port STM32F0 series to HW model V2

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:10 +00:00
Erwan Gouriou
0131e1c159 soc: v2: Add st_stm32 structure and common folder
Add minimum and common structure to start using STM32 on HW model V2.
Duplicated from soc/arm/st_stm32/common with minor modifications:
- common/Kconfig.soc moved to Kconfig as Kconfig.soc should now
be restricted to _SOC_FOO) related symbols
- "depends on LOG_BACKEND_SWO" LOG_BACKEND_SWO_REF_FREQ_HZ instead of if ..
- Symbols depending on series are not present, they'll have to be
introduced when converting respective series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:10 +00:00
Jamie McCrae
36b63787a7 boards: v2: Add documentation index for converted boards
Adds documentation pages for rp2040-converted boards

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:10 +00:00
Jamie McCrae
ae02fc5047 boards: sparc: qemu_leon3: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:10 +00:00
Jamie McCrae
f38f7bb223 boards: sparc: gr716a: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:10 +00:00
Jamie McCrae
d3cca3580e soc: gr716a: Port to HWMv2
Ports the gr716a SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:10 +00:00
Jamie McCrae
6a8a0c1647 boards: sparc: generic_leon3: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:10 +00:00
Jamie McCrae
faf22185ce soc: leon3: Port to HWMv2
Ports the leon3 SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:10 +00:00
Jamie McCrae
e94762ecdc tests: Update board names for hwmv2
Updates tests that use board names which have changed with boards v2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:10 +00:00
Jamie McCrae
9afcc27e05 boards: xtensa: qemu_xtensa: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:10 +00:00
Jamie McCrae
3e4a17018f soc: dc233c: Port to HWMv2
Ports the dc233c SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:10 +00:00
Jamie McCrae
9188fdcd78 boards: xtensa: xt-sim: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:10 +00:00
Jamie McCrae
fcaa41cb5d soc: xtensa_sample_controller: Port to HWMv2
Ports the xtensa_sample_controller SoC configuration to hardware
model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:10 +00:00
Erwan Gouriou
dbc413f7f7 scripts: board_v1_to_v2: Fix CONFIG_SOC_SERIES_ exclusion
Testing r"(?!SERIES_).*$" was not correct as we need to consider
lines not starting by SERIES.
Fix this and make the condition globally more simple.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:10 +00:00
Torsten Rasmussen
6be3d4bc80 kconfig: remove Kconfig BOARD_RPI_PICO_W safe guard.
Boards are defining two Kconfigs, `BOARD_<board_name>` and
`BOARD_<board_name>_<identifier>`.

For the raspberry pi pico, this is then BOARD_RPI_PICO and
BOARD_RPI_PICO_RP2040 / BOARD_RPI_PICO_RP2040_W.

Thus there is no BOARD_RPI_PICO_W.
As all occurences with BOARD_RPI_PICO_W, is done as:
BOARD_RPI_PICO || BOARD_RPI_PICO_W, then simply remove BOARD_RPI_PICO_W.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:10 +00:00
Jamie McCrae
f4442fa698 boards: v2: Add documentation index for converted boards
Adds documentation pages for nios2-converted boards

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:09 +00:00
Jamie McCrae
ec5fbd67f7 boards: nios2: qemu_nios2: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:09 +00:00
Jamie McCrae
d3ef220460 soc: nios2-qemu: Port to HWMv2
Ports the nios2-qemu SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:09 +00:00
Jamie McCrae
a223f284b5 boards: nios2: altera_max10: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:09 +00:00
Jamie McCrae
c381edcb73 soc: nios2f-zephyr: Port to HWMv2
Ports the nios2f-zephyr SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:09 +00:00
Jamie McCrae
97401c7d2a boards: mips: qemu_malta: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:09 +00:00
Jamie McCrae
e7a3243a24 soc: qemu_malta: Port to HWMv2
Ports the qemu-malta SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:09 +00:00
Jamie McCrae
bec82c690d boards: v2: Add documentation index for converted boards
Adds documentation pages for rp2040-converted boards

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:09 +00:00
Jamie McCrae
94f6f9b636 boards: arm: w5500_evb_pico: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:09 +00:00
Jamie McCrae
209235ab6e boards: arm: sparkfun_pro_micro_rp2040: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:09 +00:00
Jamie McCrae
e5b1885907 boards: arm: adafruit_qt_py_rp2040: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:09 +00:00
Jamie McCrae
4c750818f9 boards: arm: adafruit_kb2040: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:09 +00:00
Jamie McCrae
8d3896caa4 boards: arm: rpi_pico: Convert to v2
Converts the board to hwmv2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:09 +00:00
Jamie McCrae
42cff42c42 soc: rpi_pico: Port to HWMv2
Ports the rpi_pico SoC configuration to hardware model version 2

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2024-03-01 14:17:08 +00:00
Torsten Rasmussen
c2df4ca9cb scripts: improve yaml schema and board.yml validation for revisions
Make 'default' and 'revisions' fields optional for custom revisions.
When using custom revision format, then board author must create a
revision.cmake file for revision handling, in which case revisions
don't need to be specified in the board.yml file.

Therefore make 'default' and 'revisions' fields optional in the schema
and implement custom yaml validation which can validate that 'default'
and 'revisions' are specified for all other revision formats.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:08 +00:00
Torsten Rasmussen
3970f90f71 cmake: clear BOARD_CACHE when invalid board identifier is given
Clear BOARD_CACHE when no or an invalid board identifier is provided
on first CMake invocation.

This allows users to re-run CMake and provide a valid board identifier
as well as avoiding `BOARD` to be replaced with an invalid BOARD_CACHED
value.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:08 +00:00
Torsten Rasmussen
3a70ee9ccd cmake: improve board revision handling
In old hw model, board revisions was handled by creation of a
revisions.cmake file. In the new hw model, board revisions are defined
as integral part of board.yml, and revision.cmake is only needed and
used for custom revision format.

Users familiar with revision.cmake in old hw model may not be aware of
this difference, therefore provide warnings if developers create a
revision.cmake that is ignored by the build system.

Also fail a build if users specify a board revision for a board which
doesn't support revision. Such scenario can easily occur in the case
where a board developer may be creating a revisions.cmake file and
then try to build for a revision specified in that file.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:08 +00:00
Erwan Gouriou
3cda715fae scripts: board_v1_to_v2: Don't add select CONFIG_SOC_SERIES_FOO
SOC_SERIES_FOO selection is done at soc/ level it should
not be added as part of board description

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:08 +00:00
Erwan Gouriou
dc56a543f3 scripts: board_v1_to_v2: Add License + copyright
When creating file Kconfig.<board>, get the copyright from
old Kconfig.board file and use it in the new file.
Add the License as well.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2024-03-01 14:17:08 +00:00
Torsten Rasmussen
87147f88c4 cmake: prefer cache BOARD_IDENTIFIER over extracting from BOARD
The BOARD_IDENTIFIER is extracted from the BOARD argument provided by
the user.

Thereafter the BOARD_IDENTIFIER is compared to the list of valid board
identifiers returned by list_boards.py, and expanded with optional
fields as required.

Thereafter the expanded and full BOARD_IDENTIFIER is place as internal
variable in the CMake cache.

This means subsequent CMake invocations should use the expanded
BOARD_IDENTIFIER from the CMake cache instead of extracting it from the
BOARD variable.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:08 +00:00
Torsten Rasmussen
65f5dc5b8c cmake: fail when board identifier is applied in legacy hw model
Board is looked up without identifier string, which means a legacy
board may actually be found but later fails when board identifier is
included.

Thus test for HWMv1 and fail CMake is board identifier is provided for
board using HWMv1.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:08 +00:00
Torsten Rasmussen
7db2b6efd8 cmake: cache BOARD_IDENTIFIER to preserve it between CMake invocations
A CMake rerun would not extract or determine the BOARD_IDENTIFIER
correctly because `list_boards.py` is only invoked for first CMake
invocation.

Therefore cache the BOARD_IDENTIFIER so that it's preserved between
CMake re-runs.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:08 +00:00
Torsten Rasmussen
85dddac5a2 scripts: using extend in list_boards for variant list
Using extend instead of append to correctly extend the list of valid
board identifiers.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:08 +00:00
Gerard Marull-Paretas
6ae5c4e7fd scripts: utils: add board v1->v2 conversion utility
Assists on converting boards from hwmv1 to hwmv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:08 +00:00
Gerard Marull-Paretas
ef834a12d0 maintainers: update Renesas RZT2M path
SoC has been converted to v2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:08 +00:00
Gerard Marull-Paretas
3ab7830625 boards: renesas: add documentation entry
Add a new entry for Renesas boards.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:08 +00:00
Gerard Marull-Paretas
a0c2ca0491 boards: arm: add documentation entry
Add a new entry for ARM Holdings plc boards.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:08 +00:00
Gerard Marull-Paretas
27ff3654b7 boards: gigadevice: add documentation entry
Add an entry for Gigadevice boards.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:08 +00:00
Gerard Marull-Paretas
6e02f43c0a maintainers: update GD32 paths
Some SoC/board files have been moved, use new paths.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:08 +00:00
Gerard Marull-Paretas
1bfcf1d974 boards: gd32l233r_eval: convert to HWMv2
Convert the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:08 +00:00
Gerard Marull-Paretas
6e621ee43f boards: gd32f470i_eval: convert to HWMv2
Convert the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:07 +00:00
Gerard Marull-Paretas
219b149768 boards: gd32f450z_eval: convert to HWMv2
Convert the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:07 +00:00
Gerard Marull-Paretas
91c52b0d39 boards: gd32f450v_start: convert to HWMv2
Convert the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:07 +00:00
Gerard Marull-Paretas
f0e0a973f6 boards: gd32f407v_start: convert to HWMv2
Convert the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:07 +00:00
Gerard Marull-Paretas
6f592b64c9 boards: gd32f403z_eval: convert to HWMv2
Convert the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:07 +00:00
Gerard Marull-Paretas
4bcb4b2ac8 boards: gd32f350r_eval: convert to HWMv2
Convert the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:07 +00:00
Gerard Marull-Paretas
fdc7ed6eb0 boards: gd32e507z_eval: convert to HWMv2
Convert the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:07 +00:00
Gerard Marull-Paretas
770376250d boards: gd32e507v_start: convert to HWMv2
Convert the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:07 +00:00
Gerard Marull-Paretas
a6d8b92e86 boards: gd32e103v_eval: convert to HWMv2
Convert the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:07 +00:00
Gerard Marull-Paretas
a5f8e5daa1 boards: gd32a503v_eval: convert to HWMv2
Convert the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:07 +00:00
Gerard Marull-Paretas
5ee799cc5f boards: gd32f450i_eval: convert to HWMv2
Port the board to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:07 +00:00
Gerard Marull-Paretas
8aa8ce4ac8 soc: gigadevice: port to HWMv2
Port all the Gigadevice SoCs to HWMv2.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-03-01 14:17:07 +00:00
Torsten Rasmussen
4e203c14c7 cmake: enhanced board entry file handling
With a single board now covering what used to be several boards, and
with the ability to omit SoC when building for a single SoC board, then
<board>_defconfig and <board>.dts lookup is improved.

A single SoC board may prefer to keep its defconfig entry point as
<board>_defconfig instead of <board>_<soc>_defconfig.

Also, a multi-SoC board / multi-core SoC board, which used to be
implemented as n-boards may wish to have common _defconfig settings in
a common <board>_defconfig file, and the SoC / cpuset specifics in
<board>_<soc>_defconfig / <board>_<soc>_<core>_defconfig.

Such defconfig support allows also to place build variant specifics in
its own <board>_<soc>_<variant>_defconfig file.

This commit allows multiple _defconfigs for a board and its identifiers.

Similar is implemented for a board's dts file.
If a <board>_<soc>_<core>.dts file is not found, the build system will
instead use <board>_<soc>.dts, and finally fallback to <board>.dts.

This allows a board to have a shared dts file for all board identifiers
which are identical while still support specific dts where required.

A dts file is a devicetree starting point and thus two dts files cannot
be used in together. For such cases, an ordinary board overlay file must
be used.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:07 +00:00
Torsten Rasmussen
312265ee04 scripts: make SoC field mandatory in board.yml
With the support of omitting SoC field for single SoC boards then there
is no reason to have this field optional.

Users are still able to use a short board name when building.

But always requiring SoC field in the board.yml paves the way for future
enhancements to the new hw model without having to do a second update
to a lot of board.yml files.

Such enhancement can be:
- Create Kconfig SoC selection and thereby remove need for Kconfig
  boilerplate code, and also thereby remove risk of naming
  inconsistencies.
- Extend board documentation, so that web doc provides option to filter
  all boards with a given SoC.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:07 +00:00
Torsten Rasmussen
c12ae3bcbc boards: update Renesas rzt2m board.yml to contain SoC information
Add Renesas_rzt2m SoC information to the board.yml for the Renesas rzt2m
starter kit.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:07 +00:00
Torsten Rasmussen
c5321c1dbe cmake: make SoC optional for boards containing a single SoC
Allowing users to omit the SoC when building for a board containing a
single SoC make less typing required when building.

Full identifier is still supported.
This means that if board 'plank' contains a single SoC 'foo', then the
following input are equivalent:
-DBOARD=plank
-DBOARD=plank/foo

When building for variants on single SoC boards, a `//` can be used to
indicate SoC field and build system will insert the SoC if the board
has just a single SoC, as example build the 'bar' variant for 'plank'
board can be specified as:
-DBOARD=plank//bar
-DBOARD=plank/foo/bar

The enhancement allows all boards to specify the SoC on the board
without forcing users to type the SoC as part of BOARD input.
As example, -DBOARD=bbc_microbit, is allowed in addition to
-DBOARD=bbc_microbit/nrf52822.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
bcc06c60ae scripts: support SoC list output for boards
Extending board output with SoC information.
This provides the possibility to print all SoCs present for boards in
new hw model.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
db9e46010c twister: update testcase.yaml and sample.yaml to mps3/an547 identifier
This commit updates testcase.yaml and sample.yaml to use mps3/an547
identifier which replaces former mps3_an547 board name.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
a988adee7d boards: update arm mps3 an547 board to HWMv2 scheme
This commit updates arm mps3 an547 board to use HWMv2.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
7dc2c9db0c soc: use HWMv2 for arm mps3 SoC
This commit move the arm mps3 SoC to soc/v2 and adopt HWMv2.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
c506675b7c boards: update Renesas Starter Kit+ for RZ/T2M board to HWMv2 scheme
This commit updates Renesas Starter Kit+ for RZ/T2M board to use HWMv2.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
3abb792073 soc: use HWMv2 for renesas_rzt2m SoC
This commit move the renesas_rzt2m SoC to soc/v2 and adopt HWMv2.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
4f52bc646e cmake: support hw model v2 in arch/Kconfig tree
This commit introduces support for Zephyr hw model v2 in the arch
Kconfig tree.

The hw model v2 requires Kconfig trees to be self-contained, meaning
that the have no Kconfig references outside the tree itself.

For hw model v2, the architecture of a board / SoC is not known until
the Kconfig tree and config file has been parsed.
There provide a new arch/Kconfig.v2 file to support loading of all arch
Kconfigs. Hw model v1 is now placed in arch/Kconfig.v1 and includes
only the arch Kconfig files determined by the arch of the board.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
a712b5005b scripts: extend kconfig compliance to verify board / SoC scheme v2
This commit extends compliance check to include a KconfigBoardV2 check.

This check verifies that a v2 scheme board / SoC does not contain
references outside the Kconfig trees.

The check is invoked as: `check_compliance.py -m KconfigBoardV2`

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
baa55141a1 twister: update twister testplan.py to handle HWMv2 boards
This commit updates twister testplan.py to handle HWMv2 boards.

It does so by switching to use list_boards.py to obtain a list of
folders containing <board>.yaml files for processing instead of a
global globbing of sub-folders under boards.

With HWMv2, boards can be organized more freely, meaning that a fixed
glob hierarchy is no longer safe.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
1f026f70eb boards: extend list_boards.py and update boards CMake module
Extend list_boards.py and update boards CMake module to handle HWMv2.

list_boards.py is extended to support board.yml file in each board
folder with various information related to the board, such as vendor,
soc, cpucluster, variants, revisions.

The HWMv2 removes the requirement for a _defconfig file.
It also unifies how board revisions, cpusets, etc is defined which again
provides an option for cleaner build system implementation for handling
of boards and their integration to the build system.

The CMake boards.cmake module is updated to take advantage of the
improved design.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
bd854a3af8 cmake: introduce arch and soc cmake modules for hw model v2
Introduce dedicated arch and soc hw model v2 CMake module files.

Rename existing arch and soc cmake file to have a `_v1` post fix.
This help to identify the purpose of each of those files and thus a
cleaner implementation.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
c9edefa8fd arch: add existing archs to archs.yml for HWMv2 support
Existing Zephyr architectures are already self-contained and thereby
HWMv2 compliant.

Add all existing architectures to archs.yml.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
61bbfb5ba2 scripts: introduce list_hardware.py for listing of architectures and SoCs
The list_hardware.py script parses archs.yml in all <arch-root>/arch
folders and soc.yml in all <soc-root>/soc sub-folders.

The archs.yml and soc.yml are introduced with hw model v2.

Hw model v2 removes the need for architecture knowledge of the SoCs,
and as part of this makes multi-arch and multi-core SoCs possible.

Hw model v2 also allows for greater flexibility in arch and SoC
organization as they can be organized freely.

As example SoCs can be organized by vendors, architecture, or any other
way as the socs.yml contains the path to the location of the SoC,
instead of relying on a specific arch.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
Torsten Rasmussen
a4d1980c35 build: board/ soc: introduce hw model v2 scheme
Hw model v2 scheme offers SoC and  maintainers the possibility to define
promptless SoCs settings which must be selected by the board Kconfig.

Having a board doing `select SOC_<name>` is a much cleaner approach then
selecting the SoC in a configuration file.

It furthermore removes the need to present all SoCs in choice groups, as
the SoC is now an internal setting to Kconfig.

This further has the benefit of not presenting users, especially
new-comers to Zephyr, with SoC selection options in menuconfig which
has potential to cause confusion.

It moves the SOC, SOC_SERIES, and SOC_FAMILY from arch/Kconfig into the
soc Kconfig tree, where they rightfully belongs.

With hw model v2, BOARD name is now passed from the build system to
Kconfig which ensures that the board name used in CMake is always in
sync with the board name used in Kconfig for hw model v2.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2024-03-01 14:17:06 +00:00
16066 changed files with 191542 additions and 606084 deletions

View File

@@ -29,4 +29,3 @@
--ignore MULTISTATEMENT_MACRO_USE_DO_WHILE
--ignore ENOSYS
--ignore IS_ENABLED_CONFIG
--ignore EXPORT_SYMBOL

View File

@@ -32,14 +32,11 @@ ColumnLimit: 100
ConstructorInitializerIndentWidth: 8
ContinuationIndentWidth: 8
ForEachMacros:
- 'ARRAY_FOR_EACH'
- 'ARRAY_FOR_EACH_PTR'
- 'FOR_EACH'
- 'FOR_EACH_FIXED_ARG'
- 'FOR_EACH_IDX'
- 'FOR_EACH_IDX_FIXED_ARG'
- 'FOR_EACH_NONEMPTY_TERM'
- 'FOR_EACH_FIXED_ARG_NONEMPTY_TERM'
- 'RB_FOR_EACH'
- 'RB_FOR_EACH_CONTAINER'
- 'SYS_DLIST_FOR_EACH_CONTAINER'
@@ -69,16 +66,8 @@ ForEachMacros:
- 'Z_GENLIST_FOR_EACH_NODE'
- 'Z_GENLIST_FOR_EACH_NODE_SAFE'
- 'STRUCT_SECTION_FOREACH'
- 'STRUCT_SECTION_FOREACH_ALTERNATE'
- 'TYPE_SECTION_FOREACH'
- 'K_SPINLOCK'
- 'COAP_RESOURCE_FOREACH'
- 'COAP_SERVICE_FOREACH'
- 'COAP_SERVICE_FOREACH_RESOURCE'
- 'HTTP_RESOURCE_FOREACH'
- 'HTTP_SERVER_CONTENT_TYPE_FOREACH'
- 'HTTP_SERVICE_FOREACH'
- 'HTTP_SERVICE_FOREACH_RESOURCE'
IfMacros:
- 'CHECKIF'
# Disabled for now, see bug https://github.com/zephyrproject-rtos/zephyr/issues/48520
@@ -93,10 +82,8 @@ IncludeCategories:
- Regex: '.*'
Priority: 3
IndentCaseLabels: false
IndentGotoLabels: false
IndentWidth: 8
InsertBraces: true
SpaceBeforeInheritanceColon: False
SpaceBeforeParens: ControlStatementsExceptControlMacros
SortIncludes: Never
UseTab: ForContinuationAndIndentation

View File

@@ -6,8 +6,8 @@ labels: bug
assignees: ''
---
<!--
**Notes**
**Notes (delete this)**
Github Discussions (https://github.com/zephyrproject-rtos/zephyr/discussions)
are available to first verify that the issue is a genuine Zephyr bug and not a
consequence of Zephyr services misuse.
@@ -16,10 +16,8 @@ This issue list is only for bugs in the main Zephyr code base
(https://github.com/zephyrproject-rtos/zephyr/). If the bug is for a project
fork (such as NCS) specific feature, please open an issue in the fork project
instead.
-->
**Describe the bug**
<!--
A clear and concise description of what the bug is.
Please also mention any information which could help others to understand
@@ -29,43 +27,31 @@ the problem you're facing:
- Is this a regression? If yes, have you been able to "git bisect" it to a
specific commit?
- ...
-->
**To Reproduce**
<!--
Steps to reproduce the behavior:
1. mkdir build; cd build
2. cmake -DBOARD=board\_xyz
3. make
4. See error
-->
**Expected behavior**
<!--
A clear and concise description of what you expected to happen.
-->
**Impact**
<!--
What impact does this issue have on your progress (e.g., annoyance, showstopper)
-->
**Logs and console output**
<!--
If applicable, add console logs or other types of debug information
e.g Wireshark capture or Logic analyzer capture (upload in zip archive).
copy-and-paste text and put a code fence (\`\`\`) before and after, to help
explain the issue. (if unable to obtain text log, add a screenshot)
-->
**Environment (please complete the following information):**
- OS: (e.g. Linux, MacOS, Windows)
- Toolchain (e.g Zephyr SDK, ...)
- Commit SHA or Version used
**Additional context**
<!--
Add any other context that could be relevant to your issue, such as pin setting,
target configuration, ...
-->

View File

@@ -8,21 +8,13 @@ assignees: ''
---
**Is your enhancement proposal related to a problem? Please describe.**
<!--
A clear and concise description of what the problem is.
-->
**Describe the solution you'd like**
<!--
A clear and concise description of what you want to happen.
-->
**Describe alternatives you've considered**
<!--
A clear and concise description of any alternative solutions or features you've considered.
-->
**Additional context**
<!--
Add any other context or graphics (drag-and-drop an image) about the feature request here.
-->

View File

@@ -9,52 +9,43 @@ assignees: ''
## Introduction
<!--
This section targets end users, TSC members, maintainers and anyone else that might
need a quick explanation of your proposed change.
-->
### Problem description
<!--
Why do we want this change and what problem are we trying to address?
-->
### Proposed change
<!--
A brief summary of the proposed change - the 10,000 ft view on what it will
change once this change is implemented.
-->
## Detailed RFC
<!--
In this section of the document the target audience is the dev team. Upon
reading this section each engineer should have a rather clear picture of what
needs to be done in order to implement the described feature.
-->
### Proposed change (Detailed)
<!--
This section is freeform - you should describe your change in as much detail
as possible. Please also ensure to include any context or background info here.
For example, do we have existing components which can be reused or altered.
By reading this section, each team member should be able to know what exactly
you're planning to change and how.
-->
### Dependencies
<!--
Highlight how the change may affect the rest of the project (new components,
modifications in other areas), or other teams/projects.
-->
### Concerns and Unresolved Questions
<!--
List any concerns, unknowns, and generally unresolved questions etc.
-->
## Alternatives
<!--
List any alternatives considered, and the reasons for choosing this option
over them.
-->

View File

@@ -8,21 +8,13 @@ assignees: ''
---
**Is your feature request related to a problem? Please describe.**
<!--
A clear and concise description of what the problem is.
-->
**Describe the solution you'd like**
<!--
A clear and concise description of what you want to happen.
-->
**Describe alternatives you've considered**
<!--
A clear and concise description of any alternative solutions or features you've considered.
-->
**Additional context**
<!--
Add any other context or graphics (drag-and-drop an image) about the feature request here.
-->

6
.github/SECURITY.md vendored
View File

@@ -11,9 +11,9 @@ updates:
At this time, with the latest release of v3.6, the supported
versions are:
- v3.7: Current LTS
- v3.6: Prior release
- v2.7: Prior LTS
- v2.7: Current LTS
- v3.5: Prior release
- v3.6: Current release
## Reporting process

View File

@@ -13,7 +13,7 @@ jobs:
steps:
- name: Download artifacts
uses: dawidd6/action-download-artifact@v3
uses: dawidd6/action-download-artifact@v2
with:
run_id: ${{ github.event.workflow_run.id }}

View File

@@ -8,7 +8,6 @@ on:
- "west.yml"
- "subsys/bluetooth/**"
- "tests/bsim/**"
- "tests/bluetooth/common/testlib/**"
- "samples/bluetooth/**"
- "boards/posix/**"
- "soc/posix/**"
@@ -31,16 +30,22 @@ concurrency:
jobs:
bsim-test:
if: github.repository_owner == 'zephyrproject-rtos'
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
env:
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
EDTT_PATH: ../tools/edtt
bsim_bt_52_test_results_file: ./bsim_bt/52_bsim_results.xml
bsim_bt_53_test_results_file: ./bsim_bt/53_bsim_results.xml
bsim_bt_53split_test_results_file: ./bsim_bt/53_bsim_split_results.xml
bsim_net_52_test_results_file: ./bsim_net/52_bsim_results.xml
bsim_uart_test_results_file: ./bsim_uart/uart_bsim_results.xml
steps:
- name: Apply container owner mismatch workaround
run: |
@@ -50,16 +55,10 @@ jobs:
# GitHub comes up with a fundamental fix for this problem.
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: Print cloud service information
run: |
echo "ZEPHYR_RUNNER_CLOUD_PROVIDER = ${ZEPHYR_RUNNER_CLOUD_PROVIDER}"
echo "ZEPHYR_RUNNER_CLOUD_NODE = ${ZEPHYR_RUNNER_CLOUD_NODE}"
echo "ZEPHYR_RUNNER_CLOUD_POD = ${ZEPHYR_RUNNER_CLOUD_POD}"
- name: Clone cached Zephyr repository
continue-on-error: true
run: |
git clone --shared /repo-cache/zephyrproject/zephyr .
git clone --shared /github/cache/zephyrproject/zephyr .
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
@@ -79,56 +78,56 @@ jobs:
west init -l . || true
west config manifest.group-filter -- +ci
west config --global update.narrow true
west update --path-cache /repo-cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /repo-cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /repo-cache/zephyrproject)
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Check common triggering files
uses: tj-actions/changed-files@v44
uses: tj-actions/changed-files@v41
id: check-common-files
with:
files: |
.github/workflows/bsim-tests.yaml
.github/workflows/bsim-tests-publish.yaml
west.yml
boards/posix/
soc/posix/
arch/posix/
include/zephyr/arch/posix/
scripts/native_simulator/
boards/posix/**
soc/posix/**
arch/posix/**
include/zephyr/arch/posix/**
scripts/native_simulator/**
tests/bsim/*
- name: Check if Bluethooth files changed
uses: tj-actions/changed-files@v44
uses: tj-actions/changed-files@v41
id: check-bluetooth-files
with:
files: |
tests/bsim/bluetooth/
samples/bluetooth/
subsys/bluetooth/
tests/bsim/bluetooth/**
samples/bluetooth/**
subsys/bluetooth/**
- name: Check if Networking files changed
uses: tj-actions/changed-files@v44
uses: tj-actions/changed-files@v41
id: check-networking-files
with:
files: |
tests/bsim/net/
samples/net/sockets/echo_*/
modules/openthread/
subsys/net/l2/openthread/
tests/bsim/net/**
samples/net/sockets/echo_*/**
modules/openthread/**
subsys/net/l2/openthread/**
include/zephyr/net/openthread.h
drivers/ieee802154/
drivers/ieee802154/**
include/zephyr/net/ieee802154*
- name: Check if UART files changed
uses: tj-actions/changed-files@v44
uses: tj-actions/changed-files@v41
id: check-uart-files
with:
files: |
tests/bsim/drivers/uart/
tests/bsim/drivers/uart/**
drivers/serial/*nrfx*
tests/drivers/uart/
tests/drivers/uart/**
- name: Update BabbleSim to manifest revision
if: >
@@ -141,46 +140,70 @@ jobs:
echo "Manifest points to bsim sha $BSIM_VERSION"
cd /opt/bsim_west/bsim
git fetch -n origin ${BSIM_VERSION}
git -c advice.detachedHead=false checkout ${BSIM_VERSION}
git config --global advice.detachedHead false
git checkout ${BSIM_VERSION}
west update
make everything -s -j 8
- name: Run Bluetooth Tests with BSIM
if: steps.check-bluetooth-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
tests/bsim/ci.bt.sh
export ZEPHYR_BASE=${PWD}
export WORK_DIR=${ZEPHYR_BASE}/bsim_bt
# Build and run the BT tests for nrf52_bsim:
nice tests/bsim/bluetooth/compile.sh
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bt_52_test_results_file} \
TESTS_FILE=tests/bsim/bluetooth/tests.nrf52bsim.txt tests/bsim/run_parallel.sh
# Build and run the BT controller tests also for the nrf5340bsim_nrf5340_cpunet
BOARD=nrf5340bsim_nrf5340_cpunet \
nice tests/bsim/bluetooth/compile.nrf5340bsim_nrf5340_cpunet.sh
BOARD=nrf5340bsim_nrf5340_cpunet \
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bt_53_test_results_file} \
TESTS_FILE=tests/bsim/bluetooth/tests.nrf5340bsim_nrf5340_cpunet.txt \
tests/bsim/run_parallel.sh
# Build and run the nrf5340 split stack tests set
BOARD=nrf5340bsim_nrf5340_cpuapp \
nice tests/bsim/bluetooth/compile.nrf5340bsim_nrf5340_cpuapp.sh
BOARD=nrf5340bsim_nrf5340_cpuapp \
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_bt_53split_test_results_file} \
TESTS_FILE=tests/bsim/bluetooth/tests.nrf5340bsim_nrf5340_cpuapp.txt \
tests/bsim/run_parallel.sh
- name: Run Networking Tests with BSIM
if: steps.check-networking-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
tests/bsim/ci.net.sh
export ZEPHYR_BASE=${PWD}
WORK_DIR=${ZEPHYR_BASE}/bsim_net nice tests/bsim/net/compile.sh
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_net_52_test_results_file} \
SEARCH_PATH=tests/bsim/net/ tests/bsim/run_parallel.sh
- name: Run UART Tests with BSIM
if: steps.check-uart-files.outputs.any_changed == 'true' || steps.check-common-files.outputs.any_changed == 'true'
run: |
tests/bsim/ci.uart.sh
echo "UART: Single device tests"
./scripts/twister -T tests/drivers/uart/ --force-color --inline-logs -v -M -p nrf52_bsim \
--fixture gpio_loopback -- -uart0_loopback
echo "UART: Multi device tests"
export ZEPHYR_BASE=${PWD}
WORK_DIR=${ZEPHYR_BASE}/bsim_uart nice tests/bsim/drivers/uart/compile.sh
RESULTS_FILE=${ZEPHYR_BASE}/${bsim_uart_test_results_file} \
SEARCH_PATH=tests/bsim/drivers/uart/ tests/bsim/run_parallel.sh
- name: Merge Test Results
run: |
pip3 install junitparser junit2html
junitparser merge --glob "./bsim_*/*bsim_results.*.xml" "./twister-out/twister.xml" junit.xml
junit2html junit.xml junit.html
- name: Upload Unit Test Results in HTML
- name: Upload Test Results
if: always()
uses: actions/upload-artifact@v4
with:
name: HTML Unit Test Results
if-no-files-found: ignore
name: bsim-test-results
path: |
junit.html
- name: Publish Unit Test Results
uses: EnricoMi/publish-unit-test-result-action@v2
with:
check_name: Bsim Test Results
files: "junit.xml"
comment_mode: off
./bsim_bt/52_bsim_results.xml
./bsim_bt/53_bsim_results.xml
./bsim_bt/53_bsim_split_results.xml
./bsim_net/52_bsim_results.xml
./bsim_uart/uart_bsim_results.xml
./twister-out/twister.xml
./twister-out/twister.json
${{ github.event_path }}
if-no-files-found: warn
- name: Upload Event Details
if: always()

View File

@@ -42,7 +42,7 @@ jobs:
echo "BUGS_PICKLE_PATH=${BUGS_PICKLE_PATH}" >> ${GITHUB_ENV}
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v4
uses: aws-actions/configure-aws-credentials@v2
with:
aws-access-key-id: ${{ vars.AWS_BUILDS_ZEPHYR_BUG_SNAPSHOT_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_BUILDS_ZEPHYR_BUG_SNAPSHOT_SECRET_ACCESS_KEY }}

View File

@@ -9,19 +9,17 @@ concurrency:
jobs:
clang-build:
if: github.repository_owner == 'zephyrproject-rtos'
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
strategy:
fail-fast: false
matrix:
platform: ["native_sim"]
env:
CCACHE_DIR: /node-cache/ccache-zephyr
CCACHE_REMOTE_STORAGE: "redis://cache-*.keydb-cache.svc.cluster.local|shards=1,2,3"
CCACHE_REMOTE_ONLY: "true"
LLVM_TOOLCHAIN_PATH: /usr/lib/llvm-16
COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
BASE_REF: ${{ github.base_ref }}
@@ -36,16 +34,10 @@ jobs:
# GitHub comes up with a fundamental fix for this problem.
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: Print cloud service information
run: |
echo "ZEPHYR_RUNNER_CLOUD_PROVIDER = ${ZEPHYR_RUNNER_CLOUD_PROVIDER}"
echo "ZEPHYR_RUNNER_CLOUD_NODE = ${ZEPHYR_RUNNER_CLOUD_NODE}"
echo "ZEPHYR_RUNNER_CLOUD_POD = ${ZEPHYR_RUNNER_CLOUD_POD}"
- name: Clone cached Zephyr repository
continue-on-error: true
run: |
git clone --shared /repo-cache/zephyrproject/zephyr .
git clone --shared /github/cache/zephyrproject/zephyr .
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
@@ -71,7 +63,7 @@ jobs:
# So first retry to update, if that does not work, remove all modules
# and start over. (Workaround until we implement more robust module
# west caching).
west update --path-cache /repo-cache/zephyrproject 2>&1 1> west.log || west update --path-cache /repo-cache/zephyrproject 2>&1 1> west2.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /repo-cache/zephyrproject)
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west2.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
@@ -82,22 +74,31 @@ jobs:
gcc --version
ls -la
- name: Set up ccache
- name: Prepare ccache timestamp/data
id: ccache_cache_timestamp
shell: cmake -P {0}
run: |
mkdir -p ${CCACHE_DIR}
ccache -M 10G
ccache -p
ccache -z -s -vv
string(TIMESTAMP current_date "%Y-%m-%d-%H;%M;%S" UTC)
string(REPLACE "/" "_" repo ${{github.repository}})
string(REPLACE "-" "_" repo2 ${repo})
file(APPEND $ENV{GITHUB_OUTPUT} "repo=${repo2}\n")
- name: Update BabbleSim to manifest revision
- name: use cache
id: cache-ccache
uses: zephyrproject-rtos/action-s3-cache@v1.2.0
with:
key: ${{ steps.ccache_cache_timestamp.outputs.repo }}-${{ github.ref_name }}-clang-${{ matrix.platform }}-ccache
path: /github/home/.cache/ccache
aws-s3-bucket: ccache.zephyrproject.org
aws-access-key-id: ${{ vars.AWS_CCACHE_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_CCACHE_SECRET_ACCESS_KEY }}
aws-region: us-east-2
- name: ccache stats initial
run: |
export BSIM_VERSION=$( west list bsim -f {revision} )
echo "Manifest points to bsim sha $BSIM_VERSION"
cd /opt/bsim_west/bsim
git fetch -n origin ${BSIM_VERSION}
git -c advice.detachedHead=false checkout ${BSIM_VERSION}
west update
make everything -s -j 8
mkdir -p /github/home/.cache
test -d github/home/.cache/ccache && rm -rf /github/home/.cache/ccache && mv github/home/.cache/ccache /github/home/.cache/ccache
ccache -M 10G -s
- name: Run Tests with Twister
id: twister
@@ -118,10 +119,10 @@ jobs:
echo "report_needed=0" >> $GITHUB_OUTPUT
fi
- name: Print ccache stats
if: always()
- name: ccache stats post
run: |
ccache -s -vv
ccache -s
ccache -p
- name: Upload Unit Test Results
if: always() && steps.twister.outputs.report_needed != 0

View File

@@ -2,7 +2,7 @@ name: Code Coverage with codecov
on:
schedule:
- cron: '25 06,18 * * *'
- cron: '25 06,18 * * 1-5'
concurrency:
group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
@@ -10,31 +10,17 @@ concurrency:
jobs:
codecov:
if: github.repository_owner == 'zephyrproject-rtos'
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
if: github.repository == 'zephyrproject-rtos/zephyr'
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
strategy:
fail-fast: false
matrix:
platform: ["mps2/an385", "native_sim", "qemu_x86", "unit_testing"]
include:
- platform: 'mps2/an385'
normalized: 'mps2_an385'
- platform: 'native_sim'
normalized: 'native_sim'
- platform: 'qemu_x86'
normalized: 'qemu_x86'
- platform: 'unit_testing'
normalized: 'unit_testing'
env:
CCACHE_DIR: /node-cache/ccache-zephyr
CCACHE_REMOTE_STORAGE: "redis://cache-*.keydb-cache.svc.cluster.local|shards=1,2,3"
CCACHE_REMOTE_ONLY: "true"
# `--specs` is ignored because ccache is unable to resovle the toolchain specs file path.
CCACHE_IGNOREOPTIONS: '--specs=*'
steps:
- name: Apply container owner mismatch workaround
run: |
@@ -44,12 +30,6 @@ jobs:
# GitHub comes up with a fundamental fix for this problem.
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: Print cloud service information
run: |
echo "ZEPHYR_RUNNER_CLOUD_PROVIDER = ${ZEPHYR_RUNNER_CLOUD_PROVIDER}"
echo "ZEPHYR_RUNNER_CLOUD_NODE = ${ZEPHYR_RUNNER_CLOUD_NODE}"
echo "ZEPHYR_RUNNER_CLOUD_POD = ${ZEPHYR_RUNNER_CLOUD_POD}"
- name: Update PATH for west
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
@@ -57,7 +37,7 @@ jobs:
- name: Clone cached Zephyr repository
continue-on-error: true
run: |
git clone --shared /repo-cache/zephyrproject/zephyr .
git clone --shared /github/cache/zephyrproject/zephyr .
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: checkout
@@ -78,22 +58,30 @@ jobs:
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Set up ccache
- name: Prepare ccache keys
id: ccache_cache_prop
shell: cmake -P {0}
run: |
mkdir -p ${CCACHE_DIR}
ccache -M 10G
ccache -p
ccache -z -s -vv
string(REPLACE "/" "_" repo ${{github.repository}})
string(REPLACE "-" "_" repo2 ${repo})
file(APPEND $ENV{GITHUB_OUTPUT} "repo=${repo2}\n")
- name: Update BabbleSim to manifest revision
- name: use cache
id: cache-ccache
uses: zephyrproject-rtos/action-s3-cache@v1.2.0
with:
key: ${{ steps.ccache_cache_prop.outputs.repo }}-${{github.event_name}}-${{matrix.platform}}-codecov-ccache
path: /github/home/.cache/ccache
aws-s3-bucket: ccache.zephyrproject.org
aws-access-key-id: ${{ vars.AWS_CCACHE_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_CCACHE_SECRET_ACCESS_KEY }}
aws-region: us-east-2
- name: ccache stats initial
run: |
export BSIM_VERSION=$( west list bsim -f {revision} )
echo "Manifest points to bsim sha $BSIM_VERSION"
cd /opt/bsim_west/bsim
git fetch -n origin ${BSIM_VERSION}
git -c advice.detachedHead=false checkout ${BSIM_VERSION}
west update
make everything -s -j 8
mkdir -p /github/home/.cache
test -d github/home/.cache/ccache && mv github/home/.cache/ccache /github/home/.cache/ccache
ccache -M 10G -s
- name: Run Tests with Twister (Push)
continue-on-error: true
@@ -102,31 +90,24 @@ jobs:
export ZEPHYR_TOOLCHAIN_VARIANT=zephyr
mkdir -p coverage/reports
pip3 install gcovr==6.0
./scripts/twister -E ${{matrix.normalized}}-testplan.json
ls -la
./scripts/twister \
-i --force-color -N -v --filter runnable -p ${{ matrix.platform }} --coverage \
-T tests --coverage-tool gcovr -xCONFIG_TEST_EXTRA_STACK_SIZE=4096 -e nano \
--timeout-multiplier 2
./scripts/twister -i --force-color -N -v --filter runnable -p ${{ matrix.platform }} --coverage -T tests --coverage-tool gcovr -xCONFIG_TEST_EXTRA_STACK_SIZE=4096 -e nano
- name: Print ccache stats
if: always()
- name: ccache stats post
run: |
ccache -s -vv
ccache -s
ccache -p
- name: Rename coverage files
if: always()
run: |
mv twister-out/coverage.json coverage/reports/${{matrix.normalized}}.json
cp twister-out/coverage.json coverage/reports/${{ matrix.platform }}.json
- name: Upload Coverage Results
if: always()
uses: actions/upload-artifact@v4
with:
name: Coverage Data (Subset ${{ matrix.normalized }})
path: |
coverage/reports/${{ matrix.normalized }}.json
${{ matrix.normalized }}-testplan.json
name: Coverage Data (Subset ${{ matrix.platform }})
path: coverage/reports/${{ matrix.platform }}.json
codecov-results:
name: "Publish Coverage Results"
@@ -140,7 +121,6 @@ jobs:
uses: actions/checkout@v4
with:
fetch-depth: 0
- name: Download Artifacts
uses: actions/download-artifact@v4
with:
@@ -148,9 +128,7 @@ jobs:
- name: Move coverage files
run: |
ls -lRt ./coverage/reports
mv ./coverage/reports/*/*testplan.json .
mv ./coverage/reports/*/coverage/reports/*.json ./coverage/reports
mv ./coverage/reports/*/*.json ./coverage/reports
ls -la ./coverage/reports
- name: Generate list of coverage files
@@ -181,49 +159,26 @@ jobs:
- name: Merge coverage files
run: |
pushd ./coverage/reports
cd ./coverage/reports
pip3 install gcovr==6.0
gcovr ${{ steps.get-coverage-files.outputs.mergefiles }} --merge-mode-functions=separate --json merged.json
gcovr ${{ steps.get-coverage-files.outputs.mergefiles }} --merge-mode-functions=separate --cobertura merged.xml
popd
- name: Get current date
id: run_date
run: |
echo "run_date=$(date --iso-8601=minutes)" >> "$GITHUB_OUTPUT"
echo "run_date_short=$(date +'%Y-%m-%d')" >> "$GITHUB_OUTPUT"
echo "run_date_year=$(date +'%Y')" >> "$GITHUB_OUTPUT"
echo "run_date_month=$(date +'%m')" >> "$GITHUB_OUTPUT"
- name: Generate Coverage Report
if: always()
run: |
pip install xlsxwriter ijson
python3 ./scripts/ci/coverage/coverage_analysis.py \
-t native_sim-testplan.json \
-m MAINTAINERS.yml \
-c coverage/reports/merged.json \
-o coverage-report-${{ steps.run_date.outputs.run_date_short }} \
-f all
cp coverage-report-* coverage/reports/
- name: Upload Merged Coverage Results and Report
- name: Upload Merged Coverage Results
if: always()
uses: actions/upload-artifact@v4
with:
name: Coverage Data and report
name: Merged Coverage Data
path: |
coverage/reports/merged.json
coverage/reports/merged.xml
coverage/reports/coverage-report-${{ steps.run_date.outputs.run_date_short }}.json
coverage/reports/coverage-report-${{ steps.run_date.outputs.run_date_short }}.xlsx
- name: Upload coverage to Codecov
if: always()
uses: codecov/codecov-action@v4
uses: codecov/codecov-action@v3
with:
directory: ./coverage/reports
env_vars: OS,PYTHON
fail_ci_if_error: false
verbose: true
token: ${{ secrets.CODECOV_TOKEN }}
files: coverage/reports/merged.xml
files: merged.xml

View File

@@ -1,12 +1,6 @@
name: Compliance Checks
on:
pull_request:
types:
- edited
- opened
- reopened
- synchronize
on: pull_request
jobs:
check_compliance:
@@ -23,11 +17,6 @@ jobs:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Set up Python
uses: actions/setup-python@v5
with:
python-version: 3.11
- name: cache-pip
uses: actions/cache@v4
with:
@@ -38,7 +27,7 @@ jobs:
run: |
pip3 install setuptools
pip3 install wheel
pip3 install python-magic lxml junitparser gitlint pylint pykwalify yamllint clang-format unidiff
pip3 install python-magic lxml junitparser gitlint pylint pykwalify yamllint
pip3 install west
- name: west setup
@@ -58,14 +47,6 @@ jobs:
west config manifest.group-filter -- +ci,-optional
west update -o=--depth=1 -n 2>&1 1> west.update.log || west update -o=--depth=1 -n 2>&1 1> west.update2.log
- name: Check for PR description
if: ${{ github.event.pull_request.body == '' }}
continue-on-error: true
id: pr_description
run: |
echo "Pull request description cannot be empty."
exit 1
- name: Run Compliance Tests
continue-on-error: true
id: compliance
@@ -94,33 +75,19 @@ jobs:
exit 1;
fi
warns=("ClangFormat")
files=($(./scripts/ci/check_compliance.py -l))
for file in "${files[@]}"; do
f="${file}.txt"
if [[ -s $f ]]; then
results=$(cat $f)
results="${results//'%'/'%25'}"
results="${results//$'\n'/'%0A'}"
results="${results//$'\r'/'%0D'}"
if [[ "${warns[@]}" =~ "${file}" ]]; then
echo "::warning file=${f}::$results"
else
echo "::error file=${f}::$results"
exit=1
fi
errors=$(cat $f)
errors="${errors//'%'/'%25'}"
errors="${errors//$'\n'/'%0A'}"
errors="${errors//$'\r'/'%0D'}"
echo "::error file=${f}::$errors"
exit=1
fi
done
if [ "${exit}" == "1" ]; then
echo "Compliance error, check for error messages in the \"Run Compliance Tests\" step"
echo "You can run this step locally with the ./scripts/ci/check_compliance.py script."
exit 1;
fi
if [ "${{ steps.pr_description.outcome }}" == "failure" ]; then
echo "PR description cannot be empty"
exit 1;
fi

View File

@@ -17,7 +17,7 @@ jobs:
steps:
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v4
uses: aws-actions/configure-aws-credentials@v2
with:
aws-access-key-id: ${{ vars.AWS_TESTING_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_TESTING_SECRET_ACCESS_KEY }}

View File

@@ -26,10 +26,10 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12']
os: [ubuntu-22.04, macos-14, windows-2022]
python-version: [3.8, 3.9, '3.10', '3.11', '3.12']
os: [ubuntu-22.04, macos-11, windows-2022]
exclude:
- os: macos-14
- os: macos-11
python-version: 3.6
- os: windows-2022
python-version: 3.6
@@ -37,7 +37,7 @@ jobs:
- name: checkout
uses: actions/checkout@v4
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v5
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux

View File

@@ -17,10 +17,7 @@ env:
# The latest CMake available directly with apt is 3.18, but we need >=3.20
# so we fetch that through pip.
CMAKE_VERSION: 3.20.5
DOXYGEN_VERSION: 1.12.0
# Job count is set to 2 less than the vCPU count of 16 because the total available RAM is 32GiB
# and each sphinx-build process may use more than 2GiB of RAM.
JOB_COUNT: 14
DOXYGEN_VERSION: 1.9.6
jobs:
doc-file-check:
@@ -37,54 +34,34 @@ jobs:
ref: ${{ github.event.pull_request.head.sha }}
fetch-depth: 0
- name: Check if Documentation related files changed
uses: tj-actions/changed-files@v44
uses: tj-actions/changed-files@v42
id: check-doc-files
with:
files: |
doc/
doc/**
**.rst
include/
include/**
kernel/include/kernel_arch_interface.h
lib/libc/**
subsys/testsuite/ztest/include/**
tests/
tests/**
**/Kconfig*
west.yml
scripts/dts/
scripts/dts/**
doc/requirements.txt
.github/workflows/doc-build.yml
scripts/pylib/pytest-twister-harness/src/twister_harness/device/device_adapter.py
scripts/pylib/pytest-twister-harness/src/twister_harness/helpers/shell.py
doc-build-html:
name: "Documentation Build (HTML)"
needs: [doc-file-check]
if: >
github.repository_owner == 'zephyrproject-rtos' &&
( needs.doc-file-check.outputs.file_check == 'true' || github.event_name != 'pull_request' )
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
timeout-minutes: 90
if: github.repository_owner == 'zephyrproject-rtos' && needs.doc-file-check.outputs.file_check == 'true'
runs-on: zephyr-runner-linux-x64-4xlarge
timeout-minutes: 45
concurrency:
group: doc-build-html-${{ github.ref }}
cancel-in-progress: true
steps:
- name: Print cloud service information
run: |
echo "ZEPHYR_RUNNER_CLOUD_PROVIDER = ${ZEPHYR_RUNNER_CLOUD_PROVIDER}"
echo "ZEPHYR_RUNNER_CLOUD_NODE = ${ZEPHYR_RUNNER_CLOUD_NODE}"
echo "ZEPHYR_RUNNER_CLOUD_POD = ${ZEPHYR_RUNNER_CLOUD_POD}"
- name: install-pkgs
run: |
sudo apt-get update
sudo apt-get install -y wget python3-pip git ninja-build graphviz lcov
wget --no-verbose "https://github.com/doxygen/doxygen/releases/download/Release_${DOXYGEN_VERSION//./_}/doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz"
sudo tar xf doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz -C /opt
echo "/opt/doxygen-${DOXYGEN_VERSION}/bin" >> $GITHUB_PATH
echo "${HOME}/.local/bin" >> $GITHUB_PATH
- name: checkout
uses: actions/checkout@v4
with:
@@ -103,6 +80,14 @@ jobs:
git rebase origin/${BASE_REF}
git log --graph --oneline HEAD...${PR_HEAD}
- name: install-pkgs
run: |
sudo apt-get update
sudo apt-get install -y ninja-build graphviz lcov
wget --no-verbose "https://github.com/doxygen/doxygen/releases/download/Release_${DOXYGEN_VERSION//./_}/doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz"
tar xf doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz
echo "${PWD}/doxygen-${DOXYGEN_VERSION}/bin" >> $GITHUB_PATH
- name: cache-pip
uses: actions/cache@v4
with:
@@ -135,11 +120,7 @@ jobs:
else
DOC_TARGET="html"
fi
DOC_TAG=${DOC_TAG} \
SPHINXOPTS="-j ${JOB_COUNT} -W --keep-going -T" \
SPHINXOPTS_EXTRA="-q -t publish" \
make -C doc ${DOC_TARGET}
DOC_TAG=${DOC_TAG} SPHINXOPTS_EXTRA="-q -t publish" make -C doc ${DOC_TARGET}
# API documentation coverage
python3 -m coverxygen --xml-dir doc/_build/html/doxygen/xml/ --src-dir include/ --output doc-coverage.info
@@ -149,9 +130,9 @@ jobs:
- name: compress-docs
run: |
tar --use-compress-program="xz -T0" -cf html-output.tar.xz --directory=doc/_build html
tar --use-compress-program="xz -T0" -cf api-output.tar.xz --directory=doc/_build html/doxygen/html
tar --use-compress-program="xz -T0" -cf api-coverage.tar.xz coverage-report
tar cfJ html-output.tar.xz --directory=doc/_build html
tar cfJ api-output.tar.xz --directory=doc/_build html/doxygen/html
tar cfJ api-coverage.tar.xz coverage-report
- name: upload-build
uses: actions/upload-artifact@v4
@@ -188,14 +169,12 @@ jobs:
doc-build-pdf:
name: "Documentation Build (PDF)"
needs: [doc-file-check]
if: |
github.event_name != 'pull_request' &&
github.repository_owner == 'zephyrproject-rtos'
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
runs-on: zephyr-runner-linux-x64-4xlarge
container: texlive/texlive:latest
timeout-minutes: 120
timeout-minutes: 60
concurrency:
group: doc-build-pdf-${{ github.ref }}
cancel-in-progress: true
@@ -205,19 +184,13 @@ jobs:
run: |
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: Print cloud service information
run: |
echo "ZEPHYR_RUNNER_CLOUD_PROVIDER = ${ZEPHYR_RUNNER_CLOUD_PROVIDER}"
echo "ZEPHYR_RUNNER_CLOUD_NODE = ${ZEPHYR_RUNNER_CLOUD_NODE}"
echo "ZEPHYR_RUNNER_CLOUD_POD = ${ZEPHYR_RUNNER_CLOUD_POD}"
- name: checkout
uses: actions/checkout@v4
- name: install-pkgs
run: |
apt-get update
apt-get install -y python3-pip python3-venv ninja-build doxygen graphviz librsvg2-bin imagemagick
apt-get install -y python3-pip python3-venv ninja-build doxygen graphviz librsvg2-bin
- name: cache-pip
uses: actions/cache@v4
@@ -252,10 +225,7 @@ jobs:
DOC_TAG="development"
fi
DOC_TAG=${DOC_TAG} \
SPHINXOPTS="-q -j ${JOB_COUNT}" \
LATEXMKOPTS="-quiet -halt-on-error" \
make -C doc pdf
DOC_TAG=${DOC_TAG} SPHINXOPTS="-q -j auto" LATEXMKOPTS="-quiet -halt-on-error" make -C doc pdf
- name: upload-build
if: always()

View File

@@ -21,7 +21,7 @@ jobs:
steps:
- name: Download artifacts
uses: dawidd6/action-download-artifact@v3
uses: dawidd6/action-download-artifact@v2
with:
workflow: doc-build.yml
run_id: ${{ github.event.workflow_run.id }}
@@ -46,12 +46,10 @@ jobs:
- name: Uncompress HTML docs
run: |
tar xf html-output/html-output.tar.xz -C html-output
if [ -f api-coverage/api-coverage.tar.xz ]; then
tar xf api-coverage/api-coverage.tar.xz -C api-coverage
fi
tar xf api-coverage/api-coverage.tar.xz -C api-coverage
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v4
uses: aws-actions/configure-aws-credentials@v2
with:
aws-access-key-id: ${{ vars.AWS_BUILDS_ZEPHYR_PR_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_BUILDS_ZEPHYR_PR_SECRET_ACCESS_KEY }}
@@ -64,8 +62,6 @@ jobs:
aws s3 sync --quiet html-output/html \
s3://builds.zephyrproject.org/${{ github.event.repository.name }}/pr/${PR_NUM}/docs \
--delete
if [ -d api-coverage/coverage-report ]; then
aws s3 sync --quiet api-coverage/coverage-report/ \
s3://builds.zephyrproject.org/${{ github.event.repository.name }}/pr/${PR_NUM}/api-coverage \
--delete
fi
aws s3 sync --quiet api-coverage/coverage-report/ \
s3://builds.zephyrproject.org/${{ github.event.repository.name }}/pr/${PR_NUM}/api-coverage \
--delete

View File

@@ -24,7 +24,7 @@ jobs:
steps:
- name: Download artifacts
uses: dawidd6/action-download-artifact@v3
uses: dawidd6/action-download-artifact@v2
with:
workflow: doc-build.yml
run_id: ${{ github.event.workflow_run.id }}
@@ -32,12 +32,10 @@ jobs:
- name: Uncompress HTML docs
run: |
tar xf html-output/html-output.tar.xz -C html-output
if [ -f api-coverage/api-coverage.tar.xz ]; then
tar xf api-coverage/api-coverage.tar.xz -C api-coverage
fi
tar xf api-coverage/api-coverage.tar.xz -C api-coverage
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v4
uses: aws-actions/configure-aws-credentials@v2
with:
aws-access-key-id: ${{ vars.AWS_DOCS_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_DOCS_SECRET_ACCESS_KEY }}
@@ -55,7 +53,5 @@ jobs:
aws s3 sync --quiet html-output/html s3://docs.zephyrproject.org/${VERSION} --delete
aws s3 sync --quiet html-output/html/doxygen/html s3://docs.zephyrproject.org/apidoc/${VERSION} --delete
if [ -d api-coverage/coverage-report ]; then
aws s3 sync --quiet api-coverage/coverage-report/ s3://docs.zephyrproject.org/api-coverage/${VERSION} --delete
fi
aws s3 sync --quiet api-coverage/coverage-report/ s3://docs.zephyrproject.org/api-coverage/${VERSION} --delete
aws s3 cp --quiet pdf-output/zephyr.pdf s3://docs.zephyrproject.org/${VERSION}/zephyr.pdf

View File

@@ -10,7 +10,7 @@ jobs:
check-errno:
runs-on: ubuntu-22.04
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.13
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
steps:
- name: Apply container owner mismatch workaround

View File

@@ -22,11 +22,10 @@ concurrency:
jobs:
footprint-tracking:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
runs-on: zephyr-runner-linux-x64-4xlarge
if: github.repository_owner == 'zephyrproject-rtos'
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.13.20240601
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
@@ -41,12 +40,6 @@ jobs:
# GitHub comes up with a fundamental fix for this problem.
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: Print cloud service information
run: |
echo "ZEPHYR_RUNNER_CLOUD_PROVIDER = ${ZEPHYR_RUNNER_CLOUD_PROVIDER}"
echo "ZEPHYR_RUNNER_CLOUD_NODE = ${ZEPHYR_RUNNER_CLOUD_NODE}"
echo "ZEPHYR_RUNNER_CLOUD_POD = ${ZEPHYR_RUNNER_CLOUD_POD}"
- name: Update PATH for west
run: |
echo "$HOME/.local/bin" >> $GITHUB_PATH
@@ -74,7 +67,7 @@ jobs:
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v4
uses: aws-actions/configure-aws-credentials@v2
with:
aws-access-key-id: ${{ vars.AWS_TESTING_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_TESTING_SECRET_ACCESS_KEY }}

View File

@@ -26,7 +26,7 @@ jobs:
strategy:
fail-fast: false
matrix:
os: [ubuntu-22.04, ubuntu-24.04, macos-13, macos-14, windows-2022]
os: [ubuntu-22.04, macos-12, macos-14, windows-2022]
runs-on: ${{ matrix.os }}
steps:
- name: Checkout
@@ -49,7 +49,7 @@ jobs:
git log --graph --oneline HEAD...${PR_HEAD}
- name: Set up Python
uses: actions/setup-python@v5
uses: actions/setup-python@v4
with:
python-version: 3.11

View File

@@ -27,7 +27,7 @@ jobs:
sudo apt-get update
sudo apt-get install discount
- uses: brcrista/summarize-issues@v4
- uses: brcrista/summarize-issues@v3
with:
title: 'Issues Report for ${{ github.repository }}'
configPath: 'issues-report-config.json'
@@ -42,7 +42,7 @@ jobs:
path: ${{ env.OUTPUT_FILE_NAME }}
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@v4
uses: aws-actions/configure-aws-credentials@v2
with:
aws-access-key-id: ${{ vars.AWS_TESTING_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_TESTING_SECRET_ACCESS_KEY }}

View File

@@ -26,13 +26,12 @@ jobs:
west init -l . || true
- name: Manifest
uses: zephyrproject-rtos/action-manifest@v1.3.1
uses: zephyrproject-rtos/action-manifest@v1.2.2
with:
github-token: ${{ secrets.ZB_GITHUB_TOKEN }}
manifest-path: 'west.yml'
checkout-path: 'zephyrproject/zephyr'
use-tree-checkout: 'true'
check-impostor-commits: 'true'
label-prefix: 'manifest-'
verbosity-level: '1'
labels: 'manifest'

View File

@@ -25,13 +25,13 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12']
python-version: [3.8, 3.9, '3.10', '3.11', '3.12']
os: [ubuntu-22.04]
steps:
- name: checkout
uses: actions/checkout@v4
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v5
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux

View File

@@ -1,61 +0,0 @@
# This workflow uses actions that are not certified by GitHub. They are provided
# by a third-party and are governed by separate terms of service, privacy
# policy, and support documentation.
name: Scorecards supply-chain security
on:
# For Branch-Protection check. Only the default branch is supported. See
# https://github.com/ossf/scorecard/blob/main/docs/checks.md#branch-protection
branch_protection_rule:
# To guarantee Maintained check is occasionally updated. See
# https://github.com/ossf/scorecard/blob/main/docs/checks.md#maintained
schedule:
- cron: '43 7 * * 6'
push:
branches:
- main
permissions: read-all
jobs:
analysis:
name: Scorecard analysis
runs-on: ubuntu-latest
permissions:
# Needed for Code scanning upload
security-events: write
# Needed for GitHub OIDC token if publish_results is true
id-token: write
steps:
- name: "Checkout code"
uses: actions/checkout@692973e3d937129bcbf40652eb9f2f61becf3332 # v4.1.7
with:
persist-credentials: false
- name: "Run analysis"
uses: ossf/scorecard-action@62b2cac7ed8198b15735ed49ab1e5cf35480ba46 # v2.4.0
with:
results_file: results.sarif
results_format: sarif
# Publish results to OpenSSF REST API for easy access by consumers.
# - Allows the repository to include the Scorecard badge.
# - See https://github.com/ossf/scorecard-action#publishing-results.
publish_results: true
# Upload the results as artifacts (optional). Commenting out will disable
# uploads of run results in SARIF format to the repository Actions tab.
# https://docs.github.com/en/actions/advanced-guides/storing-workflow-data-as-artifacts
- name: "Upload artifact"
uses: actions/upload-artifact@89ef406dd8d7e03cfd12d9e0a4a378f454709029 # v4.3.5
with:
name: SARIF file
path: results.sarif
retention-days: 5
# Upload the results to GitHub's code scanning dashboard (optional).
# Commenting out will disable upload of results to your repo's Code Scanning dashboard
- name: "Upload to code-scanning"
uses: github/codeql-action/upload-sarif@afb54ba388a7dca6ecae48f608c4ff05ff4cc77a # v3.25.15
with:
sarif_file: results.sarif

View File

@@ -25,7 +25,7 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12']
python-version: [3.8, 3.9, '3.10', '3.11', '3.12']
os: [ubuntu-20.04]
steps:
- name: checkout
@@ -46,7 +46,7 @@ jobs:
git log --graph --oneline HEAD...${PR_HEAD}
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v5
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}

View File

@@ -22,18 +22,19 @@ concurrency:
jobs:
twister-build-prep:
if: github.repository_owner == 'zephyrproject-rtos'
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
runs-on: zephyr-runner-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.14.20240823
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
outputs:
subset: ${{ steps.output-services.outputs.subset }}
size: ${{ steps.output-services.outputs.size }}
fullrun: ${{ steps.output-services.outputs.fullrun }}
env:
MATRIX_SIZE: 10
PUSH_MATRIX_SIZE: 20
PUSH_MATRIX_SIZE: 15
DAILY_MATRIX_SIZE: 80
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
@@ -49,17 +50,11 @@ jobs:
# GitHub comes up with a fundamental fix for this problem.
git config --global --add safe.directory ${GITHUB_WORKSPACE}
- name: Print cloud service information
run: |
echo "ZEPHYR_RUNNER_CLOUD_PROVIDER = ${ZEPHYR_RUNNER_CLOUD_PROVIDER}"
echo "ZEPHYR_RUNNER_CLOUD_NODE = ${ZEPHYR_RUNNER_CLOUD_NODE}"
echo "ZEPHYR_RUNNER_CLOUD_POD = ${ZEPHYR_RUNNER_CLOUD_POD}"
- name: Clone cached Zephyr repository
if: github.event_name == 'pull_request_target'
continue-on-error: true
run: |
git clone --shared /repo-cache/zephyrproject/zephyr .
git clone --shared /github/cache/zephyrproject/zephyr .
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
@@ -81,7 +76,7 @@ jobs:
west init -l . || true
west config manifest.group-filter -- +ci,+optional
west config --global update.narrow true
west update --path-cache /repo-cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /repo-cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /repo-cache/zephyrproject)
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
@@ -124,39 +119,28 @@ jobs:
echo "fullrun=${TWISTER_FULL}" >> $GITHUB_OUTPUT
twister-build:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
runs-on: zephyr-runner-linux-x64-4xlarge
needs: twister-build-prep
if: needs.twister-build-prep.outputs.size != 0
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.26.14.20240823
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
options: '--entrypoint /bin/bash'
volumes:
- /repo-cache/zephyrproject:/github/cache/zephyrproject
strategy:
fail-fast: false
matrix:
subset: ${{fromJSON(needs.twister-build-prep.outputs.subset)}}
timeout-minutes: 1440
env:
CCACHE_DIR: /node-cache/ccache-zephyr
CCACHE_REMOTE_STORAGE: "redis://cache-*.keydb-cache.svc.cluster.local|shards=1,2,3"
CCACHE_REMOTE_ONLY: "true"
# `--specs` is ignored because ccache is unable to resolve the toolchain specs file path.
CCACHE_IGNOREOPTIONS: '--specs=*'
BSIM_OUT_PATH: /opt/bsim/
BSIM_COMPONENTS_PATH: /opt/bsim/components
TWISTER_COMMON: ' --force-color --inline-logs -v -N -M --retry-failed 3 --timeout-multiplier 2 '
TWISTER_COMMON: ' --force-color --inline-logs -v -N -M --retry-failed 3 '
DAILY_OPTIONS: ' -M --build-only --all --show-footprint'
PR_OPTIONS: ' --clobber-output --integration'
PUSH_OPTIONS: ' --clobber-output -M --show-footprint'
COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }}
BASE_REF: ${{ github.base_ref }}
steps:
- name: Print cloud service information
run: |
echo "ZEPHYR_RUNNER_CLOUD_PROVIDER = ${ZEPHYR_RUNNER_CLOUD_PROVIDER}"
echo "ZEPHYR_RUNNER_CLOUD_NODE = ${ZEPHYR_RUNNER_CLOUD_NODE}"
echo "ZEPHYR_RUNNER_CLOUD_POD = ${ZEPHYR_RUNNER_CLOUD_POD}"
- name: Apply container owner mismatch workaround
run: |
# FIXME: The owner UID of the GITHUB_WORKSPACE directory may not
@@ -168,7 +152,7 @@ jobs:
- name: Clone cached Zephyr repository
continue-on-error: true
run: |
git clone --shared /repo-cache/zephyrproject/zephyr .
git clone --shared /github/cache/zephyrproject/zephyr .
git remote set-url origin ${GITHUB_SERVER_URL}/${GITHUB_REPOSITORY}
- name: Checkout
@@ -188,43 +172,56 @@ jobs:
git log --pretty=oneline | head -n 10
fi
echo "$HOME/.local/bin" >> $GITHUB_PATH
echo "$HOME/.cargo/bin" >> $GITHUB_PATH
west init -l . || true
west config manifest.group-filter -- +ci,+optional
west config --global update.narrow true
west update --path-cache /repo-cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /repo-cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /repo-cache/zephyrproject)
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
# Hotfix until we have kitware ninja in the docker image.
# Needed for full functionality of the job server functionality in twister which only works with
# kitware supplied ninja version.
wget -c https://github.com/Kitware/ninja/releases/download/v1.11.1.g95dee.kitware.jobserver-1/ninja-1.11.1.g95dee.kitware.jobserver-1_x86_64-linux-gnu.tar.gz -O - | tar xz --strip-components=1
sudo cp ninja /usr/local/bin
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Check Environment
run: |
cmake --version
gcc --version
cargo --version
rustup target list --installed
ls -la
echo "github.ref: ${{ github.ref }}"
echo "github.base_ref: ${{ github.base_ref }}"
echo "github.ref_name: ${{ github.ref_name }}"
- name: Set up ccache
- name: Prepare ccache timestamp/data
id: ccache_cache_timestamp
shell: cmake -P {0}
run: |
mkdir -p ${CCACHE_DIR}
ccache -M 10G
ccache -p
ccache -z -s -vv
string(TIMESTAMP current_date "%Y-%m-%d-%H;%M;%S" UTC)
string(REPLACE "/" "_" repo ${{github.repository}})
string(REPLACE "-" "_" repo2 ${repo})
file(APPEND $ENV{GITHUB_OUTPUT} "repo=${repo2}\n")
- name: Update BabbleSim to manifest revision
- name: use cache
id: cache-ccache
uses: zephyrproject-rtos/action-s3-cache@v1.2.0
continue-on-error: true
with:
key: ${{ steps.ccache_cache_timestamp.outputs.repo }}-${{ github.ref_name }}-${{github.event_name}}-${{ matrix.subset }}-ccache
path: /github/home/.cache/ccache
aws-s3-bucket: ccache.zephyrproject.org
aws-access-key-id: ${{ vars.AWS_CCACHE_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_CCACHE_SECRET_ACCESS_KEY }}
aws-region: us-east-2
- name: ccache stats initial
run: |
export BSIM_VERSION=$( west list bsim -f {revision} )
echo "Manifest points to bsim sha $BSIM_VERSION"
cd /opt/bsim_west/bsim
git fetch -n origin ${BSIM_VERSION}
git -c advice.detachedHead=false checkout ${BSIM_VERSION}
west update
make everything -s -j 8
mkdir -p /github/home/.cache
test -d github/home/.cache/ccache && rm -rf /github/home/.cache/ccache && mv github/home/.cache/ccache /github/home/.cache/ccache
ccache -M 10G -s
- if: github.event_name == 'push'
name: Run Tests with Twister (Push)
@@ -267,10 +264,10 @@ jobs:
fi
fi
- name: Print ccache stats
if: always()
- name: ccache stats post
run: |
ccache -s -vv
ccache -p
ccache -s
- name: Upload Unit Test Results
if: always()

View File

@@ -8,13 +8,11 @@ on:
branches:
- main
- v*-branch
- collab-*
paths:
- 'scripts/pylib/**'
- 'scripts/twister'
- 'scripts/tests/twister/**'
- '.github/workflows/twister_tests.yml'
- 'scripts/schemas/twister/'
pull_request:
branches:
- main
@@ -24,7 +22,6 @@ on:
- 'scripts/twister'
- 'scripts/tests/twister/**'
- '.github/workflows/twister_tests.yml'
- 'scripts/schemas/twister/'
jobs:
twister-tests:
@@ -32,13 +29,13 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12']
python-version: [3.8, 3.9, '3.10', '3.11', '3.12']
os: [ubuntu-22.04]
steps:
- name: checkout
uses: actions/checkout@v4
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v5
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux

View File

@@ -7,8 +7,6 @@ on:
pull_request:
branches:
- main
- collab-*
- v*-branch
paths:
- 'scripts/pylib/twister/**'
- 'scripts/twister'
@@ -21,10 +19,10 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12']
python-version: [3.8, 3.9, '3.10', '3.11', '3.12']
os: [ubuntu-22.04]
container:
image: ghcr.io/zephyrproject-rtos/ci:v0.26.13
image: ghcr.io/zephyrproject-rtos/ci:v0.26.7
steps:
- name: Apply Container Owner Mismatch Workaround
@@ -43,8 +41,6 @@ jobs:
echo "$HOME/.local/bin" >> $GITHUB_PATH
west init -l . || true
# we do not depend on any hals, tools or bootloader, save some time and space...
west config manifest.group-filter -- -hal,-tools,-bootloader
west config --global update.narrow true
west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /github/cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /github/cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
@@ -52,7 +48,7 @@ jobs:
echo "ZEPHYR_SDK_INSTALL_DIR=/opt/toolchains/zephyr-sdk-$( cat SDK_VERSION )" >> $GITHUB_ENV
- name: Set Up Python ${{ matrix.python-version }}
uses: actions/setup-python@v5
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}
@@ -77,3 +73,19 @@ jobs:
echo "Run twister tests"
source zephyr-env.sh
PYTHONPATH="./scripts/tests" pytest ./scripts/tests/twister_blackbox
- name: Upload Unit Test Results
if: success() || failure()
uses: actions/upload-artifact@v2
with:
name: Black Box Test Results (Python ${{ matrix.python-version }})
path: |
twister-out*/twister.log
twister-out*/twister.json
twister-out*/testplan.log
retention-days: 14
- name: Clear Workspace
if: success() || failure()
run: |
rm -rf twister-out*/

View File

@@ -8,7 +8,6 @@ on:
branches:
- main
- v*-branch
- collab-*
paths:
- 'scripts/west-commands.yml'
- 'scripts/west_commands/**'
@@ -17,7 +16,6 @@ on:
branches:
- main
- v*-branch
- collab-*
paths:
- 'scripts/west-commands.yml'
- 'scripts/west_commands/**'
@@ -29,10 +27,10 @@ jobs:
runs-on: ${{ matrix.os }}
strategy:
matrix:
python-version: ['3.10', '3.11', '3.12']
os: [ubuntu-22.04, macos-14, windows-2022]
python-version: [3.8, 3.9, '3.10', '3.11', '3.12']
os: [ubuntu-22.04, macos-11, windows-2022]
exclude:
- os: macos-14
- os: macos-11
python-version: 3.6
- os: windows-2022
python-version: 3.6
@@ -40,7 +38,7 @@ jobs:
- name: checkout
uses: actions/checkout@v4
- name: Set up Python ${{ matrix.python-version }}
uses: actions/setup-python@v5
uses: actions/setup-python@v4
with:
python-version: ${{ matrix.python-version }}
- name: cache-pip-linux

21
.gitignore vendored
View File

@@ -7,10 +7,8 @@
*.swp
*.swo
*~
# Emacs
.\#*
\#*\#
build*/
!doc/build/
!scripts/build
@@ -29,8 +27,6 @@ outdir
outdir-*
scripts/basic/fixdep
scripts/gen_idt/gen_idt
coverage-report
doc-coverage.info
doc/_build
doc/doxygen
doc/xml
@@ -43,7 +39,6 @@ sanity-out*
twister-out*
bsim_out
bsim_bt_out
myresults.xml
tests/RunResults.xml
scripts/grub
doc/reference/kconfig/*.rst
@@ -57,19 +52,6 @@ venv
.venv
.DS_Store
.clangd
new.info
# Cargo drops lock files in projects to capture resolved dependencies.
# We don't want to record these.
Cargo.lock
# Cargo encourages a .cargo/config.toml file to symlink to a generated
# file. Don't save these.
.cargo/
# Normal west builds will place the Rust target directory under the build directory. However,
# sometimes IDEs and such will litter these target directories as well.
target/
# CI output
compliance.xml
@@ -88,7 +70,6 @@ tags
BinaryFiles.txt
BoardYml.txt
Checkpatch.txt
ClangFormat.txt
DevicetreeBindings.txt
GitDiffCheck.txt
Gitlint.txt

View File

@@ -26,7 +26,7 @@ extra-path=scripts/gitlint
# max-line-count=200
[title-starts-with-subsystem]
regex = ^(?!subsys:)(?!treewide:)(([^:]+):)(\s([^:]+):)*\s(.+)$
regex = ^(?!subsys:)(([^:]+):)(\s([^:]+):)*\s(.+)$
[title-must-not-contain-word]
# Comma-separated list of words that should not occur in the title. Matching is case

View File

@@ -61,7 +61,6 @@ Lixin Guo <lixinx.guo@intel.com>
Łukasz Mazur <lukasz.mazur@hidglobal.com>
Manuel Argüelles <manuel.arguelles@nxp.com>
Manuel Argüelles <manuel.arguelles@nxp.com> <manuel.arguelles@coredumplabs.com>
Manuel Argüelles <manuel.arguelles@nxp.com> <marguelles.dev@gmail.com>
Marc Herbert <marc.herbert@intel.com> <46978960+marc-hb@users.noreply.github.com>
Marin Jurjević <marin.jurjevic@hotmail.com>
Mariusz Ryndzionek <mariusz.ryndzionek@firmwave.com>

View File

@@ -109,10 +109,6 @@ add_library(zephyr_interface INTERFACE)
# flags that come with zephyr_interface.
zephyr_library_named(zephyr)
if(CONFIG_LEGACY_GENERATED_INCLUDE_PATH)
zephyr_include_directories(${PROJECT_BINARY_DIR}/include/generated/zephyr)
endif()
zephyr_include_directories(
include
${PROJECT_BINARY_DIR}/include/generated
@@ -192,7 +188,6 @@ get_property(OPTIMIZE_FOR_NO_OPTIMIZATIONS_FLAG TARGET compiler PROPERTY no_opti
get_property(OPTIMIZE_FOR_DEBUG_FLAG TARGET compiler PROPERTY optimization_debug)
get_property(OPTIMIZE_FOR_SPEED_FLAG TARGET compiler PROPERTY optimization_speed)
get_property(OPTIMIZE_FOR_SIZE_FLAG TARGET compiler PROPERTY optimization_size)
get_property(OPTIMIZE_FOR_SIZE_AGGRESSIVE_FLAG TARGET compiler PROPERTY optimization_size_aggressive)
# From kconfig choice, pick the actual OPTIMIZATION_FLAG to use.
# Kconfig choice ensures only one of these CONFIG_*_OPTIMIZATIONS is set.
@@ -204,11 +199,8 @@ elseif(CONFIG_SPEED_OPTIMIZATIONS)
set(OPTIMIZATION_FLAG ${OPTIMIZE_FOR_SPEED_FLAG})
elseif(CONFIG_SIZE_OPTIMIZATIONS)
set(OPTIMIZATION_FLAG ${OPTIMIZE_FOR_SIZE_FLAG}) # Default in kconfig
elseif(CONFIG_SIZE_OPTIMIZATIONS_AGGRESSIVE)
set(OPTIMIZATION_FLAG ${OPTIMIZE_FOR_SIZE_AGGRESSIVE_FLAG})
else()
message(FATAL_ERROR
"Unreachable code. Expected optimization level to have been chosen. See Kconfig.zephyr")
assert(0 "Unreachable code. Expected optimization level to have been chosen. See Kconfig.zephyr")
endif()
if(NOT CONFIG_ARCH_IS_SET)
@@ -222,30 +214,10 @@ endif()
zephyr_compile_options(${OPTIMIZATION_FLAG})
if(CONFIG_LTO)
zephyr_compile_options($<TARGET_PROPERTY:compiler,optimization_lto>)
add_compile_options($<TARGET_PROPERTY:compiler,optimization_lto>)
add_link_options($<TARGET_PROPERTY:linker,lto_arguments>)
endif()
if(CONFIG_STD_C23)
set(CSTD c2x)
elseif(CONFIG_STD_C17)
set(CSTD c17)
elseif(CONFIG_STD_C11)
set(CSTD c11)
elseif(CONFIG_STD_C99)
set(CSTD c99)
elseif(CONFIG_STD_C90)
set(CSTD c90)
else()
message(FATAL_ERROR "Unreachable code. Expected C standard to have been chosen.")
endif()
if(CONFIG_GNU_C_EXTENSIONS)
string(REPLACE "c" "gnu" CSTD "${CSTD}")
endif()
list(APPEND CMAKE_C_COMPILE_FEATURES ${compile_features_${CSTD}})
# @Intent: Obtain compiler specific flags related to C++ that are not influenced by kconfig
zephyr_compile_options($<$<COMPILE_LANGUAGE:CXX>:$<TARGET_PROPERTY:compiler-cpp,required>>)
@@ -275,8 +247,7 @@ if(CONFIG_CPP)
set(STD_CPP_DIALECT_FLAGS $<TARGET_PROPERTY:compiler-cpp,dialect_cpp2b>)
list(APPEND CMAKE_CXX_COMPILE_FEATURES ${compile_features_cpp20})
else()
message(FATAL_ERROR
"Unreachable code. Expected C++ standard to have been chosen. See Kconfig.zephyr.")
assert(0 "Unreachable code. Expected C++ standard to have been chosen. See Kconfig.zephyr.")
endif()
set(CMAKE_CXX_COMPILE_FEATURES ${CMAKE_CXX_COMPILE_FEATURES} PARENT_SCOPE)
@@ -548,9 +519,9 @@ if(ZEPHYR_GIT_INDEX)
endif()
add_custom_command(
OUTPUT ${PROJECT_BINARY_DIR}/include/generated/zephyr/version.h
OUTPUT ${PROJECT_BINARY_DIR}/include/generated/version.h
COMMAND ${CMAKE_COMMAND} -DZEPHYR_BASE=${ZEPHYR_BASE}
-DOUT_FILE=${PROJECT_BINARY_DIR}/include/generated/zephyr/version.h
-DOUT_FILE=${PROJECT_BINARY_DIR}/include/generated/version.h
-DVERSION_TYPE=KERNEL
-DVERSION_FILE=${ZEPHYR_BASE}/VERSION
-DKERNEL_VERSION_CUSTOMIZATION="$<TARGET_PROPERTY:version_h,KERNEL_VERSION_CUSTOMIZATION>"
@@ -559,13 +530,13 @@ add_custom_command(
DEPENDS ${ZEPHYR_BASE}/VERSION ${git_dependency}
COMMAND_EXPAND_LISTS
)
add_custom_target(version_h DEPENDS ${PROJECT_BINARY_DIR}/include/generated/zephyr/version.h)
add_custom_target(version_h DEPENDS ${PROJECT_BINARY_DIR}/include/generated/version.h)
if(EXISTS ${APPLICATION_SOURCE_DIR}/VERSION)
add_custom_command(
OUTPUT ${PROJECT_BINARY_DIR}/include/generated/zephyr/app_version.h
OUTPUT ${PROJECT_BINARY_DIR}/include/generated/app_version.h
COMMAND ${CMAKE_COMMAND} -DZEPHYR_BASE=${ZEPHYR_BASE}
-DOUT_FILE=${PROJECT_BINARY_DIR}/include/generated/zephyr/app_version.h
-DOUT_FILE=${PROJECT_BINARY_DIR}/include/generated/app_version.h
-DVERSION_TYPE=APP
-DVERSION_FILE=${APPLICATION_SOURCE_DIR}/VERSION
-DAPP_VERSION_CUSTOMIZATION="$<TARGET_PROPERTY:app_version_h,APP_VERSION_CUSTOMIZATION>"
@@ -574,9 +545,7 @@ if(EXISTS ${APPLICATION_SOURCE_DIR}/VERSION)
DEPENDS ${APPLICATION_SOURCE_DIR}/VERSION ${git_dependency}
COMMAND_EXPAND_LISTS
)
add_custom_target(
app_version_h
DEPENDS ${PROJECT_BINARY_DIR}/include/generated/zephyr/app_version.h)
add_custom_target(app_version_h DEPENDS ${PROJECT_BINARY_DIR}/include/generated/app_version.h)
add_dependencies(zephyr_interface app_version_h)
endif()
@@ -631,8 +600,7 @@ set(ZEPHYR_CURRENT_CMAKE_DIR)
get_property(LIBC_LINK_LIBRARIES TARGET zephyr_interface PROPERTY LIBC_LINK_LIBRARIES)
zephyr_link_libraries(${LIBC_LINK_LIBRARIES})
set(syscall_list_h ${CMAKE_CURRENT_BINARY_DIR}/include/generated/zephyr/syscall_list.h)
set(edk_syscall_list_h ${CMAKE_CURRENT_BINARY_DIR}/edk/include/generated/zephyr/syscall_list.h)
set(syscall_list_h ${CMAKE_CURRENT_BINARY_DIR}/include/generated/syscall_list.h)
set(syscalls_json ${CMAKE_CURRENT_BINARY_DIR}/misc/generated/syscalls.json)
set(struct_tags_json ${CMAKE_CURRENT_BINARY_DIR}/misc/generated/struct_tags.json)
@@ -726,13 +694,6 @@ if(CONFIG_ZTEST)
endif()
get_property(
syscalls_include_list
TARGET syscalls_interface
PROPERTY INTERFACE_INCLUDE_DIRECTORIES
)
list(APPEND SYSCALL_INCLUDE_DIRS ${syscalls_include_list})
foreach(d ${SYSCALL_INCLUDE_DIRS})
list(APPEND parse_syscalls_include_args
--include ${d}
@@ -770,7 +731,7 @@ add_custom_target(${SYSCALL_LIST_H_TARGET} DEPENDS ${syscall_list_h} ${picolibc_
set_property(TARGET ${SYSCALL_LIST_H_TARGET}
APPEND PROPERTY
ADDITIONAL_CLEAN_FILES
${CMAKE_CURRENT_BINARY_DIR}/include/generated/zephyr/syscalls
${CMAKE_CURRENT_BINARY_DIR}/include/generated/syscalls
)
add_custom_target(${PARSE_SYSCALLS_TARGET}
@@ -790,30 +751,18 @@ if(CONFIG_TIMEOUT_64BIT)
set(SYSCALL_SPLIT_TIMEOUT_ARG --split-type k_timeout_t --split-type k_ticks_t)
endif()
# percepio/TraceRecorder/kernelports/Zephyr/scripts/tz_parse_syscalls.py hardcodes the path
# to the `syscall_list.h`, make a copy of the generated file so that percepio is able to build
if(CONFIG_LEGACY_GENERATED_INCLUDE_PATH)
set(LEGACY_SYSCALL_LIST_H_ARGS
${CMAKE_COMMAND} -E copy
${syscall_list_h}
${CMAKE_CURRENT_BINARY_DIR}/include/generated/syscall_list.h)
endif()
add_custom_command(OUTPUT include/generated/zephyr/syscall_dispatch.c ${syscall_list_h}
# Also, some files are written to include/generated/zephyr/syscalls/
add_custom_command(OUTPUT include/generated/syscall_dispatch.c ${syscall_list_h}
# Also, some files are written to include/generated/syscalls/
COMMAND
${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/build/gen_syscalls.py
--json-file ${syscalls_json} # Read this file
--base-output include/generated/zephyr/syscalls # Write to this dir
--syscall-dispatch include/generated/zephyr/syscall_dispatch.c # Write this file
--syscall-export-llext include/generated/zephyr/syscall_export_llext.c
--base-output include/generated/syscalls # Write to this dir
--syscall-dispatch include/generated/syscall_dispatch.c # Write this file
--syscall-list ${syscall_list_h}
$<$<BOOL:${CONFIG_USERSPACE}>:--gen-mrsh-files>
${SYSCALL_LONG_REGISTERS_ARG}
${SYSCALL_SPLIT_TIMEOUT_ARG}
COMMAND
${LEGACY_SYSCALL_LIST_H_ARGS}
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
DEPENDS ${PARSE_SYSCALLS_TARGET}
)
@@ -821,7 +770,7 @@ add_custom_command(OUTPUT include/generated/zephyr/syscall_dispatch.c ${syscall_
# This is passed into all calls to the gen_kobject_list.py script.
set(gen_kobject_list_include_args --include-subsystem-list ${struct_tags_json})
set(DRV_VALIDATION ${PROJECT_BINARY_DIR}/include/generated/zephyr/driver-validation.h)
set(DRV_VALIDATION ${PROJECT_BINARY_DIR}/include/generated/driver-validation.h)
add_custom_command(
OUTPUT ${DRV_VALIDATION}
COMMAND
@@ -854,7 +803,7 @@ add_dependencies(zephyr_generated_headers
set(OFFSETS_LIB offsets)
set(OFFSETS_C_PATH ${ARCH_DIR}/${ARCH}/core/offsets/offsets.c)
set(OFFSETS_H_PATH ${PROJECT_BINARY_DIR}/include/generated/zephyr/offsets.h)
set(OFFSETS_H_PATH ${PROJECT_BINARY_DIR}/include/generated/offsets.h)
add_library( ${OFFSETS_LIB} OBJECT ${OFFSETS_C_PATH})
target_include_directories(${OFFSETS_LIB} PRIVATE
@@ -890,7 +839,7 @@ add_subdirectory(kernel)
get_property(
syscalls_file_list
TARGET syscalls_interface
PROPERTY INTERFACE_SOURCES
PROPERTY INTERFACE_INCLUDE_DIRECTORIES
)
file(CONFIGURE OUTPUT ${syscalls_file_list_output}
CONTENT "@syscalls_file_list@" @ONLY)
@@ -927,13 +876,6 @@ foreach(zephyr_lib ${ZEPHYR_LIBS_PROPERTY})
add_dependencies(${zephyr_lib} zephyr_generated_headers)
endforeach()
if(CONFIG_KERNEL_WHOLE_ARCHIVE)
set(WHOLE_ARCHIVE_LIBS ${ZEPHYR_LIBS_PROPERTY} kernel)
else()
set(WHOLE_ARCHIVE_LIBS ${ZEPHYR_LIBS_PROPERTY})
set(NO_WHOLE_ARCHIVE_LIBS kernel)
endif()
get_property(OUTPUT_FORMAT GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT)
if (CONFIG_CODE_DATA_RELOCATION)
@@ -997,19 +939,14 @@ if(CONFIG_USERSPACE)
set(PROCESS_GPERF ${ZEPHYR_BASE}/scripts/build/process_gperf.py)
endif()
get_property(GLOBAL_CSTD GLOBAL PROPERTY CSTD)
if(DEFINED GLOBAL_CSTD)
message(DEPRECATION
"Global CSTD property is deprecated, see Kconfig.zephyr for C Standard options.")
set(CSTD ${GLOBAL_CSTD})
list(APPEND CMAKE_C_COMPILE_FEATURES ${compile_features_${CSTD}})
endif()
get_property(CSTD GLOBAL PROPERTY CSTD)
set_ifndef(CSTD c99)
# @Intent: Obtain compiler specific flag for specifying the c standard
zephyr_compile_options(
$<$<COMPILE_LANGUAGE:C>:$<TARGET_PROPERTY:compiler,cstd>${CSTD}>
)
set(CMAKE_C_COMPILE_FEATURES ${CMAKE_C_COMPILE_FEATURES} PARENT_SCOPE)
set(CMAKE_C_COMPILE_FEATURES ${compile_features_${CSTD}} PARENT_SCOPE)
# @Intent: Configure linker scripts, i.e. generate linker scripts with variables substituted
toolchain_ld_configure_files()
@@ -1217,7 +1154,7 @@ if(CONFIG_USERSPACE)
PUBLIC $<TARGET_PROPERTY:zephyr_interface,INTERFACE_SYSTEM_INCLUDE_DIRECTORIES>
)
set(KOBJECT_LINKER_HEADER_DATA "${PROJECT_BINARY_DIR}/include/generated/zephyr/linker-kobject-prebuilt-data.h")
set(KOBJECT_LINKER_HEADER_DATA "${PROJECT_BINARY_DIR}/include/generated/linker-kobject-prebuilt-data.h")
add_custom_command(
OUTPUT ${KOBJECT_LINKER_HEADER_DATA}
@@ -1225,7 +1162,7 @@ if(CONFIG_USERSPACE)
${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/build/gen_kobject_placeholders.py
--object $<TARGET_OBJECTS:kobj_prebuilt_hash_output_lib>
--outdir ${PROJECT_BINARY_DIR}/include/generated/zephyr
--outdir ${PROJECT_BINARY_DIR}/include/generated
--datapct ${CONFIG_KOBJECT_DATA_AREA_RESERVE_EXTRA_PERCENT}
--rodata ${CONFIG_KOBJECT_RODATA_AREA_EXTRA_BYTES}
$<$<BOOL:${CMAKE_VERBOSE_MAKEFILE}>:--verbose>
@@ -1317,20 +1254,6 @@ if(CONFIG_GEN_ISR_TABLES)
set_property(GLOBAL APPEND PROPERTY GENERATED_KERNEL_SOURCE_FILES isr_tables.c)
endif()
if(CONFIG_SYMTAB)
add_custom_command(
OUTPUT symtab.c
COMMAND
${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/build/gen_symtab.py
-k $<TARGET_FILE:${ZEPHYR_LINK_STAGE_EXECUTABLE}>
-o symtab.c
DEPENDS ${ZEPHYR_LINK_STAGE_EXECUTABLE}
COMMAND_EXPAND_LISTS
)
set_property(GLOBAL APPEND PROPERTY GENERATED_KERNEL_SOURCE_FILES symtab.c)
endif()
if(CONFIG_USERSPACE)
set(KOBJECT_HASH_LIST kobject_hash.gperf)
set(KOBJECT_HASH_OUTPUT_SRC_PRE kobject_hash_preprocessed.c)
@@ -1613,14 +1536,11 @@ endif()
if(CONFIG_BUILD_OUTPUT_ADJUST_LMA)
math(EXPR adjustment "${CONFIG_BUILD_OUTPUT_ADJUST_LMA}" OUTPUT_FORMAT DECIMAL)
set(args_adjustment ${CONFIG_BUILD_OUTPUT_ADJUST_LMA_SECTIONS})
list(TRANSFORM args_adjustment PREPEND $<TARGET_PROPERTY:bintools,elfconvert_flag_lma_adjust>)
list(TRANSFORM args_adjustment APPEND +${adjustment})
list(APPEND
post_build_commands
COMMAND $<TARGET_PROPERTY:bintools,elfconvert_command>
$<TARGET_PROPERTY:bintools,elfconvert_flag_final>
${args_adjustment}
$<TARGET_PROPERTY:bintools,elfconvert_flag_lma_adjust>${adjustment}
$<TARGET_PROPERTY:bintools,elfconvert_flag_infile>${KERNEL_ELF_NAME}
$<TARGET_PROPERTY:bintools,elfconvert_flag_outfile>${KERNEL_ELF_NAME}
)
@@ -1713,8 +1633,9 @@ if(CONFIG_BUILD_OUTPUT_BIN AND CONFIG_BUILD_OUTPUT_UF2)
set(BYPRODUCT_KERNEL_UF2_NAME "${PROJECT_BINARY_DIR}/${KERNEL_UF2_NAME}" CACHE FILEPATH "Kernel uf2 file" FORCE)
endif()
set(KERNEL_META_PATH ${PROJECT_BINARY_DIR}/${KERNEL_META_NAME} CACHE INTERNAL "")
if(CONFIG_BUILD_OUTPUT_META)
set(KERNEL_META_PATH ${PROJECT_BINARY_DIR}/${KERNEL_META_NAME} CACHE INTERNAL "")
list(APPEND
post_build_commands
COMMAND ${PYTHON_EXECUTABLE} ${ZEPHYR_BASE}/scripts/zephyr_module.py
@@ -1728,9 +1649,6 @@ if(CONFIG_BUILD_OUTPUT_META)
post_build_byproducts
${KERNEL_META_PATH}
)
else(CONFIG_BUILD_OUTPUT_META)
# Prevent spdx to use invalid data
file(REMOVE ${KERNEL_META_PATH})
endif()
# Cleanup intermediate files
@@ -1771,7 +1689,7 @@ endif()
if(CONFIG_OUTPUT_DISASSEMBLY)
if(CONFIG_OUTPUT_DISASSEMBLE_ALL)
set(disassembly_type "$<TARGET_PROPERTY:bintools,disassembly_flag_all>")
elseif (CONFIG_OUTPUT_DISASSEMBLY_WITH_SOURCE)
else()
set(disassembly_type "$<TARGET_PROPERTY:bintools,disassembly_flag_inline_source>")
endif()
list(APPEND
@@ -1836,17 +1754,6 @@ if(CONFIG_BUILD_OUTPUT_STRIPPED)
)
endif()
if(CONFIG_BUILD_OUTPUT_COMPRESS_DEBUG_SECTIONS)
list(APPEND
post_build_commands
COMMAND $<TARGET_PROPERTY:bintools,elfconvert_command>
$<TARGET_PROPERTY:bintools,elfconvert_flag>
$<TARGET_PROPERTY:bintools,elfconvert_flag_compress_debug_sections>
$<TARGET_PROPERTY:bintools,elfconvert_flag_infile>${KERNEL_ELF_NAME}
$<TARGET_PROPERTY:bintools,elfconvert_flag_final>
)
endif()
if(CONFIG_BUILD_OUTPUT_EXE)
if (NOT CONFIG_NATIVE_LIBRARY)
list(APPEND
@@ -1891,20 +1798,6 @@ if(CONFIG_BUILD_OUTPUT_INFO_HEADER)
)
endif()
if (CONFIG_LLEXT AND CONFIG_LLEXT_EXPORT_BUILTINS_BY_SLID)
#slidgen must be the first post-build command to be executed
#on the Zephyr ELF to ensure that all other commands, such as
#binary file generation, are operating on a preparated ELF.
list(PREPEND
post_build_commands
COMMAND ${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/build/llext_prepare_exptab.py
--elf-file ${PROJECT_BINARY_DIR}/${KERNEL_ELF_NAME}
--slid-listing ${PROJECT_BINARY_DIR}/slid_listing.txt
)
endif()
if(NOT CMAKE_C_COMPILER_ID STREQUAL "ARMClang")
set(check_init_priorities_input
$<IF:$<TARGET_EXISTS:native_runner_executable>,${BYPRODUCT_KERNEL_EXE_NAME},${BYPRODUCT_KERNEL_ELF_NAME}>
@@ -1919,13 +1812,12 @@ if(NOT CMAKE_C_COMPILER_ID STREQUAL "ARMClang")
)
if(CONFIG_CHECK_INIT_PRIORITIES)
if(TARGET native_runner_executable)
add_custom_command(TARGET native_runner_executable POST_BUILD
COMMAND ${check_init_priorities_command}
)
else()
list(APPEND post_build_commands COMMAND ${check_init_priorities_command})
endif()
add_custom_target(
check_init_priorities
ALL
COMMAND ${check_init_priorities_command}
DEPENDS ${check_init_priorities_dependencies}
)
endif()
add_custom_target(
@@ -1983,47 +1875,27 @@ list(APPEND
)
if(CONFIG_LOG_DICTIONARY_DB)
set(LOG_DICT_DB_NAME ${PROJECT_BINARY_DIR}/log_dictionary.json)
set(LOG_DICT_DB_NAME_ARG --json)
set(log_dict_db_output --json=${PROJECT_BINARY_DIR}/log_dictionary.json)
elseif(CONFIG_LOG_MIPI_SYST_USE_CATALOG)
set(LOG_DICT_DB_NAME ${PROJECT_BINARY_DIR}/mipi_syst_collateral.xml)
set(LOG_DICT_DB_NAME_ARG --syst)
set(log_dict_db_output --syst=${PROJECT_BINARY_DIR}/mipi_syst_collateral.xml)
endif()
if(LOG_DICT_DB_NAME_ARG)
set(log_dict_gen_command
${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/logging/dictionary/database_gen.py
${KERNEL_ELF_NAME}
${LOG_DICT_DB_NAME_ARG}=${LOG_DICT_DB_NAME}
--build-header ${PROJECT_BINARY_DIR}/include/generated/zephyr/version.h
)
if(log_dict_db_output)
list(APPEND
post_build_commands
COMMAND
${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/logging/dictionary/database_gen.py
${KERNEL_ELF_NAME}
${log_dict_db_output}
--build-header ${PROJECT_BINARY_DIR}/include/generated/version.h
)
list(APPEND
post_build_byproducts
${LOG_DICT_DB_NAME}
)
if (NOT CONFIG_LOG_DICTIONARY_DB_TARGET)
# If not using a separate target for generating logging dictionary
# database, add the generation to post build command to make sure
# the database is actually being generated.
list(APPEND
post_build_commands
COMMAND ${CMAKE_COMMAND} -E echo "Generating logging dictionary database: ${LOG_DICT_DB_NAME}"
COMMAND ${log_dict_gen_command}
)
list(APPEND
post_build_byproducts
${LOG_DICT_DB_NAME}
)
else()
# Seprate build target for generating logging dictionary database.
# This needs to be explicitly called/used to generate the database.
add_custom_command(
OUTPUT ${LOG_DICT_DB_NAME}
COMMAND ${log_dict_gen_command}
WORKING_DIRECTORY ${PROJECT_BINARY_DIR}
COMMENT "Generating logging dictionary database: ${LOG_DICT_DB_NAME}"
DEPENDS ${logical_target_for_zephyr_elf}
)
add_custom_target(log_dict_db_gen DEPENDS ${LOG_DICT_DB_NAME})
endif()
unset(log_dict_db_output)
endif()
# Add post_build_commands to post-process the final .elf file produced by
@@ -2132,53 +2004,6 @@ if((CMAKE_BUILD_TYPE IN_LIST build_types) AND (NOT NO_BUILD_TYPE_WARNING))
endif()
endif()
# Extension Development Kit (EDK) generation.
set(llext_edk_file ${PROJECT_BINARY_DIR}/${CONFIG_LLEXT_EDK_NAME}.tar.xz)
# TODO maybe generate flags for C CXX ASM
zephyr_get_compile_definitions_for_lang(C zephyr_defs)
zephyr_get_compile_options_for_lang(C zephyr_flags)
# Filter out non LLEXT and LLEXT_EDK flags - and add required ones
llext_filter_zephyr_flags(LLEXT_REMOVE_FLAGS ${zephyr_flags} llext_filt_flags)
llext_filter_zephyr_flags(LLEXT_EDK_REMOVE_FLAGS ${llext_filt_flags} llext_filt_flags)
set(llext_edk_cflags ${zephyr_defs} -DLL_EXTENSION_BUILD)
list(APPEND llext_edk_cflags ${llext_filt_flags})
list(APPEND llext_edk_cflags ${LLEXT_APPEND_FLAGS})
list(APPEND llext_edk_cflags ${LLEXT_EDK_APPEND_FLAGS})
add_custom_command(
OUTPUT ${llext_edk_file}
# Regenerate syscalls in case CONFIG_LLEXT_EDK_USERSPACE_ONLY
COMMAND ${CMAKE_COMMAND}
-E make_directory edk/include/generated/zephyr
COMMAND
${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/build/gen_syscalls.py
--json-file ${syscalls_json} # Read this file
--base-output edk/include/generated/zephyr/syscalls # Write to this dir
--syscall-dispatch edk/include/generated/zephyr/syscall_dispatch.c # Write this file
--syscall-list ${edk_syscall_list_h}
$<$<BOOL:${CONFIG_LLEXT_EDK_USERSPACE_ONLY}>:--userspace-only>
${SYSCALL_LONG_REGISTERS_ARG}
${SYSCALL_SPLIT_TIMEOUT_ARG}
COMMAND ${CMAKE_COMMAND}
-DPROJECT_BINARY_DIR=${PROJECT_BINARY_DIR}
-DAPPLICATION_SOURCE_DIR=${APPLICATION_SOURCE_DIR}
-DINTERFACE_INCLUDE_DIRECTORIES="$<TARGET_PROPERTY:zephyr_interface,INTERFACE_INCLUDE_DIRECTORIES>"
-Dllext_edk_file=${llext_edk_file}
-Dllext_edk_cflags="${llext_edk_cflags}"
-Dllext_edk_name=${CONFIG_LLEXT_EDK_NAME}
-DWEST_TOPDIR=${WEST_TOPDIR}
-DZEPHYR_BASE=${ZEPHYR_BASE}
-DCONFIG_LLEXT_EDK_USERSPACE_ONLY=${CONFIG_LLEXT_EDK_USERSPACE_ONLY}
-P ${ZEPHYR_BASE}/cmake/llext-edk.cmake
DEPENDS ${logical_target_for_zephyr_elf}
COMMAND_EXPAND_LISTS
)
add_custom_target(llext-edk DEPENDS ${llext_edk_file})
# @Intent: Set compiler specific flags for standard C/C++ includes
# Done at the very end, so any other system includes which may
# be added by Zephyr components were first in list.

View File

@@ -21,11 +21,12 @@
/soc/arm/aspeed/ @aspeeddylan
/soc/atmel/ @nandojve
/soc/arm/bcm*/ @sbranden
/soc/arm/ene/ @ene-steven
/soc/arm/infineon_cat1/ @ifyall @npal-cy
/soc/arm/infineon_xmc/ @parthitce
/soc/arm/silabs_exx32/efm32pg1b/ @rdmeneze
/soc/arm/silabs_exx32/efr32mg21/ @l-alfred
/soc/arm/st_stm32/ @erwango
/soc/arm/st_stm32/*/power.c @FRASTM
/soc/arm/st_stm32/stm32mp1/ @arnopo
/soc/arm/st_stm32/stm32h7/*stm32h735* @benediktibk
/soc/arm/st_stm32/stm32l4/*stm32l451* @benediktibk
@@ -39,10 +40,7 @@
/soc/riscv/riscv-privileged/andes_v5/ @cwshu @kevinwang821020 @jimmyzhe
/soc/riscv/riscv-privileged/neorv32/ @henrikbrixandersen
/soc/riscv/riscv-privileged/gd32vf103/ @soburi
/soc/starfive/jh71xx/ @pfarwsi
/soc/riscv/riscv-privileged/niosv/ @sweeaun
/boards/adafruit/feather_nrf52840/ @jacobw
/boards/ene/ @ene-steven
/boards/arm/96b_argonkey/ @avisconti
/boards/arm/96b_avenger96/ @Mani-Sadhasivam
/boards/arm/96b_carbon/ @idlethread
@@ -54,6 +52,8 @@
/boards/arm/acn52832/ @sven-hm
/boards/arm/arduino_mkrzero/ @soburi
/boards/arm/bbc_microbit_v2/ @LingaoM
/boards/arm/bl5340_dvk/ @lairdjm
/boards/arm/bl65*/ @lairdjm
/boards/arm/blackpill_f401ce/ @coderkalyan
/boards/arm/blackpill_f411ce/ @coderkalyan
/boards/arm/bt*10/ @greg-leach
@@ -64,6 +64,7 @@
/boards/arm/cy8ckit_062s4/ @DaWei8823
/boards/arm/cy8ckit_062_wifi_bt/ @ifyall @npal-cy
/boards/arm/cy8cproto_062_4343w/ @ifyall @npal-cy
/boards/arm/disco_l475_iot1/ @erwango
/boards/arm/efm32pg_stk3401a/ @rdmeneze
/boards/arm/faze/ @mbittan @simonguinot
/boards/arm/frdm*/ @mmahadevan108 @dleach02
@@ -73,6 +74,7 @@
/boards/arm/ip_k66f/ @parthitce @lmajewski
/boards/arm/legend/ @mbittan @simonguinot
/boards/arm/lpcxpresso*/ @mmahadevan108 @dleach02
/boards/arm/mg100/ @rerickson1
/boards/arm/mimx8mm_evk/ @Mani-Sadhasivam
/boards/arm/mimx8mm_phyboard_polis @pefech
/boards/arm/mimxrt*/ @mmahadevan108 @dleach02
@@ -80,8 +82,10 @@
/boards/arm/msp_exp432p401r_launchxl/ @Mani-Sadhasivam
/boards/arm/npcx7m6fb_evb/ @MulinChao @ChiHuaL
/boards/arm/nrf*/ @carlescufi @lemrey
/boards/arm/nucleo*/ @erwango @ABOSTM @FRASTM
/boards/arm/nucleo_f401re/ @idlethread
/boards/arm/nuvoton_pfm_m487/ @ssekar15
/boards/arm/pinnacle_100_dvk/ @rerickson1
/boards/arm/qemu_cortex_a9/ @ibirnbaum
/boards/arm/qemu_cortex_r*/ @stephanosio
/boards/arm/qemu_cortex_m*/ @ioannisg @stephanosio
@@ -99,13 +103,14 @@
/boards/arm/sensortile_box/ @avisconti
/boards/arm/steval_fcu001v1/ @Navin-Sankar
/boards/arm/stm32l1_disco/ @karlp
/boards/arm/stm32*_disco/ @erwango @ABOSTM @FRASTM
/boards/arm/stm32h735g_disco/ @benediktibk
/boards/arm/stm32f3_disco/ @ydamigos
/boards/arm/stm32*_eval/ @erwango @ABOSTM @FRASTM
/boards/arm/rcar_*/ @aaillet
/boards/arm/ubx_bmd345eval_nrf52840/ @Navin-Sankar @brec-u-blox
/boards/arm/nrf5340_audio_dk_nrf5340 @koffes @alexsven @erikrobstad @rick1082 @gWacey
/boards/arm/stm32_min_dev/ @sidcha
/boards/ezurio/* @rerickson1
/boards/riscv/rv32m1_vega/ @dleach02
/boards/riscv/adp_xc7k_ae350/ @cwshu @kevinwang821020 @jimmyzhe
/boards/riscv/longan_nano/ @soburi
@@ -113,7 +118,6 @@
/boards/riscv/niosv*/ @sweeaun
/boards/riscv/sparkfun_red_v_things_plus/ @soburi
/boards/riscv/stamp_c3/ @soburi
/boards/starfive/visionfive2/ @kanakshilledar @pfarwsi
/boards/shields/atmel_rf2xx/ @nandojve
/boards/shields/esp_8266/ @nandojve
/boards/shields/inventek_eswifi/ @nandojve
@@ -143,7 +147,9 @@
/drivers/*/*sam4l* @nandojve
/drivers/*/*cc13xx_cc26xx* @bwitherspoon
/drivers/*/*gd32* @nandojve
/drivers/*/*litex* @mateusz-holenko @kgugala @pgielda
/drivers/*/*mcux* @mmahadevan108 @dleach02
/drivers/*/*stm32* @erwango @ABOSTM @FRASTM
/drivers/*/*native_posix* @aescolar @daor-oti
/drivers/*/*lpc11u6x* @mbittan @simonguinot
/drivers/*/*npcx* @MulinChao @ChiHuaL
@@ -156,8 +162,7 @@
/drivers/adc/adc_rpi_pico.c @soburi
/drivers/adc/*ads114s0x* @benediktibk
/drivers/adc/*max11102_17* @benediktibk
/drivers/adc/*kb1200* @ene-steven
/drivers/adc/adc_ad559x.c @bbilas
/drivers/adc/adc_ad5592.c @bbilas
/drivers/audio/*nrfx* @anangl
/drivers/auxdisplay/*pt6314* @xingrz
/drivers/auxdisplay/* @thedjnK
@@ -182,13 +187,12 @@
/drivers/display/*rm68200* @mmahadevan108
/drivers/display/display_ili9342c.* @extremegtx
/drivers/dac/*ad56xx* @benediktibk
/drivers/dac/dac_ad559x.c @bbilas
/drivers/dac/dac_ad5592.c @bbilas
/drivers/dai/ @kv2019i @marcinszkudlinski @abonislawski
/drivers/dai/intel/ @kv2019i @marcinszkudlinski @abonislawski
/drivers/dai/intel/ssp/ @kv2019i @marcinszkudlinski @abonislawski
/drivers/dai/intel/dmic/ @marcinszkudlinski @abonislawski
/drivers/dai/intel/alh/ @abonislawski
/drivers/dma/dma_dw_axi.c @pbalsundar
/drivers/dma/*dw* @tbursztyka
/drivers/dma/*dw_common* @abonislawski
/drivers/dma/*sam0* @Sizurka
@@ -202,6 +206,7 @@
/drivers/entropy/*b91* @andy-liu-telink
/drivers/entropy/*bt_hci* @JordanYates
/drivers/entropy/*rv32m1* @dleach02
/drivers/entropy/*litex* @mateusz-holenko @kgugala @pgielda
/drivers/ethernet/*dwmac* @npitre
/drivers/ethernet/*stm32* @Nukersson @lochej
/drivers/ethernet/*w5500* @parthitce
@@ -223,6 +228,7 @@
/drivers/gpio/*b91* @andy-liu-telink
/drivers/gpio/*lmp90xxx* @henrikbrixandersen
/drivers/gpio/*nct38xx* @MulinChao @ChiHuaL
/drivers/gpio/*stm32* @erwango
/drivers/gpio/*eos_s3* @fkokosinski @kgugala
/drivers/gpio/*rcar* @aaillet
/drivers/gpio/*esp32* @sylvioalves
@@ -231,9 +237,8 @@
/drivers/gpio/*ads114s0x* @benediktibk
/drivers/gpio/*bd8lb600fs* @benediktibk
/drivers/gpio/*pcal64xxa* @benediktibk
/drivers/gpio/*kb1200* @ene-steven
/drivers/gpio/gpio_altera_pio.c @shilinte
/drivers/gpio/gpio_ad559x.c @bbilas
/drivers/gpio/gpio_ad5592.c @bbilas
/drivers/i2c/i2c_common.c @sjg20
/drivers/i2c/i2c_emul.c @sjg20
/drivers/i2c/i2c_ite_enhance.c @GTLin08
@@ -245,13 +250,13 @@
/drivers/i2c/Kconfig.test @mbolivar-ampere
/drivers/i2c/i2c_test.c @mbolivar-ampere
/drivers/i2c/*rcar* @aaillet
/drivers/i2c/*kb1200* @ene-steven
/drivers/i2s/*litex* @mateusz-holenko @kgugala @pgielda
/drivers/i2s/i2s_ll_stm32* @avisconti
/drivers/i2s/*nrfx* @anangl
/drivers/i3c/i3c_cdns.c @XenuIsWatching
/drivers/ieee802154/ @rlubos @tbursztyka @jukkar @fgrandel
/drivers/ieee802154/*b91* @andy-liu-telink
/drivers/ieee802154/ieee802154_nrf5* @ankuns
/drivers/ieee802154/ieee802154_nrf5* @jciupis
/drivers/ieee802154/ieee802154_rf2xx* @tbursztyka @nandojve
/drivers/ieee802154/ieee802154_cc13xx* @bwitherspoon @cfriedt @vaishnavachath
/drivers/interrupt_controller/ @dcpleung @nashif
@@ -272,7 +277,7 @@
/drivers/kscan/*ft5336* @MaureenHelm
/drivers/kscan/*ht16k33* @henrikbrixandersen
/drivers/led_strip/ @mbolivar-ampere
/drivers/mfd/mfd_ad559x.c @bbilas
/drivers/mfd/mfd_ad5592.c @bbilas
/drivers/mfd/mfd_max20335.c @bbilas
/drivers/misc/ft8xx/ @hubertmis
/drivers/modem/hl7800.c @rerickson1
@@ -282,7 +287,6 @@
/drivers/modem/Kconfig.simcom-sim7080 @lgehreke
/drivers/pinctrl/*esp32* @sylvioalves
/drivers/pinctrl/*it8xxx2* @ite
/drivers/pinctrl/*kb1200* @ene-steven
/drivers/pm_cpu_ops/psci_shell.c @nbalabak @gdengi
/drivers/power_domain/ @ceolin
/drivers/ps2/*xec* @franciscomunoz @sjvasanth1
@@ -301,7 +305,6 @@
/drivers/pwm/*esp32* @LucasTambor
/drivers/pwm/*rcar* @aaillet
/drivers/pwm/*max31790* @benediktibk
/drivers/pwm/*kb1200* @ene-steven
/drivers/regulator/* @gmarull
/drivers/regulator/regulator_max20335.c @bbilas
/drivers/regulator/regulator_pca9420.c @danieldegrasse
@@ -321,13 +324,12 @@
/drivers/sensor/qdec_stm32/ @valeriosetti
/drivers/sensor/rpi_pico_temp/ @soburi
/drivers/sensor/st*/ @avisconti
/drivers/sensor/veaa_x_3/ @jeppenodgaard @MaureenHelm
/drivers/sensor/ene_tack_kb1200/ @ene-steven
/drivers/serial/*b91* @andy-liu-telink
/drivers/serial/uart_altera_jtag.c @nashif @gohshunjing
/drivers/serial/uart_altera.c @gohshunjing
/drivers/serial/*ns16550* @dcpleung @nashif @gdengi
/drivers/serial/*nrfx* @anangl
/drivers/serial/uart_liteuart.c @mateusz-holenko @kgugala @pgielda
/drivers/serial/Kconfig.mcux_iuart @Mani-Sadhasivam
/drivers/serial/uart_mcux_iuart.c @Mani-Sadhasivam
/drivers/serial/Kconfig.rtt @carlescufi @pkral78
@@ -346,7 +348,7 @@
/drivers/serial/Kconfig.it8xxx2 @GTLin08
/drivers/serial/uart_ite_it8xxx2.c @GTLin08
/drivers/serial/*intel_lw* @shilinte
/drivers/serial/*kb1200* @ene-steven
/drivers/disk/sdmmc_sdhc.h @JunYangNXP
/drivers/disk/sdmmc_stm32.c @anthonybrandon
/drivers/ptp_clock/ @tbursztyka @jukkar
/drivers/spi/*b91* @andy-liu-telink
@@ -363,11 +365,13 @@
/drivers/timer/*xlnx_psttc* @wjliang @stephanosio
/drivers/timer/*cc13xx_cc26xx_rtc* @vanti
/drivers/timer/*cavs* @dcpleung
/drivers/timer/*stm32_lptim* @FRASTM
/drivers/timer/*leon_gptimer* @julius-barendt
/drivers/timer/*mips_cp0* @frantony
/drivers/timer/*rcar_cmt* @aaillet
/drivers/timer/*esp32_sys* @uLipe
/drivers/timer/*esp32c3_sys* @uLipe
/drivers/timer/*sam0_rtc* @bendiscz
/drivers/timer/*arcv2* @ruuddw
/drivers/timer/*xtensa* @dcpleung
/drivers/timer/*rv32m1_lptmr* @mbolivar
/drivers/timer/*nrf_rtc* @anangl
@@ -390,17 +394,16 @@
/drivers/watchdog/*rpi_pico* @thedjnK
/drivers/watchdog/*dw* @softwarecki @pbalsundar
/drivers/watchdog/*ifx* @sreeramIfx
/drivers/watchdog/*kb1200* @ene-steven
/drivers/wifi/esp_at/ @mniestroj
/drivers/wifi/eswifi/ @loicpoulain @nandojve
/drivers/wifi/winc1500/ @kludentwo
/drivers/virtualization/ @tbursztyka
/dts/arc/ @abrodkin @ruuddw @iriszzw @evgeniy-paltsev
/dts/arm/acsip/ @NorthernDean
/dts/arm/aspeed/ @aspeeddylan
/dts/arm/atmel/ @galak @nandojve
/dts/arm/broadcom/ @sbranden
/dts/arm/cypress/ @ifyall @npal-cy
/dts/arm/ene/kb1200 @ene-steven
/dts/arm/gd/ @nandojve
/dts/arm/infineon/xmc4* @parthitce @ifyall @npal-cy
/dts/arm/infineon/psoc6/ @ifyall @npal-cy
@@ -410,6 +413,7 @@
/dts/arm64/renesas/ @lorc @xakep-amatop
/dts/arm/quicklogic/ @fkokosinski @kgugala
/dts/arm/seeed_studio/ @str4t0m
/dts/arm/st/ @erwango
/dts/arm/st/h7/*stm32h735* @benediktibk
/dts/arm/st/l4/*stm32l451* @benediktibk
/dts/arm/ti/cc13?2* @bwitherspoon
@@ -432,7 +436,8 @@
/dts/riscv/ite/ @ite
/dts/riscv/microchip/microchip-miv.dtsi @galak
/dts/riscv/openisa/rv32m1* @dleach02
/dts/riscv/starfive/ @rajnesh-kanwal @pfarwsi
/dts/riscv/riscv32-litex-vexriscv.dtsi @mateusz-holenko @kgugala @pgielda
/dts/riscv/starfive/ @rajnesh-kanwal
/dts/riscv/andes/andes_v5* @cwshu @kevinwang821020 @jimmyzhe
/dts/riscv/niosv/ @sweeaun
/dts/arm/armv*m.dtsi @galak @ioannisg
@@ -463,8 +468,11 @@
/dts/bindings/*/nxp*s32* @manuargue
/dts/bindings/*/openisa* @dleach02
/dts/bindings/*/raspberrypi*pico* @yonsch
/dts/bindings/*/st* @erwango
/dts/bindings/sensor/ams* @alexanderwachter
/dts/bindings/*/sifive* @mateusz-holenko @kgugala @pgielda
/dts/bindings/*/litex* @mateusz-holenko @kgugala @pgielda
/dts/bindings/*/vexriscv* @mateusz-holenko @kgugala @pgielda
/dts/bindings/*/andes* @cwshu @kevinwang821020 @jimmyzhe
/dts/bindings/*/neorv32* @henrikbrixandersen
/dts/bindings/*/*lan91c111* @sgrrzhf

View File

@@ -1,19 +0,0 @@
# Constant variables to be used across Kconfig options
# Copyright (c) 2024 basalte bv
# SPDX-License-Identifier: Apache-2.0
INT8_MIN := -128
INT16_MIN := -32768
INT32_MIN := -2147483648
INT64_MIN := -9223372036854775808
INT8_MAX := 127
INT16_MAX := 32767
INT32_MAX := 2147483647
INT64_MAX := 9223372036854775807
UINT8_MAX := 255
UINT16_MAX := 65535
UINT32_MAX := 4294967295
UINT64_MAX := 18446744073709551615

View File

@@ -5,8 +5,6 @@
# Copyright (c) 2023 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
source "Kconfig.constants"
osource "${APPLICATION_SOURCE_DIR}/VERSION"
# Include Kconfig.defconfig files first so that they can override defaults and
@@ -318,13 +316,6 @@ config LINKER_USE_RELAX
endmenu # "Linker Sections"
config LINKER_ITERABLE_SUBALIGN
int
default 8 if 64BIT
default 4
help
Hidden option for the default subalignment of iterable sections.
config LINKER_DEVNULL_SUPPORT
bool
default y if CPU_CORTEX_M || (RISCV && !64BIT)
@@ -347,84 +338,6 @@ endmenu
menu "Compiler Options"
config REQUIRES_STD_C99
bool
help
Hidden option to select compiler support C99 standard or higher.
config REQUIRES_STD_C11
bool
select REQUIRES_STD_C99
help
Hidden option to select compiler support C11 standard or higher.
config REQUIRES_STD_C17
bool
select REQUIRES_STD_C11
help
Hidden option to select compiler support C17 standard or higher.
config REQUIRES_STD_C23
bool
select REQUIRES_STD_C17
help
Hidden option to select compiler support C23 standard or higher.
choice STD_C
prompt "C Standard"
default STD_C23 if REQUIRES_STD_C23
default STD_C17 if REQUIRES_STD_C17
default STD_C11 if REQUIRES_STD_C11
default STD_C99
help
C Standards.
config STD_C90
bool "C90"
depends on !REQUIRES_STD_C99
help
1989 C standard as completed in 1989 and ratified by ISO/IEC
as ISO/IEC 9899:1990. This version is known as "ANSI C".
config STD_C99
bool "C99"
depends on !REQUIRES_STD_C11
help
1999 C standard.
config STD_C11
bool "C11"
depends on !REQUIRES_STD_C17
help
2011 C standard.
config STD_C17
bool "C17"
depends on !REQUIRES_STD_C23
help
2017 C standard, addresses defects in C11 without introducing
new language features.
config STD_C23
bool "C23"
help
2023 C standard.
endchoice
config TOOLCHAIN_SUPPORTS_GNU_EXTENSIONS
bool
default y if "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "zephyr"
help
Hidden option to signal that toolchain supports GNU Extensions.
config GNU_C_EXTENSIONS
bool "GNU C Extensions"
depends on TOOLCHAIN_SUPPORTS_GNU_EXTENSIONS
help
Enable GNU C Extensions. GNU C provides several language features
not found in ISO standard C.
config CODING_GUIDELINE_CHECK
bool "Enforce coding guideline rules"
help
@@ -480,7 +393,6 @@ choice COMPILER_OPTIMIZATIONS
prompt "Optimization level"
default NO_OPTIMIZATIONS if COVERAGE
default DEBUG_OPTIMIZATIONS if DEBUG
default SIZE_OPTIMIZATIONS_AGGRESSIVE if "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "llvm"
default SIZE_OPTIMIZATIONS
help
Note that these flags shall only control the compiler
@@ -493,12 +405,6 @@ config SIZE_OPTIMIZATIONS
Compiler optimizations will be set to -Os independently of other
options.
config SIZE_OPTIMIZATIONS_AGGRESSIVE
bool "Aggressively optimize for size"
help
Compiler optimizations wil be set to -Oz independently of other
options.
config SPEED_OPTIMIZATIONS
bool "Optimize for speed"
help
@@ -523,9 +429,7 @@ endchoice
config LTO
bool "Link Time Optimization [EXPERIMENTAL]"
depends on !(GEN_ISR_TABLES || GEN_IRQ_VECTOR_TABLE) || ISR_TABLES_LOCAL_DECLARATION
depends on !NATIVE_LIBRARY
depends on !CODE_DATA_RELOCATION
depends on (!(GEN_ISR_TABLES || GEN_IRQ_VECTOR_TABLE) || ISR_TABLES_LOCAL_DECLARATION) && !NATIVE_LIBRARY
select EXPERIMENTAL
help
This option enables Link Time Optimization.
@@ -614,17 +518,17 @@ choice
config ASSERT_ON_ERRORS
bool "Assert on all errors"
help
Assert on errors covered with the CHECKIF() macro.
Assert on errors covered with the CHECK macro.
config NO_RUNTIME_CHECKS
bool "No runtime error checks"
help
Do not do any runtime checks or asserts when using the CHECKIF() macro.
Do not do any runtime checks or asserts when using the CHECK macro.
config RUNTIME_ERROR_CHECKS
bool "Runtime error checks"
help
Always perform runtime checks covered with the CHECKIF() macro. This
Always perform runtime checks covered with the CHECK macro. This
option is the default and the only option used during testing.
endchoice
@@ -661,17 +565,6 @@ config OUTPUT_DISASSEMBLE_ALL
The .lst file will contain complete disassembly of the firmware
not just those expected to contain instructions including zeros
config OUTPUT_DISASSEMBLY_WITH_SOURCE
bool "Include source code in output disassembly file"
default y
depends on OUTPUT_DISASSEMBLY && !OUTPUT_DISASSEMBLE_ALL
help
The .lst file will also contain the source code. Having
control over this can be useful for reproducible builds
since it can be used to remove one of the elements of
the .lst file that can vary across platforms because
of reasons such as having ".." include paths.
config OUTPUT_PRINT_MEMORY_USAGE
bool "Print memory usage to stdout"
default y
@@ -793,11 +686,6 @@ config BUILD_OUTPUT_STRIPPED
Build a stripped binary zephyr/zephyr.strip in the build directory.
The name of this file can be customized with CONFIG_KERNEL_BIN_NAME.
config BUILD_OUTPUT_COMPRESS_DEBUG_SECTIONS
bool "Compress debug sections in the ELF file"
help
Compress debug sections in the ELF file to reduce the file size.
config BUILD_OUTPUT_ADJUST_LMA
string
help
@@ -822,23 +710,6 @@ config BUILD_OUTPUT_ADJUST_LMA
default "$(dt_chosen_reg_addr_hex,$(DT_CHOSEN_IMAGE_M4))-\
$(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))"
config BUILD_OUTPUT_ADJUST_LMA_SECTIONS
def_string "*"
depends on BUILD_OUTPUT_ADJUST_LMA!=""
help
This determines the output sections to which the above LMA adjustment
will be applied.
The value can be the name of a section in the final ELF, like "text".
It can also be a pattern with wildcards, such as "*bss", which could
match more than one section name. Multiple such patterns can be given
as a ";"-separated list. It's possible to supply a 'negative' pattern
starting with "!", to exclude sections matched by a preceding pattern.
By default, all sections will have their LMA adjusted. The following
example excludes one section produced by the code relocation feature:
config BUILD_OUTPUT_ADJUST_LMA_SECTIONS
default "*;!.extflash_text_reloc"
config BUILD_OUTPUT_INFO_HEADER
bool "Create a image information header"
help
@@ -949,8 +820,6 @@ config DEPRECATED
help
Symbol that must be selected by a feature or module if it is
considered to be deprecated.
When adding this to an option, remember to follow the instructions in
https://docs.zephyrproject.org/latest/develop/api/api_lifecycle.html#deprecated
config WARN_DEPRECATED
bool
@@ -1034,6 +903,15 @@ config BOOTLOADER_SRAM_SIZE_DEPRECATED
Non-prompt symbol to indicate that the deprecated BOOTLOADER_SRAM_SIZE Kconfig has a
non-0 value. Please transition to using devicetree.
config BOOTLOADER_ESP_IDF
bool "ESP-IDF bootloader support"
depends on SOC_FAMILY_ESPRESSIF_ESP32 && !BOOTLOADER_MCUBOOT && !MCUBOOT
default y
help
This option will trigger the compilation of the ESP-IDF bootloader
inside the build folder.
At flash time, the bootloader will be flashed with the zephyr image
config BOOTLOADER_BOSSA
bool "BOSSA bootloader support"
select USE_DT_CODE_PARTITION
@@ -1076,20 +954,3 @@ config BOOTLOADER_BOSSA_ADAFRUIT_UF2
endchoice
endmenu
menu "Compatibility"
config LEGACY_GENERATED_INCLUDE_PATH
bool "Legacy include path for generated headers"
default y
help
Allow applications and libraries to use the Zephyr legacy include
path for the generated headers which does not use the `zephyr/` prefix.
From now on, i.e., the preferred way to include the `version.h` header is to
use <zephyr/version.h>, this Kconfig is currently enabled by default so that
user applications won't immediately fail to compile.
This Kconfig will be deprecated and eventually removed in the future releases.
endmenu

File diff suppressed because it is too large Load Diff

View File

@@ -10,15 +10,12 @@
</p>
</a>
<a href="https://bestpractices.coreinfrastructure.org/projects/74">
<img src="https://bestpractices.coreinfrastructure.org/projects/74/badge">
</a>
<a href="https://scorecard.dev/viewer/?uri=github.com/zephyrproject-rtos/zephyr">
<img src="https://api.securityscorecards.dev/projects/github.com/zephyrproject-rtos/zephyr/badge">
</a>
<a href="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml?query=branch%3Amain">
<img src="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml/badge.svg?event=push">
</a>
<a href="https://bestpractices.coreinfrastructure.org/projects/74"><img
src="https://bestpractices.coreinfrastructure.org/projects/74/badge"></a>
<a
href="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml?query=branch%3Amain">
<img
src="https://github.com/zephyrproject-rtos/zephyr/actions/workflows/twister.yaml/badge.svg?event=push"></a>
The Zephyr Project is a scalable real-time operating system (RTOS) supporting

View File

@@ -1 +1 @@
0.16.8
0.16.5

View File

@@ -1,5 +1,5 @@
VERSION_MAJOR = 3
VERSION_MINOR = 7
VERSION_MINOR = 6
PATCHLEVEL = 99
VERSION_TWEAK = 0
EXTRAVERSION =

View File

@@ -24,7 +24,6 @@ config ARC
imply XIP
select ARCH_HAS_THREAD_LOCAL_STORAGE
select ARCH_SUPPORTS_ROM_START
select ARCH_HAS_DIRECTED_IPIS
help
ARC architecture
@@ -32,7 +31,6 @@ config ARM
bool
select ARCH_IS_SET
select ARCH_SUPPORTS_COREDUMP if CPU_CORTEX_M
select ARCH_SUPPORTS_COREDUMP_THREADS if CPU_CORTEX_M
# FIXME: current state of the code for all ARM requires this, but
# is really only necessary for Cortex-M with ARM MPU!
select GEN_PRIV_STACKS
@@ -52,7 +50,6 @@ config ARM64
select USE_SWITCH_SUPPORTED
select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD
select BARRIER_OPERATIONS_ARCH
select ARCH_HAS_DIRECTED_IPIS
help
ARM64 (AArch64) architecture
@@ -88,13 +85,12 @@ config X86
select ARCH_HAS_GDBSTUB if !X86_64
select ARCH_HAS_TIMING_FUNCTIONS
select ARCH_HAS_THREAD_LOCAL_STORAGE
select ARCH_HAS_DEMAND_PAGING if !X86_64
select ARCH_HAS_DEMAND_PAGING
select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD
select NEED_LIBC_MEM_PARTITION if USERSPACE && TIMING_FUNCTIONS \
&& !BOARD_HAS_TIMING_FUNCTIONS \
&& !SOC_HAS_TIMING_FUNCTIONS
select ARCH_HAS_STACK_CANARIES_TLS
select ARCH_SUPPORTS_MEM_MAPPED_STACKS if X86_MMU && !DEMAND_PAGING
help
x86 architecture
@@ -111,15 +107,13 @@ config RISCV
bool
select ARCH_IS_SET
select ARCH_SUPPORTS_COREDUMP
select ARCH_SUPPORTS_ROM_START if !SOC_FAMILY_ESPRESSIF_ESP32
select ARCH_SUPPORTS_ROM_START if !SOC_SERIES_ESP32C3
select ARCH_HAS_CODE_DATA_RELOCATION
select ARCH_HAS_THREAD_LOCAL_STORAGE
select ARCH_HAS_STACKWALK
select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD
select USE_SWITCH_SUPPORTED
select USE_SWITCH
select SCHED_IPI_SUPPORTED if SMP
select ARCH_HAS_DIRECTED_IPIS
select BARRIER_OPERATIONS_BUILTIN
imply XIP
help
@@ -134,8 +128,6 @@ config XTENSA
select ARCH_HAS_CODE_DATA_RELOCATION
select ARCH_HAS_TIMING_FUNCTIONS
select ARCH_MEM_DOMAIN_DATA if USERSPACE
select ARCH_HAS_DIRECTED_IPIS
select THREAD_STACK_INFO
help
Xtensa architecture
@@ -151,12 +143,6 @@ config ARCH_POSIX
select BARRIER_OPERATIONS_BUILTIN
# POSIX arch based targets get their memory cleared on entry by the host OS
select SKIP_BSS_CLEAR
# Override the C standard used for compilation to C 2011
# This is due to some tests using _Static_assert which is a 2011 feature, but
# otherwise relying on compilers supporting it also when set to C99.
# This was in general ok, but with some host compilers and C library versions
# it led to problems. So we override it to 2011 for the native targets.
select REQUIRES_STD_C11
help
POSIX (native) architecture
@@ -216,7 +202,7 @@ config SRAM_BASE_ADDRESS
hex "SRAM Base Address"
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_SRAM))
help
The SRAM base address. The default value comes from
The SRAM base address. The default value comes from from
/chosen/zephyr,sram in devicetree. The user should generally avoid
changing it via menuconfig or in configuration files.
@@ -228,7 +214,6 @@ DT_CHOSEN_Z_FLASH := zephyr,flash
config FLASH_SIZE
int "Flash Size in kB"
default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K) if (XIP && (ARM ||ARM64)) || !ARM
default 0 if !XIP
help
This option specifies the size of the flash in kB. It is normally set by
the board's defconfig file and the user should generally avoid modifying
@@ -237,7 +222,6 @@ config FLASH_SIZE
config FLASH_BASE_ADDRESS
hex "Flash Base Address"
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) if (XIP && (ARM || ARM64)) || !ARM
default 0 if !XIP
help
This option specifies the base address of the flash on the board. It is
normally set by the board's defconfig file and the user should generally
@@ -407,21 +391,6 @@ config NOCACHE_MEMORY
transfers when cache coherence issues are not optimal or can not
be solved using cache maintenance operations.
config FRAME_POINTER
bool "Compile the kernel with frame pointers"
select OVERRIDE_FRAME_POINTER_DEFAULT
help
Select Y here to gain precise stack traces at the expense of slightly
increased size and decreased speed.
config ARCH_STACKWALK_MAX_FRAMES
int "Max depth for stack walk function"
default 8
depends on ARCH_HAS_STACKWALK
help
Depending on implementation, this can place a hard limit on the depths of the stack
for the stack walk function to examine.
menu "Interrupt Configuration"
config ISR_TABLES_LOCAL_DECLARATION_SUPPORTED
@@ -655,9 +624,6 @@ config ARCH_HAS_NESTED_EXCEPTION_DETECTION
config ARCH_SUPPORTS_COREDUMP
bool
config ARCH_SUPPORTS_COREDUMP_THREADS
bool
config ARCH_SUPPORTS_ARCH_HW_INIT
bool
@@ -670,11 +636,6 @@ config ARCH_HAS_EXTRA_EXCEPTION_INFO
config ARCH_HAS_GDBSTUB
bool
config ARCH_HAS_STACKWALK
bool
help
This is selected when the architecture implemented the arch_stack_walk() API.
config ARCH_HAS_COHERENCE
bool
help
@@ -693,11 +654,6 @@ config ARCH_HAS_SUSPEND_TO_RAM
config ARCH_HAS_STACK_CANARIES_TLS
bool
config ARCH_SUPPORTS_MEM_MAPPED_STACKS
bool
help
Select when the architecture supports memory mapped stacks.
#
# Other architecture related options
#
@@ -771,13 +727,6 @@ config ARCH_HAS_RESERVED_PAGE_FRAMES
memory mappings. The architecture will need to implement
arch_reserved_pages_update().
config ARCH_HAS_DIRECTED_IPIS
bool
help
This hidden configuration should be selected by the architecture if
it has an implementation for arch_sched_directed_ipi() which allows
for IPIs to be directed to specific CPUs.
config CPU_HAS_DCACHE
bool
help
@@ -813,7 +762,7 @@ config ARCH_MAPS_ALL_RAM
virtual addresses elsewhere, this is limited to only management of the
virtual address space. The kernel's page frame ontology will not consider
this mapping at all; non-kernel pages will be considered free (unless marked
as reserved) and K_MEM_PAGE_FRAME_MAPPED will not be set.
as reserved) and Z_PAGE_FRAME_MAPPED will not be set.
config DCLS
bool "Processor is configured in DCLS mode"
@@ -1078,28 +1027,9 @@ config TOOLCHAIN_HAS_BUILTIN_FFS
help
Hidden option to signal that toolchain has __builtin_ffs*().
config ARCH_HAS_CUSTOM_CPU_IDLE
bool
config ARCH_CPU_IDLE_CUSTOM
bool "Custom arch_cpu_idle implementation"
default n
help
This options allows applications to override the default arch idle implementation with
a custom one.
config ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
bool
help
This options allows applications to override the default arch idle implementation with
a custom one.
config ARCH_HAS_CUSTOM_SWAP_TO_MAIN
bool
help
It's possible that an architecture port cannot use _Swap() to swap to
the _main() thread, but instead must do something custom. It must
enable this option in that case.
config ARCH_HAS_CUSTOM_BUSY_WAIT
bool
help
It's possible that an architecture port cannot or does not want to use
the provided k_busy_wait(), but instead must do something custom. It must
enable this option in that case.

View File

@@ -18,7 +18,6 @@ config CPU_ARCEM
config CPU_ARCHS
bool
select ATOMIC_OPERATIONS_BUILTIN
select BARRIER_OPERATIONS_BUILTIN
help
This option signifies the use of an ARC HS CPU

View File

@@ -26,7 +26,6 @@ SECTION_VAR(BSS, z_arc_cpu_sleep_mode)
.align 4
.word 0
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
/*
* @brief Put the CPU in low-power mode
*
@@ -49,9 +48,7 @@ SECTION_FUNC(TEXT, arch_cpu_idle)
sleep r1
j_s [blink]
nop
#endif
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
/*
* @brief Put the CPU in low-power mode, entered with IRQs locked
*
@@ -59,7 +56,6 @@ SECTION_FUNC(TEXT, arch_cpu_idle)
*
* void arch_cpu_atomic_idle(unsigned int key)
*/
SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
#ifdef CONFIG_TRACING
@@ -74,4 +70,3 @@ SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
sleep r1
j_s.d [blink]
seti r0
#endif

View File

@@ -23,7 +23,7 @@
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_EXCEPTION_DEBUG
static void dump_arc_esf(const struct arch_esf *esf)
static void dump_arc_esf(const z_arch_esf_t *esf)
{
ARC_EXCEPTION_DUMP(" r0: 0x%" PRIxPTR " r1: 0x%" PRIxPTR " r2: 0x%" PRIxPTR
" r3: 0x%" PRIxPTR "", esf->r0, esf->r1, esf->r2, esf->r3);
@@ -42,7 +42,7 @@ static void dump_arc_esf(const struct arch_esf *esf)
}
#endif
void z_arc_fatal_error(unsigned int reason, const struct arch_esf *esf)
void z_arc_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
#ifdef CONFIG_EXCEPTION_DEBUG
if (esf != NULL) {

View File

@@ -53,8 +53,9 @@ static const struct z_exc_handle exceptions[] = {
*/
static bool z_check_thread_stack_fail(const uint32_t fault_addr, uint32_t sp)
{
#if defined(CONFIG_MULTITHREADING)
uint32_t guard_end, guard_start;
#if defined(CONFIG_MULTITHREADING)
const struct k_thread *thread = _current;
if (!thread) {
@@ -89,6 +90,7 @@ static bool z_check_thread_stack_fail(const uint32_t fault_addr, uint32_t sp)
guard_end = thread->stack_info.start;
guard_start = guard_end - Z_ARC_STACK_GUARD_SIZE;
}
#endif /* CONFIG_MULTITHREADING */
/* treat any MPU exceptions within the guard region as a stack
* overflow.As some instrustions
@@ -99,7 +101,6 @@ static bool z_check_thread_stack_fail(const uint32_t fault_addr, uint32_t sp)
if (fault_addr < guard_end && fault_addr >= guard_start) {
return true;
}
#endif /* CONFIG_MULTITHREADING */
return false;
}
@@ -346,7 +347,7 @@ static void dump_exception_info(uint32_t vector, uint32_t cause, uint32_t parame
* invokes the user provided routine k_sys_fatal_error_handler() which is
* responsible for implementing the error handling policy.
*/
void _Fault(struct arch_esf *esf, uint32_t old_sp)
void _Fault(z_arch_esf_t *esf, uint32_t old_sp)
{
uint32_t vector, cause, parameter;
uint32_t exc_addr = z_arc_v2_aux_reg_read(_ARC_V2_EFA);

View File

@@ -44,11 +44,11 @@ K_KERNEL_STACK_DEFINE(_firq_interrupt_stack, CONFIG_ARC_FIRQ_STACK_SIZE);
void z_arc_firq_stack_set(void)
{
#ifdef CONFIG_SMP
char *firq_sp = K_KERNEL_STACK_BUFFER(
char *firq_sp = Z_KERNEL_STACK_BUFFER(
_firq_interrupt_stack[z_arc_v2_core_id()]) +
CONFIG_ARC_FIRQ_STACK_SIZE;
#else
char *firq_sp = K_KERNEL_STACK_BUFFER(_firq_interrupt_stack) +
char *firq_sp = Z_KERNEL_STACK_BUFFER(_firq_interrupt_stack) +
CONFIG_ARC_FIRQ_STACK_SIZE;
#endif

View File

@@ -26,7 +26,7 @@ GTEXT(_isr_wrapper)
GTEXT(_isr_demux)
#if defined(CONFIG_PM)
GTEXT(pm_system_resume)
GTEXT(z_pm_save_idle_exit)
#endif
/*
@@ -253,7 +253,7 @@ rirq_path:
st 0, [r1, _kernel_offset_to_idle] /* zero idle duration */
PUSHR blink
jl pm_system_resume
jl z_pm_save_idle_exit
POPR blink
_skip_pm_save_idle_exit:

View File

@@ -35,7 +35,5 @@ config ARC_MPU
select GEN_PRIV_STACKS if !(ARC_MPU_VER = 4 || ARC_MPU_VER = 8)
select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(ARC_MPU_VER = 4 || ARC_MPU_VER = 8)
select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if (ARC_MPU_VER = 4 || ARC_MPU_VER = 8)
select ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS
select MEM_DOMAIN_ISOLATED_STACKS
help
Target has ARC MPU

View File

@@ -34,7 +34,7 @@ int arch_mem_domain_max_partitions_get(void)
/*
* Validate the given buffer is user accessible or not
*/
int arch_buffer_validate(const void *addr, size_t size, int write)
int arch_buffer_validate(void *addr, size_t size, int write)
{
return arc_core_mpu_buffer_validate(addr, size, write);
}

View File

@@ -207,7 +207,7 @@ int arc_core_mpu_get_max_domain_partition_regions(void)
/**
* @brief validate the given buffer is user accessible or not
*/
int arc_core_mpu_buffer_validate(const void *addr, size_t size, int write)
int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
{
/*
* For ARC MPU, smaller region number takes priority.

View File

@@ -118,7 +118,7 @@ static inline bool _is_enabled_region(uint32_t r_index)
}
/**
* This internal function check if the given buffer is in the region
* This internal function check if the given buffer in in the region
*/
static inline bool _is_in_region(uint32_t r_index, uint32_t start, uint32_t size)
{

View File

@@ -779,7 +779,7 @@ int arc_core_mpu_get_max_domain_partition_regions(void)
/**
* @brief validate the given buffer is user accessible or not
*/
int arc_core_mpu_buffer_validate(const void *addr, size_t size, int write)
int arc_core_mpu_buffer_validate(void *addr, size_t size, int write)
{
int r_index;
int key = arch_irq_lock();

View File

@@ -156,7 +156,7 @@ static inline bool _is_enabled_region(uint32_t r_index)
}
/**
* This internal function check if the given buffer is in the region
* This internal function check if the given buffer in in the region
*/
static inline bool _is_in_region(uint32_t r_index, uint32_t start, uint32_t size)
{

View File

@@ -13,7 +13,6 @@
#include <zephyr/kernel.h>
#include <zephyr/kernel_structs.h>
#include <ksched.h>
#include <ipi.h>
#include <zephyr/init.h>
#include <zephyr/irq.h>
#include <arc_irq_offload.h>
@@ -40,7 +39,7 @@ volatile char *arc_cpu_sp;
volatile _cpu_t *_curr_cpu[CONFIG_MP_MAX_NUM_CPUS];
/* Called from Zephyr initialization */
void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz,
void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
arch_cpustart_t fn, void *arg)
{
_curr_cpu[cpu_num] = &(_kernel.cpus[cpu_num]);
@@ -51,7 +50,7 @@ void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz,
* arc_cpu_wake_flag will protect arc_cpu_sp that
* only one slave cpu can read it per time
*/
arc_cpu_sp = K_KERNEL_STACK_BUFFER(stack) + sz;
arc_cpu_sp = Z_KERNEL_STACK_BUFFER(stack) + sz;
arc_cpu_wake_flag = cpu_num;
@@ -115,7 +114,7 @@ void arch_secondary_cpu_init(int cpu_num)
DT_IRQ(DT_NODELABEL(ici), priority), 0);
irq_enable(DT_IRQN(DT_NODELABEL(ici)));
#endif
/* call the function set by arch_cpu_start */
/* call the function set by arch_start_cpu */
fn = arc_cpu_init[cpu_num].fn;
fn(arc_cpu_init[cpu_num].arg);
@@ -131,27 +130,21 @@ static void sched_ipi_handler(const void *unused)
z_sched_ipi();
}
void arch_sched_directed_ipi(uint32_t cpu_bitmap)
/* arch implementation of sched_ipi */
void arch_sched_ipi(void)
{
unsigned int i;
unsigned int num_cpus = arch_num_cpus();
uint32_t i;
/* Send sched_ipi request to other cores
/* broadcast sched_ipi request to other cores
* if the target is current core, hardware will ignore it
*/
unsigned int num_cpus = arch_num_cpus();
for (i = 0U; i < num_cpus; i++) {
if ((cpu_bitmap & BIT(i)) != 0) {
z_arc_connect_ici_generate(i);
}
z_arc_connect_ici_generate(i);
}
}
void arch_sched_broadcast_ipi(void)
{
arch_sched_directed_ipi(IPI_ALL_CPUS_MASK);
}
int arch_smp_init(void)
{
struct arc_connect_bcr bcr;
@@ -195,4 +188,5 @@ int arch_smp_init(void)
return 0;
}
SYS_INIT(arch_smp_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif

View File

@@ -283,10 +283,10 @@ FUNC_NORETURN void z_arc_switch_to_main_no_multithreading(k_thread_entry_t main_
void *p1, void *p2, void *p3)
{
_kernel.cpus[0].id = 0;
_kernel.cpus[0].irq_stack = (K_KERNEL_STACK_BUFFER(z_interrupt_stacks[0]) +
_kernel.cpus[0].irq_stack = (Z_KERNEL_STACK_BUFFER(z_interrupt_stacks[0]) +
K_KERNEL_STACK_SIZEOF(z_interrupt_stacks[0]));
void *main_stack = (K_THREAD_STACK_BUFFER(z_main_stack) +
void *main_stack = (Z_THREAD_STACK_BUFFER(z_main_stack) +
K_THREAD_STACK_SIZEOF(z_main_stack));
arch_irq_unlock(_ARC_V2_INIT_IRQ_LOCK_KEY);

View File

@@ -36,7 +36,7 @@ extern "C" {
#endif
#ifdef CONFIG_ARC_HAS_SECURE
struct arch_esf {
struct _irq_stack_frame {
#ifdef CONFIG_ARC_HAS_ZOL
uintptr_t lp_end;
uintptr_t lp_start;
@@ -72,7 +72,7 @@ struct arch_esf {
uintptr_t status32;
};
#else
struct arch_esf {
struct _irq_stack_frame {
uintptr_t r0;
uintptr_t r1;
uintptr_t r2;
@@ -108,7 +108,7 @@ struct arch_esf {
};
#endif
typedef struct arch_esf _isf_t;
typedef struct _irq_stack_frame _isf_t;

View File

@@ -62,7 +62,9 @@ extern void z_arc_userspace_enter(k_thread_entry_t user_entry, void *p1,
void *p2, void *p3, uint32_t stack, uint32_t size,
struct k_thread *thread);
extern void z_arc_fatal_error(unsigned int reason, const struct arch_esf *esf);
extern void z_arc_fatal_error(unsigned int reason, const z_arch_esf_t *esf);
extern void arch_sched_ipi(void);
extern void z_arc_switch(void *switch_to, void **switched_from);

View File

@@ -7,7 +7,7 @@
#ifndef ZEPHYR_ARCH_ARC_INCLUDE_OFFSETS_SHORT_ARCH_H_
#define ZEPHYR_ARCH_ARC_INCLUDE_OFFSETS_SHORT_ARCH_H_
#include <zephyr/offsets.h>
#include <offsets.h>
/* kernel */

View File

@@ -1,9 +1,5 @@
# SPDX-License-Identifier: Apache-2.0
if(CONFIG_BIG_ENDIAN)
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-bigarm)
else()
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-littlearm)
endif()
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-littlearm)
add_subdirectory(core)

View File

@@ -34,71 +34,6 @@ config ARM_CUSTOM_INTERRUPT_CONTROLLER
is assumed that the custom interrupt control interface implementation
assumes responsibility for handling the NVIC.
config ROMSTART_RELOCATION_ROM
bool "Relocate rom_start region"
default n
help
Relocates the rom_start region containing the boot-vector data and
irq vectors to the region specified by configurations:
ROMSTART_REGION_ADDRESS and ROMSTART_REGION_SIZE
This is useful for the Linux Remoteproc framework that uses the elf-loader
such that it is able to load the correct boot-vector (contained in rom_start)
into the correct memory location independent of the chosen zephyr,flash
ROM region.
Most SOCs include an alias for the boot-vector at address 0x00000000
so a default which might be supported by the corresponding Linux rproc driver.
If it is not, additionnal options allows to specify the addresses.
In general this option should be chosen if the zephyr,flash chosen node
is not placed into the boot-vector memory area.
While this aims at generating a correct zephyr.elf file, it has the side
effect of enlarging the bin file. If the zephyr.bin file is used to boot the
secondary core, this option should be disabled.
Example:
on IMX7D, the chosen zephyr,flash can be OCRAM/OCRAM_S/TCM/DDR memories
for code location. But the boot-vector must be placed into OCRAM_S for the
CORTEX-M to boot (alias 0, real 0x00180000/32K available).
if ROMSTART_RELOCATION_ROM
config ROMSTART_REGION_ADDRESS
hex "Base address of the rom_start region"
default 0x00000000
help
Start address of the rom_start region.
This setting can be derived from a DT node reg property or specified directly.
A default value of 0x00000000 might work in most cases as SOCs have an alias
to the right memory region of the boot-vector.
Examples:
-IMX7D the boot-vector is OCRAM_S (0x00180000, aliased at 0x0).
-IMX6SX the boot-vector is TCML (0x007F8000, aliased at 0x0).
-IMX8MQ the boot-vector is TCML (0x007E0000, aliased at 0x0).
-IMX8MN the boot-vector is ITCM (0x007E0000, aliased at 0x0).
Example of DT definition:
$(dt_nodelabel_reg_addr_hex,ocram_s_sys)
config ROMSTART_REGION_SIZE
hex "Size of the rom_start region"
default 1
help
Size of the rom_start region in KB.
Default is 1KB which is enough to store the boot and irq vectors.
This setting can be derived from a DT node reg property or specified directly.
Example for IMX7D that needs the boot-vector into OCRAM_S (0x00180000):
$(dt_nodelabel_reg_size_hex,ocram_s_sys,0,K)
endif
config CODE_DATA_RELOCATION_SRAM
bool "Relocate code/data sections to SRAM"
depends on CPU_CORTEX_M

View File

@@ -60,7 +60,7 @@ config CPU_AARCH32_CORTEX_A
select USE_SWITCH_SUPPORTED
# GDBSTUB has not yet been tested on Cortex M or R SoCs
select ARCH_HAS_GDBSTUB
# GDB on ARM needs the extra registers
# GDB on ARM needs the etxra registers
select EXTRA_EXCEPTION_INFO if GDBSTUB
help
This option signifies the use of a CPU of the Cortex-A family.

View File

@@ -131,7 +131,6 @@ config AARCH32_ARMV8_R
bool
select ATOMIC_OPERATIONS_BUILTIN
select SCHED_IPI_SUPPORTED if SMP
select ARCH_HAS_DIRECTED_IPIS
help
This option signifies the use of an ARMv8-R AArch32 processor
implementation.

View File

@@ -26,6 +26,5 @@ extern void __start(void);
#define BOOT_PARAM_UDF_SP_OFFSET 16
#define BOOT_PARAM_SVC_SP_OFFSET 20
#define BOOT_PARAM_SYS_SP_OFFSET 24
#define BOOT_PARAM_VOTING_OFFSET 28
#endif /* _BOOT_H_ */

View File

@@ -49,7 +49,6 @@ _skip_\@:
#endif /* CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK */
.endm
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
SECTION_FUNC(TEXT, arch_cpu_idle)
#ifdef CONFIG_TRACING
push {r0, lr}
@@ -69,9 +68,6 @@ SECTION_FUNC(TEXT, arch_cpu_idle)
bx lr
#endif
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
#ifdef CONFIG_TRACING
push {r0, lr}
@@ -97,4 +93,3 @@ SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
_irq_disabled:
bx lr
#endif

View File

@@ -206,7 +206,7 @@ bool z_arm_fault_undef_instruction_fp(void)
*
* @return Returns true if the fault is fatal
*/
bool z_arm_fault_undef_instruction(struct arch_esf *esf)
bool z_arm_fault_undef_instruction(z_arch_esf_t *esf)
{
#if defined(CONFIG_FPU_SHARING)
/*
@@ -243,7 +243,7 @@ bool z_arm_fault_undef_instruction(struct arch_esf *esf)
*
* @return Returns true if the fault is fatal
*/
bool z_arm_fault_prefetch(struct arch_esf *esf)
bool z_arm_fault_prefetch(z_arch_esf_t *esf)
{
uint32_t reason = K_ERR_CPU_EXCEPTION;
@@ -299,7 +299,7 @@ static const struct z_exc_handle exceptions[] = {
*
* @return true if error is recoverable, otherwise return false.
*/
static bool memory_fault_recoverable(struct arch_esf *esf)
static bool memory_fault_recoverable(z_arch_esf_t *esf)
{
for (int i = 0; i < ARRAY_SIZE(exceptions); i++) {
/* Mask out instruction mode */
@@ -321,7 +321,7 @@ static bool memory_fault_recoverable(struct arch_esf *esf)
*
* @return Returns true if the fault is fatal
*/
bool z_arm_fault_data(struct arch_esf *esf)
bool z_arm_fault_data(z_arch_esf_t *esf)
{
uint32_t reason = K_ERR_CPU_EXCEPTION;

View File

@@ -71,7 +71,7 @@ void z_arm_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
}
#endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
void z_arm_fatal_error(unsigned int reason, const struct arch_esf *esf);
void z_arm_fatal_error(unsigned int reason, const z_arch_esf_t *esf);
/**
*
@@ -98,7 +98,7 @@ void _arch_isr_direct_pm(void)
if (_kernel.idle) {
_kernel.idle = 0;
pm_system_resume();
z_pm_save_idle_exit();
}
irq_unlock(key);

View File

@@ -156,7 +156,7 @@ _vfp_not_enabled:
* idle, this ensures that the calculation and programming of the
* device for the next timer deadline is not interrupted. For
* non-tickless idle, this ensures that the clearing of the kernel idle
* state is not interrupted. In each case, pm_system_resume
* state is not interrupted. In each case, z_pm_save_idle_exit
* is called with interrupts disabled.
*/
@@ -170,7 +170,7 @@ _vfp_not_enabled:
movs r1, #0
/* clear kernel idle state */
str r1, [r2, #_kernel_offset_to_idle]
bl pm_system_resume
bl z_pm_save_idle_exit
_idle_state_cleared:
#endif /* CONFIG_PM */
@@ -189,7 +189,7 @@ _idle_state_cleared:
*
* Note that interrupts are disabled up to this point on the ARM
* architecture variants other than the Cortex-M. It is also important
* to note that most interrupt controllers require that the nested
* to note that that most interrupt controllers require that the nested
* interrupts are handled after the active interrupt is acknowledged;
* this is be done through the `get_active` interrupt controller
* interface function.
@@ -269,7 +269,7 @@ SECTION_FUNC(TEXT, _isr_wrapper)
* idle, this ensures that the calculation and programming of the
* device for the next timer deadline is not interrupted. For
* non-tickless idle, this ensures that the clearing of the kernel idle
* state is not interrupted. In each case, pm_system_resume
* state is not interrupted. In each case, z_pm_save_idle_exit
* is called with interrupts disabled.
*/
@@ -283,7 +283,7 @@ SECTION_FUNC(TEXT, _isr_wrapper)
movs r1, #0
/* clear kernel idle state */
str r1, [r2, #_kernel_offset_to_idle]
bl pm_system_resume
bl z_pm_save_idle_exit
_idle_state_cleared:
#endif /* CONFIG_PM */
@@ -339,15 +339,6 @@ z_arm_cortex_ar_irq_done:
str r0, [r2, #___cpu_t_nested_OFFSET]
/* Do not context switch if exiting a nested interrupt */
cmp r0, #0
/* Note that this function is only called from `z_arm_svc`,
* while handling irq_offload, with below modes set:
* ```
* if (cpu interrupts are nested)
* mode=MODE_SYS
* else
* mode=MODE_IRQ
* ```
*/
bhi __EXIT_INT
/* retrieve pointer to the current thread */

View File

@@ -18,27 +18,6 @@
ubfx \rreg0, \rreg0, #0, #24
.endm
/*
* Get CPU logic id by looking up cpu_node_list
* returns
* reg0: MPID
* reg1: logic id (0 ~ CONFIG_MP_MAX_NUM_CPUS - 1)
* clobbers: reg0, reg1, reg2, reg3
*/
.macro get_cpu_logic_id reg0, reg1, reg2, reg3
get_cpu_id \reg0
ldr \reg3, =cpu_node_list
mov \reg1, #0
1: ldr \reg2, [\reg3, \reg1, lsl #2]
cmp \reg2, \reg0
beq 2f
add \reg1, \reg1, #1
cmp \reg1, #CONFIG_MP_MAX_NUM_CPUS
bne 1b
b .
2:
.endm
.macro get_cpu rreg0
/*
* Get CPU pointer.
@@ -54,7 +33,8 @@
*/
srsdb sp!, #MODE_SYS
cps #MODE_SYS
push {r0-r3, r12, lr}
stmdb sp, {r0-r3, r12, lr}^
sub sp, #24
/* TODO: EXTRA_EXCEPTION_INFO */
mov r0, sp

View File

@@ -200,62 +200,23 @@ EL1_Reset_Handler:
#endif /* CONFIG_DCLS */
ldr r0, =arm_cpu_boot_params
#if CONFIG_MP_MAX_NUM_CPUS > 1
/*
* This code uses voting locks, like arch/arm64/core/reset.S, to determine primary CPU.
*/
get_cpu_id r1
/*
* Get the "logic" id defined by cpu_node_list statically for voting lock self-identify.
* It is worth noting that this is NOT the final logic id (arch_curr_cpu()->id)
*/
get_cpu_logic_id r1, r2, r3, r4 // r1: MPID, r2: logic id
add r4, r0, #BOOT_PARAM_VOTING_OFFSET
/* signal our desire to vote */
mov r5, #1
strb r5, [r4, r2]
ldr r3, [r0, #BOOT_PARAM_MPID_OFFSET]
cmn r3, #1
beq 1f
/* some core already won, release */
mov r7, #0
strb r7, [r4, r2]
b _secondary_core
/* suggest current core then release */
1: str r1, [r0, #BOOT_PARAM_MPID_OFFSET]
strb r7, [r4, r2]
dmb
/* then wait until every core else is done voting */
mov r5, #0
2: ldrb r3, [r4, r5]
tst r3, #255
/* wait */
bne 2b
add r5, r5, #1
cmp r5, #CONFIG_MP_MAX_NUM_CPUS
bne 2b
/* check if current core won */
dmb
ldr r3, [r0, #BOOT_PARAM_MPID_OFFSET]
cmp r3, r1
ldrex r2, [r0, #BOOT_PARAM_MPID_OFFSET]
cmp r2, #-1
bne 1f
strex r3, r1, [r0, #BOOT_PARAM_MPID_OFFSET]
cmp r3, #0
beq _primary_core
/* fallthrough secondary */
/* loop until our turn comes */
_secondary_core:
dmb
1:
dmb ld
ldr r2, [r0, #BOOT_PARAM_MPID_OFFSET]
cmp r1, r2
bne _secondary_core
bne 1b
/* we can now load our stack pointer values and move on */
/* we can now move on */
ldr r4, =arch_secondary_cpu_init
ldr r5, [r0, #BOOT_PARAM_FIQ_SP_OFFSET]
ldr r6, [r0, #BOOT_PARAM_IRQ_SP_OFFSET]

View File

@@ -7,7 +7,6 @@
#include <zephyr/kernel.h>
#include <zephyr/arch/arm/cortex_a_r/lib_helpers.h>
#include <zephyr/drivers/interrupt_controller/gic.h>
#include <ipi.h>
#include "boot.h"
#include "zephyr/cache.h"
#include "zephyr/kernel/thread_stack.h"
@@ -51,7 +50,6 @@ struct boot_params {
char *udf_sp;
char *svc_sp;
char *sys_sp;
uint8_t voting[CONFIG_MP_MAX_NUM_CPUS];
arch_cpustart_t fn;
void *arg;
int cpu_num;
@@ -65,7 +63,6 @@ BUILD_ASSERT(offsetof(struct boot_params, abt_sp) == BOOT_PARAM_ABT_SP_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, udf_sp) == BOOT_PARAM_UDF_SP_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, svc_sp) == BOOT_PARAM_SVC_SP_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, sys_sp) == BOOT_PARAM_SYS_SP_OFFSET);
BUILD_ASSERT(offsetof(struct boot_params, voting) == BOOT_PARAM_VOTING_OFFSET);
volatile struct boot_params arm_cpu_boot_params = {
.mpid = -1,
@@ -77,7 +74,7 @@ volatile struct boot_params arm_cpu_boot_params = {
.sys_sp = (char *)(z_arm_sys_stack + CONFIG_ARMV7_SYS_STACK_SIZE),
};
const uint32_t cpu_node_list[] = {
static const uint32_t cpu_node_list[] = {
DT_FOREACH_CHILD_STATUS_OKAY_SEP(DT_PATH(cpus), DT_REG_ADDR, (,))};
/* cpu_map saves the maping of core id and mpid */
@@ -93,7 +90,7 @@ extern int z_arm_mmu_init(void);
#endif
/* Called from Zephyr initialization */
void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz, arch_cpustart_t fn, void *arg)
void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz, arch_cpustart_t fn, void *arg)
{
int cpu_count, i, j;
uint32_t cpu_mpid = 0;
@@ -123,16 +120,16 @@ void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz, arch_cpustart_
}
/* Pass stack address to secondary core */
arm_cpu_boot_params.irq_sp = K_KERNEL_STACK_BUFFER(stack) + sz;
arm_cpu_boot_params.fiq_sp = K_KERNEL_STACK_BUFFER(z_arm_fiq_stack[cpu_num])
arm_cpu_boot_params.irq_sp = Z_KERNEL_STACK_BUFFER(stack) + sz;
arm_cpu_boot_params.fiq_sp = Z_KERNEL_STACK_BUFFER(z_arm_fiq_stack[cpu_num])
+ CONFIG_ARMV7_FIQ_STACK_SIZE;
arm_cpu_boot_params.abt_sp = K_KERNEL_STACK_BUFFER(z_arm_abort_stack[cpu_num])
arm_cpu_boot_params.abt_sp = Z_KERNEL_STACK_BUFFER(z_arm_abort_stack[cpu_num])
+ CONFIG_ARMV7_EXCEPTION_STACK_SIZE;
arm_cpu_boot_params.udf_sp = K_KERNEL_STACK_BUFFER(z_arm_undef_stack[cpu_num])
arm_cpu_boot_params.udf_sp = Z_KERNEL_STACK_BUFFER(z_arm_undef_stack[cpu_num])
+ CONFIG_ARMV7_EXCEPTION_STACK_SIZE;
arm_cpu_boot_params.svc_sp = K_KERNEL_STACK_BUFFER(z_arm_svc_stack[cpu_num])
arm_cpu_boot_params.svc_sp = Z_KERNEL_STACK_BUFFER(z_arm_svc_stack[cpu_num])
+ CONFIG_ARMV7_SVC_STACK_SIZE;
arm_cpu_boot_params.sys_sp = K_KERNEL_STACK_BUFFER(z_arm_sys_stack[cpu_num])
arm_cpu_boot_params.sys_sp = Z_KERNEL_STACK_BUFFER(z_arm_sys_stack[cpu_num])
+ CONFIG_ARMV7_SYS_STACK_SIZE;
arm_cpu_boot_params.fn = fn;
@@ -213,7 +210,7 @@ void arch_secondary_cpu_init(void)
#ifdef CONFIG_SMP
static void send_ipi(unsigned int ipi, uint32_t cpu_bitmap)
static void broadcast_ipi(unsigned int ipi)
{
uint32_t mpidr = MPIDR_TO_CORE(GET_MPIDR());
@@ -223,10 +220,6 @@ static void send_ipi(unsigned int ipi, uint32_t cpu_bitmap)
unsigned int num_cpus = arch_num_cpus();
for (int i = 0; i < num_cpus; i++) {
if ((cpu_bitmap & BIT(i)) == 0) {
continue;
}
uint32_t target_mpidr = cpu_map[i];
uint8_t aff0;
@@ -246,14 +239,10 @@ void sched_ipi_handler(const void *unused)
z_sched_ipi();
}
void arch_sched_broadcast_ipi(void)
/* arch implementation of sched_ipi */
void arch_sched_ipi(void)
{
send_ipi(SGI_SCHED_IPI, IPI_ALL_CPUS_MASK);
}
void arch_sched_directed_ipi(uint32_t cpu_bitmap)
{
send_ipi(SGI_SCHED_IPI, cpu_bitmap);
broadcast_ipi(SGI_SCHED_IPI);
}
int arch_smp_init(void)
@@ -270,4 +259,6 @@ int arch_smp_init(void)
return 0;
}
SYS_INIT(arch_smp_init, PRE_KERNEL_2, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif

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@@ -28,7 +28,7 @@ void z_arm_init_stacks(void)
memset(z_arm_svc_stack, 0xAA, CONFIG_ARMV7_SVC_STACK_SIZE);
memset(z_arm_abort_stack, 0xAA, CONFIG_ARMV7_EXCEPTION_STACK_SIZE);
memset(z_arm_undef_stack, 0xAA, CONFIG_ARMV7_EXCEPTION_STACK_SIZE);
memset(K_KERNEL_STACK_BUFFER(z_interrupt_stacks[0]), 0xAA,
memset(Z_KERNEL_STACK_BUFFER(z_interrupt_stacks[0]), 0xAA,
K_KERNEL_STACK_SIZEOF(z_interrupt_stacks[0]));
}
#endif

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@@ -14,7 +14,6 @@
*/
#include <zephyr/kernel.h>
#include <zephyr/llext/symbol.h>
#include <ksched.h>
#include <zephyr/sys/barrier.h>
#include <stdbool.h>
@@ -95,10 +94,6 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
iframe->a4 = (uint32_t)p3;
iframe->xpsr = A_BIT | MODE_SYS;
#if defined(CONFIG_BIG_ENDIAN)
iframe->xpsr |= E_BIT;
#endif /* CONFIG_BIG_ENDIAN */
#if defined(CONFIG_COMPILER_ISA_THUMB2)
iframe->xpsr |= T_BIT;
#endif /* CONFIG_COMPILER_ISA_THUMB2 */
@@ -252,7 +247,7 @@ bool z_arm_thread_is_in_user_mode(void)
value = __get_CPSR();
return ((value & CPSR_M_Msk) == CPSR_M_USR);
}
EXPORT_SYMBOL(z_arm_thread_is_in_user_mode);
#endif
#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
@@ -365,7 +360,7 @@ uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, const uint32_t psp
guard_len,
fault_addr, psp)) {
/* Thread stack corruption */
return (uint32_t)K_THREAD_STACK_BUFFER(z_main_stack);
return (uint32_t)Z_THREAD_STACK_BUFFER(z_main_stack);
}
#endif
#endif /* CONFIG_USERSPACE */

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@@ -41,11 +41,6 @@ SECTION_SUBSEC_FUNC(exc_vector_table,_vector_table_section,_vector_table)
GTEXT(z_arm_cortex_ar_exit_exc)
SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_cortex_ar_exit_exc)
/* Note:
* This function is expected to be *always* called with
* processor mode set to MODE_SYS.
*/
/* decrement exception depth */
get_cpu r2
ldrb r1, [r2, #_cpu_offset_to_exc_depth]
@@ -56,6 +51,7 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_cortex_ar_exit_exc)
* Restore r0-r3, r12, lr, lr_und and spsr_und from the exception stack
* and return to the current thread.
*/
pop {r0-r3, r12, lr}
ldmia sp, {r0-r3, r12, lr}^
add sp, #24
rfeia sp!
#endif

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@@ -3,7 +3,7 @@
zephyr_library()
zephyr_library_sources(
exc_exit.c
exc_exit.S
fault.c
fault_s.S
fpu.c
@@ -16,11 +16,11 @@ zephyr_library_sources(
irq_manage.c
prep_c.c
thread.c
cpu_idle.c
cpu_idle.S
)
zephyr_library_sources_ifndef(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER irq_init.c)
zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr_wrapper.c)
zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr_wrapper.S)
zephyr_library_sources_ifdef(CONFIG_DEBUG_COREDUMP coredump.c)
zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE __aeabi_read_tp.S)
zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c)

View File

@@ -73,17 +73,6 @@ config CPU_CORTEX_M55
help
This option signifies the use of a Cortex-M55 CPU
config CPU_CORTEX_M85
bool
select CPU_CORTEX_M
select ARMV8_1_M_MAINLINE
select ARMV8_M_SE if CPU_HAS_TEE
select ARMV7_M_ARMV8_M_FP if CPU_HAS_FPU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE
help
This option signifies the use of a Cortex-M85 CPU
config CPU_CORTEX_M7
bool
select CPU_CORTEX_M
@@ -330,7 +319,7 @@ config ZERO_LATENCY_IRQS
config ZERO_LATENCY_LEVELS
int "Number of interrupt priority levels reserved for zero latency"
depends on ZERO_LATENCY_IRQS
range 1 $(UINT8_MAX)
range 1 255
help
The amount of interrupt priority levels reserved for zero latency
interrupts. Increase this value to reserve more than one priority

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@@ -12,14 +12,8 @@ GTEXT(__aeabi_read_tp)
GDATA(z_arm_tls_ptr)
/* Grab the TLS pointer and store in R0.
* According to the Run-Time ABI for the Arm® Architecture section 5.3.5, this
* function may only clobber r0, ip, lr & CPSR.
*
* This can only be guaranteed by either implementing a naked C function with
* inline assembly, or plain assembly.
*/
SECTION_FUNC(TEXT, __aeabi_read_tp)
/* Grab the TLS pointer and store in R0 */
ldr r0, =z_arm_tls_ptr
ldr r0, [r0]
bx lr

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@@ -41,7 +41,7 @@ struct arm_arch_block {
*/
static struct arm_arch_block arch_blk;
void arch_coredump_info_dump(const struct arch_esf *esf)
void arch_coredump_info_dump(const z_arch_esf_t *esf)
{
struct coredump_arch_hdr_t hdr = {
.id = COREDUMP_ARCH_HDR_ID,

View File

@@ -0,0 +1,201 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief ARM Cortex-M power management
*
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#if defined(CONFIG_ARM_ON_EXIT_CPU_IDLE)
#include <soc_cpu_idle.h>
#endif
_ASM_FILE_PROLOGUE
GTEXT(z_arm_cpu_idle_init)
GTEXT(arch_cpu_idle)
GTEXT(arch_cpu_atomic_idle)
#define _SCB_SCR 0xE000ED10
#define _SCB_SCR_SEVONPEND (1 << 4)
#define _SCB_SCR_SLEEPDEEP (1 << 2)
#define _SCB_SCR_SLEEPONEXIT (1 << 1)
#define _SCR_INIT_BITS _SCB_SCR_SEVONPEND
.macro _sleep_if_allowed wait_instruction
#if defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK)
push {r0, lr}
bl z_arm_on_enter_cpu_idle
/* Skip the wait instruction if on_enter_cpu_idle() returns false. */
cmp r0, #0
beq _skip_\@
#endif /* CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK */
/*
* Wait for all memory transactions to complete before entering low
* power state.
*/
dsb
\wait_instruction
#if defined(CONFIG_ARM_ON_EXIT_CPU_IDLE)
/* Inline the macro provided by SoC-specific code */
SOC_ON_EXIT_CPU_IDLE
#endif /* CONFIG_ARM_ON_EXIT_CPU_IDLE */
#if defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK)
_skip_\@:
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
pop {r0, r1}
mov lr, r1
#else
pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif /* CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK */
.endm
/**
*
* @brief Initialization of CPU idle
*
* Only called by arch_kernel_init(). Sets SEVONPEND bit once for the system's
* duration.
*
* C function prototype:
*
* void z_arm_cpu_idle_init(void);
*/
SECTION_FUNC(TEXT, z_arm_cpu_idle_init)
ldr r1, =_SCB_SCR
movs.n r2, #_SCR_INIT_BITS
str r2, [r1]
bx lr
SECTION_FUNC(TEXT, arch_cpu_idle)
#if defined(CONFIG_TRACING) || \
defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK)
push {r0, lr}
#ifdef CONFIG_TRACING
bl sys_trace_idle
#endif
#ifdef CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK
bl z_arm_on_enter_cpu_idle_prepare
#endif
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
pop {r0, r1}
mov lr, r1
#else
pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/*
* PRIMASK is always cleared on ARMv7-M and ARMv8-M Mainline (not used
* for interrupt locking), and configuring BASEPRI to the lowest
* priority to ensure wake-up will cause interrupts to be serviced
* before entering low power state.
*
* Set PRIMASK before configuring BASEPRI to prevent interruption
* before wake-up.
*/
cpsid i
/*
* Set wake-up interrupt priority to the lowest and synchronise to
* ensure that this is visible to the WFI instruction.
*/
eors.n r0, r0
msr BASEPRI, r0
isb
#else
/*
* For all the other ARM architectures that do not implement BASEPRI,
* PRIMASK is used as the interrupt locking mechanism, and it is not
* necessary to set PRIMASK here, as PRIMASK would have already been
* set by the caller as part of interrupt locking if necessary
* (i.e. if the caller sets _kernel.idle).
*/
#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE */
/* Enter low power state */
_sleep_if_allowed wfi
/*
* Clear PRIMASK and flush instruction buffer to immediately service
* the wake-up interrupt.
*/
cpsie i
isb
bx lr
SECTION_FUNC(TEXT, arch_cpu_atomic_idle)
#if defined(CONFIG_TRACING) || \
defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK)
push {r0, lr}
#ifdef CONFIG_TRACING
bl sys_trace_idle
#endif
#ifdef CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK
bl z_arm_on_enter_cpu_idle_prepare
#endif
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
pop {r0, r1}
mov lr, r1
#else
pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif
/*
* Lock PRIMASK while sleeping: wfe will still get interrupted by
* incoming interrupts but the CPU will not service them right away.
*/
cpsid i
/*
* No need to set SEVONPEND, it's set once in z_arm_cpu_idle_init()
* and never touched again.
*/
/* r0: interrupt mask from caller */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* No BASEPRI, call wfe directly
* (SEVONPEND is set in z_arm_cpu_idle_init())
*/
_sleep_if_allowed wfe
cmp r0, #0
bne _irq_disabled
cpsie i
_irq_disabled:
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* r1: zero, for setting BASEPRI (needs a register) */
eors.n r1, r1
/* unlock BASEPRI so wfe gets interrupted by incoming interrupts */
msr BASEPRI, r1
_sleep_if_allowed wfe
msr BASEPRI, r0
cpsie i
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
bx lr

View File

@@ -1,141 +0,0 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright (c) 2023 Arm Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief ARM Cortex-M power management
*/
#include <zephyr/kernel.h>
#include <cmsis_core.h>
#if defined(CONFIG_ARM_ON_EXIT_CPU_IDLE)
#include <soc_cpu_idle.h>
#endif
/**
* @brief Initialization of CPU idle
*
* Only called by arch_kernel_init(). Sets SEVONPEND bit once for the system's
* duration.
*/
void z_arm_cpu_idle_init(void)
{
SCB->SCR = SCB_SCR_SEVONPEND_Msk;
}
#if defined(CONFIG_ARM_ON_EXIT_CPU_IDLE)
#define ON_EXIT_IDLE_HOOK SOC_ON_EXIT_CPU_IDLE
#else
#define ON_EXIT_IDLE_HOOK do {} while (false)
#endif
#if defined(CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK)
#define SLEEP_IF_ALLOWED(wait_instr) do { \
/* Skip the wait instr if on_enter_cpu_idle returns false */ \
if (z_arm_on_enter_cpu_idle()) { \
/* Wait for all memory transaction to complete */ \
/* before entering low power state. */ \
__DSB(); \
wait_instr(); \
/* Inline the macro provided by SoC-specific code */ \
ON_EXIT_IDLE_HOOK; \
} \
} while (false)
#else
#define SLEEP_IF_ALLOWED(wait_instr) do { \
__DSB(); \
wait_instr(); \
ON_EXIT_IDLE_HOOK; \
} while (false)
#endif
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE
void arch_cpu_idle(void)
{
#if defined(CONFIG_TRACING)
sys_trace_idle();
#endif
#if CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK
z_arm_on_enter_cpu_idle_prepare();
#endif
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/*
* PRIMASK is always cleared on ARMv7-M and ARMv8-M (not used
* for interrupt locking), and configuring BASEPRI to the lowest
* priority to ensure wake-up will cause interrupts to be serviced
* before entering low power state.
*
* Set PRIMASK before configuring BASEPRI to prevent interruption
* before wake-up.
*/
__disable_irq();
/*
* Set wake-up interrupt priority to the lowest and synchronize to
* ensure that this is visible to the WFI instruction.
*/
__set_BASEPRI(0);
__ISB();
#else
/*
* For all the other ARM architectures that do not implement BASEPRI,
* PRIMASK is used as the interrupt locking mechanism, and it is not
* necessary to set PRIMASK here, as PRIMASK would have already been
* set by the caller as part of interrupt locking if necessary
* (i.e. if the caller sets _kernel.idle).
*/
#endif
SLEEP_IF_ALLOWED(__WFI);
__enable_irq();
__ISB();
}
#endif
#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
void arch_cpu_atomic_idle(unsigned int key)
{
#if defined(CONFIG_TRACING)
sys_trace_idle();
#endif
#if CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK
z_arm_on_enter_cpu_idle_prepare();
#endif
/*
* Lock PRIMASK while sleeping: wfe will still get interrupted by
* incoming interrupts but the CPU will not service them right away.
*/
__disable_irq();
/*
* No need to set SEVONPEND, it's set once in z_arm_cpu_idle_init()
* and never touched again.
*/
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* No BASEPRI, call wfe directly. (SEVONPEND is set in z_arm_cpu_idle_init()) */
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* unlock BASEPRI so wfe gets interrupted by incoming interrupts */
__set_BASEPRI(0);
__ISB();
#else
#error Unsupported architecture
#endif
SLEEP_IF_ALLOWED(__WFE);
arch_irq_unlock(key);
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
__enable_irq();
#endif
}
#endif

View File

@@ -0,0 +1,98 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief ARM Cortex-M exception/interrupt exit API
*
* Provides functions for performing kernel handling when exiting exceptions or
* interrupts that are installed directly in the vector table (i.e. that are not
* wrapped around by _isr_wrapper()).
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <offsets_short.h>
#include <zephyr/arch/cpu.h>
_ASM_FILE_PROLOGUE
GTEXT(z_arm_exc_exit)
GTEXT(z_arm_int_exit)
GDATA(_kernel)
/**
*
* @brief Kernel housekeeping when exiting interrupt handler installed
* directly in vector table
*
* Kernel allows installing interrupt handlers (ISRs) directly into the vector
* table to get the lowest interrupt latency possible. This allows the ISR to
* be invoked directly without going through a software interrupt table.
* However, upon exiting the ISR, some kernel work must still be performed,
* namely possible context switching. While ISRs connected in the software
* interrupt table do this automatically via a wrapper, ISRs connected directly
* in the vector table must invoke z_arm_int_exit() as the *very last* action
* before returning.
*
* e.g.
*
* void myISR(void)
* {
* printk("in %s\n", __FUNCTION__);
* doStuff();
* z_arm_int_exit();
* }
*
*/
SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_int_exit)
/* z_arm_int_exit falls through to z_arm_exc_exit (they are aliases of each
* other)
*/
/**
*
* @brief Kernel housekeeping when exiting exception handler installed
* directly in vector table
*
* See z_arm_int_exit().
*
*/
SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_exc_exit)
#ifdef CONFIG_PREEMPT_ENABLED
ldr r3, =_kernel
ldr r1, [r3, #_kernel_offset_to_current]
ldr r0, [r3, #_kernel_offset_to_ready_q_cache]
cmp r0, r1
beq _EXIT_EXC
/* context switch required, pend the PendSV exception */
ldr r1, =_SCS_ICSR
ldr r2, =_SCS_ICSR_PENDSV
str r2, [r1]
_ExcExitWithGdbStub:
_EXIT_EXC:
#endif /* CONFIG_PREEMPT_ENABLED */
#ifdef CONFIG_STACK_SENTINEL
push {r0, lr}
bl z_check_stack_sentinel
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
pop {r0, r1}
mov lr, r1
#else
pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif /* CONFIG_STACK_SENTINEL */
bx lr

View File

@@ -1,71 +0,0 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright (c) 2023 Arm Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief ARM Cortex-M exception/interrupt exit API
*
* Provides functions for performing kernel handling when exiting exceptions or
* interrupts that are installed directly in the vector table (i.e. that are not
* wrapped around by _isr_wrapper()).
*/
#include <zephyr/kernel.h>
#include <kswap.h>
#include <cmsis_core.h>
/**
*
* @brief Kernel housekeeping when exiting interrupt handler installed
* directly in vector table
*
* Kernel allows installing interrupt handlers (ISRs) directly into the vector
* table to get the lowest interrupt latency possible. This allows the ISR to
* be invoked directly without going through a software interrupt table.
* However, upon exiting the ISR, some kernel work must still be performed,
* namely possible context switching. While ISRs connected in the software
* interrupt table do this automatically via a wrapper, ISRs connected directly
* in the vector table must invoke z_arm_int_exit() as the *very last* action
* before returning.
*
* e.g.
*
* void myISR(void)
* {
* printk("in %s\n", __FUNCTION__);
* doStuff();
* z_arm_int_exit();
* }
*
*/
FUNC_ALIAS(z_arm_exc_exit, z_arm_int_exit, void);
/**
*
* @brief Kernel housekeeping when exiting exception handler installed
* directly in vector table
*
* See z_arm_int_exit().
*
*/
Z_GENERIC_SECTION(.text._HandlerModeExit) void z_arm_exc_exit(void)
{
#ifdef CONFIG_PREEMPT_ENABLED
/* If thread is preemptible */
if (_kernel.cpus->current->base.prio >= 0) {
/* and cached thread is not current thread */
if (_kernel.ready_q.cache != _kernel.cpus->current) {
/* trigger a context switch */
SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk;
}
}
#endif /* CONFIG_PREEMPT_ENABLED */
#ifdef CONFIG_STACK_SENTINEL
z_check_stack_sentinel();
#endif /* CONFIG_STACK_SENTINEL */
}

View File

@@ -146,7 +146,7 @@ LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
*/
#if (CONFIG_FAULT_DUMP == 1)
static void fault_show(const struct arch_esf *esf, int fault)
static void fault_show(const z_arch_esf_t *esf, int fault)
{
PR_EXC("Fault! EXC #%d", fault);
@@ -165,7 +165,7 @@ static void fault_show(const struct arch_esf *esf, int fault)
*
* For Dump level 0, no information needs to be generated.
*/
static void fault_show(const struct arch_esf *esf, int fault)
static void fault_show(const z_arch_esf_t *esf, int fault)
{
(void)esf;
(void)fault;
@@ -185,7 +185,7 @@ static const struct z_exc_handle exceptions[] = {
*
* @return true if error is recoverable, otherwise return false.
*/
static bool memory_fault_recoverable(struct arch_esf *esf, bool synchronous)
static bool memory_fault_recoverable(z_arch_esf_t *esf, bool synchronous)
{
#ifdef CONFIG_USERSPACE
for (int i = 0; i < ARRAY_SIZE(exceptions); i++) {
@@ -228,7 +228,7 @@ uint32_t z_check_thread_stack_fail(const uint32_t fault_addr,
*
* @return error code to identify the fatal error reason
*/
static uint32_t mem_manage_fault(struct arch_esf *esf, int from_hard_fault,
static uint32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault,
bool *recoverable)
{
uint32_t reason = K_ERR_ARM_MEM_GENERIC;
@@ -387,7 +387,7 @@ static uint32_t mem_manage_fault(struct arch_esf *esf, int from_hard_fault,
* @return error code to identify the fatal error reason.
*
*/
static int bus_fault(struct arch_esf *esf, int from_hard_fault, bool *recoverable)
static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable)
{
uint32_t reason = K_ERR_ARM_BUS_GENERIC;
@@ -549,7 +549,7 @@ static int bus_fault(struct arch_esf *esf, int from_hard_fault, bool *recoverabl
*
* @return error code to identify the fatal error reason
*/
static uint32_t usage_fault(const struct arch_esf *esf)
static uint32_t usage_fault(const z_arch_esf_t *esf)
{
uint32_t reason = K_ERR_ARM_USAGE_GENERIC;
@@ -612,7 +612,7 @@ static uint32_t usage_fault(const struct arch_esf *esf)
*
* @return error code to identify the fatal error reason
*/
static uint32_t secure_fault(const struct arch_esf *esf)
static uint32_t secure_fault(const z_arch_esf_t *esf)
{
uint32_t reason = K_ERR_ARM_SECURE_GENERIC;
@@ -661,7 +661,7 @@ static uint32_t secure_fault(const struct arch_esf *esf)
* See z_arm_fault_dump() for example.
*
*/
static void debug_monitor(struct arch_esf *esf, bool *recoverable)
static void debug_monitor(z_arch_esf_t *esf, bool *recoverable)
{
*recoverable = false;
@@ -687,7 +687,7 @@ static void debug_monitor(struct arch_esf *esf, bool *recoverable)
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
static inline bool z_arm_is_synchronous_svc(struct arch_esf *esf)
static inline bool z_arm_is_synchronous_svc(z_arch_esf_t *esf)
{
uint16_t *ret_addr = (uint16_t *)esf->basic.pc;
/* SVC is a 16-bit instruction. On a synchronous SVC
@@ -762,7 +762,7 @@ static inline bool z_arm_is_pc_valid(uintptr_t pc)
*
* @return error code to identify the fatal error reason
*/
static uint32_t hard_fault(struct arch_esf *esf, bool *recoverable)
static uint32_t hard_fault(z_arch_esf_t *esf, bool *recoverable)
{
uint32_t reason = K_ERR_CPU_EXCEPTION;
@@ -829,7 +829,7 @@ static uint32_t hard_fault(struct arch_esf *esf, bool *recoverable)
* See z_arm_fault_dump() for example.
*
*/
static void reserved_exception(const struct arch_esf *esf, int fault)
static void reserved_exception(const z_arch_esf_t *esf, int fault)
{
ARG_UNUSED(esf);
@@ -839,7 +839,7 @@ static void reserved_exception(const struct arch_esf *esf, int fault)
}
/* Handler function for ARM fault conditions. */
static uint32_t fault_handle(struct arch_esf *esf, int fault, bool *recoverable)
static uint32_t fault_handle(z_arch_esf_t *esf, int fault, bool *recoverable)
{
uint32_t reason = K_ERR_CPU_EXCEPTION;
@@ -893,7 +893,7 @@ static uint32_t fault_handle(struct arch_esf *esf, int fault, bool *recoverable)
*
* @param secure_esf Pointer to the secure stack frame.
*/
static void secure_stack_dump(const struct arch_esf *secure_esf)
static void secure_stack_dump(const z_arch_esf_t *secure_esf)
{
/*
* In case a Non-Secure exception interrupted the Secure
@@ -918,7 +918,7 @@ static void secure_stack_dump(const struct arch_esf *secure_esf)
* Non-Secure exception entry.
*/
top_of_sec_stack += ADDITIONAL_STATE_CONTEXT_WORDS;
secure_esf = (const struct arch_esf *)top_of_sec_stack;
secure_esf = (const z_arch_esf_t *)top_of_sec_stack;
sec_ret_addr = secure_esf->basic.pc;
} else {
/* Exception during Non-Secure function call.
@@ -947,11 +947,11 @@ static void secure_stack_dump(const struct arch_esf *secure_esf)
*
* @return ESF pointer on success, otherwise return NULL
*/
static inline struct arch_esf *get_esf(uint32_t msp, uint32_t psp, uint32_t exc_return,
static inline z_arch_esf_t *get_esf(uint32_t msp, uint32_t psp, uint32_t exc_return,
bool *nested_exc)
{
bool alternative_state_exc = false;
struct arch_esf *ptr_esf = NULL;
z_arch_esf_t *ptr_esf = NULL;
*nested_exc = false;
@@ -979,14 +979,14 @@ static inline struct arch_esf *get_esf(uint32_t msp, uint32_t psp, uint32_t exc_
alternative_state_exc = true;
/* Dump the Secure stack before handling the actual fault. */
struct arch_esf *secure_esf;
z_arch_esf_t *secure_esf;
if (exc_return & EXC_RETURN_SPSEL_PROCESS) {
/* Secure stack pointed by PSP */
secure_esf = (struct arch_esf *)psp;
secure_esf = (z_arch_esf_t *)psp;
} else {
/* Secure stack pointed by MSP */
secure_esf = (struct arch_esf *)msp;
secure_esf = (z_arch_esf_t *)msp;
*nested_exc = true;
}
@@ -997,9 +997,9 @@ static inline struct arch_esf *get_esf(uint32_t msp, uint32_t psp, uint32_t exc_
* and supply it to the fault handing function.
*/
if (exc_return & EXC_RETURN_MODE_THREAD) {
ptr_esf = (struct arch_esf *)__TZ_get_PSP_NS();
ptr_esf = (z_arch_esf_t *)__TZ_get_PSP_NS();
} else {
ptr_esf = (struct arch_esf *)__TZ_get_MSP_NS();
ptr_esf = (z_arch_esf_t *)__TZ_get_MSP_NS();
}
}
#elif defined(CONFIG_ARM_NONSECURE_FIRMWARE)
@@ -1024,10 +1024,10 @@ static inline struct arch_esf *get_esf(uint32_t msp, uint32_t psp, uint32_t exc_
if (exc_return & EXC_RETURN_SPSEL_PROCESS) {
/* Non-Secure stack frame on PSP */
ptr_esf = (struct arch_esf *)psp;
ptr_esf = (z_arch_esf_t *)psp;
} else {
/* Non-Secure stack frame on MSP */
ptr_esf = (struct arch_esf *)msp;
ptr_esf = (z_arch_esf_t *)msp;
}
} else {
/* Exception entry occurred in Non-Secure stack. */
@@ -1046,11 +1046,11 @@ static inline struct arch_esf *get_esf(uint32_t msp, uint32_t psp, uint32_t exc_
if (!alternative_state_exc) {
if (exc_return & EXC_RETURN_MODE_THREAD) {
/* Returning to thread mode */
ptr_esf = (struct arch_esf *)psp;
ptr_esf = (z_arch_esf_t *)psp;
} else {
/* Returning to handler mode */
ptr_esf = (struct arch_esf *)msp;
ptr_esf = (z_arch_esf_t *)msp;
*nested_exc = true;
}
}
@@ -1095,12 +1095,12 @@ void z_arm_fault(uint32_t msp, uint32_t psp, uint32_t exc_return,
uint32_t reason = K_ERR_CPU_EXCEPTION;
int fault = SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk;
bool recoverable, nested_exc;
struct arch_esf *esf;
z_arch_esf_t *esf;
/* Create a stack-ed copy of the ESF to be used during
* the fault handling process.
*/
struct arch_esf esf_copy;
z_arch_esf_t esf_copy;
/* Force unlock interrupts */
arch_irq_unlock(0);
@@ -1123,13 +1123,13 @@ void z_arm_fault(uint32_t msp, uint32_t psp, uint32_t exc_return,
/* Copy ESF */
#if !defined(CONFIG_EXTRA_EXCEPTION_INFO)
memcpy(&esf_copy, esf, sizeof(struct arch_esf));
memcpy(&esf_copy, esf, sizeof(z_arch_esf_t));
ARG_UNUSED(callee_regs);
#else
/* the extra exception info is not present in the original esf
* so we only copy the fields before those.
*/
memcpy(&esf_copy, esf, offsetof(struct arch_esf, extra_info));
memcpy(&esf_copy, esf, offsetof(z_arch_esf_t, extra_info));
esf_copy.extra_info = (struct __extra_esf_info) {
.callee = callee_regs,
.exc_return = exc_return,
@@ -1192,7 +1192,5 @@ void z_arm_fault_init(void)
#endif /* CONFIG_BUILTIN_STACK_GUARD */
#ifdef CONFIG_TRAP_UNALIGNED_ACCESS
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
#else
SCB->CCR &= ~SCB_CCR_UNALIGN_TRP_Msk;
#endif /* CONFIG_TRAP_UNALIGNED_ACCESS */
}

View File

@@ -94,7 +94,7 @@ void z_arm_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
#endif /* !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER) */
void z_arm_fatal_error(unsigned int reason, const struct arch_esf *esf);
void z_arm_fatal_error(unsigned int reason, const z_arch_esf_t *esf);
/**
*
@@ -122,7 +122,7 @@ void _arch_isr_direct_pm(void)
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* Lock all interrupts. irq_lock() will on this CPU only disable those
* lower than BASEPRI, which is not what we want. See comments in
* arch/arm/core/cortex_m/isr_wrapper.c
* arch/arm/core/isr_wrapper.S
*/
__asm__ volatile("cpsid i" : : : "memory");
#else
@@ -131,7 +131,7 @@ void _arch_isr_direct_pm(void)
if (_kernel.idle) {
_kernel.idle = 0;
pm_system_resume();
z_pm_save_idle_exit();
}
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)

View File

@@ -31,7 +31,7 @@ GDATA(z_main_stack)
SECTION_FUNC(TEXT, __vector_relay_handler)
mrs r0, ipsr;
lsls r0, r0, #0x02;
lsls r0, r0, $0x02;
ldr r1, =_vector_table_pointer;
ldr r1, [r1];

View File

@@ -0,0 +1,152 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright (c) 2020 Stephanos Ioannidis <root@stephanos.io>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief ARM Cortex-M wrapper for ISRs with parameter
*
* Wrapper installed in vector table for handling dynamic interrupts that accept
* a parameter.
*/
/*
* Tell armclang that stack alignment are ensured.
*/
.eabi_attribute Tag_ABI_align_preserved, 1
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <offsets_short.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/sw_isr_table.h>
_ASM_FILE_PROLOGUE
GDATA(_sw_isr_table)
GTEXT(_isr_wrapper)
GTEXT(z_arm_int_exit)
/**
*
* @brief Wrapper around ISRs when inserted in software ISR table
*
* When inserted in the vector table, _isr_wrapper() demuxes the ISR table
* using the running interrupt number as the index, and invokes the registered
* ISR with its corresponding argument. When returning from the ISR, it
* determines if a context switch needs to happen (see documentation for
* z_arm_pendsv()) and pends the PendSV exception if so: the latter will
* perform the context switch itself.
*
*/
SECTION_FUNC(TEXT, _isr_wrapper)
push {r0,lr} /* r0, lr are now the first items on the stack */
#ifdef CONFIG_TRACING_ISR
bl sys_trace_isr_enter
#endif
#ifdef CONFIG_PM
/*
* All interrupts are disabled when handling idle wakeup. For tickless
* idle, this ensures that the calculation and programming of the
* device for the next timer deadline is not interrupted. For
* non-tickless idle, this ensures that the clearing of the kernel idle
* state is not interrupted. In each case, z_pm_save_idle_exit
* is called with interrupts disabled.
*/
/*
* Disable interrupts to prevent nesting while exiting idle state. This
* is only necessary for the Cortex-M because it is the only ARM
* architecture variant that automatically enables interrupts when
* entering an ISR.
*/
cpsid i /* PRIMASK = 1 */
/* is this a wakeup from idle ? */
ldr r2, =_kernel
/* requested idle duration, in ticks */
ldr r0, [r2, #_kernel_offset_to_idle]
cmp r0, #0
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
beq _idle_state_cleared
movs.n r1, #0
/* clear kernel idle state */
str r1, [r2, #_kernel_offset_to_idle]
bl z_pm_save_idle_exit
_idle_state_cleared:
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
ittt ne
movne r1, #0
/* clear kernel idle state */
strne r1, [r2, #_kernel_offset_to_idle]
blne z_pm_save_idle_exit
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
cpsie i /* re-enable interrupts (PRIMASK = 0) */
#endif /* CONFIG_PM */
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
bl z_soc_irq_get_active
#else
mrs r0, IPSR /* get exception number */
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
ldr r1, =16
subs r0, r1 /* get IRQ number */
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
push {r0}
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
lsls r0, #3 /* table is 8-byte wide */
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
sub r0, r0, #16 /* get IRQ number */
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
push {r0}
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
lsl r0, r0, #3 /* table is 8-byte wide */
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
ldr r1, =_sw_isr_table
add r1, r1, r0 /* table entry: ISRs must have their MSB set to stay
* in thumb mode */
ldm r1!,{r0,r3} /* arg in r0, ISR in r3 */
blx r3 /* call ISR */
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
pop {r0}
bl z_soc_irq_eoi
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
#ifdef CONFIG_TRACING_ISR
bl sys_trace_isr_exit
#endif
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
pop {r0, r3}
mov lr, r3
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
pop {r0, lr}
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
/* Use 'bx' instead of 'b' because 'bx' can jump further, and use
* 'bx' instead of 'blx' because exception return is done in
* z_arm_int_exit() */
ldr r1, =z_arm_int_exit
bx r1

View File

@@ -1,88 +0,0 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright (c) 2020 Stephanos Ioannidis <root@stephanos.io>
* Copyright (c) 2023 Arm Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief ARM Cortex-M wrapper for ISRs with parameter
*
* Wrapper installed in vector table for handling dynamic interrupts that accept
* a parameter.
*/
#include <zephyr/kernel.h>
#include <zephyr/irq.h>
#include <zephyr/pm/pm.h>
#include <cmsis_core.h>
/**
*
* @brief Wrapper around ISRs when inserted in software ISR table
*
* When inserted in the vector table, _isr_wrapper() demuxes the ISR table
* using the running interrupt number as the index, and invokes the registered
* ISR with its corresponding argument. When returning from the ISR, it
* determines if a context switch needs to happen (see documentation for
* z_arm_pendsv()) and pends the PendSV exception if so: the latter will
* perform the context switch itself.
*
*/
void _isr_wrapper(void)
{
#ifdef CONFIG_TRACING_ISR
sys_trace_isr_enter();
#endif /* CONFIG_TRACING_ISR */
#ifdef CONFIG_PM
/*
* All interrupts are disabled when handling idle wakeup. For tickless
* idle, this ensures that the calculation and programming of the
* device for the next timer deadline is not interrupted. For
* non-tickless idle, this ensures that the clearing of the kernel idle
* state is not interrupted. In each case, pm_system_resume
* is called with interrupts disabled.
*/
/*
* Disable interrupts to prevent nesting while exiting idle state. This
* is only necessary for the Cortex-M because it is the only ARM
* architecture variant that automatically enables interrupts when
* entering an ISR.
*/
__disable_irq();
/* is this a wakeup from idle ? */
/* requested idle duration, in ticks */
if (_kernel.idle != 0) {
/* clear kernel idle state */
_kernel.idle = 0;
pm_system_resume();
}
/* re-enable interrupts */
__enable_irq();
#endif /* CONFIG_PM */
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
int32_t irq_number = z_soc_irq_get_active();
#else
/* _sw_isr_table does not map the expections, only the interrupts. */
int32_t irq_number = __get_IPSR();
#endif
irq_number -= 16;
struct _isr_table_entry *entry = &_sw_isr_table[irq_number];
(entry->isr)(entry->arg);
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
z_soc_irq_eoi(irq_number);
#endif
#ifdef CONFIG_TRACING_ISR
sys_trace_isr_exit();
#endif /* CONFIG_TRACING_ISR */
z_arm_exc_exit();
}

View File

@@ -14,11 +14,12 @@
#include <zephyr/arch/cpu.h>
#include <zephyr/arch/common/pm_s2ram.h>
#define MAGIC (0xDABBAD00)
_ASM_FILE_PROLOGUE
GTEXT(pm_s2ram_mark_set)
GTEXT(pm_s2ram_mark_check_and_clear)
GDATA(_cpu_context)
GDATA(marker)
SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
/*
@@ -63,9 +64,11 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
str r2, [r1, #___cpu_context_t_control_OFFSET]
/*
* Mark entering suspend to RAM.
* Set the marker to MAGIC value
*/
bl pm_s2ram_mark_set
ldr r1, =marker
ldr r2, =MAGIC
str r2, [r1]
/*
* Call the system_off function passed as parameter. This should never
@@ -79,29 +82,35 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend)
*/
/*
* Reset the marking of suspend to RAM, return is ignored.
* Reset the marker
*/
push {r0}
bl pm_s2ram_mark_check_and_clear
pop {r0}
ldr r1, =marker
mov r2, #0x0
str r2, [r1]
pop {r4-r12, lr}
bx lr
GTEXT(arch_pm_s2ram_resume)
SECTION_FUNC(TEXT, arch_pm_s2ram_resume)
/*
* Check if reset occurred after suspending to RAM.
* Check if the marker is set
*/
push {lr}
bl pm_s2ram_mark_check_and_clear
cmp r0, #0x1
pop {lr}
ldr r0, =marker
ldr r0, [r0]
ldr r1, =MAGIC
cmp r0, r1
beq resume
bx lr
resume:
/*
* Reset the marker
*/
ldr r0, =marker
mov r1, #0x0
str r1, [r0]
/*
* Restore the CPU context
*/

View File

@@ -9,33 +9,12 @@
#include <zephyr/arch/common/pm_s2ram.h>
#define MAGIC (0xDABBAD00)
/**
* CPU context for S2RAM
*/
__noinit _cpu_context_t _cpu_context;
#ifndef CONFIG_PM_S2RAM_CUSTOM_MARKING
/**
* S2RAM Marker
*/
static __noinit uint32_t marker;
void pm_s2ram_mark_set(void)
{
marker = MAGIC;
}
bool pm_s2ram_mark_check_and_clear(void)
{
if (marker == MAGIC) {
marker = 0;
return true;
}
return false;
}
#endif /* CONFIG_PM_S2RAM_CUSTOM_MARKING */
__noinit uint32_t marker;

View File

@@ -1,6 +1,5 @@
/*
* Copyright (c) 2018 Linaro, Limited
* Copyright (c) 2023 Arm Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -48,63 +47,3 @@ int arch_swap(unsigned int key)
*/
return _current->arch.swap_return_value;
}
uintptr_t z_arm_pendsv_c(uintptr_t exc_ret)
{
/* Store LSB of LR (EXC_RETURN) to the thread's 'mode' word. */
IF_ENABLED(CONFIG_ARM_STORE_EXC_RETURN,
(_kernel.cpus[0].current->arch.mode_exc_return = (uint8_t)exc_ret;));
/* Protect the kernel state while we play with the thread lists */
uint32_t basepri = arch_irq_lock();
/* fetch the thread to run from the ready queue cache */
struct k_thread *current = _kernel.cpus[0].current = _kernel.ready_q.cache;
/*
* Clear PendSV so that if another interrupt comes in and
* decides, with the new kernel state based on the new thread
* being context-switched in, that it needs to reschedule, it
* will take, but that previously pended PendSVs do not take,
* since they were based on the previous kernel state and this
* has been handled.
*/
SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk;
/* For Cortex-M, store TLS pointer in a global variable,
* as it lacks the process ID or thread ID register
* to be used by toolchain to access thread data.
*/
IF_ENABLED(CONFIG_THREAD_LOCAL_STORAGE,
(extern uintptr_t z_arm_tls_ptr; z_arm_tls_ptr = current->tls));
IF_ENABLED(CONFIG_ARM_STORE_EXC_RETURN,
(exc_ret = (exc_ret & 0xFFFFFF00) | current->arch.mode_exc_return));
/* Restore previous interrupt disable state (irq_lock key)
* (We clear the arch.basepri field after restoring state)
*/
basepri = current->arch.basepri;
current->arch.basepri = 0;
arch_irq_unlock(basepri);
#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
/* Re-program dynamic memory map */
z_arm_configure_dynamic_mpu_regions(current);
#endif
/* restore mode */
IF_ENABLED(CONFIG_USERSPACE, ({
CONTROL_Type ctrl = {.w = __get_CONTROL()};
/* exit privileged state when returning to thread mode. */
ctrl.b.nPRIV = 0;
/* __set_CONTROL inserts an ISB which is may not be necessary here
* (stack pointer may not be touched), but it's recommended to avoid
* executing pre-fetched instructions with the previous privilege.
*/
__set_CONTROL(ctrl.w | current->arch.mode);
}));
return exc_ret;
}

View File

@@ -27,7 +27,6 @@ _ASM_FILE_PROLOGUE
GTEXT(z_arm_svc)
GTEXT(z_arm_pendsv)
GTEXT(z_do_kernel_oops)
GTEXT(z_arm_pendsv_c)
#if defined(CONFIG_USERSPACE)
GTEXT(z_arm_do_syscall)
#endif
@@ -95,7 +94,7 @@ SECTION_FUNC(TEXT, z_arm_pendsv)
/* store r8-12 */
stmea r0!, {r3-r7}
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
stmia r0, {r4-r11, ip}
stmia r0, {v1-v8, ip}
#ifdef CONFIG_FPU_SHARING
/* Assess whether switched-out thread had been using the FP registers. */
tst lr, #_EXC_RETURN_FTYPE_Msk
@@ -118,20 +117,125 @@ out_fp_endif:
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
mov r4, lr
mov r0, lr
bl z_arm_pendsv_c
mov lr, r4
/* Protect the kernel state while we play with the thread lists */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
cpsid i
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
movs.n r0, #_EXC_IRQ_DEFAULT_PRIO
msr BASEPRI_MAX, r0
isb /* Make the effect of disabling interrupts be realized immediately */
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
ldr r1, =_kernel
ldr r2, [r1, #_kernel_offset_to_current]
/*
* Prepare to clear PendSV with interrupts unlocked, but
* don't clear it yet. PendSV must not be cleared until
* the new thread is context-switched in since all decisions
* to pend PendSV have been taken with the current kernel
* state and this is what we're handling currently.
*/
ldr v4, =_SCS_ICSR
ldr v3, =_SCS_ICSR_UNPENDSV
/* _kernel is still in r1 */
/* fetch the thread to run from the ready queue cache */
ldr r2, [r1, #_kernel_offset_to_ready_q_cache]
str r2, [r1, #_kernel_offset_to_current]
/*
* Clear PendSV so that if another interrupt comes in and
* decides, with the new kernel state based on the new thread
* being context-switched in, that it needs to reschedule, it
* will take, but that previously pended PendSVs do not take,
* since they were based on the previous kernel state and this
* has been handled.
*/
/* _SCS_ICSR is still in v4 and _SCS_ICSR_UNPENDSV in v3 */
str v3, [v4, #0]
#if defined(CONFIG_THREAD_LOCAL_STORAGE)
/* Grab the TLS pointer */
ldr r4, =_thread_offset_to_tls
adds r4, r2, r4
ldr r0, [r4]
/* For Cortex-M, store TLS pointer in a global variable,
* as it lacks the process ID or thread ID register
* to be used by toolchain to access thread data.
*/
ldr r4, =z_arm_tls_ptr
str r0, [r4]
#endif
#if defined(CONFIG_ARM_STORE_EXC_RETURN)
/* Restore EXC_RETURN value. */
mov lr, r0
ldrsb lr, [r2, #_thread_offset_to_mode_exc_return]
#endif
/* Restore previous interrupt disable state (irq_lock key)
* (We clear the arch.basepri field after restoring state)
*/
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) && (_thread_offset_to_basepri > 124)
/* Doing it this way since the offset to thread->arch.basepri can in
* some configurations be larger than the maximum of 124 for ldr/str
* immediate offsets.
*/
ldr r4, =_thread_offset_to_basepri
adds r4, r2, r4
ldr r0, [r4]
movs.n r3, #0
str r3, [r4]
#else
ldr r0, [r2, #_thread_offset_to_basepri]
movs r3, #0
str r3, [r2, #_thread_offset_to_basepri]
#endif
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
/* BASEPRI not available, previous interrupt disable state
* maps to PRIMASK.
*
* Only enable interrupts if value is 0, meaning interrupts
* were enabled before irq_lock was called.
*/
cmp r0, #0
bne _thread_irq_disabled
cpsie i
_thread_irq_disabled:
#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
/* Re-program dynamic memory map */
push {r2,lr}
mov r0, r2
bl z_arm_configure_dynamic_mpu_regions
pop {r2,r3}
mov lr, r3
#endif
#ifdef CONFIG_USERSPACE
/* restore mode */
ldr r3, =_thread_offset_to_mode
adds r3, r2, r3
ldr r0, [r3]
mrs r3, CONTROL
movs.n r1, #1
bics r3, r1
orrs r3, r0
msr CONTROL, r3
/* ISB is not strictly necessary here (stack pointer is not being
* touched), but it's recommended to avoid executing pre-fetched
* instructions with the previous privilege.
*/
isb
#endif
ldr r4, =_thread_offset_to_callee_saved
adds r0, r2, r4
@@ -149,6 +253,9 @@ out_fp_endif:
subs r0, #36
ldmia r0!, {r4-r7}
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* restore BASEPRI for the incoming thread */
msr BASEPRI, r0
#ifdef CONFIG_FPU_SHARING
/* Assess whether switched-in thread had been using the FP registers. */
tst lr, #_EXC_RETURN_FTYPE_Msk
@@ -178,9 +285,33 @@ in_fp_endif:
isb
#endif
#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
/* Re-program dynamic memory map */
push {r2,lr}
mov r0, r2 /* _current thread */
bl z_arm_configure_dynamic_mpu_regions
pop {r2,lr}
#endif
#ifdef CONFIG_USERSPACE
/* restore mode */
ldr r0, [r2, #_thread_offset_to_mode]
mrs r3, CONTROL
bic r3, #1
orr r3, r0
msr CONTROL, r3
/* ISB is not strictly necessary here (stack pointer is not being
* touched), but it's recommended to avoid executing pre-fetched
* instructions with the previous privilege.
*/
isb
#endif
/* load callee-saved + psp from thread */
add r0, r2, #_thread_offset_to_callee_saved
ldmia r0, {r4-r11, ip}
ldmia r0, {v1-v8, ip}
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
@@ -298,8 +429,7 @@ _stack_frame_endif:
#endif
/* exception return is done in z_arm_int_exit() */
ldr r0, =z_arm_int_exit
bx r0
b z_arm_int_exit
#endif
_oops:

View File

@@ -1,7 +1,6 @@
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
* Copyright (c) 2021 Lexmark International, Inc.
* Copyright (c) 2023 Arm Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -15,7 +14,6 @@
*/
#include <zephyr/kernel.h>
#include <zephyr/llext/symbol.h>
#include <ksched.h>
#include <zephyr/sys/barrier.h>
#include <stdbool.h>
@@ -279,7 +277,6 @@ bool z_arm_thread_is_in_user_mode(void)
value = __get_CONTROL();
return (value & CONTROL_nPRIV_Msk) != 0;
}
EXPORT_SYMBOL(z_arm_thread_is_in_user_mode);
#endif
#if defined(CONFIG_BUILTIN_STACK_GUARD)
@@ -440,7 +437,7 @@ uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, const uint32_t psp
guard_len,
fault_addr, psp)) {
/* Thread stack corruption */
return (uint32_t)K_THREAD_STACK_BUFFER(z_main_stack);
return (uint32_t)Z_THREAD_STACK_BUFFER(z_main_stack);
}
#endif
#endif /* CONFIG_USERSPACE */
@@ -555,58 +552,39 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, char *stack_ptr,
#if defined(CONFIG_CPU_CORTEX_M_HAS_SPLIM)
__set_PSPLIM(main_thread->stack_info.start);
#else
#error "Built-in PSP limit checks not supported by the hardware."
#error "Built-in PSP limit checks not supported by HW"
#endif
#endif /* CONFIG_BUILTIN_STACK_GUARD */
/*
* Set PSP to the highest address of the main stack
* before enabling interrupts and jumping to main.
*
* The compiler may store _main on the stack, but this
* location is relative to `PSP`.
* This assembly block ensures that _main is stored in
* a callee saved register before switching stack and continuing
* with the thread entry process.
*
* When calling arch_irq_unlock_outlined, LR is lost which is fine since
* we do not intend to return after calling z_thread_entry.
*/
__asm__ volatile (
"mov r4, %0\n" /* force _main to be stored in a register */
"msr PSP, %1\n" /* __set_PSP(stack_ptr) */
"mov r0, %0\n\t" /* Store _main in R0 */
"msr PSP, %1\n\t" /* __set_PSP(stack_ptr) */
"mov r0, #0\n" /* arch_irq_unlock(0) */
"ldr r3, =arch_irq_unlock_outlined\n"
"blx r3\n"
"mov r0, r4\n" /* z_thread_entry(_main, NULL, NULL, NULL) */
"mov r1, #0\n"
"mov r2, #0\n"
"mov r3, #0\n"
"ldr r4, =z_thread_entry\n"
"bx r4\n" /* We dont intend to return, so there is no need to link. */
: "+r" (_main)
: "r" (stack_ptr)
: "r0", "r1", "r2", "r3", "r4", "ip", "lr");
"movs r1, #0\n\t"
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
"cpsie i\n\t" /* __enable_irq() */
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
"cpsie if\n\t" /* __enable_irq(); __enable_fault_irq() */
"msr BASEPRI, r1\n\t" /* __set_BASEPRI(0) */
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
"isb\n\t"
"movs r2, #0\n\t"
"movs r3, #0\n\t"
"bl z_thread_entry\n\t" /* z_thread_entry(_main, 0, 0, 0); */
:
: "r" (_main), "r" (stack_ptr)
: "r0" /* not to be overwritten by msr PSP, %1 */
);
CODE_UNREACHABLE;
}
__used void arch_irq_unlock_outlined(unsigned int key)
{
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
__enable_fault_irq(); /* alters FAULTMASK */
__enable_irq(); /* alters PRIMASK */
#endif
arch_irq_unlock(key);
}
__used unsigned int arch_irq_lock_outlined(void)
{
return arch_irq_lock();
}
#if !defined(CONFIG_MULTITHREADING)
FUNC_NORETURN void z_arm_switch_to_main_no_multithreading(
@@ -615,11 +593,11 @@ FUNC_NORETURN void z_arm_switch_to_main_no_multithreading(
z_arm_prepare_switch_to_main();
/* Set PSP to the highest address of the main stack. */
char *psp = K_THREAD_STACK_BUFFER(z_main_stack) +
char *psp = Z_THREAD_STACK_BUFFER(z_main_stack) +
K_THREAD_STACK_SIZEOF(z_main_stack);
#if defined(CONFIG_BUILTIN_STACK_GUARD)
char *psplim = (K_THREAD_STACK_BUFFER(z_main_stack));
char *psplim = (Z_THREAD_STACK_BUFFER(z_main_stack));
/* Clear PSPLIM before setting it to guard the main stack area. */
__set_PSPLIM(0);
#endif
@@ -628,38 +606,42 @@ FUNC_NORETURN void z_arm_switch_to_main_no_multithreading(
* after stack pointer change. The function is not going
* to return, so callee-saved registers do not need to be
* stacked.
*
* The compiler may store _main on the stack, but this
* location is relative to `PSP`.
* This assembly block ensures that _main is stored in
* a callee saved register before switching stack and continuing
* with the thread entry process.
*/
register void *p1_inreg __asm__("r0") = p1;
register void *p2_inreg __asm__("r1") = p2;
register void *p3_inreg __asm__("r2") = p3;
__asm__ volatile (
#ifdef CONFIG_BUILTIN_STACK_GUARD
"msr PSPLIM, %[_psplim]\n" /* __set_PSPLIM(_psplim) */
"msr PSPLIM, %[_psplim]\n\t"
#endif
"msr PSP, %[_psp]\n\t" /* __set_PSP(psp) */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
"cpsie i\n\t" /* enable_irq() */
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
"cpsie if\n\t" /* __enable_irq(); __enable_fault_irq() */
"mov r3, #0\n\t"
"msr BASEPRI, r3\n\t" /* __set_BASEPRI(0) */
#endif
"isb\n\t"
"blx %[_main_entry]\n\t" /* main_entry(p1, p2, p3) */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
"cpsid i\n\t" /* disable_irq() */
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
"msr BASEPRI, %[basepri]\n\t"/* __set_BASEPRI(_EXC_IRQ_DEFAULT_PRIO) */
"isb\n\t"
#endif
"msr PSP, %[_psp]\n" /* __set_PSP(psp) */
"mov r0, #0\n"
"ldr r1, =arch_irq_unlock_outlined\n"
"blx r1\n"
"mov r0, %[_p1]\n"
"mov r1, %[_p2]\n"
"mov r2, %[_p3]\n"
"blx %[_main_entry]\n" /* main_entry(p1, p2, p3) */
"ldr r0, =arch_irq_lock_outlined\n"
"blx r0\n"
"loop: b loop\n\t" /* while (true); */
:
: [_p1]"r" (p1), [_p2]"r" (p2), [_p3]"r" (p3),
: "r" (p1_inreg), "r" (p2_inreg), "r" (p3_inreg),
[_psp]"r" (psp), [_main_entry]"r" (main_entry)
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
, [basepri] "r" (_EXC_IRQ_DEFAULT_PRIO)
#endif
#ifdef CONFIG_BUILTIN_STACK_GUARD
, [_psplim]"r" (psplim)
#endif
: "r0", "r1", "r2", "ip", "lr"
:
);
CODE_UNREACHABLE; /* LCOV_EXCL_LINE */

View File

@@ -25,8 +25,6 @@
void z_impl_k_thread_abort(k_tid_t thread)
{
SYS_PORT_TRACING_OBJ_FUNC_ENTER(k_thread, abort, thread);
if (_current == thread) {
if (arch_is_in_isr()) {
/* ARM is unlike most arches in that this is true
@@ -51,6 +49,4 @@ void z_impl_k_thread_abort(k_tid_t thread)
}
z_thread_abort(thread);
SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_thread, abort, thread);
}

View File

@@ -1,6 +1,5 @@
/*
* Copyright (c) 2023 Intel Corporation
* Copyright (c) 2024 Schneider Electric
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -8,272 +7,9 @@
#include <zephyr/llext/elf.h>
#include <zephyr/llext/llext.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/util.h>
LOG_MODULE_REGISTER(elf, CONFIG_LLEXT_LOG_LEVEL);
#define OPCODE2ARMMEM(x) ((uint32_t)(x))
#define OPCODE2THM16MEM(x) ((uint16_t)(x))
#define MEM2ARMOPCODE(x) OPCODE2ARMMEM(x)
#define MEM2THM16OPCODE(x) OPCODE2THM16MEM(x)
#define JUMP_UPPER_BOUNDARY ((int32_t)0xfe000000)
#define JUMP_LOWER_BOUNDARY ((int32_t)0x2000000)
#define PREL31_UPPER_BOUNDARY ((int32_t)0x40000000)
#define PREL31_LOWER_BOUNDARY ((int32_t)-0x40000000)
#define THM_JUMP_UPPER_BOUNDARY ((int32_t)0xff000000)
#define THM_JUMP_LOWER_BOUNDARY ((int32_t)0x01000000)
#define MASK_V4BX_RM_COND 0xf000000f
#define MASK_V4BX_NOT_RM_COND 0x01a0f000
#define MASK_BRANCH_COND GENMASK(31, 28)
#define MASK_BRANCH_101 GENMASK(27, 25)
#define MASK_BRANCH_L BIT(24)
#define MASK_BRANCH_OFFSET GENMASK(23, 0)
#define MASK_MOV_COND GENMASK(31, 28)
#define MASK_MOV_00 GENMASK(27, 26)
#define MASK_MOV_I BIT(25)
#define MASK_MOV_OPCODE GENMASK(24, 21)
#define MASK_MOV_S BIT(20)
#define MASK_MOV_RN GENMASK(19, 16)
#define MASK_MOV_RD GENMASK(15, 12)
#define MASK_MOV_OPERAND2 GENMASK(11, 0)
#define BIT_THM_BW_S 10
#define MASK_THM_BW_11110 GENMASK(15, 11)
#define MASK_THM_BW_S BIT(10)
#define MASK_THM_BW_IMM10 GENMASK(9, 0)
#define BIT_THM_BL_J1 13
#define BIT_THM_BL_J2 11
#define MASK_THM_BL_10 GENMASK(15, 14)
#define MASK_THM_BL_J1 BIT(13)
#define MASK_THM_BL_1 BIT(12)
#define MASK_THM_BL_J2 BIT(11)
#define MASK_THM_BL_IMM11 GENMASK(10, 0)
#define MASK_THM_MOV_11110 GENMASK(15, 11)
#define MASK_THM_MOV_I BIT(10)
#define MASK_THM_MOV_100100 GENMASK(9, 4)
#define MASK_THM_MOV_IMM4 GENMASK(3, 0)
#define MASK_THM_MOV_0 BIT(15)
#define MASK_THM_MOV_IMM3 GENMASK(14, 12)
#define MASK_THM_MOV_RD GENMASK(11, 8)
#define MASK_THM_MOV_IMM8 GENMASK(7, 0)
#define SHIFT_PREL31_SIGN 30
#define SHIFT_BRANCH_OFFSET 2
#define SHIFT_JUMPS_SIGN 25
#define SHIFT_MOV_RD 4
#define SHIFT_MOV_RN 4
#define SHIFT_MOVS_SIGN 15
#define SHIFT_THM_JUMPS_SIGN 24
#define SHIFT_THM_BW_IMM10 12
#define SHIFT_THM_BL_J2 22
#define SHIFT_THM_BL_J1 23
#define SHIFT_THM_MOVS_SIGN 15
#define SHIFT_THM_MOV_I 1
#define SHIFT_THM_MOV_IMM3 4
#define SHIFT_THM_MOV_IMM4 12
static inline int prel31_decode(elf_word reloc_type, uint32_t loc,
uint32_t sym_base_addr, const char *sym_name, int32_t *offset)
{
int ret;
*offset = sign_extend(*(int32_t *)loc, SHIFT_PREL31_SIGN);
*offset += sym_base_addr - loc;
if (*offset >= PREL31_UPPER_BOUNDARY || *offset < PREL31_LOWER_BOUNDARY) {
LOG_ERR("sym '%s': relocation out of range (%#x -> %#x)\n",
sym_name, loc, sym_base_addr);
ret = -ENOEXEC;
} else {
ret = 0;
}
return ret;
}
static inline void prel31_reloc(uint32_t loc, int32_t *offset)
{
*(uint32_t *)loc &= BIT(31);
*(uint32_t *)loc |= *offset & GENMASK(30, 0);
}
static int prel31_handler(elf_word reloc_type, uint32_t loc,
uint32_t sym_base_addr, const char *sym_name)
{
int ret;
int32_t offset;
ret = prel31_decode(reloc_type, loc, sym_base_addr, sym_name, &offset);
if (!ret) {
prel31_reloc(loc, &offset);
}
return ret;
}
static inline int jumps_decode(elf_word reloc_type, uint32_t loc,
uint32_t sym_base_addr, const char *sym_name, int32_t *offset)
{
int ret;
*offset = MEM2ARMOPCODE(*(uint32_t *)loc);
*offset = (*offset & MASK_BRANCH_OFFSET) << SHIFT_BRANCH_OFFSET;
*offset = sign_extend(*offset, SHIFT_JUMPS_SIGN);
*offset += sym_base_addr - loc;
if (*offset >= JUMP_LOWER_BOUNDARY || *offset <= JUMP_UPPER_BOUNDARY) {
LOG_ERR("sym '%s': relocation out of range (%#x -> %#x)\n",
sym_name, loc, sym_base_addr);
ret = -ENOEXEC;
} else {
ret = 0;
}
return ret;
}
static inline void jumps_reloc(uint32_t loc, int32_t *offset)
{
*offset >>= SHIFT_BRANCH_OFFSET;
*offset &= MASK_BRANCH_OFFSET;
*(uint32_t *)loc &= OPCODE2ARMMEM(MASK_BRANCH_COND|MASK_BRANCH_101|MASK_BRANCH_L);
*(uint32_t *)loc |= OPCODE2ARMMEM(*offset);
}
static int jumps_handler(elf_word reloc_type, uint32_t loc,
uint32_t sym_base_addr, const char *sym_name)
{
int ret;
int32_t offset;
ret = jumps_decode(reloc_type, loc, sym_base_addr, sym_name, &offset);
if (!ret) {
jumps_reloc(loc, &offset);
}
return ret;
}
static void movs_handler(elf_word reloc_type, uint32_t loc,
uint32_t sym_base_addr, const char *sym_name)
{
int32_t offset;
uint32_t tmp;
offset = tmp = MEM2ARMOPCODE(*(uint32_t *)loc);
offset = ((offset & MASK_MOV_RN) >> SHIFT_MOV_RN) | (offset & MASK_MOV_OPERAND2);
offset = sign_extend(offset, SHIFT_MOVS_SIGN);
offset += sym_base_addr;
if (reloc_type == R_ARM_MOVT_PREL || reloc_type == R_ARM_MOVW_PREL_NC) {
offset -= loc;
}
if (reloc_type == R_ARM_MOVT_ABS || reloc_type == R_ARM_MOVT_PREL) {
offset >>= 16;
}
tmp &= (MASK_MOV_COND | MASK_MOV_00 | MASK_MOV_I | MASK_MOV_OPCODE | MASK_MOV_RD);
tmp |= ((offset & MASK_MOV_RD) << SHIFT_MOV_RD) | (offset & MASK_MOV_OPERAND2);
*(uint32_t *)loc = OPCODE2ARMMEM(tmp);
}
static inline int thm_jumps_decode(elf_word reloc_type, uint32_t loc,
uint32_t sym_base_addr, const char *sym_name, int32_t *offset,
uint32_t *upper, uint32_t *lower)
{
int ret;
uint32_t j_one, j_two, sign;
*upper = MEM2THM16OPCODE(*(uint16_t *)loc);
*lower = MEM2THM16OPCODE(*(uint16_t *)(loc + 2));
/* sign is bit10 */
sign = (*upper >> BIT_THM_BW_S) & 1;
j_one = (*lower >> BIT_THM_BL_J1) & 1;
j_two = (*lower >> BIT_THM_BL_J2) & 1;
*offset = (sign << SHIFT_THM_JUMPS_SIGN) |
((~(j_one ^ sign) & 1) << SHIFT_THM_BL_J1) |
((~(j_two ^ sign) & 1) << SHIFT_THM_BL_J2) |
((*upper & MASK_THM_BW_IMM10) << SHIFT_THM_BW_IMM10) |
((*lower & MASK_THM_BL_IMM11) << 1);
*offset = sign_extend(*offset, SHIFT_THM_JUMPS_SIGN);
*offset += sym_base_addr - loc;
if (*offset >= THM_JUMP_LOWER_BOUNDARY || *offset <= THM_JUMP_UPPER_BOUNDARY) {
LOG_ERR("sym '%s': relocation out of range (%#x -> %#x)\n",
sym_name, loc, sym_base_addr);
ret = -ENOEXEC;
} else {
ret = 0;
}
return ret;
}
static inline void thm_jumps_reloc(uint32_t loc, int32_t *offset,
uint32_t *upper, uint32_t *lower)
{
uint32_t j_one, j_two, sign;
sign = (*offset >> SHIFT_THM_JUMPS_SIGN) & 1;
j_one = sign ^ (~(*offset >> SHIFT_THM_BL_J1) & 1);
j_two = sign ^ (~(*offset >> SHIFT_THM_BL_J2) & 1);
*upper = (uint16_t)((*upper & MASK_THM_BW_11110) | (sign << BIT_THM_BW_S) |
((*offset >> SHIFT_THM_BW_IMM10) & MASK_THM_BW_IMM10));
*lower = (uint16_t)((*lower & (MASK_THM_BL_10|MASK_THM_BL_1)) |
(j_one << BIT_THM_BL_J1) | (j_two << BIT_THM_BL_J2) |
((*offset >> 1) & MASK_THM_BL_IMM11));
*(uint16_t *)loc = OPCODE2THM16MEM(*upper);
*(uint16_t *)(loc + 2) = OPCODE2THM16MEM(*lower);
}
static int thm_jumps_handler(elf_word reloc_type, uint32_t loc,
uint32_t sym_base_addr, const char *sym_name)
{
int ret;
int32_t offset;
uint32_t upper, lower;
ret = thm_jumps_decode(reloc_type, loc, sym_base_addr, sym_name, &offset, &upper, &lower);
if (!ret) {
thm_jumps_reloc(loc, &offset, &upper, &lower);
}
return ret;
}
static void thm_movs_handler(elf_word reloc_type, uint32_t loc,
uint32_t sym_base_addr, const char *sym_name)
{
int32_t offset;
uint32_t upper, lower;
upper = MEM2THM16OPCODE(*(uint16_t *)loc);
lower = MEM2THM16OPCODE(*(uint16_t *)(loc + 2));
/* MOVT/MOVW instructions encoding in Thumb-2 */
offset = ((upper & MASK_THM_MOV_IMM4) << SHIFT_THM_MOV_IMM4) |
((upper & MASK_THM_MOV_I) << SHIFT_THM_MOV_I) |
((lower & MASK_THM_MOV_IMM3) >> SHIFT_THM_MOV_IMM3) | (lower & MASK_THM_MOV_IMM8);
offset = sign_extend(offset, SHIFT_THM_MOVS_SIGN);
offset += sym_base_addr;
if (reloc_type == R_ARM_THM_MOVT_PREL || reloc_type == R_ARM_THM_MOVW_PREL_NC) {
offset -= loc;
}
if (reloc_type == R_ARM_THM_MOVT_ABS || reloc_type == R_ARM_THM_MOVT_PREL) {
offset >>= 16;
}
upper = (uint16_t)((upper & (MASK_THM_MOV_11110|MASK_THM_MOV_100100)) |
((offset & (MASK_THM_MOV_IMM4<<SHIFT_THM_MOV_IMM4)) >> SHIFT_THM_MOV_IMM4) |
((offset & (MASK_THM_MOV_I<<SHIFT_THM_MOV_I)) >> SHIFT_THM_MOV_I));
lower = (uint16_t)((lower & (MASK_THM_MOV_0|MASK_THM_MOV_RD)) |
((offset & (MASK_THM_MOV_IMM3>>SHIFT_THM_MOV_IMM3)) << SHIFT_THM_MOV_IMM3) |
(offset & MASK_THM_MOV_IMM8));
*(uint16_t *)loc = OPCODE2THM16MEM(upper);
*(uint16_t *)(loc + 2) = OPCODE2THM16MEM(lower);
}
/**
* @brief Architecture specific function for relocating partially linked (static) elf
*
@@ -283,81 +19,19 @@ static void thm_movs_handler(elf_word reloc_type, uint32_t loc,
*
* The relocation codes for arm are well documented
* https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst#relocation
*
* Handler functions prefixed by '_thm_' means that they are Thumb instructions specific.
* Do NOT mix them with not 'Thumb instructions' in the below switch/case: they are not
* intended to work together.
*/
int arch_elf_relocate(elf_rela_t *rel, uintptr_t loc, uintptr_t sym_base_addr,
const char *sym_name, uintptr_t load_bias)
void arch_elf_relocate(elf_rela_t *rel, uintptr_t opaddr, uintptr_t opval)
{
int ret = 0;
elf_word reloc_type = ELF32_R_TYPE(rel->r_info);
LOG_DBG("%d %lx %lx %s", reloc_type, loc, sym_base_addr, sym_name);
switch (reloc_type) {
case R_ARM_NONE:
break;
case R_ARM_ABS32:
case R_ARM_TARGET1:
*(uint32_t *)loc += sym_base_addr;
/* Update the absolute address of a load/store instruction */
*((uint32_t *)opaddr) = (uint32_t)opval;
break;
case R_ARM_PC24:
case R_ARM_CALL:
case R_ARM_JUMP24:
ret = jumps_handler(reloc_type, loc, sym_base_addr, sym_name);
break;
case R_ARM_V4BX:
/* keep Rm and condition bits */
*(uint32_t *)loc &= OPCODE2ARMMEM(MASK_V4BX_RM_COND);
/* remove the rest */
*(uint32_t *)loc |= OPCODE2ARMMEM(MASK_V4BX_NOT_RM_COND);
break;
case R_ARM_PREL31:
ret = prel31_handler(reloc_type, loc, sym_base_addr, sym_name);
break;
case R_ARM_REL32:
*(uint32_t *)loc += sym_base_addr - loc;
break;
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
case R_ARM_MOVW_PREL_NC:
case R_ARM_MOVT_PREL:
movs_handler(reloc_type, loc, sym_base_addr, sym_name);
break;
case R_ARM_THM_CALL:
case R_ARM_THM_JUMP24:
ret = thm_jumps_handler(reloc_type, loc, sym_base_addr, sym_name);
break;
case R_ARM_THM_MOVW_ABS_NC:
case R_ARM_THM_MOVT_ABS:
case R_ARM_THM_MOVW_PREL_NC:
case R_ARM_THM_MOVT_PREL:
thm_movs_handler(reloc_type, loc, sym_base_addr, sym_name);
break;
case R_ARM_RELATIVE:
*(uint32_t *)loc += load_bias;
break;
case R_ARM_GLOB_DAT:
case R_ARM_JUMP_SLOT:
*(uint32_t *)loc = sym_base_addr;
break;
default:
LOG_ERR("unknown relocation: %u\n", reloc_type);
ret = -ENOEXEC;
LOG_DBG("Unsupported ARM elf relocation type %d at address %lx",
reloc_type, opaddr);
break;
}
return ret;
}

View File

@@ -18,7 +18,7 @@
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
#ifdef CONFIG_EXCEPTION_DEBUG
static void esf_dump(const struct arch_esf *esf)
static void esf_dump(const z_arch_esf_t *esf)
{
LOG_ERR("r0/a1: 0x%08x r1/a2: 0x%08x r2/a3: 0x%08x",
esf->basic.a1, esf->basic.a2, esf->basic.a3);
@@ -66,23 +66,13 @@ static void esf_dump(const struct arch_esf *esf)
}
#endif /* CONFIG_EXCEPTION_DEBUG */
void z_arm_fatal_error(unsigned int reason, const struct arch_esf *esf)
void z_arm_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
#ifdef CONFIG_EXCEPTION_DEBUG
if (esf != NULL) {
esf_dump(esf);
}
#endif /* CONFIG_EXCEPTION_DEBUG */
/* LOG the IRQn that was unhandled */
#if defined(CONFIG_CPU_CORTEX_M)
if (reason == K_ERR_SPURIOUS_IRQ) {
uint32_t irqn = __get_IPSR() - 16;
LOG_ERR("Unhandled IRQn: %d", irqn);
}
#endif
z_fatal_error(reason, esf);
}
@@ -102,7 +92,7 @@ void z_arm_fatal_error(unsigned int reason, const struct arch_esf *esf)
* @param esf exception frame
* @param callee_regs Callee-saved registers (R4-R11)
*/
void z_do_kernel_oops(const struct arch_esf *esf, _callee_saved_t *callee_regs)
void z_do_kernel_oops(const z_arch_esf_t *esf, _callee_saved_t *callee_regs)
{
#if !(defined(CONFIG_EXTRA_EXCEPTION_INFO) && defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE))
ARG_UNUSED(callee_regs);
@@ -130,9 +120,9 @@ void z_do_kernel_oops(const struct arch_esf *esf, _callee_saved_t *callee_regs)
#if !defined(CONFIG_EXTRA_EXCEPTION_INFO)
z_arm_fatal_error(reason, esf);
#else
struct arch_esf esf_copy;
z_arch_esf_t esf_copy;
memcpy(&esf_copy, esf, offsetof(struct arch_esf, extra_info));
memcpy(&esf_copy, esf, offsetof(z_arch_esf_t, extra_info));
#if defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
/* extra exception info is collected in callee_reg param
* on CONFIG_ARMV7_M_ARMV8_M_MAINLINE
@@ -156,7 +146,7 @@ void z_do_kernel_oops(const struct arch_esf *esf, _callee_saved_t *callee_regs)
FUNC_NORETURN void arch_syscall_oops(void *ssf_ptr)
{
uint32_t *ssf_contents = ssf_ptr;
struct arch_esf oops_esf = { 0 };
z_arch_esf_t oops_esf = { 0 };
/* TODO: Copy the rest of the register set out of ssf_ptr */
oops_esf.basic.pc = ssf_contents[3];

View File

@@ -42,7 +42,7 @@ static int is_bkpt(unsigned int exc_cause)
}
/* Wrapper function to save and restore execution c */
void z_gdb_entry(struct arch_esf *esf, unsigned int exc_cause)
void z_gdb_entry(z_arch_esf_t *esf, unsigned int exc_cause)
{
/* Disable the hardware breakpoint in case it was set */
__asm__ volatile("mcr p14, 0, %0, c0, c0, 5" ::"r"(0x0) :);

View File

@@ -10,7 +10,6 @@
#include <zephyr/kernel.h>
#include <zephyr/irq_offload.h>
#include <cmsis_core.h>
volatile irq_offload_routine_t offload_routine;
static const void *offload_param;
@@ -23,11 +22,14 @@ void z_irq_do_offload(void)
void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
{
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) && !defined(CONFIG_ARMV8_M_BASELINE) \
&& defined(CONFIG_ASSERT)
/* ARMv6-M HardFault if you make a SVC call with interrupts locked.
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) && defined(CONFIG_ASSERT)
/* ARMv6-M/ARMv8-M Baseline HardFault if you make a SVC call with
* interrupts locked.
*/
__ASSERT(__get_PRIMASK() == 0U, "irq_offload called with interrupts locked\n");
unsigned int key;
__asm__ volatile("mrs %0, PRIMASK;" : "=r" (key) : : "memory");
__ASSERT(key == 0U, "irq_offload called with interrupts locked\n");
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE && CONFIG_ASSERT */
k_sched_lock();

View File

@@ -14,8 +14,6 @@ config ARM_MPU
select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(CPU_HAS_NXP_MPU || ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if CPU_HAS_ARM_MPU && (ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
select MPU_GAP_FILLING if AARCH32_ARMV8_R
select ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS
select MEM_DOMAIN_ISOLATED_STACKS
help
MCU implements Memory Protection Unit.

View File

@@ -338,7 +338,7 @@ int arch_mem_domain_max_partitions_get(void)
return ARM_CORE_MPU_MAX_DOMAIN_PARTITIONS_GET(available_regions);
}
int arch_buffer_validate(const void *addr, size_t size, int write)
int arch_buffer_validate(void *addr, size_t size, int write)
{
return arm_core_mpu_buffer_validate(addr, size, write);
}

View File

@@ -261,7 +261,7 @@ int arm_core_mpu_get_max_available_dyn_regions(void);
* spans multiple enabled MPU regions (even if these regions all
* permit user access).
*/
int arm_core_mpu_buffer_validate(const void *addr, size_t size, int write);
int arm_core_mpu_buffer_validate(void *addr, size_t size, int write);
#endif /* CONFIG_ARM_MPU */

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