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2461 Commits

Author SHA1 Message Date
Keith Packard
bbdb6b8db9 Use SPEED_OPTIMIZATIONS on riscv for GCC 14.3
I stuck this here for testing; if this helps, we'll put it into the SDK.

Signed-off-by: Keith Packard <keithp@keithp.com>
2025-12-16 17:18:18 +09:00
Keith Packard
1ca55ab32a cmake: Support both toolchain directory layouts
Until https://github.com/zephyrproject-rtos/sdk-ng/pull/936 is merged,
SDK 0.18 is incompatible with previous versions as the paths to
find the cmake bits is different.

Deal with that by checking for files in the wrong place as well as the
right one.

Signed-off-by: Keith Packard <keithp@keithp.com>
2025-12-16 17:18:18 +09:00
Anas Nashif
f9637a5a65 tests: skip thrd test for now
This test fails sporadically on my platforms and block SDK pre-release.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-16 17:18:18 +09:00
Anas Nashif
1a68538c64 tests: c_lib: exclude 64 qemu platform
This one keeps failing sporadically, just exclude for now.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-16 17:18:18 +09:00
Keith Packard
08a1d827b6 modules/trusted-firmware-m: zephyr/gnu toolchain has a different path
The SDK has gratuitously moved all gcc toolchains to a subdirectory; adapt
to that by adding 'gnu/' when necessary

Signed-off-by: Keith Packard <keithp@keithp.com>
2025-12-16 17:17:29 +09:00
Anas Nashif
349917eef5 twister: fix variant handling
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-16 17:17:29 +09:00
Anas Nashif
524ca95cc5 tests: skip thrd test for now
This test fails sporadically on my platforms and block SDK pre-release.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-16 17:17:29 +09:00
Anas Nashif
1d88edcac9 cmake: add support enhanced variants with multiple compilers
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-16 17:17:27 +09:00
Anas Nashif
f3aa334e57 twister: support new toolchain variant syntax
support new syntax involving compiler and toolchains with multiple
compilers, i.e. zephyr/gnu

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-16 17:13:40 +09:00
Anas Nashif
195dd3d7c1 toolchains: combine host variants
Combine toolchains provided by the host into one variant. This includes
both gcc and llvm installationt typically coming from the distribution
(on Linux).

Both gcc and llvm are now part of the 'host' variant, the default is the
gnu compiler, so setting

	ZEPHYR_TOOLCHAIN_VARIANT=host

Will select the gnu compiler. To select llvm or any other compuler
provided in this variant, use the follwoing format:

	ZEPHYR_TOOLCHAIN_VARIANT=<variant>/<compiler>

The following will select llvm:

	ZEPHYR_TOOLCHAIN_VARIANT=host/llvm

Although gnu is the default, it can also be selected using the above
syntax:

	ZEPHYR_TOOLCHAIN_VARIANT=host/gcc

This commit removes the llvm variant for now, it should be deperecated
in another commit to follow.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-16 17:13:34 +09:00
Stephanos Ioannidis
236fe5df34 cmake: clang: Override -Wno-volatile with -Wno-deprecated-volatile
Override the GCC-specific `-Wno-volatile` flag specified by GCC
`compiler_flags.cmake` with the Clang-equivalent
`-Wno-deprecated-volatile`.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2025-12-16 17:07:43 +09:00
Stephanos Ioannidis
d75d1f755e cmake: linker: lld: Do not link libc when minimal libc is used
When LLVM linker is used, the toolchain-provided C standard library is
always linked, even when the Zephyr minimal libc is selected, because `c`
is unconditionally specified in `link_order_library`, which causes `-lc` to
be specified in the linker flags.

This commit adds a check to ensure that `-lc` is not specified when the
Zephyr minimal libc is selected because it is a standalone C standard
library and it does not make sense to link two C standard libraries at
once.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2025-12-16 17:03:46 +09:00
Stephanos Ioannidis
7396548614 lib: cpp: Enable POSIX and GNU C extensions for libc++
LLVM C++ Standard Library aka. libc++ makes use of POSIX and GNU C
extensions in its headers.

While far from ideal, there is no other option but to globally enable these
extensions for C++ source files in order to ensure that libc++ headers can
be used.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2025-12-16 17:03:46 +09:00
Stephanos Ioannidis
fdb491796c tests: libcxx: Add LLVM libc++/picolibc test
This commit adds a new C++ standard library test variant that builds with
Picolibc and LLVM C++ Standard Library aka. libc++ on the supported
toolchains (e.g. LLVM Embedded Toolchain for Arm and Zephyr SDK LLVM).

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2025-12-16 17:03:46 +09:00
Stephanos Ioannidis
b0063f9ec3 lib: cpp: Allow selecting libc++ with picolibc
LLVM C++ Standard Library aka. libc++ may be used with Picolibc -- for
example, LLVM Embedded Toolchain for Arm ships with Picolibc and libc++
compiled for Picolibc, and so does Zephyr SDK LLVM toolchain.

Ideally, we would a flag like `TOOLCHAIN_HAS_LIBCXX_PICOLIBC` indicating
that toolchain has libc++ compiled specifically for Picolibc; but, we do
not want to overcomplicate the toolchain feature flags at this time without
proper underlying infrastructure to handle it.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2025-12-16 17:03:45 +09:00
Stephanos Ioannidis
1a042408b8 tests: libcxx: Filter libstdc++ tests by TOOLCHAIN_HAS_GLIBCXX
Run libstdc++ tests only using the toolchains that have libstdc++ (i.e.
GCC-based toolchain).

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2025-12-16 17:03:45 +09:00
Stephanos Ioannidis
6092c5d9bd cmake: toolchain: Introduce TOOLCHAIN_HAS_LIBCXX
This commit introduces `TOOLCHAIN_HAS_LIBCXX` CMake variable, which is set
to `y` when LLVM C++ Standard Library aka. libc++ is available.

This helps filter libc++-specific Kconfig and tests in a more refined
manner.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2025-12-16 17:03:45 +09:00
Stephanos Ioannidis
224fc2b58d cmake: toolchain: Introduce TOOLCHAIN_HAS_GLIBCXX
This commit introduces `TOOLCHAIN_HAS_GLIBCXX` CMake variable, which is
set to `y` when GNU C++ Standard Library aka. libstdc++ is available.

This helps filter libstdc++-specific Kconfig and tests in a more refined
manner.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2025-12-16 17:03:45 +09:00
Anas Nashif
0ce4215c22 tests: c_lib: exclude rx arch
Many tests failing for RX, exclude those until the arch stablizes.

See #89839

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-16 17:03:45 +09:00
Jukka Rissanen
d5982f0f89 net: dns: Make sure IPv6 address can be stored to a buf
The CONFIG_DNS_RESOLVER_MAX_NAME_LEN should be large enough so that
IPv6 address can be stored into it. So increase the max name length
to 46 if IPv6 is enabled.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-15 17:11:29 +00:00
Mateusz Junkier
754f972b4d tests: kconfig: fix path for different repo names
Test expected path "zephyr/boards/Kconfig" but failed when the
repository had a different name.
Changed to "boards/Kconfig" to work with any repository name,
as code below.

Signed-off-by: Mateusz Junkier <mateusz.junkier@intel.com>
2025-12-15 17:11:18 +00:00
Mathieu Choplain
98e98be846 drivers: display: stm32_ltdc: remove unnecessary depends on in Kconfig
`choice STM32_LTDC_PIXEL_FORMAT` is already enclosed in an `if STM32_LTDC`
block - there is no need to add a `depends on` on this option.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-15 17:10:41 +00:00
Bjarki Arge Andreasen
5f1cf576a7 tests: arch: arm: vector_table: disable PM for nrf54h20 cpurad
The nrf54h20 cpurad has CONFIG_PM enabled by default. This causes
some of the IRQs reserved for the test to be triggered as they
are used for PM as well. Disable PM for the test to make sure
nothing triggers the IRQs outside of the test itself.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-15 17:10:32 +00:00
Guillaume Gautier
cec2702012 drivers: adc: stm32: fix init issue when 2 adc are enabled
If several ADCs are used and share a common clock property (for example
ADC1/2 prescaler value on STM32U5), none of them should be enabled when
the clock is set.
To that end, make sure to disable ADC at the end of the initialization,
it will be enabled later when necessary anyway.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-15 17:10:20 +00:00
Julien Racki
f8ffcbde17 drivers: i2c: stm32: Fix hang on read log position
Ensure that data is transmitted before logging
as it could cause lockups in some setups.

Also update i2c_stm32_v2_rtio.c to match
this behavior to always send data in order to avoid
the I2C to lockup.

Signed-off-by: Julien Racki <julien.racki-ext@st.com>
2025-12-15 17:10:11 +00:00
Tim Pambor
9399183944 drivers: rtc: rv3028: add calibration support
Add support for RTC calibration API by implementing set_calibration
and get_calibration functions. RV3028 RTC supports calibration to
adjust for errors from +243.2 ppm to -244.1 ppm in steps of 0.9537 ppm.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-15 17:10:01 +00:00
Tim Pambor
92365ed4b7 drivers: clock_control: stm32{h5,u5}: fix PLL rate with fractional PLL
When calculating the PLL output rate, take into account the fractional part
of the PLL multiplier N. This ensures that the calculated output frequency
is correct.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-15 17:09:46 +00:00
Trond F. Christiansen
049d368524 sensor: bmm350: Fix I2C register write to use single transaction
The bmm350_prep_reg_write_rtio_async() function was incorrectly using two
separate SQEs for register writes, creating two distinct I2C transactions:
Before: [START][ADDR+W][REG][RESTART] + [START][ADDR+W][DATA][STOP]

Change to use a single SQE for the entire write:
After: [START][ADDR+W][REG][DATA][STOP]

Signed-off-by: Trond F. Christiansen <trond.christiansen@nordicsemi.no>
2025-12-15 17:09:32 +00:00
Xavier Razavet
2264f9901c soc: nxp: MCXW7x configuration updated for CSL
The default MCXW7x platform's clock uncertainty in microseconds for
Coordinated Sampled Listening (CSL) timing synchronization in
OpenThread shall be set to 20.

Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
2025-12-15 17:09:20 +00:00
Xavier Razavet
aef5728e57 drivers: ieee802154: mcxw ieee802154 driver updated
To support the SSED attachment, the IEEE802154_MCXW_CSL_ACCURACY
default value shall be 50.

Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
2025-12-15 17:09:20 +00:00
Xavier Razavet
f6b3101db8 dts: arm: nxp: MCXW72 corrected on the lptmr clock frequency
The lptmr clock frequency was wrong and equal to 32000.
The clock frequency is 32.768KHz (32768).

Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
2025-12-15 17:09:20 +00:00
Xavier Razavet
536c937162 samples: openthread: shell: .conf files updated
frdm_mcxw71.conf: LOGs removed for RAM size optimization.
prj-ot-host.conf: LOGs removed because already in prj.conf.

Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
2025-12-15 17:09:20 +00:00
Xavier Razavet
91079cf825 drivers: ieee802154: SSED attachment management
Few functions have been corrected to the SSED attachment for the
MCXW72 as leader :
- mcxw_tx():
  tx_frame.tx_delay corrected.
  Adjusts the scheduled transmission start time to account for the SHR
  duration (160us) as requested by the OpenThread radio API.

- mcxw_rx_thread():
  Stores the frame counter and key ID from a
  security-enabled enhanced ACK into the received packet's metadata
  for cryptographic verification.

- mcxw_tx_started() added:
  Notifies the registered event handler that a frame transmission has
  started, passing the frame buffer as context.

- pd_mac_sap_handler(): timestamp corrected

- mcxw_configure(): IEEE802154_CONFIG_EVENT_HANDLER case updated

Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
2025-12-15 17:09:20 +00:00
Fabrice DJIATSA
f09282ecde release: migration-guide: 4.4: add entry about mcuboot mode
STM32 platforms now use the default MCUboot operating mode
swap using offset instead of swap using move.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-15 17:08:14 +00:00
Fabrice DJIATSA
2f48c25e98 tests: drivers: flash: stm32: handle conflict for storage partition
Since the addition of a new storage partition definition in
the nucleo_f746zg dts, there is no need to have this configuration
in the overlay file.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-15 17:08:14 +00:00
Fabrice DJIATSA
bdc79574c5 tests: boot: with_mcumgr: update testcase.yaml file
Add STM32 supported boards for the test.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-15 17:08:14 +00:00
Fabrice DJIATSA
81c93141dd tests: boot: test_mcuboot: update testcase.yaml file
Add STM32 supported boards for the test.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-15 17:08:14 +00:00
Fabrice DJIATSA
602baf6829 samples: sysbuild: with_mcuboot: update sample.yaml file
Add STM32 supported boards for the test.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-15 17:08:14 +00:00
Fabrice DJIATSA
d55fc5b857 boards: st: add support for boards compatible with swap using scratch
SomeSTM32 series, like F2, F4, and F7, do not have homogeneous flash
sector sizes; they include very large sectors such as 128 KB
and even 256 KB.

The scratch partition needs to be large enough to hold the largest
sector size ( 256k for F7 and 128k for F2).

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-15 17:08:14 +00:00
Fabrice DJIATSA
b348fd4d7a boards: st: add support for boards compatible with swap using offset
- Swap using offset requires that slot1 has one extra sector size
compared to slot0

- Additionally, add a storage partition with at least 3 sectors for
NVS if needed.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-15 17:08:14 +00:00
Fabrice DJIATSA
b152f71aaa modules: kconfig: mcuboot: make SWAP_USING_OFFSET the default for STM32
Update MCUboot configuration so that STM32 no longer defaults to
SWAP_USING_MOVE. Instead, SWAP_USING_OFFSET becomes the default mode
for STM32 boards.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-15 17:08:14 +00:00
Chaitanya Tata
5018d2456e modules: hostap: Workaround for BTM failure
Fixes WFA QT BTM test case.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-12-15 17:07:37 +00:00
Farsin Nasar V A
dd53e383e0 tests: drivers: pwm: Add SAM E54 test support for TC
Added overlay files for sam_e54_xpro TC nodes
Added sam_e54_xpro platform allow in testcase.yaml.
Added an extra scenario to testcase.yaml

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-15 17:07:24 +00:00
Muhammed Asif
b17128e517 boards: microchip: sam_e54_xpro: Add tc node with pwm support
- Adds the tc node and its pinmuxing to the board files

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-12-15 17:07:24 +00:00
Muhammed Asif
20d7d23d53 drivers: pwm: microchip: add support for pwm tc g1
Add pwm driver using tc g1 peripheral.
Adds the support for generating pwm output.
Supports 8-bit, 16-bit and 32-bit mode of tc peripheral

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-12-15 17:07:24 +00:00
Muhammed Asif
b926d85535 dts: bindings: microchip: add tc binding for pwm peripheral
Adds binding YAML for pwm using tc peripheral

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-12-15 17:07:24 +00:00
Muhammed Asif
79d841a600 dts: arm: microchip: add dts nodes of tc peripheral
Adds binding yaml for tc peripheral
Adds the dts nodes for tc peripheral for same5xd5x series and its
default configurations.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-12-15 17:07:24 +00:00
Johan Alfvén
5df9d8d176 MAINTAINERS: add hal_ethos_u collaborator
Add johan-alfven-arm as collaborator for hal_ethos_u driver

Signed-off-by: Johan Alfvén <johan.alfven@arm.com>
2025-12-15 17:07:01 +00:00
Jordan Yates
6b8ad0b48b samples: lora: send: display packet airtime
Display the expected airtime of the transmitted packet at the start of
the sample.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-15 17:06:49 +00:00
Jordan Yates
3514ff9fe2 samples: lora: zero initialise config structure
Zero initialise the configuration struct to ensure non-set fields are
zero.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-15 17:06:49 +00:00
Jordan Yates
08f74a2638 lora: add lora_airtime
Add a simple function that exposes the airtime of a packet of a given
length.

Use the new internal implementations of the airtime function when
calculating TX durations inside the send functions to reduce code
duplication on a complex function.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-15 17:06:49 +00:00
Jordan Yates
fab5f57455 lora: optional disable CRC
Add the option to disable the builtin 16 bit CRC on the LoRa payload.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-15 17:06:49 +00:00
zjian zhang
e369c524c3 MAINTAINERS: Add hal_realtek as a new HAL module
This commit adds maintainers for hal_realtek repository

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-15 17:06:38 +00:00
zjian zhang
1d36710436 boards: add rtl872xda_evb board
add initial version of rtl872xda_evb board

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-15 17:06:38 +00:00
zjian zhang
e788c98af6 drivers: gpio: add amebadplus gpio driver
GPIO driver for amebadplus

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-15 17:06:38 +00:00
zjian zhang
53bba6df01 drivers: serial: add amebadplus loguart driver
loguart driver for amebadplus

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-15 17:06:38 +00:00
zjian zhang
d21b2aa15d drivers: pinctrl: add amebadplus pin controller driver
add amebadplus pin controller driver

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-15 17:06:38 +00:00
zjian zhang
e6d690a983 soc: add realtek amebadplus SOC integration
Add initial version of Amebadplus Soc integration

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-15 17:06:38 +00:00
zjian zhang
56d6012c96 dts: arm: introduce amebadplus SOC Devicetree
add initial version of devicetree for amebadplus SOC.
amebadplus devicetree file is main platform dtsi file, which should
be included from board dts (e.g rtl872xda_evb.dts)

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-15 17:06:38 +00:00
zjian zhang
8ee8509533 west.yml: Add Realtek HAL as a new HAL module
Realtek HAL (Hardware Abstraction Layer) provides
a low level peripheral configuration function.

Signed-off-by: zjian zhang <zjian_zhang@realsil.com.cn>
2025-12-15 17:06:38 +00:00
Muhammad Waleed Badar
44eaeb0119 samples: ocpp: add DNS lookup before SNTP request
Added dns_query() function to perform DNS lookup before attempting
SNTP synchronization. This ensures the SNTP server hostname is
properly resolved to an IP address before making the time request.

Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
2025-12-15 07:31:20 -05:00
Lucien Zhao
fefb283730 boards: nxp: frdm_mcxe247: support cmp feature
- Enable CMP0_IN0 as input channel
- Enable gpio_loopback case

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-15 07:31:06 -05:00
Lucien Zhao
d90ca00c6a boards: nxp: frdm_mcxe247: add adc feature
- enable adc0 channel 0/1
- enable samples cases: adc_dt/adc_squence
         test case: adc_api

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-15 07:31:06 -05:00
CHEN Xing
297ab7ac15 samples: drivers: counter: alarm: add support for pit64b1
Add support for pit64b1 counter device.

Signed-off-by: CHEN Xing <xing.chen@microchip.com>
2025-12-15 07:30:40 -05:00
CHEN Xing
fd0f0f3c60 samples: drivers: counter: alarm: add definition for alarm flag
Counter devices can use this definition to specify alarm flags.

Signed-off-by: CHEN Xing <xing.chen@microchip.com>
2025-12-15 07:30:40 -05:00
CHEN Xing
b7268f9c3b boards: microchip: sam: add and enable pit64b1
Add and enable pit64b1 counter device.

Signed-off-by: CHEN Xing <xing.chen@microchip.com>
2025-12-15 07:30:40 -05:00
CHEN Xing
773cf7a141 soc: microchip: sam: update mmu for sama7g5 pit64b
Update mmu region for mchp sam pit64b
Add gclk configuration for mchp sam pit64b

Signed-off-by: CHEN Xing <xing.chen@microchip.com>
2025-12-15 07:30:40 -05:00
CHEN Xing
14b2a1dfa2 drivers: counter: add support for sama7g54 PIT64B
Add driver for sama7g54 PIT64B
Use PIT64B as a zephyr counter device

Signed-off-by: CHEN Xing <xing.chen@microchip.com>
2025-12-15 07:30:40 -05:00
CHEN Xing
8cad3fd382 dts: arm: microchip: sam: add pit64b device to sama7g5
Add pit64b1 ~ pit64b5 counter devices to sama7g5

Signed-off-by: CHEN Xing <xing.chen@microchip.com>
2025-12-15 07:30:40 -05:00
TOKITA Hiroshi
c7cac1373f tests: drivers: display: read_write: Fix tile eendering test
The buffer size calculation was not rounded up to what it needed.
We fixed it.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-12-15 07:30:31 -05:00
TOKITA Hiroshi
11d3fc4143 drivers: display: display_sdl: Reimplementing tile rendering
The current implementation has a bug in the calculation of
tile offsets, causing them to be calculated incorrectly.
This is particularly evident when there are fractional rows or columns.
Also, there was an assertion that assumed vtiled.

The logic has become too complicated,
so we'll reimplement to simplify this.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-12-15 07:30:31 -05:00
Josia Strack
287ca5b9eb drivers: gpio: pcf857x: ensure input pins default high for open-drain
Ensure that pins configured as inputs are driven high in the port
output register, consistent with open-drain operation. This prevents
inputs from being driven low unintentionally and aligns behavior
with hardware expectations.

Signed-off-by: Josia Strack <j.strack98@gmail.com>
2025-12-15 07:30:23 -05:00
William Tang
4f152eeb37 drivers: can: mcux: flexcan: fix prop_seg for enhanced bit timing
Move the no propagation segment configuration and prop_seg must be 0
logic from the general timing configuration to only apply within the
CAN FD specific sections.

This ensures that for classic CAN mode or platfrom without enhanced
bit timing, prop_seg is always decremented by 1.

The previous implementation incorrectly applied the enhanced bit timing
logic to classic CAN mode, which could cause timing misconfiguration
on devices with enhanced bit timing register support when operating in
classic CAN mode.

Fixes #99746

Signed-off-by: William Tang <william.tang@nxp.com>
2025-12-15 07:30:06 -05:00
Jason Yu
184e031163 drivers: timer: ostimer: Fix run fail when no deep_sleep_counter
Only access deep_sleep_counter when it is available.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-15 07:29:59 -05:00
Jason Yu
c9a1e0fd91 drivers: timer: ostimer: Change to use reset API
Use reset API to reset OSTIMER for better portability.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-15 07:29:59 -05:00
Jason Yu
4e760db893 dts: bindings: os-timer: Add resets in device tree binding
Add resets in OSTIMER device tree binding

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-15 07:29:59 -05:00
Jason Yu
2bff5bdef0 dts: nxp: resets: include the reset header
Include the header so that resets can be added in
each driver node, for such platforms: mcxaxxx6, mcxa344.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-15 07:29:59 -05:00
Zhaoxiang Jin
2e54a3915b tests: counter_basic_api: harden alarm capability probing
- Add a self-contained alarm_capable() probe that starts the device, sets
  and cancels a 1-tick alarm, and stops the counter again. This treats
  -ENOTSUP as “not capable” and avoids leaving pending alarms.
- Switch single/multiple alarm capability checks to reuse alarm_capable(),
  preventing unsupported drivers from running alarm cases and reducing
  false failures.
- Ensure capability probing no longer leaves the driver running or with
  active alarms, preventing teardown/set_top_value failures in later tests.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-15 07:29:41 -05:00
Valerio Setti
d76477f9eb drivers: crypto: mbedtls_shim: fix crash in AES-ECB for RISCV 64 bits
Using "pkt->out_len" as the output length of "psa_cipher_[en|de]crypt"
caused a crash in RISCV 64 bits platforms due to misaligned address
access.
The solution is to add a temporary value on the stack to store this lenght
and only after the [en|de]cryption copy it to "pkt->out_len".

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-15 07:29:29 -05:00
Valerio Setti
75b48db718 samples: drivers: crypto: fix regex matching for Mbed TLS shim
Update regex matching for the Mbed TLS shim driver scenario in order to
match all the supported cases and ensure that they all passed.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-15 07:29:29 -05:00
Valerio Setti
ea9c1af07d samples: drivers: crypto: fix heap memory size for Mbed TLS shim
Increase heap memory size when Mbed TLS shim driver is used otherwise
all crypto tests will fail on some platforms.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-15 07:29:29 -05:00
Fabio Baltieri
318e43503f drivers: ksz8081: fix reset pin polarity
The reset pin, like most reset pins, is active low. Fix the driver to
treat it as active low and simplify the pin control logic while at it.
Fix all current boards using the wrong pin definition and add a note for
out of tree users.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-12-15 07:29:21 -05:00
Fabrice DJIATSA
683ea0eaf0 tests: drivers: spi: spi_loopback: add support for nucleo_g071rb
add nucleo_g071rb overlay and conf files to configure board
to execute spi_loopback to set up the board for executing the
spi_loopback test on CI.
With this addition, we will now be able to detect SPI and RTIO
regressions on this board.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-15 07:29:11 -05:00
Zhaoxiang Jin
93ec5c8c1d test: comparator: Enable gpio_loopback for NXP ACOMP driver
Enable gpio_loopback test for NXP ACOMP driver.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-15 07:29:01 -05:00
Zhaoxiang Jin
315e4efa2d test: comparator/gpio_loopback: handle unsupported BOTH trigger mode
If the comparator driver does not support BOTH edge trigger mode,
skip the test instead of failing it.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-15 07:29:01 -05:00
Zhaoxiang Jin
864272d892 boards: nxp/frdm_rw612: Enable NXP ACOMP for frdm_rw612
Enable NXP ACOMP for frdm_rw612

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-15 07:29:01 -05:00
Zhaoxiang Jin
bd65e115fa drivers: comparator: add NXP ACOMP driver support
Add NXP ACOMP comparator driver support.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-15 07:29:01 -05:00
Zhaoxiang Jin
c65ffc7737 soc: nxp: rw: Power on GAU if acomp is enabled
Power on GAU if acomp is enabled.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-15 07:29:01 -05:00
Farsin Nasar V A
b682749a62 tests: drivers: rtc: Add support for the pic32cx_sg41 and sg61 board
Added pic32cx_sg41_cult.conf file and pic32cx_sg61_cult.conf file

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-15 07:28:50 -05:00
Farsin Nasar V A
12192e9d34 boards: microchip: pic32cx_sg61_cult: Add RTC to supported list
Add RTC node in pic32cx_sg61_cult.dts
Update pic32cx_sg61_cult.yaml to reflect RTC G1 support on the board.

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-15 07:28:50 -05:00
Farsin Nasar V A
58a9c9335c boards: microchip: pic32cx_sg41_cult: Add RTC to supported list
Add RTC node in pic32cx_sg41_cult.dts
Update pic32cx_sg41_cult.yaml to reflect RTC G1 support on the board.

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-15 07:28:50 -05:00
Farsin Nasar V A
1e510faed4 dts: arm: microchip: add RTC node for G1 IP
Add the device tree node for microchip RTC G1 IP.

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-15 07:28:50 -05:00
Muzaffar Ahmed
dbe12ad8de drivers: wifi: siwx91x: Fix region persistence across reboots
Use the last configured region in the boot config for the next boot,
as opposed to a default region.

Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
2025-12-15 07:28:17 -05:00
Martin Lampacher
a0b8684e46 boards: doc: remove tfm note for stm32u0 boards
The STM32U0 series MCUs don't support TF-M and therefore the
note regarding the `build/tfm` directory needs to be removed.

Signed-off-by: Martin Lampacher <martin.lampacher@gmail.com>
2025-12-15 07:28:07 -05:00
Michael Zimmermann
4759e39122 net: mqtt_sn: Disable support for GWINFO messages
The MQTT-SN v1.2 [0] specification specified the GwAddr as follows:
The GwAdd field has a variable length and contains the address of a GW. Its
depends on the network over which MQTT-SN operates and is indicated in the
first octet of this field. For example, in a ZigBee network the network
address is 2-octet long.

It specifies neither the possible values for the first octet, nor the
format of the network-specific address that follows. Thus, the
specification is incomplete and this functionality unusable.

I also wasn't able to find any implementation which implements a gwinfo
message where the address length is not zero. This includes
https://github.com/eclipse-paho/paho.mqtt-sn.embedded-c .

The current implementation in Zephyr simply copies a `struct sockaddr`
into GwAddr. This is a bad idea for many reasons, the most important one
being that the format is not even specified by POSIX [1]. They only say,
which defines must exist, not what their values are. And in fact, these
even differ between Zephyr and Linux.

Thus, I think it's best to remove the implementation to prevent people from
using this, which may even lead to memory safety issues, depending on the
length of CONFIG_MQTT_SN_LIB_MAX_ADDR_SIZE. If we were to receive an
updated specification, all we'd have to do is to convert between `struct
sockaddr` and mqtt-sn addresses both ways.

[0] https://groups.oasis-open.org/higherlogic/ws/public/download/66091/MQTT-SN_spec_v1.2.pdf
[1] https://pubs.opengroup.org/onlinepubs/9799919799/basedefs/sys_socket.h.html

Signed-off-by: Michael Zimmermann <michael.zimmermann@sevenlab.de>
2025-12-15 07:27:57 -05:00
Michael Zimmermann
53012f9cc2 tests: net: mqtt_sn: client: Test gwinfo response from a gateway itself.
When the response comes from a gateway, the address length is 0. I renamed
the test which tests a gwinfo from another client to make this more clear.

Signed-off-by: Michael Zimmermann <michael.zimmermann@sevenlab.de>
2025-12-15 07:27:57 -05:00
Michael Zimmermann
2d8cb5dad9 tests: net: mqtt_sn: client: fix running just search_gw
Since the code can't handle timestamp 0, we have to sleep during setup.

Signed-off-by: Michael Zimmermann <michael.zimmermann@sevenlab.de>
2025-12-15 07:27:57 -05:00
Holt Sun
7214e39540 boards: nxp: frdm_mcxe247: enable CRC
Enable the CRC peripheral for MCXE24x and turn it on in the
FRDM-MCXE247 board DTS. Add a CRC sample board config to run
on FRDM-MCXE247 with default.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-15 07:27:48 -05:00
Holt Sun
45e9fe3eb2 drivers: crc: nxp: add CRC driver
Support CRC16 and CRC32 variants; return -ENOTSUP for unsupported types.
Use kCrcBits16/kCrcBits32 and complementChecksum for IEEE CRC-32.
Stream data via CRC_WriteData() and fetch results via
CRC_Get16bitResult()/CRC_Get32bitResult().
Provide simple thread-safety with a semaphore.

Work around the name clash between Zephyr's typedef crc_result_t and the
MCUX enum name by temporarily redefining crc_result_t around fsl_crc.h
include in this TU.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-15 07:27:48 -05:00
Holt Sun
6e6cc2270d dts: bindings: crc: add NXP CRC binding
Add devicetree binding for the NXP CRC controller
(compatible "nxp,crc") with required reg property.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-15 07:27:48 -05:00
Holt Sun
a838ad5ece modules: hal_nxp: mcux: enable CRC driver component
Enable mcux crc driver for zephyr crc driver.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-15 07:27:48 -05:00
Holt Sun
dd73fce1ce tests: drivers: crc: add conditional test compilation
Make CRC tests conditional based on driver capabilities to support
drivers that implement only a subset of CRC protocols.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-15 07:27:48 -05:00
Holt Sun
b44fe22e98 samples: drivers: crc: select protocol by capability
Choose CRC protocol in the sample at build time using
CONFIG_CRC_DRIVER_HAS_* guards (CRC8, CRC16-CCITT, CRC32-IEEE, CRC32-C).
Allow optional verification via EXPECTED_* macros; otherwise log result.
Update README to describe selection and add build instructions for
frdm_mcxe247 in addition to ek_ra8m1.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-15 07:27:48 -05:00
Håvard Reierstad
1540814488 Bluetooth: Host: Add random number clarification
Updates the `bt_le_oob_set_legacy_tk` API docs to encourage the temp key
to be generated randomly for each pairing process.

Updates the `bt_le_oob_get_local` and `bt_le_ext_adv_oob_get_local` to
encourage the user to generate new OOB information for each paring
process.

Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
2025-12-15 07:27:19 -05:00
Sylvio Alves
b7b32944fc drivers: espressif: move ISRs into IRAM area
Most of Espressif drivers ISRs are already running in IRAM area, except
those in this PR. Move ISRs accordingly so we avoid any
interrupt miss when cache is disabled.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-15 07:27:10 -05:00
Benjamin Cabé
cb93f97bd6 boards: m5stack: add full_name for NanoC6 board
Add full_name field to the m5stack_nanoc6 board definition

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-14 11:14:57 +00:00
Bjarki Arge Andreasen
66dbe436bd lib: os: poweroff: Disable ZLIs before poweroff
We currently only disable "normal" IRQs with irq_lock(). This is not
sufficient if ZLIs are enabled, as even though they are supposed to
be "above" the kernel, they must not interrupt the poweroff procedure.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-14 11:14:45 +00:00
Bjarki Arge Andreasen
7c72e3cc42 lib: os: reboot: Disable ZLIs before reboot
We currently only disable "normal" IRQs with irq_lock(). This is not
sufficient if ZLIs are enabled, as even though they are supposed to
be "above" the kernel, they must not interrupt the reboot procedure.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-14 11:14:45 +00:00
Bjarki Arge Andreasen
239d20af90 arch: arm: implement arch_zli_lock and arch_zli_unlock
Implement arch_zli_lock and arch_zli_unlock for the currently only
supported target cortex-M.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-14 11:14:45 +00:00
Bjarki Arge Andreasen
1bbbedc956 arch: introduce arch_zli_lock and arch_zli_unlock
Introduce APIs for locking zero latency interrupts.

Zero latency interrupts are defined as non-maskable interrupts
"above" the kernel. They can not be locked by the kernel.

However, there are cases where we do need to mask/lock ZLIs from the
kernel, namely when accessing and changing the state of core shared
hardware like RAM and the CPU which must be done atomically.

A common case is when powering down or rebooting the SoC. We can't
allow any IRQ, ZLI or not, to interrupt these operations. In any case,
such an interrupt would be immediately followed by the CPU being off,
and whatever process running from ZLIs would be terminated anyway.

Since we have specific usecases which require these APIs, and there
are already drivers and socs which do lock ZLIs by directly calling
arch APIs to acheive this, let's officially add the APIs with
appropriate documentation detailing expected usecases and warning of
the dire consequences of misusing it, keeping it in arch/cpu.h to
limit exposure of the API (compared to having it in zephyr/irq.h).

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-14 11:14:45 +00:00
Jason Yu
5ce1df22fa drivers: counter: nxp_mrt: Support power device constraint
Call pm_policy_device_power_lock_put/pm_policy_device_power_lock_get
to coordinate with system level power modes.

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2025-12-14 11:14:35 +00:00
Kyle Bonnici
bbff45f1c4 DTS: format files using dts-linter 0.3.7-hotfix2
- Ensure that properties have 2 new lines when node is above it.
- Enures that 1 new line is required between a node and #if/#ifdef...
- Enures that 2 new line are required between #endif and node.
- Wraps property values that exceed 100 characters in length.

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2025-12-12 15:38:31 -05:00
Kyle Bonnici
d726022f83 CI: Update dts-linter to 0.3.7-hotfix2
dts-linter 0.3.7-hotfix2 Security Updates:
- Update `glob` to address CVE-2025-64756
- Update `js-yaml` to address CVE-2025-64718

Formatting updates:
- Ensure that properties have 2 new lines when node is above it.
- Enures that 1 new line is required between a node and #if/#ifdef...
- Enures that 2 new line are required between #endif and node.
- Wraps property values that exceed 100 characters in length.

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2025-12-12 15:38:31 -05:00
Jukka Rissanen
869cfb8fd6 samples: net: pkt_filter: Disabling packet priorities by default
The packet priority support is disabled by default so that the
application can work "normally" as a sample for trying network
packet filtering.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-12 15:38:18 -05:00
Jukka Rissanen
47941a6f58 samples: net: pkt_filter: Add IPv4/6 address blocklist
Add information how to block IPv4 or IPv6 addresses.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-12 15:38:18 -05:00
Jukka Rissanen
9dd57b3405 samples: net: pkt_filter: Fix the readme file
The readme file did not mention the network packet priority
based rules 1-5 introduced recently.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-12 15:38:18 -05:00
Jukka Rissanen
7c62cd32cb net: pkt_filter: Reformat macro lines
Shorten long lines with \ chars in NPF_PRIORITY macro so that the output
looks good if user is using narrower window to view the code.
Reformat \ in NPF_RULE macro so that the code looks better.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-12 15:38:18 -05:00
Jukka Rissanen
2f3e902cd0 net: Start RX before the TX
Honor the comment in the code and make sure RX is started
before TX so that we can receive responses to any data we
are sending.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-12 15:38:18 -05:00
Aksel Skauge Mellbye
3ac0e760e6 boards: silabs: sltb010a: Enable watchdog for testing
Declare watchdog as supported for testing.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-12-12 15:37:28 -05:00
Aksel Skauge Mellbye
9a17f66b77 boards: silabs: xg24_ek2703a: Enable analog peripherals
Configure ADC and DAC to use the Analog pin on the Mikrobus
connector as input/output to enable ADC and DAC samples.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-12-12 15:37:28 -05:00
Aksel Skauge Mellbye
01e19e96c9 boards: silabs: List ADC as supported for testing
Add ADC to supported list for testing on boards that have a
zephyr,user io-channels property.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-12-12 15:37:28 -05:00
Aksel Skauge Mellbye
5be58ab543 boards: silabs: Add pwm-leds configuration
Add PWM configuration on boards that have LEDs, but were
missing a definition of pwm-leds.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-12-12 15:37:28 -05:00
Aksel Skauge Mellbye
44627801a3 boards: silabs: Enable PWM on boards with PWM configuration
xg24_dk2601b and bg22_ek4108a has PWM configuration in Devicetree,
but didn't enable PWM for testing. xg24_dk2601b has RGB LEDs,
add aliases to enable the rgb_led sample.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-12-12 15:37:28 -05:00
Aksel Skauge Mellbye
94212fb665 samples: driver: counter: Fix silabs timer name
The Counter alarm sample contains a hard-coded list of devicetree
nodes to use. Since the definition of the counter node was changed
on Series 2 devices in #97912, this sample hasn't compiled.

Update the sample to select the correct devicetree node, and
add representative boards to platform_allow to allow the sample
to be tested on Series 2 boards.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-12-12 15:37:19 -05:00
Aksel Skauge Mellbye
3b15324eac samples: drivers: uart: async_api: Add overlays for silabs boards
Add overlays enabling DMA for Silabs boards to enable use of the
async API on the default shell uart.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-12-12 15:36:58 -05:00
Camille BAUD
d8f67d777b tests: build_all: display: rename bflb dbi m62 overlay
Forgot to update the file name in PR changing naming

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-12 15:34:59 -05:00
Camille BAUD
0d4517a8ef tests: build_all: display: clear up logic
platform_exclude not necessary

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-12 15:34:59 -05:00
Julien Vermillard
9ece57491b boards: holyiot: support holyiot 21014
Add support fot the holyiot 21014 board.
BLE 5.0 module based on NRF52810.

Signed-off-by: Julien Vermillard <julien@clunkymachines.com>
2025-12-12 15:34:19 -05:00
Marek Maškarinec
5741f3ee6b drivers: tmag5273: Add mag gain property
Adds mag-gain-correction DT property, which sets the magnetic gain
correction value. Previously a property to select the channel for gain
correction existed, but there was no way to configure the correction
value itself.

Signed-off-by: Marek Maškarinec <marek.maskarinec@hardwario.com>
2025-12-12 09:58:56 -05:00
Jason He
89d3de81e6 boards: frdm_imx93: enable USB support
Add EHCI controller configuration with dual USB instances (USB1/USB2),
device tree bindings, 8 bidirectional endpoints, and UDC workqueue
stack optimization for frdm_imx93 A55 platform.

Signed-off-by: Jason He <jason.he_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Jony Zhang <jony.zhang@nxp.com>
2025-12-12 09:58:32 -05:00
Jony Zhang
ddb3acfb74 drivers: usb: mcux_ehci: add MMIO configuration for i.MX 93 family
The original driver is only feasible for M-Core, but for Cortex-A Core,
it need to do MMU mapping to map physical address to virtual address,
to the main update is to add MMIO mapping in this driver, and all the
register access should use virtual address.

Replace direct base address access with DEVICE_MMIO_NAMED_* macros
to provide better memory mapping abstraction and improve platform
portability.

This change:
- Adds DEVICE_MMIO_NAMED_ROM/RAM to config and data structures
- Maps the register base address during driver pre-initialization
- Updates all base address references to use DEVICE_MMIO_NAMED_GET
- Maintains backward compatibility with existing functionality

The DEVICE_MMIO API provides a standardized way to handle memory-mapped
registers across different platforms and memory protection schemes.

Signed-off-by: Jason He <jason.he_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Jony Zhang <jony.zhang@nxp.com>
2025-12-12 09:58:32 -05:00
Jason He
c2b7ae10e6 drivers: usb: mcux_ehci: add clock control for i.MX 93 family
Support device tree specified clock rates for USB controller and PHY.

Signed-off-by: Jason He <jason.he_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Jony Zhang <jony.zhang@nxp.com>
2025-12-12 09:58:32 -05:00
Jiafei Pan
02c808f390 modules: hal_nxp: fix camke for sdk-ng middleware
As middleware.cmake could be included by mcux-sdk's CMakeLists.txt,
so use CMAKE_CURRENT_LIST_DIR to make sure the directory is correct.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Jony Zhang <jony.zhang@nxp.com>
2025-12-12 09:58:32 -05:00
Jason He
24c510ec54 drivers: clock: mcux_ccm: add USB clock control support
Add USB_CLK and USB_PHY_CLK support for NXP EHCI controller on MIMX9352.

Signed-off-by: Jason He <jason.he_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Jony Zhang <jony.zhang@nxp.com>
2025-12-12 09:58:32 -05:00
Tomas Gudelevičius
b2d7055de9 drivers: modem: cellular: reinit modem after script failures
If the modem reboots or stops responding to AT commands while in
RUN_DIAL, AWAIT_REGISTERED, or CARRIER_ON, the modem_cellular state
machine could previously dead-end. Applications had to recover by
manually issuing device PM suspend/resume.

This change adds an internal recovery path: after repeated chat/script
failures in the states above, the driver resets the state to INIT, and
posts an immediate RESUME event. This allows the initialization sequence
to run again and restores connectivity, including after unexpected modem
reboots.

No API changes; behavior only differs in failure scenarios.

Signed-off-by: Tomas Gudelevičius <tomas.gudelevicius@draeger.com>
2025-12-12 09:58:23 -05:00
Jisheng Zhang
d2ec1c35a0 boards: renesas: Add CPKCOR-RA8D1B board support
Add CPKCOR-RA8D1B board support. Tested uart, button, led, sdram,
tfcard and usbhs.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
2025-12-12 09:58:11 -05:00
Jisheng Zhang
1dc0e167e3 dts: arm: renesas: Add DTCM and ITCM nodes for RA8D1
Add DTCM and ITCM for RA8D1.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
2025-12-12 09:58:11 -05:00
Jamie McCrae
a4e2a38370 scripts: zephyr_module: Skip writing output on no change
Skips updating files if the output already matches the file
contents, this prevents a random occurance whereby sysbuild
reconfigures itself after a reconfiguration for no known
discernable reason

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2025-12-12 09:57:48 -05:00
Tim Pambor
7a9b4d3a5c boards: st: stm32h573i_dk: Add TF-M non-secure app support
Add support for building Trusted Firmware-M (TF-M) non-secure
applications for the STM32H573I-DK board.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-12 09:57:40 -05:00
Cristian Bulacu
267c3196f6 net: l2: openthread: Bring OT iface up on backbone events
When Ethernet is enabled, `net_config_init_app` function will use the
first found interface that has auto start enabled. In this particular
case, backbone interface will not be able to perform dhcp request
because OpenThread interface gets to be the first interface found
and chose. Openthread will fail this procedure, as it has no
direct connectivity to backbone.
This is why, ethernet app has `CONFIG_IEEE802154_NET_IF_NO_AUTO_START`
set.
In this case, make sure to call net_if_up for OpenThread interface from
border router code when backbone events are triggered.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-12-12 09:57:20 -05:00
Cristian Bulacu
7abba8812f samples: net: openthread: border_router: Add ethernet config
Added project configuration for OpenThread Zephyr Border Router with
ethernet configured as backbone interface

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-12-12 09:57:20 -05:00
Camille BAUD
7a1e2d7509 drivers: lora: Add explicit support for variants
Add explicit support for sx1268, sx1278, llcc68

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-12 09:57:09 -05:00
Camille BAUD
287f40edbe drivers: lora: Add regulator-ldo for sx126x
Adds ability to set usage of LDO instead of DCDC

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-12 09:57:09 -05:00
Damian Krolik
1a6ff4f8e4 drivers: ieee802154: remove unused IEEE802154_CSL_DEBUG
The Kconfig option is not used anywhere for a while.

Signed-off-by: Damian Krolik <damian.krolik@nordicsemi.no>
2025-12-12 09:57:00 -05:00
Nikodem Kastelik
b62921f4ce tests: boards: nrf: i2c: add twi variant
Currently only TWIM peripheral is verified against TWIS.
Add new test variant to verify nRF52 TWI peripheral as well.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2025-12-12 09:56:50 -05:00
Alberto Escolar Piedras
ba9b5f5ce0 tests: subsys: crc: Improve test
1) Also build the CRC shell:
   Even if we do not runtime test that part, let's at least build it.
   Otherwise we do not have any test building it, and it just rots.
2) Do not limit the test to devices with HW CRC acceleration.
   The CRC module has a SW version, and it makes sense to test it also.
   (we were only build testing the HW support side in CI so far).
3) Limit what we test in integration to one platform for the SW version
   and one HW platform.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-12 09:56:43 -05:00
Alberto Escolar Piedras
a2a215e8cc subsys/crc/crc_shell: Fix includes
To use the shell one does not need anymore to pull unistd.h,
if one uses sys_getopt, we need to include sys/sys_getopt.h

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-12 09:56:43 -05:00
Matthias Alleman
158ec0384b drivers: input: input_chsc5x: configurable ic type verification
Add Kconfig option to skip or execute the verification of the ic
type. This adds a delay of 100ms to the initialization.

Signed-off-by: Matthias Alleman <matthias.alleman@basalte.be>
2025-12-12 09:56:30 -05:00
Matthias Alleman
7a662cac8b drivers: input: input_chsc5x: add delay after reset
The sensor requires at least 94ms of delay before starting
communication after a reset. This is not mentioned in the
datasheet but is arbitrarily defined.

Signed-off-by: Matthias Alleman <matthias.alleman@basalte.be>
2025-12-12 09:56:30 -05:00
Gaetan Perrot
d904d11a22 tests: Fix typo in "Unsupported configuration" error message
Several test sources used the misspelled string "Unsupported
configuraiton".

Fix the typo across all affected files to improve clarity and
consistency.

Updated files:
 - tests/boards/nrf/rram_throttling/src/main.c
 - tests/drivers/flash/common/src/main.c
 - tests/drivers/flash/negative_tests/src/main.c

No functional change.

Signed-off-by: Gaetan Perrot <gaetan.perrot@spacecubics.com>
2025-12-12 09:56:20 -05:00
Anuj Pathak
cb2109e7d9 samples: drivers: i2s: echo: add MAX32655 support
- reduced block length from 100ms to 33.33ms to compile for low ram
- add compile time conditional option to slave mode
- add overlay file for max32655fthr

Signed-off-by: Anuj Pathak <anuj@croxel.com>
2025-12-12 05:01:31 -05:00
Anuj Pathak
c0b013d2d4 samples: drivers: i2s: echo: Add MAX9867 codec support
Add MAX9867 codec initialization support to the sample
to later use for MAX32655FTHR support

Signed-off-by: Anuj Pathak <anuj@croxel.com>
2025-12-12 05:01:31 -05:00
Anuj Pathak
68b23bab28 boards: max32655fthr: enable i2c1
MAX32655 uses I2C1 to control on board PMIC and Audio Codec
this commit enable it as per board spec

Signed-off-by: Anuj Pathak <anuj@croxel.com>
2025-12-12 05:01:31 -05:00
Anuj Pathak
4409ba8655 drivers: i2s: add i2s driver for max32 mcu
add necessary build files and i2s driver with tx/rx support

Signed-off-by: Anuj Pathak <anuj@croxel.com>
2025-12-12 05:01:31 -05:00
Anuj Pathak
c4e857c9fd dts: i2s: add i2s node for max32655fthr
- add basic dma only i2s dts binding for max32-i2s
- add i2s node with default config to max32655.dtsi
- add i2s pin definition for max32655fthr board as per spec

Signed-off-by: Anuj Pathak <anuj@croxel.com>
2025-12-12 05:01:31 -05:00
Bjarki Arge Andreasen
7c2ab76a70 drivers: timer: nrf_grtc: Decouple clock source from CLOCK_CONTROL
The GRTC timer, typically used as sys clock on newer nordic chips,
is currently tightly coupled to the CLOCK_CONTROL_NRF drivers though
not being dependent on it. The GRTC and its device driver is
independent from CLOCK_CONTROL, its clock requirements are managed
by hardware, based on its clock source selection.

This commit moves the clock source selection to the GRTC driver, and
removes the hard coupling to the CLOCK_CONTROL drivers. To preserve
backwards compatibility, if CLOCK_CONTROL_NRF_K32SRC_RC is selected,
GRTC will default to LFLPRC.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-12 04:59:53 -05:00
Benjamin Cabé
bef6cdb127 sys: util: add sys_ prefix to SIGN, gcd, and lcm utils
As per our naming conventions for public symbols, these utility functions
and macros should be prefixed with "sys_".

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-12 04:58:14 -05:00
Benjamin Cabé
7389cbbd3e sys: util: hide internal gcd/lcm helpers
These should not show up as API in doxygen

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-12 04:58:14 -05:00
Ruibin Chang
d26ffeba9d drivers/pwm/it8xxx2: add pwm init output level property
When EC reboot, pwm pins go back to default GPI mode.
After we set pin mode to pwm mode at init(), it would
output low, so LED will be light (LED is low-activated).
And until set_cycles() is called to set output high,
then LED will be turn off the light (PWM-LED flicker).
So add the property to set PWM channel init output level.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2025-12-12 04:56:42 -05:00
Jeppe Odgaard
d32e7de509 debug: coredump: add cpp header guards
Add header guards to support usage from C++.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2025-12-12 04:55:58 -05:00
Peter Ujfalusi
ebb5625bee intel_adsp: Add debug slot manager
Currently all drivers which uses a slot from the debug window have fragile
hardwired slot 'mapping', they are locked to use specific slots even if
there are free slots available for them to take.

The new API hides the management of the slots and descriptors and users
can ask, release or even seize slots that they want to use.

Add a new debug slot manager API and a new default no config option to
allow selection between the hardwired or dynamic debug slot management.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2025-12-12 04:54:53 -05:00
Peter Ujfalusi
2ce9d5f5e3 soc: intel_adsp: tools: cavstool.py: Look up the shell slot by type
Instead of using hardwired index for the shell debug slot, look it up by
it's type.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2025-12-12 04:54:53 -05:00
Peter Ujfalusi
8cb287a411 intel_adsp: debug_window: Describe the partial slot in page0
Resize the reserved part of the debug window to cover the first 1K and
define the partial_page0 which will cover the partial slot in page 0.

Add comment to describe the debug window layout.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2025-12-12 04:54:53 -05:00
Peter Ujfalusi
c7dd9d79bd intel_adsp: kconfig: Increase the default size of MEMORY_WIN_2_SIZE
The current default of 8192 will provide only 2 pages in debug window:
page0: descriptors
page1: slot0

However, the coredump is hardwired to use slot1, which by default is not
valid.

Increase the default window size to 12288 to allow three pages.

This change affects CAVS25 only as it is using default window sizes and the
window 3 is not used in this configuration at all (it was used with IPC3
only), so we do have enough space for the three page - we could even
increase the default to cover 4 pages (8192+8192), but let's be
conservative on this.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2025-12-12 04:54:53 -05:00
Peter Ujfalusi
81666a3275 intel_adsp: common: gdbstub: Correct z_gdb_backend_init() return type
The z_gdb_backend_init() is defined to return with success/error code
with return type of int.

Fixes: a9c47a47a4 ("intel_adsp: cavs: add gdb support")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2025-12-12 04:54:53 -05:00
Krzysztof Chruściński
90bbc47122 samples: boards: nordic: coresight_stm: Benchmark only the cached code
Add additional call before starting time measurement to ensure that
all calls that are benchmarked are already cached. This change allows
to get more stable results as all exectutions are from cache.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-12 04:47:50 -05:00
Khoa Nguyen
3a384173b4 tests: drivers: i2c: Update to use i2c_write instead of burst_write
Update test app `i2c_target_api` to use i2c_write instead of using
same burst_write functional

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-12-12 10:30:55 +01:00
Qingsong Gou
de66e05602 drivers: watchdog: sf32lb: fix return errors
Fix watchdog driver return error

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-12 10:30:15 +01:00
S Mohamed Fiaz
e88400036e modules: hal_silabs: wiseconnect: CMakeLists fix
This fix addresses a PM failure caused by an inconsistency
between the device tree and the build system. The device tree
was updated with `reg = <0x00000400 DT_SIZE_K(319)>;`,
but the corresponding value for `SL_SI91X_SI917_RAM_MEM_CONFIG`
in CMakeLists.txt was not updated, leading to the problem.
The build system now automatically sets `SL_SI91X_SI917_RAM_MEM_CONFIG`
based on the sram0 RAM size from the device tree using `dt_prop()`
and `list(GET)`, ensuring the configuration matches the device tree
and preventing future mismatches.

Signed-off-by: S Mohamed Fiaz <Fiaz.Mohamed@silabs.com>
2025-12-12 10:29:49 +01:00
Fabio Baltieri
006a951323 tests: assert_custom_header: only build on some platforms
This test does not build correctly on some modules, namely TFM, just run
it on a few platform, that should be enough to validate that the feature
is working correctly.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-12-11 16:36:45 -05:00
Cristian Bulacu
6dab107c91 openthread: Kconfig: Enable packet filtering
Enable packet filtering functionality for OpenThread Border Router when
NAT64 Translator is enabled

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-12-11 16:36:17 -05:00
Cristian Bulacu
d1858bed24 openthread: platform: infra_if: Add packet filtering rule for NAT64
This commit aims to implement IPv4 packet filtering for NAT64 translator.
If packets are consumed, those are not processed anymore by network
stack.
NAT64 packets are created by OpenThread stack and sent on backbone
interface using a raw socket.

This commit attempts to fix an issue where a TCP connection is initiated
by an OpenThread node, but discarded by network stack since there is no
active known connection.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-12-11 16:36:17 -05:00
Bjarki Arge Andreasen
1adf52166d samples: boards: nordic: clock_control: add README.rst
Add documentation of the nordic clock control sample in the form of
a README.rst

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-11 16:35:54 -05:00
Krzysztof Chruściński
01fc83d63d boards: nordic: nrf54h20dk: Add cpuapp TCM memory section
Add memory section which is placed in cpuapp TCM (Tightly Coupled
Memory) RAM0 which is fast, non-cacheable.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-11 16:35:45 -05:00
Krzysztof Chruściński
d9f1761571 boards: nordic: Add bias-pull-up to UART TX pin sleep state
When UART TX pin is in sleep state it should have pull up. So far it
was floating and that could lead to garbage output on terminal.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-11 16:35:18 -05:00
Fabin V Martin
f9fb943967 boards: microchip: Update pic32cm_jh01_cpro device tree
Add uart support for pic32cm_jh01_cpro.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-11 16:35:07 -05:00
Fabin V Martin
7b39f9ac71 dts: arm: microchip: pic32cm_jh: add sercom nodes
Add sercom nodes for pic32cm_jh

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-11 16:35:07 -05:00
Tomasz Chyrowicz
26128ab73d mcumgr: Prevent FW loader from self-destruction
The FW loader reports and manages exactly two slots:
 - slot 0: this is the slot for the application code to update
 - slot 1: this is the slot, in which the FW loader is placed

The slot 1 is reported, so tools can fetch metadata about the
FW loader installed on the device.
Unfortunately, currently SMP-based FW loader allows to issue slot erase
command for the slot 1, effectively erasing the FW loader code that is
being executed.

This change correctly identifies the slot 1 as an active one, marking it
as used and blocking erase operation on that slot.

Signed-off-by: Tomasz Chyrowicz <tomasz.chyrowicz@nordicsemi.no>
2025-12-11 16:34:55 -05:00
Firas Sammoura
41403cae9e tests: riscv: pmp: Add test case for null pointer access
Adds `test_null_pointer_access` to verify that attempting to write to a
null pointer (address 0x0) correctly triggers a fatal error, confirming
the Physical Memory Protection (PMP) guard functionality.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-12-11 16:34:42 -05:00
Jérôme Pouiller
3fbaa29bba drivers: spi: siwx91x: Drop GSPI_MAX_BAUDRATE_FOR_DYNAMIC_CLOCK
Currently, clk_div_factor is force to 1 if user request more than 110MHz.
However, in this case, gspi_siwx91x_get_divider() will never return 2 or
more, unless the input clock is >= 220MHz. The si91x is not designed for
such high clock frequency. So, this case has never been tested.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-12-11 16:34:33 -05:00
Jérôme Pouiller
0623e6f390 drivers: spi: siwx91x: Simplify gspi_siwx91x_pick_lower_freq()
Since actual_hz is no more needed, we can simplify
gspi_siwx91x_pick_lower_freq().

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-12-11 16:34:33 -05:00
Jérôme Pouiller
918426ff30 drivers: spi: siwx91x: clk_div_factor can't be 0
In gspi_siwx91x_config(), clk_div_factor can't be < 1. Therefore, we can
remove the dead code.

This code has been tested with tests/drivers/spi/spi_loopback, with a PLL
clock configured to 160MHz and a bus clock to 80MHz with success. I have
not found the case where change in GSPI_CLK_CONFIG are required.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-12-11 16:34:33 -05:00
Jérôme Pouiller
1c356d0ed1 drivers: spi: siwx91x: Fix use of GSPI_DATA_SAMPLE_EDGE
Until now, GSPI_DATA_SAMPLE_EDGE was enabled as soon as the user requested
> 40Mhz (even if the actual frequency was in fact 40Mhz). However, at 40MHz
and at 80MHz, use of GSPI_DATA_SAMPLE_EDGE generated read errors on the
last bit of the transaction:

    Buffer contents are different:
     [...],0xaa,0xaa,0xaa,0xaa,
    vs:
     [...],0xaa,0xaa,0xaa,0xab,

I have not found any case where GSPI_DATA_SAMPLE_EDGE is useful, so this
patch just remove this parameter.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-12-11 16:34:33 -05:00
Jérôme Pouiller
115241c645 drivers: spi: siwx91x: Simplify error management
In functions requiring to lock/release resources, it is less error prone to
have only one exit point and user goto to manage errors.

The behavior of the new code is exactly identical to the initial one.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-12-11 16:34:33 -05:00
Jérôme Pouiller
88b39fd6f9 drivers: spi: siwx91x: Simplify gspi_siwx91x_config()
The bit_rate variable does not bring any benefit.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
2025-12-11 16:34:33 -05:00
Dmitrii Sharshakov
1ef630572b MAINTAINERS: add TF-M PSA Settings backend collaborators
Add myself alongside @seankyer and @tomi-font as the engineers
involved in development of this backend.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-11 16:34:25 -05:00
Keith Short
46a60bb7d9 drivers: i2c: Fix default setting for I2C dump allowlist
The option CONFIG_I2C_DUMP_MESSAGES_ALLOWLIST should automatically be
turned on if the depedencies are satisfied.

Signed-off-by: Keith Short <keithshort@google.com>
2025-12-11 16:34:17 -05:00
Chaitanya Tata
d404fa6879 net: lib: shell: Rejig statistics
Use the newly added API to get specific type of stats (if supported) but
also keep the backwards compatibility.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-12-11 16:33:54 -05:00
Chaitanya Tata
f312cc341b tests: drivers: nrf_wifi: Add twister combo for vendor stats
This ensures vendor stats always builds.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-12-11 16:33:54 -05:00
Chaitanya Tata
55c492c7c5 drivers: nrf_wifi: Switch to new stats API
nRF70 queries FW to fet the stats, use the new stats API and filter FW
query depending on the type.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-12-11 16:33:54 -05:00
Chaitanya Tata
f24b902f5e net: l2: ethernet: Add new stats API
Add a new API that takes stat type, the networking stack only needs
NATIVE stats per-packet, it doesn't need to update vendor stats
per-packet. This saves unncessary exchanges in case driver needs to
query the firmware for the vendor stats.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-12-11 16:33:54 -05:00
McAtee Maxwell
d533ef74ea drivers: allow for two different infineon clock init flows
- differentiate fixed_factor init priority based on soc family

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-12-11 16:33:30 -05:00
Mario Paja
66121b7bb8 drivers: i2s: stm32 sai fix dma_cfg
This change fixes dma_cfg conflict between #99967 and #100223

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-12-11 16:33:11 -05:00
Benjamin Cabé
fd24cefd01 doc: spelling/typo fixes
minor spelling/typo fixes, mainly around using proper US English

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-11 16:32:58 -05:00
Mathieu Choplain
3be4c4c5a8 soc: st: stm32f0: SRAM vector table CMake Linker Generator compatibility
Add required CMake directives to enable working CONFIG_SRAM_VECTOR_TABLE=y
on STM32F0 series when CONFIG_CMAKE_LINKER_GENERATOR=y.

Builds OK with both ZEPHYR_TOOLCHAIN_VARIANT undefined (uses GNU toolchain
from Zephyr SDK) and set to "iar" (uses IAR toochain from EWARM v9.70.1).

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-11 17:06:28 +01:00
Alberto Escolar Piedras
244fe54a6d drivers: wifi: Fix remaining use of sa_family_t
In 55c49cdb8f the mayority of the
Zephyr wifi drivers was changed to use the Zephyr native net_ prefixed
types, but some were forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
will fail to build.

Note that the net_offload struct was updated accordingly in
d45cd6716b

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-11 17:06:04 +01:00
Alberto Escolar Piedras
f81011ee6a net: ip: Rename namespaced type in comment
In d45cd6716b the mayority of the
Zephyr codebased was changed to use the Zephyr native net_ prefixed
types. This comment was fogotten.
Let's fix it.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-11 17:06:04 +01:00
Alberto Escolar Piedras
e19d78e607 drivers: modem: Fix remaining net API use
In b5588ed684 the mayority of the
Zephyr modem drivers were changed to use the Zephyr native
net_ prefixed types, but this one was forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Note that the net_offload struct was updated accordingly in
d45cd6716b

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-11 17:06:04 +01:00
Alberto Escolar Piedras
f0ecb0a17f drivers: ethernet: intel_igc: Use net namespaced APIs
In e6daacf3c9 the mayority of the
Zephyr ethernet drivers were changed to use the Zephyr native
net_ prefixed types, but this one was forgotten.
Without this fix/change the code still builds as we are by now setting
CONFIG_NET_NAMESPACE_COMPAT_MODE. But when this is not set, things
fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-11 17:06:04 +01:00
Stefan Schmidt
13ce8eac99 drivers: sensor: adi: adxl345: use selected range for conversion
When running the samples/sensor/accel_trig sample with a adxl345 sensor
the logged output values were doubled compared to the expected values.

The sensor_channel_get() path calls adxl345_accel_convert which did not
handle the configured g-range, resulting in invalid sample values except
for the +/-16g range. To fix this issue the configured range is taken
into account and different conversion factors are applied.

adxl345_accel_convert is also made static. It is not used by another file.

Signed-off-by: Stefan Schmidt <kontakt@stefanschmidt-embedded.de>
2025-12-11 17:05:27 +01:00
Mathieu Choplain
c4d72ac549 dts: arm: st: stm32f723: disable USBPHYC by default
Like other devices, the USBPHYC should be disabled by default. Add missing
property `status` with value `disabled` on the node in DTSI.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-11 17:04:55 +01:00
Hank Wang
2ed5e0d608 dts: arm: xilinx: fix zynqmp RPU IPI mailbox base addresses
The RPU0 mailbox node in `zynqmp_rpu.dtsi` used incorrect IPI
message buffer base addresses. According to UG1085 (Table 13-3)[1],
RPU0 should use the channel 1 message buffer region at `0xFF99_0080`
for local request/response and `0xFF99_0400` for remote request/
response. The previous values pointed to the APU channel 0
buffer (`0xFF99_0200`), which does not match the hardware mapping.
The same is true for rpu1.

The IPI buffer base looks something like this:
IPI1 - 0xFF990000
IPI2 - 0xFF990200
IPI0 - 0xFF990400

Fix the DTS by updating the RPU0, RPU1 mailbox nodes to use the correct
base addresses from the documentation.

[1] https://docs.amd.com/v/u/en-US/ug1085-zynq-ultrascale-trm

Signed-off-by: Hank Wang <wanghanchi2000@gmail.com>
Signed-off-by: Harini T <harini.t@amd.com>
2025-12-11 17:04:27 +01:00
Alberto Escolar Piedras
139b7c20c2 drivers: xen: Fix uninitialized variable warning
gcc complains about the posibility of ret and gfn being used
unitialiazed (with the input npages == 0).
Let's fix it by initializing ret to 0.

The warnings being:
```
      zephyr/CMakeFiles/zephyr.dir/drivers/xen/gnttab.c.obj
In file included from include/zephyr/logging/log.h:11,
                 from drivers/xen/gnttab.c:31:
include/zephyr/logging/log_core.h: In function 'gnttab_get_pages':
include/zephyr/logging/log_core.h:221:9: warning: 'gfn' may be used
uninitialized [-Wmaybe-uninitialized]
  221 |         z_log_minimal_printk("%c: " fmt "\n", \
      |         ^~~~~~~~~~~~~~~~~~~~
drivers/xen/gnttab.c:202:19: note: 'gfn' was declared here
  202 |         xen_pfn_t gfn;
      |                   ^~~
include/zephyr/logging/log_core.h:221:9: warning: 'ret' may be used
uninitialized [-Wmaybe-uninitialized]
  221 |         z_log_minimal_printk("%c: " fmt "\n", \
      |         ^~~~~~~~~~~~~~~~~~~~
drivers/xen/gnttab.c:199:13: note: 'ret' was declared here
  199 |         int ret;
      |             ^~~
```

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-11 17:04:05 +01:00
Jukka Rissanen
5dada87def doc: net: Enhance network packet filtering documentation
Add more information to network packet filter documentation to
make it more useful to end users.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-11 17:03:54 +01:00
Jamie McCrae
7d7aa2c1d7 west.yml: MCUboot synchronization from upstream
Update Zephyr fork of MCUboot to revision:
  234c66e66ee39c0f836a57ba805245534be332f2

Brings following Zephyr relevant fixes:

  - 55ae5342 doc: imgtool: Update available options
  - cd96b62f boot: zephyr: Fix comment in banner.c
  - 1357a70f Updates for v2.3.0-rc2 release
  - afcca2c7 boot: zephyr: Fix Espressif build issues
  - d95ca5c7 boot: zephyr: Remove BOOT_MAX_IMG settings
  - 623f0230 boot: zephyr: stm32n657xx: Move overlay to socs
  - 31469b43 boot: zephyr: kconfig: Flip swap move defaults for
    esp32/stm32
  - a2ee0a75 scripts: imgtool: Fix verification with public ed25519
    key file
  - 49bbbabf boot: zephyr: Add watchdog setup/timeout
    configurability options
  - c25d2506 boot: zephyr: Move watchdog code to separate file
  - 9efb9d3f boot: zephyr: kconfig: Move modes to choice Kconfig
  - 92854b7b boot: zephyr: kconfig: Only show signature file when
    needed
  - 716f338a boot: zephyr: Remove weird custom key directory
    handling
  - c52f8af7 boot: zephyr: select `IS_BOOTLOADER`

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-12-11 17:02:54 +01:00
Jamie McCrae
7127ff4be3 kconfig: Remove dependencies from CONFIG_IS_BOOTLOADER symbol
This symbol has no relation to the dependencies it had, thus remove
them

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-12-11 17:02:54 +01:00
Sylvio Alves
16f6f392b4 tests: espressif: rtc_clk: update to keep nominal tests usage
Update the test case to use the nominal clock_subsys and print
calibration deviation.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-11 17:02:14 +01:00
Sylvio Alves
889910d7d8 tests: counter_basic_api: esp32h2: remove custom tolerance
ESP32-H2 counter test works with default tolerance.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-11 17:02:14 +01:00
Sylvio Alves
d3d2bd2f02 driver: clock: espressif: get frequency default to calibrated value
When clock get_rate() is called, return by default the calibrated
frequency instead of nominal one. This improves accuracy specially
when internal RC SLOW clock is used.

To guarantee that nominal values can be still be retrieved, add a
new type of clock subsys for such scenario.

west.yml is also updated to add fix into calibration sources.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-11 17:02:14 +01:00
Qingsong Gou
fc370b8481 drivers: rtc: sf32lb: fix alarm_is_pending error
Fix alarm_is_pending error

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-11 17:01:35 +01:00
Szymon Janc
09c80e18e6 tests: Bluetooth: Update ICS to TCRL pkg101
Updated to TCRL pkg101.

Security Mode 2 supporte removed (GAP,SM,GATT). Bumped supported
LE Audio profiles versions and enabled implemented features (notably
TMPA UMS)

Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
2025-12-11 17:00:28 +01:00
Martin Stumpf
ffb046b797 MCUmgr: OS: fix set datetime millisecond handling
According to the docs the millis were in the format `.SSSSSS`. In
reality though, it only accepted exactly `.SSS`, not `.SS` or `.SSSS`
and specifically also not `.SSSSSS`, contrary to the docs. Further, it did
not fail with an error message but simply produced the wrong value.

With this change it accepts everything from `.` to `.SSSSSS` and
produces the correct result. This is compatible with the previous
behavior, with the documentation and with everything in between.

Signed-off-by: Martin Stumpf <finomnis@gmail.com>
2025-12-11 16:59:35 +01:00
Atilla Filiz
ddd25e81e7 drivers: sensor: add ams as6221 temperature sensor driver support
The as6221 is functionally equivalent to ti tmp108 and ams as6212,
so it is added as a new variant of tmp108.

Signed-off-by: Atilla Filiz <atilla@fi-tech.be>
2025-12-11 16:58:50 +01:00
Mathieu Choplain
aecaeae13e soc: st: stm32: wb0: don't quote section names in Z_GENERIC_SECTION
Don't quote the section names provided to Z_GENERIC_SECTION: the macro
already performs stringification on our behalf.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-11 16:57:59 +01:00
Gilles Devillers
7e139d6bfe net: mqtt: fix log typo
Fix typo in a log message and remove a redundant “error” mention.

Signed-off-by: Gilles Devillers <gildev@gmail.com>
2025-12-11 16:57:33 +01:00
Alberto Escolar Piedras
dd7526af49 modules: openthread: Fix network namespace API usage
bcec3bd04b introduced some of the
non-native API names back into this module. Let's fix it.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-11 16:57:22 +01:00
Alberto Escolar Piedras
a90994006a tests: net: all: Also build latmon
Also build the latency monitor support code.

As a sideeffect, we run out of bits in the kernel objects per thread
permissions tracking field. So let's increase it to 6 bytes.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-11 16:57:22 +01:00
Alberto Escolar Piedras
addca1250b samples: net: latmon: Use native networking API directly
This subsystem does not use the POSIX_API, and the sample only used one
call to the POSIX API to close a socket instead of using the native
networking API.
Let's just use the native networking API, so we avoid pulling-in more
dependencies.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-11 16:57:22 +01:00
Alberto Escolar Piedras
cc8bb0427a net: latmon: Fix net API use
In d45cd6716b the mayority of the Zephyr
networking code was changed to use the Zephyr native net_/zsock_
prefixed types, but some symbols were forgotten.
Let's change them.

Without these fixes/changes the code still builds in most cases as we are
by now setting CONFIG_NET_NAMESPACE_COMPAT_MODE.
But when this is not set, things will fail to build.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-11 16:57:22 +01:00
Carles Cufi
15716542c2 dts: nordic: Fix ngpios for nRF54L15 (and variants)
The correct number is 7, since the QFN52 (QGAA) variant has P0.00 to
P0.06 present. See:
https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/chapters/pin.html#ariaid-title6

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-12-11 05:51:32 -05:00
Jilay Pandya
aa2a0fbc8a doc: migration_guide: address stepper split
add entry for splitting stepper api in migration-guide-4.4

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-12-11 05:51:17 -05:00
Jilay Pandya
83956260f7 drivers: stepper: split stepper api
- split stepper api into stepper and stepper_drv api
- stepper api now comprises only of motion control apis
- stepper_drv api comprises of apis for configuring stepper
  drivers

- add documentation about stepper and stepper_drv api
- move stepper.rst in a dedicated stepper folder
- add information about stepper_drv api and relevant functions
  in stepper documentation.

- drop motion control functions from all the stepper_drv drivers
- create a common a library for controlling stepper motors by
  toggling gpios via h-bridge or step-dir stepper_drivers

- tmc5xxx devices are a combination of motion controller and
  stepper driver devices. tmc5xxx devices need to be modelled as
  mfds in order to address the split in stepper driver subsystem

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-12-11 05:51:17 -05:00
Sven Ginka
c4a4d8aa87 drivers: ethernet: dsa_nxp_imx_netc: fix zephyr random mac
zephyr,random-mac-address defaults to 0 or 1, which is always
available in generated code. so we can use the value itself.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
2025-12-11 05:51:07 -05:00
Simon Piriou
c1091acd09 net: l2: ieee802154: add support for IEEE802154_CFI_DATA_REQUEST
802.15.4 specifies that a device may send a DATA_REQUEST command to the
coordinator after waiting for "macResponseWaitTime", starting after the
acknowledgment to the association request command.

This change adds support to generate DATA_REQUEST frames and sends one
for the association usecase only. The two other usecases, for MLME-POLL
or for beacon-enabled PAN, are not yet supported.

Signed-off-by: Simon Piriou <spiriou31@gmail.com>
2025-12-11 05:50:58 -05:00
Michał Grochala
2a9114af3d soc: nordic: nrf54l: Remove selecting a DTS-type option
Remove selecting `CONFIG_HAS_HW_NRF_RADIO_IEEE802154` that should be
generated from DTS based on the SoC selection.

Signed-off-by: Michał Grochala <michal.grochala@nordicsemi.no>
2025-12-11 05:50:33 -05:00
Holt Sun
6008841b60 tests: counter: add mcux LPTMR alarm mode coverage
Extend the counter_basic_api tests with a dedicated configuration that
enables the MCUX LPTMR driver in alarm mode.

The new testcase:
- Selects CONFIG_COUNTER_MCUX_LPTMR_ALARM
- Runs the existing counter_basic_api suite against nxp_lptmr devices
  when built for a board that instantiates the LPTMR

This verifies that the alarm-only LPTMR configuration passes the common
counter API tests without relying on the TOP callback feature.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-11 05:50:21 -05:00
Holt Sun
fba7c3ed88 drivers: counter: fix mcux lptmr unit test issue.
The counter alarm irq shall set the match value
to the max top value after stopping the timer, otherwise
the next start of the lptmr counter may shortly match the
the previous match value thus cause test_valid_function_without_alarm
run failed.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-11 05:50:21 -05:00
Cristian Bulacu
bcec3bd04b openthread: platform: infra_if: Remove NAT64 packet checksums
OpenThread NAT64 translator creates a packet that has header checksum
computed and appended.
In case of using ethernet as backbone interface, some NICs may want to
have checksum set to 0 for a correct computation.
This commit aims to address this issue by checking if hardware has
offload capabilities and setting NAT64 packet checksums to 0, if needed.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-12-11 05:50:07 -05:00
Maochen Wang
09aac143bf manifest: update hostap to fix EAP-TLS failure with TLS 1.3 on Cisco AP
Current implementation uses tls_connection_export_keys_cb to retrieve
exporter_master_secret, client_random, and server_random, which only
works for TLS 1.2. TLS 1.3 introduces a different key derivation
mechanism.
In mbedtls 3.6.4, MBEDTLS_SSL_KEYING_MATERIAL_EXPORT supports exporting
keying material for both TLS 1.2 and TLS 1.3. Update logic to use this
macro and remove redundant MBEDTLS_SSL_PROTO_TLS1_3 check in TLS 1.2
handling.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2025-12-11 05:49:56 -05:00
Maochen Wang
e01e67e1b0 samples: net: wifi: enable supplicant key debug for NXP config
Introduce WIFI_NM_WPA_SUPPLICANT_DEBUG_SHOW_KEYS to allow key dump
when using the NXP board debug configuration.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2025-12-11 05:49:56 -05:00
Maochen Wang
2faece5494 hostap: update mbedtls config for enterprise use
Enable MBEDTLS_SSL_KEYING_MATERIAL_EXPORT by default to support TLS
keying material export for enterprise scenarios.
Replace deprecated TLS 1.3 configs with MBEDTLS_SSL_PROTO_TLS1_3 and
MBEDTLS_SSL_SESSION_TICKETS.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2025-12-11 05:49:56 -05:00
Maochen Wang
ba04029986 mbedtls: enable config for keying material export
Introduce MBEDTLS_SSL_KEYING_MATERIAL_EXPORT configuration option to
control support for TLS keying material export.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2025-12-11 05:49:56 -05:00
Filip Kokosinski
ff252ebbf4 MAINTAINERS: relegate some Microchip RISC-V maintainers to colalborators
This commit relegates some of the Microchip RISC-V area maitainers to the
collabolator tier.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2025-12-11 05:49:34 -05:00
Firas Sammoura
ab0bf3a47f tests: riscv: pmp: Make permission change tests dynamic
The existing PMP permission tests relied on hardcoded region indices
(e.g., index 0 or 2). This makes the tests fragile and dependent
on the exact memory attribute region setup.

This change refactors the tests to dynamically determine region counts
and indices based on the output of `mem_attr_get_regions()`:

-   `test_pmp_change_perm_invalid_permission`: Uses the last valid
    region index to test invalid permission flags.
-   `test_pmp_change_perm_invalid_region_index`: Uses the total number
    of regions as the out-of-bounds index.
-   `test_successful_permission_change`: Locates the index of the
    target test region (`dt_regions[0]`) by matching its base address
    and size. The test now also inverts the X bit of the current
    permissions to ensure a change is applied and verified.

These changes make the tests more robust and less dependent on a
specific static configuration.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-12-11 05:49:15 -05:00
Michał Stasiak
cdb23524c3 drivers: nrf: remove GPIO HAL inclusion
Since pin retention handling was moved to nrfx,
GPIO HAL no longer has to be included in analog drivers.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-11 05:49:05 -05:00
Robert Lubos
2565352d11 net: http: server: websocket: Fix truncated string warning on copying
WS_MAGIC is a constant string and when calculating lengths for copying
we always exclude the NULL terminator. In result, using strncpy() for
copying can generate a warning about truncated string, as WS_MAGIC will
always be truncated from the NULL terminator. Therefore replace
strncpy() with memcpy() as it seems more appropriate for this case.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-12-11 05:48:34 -05:00
Pieter De Gendt
82845973a6 scripts: footprint: size_report: Close ELF file
Use the ELFFile context manager to open/close an input file.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-11 05:48:23 -05:00
Yassine El Aissaoui
cafe285810 modules: hal_nxp: Fix spc module selection on MCXW SoC family
Fix wrong condition for spc selection on MCXW family.

Signed-off-by: Yassine El Aissaoui <yassine.elaissaoui@nxp.com>
2025-12-11 05:48:14 -05:00
Cristian Bulacu
510ccd718f net: ip: net_context: Use sin6_scope_id for link-local IPv6 addresses
This commit aims to make use of sin6_scope_id field of net_sockaddr_in6
structure to correctly choose the network interface when destination
address in link-local.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-12-11 05:47:48 -05:00
Cristian Bulacu
e197198f0a openthread: platform: udp: Correct scope_id assignment for ll addresses
This commit aims to fix correct scope_id assignment when link local
addresses are in use

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-12-11 05:47:27 -05:00
Fin Maaß
0a5ad3aaa8 drivers: ethernet: remove imply MDIO
remove `imply MDIO` from the
ethernet drivers, that don't directly use mdio
and only use the ethernet phy api, now that the
phys select MDIO.

in 648c8252b5 the
`select MDIO` ones were remove, unfortunatly I forgot
the implyed ones.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-11 05:47:14 -05:00
Alexandre Rey
0b52928625 driver: spi: mcux_dspi: remove obsolete rx_bufs check
The guard against rx_bufs == NULL was originally added to prevent a
DMA misconfiguration observed when no RX buffer was provided.

The issue can no longer be reproduced, and the check was incomplete
since it did not cover rx_bufs->buffers == NULL or rx_bufs->count == 0,
which lead to the same effective condition.

Removing the check simplifies the driver and avoids blocking valid
TX-only transfers.

Signed-off-by: Alexandre Rey <alx.rey@icloud.com>
2025-12-11 09:20:10 +02:00
Pisit Sawangvonganan
c5365797ac shell: modules: devmem: utilize sys_put_le(16|32|64) in memory_dump
Replaces direct byte shifting and assignment with `sys_put_le16`,
`sys_put_le32`, and `sys_put_le64` to simplify the `memory_dump` function.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2025-12-11 09:19:51 +02:00
Pisit Sawangvonganan
ed75a0a293 shell: modules: devmem: use shell_print where applicable
To improve code clarity, use `shell_print` in place of `shell_fprintf`
with `SHELL_NORMAL` where appropriate.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2025-12-11 09:19:51 +02:00
Stuart Longland
b87498212d shell_uart: Drop superfluous if statement
We're now checking if there is space prior to executing the loop body,
therefore guaranteeing this condition is never going to fire in a
single-threaded context.

Signed-off-by: Stuart Longland <stuartl@vrt.com.au>
2025-12-11 09:19:40 +02:00
Stuart Longland
301c0130b2 shell_uart: Stop polling if buffer is full
Before calling `uart_poll_in`, check we have space to store the character
in the ring buffer beforehand.  If we do, *then* poll for the character.

That way we don't miss out on serial traffic when our ring buffer is full
unless we fill our hardware ring buffer too.

Signed-off-by: Stuart Longland <stuartl@vrt.com.au>
2025-12-11 09:19:40 +02:00
cyliang tw
43d1c516af tests: drivers: pwm: pwm_gpio_loopback: support numaker_m3334ki
Add support for Nuvoton numaker board numaker_m3334ki.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-12-11 09:19:29 +02:00
cyliang tw
5c31987ce2 dts: arm: nuvoton: add PWM nodes for numaker m333x
Update m333x.dtsi to add PWM nodes for PWM driver support.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-12-11 09:19:29 +02:00
Missael Maciel
726e7b64c2 drivers: uart: save interrupts in PM Action
Removed usart_intenset attribute from conditional compilation
in mcux_flexcomm_data structure since this parameter needs to
be saved/restored independently if the interrupts are enabled
or not based on the PR feedback

Signed-off-by: Missael Maciel <davidmissael.maciel@nxp.com>
2025-12-11 09:19:05 +02:00
Missael Maciel
a84e0b5413 drivers: uart: save interrupts in PM Action
The PM action saves the interrupts enabled using a
global variable called usart_intenset. The problem is
when you have multiple uart instances that have different
configurations, when entering/exiting from a power level,
only one configuration is saved and will be applied to all
uart instances when exiting from a power level. We need to
keep this setting individual for each instance. To do this,
usart_intenset was added as a new element to mcux_flexcomm_data
structure. In this way, each uart instance will keep/restore
each own setting.

Signed-off-by: Missael Maciel <davidmissael.maciel@nxp.com>
2025-12-11 09:19:05 +02:00
Andrej Butok
75a2b1e35c drivers: gpio: nxp: mcux_igpio: fix mcux_igpio_port_get_raw()
- Reads the Pad Status Register (PSR) to get
  the current GPIO input value, instead of the Data Register (DR).
  Following IMXRT1170RM.pdf "13.5.2 GPIO Write Mode".
- Enables input buffer via Software Input On (SION)
  to get correct pin value in PSR for both input/output pins.
- Issue has been discovered during Safety DIO self-tests.

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2025-12-11 09:18:54 +02:00
Zhaoxiang Jin
bd500cb1f9 boards: nxp: remove unused definitions
1. Remove 'XIP_BOOT_HEADER_ENABLE', it is not
used in the mcxn947 build tree.

2. Remove 'BOARD_FLASH_SIZE', it is not used
in the rw612 build tree.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-11 09:18:47 +02:00
Alain Volmat
d671e3f675 drivers: stm32: remove all HAL_RIF_ calls from stm32 drivers
RIF configuration is now done at soc init time in a centralized
way so it is no more necessary for drivers to perform this
configuration.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-11 09:18:38 +02:00
Alain Volmat
76410eef68 soc: stm32n6x: addition of RIF configuration at soc init
Perform all the IPs RIF configuration at init time in case of this
isn't yet performed by an earlier entity during the boot sequence.
This configuration depends on TRUSTED_EXECUTION_SECURE which is
currently always enabled on STM32N6x but will be configurable in
future.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-11 09:18:38 +02:00
Firas Sammoura
89ae7bb8e8 arch: riscv: pmp: Remove header guards and add kconfig deps
Remove the CONFIG_RISCV_PMP #ifdef guards from the function
declarations in pmp.h. This allows the header to be included
unconditionally, while the function definitions remain conditional
on the Kconfig option.

Add @kconfig_dep to the Doxygen comments for all functions
to clearly indicate the dependency on CONFIG_RISCV_PMP.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-12-11 09:18:28 +02:00
Lucien Zhao
b78d150e47 dts: arm: nxp: rt700_cpu0: add uuid support
SYSCON0 IP can be accessed by CPU0, HiFi4, EZH-V, eDMA0, eDMA1.
So cm33_cpu1 can't be supported this feature.

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-11 09:18:20 +02:00
Alberto Escolar Piedras
312b1ef04f pmci: mctp: samples: Remove unnecessary include
These samples do not seem to need the unistd.h header, but including it
limits us to C libraries which have it, which as it is a POSIX
extension is not all.
So let's not include it so we do not limit ourselves unnecessarily.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-11 09:18:02 +02:00
Pete Johanson
17d143a175 tests: secure_storage: Don't try to erase flash with no controller
Add a check for a chosen flash controller to avoid attempting to clear the
settings flash with no controller available.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2025-12-11 09:17:53 +02:00
Alberto Escolar Piedras
9f0ce75b41 drivers: disk: loopback: Remove unnecessary include
This file does not seem to need unistd.h, and that header is a
POSIX extension to the C library which is not avaiable in general.
So let's not include it.

Without this change this file fails to build with minimal libc or
other C libraries which do not have this extra header.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-10 17:37:49 +00:00
Fabrice DJIATSA
307c08ba6b boards: st: stm32n6570_dk: increase size ram size of serial boot variant
Increase the RAM size of the SB variant to enable execution of relevant
tests that require at least 172 KB.

This ensures continuous tracking of these tests on CI.


Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-12-10 17:37:40 +00:00
Mathieu Choplain
cb27d92c0c scripts: build: check_init_prio: take deferred-init into account
A device with zephyr,deferred-init is initialized by the application, so
we cannot check if it is initialized in "the correct order". On the other
hand, a non-deferred device must not depend on a deferred-init device: this
is guaranteed to be initialized out of order.

Also adjust existing test cases and add a new test case to validate this
behavior.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-10 17:37:27 +00:00
Mathieu Choplain
ed182a89cd scripts: build: check_init_prio: create dedicated "flag errors" function
There is a bit of logic to run every time an error is reported. Factor it
out into a dedicated function.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-10 17:37:27 +00:00
Tahsin Mutlugun
15965b266c drivers: serial: uart_max32: Enable TX AE workaround for MAX32657
Extend UART_MAX32_TX_AE_WORKAROUND to also apply when building for
MAX32657.

Without this option, logging output may become fragmented or delayed
because TX interrupts fail to trigger reliably for small chunks of data.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-12-10 17:37:18 +00:00
Tahsin Mutlugun
6c6e8e51bf drivers: serial: uart_max32: Refactor IRQ flag clearing
api_irq_update was clearing TX interrupt flags before the TX interrupt
could be served, breaking synchronization in time-sensitive applications.

Changes:
1. Remove unnecessary MXC_UART_ClearFlags() calls in api_fifo_read() and
   api_irq_update to avoid premature flag clearing; ISR handler already
   clears them after returning from the callback.
2. Replace raw flag checks in irq_is_pending() with more complete
   api_irq_rx_ready() and api_irq_tx_ready().

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-12-10 17:37:18 +00:00
Qingsong Gou
a8d0a7789e drivers: adc: sf32lb: fix ref_internal
Fix adc ref_internal value

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-10 17:37:09 +00:00
Peter van der Perk
24b3ff233b gpio: mcux_rgpio: Support IRQ output select and access checks for i.MX95 M7
Support for selecting the IRQ output via the `irq-output-select` property
in devicetree. Updates interrupt configuration and ISR logic to use the
selected IRQ index. For i.MX95 M7, ensures pins and IRQs are configured
only when secure access is allowed by checking PCNS and ICNS registers.

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-12-10 17:36:57 +00:00
Marcelo Roberto Jimenez
ce99d1e428 drivers: ethernet: stm32hal: Fixes source address control
The default configuration for all STM32 microcontrollers in HAL is
to replace the ehternet MAC address with the address configured in
replace address zero. In "modules/hal", Grep for:

macDefaultConf.SourceAddrControl = ETH_SOURCEADDRESS_REPLACE_ADDR0;

But this is a bad thing for bridging. Since Zephyr ethernet LL code
always writes the source address, this patch has no impact on normal
operation. And has the benefit of maintaining the source MAC address
of bridged packets.

Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
2025-12-10 17:36:47 +00:00
Anas Nashif
172c403be5 Revert "ci: assigner: only run on main branch"
This reverts commit 79356f1385.

Was the wrong "fix".

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-10 17:36:29 +00:00
Anas Nashif
51a6e8b6f6 ci: assigner: do not check permission/manifest on branches
Workaround GH running workflows from main on release branches.
The assignment script fails and does wrong assignments based on wrong
versions of the maintainer file and manifest.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-10 17:36:29 +00:00
Michał Stasiak
013428c551 drivers: i2c: add DMM to i2c_nrfx_twim
Added DMM buffer preparation to I2C TWIM driver.
Adds little impact as buffer content is already copied
into message buffer which is places in proper memory for
optimized transfer.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-10 15:47:00 +00:00
Michał Stasiak
ca5986b084 drivers: i2c: clean-up macros used in nrfx_twim
Removed unused macros. Moved common macros to common header.
Aligned naming and style to other nrf drivers.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-10 15:47:00 +00:00
Zhaoxiang Jin
4a92103f92 tests: dma: Enable loop_transfer for nxp,4ch-dma
Enable loop_transfer for nxp,4ch-dma

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-10 15:46:47 +00:00
Zhaoxiang Jin
ee2cab94d9 boards: Enable DMA on frdm_mcxc444
Enable DMA on frdm_mcxc444

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-10 15:46:47 +00:00
Zhaoxiang Jin
a58a750336 drivers: dma: nxp: Add support for NXP 4 channel DMA driver
This commit introduces a new DMA driver for NXP platforms,
specifically supporting the MCXC/kinetis series.

Please access https://www.nxp.com/webapp/sps/download/preDownload.jsp?render=true
to download MCXC44x Sub-Family Reference Manual for more details.
DMAMUX can be found in Chapter 20 and DMA in Chapter 21.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-10 15:46:47 +00:00
Zhaoxiang Jin
41542b5613 drivers: sim: Enable dma clock through sim driver
Enable dma and dmamux clock through sim driver

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-10 15:46:47 +00:00
Deepika aerlync
067426ac54 drivers: serial: add Infineon PSOC4 UART support
Add initial implementation of the Infineon PSOC4 UART driver based on the
Peripheral Driver Library (PDL) for PSOC4 (PSoC 4100TP) devices.

Features:
- UART transmit and receive using PDL SCB UART APIs
- Configurable baud rate, parity, stop bits, and data bits from devicetree
- Pinctrl integration for TX/RX pins
- Support for Zephyr console and shell subsystems
- Build-time validation for UART configuration parameters

Signed-off-by: Dharun krithik k <dharunkrithik@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Deepika aerlync
c40d66d046 drivers: clock_control: add Infineon PSOC4 support
Add clock control driver support for Infineon PSoC4:
- Fixed clock driver (clock_control_ifx_fixed_clock.c)
- Fixed factor clock driver (clock_control_ifx_fixed_factor_clock.c)
- Peripheral clock driver (clock_control_ifx_peri_clock.c)
- CAT1 clock control header

Provides clock initialization and management based on
devicetree configuration.

Signed-off-by: Dharun krithik k <dharunkrithik@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Deepika aerlync
ccabf2457f boards: infineon: add CY8CPROTO-041TP board support
Add board porting for the Infineon CY8CPROTO-041TP evaluation kit:
- Board devicetree and pinctrl configuration
- Kconfig and YAML definitions
- Documentation
- Support for west build, west flash, and west debug (OpenOCD)

Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Deepika aerlync
f54955f6d2 soc: infineon: add PSoC4100TP SOC support
Add SoC port for the Infineon PSoC4100TP series, including:
- Core initialization
- Kconfig files
- YAML device definitions
- SoC-specific pin control configuration

Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Manojkumar Konisetty
6dfae9c9f7 dts: arm: infineon: add CY8C4147 MPN variants
Add devicetree support for CY8C4147 MPN variants including:
- AXI packages (T403-T493)
- AZI packages (T403-T475)
- AZQ packages (T415-T495)
- LQI packages (T403-T473)
- LQQ package (T493)

Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Deepika aerlync
69ed4fc87d dts: arm: infineon: add CY8C4146 MPN variants
Add devicetree support for CY8C4146 MPN variants including:
- AXI packages (T403, T413, T453)
- AZI packages (T403-T455)
- AZQ packages (T413, T453)
- LQI packages (T403, T413, T453)

Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Deepika aerlync
977f3f10ac dts: arm: infineon: add PSoC4100TP base devicetree
Add base devicetree support for Infineon PSoC4100TP series including:
- Core SoC devicetree (psoc4100tp.dtsi)
- CM0+ core configuration (psoc4100tp.cm0p.dtsi)
- Pin package variants (44-TQFP, 48-QFN, 48-TQFP, 64-TQFP)
- System clocks configuration (system_clocks.dtsi)

Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Deepika aerlync
0add918ec9 modules: hal_infineon: add PSoC4 build support
Add CMake build configuration support for PSoC4 PDL and templates.

Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Deepika aerlync
592c22f25d modules: hal_infineon: add PSoC4 Kconfig support
Add Kconfig configuration support for PSoC4 family in hal_infineon module.

Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Deepika aerlync
007203965e manifest: hal_infineon: update rev to latest
Update hal_infineon revision to add PSOC4 family support

Signed-off-by: Dharun krithik k <dharunkrithik@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Signed-off-by: Deepika aerlync <deepika@aerlync.com>
2025-12-10 15:46:35 +00:00
Josuah Demangeon
367c859ee9 usb: device_next: uvc: fix frame interval sorting
The qsort() function takes a callback argument that is having the
same semantics as strcmp(). Fix uvc_compare_frmival_desc() sorting
to make qsort() list frame intervals in increasing values.

Fix a bug where Windows would not enumerate devices when the video device
have multiple frame interval supported.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-12-10 15:46:09 +00:00
Henrik Brix Andersen
7703c31c98 code of conduct: change the title from the template
Change the Code of Conduct title from the one used in the template to
reflect that this is the Code of Conduct for the Zephyr Project, not the
Contributor Covenant project.

The attribution for the Contributor Covenant template is present at the
very last paragraph.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2025-12-10 15:45:56 +00:00
Jamie McCrae
949adae4f1 dts: vendor: nordic: Fix invalid nrf54lm20a partition layout
This device indicates 4KiB sector size and has an impossible
partition layout that starts part the way through a sector,
this fixes the issue by having proper partition alignment

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-12-10 15:45:37 +00:00
Gang He
32c1db7c15 samples: bluetooth: bap_broadcast_sink: add parameter checking
BT_LE_PER_ADV_SYNC_OPT_FILTER_DUPLICATE option is only available when
BT_FEAT_LE_PER_ADV_ADI_SUPP is enabled in chipset.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-12-10 15:44:43 +00:00
Gang He
9c8e72a0d9 samples: bluetooth: bap_broadcast_sink: format source code
Run clang-format to format sample source code.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-12-10 15:44:43 +00:00
Gang He
2594859a0e bluetooth: host: Add parameter check when creating periodic adv sync
In option of HCI_LE_Periodic_Advertising_Create_Sync, bit 2
depend on Periodic Advertising ADI Support feature.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-12-10 15:44:43 +00:00
Gang He
23d873188b bluetooth: host: scan: Format source code
Run clang-format on scan.c

Signed-off-by: Gang He <ganghe@sifli.com>
2025-12-10 15:44:43 +00:00
Mathieu Choplain
22a163f938 kconfig: source autogenerated Kconfig.dts earlier than defconfigs
In addition to the DT_HAS_<compat>_ENABLED options, the autogenerated
Kconfig.dts file also provides the DT_COMPAT_<compat> *macros* which avoid
manually declaring them when working around the no comma limitation. Unlike
options which can be referenced before their declaration, macros MUST
be defined before their usage (otherwise, they expand to nothing ("")).

Because the defconfig files were sourced before "dts/Kconfig", it was not
possible to use the DT_COMPAT macros from shields/boards/SoC defconfig;
this is not only confusing but also suboptimal because the macros must be
defined manually.

Include "dts/Kconfig" earlier to allow usage of the DT_COMPAT macros from
shields, boards and SoC defconfig. This should have no adverse effect
since there is no reason to override the options provided by the
autogenerated Kconfig.dts anyways.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-10 15:44:27 +00:00
Mathieu Choplain
df1677c8aa doc: kconfig: document DT_COMPAT_<...> macro variables
The DT_COMPAT_<...> macro variables are generated for every compatible
found in bindings: document them as existing and recommend using them
in various Kconfig documentation pages.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-10 15:44:07 +00:00
cyliang tw
518a21f59d MAINTAINERS: modify dts files to match Numaker
Modify dts/arm/nuvoton/m* to better align with Numaker platform
naming conventions. Also add one more collaborator.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-12-10 15:43:46 +00:00
Khoa Nguyen
e09d0adf57 samples: modules: lvgl: demos: Enable ek_ra8p1 CM85 using MIPI LCD
Enable ek_ra8p1_r7ka8p1kflcac_cm85 to run with rtkmipilcdb00000be
MIPI LCD shield

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-12-10 07:25:01 -05:00
Khanh Nguyen
d231118e7a boards: shields: add rtkmipilcdb00000be support for ek_ra8p1
Add support for the RTK MIPI LCD shield on EK-RA8P1:
- Add default display configuration in .conf
- Add overlay with MIPI DSI PLL, timing, gpio-hog, panel settings

Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-12-10 07:25:01 -05:00
Khanh Nguyen
f4ff6f6ca1 boards: renesas: ek_ra8p1: add MIPI DSI support
Add MIPI DSI support for EK-RA8P1:
- Add default configs for MEMC, GLCDC framebuffer, and LVGL
- Update DTS:
  * Add zephyr,user node with mipi-dphy-en-gpios
  * Add mipi-dsi alias and MIPI connector node
  * Add interrupts for lcdif, and mipi_dsi
  * Add aliases for lcdif, mipi_dsi, and I2C
  * Add gpio-hog for mipi_phy_enable

Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-12-10 07:25:01 -05:00
Khanh Nguyen
2e7115a45f drivers: mipi_dsi: Add support Renesas RA MIPI DSI for RA8P1
Update the Renesas RA MIPI DSI driver and bindings to align
with RA8P1 SoC support:

- Add SoC-specific PHY PLL multiplier ranges
  - RA8D1: 20–180
  - RA8P1: 40–375
- Correct t_init limit from 15 bits to 19 bits as specified in HUM
- Update devicetree bindings:
  - Clarify `pll-div` as input frequency divisor
  - Add `pll-out-div` property as output frequency divisor

Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
2025-12-10 07:25:01 -05:00
Pieter De Gendt
ea85a8b841 drivers: ethernet: eth_lan865x: Support MAC address config
Update the microchip,lan865x ethernet driver to use a MAC address
configuration struct.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-10 07:24:43 -05:00
Qingsong Gou
3da552b2c7 drivers: i2c: sf32lb: add get_config() support
Add get_config() support for sf32lb

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-10 07:24:34 -05:00
Robert Lubos
221699228a samples: net: lwm2m_client: Use cert-based DTLS overlay in twister
Make sure that certificate-based DTLS config is built by twister and
also mention it in the README file.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-12-10 07:24:26 -05:00
Robert Lubos
d9cc7845ec samples: net: lwm2m_client: Add missing PSA configs neeed for HS
Add missing PSA configs required for successful DTLS handshake with PSK.
Cert-based config also needed to enable some RSA support, as otherwise
mbed TLS throws errors about some undefined RSA error mapping.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-12-10 07:24:26 -05:00
Henrik Brix Andersen
573f4805c9 tests: drivers: can: api: canfd: use 75% for the data phase sample point
Use a sample point of 75% for the data phase timing to match the bitrate of
1Mbit/s.

Fixes: #100615

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2025-12-10 07:24:14 -05:00
Henrik Brix Andersen
f7786bba5f tests: drivers: can: api: relax CAN sample point accuracy requirements
Relax the CAN sample point location accuracy requirements in the CAN API
test suites by taking CONFIG_CAN_SAMPLE_POINT_MARGIN into account.

Fixes: #100615

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2025-12-10 07:24:14 -05:00
Camille BAUD
7830a76b7f dts: bflb: Add flash-controller chosen
Adds flash controller chosen to make CI happy

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-10 07:24:00 -05:00
Anas Nashif
79356f1385 ci: assigner: only run on main branch
See if this fixes the issue where this workflow runs on released
branches.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-10 07:23:52 -05:00
Pavel Vasilyev
fd38fde6c2 doc: bluetooth: mesh: Update supported Bluetooth Mesh Protocol version
Update Bluetooth Mesh Protocol supported version to 1.1.1.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2025-12-10 10:35:30 +00:00
Stephen Stauts
e260a69c61 samples: boards: nordic: Update command for checking ironside
Uses the modern nrfutil command for checking ironside versions
through the boot report, rather than hardcoded addressing.

Signed-off-by: Stephen Stauts <stephen.stauts@nordicsemi.no>
2025-12-10 10:35:21 +00:00
Tim Pambor
33f50ee90e drivers: clock_control: stm32: enable fractional divider for PLL2/3
Configure the fractional divider (FRACN) for PLL2 and PLL3
on STM32H5 series when specified in the device tree.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-10 10:35:14 +00:00
Tim Lin
e4f518b56a drivers/i2c: it8xxx2: Add port info to error logs
Improve I2C error logs by adding port number to all timeout and host
error messages, making it easier to identify which controller reports
failures.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-12-10 10:35:02 +00:00
Paweł Pelikan
82ed28fea6 manifest: Update hal_nordic
Manifest to update latest changes.

Signed-off-by: Paweł Pelikan <pawel.pelikan@nordicsemi.no>
2025-12-10 10:34:47 +00:00
Biwen Li
ab6c28fd98 soc: nxp: imx943: set dma tcd queue size to fix build issues
Set dma tcd queue size to 4 defaultly to fix build issues,
- error: static assertion failed: NUM_DMA_BLOCKS_RX_PREP must be
  < CONFIG_DMA_TCD_QUEUE_SIZE
  #define BUILD_ASSERT(EXPR, MSG...) _Static_assert((EXPR),...
  drivers/i2s/i2s_mcux_sai.c:45: note: in expansion of
  macro BUILD_ASSERT
  BUILD_ASSERT(MAX_TX_DMA_BLOCKS > NUM_DMA_BLOCKS_RX_PREP,

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-10 10:34:30 +00:00
Sercan Erat
a57fcc12a8 boards: rakwireless: Adding rak11160 board support
The RAK11160 WisDuo module is a low-power, long-range LoRaWAN
module based on the STM32WLE5 and Espressif ESP8684H2 MCUs.

Signed-off-by: Sercan Erat <sercanerat@gmail.com>
2025-12-10 10:34:06 +00:00
Mario Paja
f4cfd85c56 drivers: video: stm32_dcmi: relocate dma stream to driver data
This change moves the dma stream from _config to _data,
allowing direct reference the DMA stream rather than
duplicating it on the stack. Additionally, it aligns the
declaration to the other STM32 drivers.

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-12-10 10:33:50 +00:00
Mario Paja
ccdf98acd8 drivers: remove on-stack copying of dma cfg on stm32 drivers
This change removes the on-stack copying and instead
uses a pointer to the configuration to  avoid unnecessary
stack usage

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-12-10 10:33:50 +00:00
Dmitrii Sharshakov
a6b9f877e9 doc: releases: migration-guide-4.4: add a note on SETTINGS_TFM_PSA
Add a note about a renamed Kconfig option

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-10 10:33:34 +00:00
Dmitrii Sharshakov
e80b608cd4 settings: tfm_psa: improve code style
Fix SonarQube warnings, move variable declarations to the
top of the block according to Zephyr code style

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-10 10:33:34 +00:00
Dmitrii Sharshakov
7c3762130d samples: settings: cover PSA PS backend
By default, run on mps2/an521/cpu0/ns with TF-M.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-10 10:33:34 +00:00
Dmitrii Sharshakov
3117d7ad2c tests: settings: cover PSA PS backend
Just like ITS, it can be tested on mps2/an521/cpu0/ns with TF-M.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-10 10:33:34 +00:00
Dmitrii Sharshakov
0e04d8a802 settings: tfm_psa: add support for PS backend
Protected Storage is another type of secure (encrypted and
authenticated) storage available using PSA interfaces.

When targeting TF-M builds, allow making use of PS for storing settings

Fixes #94681

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-10 10:33:34 +00:00
Dmitrii Sharshakov
06eb1473d5 settings: tfm_psa: rename from its
Prepare for extending this backend to also allow storing settings in the
PS (Protected Storage).

Mostly file and kconfig renames, as well as updates
to comments and log messages.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-10 10:33:34 +00:00
Peter Mitsis
8fa52bf82f tests: Add smp_metairq test
Adds a new meta-IRQ test just for SMP. This test verifies that
a cooperative thread preempted by a meta-IRQ thread resumes on
the same CPU after the meta-IRQ thread finishes.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-12-10 10:32:50 +00:00
Peter Mitsis
9d23a1a948 doc: Add note to meta-IRQ threads
Adds a note to the meta-IRQ thread documentation indicating that
that when a cooperative thread resumes after being preempted by
a meta-IRQ thread it will resume on the same CPU from which it was
preempted.

On a UP system such behavior is a given. However, this behavior becomes
relevant on an SMP system to ensure that both schedule-locked and
cooperative threads are not accidentally shuffled to another CPU while
querying the properties associated with their current CPU.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-12-10 10:32:50 +00:00
Peter Mitsis
5dd36854fd kernel: Update clearing metairq_preempted record
If the thread being aborted or suspended was preempted by a metaIRQ
thread then clear the metairq_preempted record. In the case of
aborting a thread, this prevents a re-used thread from being
mistaken for a preempted thread. Furthermore, it removes the need
to test the recorded thread for readiness in next_up().

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-12-10 10:32:50 +00:00
Peter Mitsis
36d195b717 kernel: MetaIRQ on SMP fix
When a cooperative thread (temporary or otherwise) is preempted by a
metaIRQ thread on SMP, it is no longer re-inserted into the readyQ.
This prevents it from being scheduled by another CPU while the
preempting metaIRQ thread runs.

Fixes #95081

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-12-10 10:32:50 +00:00
Peter Mitsis
653731d2e1 kernel: Adjust metairq preemption tracking bounds
Adjust the bounds for tracking metairq preemption to include the
case where the number of metairq threads matches the number of
cooperative threads. This is needed as a thread that is schedule
locked through k_sched_lock() is documented to be treated as a
cooperative thread. This implies that if such a thread is preempted
by a metairq thread that execution control must return to that
thread after the metairq thread finishes its work.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-12-10 10:32:50 +00:00
Kai Vehmanen
3b7b2aef96 drivers: dai: intel: ssp: add get_properties_copy support
Add support for new get_properties_copy() method. This allows to
use ssp driver from user-space threads.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2025-12-10 10:32:14 +00:00
Kai Vehmanen
05069845d4 drivers: dai: make user-space support build-time selectable
The DAI interface is not used from user-space in all configurations
where Zephyr user-space is enabled, so it is beneficial to have
a build option to contorl whether the DAI syscalls are included or
not.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2025-12-10 10:32:14 +00:00
Kai Vehmanen
fa2c904266 drivers: dai: add get_properties_copy() method
Add a variant of get_properties() method that writes the properties
to a caller provided pointer. Unlike the old variant, this copy
variant can be exported to user-space in a safe way.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2025-12-10 10:32:14 +00:00
Kai Vehmanen
81e37ad4e8 drivers: dai: add ability to use dai.h from user threads
Add user-space support to the dai.h interface. No functional
impact to builds when CONFIG_USERSPACE is not set.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2025-12-10 10:32:14 +00:00
Vijay Sharma
432d9d2a6b tracing: trace timer calls
Add tracing support for timer expiry and stop function callbacks,
enabling measurement of callback execution duration and facilitating
debugging of cases where callbacks take longer than expected.

Signed-off-by: Vijay Sharma <vijshar@qti.qualcomm.com>
2025-12-09 22:40:13 -05:00
Marek Matej
90e81504ae soc: espressif: hide AMP configs
Hide AMP configs if not used.
Provide safe SRAM values for synthetic appcpu targets.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2025-12-09 22:40:01 -05:00
Pieter De Gendt
e3882162cf drivers: ethernet: litex: Support MAC address config
Update the litex,liteeth ethernet driver to use a MAC address configuration
struct.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-09 22:39:53 -05:00
Yongxu Wang
90f2a22882 drivers: firmware: scmi: force polling mode for message attributes query
During reboot operations, interrupts are disabled but k_is_pre_kernel()
returns false, causing SCMI communication to fail when using interrupt
mode. Force polling mode to ensure reliable operation in all contexts.

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-12-09 22:39:35 -05:00
Yongxu Wang
2d3c40d1b3 drivers: firmware: scmi: add initial reboot interface
Implement sys_arch_reboot() using SCMI system power protocol
for warm and cold reset operations on SCMI-enabled platforms.

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-12-09 22:39:35 -05:00
Yongxu Wang
cc069c0201 drivers: firmware: scmi: Introduce basic system power protocol
Add SCMI System Power Domain Protocol support with:

- System power state set operations
- Standard SCMI power states (shutdown, cold/warm reset, suspend)
- Graceful and forceful power transitions
- Optional NXP vendor-specific power states
- Device tree binding for "arm,scmi-system"

This enables system-wide power management through standardized
SCMI interfaces for reboot and power control operations.

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-12-09 22:39:35 -05:00
Yongxu Wang
ada584012b drivers: firmware: scmi: add protocol version negotiate
Add SCMI protocol version negotiation to handle compatibility between
different agent and platform versions. The negotiation automatically
downgrades to supported version when needed and maintains backward
compatibility with legacy systems.

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-12-09 22:39:35 -05:00
Yongxu Wang
9d163c73fb drivers: firmware: scmi: add protocol version support
Add version field to struct scmi_protocol and update protocol macros
to accept version parameter.

Protocol versions added:
  - Clock Control: v3.0.0 (SCMI v3.2 DEN0056E)
  - Pin Control: v1.0.0 (SCMI v3.2 DEN0056E)
  - Power Domain: v3.0.1 (SCMI v3.2 DEN0056E)
  - NXP CPU: v1.0.0 (vendor extension)

Updated macros:
  - DT_SCMI_PROTOCOL_DATA_DEFINE
  - DT_SCMI_PROTOCOL_DEFINE
  - DT_SCMI_PROTOCOL_DEFINE_NODEV
  - DT_INST_SCMI_PROTOCOL_DEFINE

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-12-09 22:39:35 -05:00
Yongxu Wang
d0e9d950fb drivers: firmware: scmi: add common protocol interface functions
Add standardized SCMI protocol common interface functions that can be
reused across different SCMI protocol implementations:

- scmi_protocol_get_version(): Query protocol version
- scmi_protocol_attributes_get(): Get protocol-specific attributes
- scmi_protocol_message_attributes_get(): Query message capabilities
- scmi_protocol_version_negotiate(): Negotiate protocol version support

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-12-09 22:39:35 -05:00
Mathieu Choplain
1b2b09d6ad tests: drivers: udc: add integration platform for skeleton test
Add `integration_platforms` to the `drivers.usb.udc.skeleton` test case to
ensure the UDC Skeleton driver is built and tested by CI.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 22:39:24 -05:00
Mathieu Choplain
5c65e3797f drivers: usb: udc: skeleton: share thread creation code across instances
Instead of having one "make_thread" function per instance, called through
a function pointer in the instance configuration, save the thread stack
information instead and consume it from shared code in the driver pre-init
function. This makes the driver more readable (less code in the instance
creation macro) and should reduce its footprint impact (since the thread
creation code is no longer duplicated).

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 22:39:24 -05:00
Biwen Li
ac576474e6 soc: nxp: imx943: use configdefault
Use configdefault

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-09 22:38:43 -05:00
Tim Pambor
816dfb8f11 drivers: timer: stm32_lptim: add reset support
Add support for resetting the LPTIM peripheral to its default state
on initialization. This ensures that any previous configurations
do not interfere with the new settings.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-09 22:38:35 -05:00
Tim Pambor
7fc2f421a4 dts: arm: st: add reset for lptim
Add resets property to lptim binding and define resets for all lptim
instances in device tree files for STM32 MCUs.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-09 22:38:35 -05:00
Pieter De Gendt
f75ba50de6 drivers: ethernet: sensry: Support MAC address config
Update the sensry,sy1xx-mac driver to use a MAC address configuration
struct.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-09 22:38:23 -05:00
Pieter De Gendt
00b051dd76 drivers: ethernet: sensry: Fix phy handle instance
Fix ethernet PHY handle in case of multiple instances.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-09 22:38:23 -05:00
Marek Matej
5f3f4e7285 drivers: flash: Fix flash host type for CI builds
This fixes the APPCPU synthetic builds.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2025-12-09 22:38:02 -05:00
Tobias Kässer
ef85dbe085 drivers: sensor: adxl345: add device PM support
Add support for the Zephyr device power management framework to
enable runtime power control of the ADXL345 accelerometer.

This implementation adds a pm_device_action callback that handles
SUSPEND and RESUME actions. When suspended, the sensor enters
standby mode for low power operation. On resume, it returns to
measurement mode.

The implementation follows the standard pattern used by other
sensor drivers (lis2dh, bme280, vcnl4040) and integrates with
the PM_DEVICE_DT_INST_DEFINE macro for automatic PM setup.

Tested on nRF52832 with CONFIG_PM_DEVICE enabled.

Signed-off-by: Tobias Kässer <t.kaesser@gmail.com>
2025-12-09 22:37:39 -05:00
Zhaoxiang Jin
6e51add741 tests: comparator: enable gpio_loopback for lpcxpresso55s36
enable gpio_loopback for lpcxpresso55s36

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-09 22:37:32 -05:00
Zhaoxiang Jin
d17a9659ea boards: lpcxpresso55s36: enable hscmp for lpc55s36
enable hscmp for lpc55s36

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-09 22:37:32 -05:00
Zhaoxiang Jin
a62bf4b978 drivers: comparator: Add high-speed comparator support
Add high-speed comparator support

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-09 22:37:32 -05:00
Zhaoxiang Jin
bc93570584 drivers: clock_control_mcux_syscon: add HSCMP clock support
add HSCMP clock support.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-09 22:37:32 -05:00
Zhaoxiang Jin
f08ec232b2 soc: lpc55xxx: update NUM_IRQS for SOC_LPC55S36
SOC_LPC55S36 has 119 IRQs.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-09 22:37:32 -05:00
John Chung
d41d915330 pmci: mctp: Fix MCTP USB Packet Length Issue
According to DSP0283 1.0.1, Length byte in MCTP over USB header
fields should start from the "MCTP over USB Header" to the last
byte in the "MCTP packet payload"

Signed-off-by: John Chung <john.chung@arm.com>
2025-12-09 17:13:56 -05:00
Etienne Carriere
88cc16191b manifest: psa-arch-tests: support for STM32U5 and STM32WBA65
Update PSA-Arch-tests to support testing STM32U585 and STM32WBA
based boards.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-12-09 17:09:50 -05:00
Daniel Leung
bf44a017a6 coredump: fix ruff warnings on gdbstuc scripts
This fixes ruff warnings on coredump gdbstuc scripts.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 17:09:41 -05:00
Daniel Leung
9ace08210e coredump: fix ruff warnings on parser scripts
This fixes ruff warnings on coredump parser scripts.

Note SIM115 is not fixed yet as it requires more intrusive
changes to handle opened file with context manager.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 17:09:41 -05:00
Daniel Leung
79a5783a4b coredump: fix ruff warnings on top level scripts
This fixes ruff warnings on top level coredump scripts.
This is done via "ruff check --fix" without manual editing.

Note SIM115 is not fixed yet as it requires more intrusive
changes to handle opened file with context manager.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 17:09:41 -05:00
Daniel Leung
37b8402668 coredump: run ruff format on scripts
This is done via "ruff format" without any manual editing.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 17:09:41 -05:00
Daniel Leung
67e6720b31 coredump: gdbstubs: x86: disable pylint duplicate code warnings
This disables the duplicate code warnings on x86 and x86_64
gdbstubs. The exception vector tables may look the same now but
can deviate depending on supported features on architecture.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 17:09:41 -05:00
Sylvio Alves
3b39e3dca4 soc: espressif: power: register power log module
All power.c files in Espressif SoCs depends on un-registered
soc log module. When CONFIG_LOG=y and CONFIG_LOG_DEFAULT_LEVEL=4,
build fails as LOG_DBG used in those files won't have its proper
declaration.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-09 17:09:32 -05:00
Peter Mitsis
d59b2a29b4 sys: sys_heap: Fix _system_heap type
Changes the type used in _system_heap extern declarations to use
k_heap instead of sys_heap.

Fixes #100530

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-12-09 17:09:25 -05:00
Lauren Murphy
e82a8a612f MAINTAINERS: add laurenmurphyx64 to LLEXT
Adds Lauren Murphy as a LLEXT collaborator.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2025-12-09 17:08:26 -05:00
Jacky Lee
3b38d6cc71 drivers: serial: ns16550: Fix TX IRQ not triggered when FIFO is empty
When uart_ns16550_irq_tx_enable() is called and the TX FIFO is already
empty, no new interrupt is generated, causing data transmission to stall
in some cases. This patch introduces a workaround to simulate an ISR
callback if the FIFO is empty when enabling the TX IRQ.

Signed-off-by: Jacky Lee <jacky.lee@egistec.com>
2025-12-09 14:55:35 -05:00
Ederson de Souza
bc480ca3f4 samples/subsys/pmci/mctp: Make host/endpoint sample messages friendly
This patch achieves that by:
  - Waiting one second between each message sent by the host, so people
    can actually follow what's going on;
  - Wraping the content of the messages (strings "hello" and "world") in
    quotes, so it's clear what they are;
  - Toning down the logging to INF - no need for DBG;
  - Removing astray `\n` - LOG_XXX already takes care of that.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-12-09 14:55:24 -05:00
Ederson de Souza
b6d0ac47dc samples/subsys/pmci/mctp: Do not repeatedly start RX
It only needs to be started once - all subsequent start will fail with
-EBUSY and possibly print some error message.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-12-09 14:55:24 -05:00
Ederson de Souza
3376da8a90 samples/subsys/pmci/mctp: Endpoint needs to reply to host
But it was sending the reply to its own endpoint ID, thus the host was
ignoring it.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-12-09 14:55:24 -05:00
Anas Nashif
7aeddc3386 doc: tracing: add a note about compatibility
Add a note about compatibility with older traces.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-09 14:55:15 -05:00
Anas Nashif
2bfe6c498b tracing: move event ids from uint8_t to uint16_t
We are hitting the limit of 256 events possible with event id right now
defined as uint8_t.

The bandwidth increase is minimal (2 bytes per event) compared to the
payload data, and the scalability benefits far outweigh the costs.

Existing CTF traces with 8-bit IDs won't be compatible.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-09 14:55:15 -05:00
Ederson de Souza
308c40c111 samples/subsys/pmci/mctp: Add npcx4m8f_evb overlays
So that one can run the host/endpoint sample on them.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-12-09 14:54:56 -05:00
Mathieu Choplain
7af28275f0 migration-guide: 4.4: document remplacement of zephyr,ccm
Document remplacement of the ST-specific `zephyr,ccm` by `zephyr,dtcm`
along with actions to take in application code in the migration guide.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 14:54:36 -05:00
Mathieu Choplain
9a54da0c34 doc: dts: api: remove documentation of chosen zephyr,ccm
The `zephyr,ccm` chosen was an ST-specific property which has been replaced
by the generic `zephyr,dtcm`. Remove it from the DTS documentation.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 14:54:36 -05:00
Mathieu Choplain
7323d50fc5 soc: st: stm32: remove CCM handling code
The `st,stm32-ccm` is now used though the generic DTCM mechanism: remove
all SoC-specific code which was used to implement support for it.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 14:54:36 -05:00
Mathieu Choplain
63081242b9 linker: remove STM32 CCM sections
Remove section names and symbols relating to the STM32 CCM region,
`/chosen/zephyr,ccm`, which is replaced by the standard DTCM region
`/chosen/zephyr,dtcm`.

For backwards compatibility, the old `__ccm_<...>_section` attribute
macros are aliased to `__dtcm_<...>_section` (until release 4.5).

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 14:54:36 -05:00
Mathieu Choplain
dc5e85a8d0 kernel/arch: remove zephyr,ccm initialization code
doc: dts: api: remove documentation of chosen `zephyr,ccm`

The `zephyr,ccm` chosen was an ST-specific property which has been replaced
by the generic `zephyr,dtcm`. Remove region initialization code from the
common arch init code (+ BSS zeroing from common XIP init code).

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 14:54:36 -05:00
Mathieu Choplain
f7d75fc991 samples: board: st: ccm: update sample for zephyr,dtcm usage
Update the ST CCM usage sample to be compatible with CCM as `zephyr,dtcm`.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 14:54:36 -05:00
Mathieu Choplain
2d4feea8ce boards: (STM32F4 based): replace zephyr,ccm chosen with zephyr,dtcm
The STM32 CCM can be used as `/chosen/zephyr,dtcm` - transition all boards
to this chosen to allow deprecation/removal of the legacy `zephyr,ccm`.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 14:54:36 -05:00
Mathieu Choplain
f507f0975b dts: arm: st: stm32{f3,f4}: rename CCM memory region for zephyr,dtcm
Rename the CCM memory region for STM32F3 and STM32F4 series such that the
CCM node can be used as a `zephyr,dtcm`.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 14:54:36 -05:00
Sylvio Alves
ee02e088ae west.yml: hal_espressif: fix ESP32-C3 linker for ECO7
Fix missing linker file when ESP32-C3 SOC_REV_1_1 is used.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-09 14:54:27 -05:00
Tomáš Juřena
e784d3bc0d boards: st: Add stlink_dbgserver to multiple boards
Allow to use `stlink_gdbserver` as a gdb server when running
`west debug -r stlink_gdbserver`. This is helpful when OpenOCD does not
yet support the chip, for example, **nucleo_c071rb**.

In my tests, I have flashed the debug build of *blinky* sample and used
GDB to add a temporary hardware breakpoint to the main function. When I
reached there, I stepped through the code.

I have tested this with the following boards:

- disco_l475_iot1
- nucleo_c071rb
- nucleo_f042k6
- nucleo_f303k8
- nucleo_f303re
- nucleo_f411re
- nucleo_l432kc
- nucleo_l452re
- nucleo_wl55jc
- stm32f0_disco
- stm32f3_disco
- stm32f411e_disco
- stm32f412g_disco
- stm32f429i_disc1
- stm32f4_disco
- stm32f769i_disco
- stm32l1_disco
- stm32l476g_disco

Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
2025-12-09 14:54:20 -05:00
Martin Hoff
a0602f0358 tests: driver: spi: add overlay for xg23_rb4210a board
This patch introduces overlay for xg23_rb4210a for the spi_loopback
test. It is needed because it has another peripheral ip version than
all the other already tested board.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-09 14:54:10 -05:00
Henrik Brix Andersen
8f7861fbd7 doc: releases: migration guide: 4.4: add entry for CAN Kconfig changes
Mention the CAN controller driver Kconfig namespace changes in the
migration guide.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Henrik Brix Andersen
d672bdbdcc samples: can: remove CONFIG_CAN_MAX_FILTER setting
Remove setting of CONFIG_CAN_MAX_FILTER and rely on driver defaults.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Henrik Brix Andersen
65eee6d3d9 drivers: can: increase default setting for software-limited RX filters
Increase the default number of software-limited CAN RX filters across the
drivers. Some of these were chosen quite conservative, requiring custom
configuration for even simple in-tree samples.

Users can reduce the number of available RX filters to reduce RAM footprint
as needed.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Henrik Brix Andersen
479666f26f drivers: can: rcar: rename CONFIG_CAN_RCAR_MAX_FILTER Kconfig option
Rename Kconfig option CONFIG_CAN_RCAR_MAX_FILTER to
CONFIG_CAN_RCAR_MAX_FILTERS to match remaining CAN driver Kconfig option
naming.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Henrik Brix Andersen
d3104b9f6d drivers: can: xmc4xxx: use proper namespace for Kconfig symbols
Use proper namespace for the CAN xmc4xxx Kconfig symbols, renaming
CONFIG_CAN_MAX_FILTER to CONFIG_CAN_XMC4XXX_MAX_FILTERS.

This prevents Kconfig symbol clashes between different CAN controller
drivers.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Henrik Brix Andersen
38c3297421 drivers: can: stm32: fdcan: use proper namespace for Kconfig symbols
Use proper namespace for the STM32 FDCAN Kconfig symbols, renaming
CONFIG_CAN_MAX_STD_ID_FILTER to CONFIG_CAN_STM32_FDCAN_MAX_STD_ID_FILTERS
and CONFIG_CAN_MAX_EXT_ID_FILTER to
CONFIG_CAN_STM32_FDCAN_MAX_EXT_ID_FILTERS.

This prevents Kconfig symbol clashes between different CAN controller
drivers.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Henrik Brix Andersen
f2a6a191cf drivers: can: stm32: bxcan: use proper namespace for Kconfig symbols
Use proper namespace for the STM32 bxCAN Kconfig symbols, renaming
CONFIG_CAN_MAX_STD_ID_FILTER to CONFIG_CAN_STM32_BXCAN_MAX_STD_ID_FILTERS
and CONFIG_CAN_MAX_EXT_ID_FILTER to
CONFIG_CAN_STM32_BXCAN_MAX_EXT_ID_FILTERS.

This prevents Kconfig symbol clashes between different CAN controller
drivers.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Henrik Brix Andersen
89a238d74c drivers: can: mcux: flexcan: use proper namespace for Kconfig symbols
Use proper namespace for the MCUX FlexCAN Kconfig symbols, renaming
CONFIG_CAN_MAX_FILTER to CONFIG_CAN_MCUX_FLEXCAN_MAX_FILTERS and
CONFIG_CAN_MAX_MB to CONFIG_CAN_MCUX_FLEXCAN_MAX_MB.

This prevents Kconfig symbol clashes between different CAN controller
drivers.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Henrik Brix Andersen
f2e49c8d55 drivers: can: mcp251xfd: use proper namespace for Kconfig symbols
Use proper namespace for the CAN mcp251xfd Kconfig symbols, renaming
CONFIG_CAN_MAX_FILTER to CONFIG_CAN_MCP251XFD_MAX_FILTERS.

This prevents Kconfig symbol clashes between different CAN controller
drivers.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Henrik Brix Andersen
4ec070570b drivers: can: max32: use proper namespace for Kconfig symbols
Use proper namespace for the CAN max32 Kconfig symbols, renaming
CONFIG_CAN_MAX_FILTER to CONFIG_CAN_MAX32_MAX_FILTERS.

This prevents Kconfig symbol clashes between different CAN controller
drivers.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Henrik Brix Andersen
6234480a57 drivers: can: mcp2515: use proper namespace for Kconfig symbols
Use proper namespace for the CAN mcp2515 Kconfig symbols, renaming
CONFIG_CAN_MAX_FILTER to CONFIG_CAN_MCP2515_MAX_FILTERS.

This prevents Kconfig symbol clashes between different CAN controller
drivers.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Henrik Brix Andersen
8b52241c06 drivers: can: sja1000: use proper namespace for Kconfig symbols
Use proper namespace for the CAN sja1000 Kconfig symbols, renaming
CONFIG_CAN_MAX_FILTER to CONFIG_CAN_SJA1000_MAX_FILTERS.

This prevents Kconfig symbol clashes between different CAN controller
drivers.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Henrik Brix Andersen
62f7dfa4be drivers: can: native_linux: use proper namespace for Kconfig symbols
Use proper namespace for the CAN native_linux driver Kconfig symbols,
renaming CONFIG_CAN_MAX_FILTER to CONFIG_CAN_NATIVE_LINUX_MAX_FILTERS.

This prevents Kconfig symbol clashes between different CAN controller
drivers.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Henrik Brix Andersen
4333f98b2c drivers: can: loopback: use proper namespace for Kconfig symbols
Use proper namespace for the CAN loopback driver Kconfig symbols, renaming
CONFIG_CAN_MAX_FILTER to CONFIG_CAN_LOOPBACK_MAX_FILTERS.

This prevents Kconfig symbol clashes between different CAN controller
drivers.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-12-09 14:54:02 -05:00
Martin Hoff
7c87f23c9b boards: silabs: add missing clock frequency on spi eusart node
This patch add the clock-frequency property for two board. Without this
patch, the frequency is silently set to 1 Mhz which can introduce
some lack of understanding.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-09 14:53:51 -05:00
Qingsong Gou
7c39469e17 drivers: pwm: sf32lb: add atim based pwm driver
add atim based pwm driver for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-09 09:54:16 -05:00
Qingsong Gou
01a7b9e2d8 dts: arm: sifli: sf32lb52x: add atim node
add atim timer node for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-09 09:54:16 -05:00
Qingsong Gou
8d331b7b08 dts: bingdings: pwm: add sifli,sf32lb-atim-pwm
add sifli,sf32lb-atim-pwm bingdings

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-09 09:54:16 -05:00
Qingsong Gou
ae25d71a63 dts: bingdings: timer: add sifli,sf32lb-atim
add sifli,sf32lb-atim bingdings

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-09 09:54:16 -05:00
Emil Gydesen
4e98b05755 tests: Bluetooth: Tester: Fix bad BIS sync shift
The shift is an old leftover from when the BAP API was
different and BIT(1) means BIS Index 1, but now BIT(0)
means BIT Index 1.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-09 09:53:35 -05:00
Joakim Andersson
2226ba8778 test: drivers: modem: Test modem cmd send and parse response
Add test cases to verify modem_cmd_send functionality, including parsing
of response parameters.

Signed-off-by: Joakim Andersson <joerchan@gmail.com>
2025-12-09 09:53:20 -05:00
Joakim Andersson
79b9025315 drivers: modem: Include empty string arguments in argument parsing
When parsing AT command responses, empty string arguments were being
ignored if they occur it the end of the response.
This is not only iconsistent behavior, but also causes issues when
parsing responses where we need to know the number of arguments.
For example, the +CEREG response and unsolicited command response which
we need to know if it is response or unsolicited command response to
correctly parse the it, as the first argument will be different.
Example:
Response:     +CEREG: 5,4,\"0A0B\",\"FFFFFFFF\",9,0,0,,
Notification: +CEREG: 4,\"0A0B\",\"FFFFFFFF\",9,0,0,,
Here we want to know that response has 8 arguments, not 7, or we will
confuse it with the notification.

Signed-off-by: Joakim Andersson <joerchan@gmail.com>
2025-12-09 09:53:20 -05:00
Yassine El Aissaoui
15a347b405 drivers: mcux_os_timer: Add Kconfig option for MIN_DELAY configuration
Introduce CONFIG_MCUX_OS_TIMER_MIN_DELAY to allow the configuration
of the minimum delay cycles.

Signed-off-by: Yassine El Aissaoui <yassine.elaissaoui@nxp.com>
2025-12-09 09:53:05 -05:00
Jonathan Nilsen
3e081acf9c soc: nordic: uicr: fix pin function ignore handling in CTRLSEL lookup
Selecting the correct CTRLSEL value for VPR IO pins relies on
mapping any pinctrl psel value with the correct port/pin set on the
VPR nodes in devicetree to the same CTRLSEL value, to avoid enumerating
all permutations of (pin function, port, pin).

However, the mechanism did not work as intended and ended up mapping all
these pins to GPIO instead, which meant that the pins did not behave
as expected.

Update the handling so that it works as intended.

Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
2025-12-09 09:52:50 -05:00
Julien Racki
dc7f445dbd drivers: ethernet: stm32: Add generic helper functions
This commit introduces helper functions to avoid having large
#if DT_HAS_COMPAT_STATUS_OKAY ... #else blocks,
improving readability.

Signed-off-by: Julien Racki <julien.racki-ext@st.com>
2025-12-09 09:52:43 -05:00
Mathieu Choplain
65f710f6f4 drivers: gpio: stm32: return error on invalid WKUP configuration for WBA
When an invalid GPIO configuration is provided for a wake-up pin on
STM32WBA series, display a series-specific message and return an error.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 09:52:22 -05:00
Mathieu Choplain
19666bb12e drivers: gpio: stm32: bubble-up wake-up pin configuration error
When an error occurs while attempting to configure a GPIO pin as wake-up
pin, return the error to the caller instead of merely printing a log
message which may not even be displayed.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 09:52:22 -05:00
Julien Vermillard
eef720ff3f net: lwm2m: add send scheduler helper objects
Introduce the optional OMA 10523/10524 send scheduler extension to manage
cached resources, including control and sampling rule objects, cache
filter with gt/lt/st and pmin/pmax handling, max-age/max-sample limits,
and registration flush helper.
Add an overlay to the LWM2M client sample.
Add a fake humidity sensor.

Signed-off-by: Julien Vermillard <julien@clunkymachines.com>
2025-12-09 09:52:11 -05:00
Tony Han
dc3a719917 dts: arm: microchip: sama7d6: reorganize and add dtsi files for SiPs
Add dtsi files for SiPs and put all the dtsi files for sama7d6 to
"dts/arm/microchip/sam/sama7/sama7d6".
Update the path of dtsi in the board dts file accordingly.

URL for SiP (System-in-Package):
https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAMA7D6-Series-SiP-Data-Sheet-DS60001853.pdf

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-09 09:51:59 -05:00
Tony Han
7ebf2b3375 dts: arm: microchip: sama7g5: reorganize and add dtsi files for SiPs
Add dtsi files for SiPs and put all the dtsi files for sama7g5 to
"dts/arm/microchip/sam/sama7/sama7g5".
Update the path of dtsi in the board dts file accordingly.

URL for SiP (System-in-Package):
https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAMA7G5-SIP-Series-Data-Sheet-DS50003577.pdf

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-09 09:51:59 -05:00
Lyle Zhu
2571b7efa3 Bluetooth: Classic: HFP_HF: Fix invalid indicator index issue
A invalid indicator index will cause the underflow of the array
`ag_ind` if the indicator index is not returned by AG in the
response of AT command `AT+CIND=?`.

Replace hardcoded `-1` values with HFP_HF_INDICATOR_INVALID constant
for better code readability and maintainability. Add proper bounds
checking to validate indicator indices before accessing the `ag_ind`
array using the `ind_table` mapping.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-09 09:51:47 -05:00
Lyle Zhu
75ff93ae21 Bluetooth: Classic: HFP: Fix SCO conn cannot be released issue
There is an issue found that the sco conn cannot be released when the
SCO has been disconnected. The sco conn count is referred in the sco
connected callback due to the `sco_conn` is NULL while `sco_conn`
should not be NULL when the sco connected callback is triggered.

It is a race condition issue where the sco connected callback is
triggered before `sco_conn` is updated. The sco conn reference count
has been referred incorrectly, actually it should not be referred.

Replace direct pointer access to `sco_conn` with atomic operations to
prevent race conditions in concurrent SCO connection scenarios.

If the value of `sco_conn` is not NULL when trying to set the return
value of `bt_conn_create_sco()` to `sco_conn`, it means the race
condition occurs. In this situation, discount the sco conn reference
count to fix the issue.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-09 09:51:18 -05:00
Tomasz Chyrowicz
764f0d183b img_mgmt: Use absolute address in active partition
Use absolute addresses while determining a running application
partition.

Signed-off-by: Tomasz Chyrowicz <tomasz.chyrowicz@nordicsemi.no>
2025-12-09 09:51:07 -05:00
Tomasz Chyrowicz
276ebfcf24 img_util: Use absolute address in active partition
Use absolute addresses while determining a running application
partition.

Signed-off-by: Tomasz Chyrowicz <tomasz.chyrowicz@nordicsemi.no>
2025-12-09 09:51:07 -05:00
Tomasz Chyrowicz
f7e1d0c768 soc: Use absolute address in active partition
Use absolute addresses while determining a running application
partition.

Signed-off-by: Tomasz Chyrowicz <tomasz.chyrowicz@nordicsemi.no>
2025-12-09 09:51:07 -05:00
Tomasz Chyrowicz
88495301d3 flash_map: Add a macro to fetch controller ID
Add a macro that allows to get the node identifier of the flash
controller the area/partition resides on.

Signed-off-by: Tomasz Chyrowicz <tomasz.chyrowicz@nordicsemi.no>
2025-12-09 09:51:07 -05:00
cyliang tw
8f13b37763 tests: drivers: adc: adc_api: support numaker_m3334ki
Add support for Nuvoton numaker board numaker_m3334ki.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-12-09 09:50:26 -05:00
cyliang tw
452e001932 dts: arm: nuvoton: add adc node of numaker m333x
Update m333x.dtsi, to add adc node for adc driver support.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-12-09 09:50:26 -05:00
Alain Volmat
366f337743 dts: bindings: display: clarify lcd-controller pixel-format
Clarify the pixel-format property of a lcd-controller in order to
indicate that this is the pixel-format of data generated by the
lcd-controller, not only for a panel attached to this controller
but also for another device such as interface converter which
would be receiving the data from the lcd-controller.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-09 09:50:07 -05:00
Alain Volmat
d0c45d981a drivers: mipi_dsi: configure DSI host using pixelformat from panel
Use the pixelformat information provided by the DSI panel in order
to control the color coding of the DSI host.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-09 09:50:07 -05:00
Alain Volmat
73ca8c9f76 display: stm32-ltdc: clarify pixel-format property of lcd_controller
So far the LTDC driver has not be using the pixel-format property
defined in the lcd_controller bindings. This property describes the
format of the panel connected to the LTDC output. It is not to be
confused with the format of the LTDC layers (aka format of data stored
into the framebuffer). The LTDC accepts various input formats while in
most cases only RGB888 is supported for output. RGB666 is also supported
by enabling Dithering however it is not supported currently by the
driver.
Enforce verification of the pixel-format given to the LTDC device-tree
by checking that it matches with the platform supported formats.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-09 09:50:07 -05:00
Alain Volmat
6a336abb3c boards: stm32: correct LTDC panel pixel-format to RGB888
LTDC pixel-format property has been wrongly set to various values
so far without being actually used by the LTDC driver itself.
This property describes the format of the output of the LTDC
(aka format of data between the LTDC and a panel or between
the LTDC and the MIPI-DSI block). Currently only RGB888 is
supported.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-12-09 09:50:07 -05:00
Michał Stasiak
d6062435ff tests: drivers: timer: nrf_grtc_timer: wait for coverage dump
If test is to be run in coverage mode, wait for output to
dump at the end of a failing testcase.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-09 09:49:44 -05:00
Benjamin Cabé
a297a65e60 doc: ci: refresh requirements.txt pinned versions and SHAs
This ensures, we pick a `urllib` version >2.6.0.
See:
- CVE-2025-66418 High severity
- CVE-2025-66471 High severity

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:49:26 -05:00
Benjamin Cabé
223e521275 scripts: ci: refresh requirements-actions.txt pinned versions and SHAs
This ensures, we pick a `urllib` version >2.6.0.
See:
- CVE-2025-66418 High severity
- CVE-2025-66471 High severity

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:49:26 -05:00
Mathieu Choplain
923ece1eea drivers: sensor: qdec_stm32: don't enable LL full driver module
The QDEC driver does not use any of the functions implemented in the TIM
LL full driver module (`stm32XXxx_ll_tim.c`), only those provided by the
LL header (`stm32XXxx_ll_tim.h`).

Disable compilation of the unnecessary full driver module.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 11:14:14 +01:00
Mathieu Choplain
aaf69f5cef drivers: rtc: stm32: don't enable LL full driver module
The RTC driver does not use any of the functions implemented in the LL full
driver module (`stm32XXxx_ll_rtc.c`), only those provided by the LL header
(`stm32XXxx_ll_rtc.h`).

Disable compilation of the unnecessary full driver module.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 11:13:45 +01:00
Mathieu Choplain
3546e73cda drivers: flash: stm32_ospi: cleanup STM32H5-related quirks
STM32H5 series now uses the dedicated `flash_stm32_xspi` driver instead.
Remove all quirks related to H5 in the STM32 OSPI driver.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-09 11:13:27 +01:00
Krzysztof Chruściński
8422e7ed4f tests: arch: arm: Increase kobject text area when no optimization
When CONFIG_NO_OPTIMIZATIONS=n then kobject area can get inflated.
Some targets are currently fail to compile due to that.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-09 11:13:04 +01:00
Haoran Jiang
2a2d5b7be4 drivers: crc: sf32lb: Fix crc calculation error
When the number of input bits changes, the value in the `CR_DATASIZE`
register should be modified accordingly.
The CRC32_C algorithm does not require the result to be XOR

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-12-09 11:12:52 +01:00
Qingsong Gou
9bdafbf23b drivers: clock_control: sf32lb: fix GPTIM2 clock rate
Fix GPTIM2 clock rate

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-09 11:12:30 +01:00
Peter Wang
a249d79afe boards: frdm_mcxa577: add frdm_mcxa577 board
1. add soc mcxa577
2. add board frdm_mcxa577

Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
2025-12-09 11:12:03 +01:00
Peter Wang
336a25c1eb drivers: hwinfo: add mcxa577 support into mcux_mcx_cmc
1. add mcxa577 support into hwinfo_mcux_mcx_cmc

Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
2025-12-09 11:12:03 +01:00
Markus Becker
80d09acfca drivers: Typo in Interrupt
Trivial typo fix.

Signed-off-by: Markus Becker <Markus.Becker@tridonic.com>
2025-12-09 11:11:03 +01:00
Jordan Yates
a1970ebd2f bluetooth: hci: spi: fix length check
The buffer length check was not updated with the change to the H4 header
push location (changed in 6113230c). As the complete buffer is now
provided, a buffer of length `SPI_MAX_MSG_LEN` is now valid.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-09 09:27:32 +01:00
Benjamin Cabé
cdcdd10c15 MAINTAINERS: remove nbalabak due to inactivity
Last activity: 22 months ago (pr)

Recent activities:

- pr: driver: ilc: Interrupt Latency Counter driver
  https://github.com/zephyrproject-rtos/zephyr/pull/68518
  (2024-02-05T07:03:16Z)
- issue: Create an API for Single Event Upset (SEU) Driver Devices
  https://github.com/zephyrproject-rtos/zephyr/issues/67493
  (2024-01-11T18:18:43Z)
- commit: Commit to zephyrproject-rtos/zephyr
  https://github.com/zephyrproject-rtos/zephyr (2024-01-05T08:00:00Z)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Benjamin Cabé
8e3efa39ca MAINTAINERS: remove swinslow due to inactivity
Last activity: 20 months ago (review)

Recent activities:

- review: Review on 'scripts: zephyr_module: Add CPE support'
  https://github.com/zephyrproject-rtos/zephyr/pull/66495 (2024-03-20T11:48:25Z)

- review: Review on 'scripts: zspdx: fix writing custom license IDs'
  https://github.com/zephyrproject-rtos/zephyr/pull/45815 (2022-05-21T17:26:45Z)

- pr: doc: Fix west spdx command docs formatting bug
  https://github.com/zephyrproject-rtos/zephyr/pull/43994 (2022-03-19T19:13:36Z)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Benjamin Cabé
57690087b1 MAINTAINERS: remove sgrrzhf due to inactivity
Last activity: 2 years ago (review)

Recent activities:

- review: Review on 'Introduce early print'
  https://github.com/zephyrproject-rtos/zephyr/pull/65046
  (2023-11-28T04:20:11Z)
- pr: MAINTAINERS: Add myself to ARM arch as collaborator
  https://github.com/zephyrproject-rtos/zephyr/pull/65505
  (2023-11-21T09:02:18Z)
- commit: Commit to zephyrproject-rtos/zephyr
  https://github.com/zephyrproject-rtos/zephyr (2023-11-21T08:00:00Z)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Benjamin Cabé
1659552d15 MAINTAINERS: remove sateeshkotapati due to inactivity
Last activity: 18 months ago (review)

Recent activities:

- review: Review on 'drivers: spi: gecko: Apply frequency configuration,
  support devices with a single USART'
  https://github.com/zephyrproject-rtos/zephyr/pull/72145
  (2024-05-27T06:40:15Z)
- pr: boards: silabs: Added support for Counter and Watchdog in
  efr32xg24_dk2601b https://github.com/zephyrproject-rtos/zephyr/pull/71300
  (2024-04-10T05:20:18Z)
- pr: gecko: service: sysrtc files updated
  https://github.com/zephyrproject-rtos/hal_silabs/pull/62
  (2024-04-10T05:04:03Z)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Benjamin Cabé
8eb468d61d MAINTAINERS: remove ppryga due to inactivity
No activity from this user for over 2 years. It is likely that they're
now @ppryga-nordic but since it doesn't seem anybody noticed the
discrepancy in many years, I think it is safe to drop the entry :)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Benjamin Cabé
6fdce219d0 MAINTAINERS: remove qianruh due to inactivity
Last activity: 18 months ago (pr)

Recent activities:

- pr: tests: subsys: sensing: add sensing test skeleton
  https://github.com/zephyrproject-rtos/zephyr/pull/73124
  (2024-05-22T06:55:42Z)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Benjamin Cabé
213bb20b0a MAINTAINERS: remove povergoing due to inactivity
Last activity: 22 months ago (review)

Recent activities:

- review: Review on 'arm64: smp: Fix cache operations in the SMP'
  https://github.com/zephyrproject-rtos/zephyr/pull/66647
  (2024-01-29T07:37:19Z)
- review: Review on 'tz: Remove unused trustzone driver'
  https://github.com/zephyrproject-rtos/zephyr/pull/66224
  (2023-12-07T06:31:24Z)
- review: Review on ' arch: arm: cortex_m: Move default configs to a file
  and add consistency checks '
  https://github.com/zephyrproject-rtos/zephyr/pull/64978
  (2023-12-05T06:06:35Z)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Benjamin Cabé
b8c3b50cc0 MAINTAINERS: remove najumon1980 due to inactivity
Last activity: 18 months ago (review)

Recent activities:

- review: Review on 'x86: ia32: linker: move bss/noinit sections after data
  section'
  https://github.com/zephyrproject-rtos/zephyr/pull/73044
  (2024-05-22T06:47:31Z)
- pr: kernel: timer: fixes for log_timestamp test case failer due to timer
  PR regression
  https://github.com/zephyrproject-rtos/zephyr/pull/72352
  (2024-05-06T10:47:53Z)
- review: Review on 'Revert 69705 and fix #72344'
  https://github.com/zephyrproject-rtos/zephyr/pull/72345
  (2024-05-06T09:53:31Z)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Benjamin Cabé
053a0624bf MAINTAINERS: remove mrfuchs due to inactivity
Last activity: 2 years ago (pr)

Recent activities:

- pr: drivers: bluetooth: slz_hci: Configure Number of Completed Packets
  threshold https://github.com/zephyrproject-rtos/zephyr/pull/62455
  (2023-09-08T15:59:14Z)
- pr: modules: hal_silabs: Update library BLOBs to version 4.2.4
  https://github.com/zephyrproject-rtos/hal_silabs/pull/38
  (2023-09-08T09:15:52Z)
- commit: Commit to zephyrproject-rtos/zephyr
  https://github.com/zephyrproject-rtos/zephyr (2023-09-08T07:00:00Z)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Benjamin Cabé
600601aa0b MAINTAINERS: remove jgoppert due to inactivity
Last activity: 18 months ago (review)

Recent activities:

- review: Review on 'drivers: input: sbus remote controller support'
  https://github.com/zephyrproject-rtos/zephyr/pull/72628
  (2024-05-26T21:59:03Z)
- review: Review on 'zbus: improve the way of storing observers'
  https://github.com/zephyrproject-rtos/zephyr/pull/60713
  (2023-08-28T18:07:20Z)
- review: Review on 'sensors: icm42688: Do not force rc oscillator'
  https://github.com/zephyrproject-rtos/zephyr/pull/60552
  (2023-07-20T00:37:34Z)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Benjamin Cabé
f8f0bcf0cd MAINTAINERS: remove inteljiangwe1 due to inactivity
Last activity: 2 years ago (review)

Recent activities: - review: Review on 'drivers: dma: add init version for
dma sedi driver'
  https://github.com/zephyrproject-rtos/zephyr/pull/63129
  (2023-10-09T01:45:30Z)
- commit: Commit to zephyrproject-rtos/zephyr
  https://github.com/zephyrproject-rtos/zephyr (2023-08-04T07:00:00Z)
- pr: drivers: ipm: add init version of sedi ipm driver
  https://github.com/zephyrproject-rtos/zephyr/pull/61142
  (2023-08-04T04:23:36Z)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Benjamin Cabé
4852e61f9e MAINTAINERS: remove casparfriedrich due to inactivity
Last activity: 20 months ago (pr)

Recent activities:
  - pr: drivers: adc: tla2021: Fix reference voltage
    https://github.com/zephyrproject-rtos/zephyr/pull/71179
    (2024-04-06T15:00:32Z)
  - commit: Commit to zephyrproject-rtos/zephyr
    https://github.com/zephyrproject-rtos/zephyr (2024-04-03T07:00:00Z)
  - pr: modules: segger: Add Kconfig option to use CCM for data
    https://github.com/zephyrproject-rtos/zephyr/pull/70919
    (2024-03-30T18:26:39Z)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Benjamin Cabé
c29596cfea MAINTAINERS: remove Casper-Bonde-Bose due to inactivity
Last activity: 18 months ago (review)

Recent activities:
  - review: Review on 'Bluetooth: Audio: Shell: Fix build errors for USB=n'
    https://github.com/zephyrproject-rtos/zephyr/pull/72733
    (2024-05-16T06:13:15Z)
  - review: Review on 'Bluetooth: ISO: Introduce bt_iso_chan_send_ts'
    https://github.com/zephyrproject-rtos/zephyr/pull/68611
    (2024-02-07T07:53:39Z)
  - review: Review on 'Bluetooth: BAP: Fix issue with setting invalid iso
  data path'
    https://github.com/zephyrproject-rtos/zephyr/pull/67835
    (2024-01-22T10:15:03Z)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Benjamin Cabé
9b961e7382 MAINTAINERS: remove Andrewpini due to inactivity
Last activity: 18 months ago (pr)
Recent activities:
  - pr: Bluetooth: Mesh: Fix PB GATT adv name
    https://github.com/zephyrproject-rtos/zephyr/pull/73526
    (2024-05-30T13:56:48Z)
  - commit: Commit to zephyrproject-rtos/zephyr
    https://github.com/zephyrproject-rtos/zephyr (2024-05-30T07:00:00Z)
  - review: Review on 'tests: Bluetooth: Mesh: move semaphores out bsim
  initializations'
    https://github.com/zephyrproject-rtos/zephyr/pull/73464
    (2024-05-29T12:59:46Z)

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-09 09:27:21 +01:00
Phuc Pham
5392683060 boards: renesas: rzv: Update the memory layout for board RZ/V2H core CR8
Update the memory layout to use the SRAM3 node for board RZ/V2H core CR8

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-12-09 09:27:12 +01:00
Phuc Pham
931de13d52 soc: renesas: rzv: Modify soc files for RZV2H core CR8
- Enable the DTCM region in soc.c
- Apply MPU configuration for the new memory region (itcm, dtcm,
  sram,...)
- Turn on the Kconfig to relocate the vector table to 0x0.

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-12-09 09:27:12 +01:00
Phuc Pham
0d3d86ae52 dts: renesas: rzv: Add new memory nodes for RZ/V2H core CR8
Add itcm, dtcm and sram3 region for RZ/V2H core CR8

Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-12-09 09:27:12 +01:00
Mirai SHINJO
5e530e2d2d boards: renesas: ek_ra2l1: set 'full_name'
Set 'full_name' for RA2L1 Evaluation Kit.

Signed-off-by: Mirai SHINJO <oss@mshinjo.com>
2025-12-09 09:26:34 +01:00
Georgios Vasilakis
2338a37ff2 modules: tf-m: Add syscall header dependency for TF-M
Zephyr generates the system call headers using CMake custom
targets and various scripts. Some platforms, like the Nordic onces,
reuse some files located in Zephyr inside the TF-M build as well.
Because of this the generated Zephyr headers needs to exist before
TF-M starts the build process in order to succeed.

This adds a dependency to make sure TF-M starts building after the
Zephyr custom command which generates the system call headers is
executed.

Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
2025-12-09 09:26:24 +01:00
Martin Hoff
9f9ea79c7f tests: drivers: dma: change power-state checks in dma loop test
This patch allows a DMA device that is part of a power domain to start
the test in a suspended power-management state. If another device makes
the power domain active (for example, the console UART), the DMA device
within the same power domain may enter a suspended state.
The test will now verify that the device is suspended/off before the
test begins, active during the test, and restored to its initial state
at the end.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-09 09:26:13 +01:00
Daniel Leung
701cbfbc23 xtensa: mmu: may need to copy entries during L2 table dup
During L2 page table duplication, there are cases where we
should copy the table over instead of restoring the PTEs.
Add the ability to copy the table over.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
8d0103b4ad xtensa: mmu: spin lock for counter manipulation
This adds a spinlock to guard page table counter updates.
For some reasons, without this, xt-clang generated code would
result in incorrect counter update possibly due to memory
access ordering (though GCC generated code works fine without
the spin lock).

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
3e33978078 cache: deprecate CONFIG_DOUBLEMAP
Use CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS instead.
The new kconfig reflects more correctly on what is going on
in hardware. Also, this is not enabled by default if CPU
cache is not coherent. CPU cache can be incoherent and yet
there are no mirrored memory regions. Those relying on this
deprecated default behavior has their config adding
CONFIG_CACHE_HAS_MIRRORED_MEMORY_REGIONS separately.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
0540d274c0 xtensa: remove CONFIG_XTENSA_RPO_CACHE
This removes the following kconfigs:

() CONFIG_XTENSA_RPO_CACHE
() CONFIG_XTENSA_CACHED_REGION
() CONFIG_XTENSA_UNCACHED_REGION

The associated feature is actually SoC specific and not general
architecture feature. Since the only user of these have its own
implementation, we can now safely remove these.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
a82a09a314 soc: intel_adsp: SoC specific cached/uncached regions support
This re-implements the CONFIG_XTENSA_RPO_CACHE and its cached
and uncached region support in the SoC layer. This is in
preparation for removing RPO cache in the architecture layer
as this is a SoC feature and not an architecture feature.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
5fefc8b8b8 xtensa: cache: guard kconfig CONFIG_XTENSA_{UN,}CACHED_REGION
Make sure code using these kconfigs are only compiled if they
are defined. They will be removed later. But for now, we need
these #ifdef to avoid breaking the build when we move these
caching functions to SoC layer.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
a8c1df6b80 cache: adds CONFIG_SOC_CACHE
This allows SoC to define their custom cache related functions
and are used by sys_cache_*() functions.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
169304813a cache: move arch_mem_coherent() into cache subsys
arch_mem_coherent() is cache related so it is better to move it
under cache subsys. It is renamed to sys_cache_is_mem_coherent()
to reflect this change.

The only user of arch_mem_coherent() is Xtensa. However, it is
not an architecture feature. That's why it is moved to the cache
subsys.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
a0a529aecc soc: intel_adsp: move ARCH_XTENSA_SET_RPO_TLB inside
The macro ARCH_XTENSA_SET_RPO_TLB is only used for Intel Audio
DSP. The specific memory mapping requiring this is SoC specific
feature and not a feature on Xtensa in general. It should not be
declared in the architecture layer. So move it.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
06b462bdf6 soc: intel_adsp: add CONFIG_INTEL_ADSP_MEMORY_IS_MIRRORED
This adds a kconfig to indicate a memory mapping where physical
memory regions are both mirrored and mapped in different
addresses. Accessing one set of addresses is via CPU cache
while the other is directed to memory.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
b90b396e64 soc: intel_adsp/ace: move included linker script to include dir
This moves the ace-link.ld into include/linker to indicate it is
to be included by the main linker script. Also rename it to
ace-link-mirrored.ld to indicate that it is for the mirrored
cache configuration.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
301abd8630 xtensa: imply CONFIG_ARCH_HAS_RESERVED_PAGE_FRAMES if MMU
The Zephyr linker script usually puts something before
z_mapped_start (where .text is), for example, vecbase vectors.
So we need to reserve those space or else k_mem_map() would be
mapping those which may result in faults.

To avoid mapping there, CONFIG_ARCH_HAS_RESERVED_PAGE_FRAMES
needs to be used. Since it is common when MMU is enabled, we
should enable it by default using imply. All current Xtensa
MMU SoCs all have this selected anyway. Using 'imply' instead
of 'select' is to allow it to be disabled if so desired.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
48537aeb1f xtensa: CONFIG_ARCH_HAS_USERSPACE should be in arch layer
CONFIG_ARCH_HAS_USERSPACE should be in arch layer as MMU and MPU
support both in the arch layer.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
c11b666ab4 soc: intel_adsp/ace: remove secondary boot flow kconfig
This is no longer needed for simulator to start other CPUs.
So remove it.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
27b1c3138f xtensa: mmu: remove CONFIG_XTENSA_MMU_DOUBLE_MAP
This removes CONFIG_XTENSA_MMU_DOUBLE_MAP and its associated
code. The double mapping of a page into both cached and
uncached memory regions should be done in SoC and application,
as it gives finer control on what actually is being mapped.
For example, if a page only needs to mapped in cached region,
there is no need to map it in the uncached region. This may
save the need to allocate a L2 page table for it, and saves
some memory.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
2e1b4de6d7 soc: intel_adsp/ace: rework MMU mapping array
Rework the SoC MMU mappings in preparation for removal of
double mapping code in Xtensa architecture code. This will let
the SoC layer and application to fine tune memory mappings
instead of having double mapping forcibly applied everywhere.

The modified mapping array mimics what the double mapping
would have done simply to have the same behavior. Future
optimizations can be done to remove unnecessary mappings.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
fdc2e88435 soc: intel_adsp/ace: don't use default MMU mappings
This adds the arch default MMU mappings into the SoC mapping
array. This is in preparation of not forcibly doing double
mapping in architecture code as this type of double mapping
should be specified for individual regions. This allows
the SoC layer to fine tune the mappings as not anything
needs to be double-mapped.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
1bc72e68c6 xtensa: mmu: allow SoC to override default mappings
Adds kconfig CONFIG_XTENSA_MMU_USE_DEFAULT_MAPPINGS for arch
code to initialize the page tables with a few default mappings
covering text, data, BSS and RODATA. Disabling this allows
the SoC to customize and fine-tune the mappings if needed.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
31428237dc soc: intel_adsp/ace: move Xtensa HiFi kconfigs to each SoC
Moves the HiFi related kconfigs to their respective SoC
kconfigs as it is specific to the SoC... and this requires
creating new kconfigs for each SoC series.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
3ed951e150 tests: lib/newlib: skip intel_adsp platforms
The newlib that comes with the Xtensa toolchain is very old,
and is not thread-safe _at all_. So the newlib tests would
fail sometimes but pass in the next run. So skip the newlib
tests for intel_adsp platforms.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
4e54b2f37f tests: mem_protect/stack_random: more randomness for intel_adsp
Due to CONFIG_DCACHE_LINE_SIZE=64, the stack is always aligned
on 64 bytes. With data cache line size and the default of
CONFIG_STACK_POINTER_RANDOM=64 in test, there is not much
randomness as any added offset (<= 64) would be rounded up to
64 bytes due to stack alignment. For the added offset to stack
pointer to actually mean something, CONFIG_STACK_POINTER_RANDOM
has to be larger.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Daniel Leung
04dd427bf1 xtensa: cleanup crt1.S
Removes some unused macros.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-09 09:25:33 +01:00
Charles Hardin
b38a46bade drivers: ethernet: lan9250: add in the reset gpio configurate
The reset gpio field was in the config structure but was not coded
into the initialization path. So, add the appropriate code to handle
the gpio setup when it is defined in the device tree.

Signed-off-by: Charles Hardin <ckhardin@gmail.com>
2025-12-09 09:25:15 +01:00
Charles Hardin
855631aeba drivers: ethernet: lan9250: add support for a random mac address
Extend the lan9250 driver to support using a local administered
unicast random mac address during init. This follows the device tree
settings for zephyr_random_mac_address from other ethernet drivers
for the added support.

Signed-off-by: Charles Hardin <ckhardin@gmail.com>
2025-12-09 09:25:15 +01:00
Vladislav Kulikov
286cefbb30 smf: improve sibling transitions speed
Sibling transitions are now detected in smf_set_state() when source and
destination share the same parent, removing the need for states to flag
the sibling transition explicitly.

Restore include/zephyr/smf.h and lib/smf/Kconfig to match main so this
change only carries the functional update in lib/smf/smf.c, and add a
micro-benchmark test. For accurate statistics, run the test on a board.

Micro-benchmark setup
- Board: NUCLEO-F746ZG (STM32F746, ~192 MHz)
- 200000 iterations per state transition
- Simple HSM (letters are nodes; R is root):

=== SMF transition micro-benchmark ===
        R
      /   \
     A     B
    / \   / \
   C   D E   F
  / \         \
 G   H         J

Current smf_set_state:
======================
Sibling Transitions
(A->B) : 459 cycles/transition (2390 ns)
(C->D) : 482 cycles/transition (2510 ns)
(G->H) : 522 cycles/transition (2718 ns)

Other Transitions
(G<->G) : 237 cycles/transition (1234 ns)
(C->G) : 343 cycles/transition (1786 ns)
(A->H) : 452 cycles/transition (2354 ns)
(G->D) : 651 cycles/transition (3390 ns)
(D->E) : 752 cycles/transition (3916 ns)
(J->D) : 893 cycles/transition (4651 ns)
(J->G) : 1077 cycles/transition (5609 ns)

New smf_set_state:
==================
Sibling Transitions
(A->B) : 356 cycles/transition (1854 ns)(22% faster)
(C->D) : 356 cycles/transition (1854 ns)(26% faster)
(G->H) : 356 cycles/transition (1854 ns)(32% faster)

Other Transitions
(G<->G) : 258 cycles/transition (1343 ns)(9% slower)
(C->G) : 356 cycles/transition (1854 ns)(4% slower)
(A->H) : 464 cycles/transition (2416 ns)(3% slower)
(G->D) : 707 cycles/transition (3682 ns)(9% slower)
(D->E) : 797 cycles/transition (4151 ns)(6% slower)
(J->D) : 970 cycles/transition (5052 ns)(9% slower)
(J->G) : 1157 cycles/transition (6026 ns)(8% slower)

This change makes sibling transitions
deterministic and cheaper (356 cycles on nsim),
at the cost of a small increase for deeper/LCA
transitions (~7–9%). This is a net win for state machines
that mostly hop between siblings.

Signed-off-by: Vladislav Kulikov <vlad_kulikov_c@pm.me>
2025-12-08 22:27:54 -05:00
Laurentiu Mihalcea
e8d8979386 firmware: scmi: nxp: add "nxp" to the CPU protocol definitions
The SCMI CPU protocol is in fact a vendor extension from NXP. The current
naming used for the CPU protocol definitions (i.e. functions, structures,
macros) follows that of the SCMI standard protocols, which might be
misleading.

Include "nxp" in the name of all of the CPU protocol definitions.

This change was performed mechanically using "git grep" and "sed -i"
with some manual intervention.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2025-12-08 22:27:38 -05:00
Dennis Grijalva
61938e7460 mgmt: mcumgr: make mcumgr handler variable const
Ensure mcumgr handler variables are consts in order to make ld happy and
not emit the "LOAD segment with RWX permissions" warning

Signed-off-by: Dennis Grijalva <dennisgrijalva@meta.com>
2025-12-08 22:27:04 -05:00
Fabio Baltieri
4ab97f565e sys: getopt: drop the gcd definition
This is available in util.h since 646f255373 and the existing one
creates a collision and build breakage. Just drop it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-12-08 22:26:48 -05:00
Dmitrii Sharshakov
8f0df404c2 tests: subsys: ipc: ipc_sessions: add _no_unbound tests for bsim
Also cover these code paths.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-08 15:02:29 -05:00
Dmitrii Sharshakov
7c1b95f435 tests: subsys: ipc: ipc_sessions: run on nrf5340bsim
Improve CI coverage.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-08 15:02:29 -05:00
Dmitrii Sharshakov
8f4f1fa5fa ipc: icmsg: fix unbound for POSIX
Make sure unbound works on nrf5340bsim.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-08 15:02:29 -05:00
Dmitrii Sharshakov
3411facb24 tests: subsys: ipc: ipc_sessions: decrement before sending
Once the primary CPU receives the block, it will immediately try to ask
the remote for blocks left to send.

On real hardware, this would typically work fine, since the IRQ
round-trip allows remote to finish the loop iteration.

However on nrf5340bsim the host answers immediately, receiving wrong
data and failing the test.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-08 15:02:29 -05:00
Dmitrii Sharshakov
c125d2dc96 tests: subsys: ipc: ipc_sessions: fix wrong sizeof usage
Fix clangd warnings around use of sizeof on pointers.

No functional change.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-08 15:02:29 -05:00
Dmitrii Sharshakov
bd982008fe tests: subsys: ipc: break busy loops
Busy loops without any way to yield to the kernel are not recommended,
and here it causes a multicore BabbleSim simulation to stall.

Co-authored-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-08 15:02:29 -05:00
Phi Bang Nguyen
646f255373 sys: util: Add gcd and lcm utilities
Add helpers to compute Greates Common Divisor (GCD) and Least Common
Multiple (LCM).

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Signed-off-by: Trung Hieu Le <trunghieu.le@nxp.com>
2025-12-08 15:01:46 -05:00
Phi Bang Nguyen
1f31da3398 sys: util: Add SIGN macro
Add a macro to determine the sign of a value.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Signed-off-by: Trung Hieu Le <trunghieu.le@nxp.com>
2025-12-08 15:01:46 -05:00
Phi Bang Nguyen
53f4f22968 west.yml: Update hal_stm32 revision for SIGN fix
Update the revision to include SIGN macro fix

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-12-08 15:01:46 -05:00
Firas Sammoura
a9500f3846 tests: riscv: Implement unit tests for change permissions function
This commit implements a new unit test suite to validate the
`z_riscv_pmp_change_permissions` function.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-12-08 15:01:37 -05:00
Firas Sammoura
7dc9e87f6c riscv: pmp: Add API to change region permissions at runtime
The new function 'z_riscv_pmp_change_permissions' provides a mechanism
to modify the Read, Write, and Execute (R/W/X) permissions of an
existing PMP region based on its memory attribute index.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-12-08 15:01:37 -05:00
Tom Chang
ab7a558f19 drivers: espi: npcx: workaround for missed IRQ1/12 on NPCX9M7FB
When the firmware wrote data to KBC/AUX output buffer, the hardware
automatically generated IRQ1/12 to notify the host. After the host read
the data, the EC received an output buffer empty (OBE) interrupt to
indicate that the next byte could be written. However, on the NPCX9M7FB,
this mechanism may cause IRQ1/12 to be missed if the firmware write new
data immediately after detecting that the output buffer is empty,
resulting in incorrect behavior.
To avoid missing IRQ1/12, the flow is changed so that it first checks
VWIRE_AVAIL to ensure no pending VW events. If no VW event is pending,
the firmware writes data to the output buffer and explicitly asserts
IRQ1/12 to notify the host. After the host reads the data and the OBE
interrupt triggers, the firmware clears IRQ1/12.
This updated sequence prevents IRQ1/12 from being lost and ensure
correct notification behavior.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2025-12-08 15:01:15 -05:00
Dennis Grijalva
9dbe4bed29 kernel: make static thread data variable const
Ensure static thread data variables are consts in order to make ld happy
and not emit the "LOAD segment with RWX permissions" warning

Signed-off-by: Dennis Grijalva <dennisgrijalva@meta.com>
2025-12-08 15:01:01 -05:00
Tom Burdick
dc512c820b MAINTAINERS: Update maintainership for myself
Transition my MAINTAINERS file statuses to align better with my new role
at Infineon. I loved my time at Intel and am forever thankful to have
been part of an amazing team. I look forward to leading Infineon in the
project.

Signed-off-by: Tom Burdick <thomas.burdick@infineon.com>
2025-12-08 15:00:37 -05:00
Mateusz Junkier
fb8a1ec9f3 Twister: fix serial port timeout
Fix for 1d70b70. Original code used start_time (set before flashing)
to calculate serial port wait timeout, which caused wait loop
to include flash duration, leading to exceed overall timeout.
Added serial_wait_start timestamp for avoid
including flash time in serial port enumeration timeout.
Make timeout dynamic (20% of flash_timeout, minimum 10s).

Signed-off-by: Mateusz Junkier <mateusz.junkier@intel.com>
2025-12-08 13:19:16 -05:00
Jisheng Zhang
1292d6e11a drivers: console: support building for SoCs with no MMU
The device_map() is not defined for SoCs with no MMU, add the
device_map() macro when !DEVICE_MMIO_IS_IN_RAM to support building for
SoCs with no MMU.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
2025-12-08 13:15:53 -05:00
Hake Huang
b3dff9bbbc tests: twister: using --no-rebuild in west flash
west flash deprecates --skip-rebuild to --no-rebuild

Signed-off-by: Hake Huang <hake.huang@nxp.com>
2025-12-08 13:12:04 -05:00
Jordan Yates
d020049f01 scripts: twisterlib: main: trim run duration
Display the total run duration to two decimal points instead of ~14,
similar to the other displayed timestamps.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-08 13:11:44 -05:00
Jordan Yates
d1cd982f8f scripts: twisterlib: display testplan build duration
Display how long it takes to build the testplan in the logs. This can
be useful since the duration to bulid the plan can vary wildly depending
on the arguments given. Without this information, it is difficult to
tell (from CI logs) whether a long execution time is from actually
building and running the tests, or just generating the testplan.

For example, in a downstream repo:
```
./zephyr/scripts/twister --integration -iv -T . --dry-run

INFO    - Building initial testsuite list...
INFO    - Built testsuite list in 10.58 seconds
```
vs
```
./zephyr/scripts/twister --integration -iv -T . --dry-run \
--vendor nordic --vendor zephyr

INFO    - Building initial testsuite list...
INFO    - Built testsuite list in 201.01 seconds
```

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-08 13:11:44 -05:00
Pieter De Gendt
e622bdafe0 docs: releases: 4.4: Add entry for DT_CHILD_BY_UNIT_ADDR_INT
Add a DeviceTree section and entries for the new C macros.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-08 13:09:24 -05:00
Pieter De Gendt
73ab6b6ffb include: zephyr: drivers: adc: Replace FOREACH with CHILD_BY_UNIT_ADDR_INT
The macro to initialise a struct adc_dt_spec instance uses a FOREACH macro,
which can be problematic when nesting in other FOREACH macros, for example
in driver implementations.

Replace it with DT_CHILD_BY_UNIT_ADDR_INT.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-08 13:09:24 -05:00
Pieter De Gendt
4208bd7fcc tests: lib: devicetree: api: Add test cases for DT_CHILD_BY_UNIT_ADDR_INT
Introduce test cases to the devicetree API test suite for
DT_CHILD_BY_UNIT_ADDR_INT and DT_INST_CHILD_BY_UNIT_ADDR_INT.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-08 13:09:24 -05:00
Pieter De Gendt
91278bdddf devicetree: Add DT_CHILD_BY_UNIT_ADDR_INT
Allow fetching child node identifiers by integer unit address.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-08 13:09:24 -05:00
Martin Hoff
da6cd1a474 test: benchmarks: update timing cycle to ns conversion function
SYS_CLOCK_HW_CYCLES_TO_NS_AVG is not correct since we are tracking
cpu tick and SYS_CLOCK_HW_CYCLES_TO_NS_AVG convert it with the clock
frequency.
This patch used the correct conversion function (same api as function
to get the timestamp).

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-08 13:09:08 -05:00
Anas Nashif
d7a8f29ce7 tests: twister: keep this workflow for pytest only
Do not use this workflow for running tests, it should be limited to
blackbox tests only testing command line already happens somewhere else.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-08 13:08:57 -05:00
Ayush Singh
61fba0cbb3 tests: subsys: mgmt: mcumgr: smp_client: Fix test
- Do not use uninitialized smp_client for allocations.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-12-08 11:41:30 -05:00
Ayush Singh
4f98eede4b mcumgr: client: Allow specifying server address
- Currently, it is not possible to use mcumgr client with smp server
  since there is no way to specify smp server address for requests.
- This patch series adds support for creating smp_client_object
  containing information regarding the host server. This design allows
  multiple smp_client_object to exist for the same underlying smp_udp
  transport, making it much easier to use the same udp socket for multiple
  OTAs.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-12-08 11:41:30 -05:00
Zhaoxiang Jin
aa7efb4744 tests: power_mgmt_soc: enable test for frdm_mcxn236
Enable power_mgmt_soc test for NXP frdm_mcxn236 board.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-08 11:40:34 -05:00
Zhaoxiang Jin
3114d7751b soc: nxp/mcxn: Add power management support for MCXN236
Add power management support for MCXN/MCXN236.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-08 11:40:34 -05:00
Zhaoxiang Jin
999e3ab204 dts: nxp_mcxn23x: Add power-states for MCXN23x devices
1. Add power-states for MCXN23x devices
2. Add power management related device nodes to MCXN23x,
including spc, cmc vbat, and wuu.
3. Add 'zephyr,cortex-m-idle-timer' node in frdm_mcxn236.dts

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-08 11:40:34 -05:00
Zhaoxiang Jin
6cfd51e35b dts: nxp,spc: Add wakeup-delay property for nxp spc
When a different VDD_CORE level is configured in low
power modes (LP_CFG register) compared to active modes
(ACTIVE_CFG register), the LPWKUP_DELAY register must
be configured to a minimum value.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-08 11:40:34 -05:00
Zhaoxiang Jin
439d8f2a97 modules: hal_nxp: pull in spc, cmc and vbat driver for mcxn/a
pull in spc, cmc and vbat driver for mcxn/a

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-08 11:40:34 -05:00
Felipe Neves
035156ea50 sensors: as5048: add initial support for AS5048 angle sensor
Which is a contactless angle sensor that communicates over
SPI.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
2025-12-08 11:39:37 -05:00
Markus Becker
dedc526ee5 boards: m5stack: Add support for M5Stack NanoC6
This adds support for M5Stack NanoC6, an ESP32-C6 based development board
with a tiny form factor.

Based off https://github.com/zephyrproject-rtos/zephyr/pull/74697 and
adapted to match other Espressif C6 devices currently in tree.

Signed-off-by: Markus Becker <markushx@gmail.com>
2025-12-08 11:39:29 -05:00
David Jewsbury
c7eccea629 drivers: mspi_dw: nrf_qspi_v2: Update to align nrfx 4.0.1
New nrfx release makes including nrf.h invalid.

Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
2025-12-08 11:39:17 -05:00
Dmitrii Sharshakov
8725972764 samples: tfm_ipc: remove old overlay for nrf9160dk
The region sizes already match ones in nrf91xx_partition.dtsi,
and the overlay has not been adapted to the new partition DT updates.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-08 11:39:06 -05:00
Alberto Escolar Piedras
7d933a4ad2 ci: bsim tests: net: Explicitly define the BOARD
Instead of relying on this board being the default.
Let's explicitly set it in the script.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-08 11:38:58 -05:00
Alberto Escolar Piedras
0096ff2e2a ci: bsim tests: run_parallel: Print in which board we failed a test
In the console log, print out in which board the test failed, so it
is easier for developers, so they don't need to scroll up to the
beginning of the batch to see it.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-08 11:38:58 -05:00
Pieter De Gendt
c7e7f6be24 doc: releases: migration: 4.4: Add shell_set_bypass update
Add an entry for the shell API change for shell_set_bypass.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-08 09:39:05 -05:00
Pieter De Gendt
d7cd700ad0 tests: shell: Add shell_set_bypass test
Add a test to the shell testsuite for validating shell_set_bypass.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-08 09:39:05 -05:00
Pieter De Gendt
3695b2c0ca shell: Add user data argument to shell_set_bypass
Allow passing some context to the shell bypass callback function by
providing a void pointer user data argument.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-08 09:39:05 -05:00
Arunprasath P
7a975accfd tests: dma: microchip: Add board overlay file
Add board overlay file for pic32cx_sg41_cult to enable dma
test cases to run on this board

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-08 09:38:40 -05:00
Arunprasath P
62e36f45bb tests: dma: microchip: Add board overlay file
Add board overlay file for pic32cx_sg61_cult to enable dma
test cases to run on this board

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-08 09:38:40 -05:00
Arunprasath P
5a05889c92 boards: microchip: pic32cx_sg41_cult: add DMA to supported list
Update pic32cx_sg41_cult.yml to include DMA in the supported
features list.
Also enable the DMA controller node in pic32cx_sg41_cult.dts.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-08 09:38:40 -05:00
Arunprasath P
959edb5c3c boards: microchip: pic32cx_sg61_cult: add DMA to supported list
Update pic32cx_sg61_cult.yml to include DMA in the supported
features list.
Also enable the DMA controller node in pic32cx_sg61_cult.dts.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-08 09:38:40 -05:00
Arunprasath P
2cedc2d8cf dts: arm: microchip: add DMA node for PIC32CX-SG family devices
Add DMA controller node to enable DMA G1 driver
support on PIC32CX-SG devices.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-08 09:38:40 -05:00
Arunprasath P
66de8afef2 soc: microchip: pic32cx_sg: add DT helper file
Add DT helper file for PIC32CX-SG family devices to support
SoC-specific device tree definitions and utilities.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-12-08 09:38:40 -05:00
Markus Becker
ef5495afa8 net: ocpp: readonly is a bool.
GetConfiguration.conf read_only is a bool according to https://openchargealliance.org/wp-content/uploads/2025/04/OCPP_1.6_documentation.zip.

The Python OCPP implementation reports an error if read_only is reported as an integer: ae716a1507/ocpp/v16/datatypes.py (L73)

Signed-off-by: Markus Becker <markushx@gmail.com>
2025-12-08 09:38:26 -05:00
Seppo Takalo
c4c2c61ccd samples: net: cellular_modem: Remove nRF9160DK examples
Remove nRF9160DK examples from Zephyr's cellular modem sample as
these use nRF91 as an external modem and the pin configuration
heavily depends on the build target.

Therefore we would like to host and document our own examples
within our own repository with the Serial Modem application.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-08 09:38:01 -05:00
Zhaoxiang Jin
c8e20fd5ef drivers: timer: cortex_m_systick: fix counter wrap detection in LPM
Improve the logic for detecting counter wrap-around events when exiting
low power mode.

Add idle_timer_alarm_ticks variable to track alarm configuration at LPM
entry. Implement comprehensive wrap detection that considers:
- Counter overflow (pre > post)
- Alarm pending with same pre/post values
- Alarm pending when pre + alarm_ticks would exceed counter top value

This ensures accurate time calculation across all counter wrap scenarios
during low power mode transitions.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-08 09:37:52 -05:00
Farsin Nasar V A
8f92aca133 boards: microchip: sam_e54_xpro: add hwinfo to supported list
- Update sam_e54_xpro.yaml to reflect G1 hwinfo support on the board.

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-08 09:37:31 -05:00
Farsin Nasar V A
3ea5ce2a47 drivers: hwinfo: microchip: Add hardware info driver
- Add new hardware info driver for Microchip G1 series.
- Update Kconfig and CMakeLists.txt to support the new driver.

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-08 09:37:31 -05:00
Farsin Nasar V A
61714f9f4b dts: arm: microchip: samd5xe5x: Add HWINFO node and binding
- Added hwinfo node in the samd5xe5x.dtsi file.
- Added device tree binding file for Microchip HWINFO G1.

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-08 09:37:31 -05:00
Gerson Fernando Budke
60518617d8 dts: arm: microchip: samd5xe5x: Fix rstc node
The hwinfo driver should build inconditionally. It checks if the rstc
node is present and when CONFIG_HWINFO=y is selected by the user the
rstc information will be available. The fallback mechanism will provide
a weak implementation for all APIs that are not available.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2025-12-08 09:37:31 -05:00
BUDKE Gerson Fernando
5d6e4d9469 west.yml: Bump TF-M with stm32u5a sram5 support
Enable SRAM5 region in the Global TrustZone controller (GTZC).

Signed-off-by: BUDKE Gerson Fernando <gerson.budke@leica-geosystems.com>
2025-12-08 09:37:00 -05:00
Ahmad Atoof
82fa487cca modbus: client: change 'EXNO' to '-EIO'
Fix error in Modbus client write response validation.

Signed-off-by: Ahmad Atoof <aat@trackunit.com>
2025-12-08 09:36:42 -05:00
Shreyas G Khanapur
b41ea1748d modules: hal_infineon: Fix build failure for CYT4BFC 320 BGA pin package
The CMakeLists.txt file in the MTB HAL CAT1 module incorrectly appended
a '.c' extension to the source file reference for the 320 BGA pin package,
causing a build error.

Remove the extraneous '.c' extension to
correctly reference cyhal_xmc7200_320_bga.c.

Fixes #100523

Signed-off-by: Shreyas G Khanapur <ShreyasG.Khanapur@infineon.com>
2025-12-08 09:35:01 -05:00
Nikodem Kastelik
67f3201aba drivers: hwinfo: nrf: fix missing reset reasons for nRF5340 Network
Incorrect symbols were used for detecting nRF5340 Network-specific
reset reasons presence.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2025-12-08 09:34:44 -05:00
Thomas Decker
69a6f24821 drivers: serial: uart_stm32: Fix typo in LOG_ERR string
Change "Could not enable (LP)UART clock" to "[...] disable [...]" when
clock_control_off() fails.

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2025-12-08 09:34:35 -05:00
Mark Wang
3b23c76a24 bluetooth: a2dp: Fix function name in documentation comments
Update documentation comments to reference the correct function name
'bt_a2dp_register_ep' instead of the outdated
'bt_a2dp_register_endpoint' in SBC endpoint macro descriptions.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-12-08 06:15:20 -05:00
Mark Wang
6e9eda8e1c bluetooth: a2dp: Replace manual loop with ARRAY_FOR_EACH macro
Replace the manual for loop with the ARRAY_FOR_EACH macro for better code
consistency.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-12-08 06:15:20 -05:00
Jukka Rissanen
32059d7414 usb: next: Change to use network namespaced APIs
Do not use POSIX symbols directly but use network namespaced
APIs instead.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-08 06:15:04 -05:00
Jukka Rissanen
c52c206e26 usb: legacy: Change to use network namespaced APIs
Do not use POSIX symbols directly but use network namespaced
APIs instead.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-08 06:15:04 -05:00
Filip Stojanovic
8622bbb84c boards: frdm_imx93: Add support for the M33 core
Add support for the real-time M33 core on the FRDM-IMX93 board.

Signed-off-by: Filip Stojanovic <filipembedded@gmail.com>
2025-12-08 06:14:49 -05:00
Ruoshan Shi
9e0c0c1ce0 boards: nxp: update shield of 7inch DSI LCD(C) for FRDM_IMX93
Updated the display driver controller to waveshare_dsi2dpi

Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com>
2025-12-08 06:14:31 -05:00
Ruoshan Shi
9f5310960e drivers: display: add waveshare dsi2dpi display bridge support
Replace the waveshare_dsi_lcd panel with the waveshare_dsi2dpi
display bridge.

Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com>
2025-12-08 06:14:31 -05:00
Emil Gydesen
ca085cee3c tests: Bluetooth: Tester: Enable CAP commander and handover
Enable the CAP Commander role for the BT tester. This will
help pass some TMAP and GMAP tests that require the CAP
Commander to be enabled.

The actual implementation of the tests related to the
CAP commander is not implemented.

TMAP also requires that handover is supported if we
support both unicast and broadcast, so enable the config
for now. Support for the handover tests will follow in
a separate commit.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-08 06:14:17 -05:00
Axel Utech
ae69e60dad drivers: spi: sam: Fix configuring with more than 4 chip selects
If spi_sam_configure() is called with more than 4 chip selects the
current check fails even if the pins are used as gpios. The variable
spi_csr_idx already has the correct index to be checked and must be
used in this check.

Signed-off-by: Munawar Ali <ali@sofiha.de>
Signed-off-by: Axel Utech <utech@sofiha.de>
2025-12-08 06:14:08 -05:00
Jordan Yates
6fe6a8bbb4 modules: tfm: don't pad unconfirmed image
If the image is not confirmed, there is no need to pad the entire flash
slot with empty data. This reduces the size of
`tfm_s_zephyr_ns.signed.bin` (the file actually sent for an OTA upgrade)
from 100% of the slot size down to the size of the application.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-08 06:13:58 -05:00
Mario Paja
caf11a5ece dts: st: h5: set sai default clock configuration
This change sets SAI clock to its default configuration

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-12-08 06:13:46 -05:00
Mario Paja
b2098af1f5 boards: st: nucleo_h563zi: fix PLL clocks
These changes fix PLL clocks of nucleo_h563zi board

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-12-08 06:13:46 -05:00
Thomas Decker
6b14321635 tests: cmake: app_version: fix include app_version.h
Fix include of app_version.h (see PR #63973).

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2025-12-08 06:13:34 -05:00
Thomas Decker
0b4e13e77f soc: silabs: silabs_s2: fix include app_version.h
Fix include of app_version.h (see PR #63973).

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2025-12-08 06:13:34 -05:00
Thomas Decker
06ba1ed88e shell: modules: app_version_service: fix include app_version.h
Fix include of app_version.h (see PR #63973).

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2025-12-08 06:13:34 -05:00
Thomas Decker
296dd3993e doc: build: version: update include path to app_version.h
Update include path note for app_version.h to match changes from PR #63973

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2025-12-08 06:13:34 -05:00
Alexandre Rey
d0e8180e60 soc: nxp: fix DISABLE_WDOG value if WDT is not disabled at boot
If CONFIG_WDT_DISABLE_AT_BOOT is not defined (i.e. WDT should be enabled
at boot), DISABLE_WDOG should be 0 (disabled).

Signed-off-by: Alexandre Rey <alx.rey@icloud.com>
2025-12-08 06:13:00 -05:00
Ren Chen
7654e3a4ed soc: it8xxx2: block idle if timer is close to expiration
If the event timer or free-run timer is close to expiration when
system enters idle with I2C target DMA mode enabled, the memory
and CPU clocks may become unsynchronized after wakeup. This
causes CPU to fetch incorrect data and eventually trigger SoC
watchdog timeout.

Due to this hardware limitation, SoC should skip entering idle
mode if the remaining timer value is less than 150µs(safe margin).

Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
2025-12-08 06:12:16 -05:00
Jukka Rissanen
e2fa01d2c1 drivers: ethernet: intel_igc: Use net namespaced APIs
One POSIX symbol was not converted to network namespaced API.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-08 06:12:04 -05:00
Jukka Rissanen
9fe1570117 tests: net: all: Compile test NET_CANBUS
Enable CONFIG_NET_CANBUS and make sure the code enabling it
compiles ok.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-08 06:12:04 -05:00
Jukka Rissanen
83e3825654 drivers: net: canbus: Use network namespaced APIs
Use network namespaced APIs instead of POSIX symbols.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-12-08 06:12:04 -05:00
Krzysztof Chruściński
18a42741fa manifest: Update segger with enabling DT sections
Update segger with a change in SEGGER_RTT_Conf.h that allows to use
DT memory section for RTT data.

Added help section to SEGGER_RTT_SECTION_CUSTOM_DTS_REGION Kconfig
explaining what alias need to be added to DTS.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-08 06:11:51 -05:00
Bjarki Arge Andreasen
8bd82dce88 nordic: nrf54h: bicrgen: patch lfosc lfxo accuracy parsing
The accuracy field of lfocs lfxo is incorrectly parsed from the SVD
file. Instead of stripping the "ppm" from the value before converting
it to an int, we are taking only the first three digits. This works
for 500ppm, but not for 20ppm.

Patch to strip last three digits instead.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-08 06:11:35 -05:00
Josuah Demangeon
3c900b7023 boards: doc: index: fix list indentation
The RST syntax for list requires indentation on the second line
or the list is not detected.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-12-08 06:11:24 -05:00
Josuah Demangeon
a14cf9fbc0 boards: doc: index: do no mix minicom and screen instructions
Remove minicom-related instructions when screen is used as demo.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-12-08 06:11:24 -05:00
Camille BAUD
84ea7a3d53 boards: ai_m61_32s_kit: fix wrong values and supported test
Input the wrong number in flash size, also should not run display tests

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-08 06:11:09 -05:00
Sam Friedman
5d52e10671 net: coap_client: remove lwm2m from blocksize kconfig option
The block-wise transfer block size is not specific to LWM2M.

Signed-off-by: Sam Friedman <sam@golioth.io>
2025-12-08 06:10:47 -05:00
Pete Johanson
3ea2951bc0 tests: subsys: secure_storage: Erase flash before write once test
Where possible (i.e. not running in NS), erase the flash before testing the
write once secure storage API.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2025-12-07 21:22:39 -05:00
Mario Paja
6795a795c8 dt-bindings: dma: stm32 introduce 32bit transfer macro
This change introduces 32bit DMA tranfer macro

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-12-07 21:20:06 -05:00
Mario Paja
9065e7b019 drivers: i2s: stm32 sai enable dma data size config
This change enables the user to configure SAI DMA data size.

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-12-07 21:20:06 -05:00
Sreeram Tatapudi
5ecf248ba3 drivers: infineon: Drop cat1 from the files names
Drop cat1 from the file names to enable reuse by other
category devices as well

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-12-07 21:19:38 -05:00
Sreeram Tatapudi
46fed1ec88 MAINTAINERS: Update the infineon driver file pattern
All the drivers are renamed as part of
https://github.com/zephyrproject-rtos/zephyr/issues/99174
Updating the pattern to support the new driver names

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-12-07 21:19:38 -05:00
Jordan Yates
76c5084943 sensor: current_amp: fix incorrect PM error
Returning `-ENOTSUP` (and logging a `LOG_ERR`) is not the correct
behaviour if there is no enable GPIO. The fact there was no work to do
does not make the result an error.

From the docs for `pm_device_runtime_get`
```
 * @retval 0 If it succeeds. In case device runtime PM is not enabled or
 *  not available this function will be a no-op and will also return 0.
```

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-07 21:19:04 -05:00
Chun-Chieh Li
ff3284fcc1 tests: i2c: i2c_target_api: support numaker_m3334ki board
Add support for Nucoron NuMaker-M3334KI board

To run the test, check board overlay file for I2C wiring

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-06 15:50:35 -05:00
Chun-Chieh Li
6fb261c655 drivers: i2c: support nuvoton m333x series
Add support for Nuvoton M3331 series SoC

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-06 15:50:35 -05:00
Josuah Demangeon
8212b0835b soc: microchip: mec: add missing GPIO reg include in soc.h
Complement #99761 that added register includes to too few files.
Fix build error for some boards using these SoCs.

Signed-off-by: Josuah Demangeon <josuah.demangeon@nordicsemi.no>
2025-12-06 15:50:03 -05:00
Anas Nashif
021fd07448 Revert "scripts: checkpatch: fix missing blank line detection"
This reverts commit c310133b3e.

randomly asking for Missing a blank line after declarations.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-06 11:41:00 -05:00
Michael Smorto
5b05d649d0 drivers: video: Changed common registers to OV767X
Updated register tables to use use OV767X.

Signed-off-by: Michael Smorto <CyberMerln@gmail.com>
2025-12-06 11:40:08 -05:00
Michael Smorto
7ac0dc47bc drivers: video: Add OV7675 changes to OV767x
Adds support for the ov7675 camers.

Signed-off-by: Michael Smorto <CyberMerln@gmail.com>
2025-12-06 11:40:08 -05:00
Michael Smorto
2ffdb90223 drivers: video: Changes the driver name to ov767x.c
Changes the driver name to ov767x.

Signed-off-by: Michael Smorto <CyberMerln@gmail.com>
2025-12-06 11:40:08 -05:00
Michael Smorto
0d5c6aa074 drivers: video: Update OV7670 to use generic ov767x functions
Minimal changes to OV760 drive to use generic ov767x structures.
- This includes changes to function names.
-  Includes changes to defines as necessary.
-  Deleted camera_id as no longer required

Signed-off-by: Michael Smorto <CyberMerln@gmail.com>
2025-12-06 11:40:08 -05:00
Michael Smorto
a6311c5377 drivers: video: Restructure OV760.c driver before adding OV7675 support
Modifications for use of video cci helpers in video_common.h.

Signed-off-by: Michael Smorto <CyberMerln@gmail.com>
2025-12-06 11:40:08 -05:00
Chen Xingyu
6082b0cfce boards: m5stack: cores3: Add bus_out and usb_otg fixed regulators
Add two fixed-regulator nodes to model the load switches on the M5Stack
CoreS3 that control 5V output to the M-Bus/Grove connectors and the USB
VBUS line.

- `bus_out_reg`: controls the BUS_OUT 5V rail (BUS_OUT_EN).
- `usb_otg_reg`: controls USB VBUS output (USB_OTG_EN).

The BUS_OUT regulator is enabled by default to match the behavior of
existing M5Stack boards. USB_OTG remains disabled by default, since
ESP32-S3 does not currently support USB host mode.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-12-06 11:39:58 -05:00
Chen Xingyu
bb678c1acf boards: m5stack: cores3: Add bus_5v fixed regulator
Add a `bus_5v` fixed-regulator node driven by the `BOOST_EN` pin. This
enables drivers and shields to reference the 5V supply through the standard
`vin-supply` property, providing correct power sequencing and runtime
control via Zephyr’s regulator API.

This regulator is equivalent to the `bus_5v` already defined on the M5Stack
Core2 board.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-12-06 11:39:58 -05:00
Guowei Li
83cfbc634f drivers: intc: gicv3: add ARM AArch32 affinity comparison
This commit introduces a new comparison for the ARM (AArch32) architecture
in the GICv3 interrupt controller.
It specifically compares the lower 24 bits of the affinity values,
because there is no aff3 in AArch32 or Arm-v7.

Signed-off-by: Guowei Li <15035660024@163.com>
2025-12-06 11:39:38 -05:00
Lucien Zhao
98673d0aad scripts: ... :edtlib.py: update edtlib.py to generate some warning messages
During the actual development process, it was discovered that the
controller/device' would describe the bus type in the binding. However,
when the two sides did not match, the generated process would not be
affected and there were no any prompts. This made it very difficult for
developers to identify the problem.

I've updated the implementation to:
1. Add a `warn_bus_mismatch` kwarg to `edtlib.EDT()` constructor
   (default: False)
2. Add a `--warn-bus-mismatch` flag to gen_edt.py
3. Only show the warning when explicitly opted in
4. Add some checks in the edtlib. When the bus type of the node
   does not match the binding requirements, provide some auxiliary
   judgment information:
     a. bus position of the node
     b. available binding types
     c. expected binding type.

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-06 11:39:17 -05:00
Jacky Lee
f2ab79278e driver: spi: egis_et171_spi supports clock driver
Allows "egis_et171_spi" to use basic clock information
provided by the clock driver to calculate the runtime
SPI frequency.

Signed-off-by: Jacky Lee <jacky.lee@egistec.com>
2025-12-06 11:39:09 -05:00
Srikanth Boyapally
d784a95c5c spi: cdns: Add support for slave transfers exceeding FIFO depth
Enable slave mode to handle transfers larger than FIFO depth (128 bytes)
by implementing dynamic TX threshold management.

Signed-off-by: Srikanth Boyapally <srikanth.boyapally@amd.com>
2025-12-06 11:38:51 -05:00
Srikanth Boyapally
4b75597786 spi: cdns: Fix unreliable RX not empty detection with software counter
The Cadence SPI controller has a hardware issue (Xilinx AR#65885
contains more details) where the RX_NOT_EMPTY (RNE) status bit
reports inconsistent state. This causes the driver to unreliably
detect when RX FIFO contains valid data, leading to transfer
failures and test hangs.

Signed-off-by: Srikanth Boyapally <srikanth.boyapally@amd.com>
2025-12-06 11:38:51 -05:00
Jamie McCrae
356f992f68 sysbuild: cmake: Only touch empty conf file if it does not exist
Prevents a random occurance whereby sysbuild reconfigures itself
after a reconfiguration for no known discernable reason

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2025-12-06 11:38:41 -05:00
Scott Worley
5dd9e8cd59 tests: drivers: gpio: Add MEC boards to three GPIO driver tests
We added Microchip MEC15xx, MEC172x, MEC174x, and MEC175x evalutaion
boards to the GPIO driver gpio_basic_api, gpio_api_1pin, and
gpio_get_direction tests.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-12-06 11:38:34 -05:00
Scott Worley
cd6d7c9515 drivers: gpio: microchip: mec: One common driver for all MEC parts
Microchip MEC parts have a similar GPIO peripheral block. We
create a unified driver for all parts. NOTE: MEC GPIO interrupt
detection sets active status when changed from interrupt detect
disabled to any enabled mode. Driver ISR and interrupt configuration
implementation includes work-arounds for this issue.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-12-06 11:38:34 -05:00
Jamie McCrae
546adfa555 scripts: snippets: Use temp buffer and only output on change
Stores data to output in a temporary buffer and only outputs data
to a file if the data is different to the file's existing data
(assuming it exists). This prevents a random occurance whereby
sysbuild reconfigures itself after a reconfiguration for no known
discernable reason

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2025-12-06 11:38:26 -05:00
Simon Maurer
ca71da8a85 arch: arm, arm64: linker: place .ARM.{extab, exidx} sections in rodata
The .ARM.extab and .ARM.exidx sections are now mapped under the
zephyr_rodata MMU region, ensuring they remain accessible at runtime.
These sections contain unwind information required for C++ exception
handling, so they must reside in readable memory.

Fixes #96070

Signed-off-by: Simon Maurer <mail@maurer.systems>
2025-12-06 11:38:18 -05:00
Biwen Li
0e46139300 tests: arch: arm: irq_advanced_features: fix build issue
This commit fixes build issue when multi level interrupts feature
is enabled, define new macro TEST_1ST_LEVEL_INTERRUPTS_MAX to
support multi level interrupts case.
  - error: array subscript 24 is above array bounds of 'volatile
    uint32_t[16]' {aka 'volatile unsigned int[16]'}
    [-Werror=array-bounds])

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-06 11:38:08 -05:00
Biwen Li
0ea051a433 tests: arch: arm: custom_interrupt: fix build issue
Fix build issue when multi level interrupts is enabled,
define new macro TEST_1ST_LEVEL_INTERRUPTS_MAX to support multi
level interrupts case.
  - core_cm33.h:2559:47: error: iteration 496 invokes undefined behavior
    [-Werror=aggressive-loop-optimizations]

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-06 11:38:00 -05:00
Zackery Backman
248151624d doc: develop: manifests: external: add wolfSSH
Add documentation to external module section for adding wolfSSH to Zephyr

Signed-off-by: Zackery Backman <backman23@live.com>
2025-12-06 11:37:53 -05:00
Peter van der Perk
084f2a1dda drivers: pwm: Fix prescaler 256 overflow and get cycles
Setting a prescaler of 256 would overflow the uint8_t.
Also get cycles calculation was wrong.

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-12-06 11:37:45 -05:00
Benjamin Cabé
0a24a7f90b doc: _extensions: adjust link-roles regex to be non-greedy
Currently, if the role is used like this: :zephyr_file:`blah <link>`
the regex for the link text group is greedy and captures "blah " (note
trailing space). This is incorrect and causes the link to render poorly.
Make regex non-greedy.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-06 11:37:37 -05:00
Mathieu Choplain
681db7c1cc cmake: linker_script: arm: place IDT_LIST where ld linker script does
Instead of mirroring the ld linker script, the CMake Linker Generator for
ARM was placing the IDT_LIST region right after the Zephyr SRAM. While this
may work fine in most cases, this scheme leads to build errors on some SoCs
such as STM32WBxx, where there are multiple RAM banks that are contiguous
but split over multiple `zephyr,memory-region`s: in such scenarios, the
IDT_LIST region will overlap with one of these `zephyr,memory-region` and
cause a build failure.

Mimic the IDT_LIST placement found in ld linker script to avoid this issue,
except that the region start address is aligned: 0xFFFF8000 instead of
0xFFFF7FFF. This is required by `gen_isr_tables.py` which otherwise errors
out due to finding one more byte than expected in the .intList section.
(The exact reason is not clear, but aligning the region fixes the issue)

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-06 11:37:31 -05:00
Lingao Meng
409e1277b6 kernal: work: Use Z_WORK_DELAYABLE_INITIALIZER replace dup code
Use `Z_WORK_DELAYABLE_INITIALIZER` replace duplicate init code.

Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
2025-12-06 11:37:21 -05:00
Alexandre Rey
2bc15b4532 drivers: i2s: mcux_sai: correct DMA burst length
Set DMA burst length in bytes.
Fixes a bug introduced in #97777.

Signed-off-by: Alexandre Rey <alx.rey@icloud.com>
2025-12-06 07:13:05 -05:00
Hake Huang
2c2922fb09 boards: nxp: frdm_ke16z: New board with 64kB device added
SOC_MKE16z4 and MKE15z4 (64kB, 48MHz) is now supported by DT
LPFLL clock option with proper frequency select
dts: nxp_ke1xz64.dtsi added.
Tested on board: frdm_ke16z

Signed-off-by: Michael Galda <michael.galda@nxp.com>
Signed-off-by: Hake Huang <hake.huang@nxp.com>
2025-12-06 07:12:52 -05:00
Hake Huang
68937acbb8 soc: nxp: kinetis: ke1xz: add LPFLL clock support to SCG
LPFLL (soc: scg: "lpfll_clk") clock source can be now selected
in KE1xz Device tree (nxp_ke1xz.dtsi., board.dts or overlay)
Tested on boards: frdm_ke15z, frdm_ke17z, frdm_ke17z512

Signed-off-by: Michael Galda <michael.galda@nxp.com>
Signed-off-by: Hake Huang <hake.huang@nxp.com>
2025-12-06 07:12:52 -05:00
Hake Huang
3c87d0862b dts: arm: nxp: nxp_ke1xz.dtsi: tsi0 & tsi1 nodes added
TSI (Touch Sensing IP) is now supported by DT
for the Kinetis KE1x family
dts: nxp_ke1xz, nxp_ke17z and nxp_ke17z512.dtsi
Tested on freedom boards

Signed-off-by: Michael Galda <michael.galda@nxp.com>
Signed-off-by: Hake Huang <hake.huang@nxp.com>
2025-12-06 07:12:52 -05:00
Hake Huang
00e5a399cc drivers: clock_control: kinetis scg support
add driver and dts-binding for kinetis_scg driver
used on ke1xz

Signed-off-by: Hake Huang <hake.huang@nxp.com>
Signed-off-by: Michael Galda <michael.galda@nxp.com>
2025-12-06 07:12:52 -05:00
Yves Wang
31311c4023 tests: drivers: watchdog: Enable basic api test for frdm_mcxc444
Enable wdt_basic_api for frdm_mcxc444.
Couple callback testcases with CONFIG_HAS_WDT_NO_CALLBACKS.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-12-06 07:12:45 -05:00
Yves Wang
2ea83f42c9 boards: nxp: frdm_mcxc444: Enable watchdog cop
Enable cop for zephyr watchdog.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-12-06 07:12:45 -05:00
Yves Wang
9d76a637f9 drivers: watchdog: cop: ignore unused parameter
In install timeout api, the cfg parameter does not make sense to cop, we
can ignore it rather than return an error code to keep forward
compatibility.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-12-06 07:12:45 -05:00
Badr Bacem KAABIA
c8d9011925 drivers: adc: mcux_adc16: Fix buffer size check for multi-channel reads
The mcux_adc16 driver's read function fails to validate the user-provided
buffer size when `adc_sequence.options` are used (extra samplings).

The calculation erroneously considered only the size required for one
channel, neglecting the total number of channels in the sequence.

This leads to a **buffer overflow** when reading multiple channels.

Fix this by using `POPCOUNT(sequence->channels)` to determine the
correct channel count and ensure the buffer size is sufficient.

Signed-off-by: Badr Bacem KAABIA <badrbacemkaabia@gmail.com>
2025-12-06 07:12:36 -05:00
Kate Wang
e5234d4e32 boards: shield: Update shield support for zc143ac72mipi
The zc143ac72mipi panel can only accept update area
that has even size and coordinates, so the panel
driver was updated to maintain a buffer to collect
all dirty areas. This buffer shall have address and
pitch alignments which compliant to the board's display
driver's requirement, and can be placed outside of ram.
Update the board specific overlay to add such configurations.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-06 07:12:26 -05:00
Kate Wang
1527cd506a drivers: display: display_co5300: Update panel driver
1. Fix wrong backlight pin in driver overlay
2. Remove the power-on pin configuration in code and binding, and
add mipi display panel regulator in panel overlay instead. Set
regulator-boot-on' to true means the power-on pin will be enabled
uring system boot.
3. Remove 'last_known_framebuffer' from panel data structure. It is
not used anywhere
4. Fix bug in 'co5300_set_pixel_format' function.
5. Fix the issue that the panel does not support start coordinates
   and the width/height of the updated area being odd value.
   Solution: In panel driver, maintain a full screen-sized buffer,
   its address and pitch alignment is configurable in device tree
   and shall be compliant with the display controller's requirements.
   It can be placed in RAM or if the RAM space is not enough it can
   also be placed in other memory resion. When there is a frame
   update request, the updated area will be first filled to the
   buffer, if the area's size or coordinate is odd, adjust the value
   so the real updated area covers the requested updated area, then
   use this buffer to send pixel to panel, this can ensure the
   updated area's size and coordinate are always even.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-06 07:12:26 -05:00
Kate Wang
3768890460 samples: lvgl: Add board specific configuration for mimxrt700_evk
The mimxrt700_evk uses DC8000 to drive panel which requires a 64
byte align of buffer address and stride.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-06 07:12:26 -05:00
Kate Wang
79182d2d38 samples: drivers: display: Add user configuration
Add user configuration of buffer address alignment and update area pitch
alignment.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-12-06 07:12:26 -05:00
Patryk Koscik
4e21fc26fa dts: nxp: mcxn94x: Add SoC compatible
Add SoC-level compatible string to the nxp_mcxn94x_common DT file.

Signed-off-by: Patryk Koscik <pkoscik@antmicro.com>
2025-12-06 07:11:33 -05:00
Jiafei Pan
b4476dbfdb boards: imx95_evk_15x15: add netc ethernet support
Added NETC ethernet support on i.MX 95 15x15 EVK board, enlarged
memory size to be 10M accordingly.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-12-06 07:11:24 -05:00
Jiafei Pan
da64db64ad boards: imx95_evk_15x15: add jlink runner support
Added J-Link runner to support west debug and west flash.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-12-06 07:11:24 -05:00
Thomas Hebb
e1b6de46d2 soc: nxp: imxrt: Initialize FlexRAM before first stack use
If the stack is in ITCM, DTCM, or FlexRAM OCRAM, flexram_dt_partition()
may change its contents. The comment on flexram_dt_partition()
acknowledges that, stating that it's inlined because it "cannot use
[the] stack". But we currently call SystemInit(), which is not inlined
and does use the stack, prior to flexram_dt_partition()! Fix that issue
by reordering the calls.

It seems to me that flexram_dt_partition() would be safer as a
soc_early_reset_hook implemented in assembly, but this fix does work for
the moment. Tested on an i.MX RT1061, with the stack in FlexRAM OCRAM
and entering Zephyr with all FlexRAM allocated to ITCM and DTCM.

Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2025-12-06 07:10:57 -05:00
Thomas Hebb
799ac970d4 soc: nxp: imxrt: Initialize FlexRAM before first stack use
If the stack is in ITCM, DTCM, or FlexRAM OCRAM, flexram_dt_partition()
may change its contents. The comment on flexram_dt_partition()
acknowledges that, stating that it's inlined because it "cannot use
[the] stack". But we currently call SystemInit(), which is not inlined
and does use the stack, prior to flexram_dt_partition()! Fix that issue
by reordering the calls.

It seems to me that flexram_dt_partition() would be safer as a
soc_early_reset_hook implemented in assembly, but this fix does work for
the moment. Tested on an i.MX RT1061, with the stack in FlexRAM OCRAM
and entering Zephyr with all FlexRAM allocated to ITCM and DTCM.

Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2025-12-06 07:10:57 -05:00
Yangbo Lu
216695e91b drivers: eth_nxp_imx_netc: fix wrong irq_lock area in netc_eth_rx
The irq_lock area including net_pkt_rx_alloc_with_buffer() was causing
error "Context switching while holding lock!".
Actually we didn't have any hardware access to protect in netc_eth_rx,
so just removed irq_lock.

Fixes #99694

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-06 07:10:46 -05:00
Neil Chen
7e963a07e0 boards: nxp: frdm_mcxa344: Support lptmr for NXP frdm_mcxa344 board
Support lptmr for NXP frdm_mcxa344 board.
Test using tests/drivers/counter/counter_basic_api.

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-12-06 07:10:32 -05:00
Neil Chen
b5b1a14316 boards: nxp: frdm_mcxa344: Support ctimer for NXP frdm_mcxa344 board
Support ctimer for NXP frdm_mcxa344 board.
Test using tests/drivers/counter/counter_basic_api.

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-12-06 07:10:32 -05:00
Holt Sun
3f0320cf19 boards: frdm_mcxe247: Add RTC support
Enable and configure RTC clock source for the
FRDM-MCXE247 board.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-06 07:10:11 -05:00
Holt Sun
b045e8fdc0 samples: counter: alarm: add nxp_rtc support.
Enable nxp_rtc device for sample counter alarm.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-06 07:10:11 -05:00
Charles Hardin
5c70e93afd drivers: pwm: stm32: change the order of deadtime and enable all timers
For stm32h7 the order matters to get the pwm to output the values as
expected. As reported for the the H730 doesn't produce PWM output when
the LL_TIM_OC_SetDeadTime is called after LL_TIM_EnableAllOutputs. So,
switch the order of the calls and this doesn't impact the stm32f413zh
boards.

Signed-off-by: Charles Hardin <ckhardin@gmail.com>
2025-12-06 07:10:01 -05:00
Peter Robinson
8e79423f74 samples: net: openthread: coprocessor: Add nrf52840dongle config
Add a config for the nrf52840dongle to use the CDC_ACM interface
for the ot_uart. Without this building the OpenThread coprocessor
fails to build when using the nrf52840 dongle because the UART
isn't defined so fix it.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2025-12-06 07:09:50 -05:00
Pieter De Gendt
3b730a20ae doc: releases: 4.4: Add COND_CASE_1 entry
Add a Sys section, with an entry for the COND_CASE_1 macro.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-06 07:09:38 -05:00
Pieter De Gendt
2a5dc8cd94 doc: releases: 4.4: Align bullet lists
Use 2 spaces indents for bullet lists.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-06 07:09:38 -05:00
Daniel Leung
8053d7793f tests: shell: also build UART shell for coverage
This enables building the UART shell alongside with the UART
backend test. The UART shell source file was not built in CI
before this, so this will provide build coverage.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-12-05 15:00:13 -05:00
Camille BAUD
fac6d51550 doc: releases: Fix renamed boards and add new entry
fix ai_wb2,m62 add m61

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-05 14:56:03 -05:00
Camille BAUD
71f784a7b5 boards: bflb: Introduce ai_m61_32s_kit
Introduce the top tier version of BL618 from aithinker, with the PSRAM

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-05 14:56:03 -05:00
Camille BAUD
8cd91f3b76 dts: bindings: vendor-prefixes: Add XMC
Add prefix for XMC Wuhan Xinxin Semiconductor Manufacturing Co

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-05 14:56:03 -05:00
Camille BAUD
8a54f73c5a boards: dt_xt_zb1_devkit: clear up module/board confusion
Clears module and board being confused

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-05 14:56:03 -05:00
Camille BAUD
a927634c16 boards: ai_wb2_12f: clear up module/board confusion
Clears module and board being confused

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-05 14:56:03 -05:00
Camille BAUD
3cd6671f05 boards: ai_m62_12f: clear up module/board confusion
Clears module and board being confused

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-05 14:56:03 -05:00
Guillaume Gautier
b73feddf6e tests: drivers: spi: loopback: change duration scaling
Increase the duration scaling for two boards that were causing some tests
to fail.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-05 14:55:32 -05:00
Guillaume Gautier
fbb2848ef2 drivers: spi: stm32: fix spi rtio with fifo-enable
This commit fixes the SPI RTIO transfers when the fifo-enable property is
enabled.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-05 14:55:32 -05:00
Guillaume Gautier
133da1c017 drivers: spi: stm32: extend data size support
Extend the number of SPI data sizes supported for series that allow it.
The driver uses the new property st,stm32-data-width to create a table
with all compatible data widths and to check if the SPI instance
support the required width (some instances may have a limited set
of widths compared to others on the same SoC).

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-05 14:55:32 -05:00
Guillaume Gautier
f91258d17e drivers: spi: stm32: invert ll_func_spi_dma_busy logic
Inverts ll_func_spi_dma_busy logic so that the function returns true if
the SPI DMA is busy (as suggested by the name) instead of the other way
around.
Also completes the check for H7-compatible with the LL_SPI_IsActiveFlag_EOT
function when transfer size is set.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-05 14:55:32 -05:00
Guillaume Gautier
21950ef873 dts: arm: st: add st,stm32-data-width property for all spi instances
Addd st,stm32-data-width property for all STM32 SPI instances.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-05 14:55:32 -05:00
Guillaume Gautier
e20076c2c7 dts: bindings: spi: add st,stm32-data-width property
Adds a new property for STM32 SPI bindings to indicate which data widths
are supported by each SPI instance.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-05 14:55:32 -05:00
Yassine Safraoui
50ebaed6bf drivers: i2c: xmc47_relax_kit: fix clock frequency macro
The xmc47_relax_kit i2c driver is incorrectly using the
I2C_SPEED_STANDARD macro to set the clock frequency. The correct macro
to use is XMC4_I2C_SPEED_STANDARD which is defined by the XMC4 driver.

Signed-off-by: Yassine Safraoui <yassine.safraoui@grenoble-inp.org>
2025-12-05 14:55:22 -05:00
Sai Santhosh Malae
b82944ef83 tests: drivers: spi: siwx91x: Enable spi_loopback test for PSRAM board
Add overlay and config files for siwx917_rb4342a
to enable the spi_loopback test.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Sai Santhosh Malae
649e1f6d64 tests: drivers: spi: siwx91x: Adjust transfer scaling factor
Increase CONFIG_SPI_IDEAL_TRANSFER_DURATION_SCALING to
compensate for the additional burst size calculation in
the SPI driver, which slightly increases transfer time.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Sai Santhosh Malae
f8b5b77348 drivers: spi: siwx91x: Guard callback registration
Guard callback registration with CONFIG_SPI_ASYNC to avoid
build error for blocking SPI transfers using DMA

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Sai Santhosh Malae
d4b551b3fb drivers: spi: siwx91x: Swap write and read data inside GSPI controller
Swap the write and read data paths within the GSPI controller to ensure
correct data is seen on the SPI lines during 16-bit transfers.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Sai Santhosh Malae
b6cef6fbf6 drivers: spi: siwx91x: Align mosi_overrun to 32 bytes
Updated mosi_overrun alignment from 4 bytes to 32 bytes to
ensure compatibility with the GPDMA driver. This prevents
alignment-related errors during DMA transfers.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Sai Santhosh Malae
9ebba6821b drivers: spi: siwx91x: Add support for higher burst rates using GPDMA
Enable higher SPI burst sizes when using GPDMA to improve throughput.
Bursts are only enabled when both TX and RX channels use GPDMA and
the SPI clock frequency is at least 10 MHz, as DMA flow control is
unreliable at lower SPI rates.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Sai Santhosh Malae
23c8db4f8c drivers: spi: siwx91x: Add helper to round GSPI freq to valid range
Add gspi_siwx91x_pick_lower_freq() to select the nearest lower
supported GSPI clock frequency based on the requested value.
The GSPI clock can operate only at discrete frequencies such as
80 MHz, 40 MHz, 26.6 MHz, 20 MHz, and so on (80 MHz divided by
integer factors). If the requested frequency does not match one
of these valid steps, it is rounded down to the nearest lower
supported frequency.

The driver now logs both the requested and the actual programmed
frequency along with the divider value, helping users verify the
effective SPI clock configuration.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Sai Santhosh Malae
cbb2fda8d2 drivers: clock_control: siwx91x: Set INTF_PLL_FREQUENCY to 160 MHz
The GSPI and QSPI peripherals run on the interface PLL clock.
To ensure correct operation, the interface PLL frequency should
be set to 160 MHz. This provides a base clock of 80 MHz to the
QSPI peripheral, which matches its required operating frequency.
The GSPI peripheral can continue to operate at higher frequencies
as it receives the full interface PLL clock.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:54:54 -05:00
Bjarki Arge Andreasen
5dec22a5ef tests: drivers: spi: loopback: wait for idle before timed test
Wait a bit before performing timed spi_loopback_transceive() in
test_spi_complete_multiple_timed to ensure the console is idle,
otherwise the console completing and suspending in the "background"
near the end of the spi transaction can introduce latency.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-05 14:54:40 -05:00
Pieter De Gendt
35c8301278 include: zephyr: Replace nested COND_CODE_1 with COND_CASE_1
Update some header files with nested COND_CODE_1 macros to use a single
COND_CASE_1 macro instead.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-05 14:53:57 -05:00
Sai Santhosh Malae
0ceef4fb97 tests: drivers: gpio: Add device runtime PM compatibility
Update the gpio_basic_api test to support device runtime
power management. This ensures the test runs correctly when
runtime PM is enabled on GPIO devices.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:53:49 -05:00
Sai Santhosh Malae
76b1a07c54 drivers: gpio: siwx91x: Implement device runtime PM for GPIO ports
The existing device runtime PM model requires applications to call
pm_device_runtime_get()/put() on the GPIO controller device directly,
which is not ideal when GPIO ports are exposed as child nodes.

This update enables runtime PM at the GPIO port (child node) level,
allowing applications to manage power through the port devices instead
of the top-level controller.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-05 14:53:49 -05:00
Martin Hoff
25362f7228 tests: drivers: comparator: add silabs boards overlays
This patch introduce multiple silabs boards overlay that are needed to
test different ip version of the peripheral.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-05 14:53:35 -05:00
Martin Hoff
62e97eb5a7 dts: arm: silabs: add missing clock on acmp node in xg21 dtsi
Without this clock definition, you will get compilation error
when using acmp device on board that use xg21 SoC.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-05 14:53:35 -05:00
Tim Pambor
373d92ae73 drivers: rtc: rtc_shell: add calibration support
Add `get_calibration` and `set_calibration` subcommands to allow users
to read and modify the RTC calibration settings from the shell.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-05 14:53:27 -05:00
Jamie McCrae
ae2c244486 maintainers: Add nRF boards sub-group and add self as collaborator
Adds a new sub-group to nRF platforms, specifically for board
files, and add myself to this sub-group as a collaborator

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-12-05 11:20:29 -05:00
Jonathan Nilsen
b1c68f53c9 soc: nordic: uicr: Parse pinctrls for local domain peripherals
Generate PERIPHCONF SPU/CTRLSEL entries based on pinctrl properties
on the local domain peripherals as well as the global ones.
This fixes an issue where the required pin configuration was not
generated for the pinctrls on the radio local domain GPIOTE0 on
nrf54h20.

The secure attribute of nodes without an address and without a bus node
are now interpreted as being secure by default, instead of failing with
an error. This prevents the parsing of certain nodes from triggering
failing the build (in particular the 'ieee802154' node in
cpurad_peripherals).

Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
2025-12-05 11:13:03 -05:00
Zafer SEN
3e9f83c196 doc: releases: Document HL78xx modem updates for 4.4
Update migration guide for HL78xx Kconfig option renames and startup
time changes. Add release notes for new AT Shell and AirVantage FOTA
support.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
3e6424de4f sample: hl78xx: Add AirVantage FOTA support
Demonstrate SWIR AirVantage FOTA in the HL78xx sample.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
241fdaa980 drivers: modem: hl78xx: Add AirVantage FOTA support
Sierra Wireless AirVantage FOTA updates in the HL78xx modem driver.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
d2a083c142 drivers: modem: hl78xx: Add AT Shell support
Adds AT shell support, enabling developers to send AT commands directly.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
0124ac6287 drivers: modem: hl78xx: reduce startup_ms and increase init chat timeout
The previous delay could cause missed URCs because the pipe and chat
layer were not yet attached when the modem started sending its first
messages (+KSUP). The modem boot takes ~1.8s, while the driver only
needs ~120ms to set up the interfaces, so reducing the delay ensures
the receiver is ready before the modem outputs any URCs.

Increase hl78xx_init_chat_script command limit from 10 to 100 to allow
longer initialization sequences.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
5caa49c08f drivers: modem: hl78xx: rename timing configs to clarify units
Rename HL78XX device timing configuration options to include units (ms):
- CONFIG_MODEM_HL78XX_DEV_POWER_PULSE_DURATION ->
  CONFIG_MODEM_HL78XX_DEV_POWER_PULSE_DURATION_MS
- CONFIG_MODEM_HL78XX_DEV_RESET_PULSE_DURATION ->
  CONFIG_MODEM_HL78XX_DEV_RESET_PULSE_DURATION_MS
- CONFIG_MODEM_HL78XX_DEV_STARTUP_TIME ->
  CONFIG_MODEM_HL78XX_DEV_STARTUP_TIME_MS
- CONFIG_MODEM_HL78XX_DEV_SHUTDOWN_TIME ->
  CONFIG_MODEM_HL78XX_DEV_SHUTDOWN_TIME_MS

Update MODEM_HL78XX_DEFINE_INSTANCE macro to use *_MS options.

This improves configuration clarity and robustness of modem init.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
4805aafd4e drivers: modem: hl78xx: Improve restart handling and boot tracking
This update refactors the HL78xx initialization and runtime state
machine to provide robust handling of unexpected modem restarts
and improve PDP and boot status management.

Key changes:
- Add KSUP unsolicited response to the global chat match table
  so modem boot status is monitored independently from the
  initialization script.
- Introduce a boot-status structure tracking previous boot state
  to detect unexpected restarts.
- Dispatch a new MODEM_HL78XX_EVENT_MDM_RESTART event when the
  modem reports a READY status after having been previously
  booted.
- Add restart-handling transitions across relevant states
  (await-power-on, RAT-config, await-registered, carrier-on) to
  ensure the driver cleanly re-enters the initialization
  sequence.
- Rework init and post-restart script entry points to run
  asynchronously via hl78xx_run_init_script_async() and
  hl78xx_run_post_restart_script_async().
- Move bus-open and chat-attach operations out of the
  init-script state and into the await-power-on state for
  clearer separation of responsibilities.
- Expose a getter for the AT-ready match structure.

These changes improve resilience during modem restarts, clarify
the state machine flow, and prepare the driver for multi-PDP-
context configurations.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
5c082329c2 drivers: modem: hl78xx: Fix GSM RAT registration and PDP handling
Fix several issues in GSM mode for the HL78xx modem driver to
ensure correct registration reporting, RAT handling, and PDP
context activation.

Changes include:
- Skip band configuration when RAT=GSM to prevent +CME ERROR
  responses.
- Explicit PDP activation (AT+CGACT=1,1) for GSM data sessions.
- Parse +CGACT URCs and track PDP activation state internally.
- Introduce gprs status struct and update initialization
  scripts to handle GSM reliably.
- Add helper functions and chat scripts to manage GSM
  registration and PDP flow.
- Correct GSM registration-status handling: enable CREG=3 and
  disable unused CEREG.
- Dynamically switch between CREG (GSM) and CEREG (LTE/NB-IoT)
  based on active RAT.

These changes improve driver stability and ensure reliable data
and registration behavior on GSM networks.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Zafer SEN
bc08d3cdb7 drivers: modem: hl78xx: reorder Kconfig entries, and comment fixes
This patch applies multiple small cleanups across the HL78xx modem
driver, improving readability, consistency, and diagnostics without
changing logic.

Key changes:
- Added missing blank lines in Kconfig sections for readability.
- Improved several log messages for clarity and guidance to users.
- Added a debug log when RAT/Band configuration requires a modem restart.
- Replaced an incorrect SET_RAT_GMS_CMD macro name with SET_RAT_GSM_CMD.
- Added TODO marker for unhandled script failure case.
- Corrected log format string in event handler to include event ID.
- Added an informational log on modem initialization.
- Added clarifying comments in header structures and APN lookup path.
- Normalized #endif comment style throughout the driver.
- Fixed use of CME_ERROR_STRING in chat match definitions.
- Applied formatting hints (clang-format off/on) around multi-line
  MODEM_CHAT_MATCHES blocks.
- Improved enum documentation in public API header.

These changes improve maintainability and developer usability without
modifying driver behavior.

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-12-05 11:12:48 -05:00
Lyle Zhu
0f1fcbb139 tests: Bluetooth: Classic: GAP_C: Reduce time consumption
In current implementation, the useless for loop is called in function
`_wait_for_shell_response()` if the target message has been found. It
causes the case will consume too much time.

Exit the useless for loop to reduce the time consumption when the
target message is found.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-05 11:12:28 -05:00
Lyle Zhu
eaa7cfff24 tests: Bluetooth: Classic: GAP_S: Reduce time consumption
In current implementation, the useless for loop is called in function
`_wait_for_shell_response()` if the target message has been found. It
causes the case will consume too much time.

Exit the useless for loop to reduce the time consumption when the
target message is found.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-05 11:12:18 -05:00
Ioannis Damigos
cc4bc45556 drivers/timer/cortex_m_systick: Avoid division by zero
Preprocessor evaluates CYC_PER_TICK as zero in condition
`(COUNTER_MAX / CYC_PER_TICK) == 1` when
CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME is defined.

This commit skips the check when
CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME is defined.

Fixes: #100040

Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
2025-12-05 11:10:58 -05:00
Fin Maaß
94b3a7c13f docs: migration-guide: 4,4: mention ethernet phy change
Mention split of the ethernet phy.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-05 11:10:46 -05:00
Fin Maaß
8f8071a546 drivers: ethernet: phy: split generic phy
moves the fixed link functionality of the
generic ethernet phy into its own driver.
This makes both drivers more readable and
efficient.

Also makes it easier to use the normal generic
phy as a base for a vendor specific driver, as
the fixed link functionality is not needed on
them.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-05 11:10:46 -05:00
Fin Maaß
58b48b0423 dts: bindings: ethernet: phy: split and group common
split and group common dts bindings

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-05 11:10:46 -05:00
Fin Maaß
a21fdccd50 drivers: ethernet: nxp: allow driver to be build without mdio
allow driver to be build without mdio,
implemented similar to ptp.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-05 11:10:46 -05:00
Alberto Escolar Piedras
efca68625a Bluetooth: userchan: Validate UNIX socket path fits in sockaddr_un
sockaddr_un.sun_path is limited to 108 in Linux
(and to similarly small numbers in other systems).

Let's check that it fits before copying it, and error out otherwise
(the user won't be able to connect to that socket if the path
is truncated, and if we overflow we will just corrupt memory).

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-05 11:10:38 -05:00
Krzysztof Chruściński
123a0cd29f tests: drivers: uart: async_api: Add overlay for nRF non-secure
Add configuration for nrf9160dk/nrf9160/ns and
nrf5340dk/nrf5340/cpuapp/ns targets.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-05 11:10:09 -05:00
Guillaume Gautier
a0ffee2b92 drivers: spi: stm32: add support for baudrate prescaler bypass
Some STM32 SPI have the ability to bypass the baudrate prescaler, which is
equivalent to having a prescaler of 1.
Adds this new value in the prescaler calculation if available.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-12-05 11:09:59 -05:00
Matthias Alleman
476483075c drivers: input: input_chsc5x: fix sda and scl being pulled low
The CHSC5X chip requires reads to be aligned to multiples of 4 bytes.
If the read length is not a multiple of 4, the device pulls SDA/SCL low
for about 140 ms. The IC_TYPE address is corrected to 0x80.

Signed-off-by: Matthias Alleman <matthias.alleman@basalte.be>
2025-12-05 13:39:48 +02:00
Krzysztof Chruściński
242bf65d1d manifest: Update hal_nordic with GPPI helper changes
Improve GPPI documenation and fixes for bsim support in PPI
implementation of GPPI helper.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-05 13:39:34 +02:00
Julien Racki
dc6d5ae970 drivers: ethernet: stm32: Add Port Selection
Add Port Selection for the N6 series.
This allows to run ethernet at 10mbs, 100mbs or 1000mbs.

Signed-off-by: Julien Racki <julien.racki-ext@st.com>
2025-12-05 13:39:24 +02:00
Jun Lai
769ba82aa5 llext: export some symbols
Export these symbols for loadable modules
that use them.

Signed-off-by: Jun Lai <jun.lai@dolby.com>
2025-12-05 13:39:15 +02:00
Benjamin Cabé
67cd6120b9 doc: developer: enhance manifest index with introductory text
The "West Projects Index" could use a bit more context so this commit
adds just that.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-05 13:38:58 +02:00
Alberto Escolar Piedras
cb1b1212e4 boards native_sim: Add documentation on how to cross-compile
Providing a guide on how to setup an Ubuntu24.04 x86_64 host
for arm builds and how to build and run locally the arm binary.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-05 13:38:48 +02:00
Alberto Escolar Piedras
8c194648e4 arch/posix: Support cross-compiling
Support cross-compiling from one Linux host for another Linux target.
This is done by allowing users to set NATIVE_TARGET_HOST for cmake
which will override the automatic detection.
At the same time, add support for building for 32bit arm targets.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-05 13:38:48 +02:00
Alberto Escolar Piedras
654535bea3 cmake: FindHostTools: Do not override cross-compile for native builds
This check is meant to be easier on users so they do not need to bother
setting ZEPHYR_TOOLCHAIN_VARIANT to "host" when building for
native_simulator based targets, so we default in that case to it.
But when somebody has actively set it to "cross-compile" we should not
override it.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-05 13:38:48 +02:00
Alberto Escolar Piedras
d38df492ee toolchain: gcc: GEN_ABSOLUTE* macros merge & support POSIX arch on arm
Merge the GEN_ABSOLUTE* macros for architectures which have
the same assembler.
Add support for building the POSIX architecture for armhf targets.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-05 13:38:48 +02:00
Johan Hedberg
69946a1253 drivers: crypto_mbedtls_shim: Fix build with Clang/LLVM
drivers/crypto/crypto_mbedtls_shim.c:310:3: error: label followed by a
declaration is a C23 extension [-Werror,-Wc23-extensions]
                 uint16_t tag_len = ctx->mode_params.ccm_info.tag_len;
                 ^

Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
2025-12-05 13:38:37 +02:00
Bjarki Arge Andreasen
cc68eaef2b dts: nordic: nrf54h20: disable lfclk by default
The lfclk was left enabled by mistake, it has status disabled
followed by status okay a few lines down. Remove the spurious
status = "okay";

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-12-05 10:55:53 +02:00
Cristian Bulacu
ea543d87cd openthread: platform: dns_resolver: Allow A type queries
Allow dns upstream resolver module to perform A queries on behalf of
Thread nodes

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-12-05 10:55:44 +02:00
Peter Mitsis
864e648e68 kernel: Add ifdef guard around ipi_lock definition
The global variable ipi_lock is both local to the file ipi.c and
only used when CONFIG_SCHED_IPI_SUPPORTED is enabled. As such its
definition should be wrapped with an ifdef.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-12-05 10:55:32 +02:00
Jordan Yates
2c47b2d2a3 i2c/i3c: rtio: explicit zeroing of SQE flags
Explcitly zero the flags of the SQE obtained from `rtio_sqe_acquire`
when the `rtio_sqe_prep_*` helpers aren't used (the helpers memset the
entire struct to 0).

The flags must be reset to ensure the `RTIO_SQE_TRANSACTION` and
`RTIO_SQE_CHAINED` are not retained from a previous SQE.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-05 10:55:22 +02:00
Attie Grande
3b16975c64 drivers: sdmmc: stm32: introduce cache flush & invalidation for DMA
Introduce steps to maintain cache coherence around DMA accesses to the
underlying SD / eMMC storage.

Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
2025-12-05 10:55:11 +02:00
Anthony Williams
07b300ee4f sensor: rm3100: Remove duplicate edata header encoding when streaming
Remove the manual encoding of edata->header.channels and
edata->header.timestamp as these are now handled during rm3100_encode()

Signed-off-by: Anthony Williams <anthony289478@gmail.com>
2025-12-05 10:54:53 +02:00
Anthony Williams
640a696cc4 sensor: rm3100: Use rm3100_encode to populate cycle_count during stream.
Use rm3100_encode() to populate cycle_count info when
configured in streaming mode.

Previously when configured for streaming, cycle_count would
be 0 and rm3100_convert_raw_to_q31 would default to always
use the 600hz divider resulting in values off by a factor of 2.

Signed-off-by: Anthony Williams <anthony289478@gmail.com>
2025-12-05 10:54:53 +02:00
Anthony Williams
ca2ed7de3d sensor: rm3100: Correct LSB/uT scale factor comment in rm3100_decoder.c
The scale factor when used as a divider from the datasheet specifies
units in LSB/uT not uT/LSB. This change corrects the comment to reflect
the correct units for the divider.

Signed-off-by: Anthony Williams <anthony289478@gmail.com>
2025-12-05 10:54:53 +02:00
Jilay Pandya
71368aaa01 doc: add migration guide entry for replacing msx-gpios to m0/m1-gpios
msx-gpios is now replaced with m0/m1-gpios for adi,tmc2209 in order
to be consistent with other step/dir drivers

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-12-05 10:54:41 +02:00
Jilay Pandya
fddadaf012 tests: generalize drv84xx tests for all step-dir drivers
drv84xx test-suite could be extended to other step-dir drivers
as well

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-12-05 10:54:41 +02:00
Jilay Pandya
4d68fb8be5 drivers: tmc2209: use m0/m1-gpios instead of msx-gpios
unify msx-gpios for step-dir drivers. tmc2209 is an exception
for now and hence migrating to m0/m1-gpios instead of msx-gpios.

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-12-05 10:54:41 +02:00
Fabio Baltieri
6850470587 i2c: shell: make the buffer configurable
Add a Kconfig option to tweak the i2c shell command buffer size,
similarly to other shell commands.

This is allocated on the stack so add a note about it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-12-05 10:54:31 +02:00
Cheng Chang
abb707ca36 bluetooth: host: obex: Allow MOPL to exceed MTU for mobile compatibility
When MOPL  exceeds MTU, adjust it to match MTU instead of failing the
connection. This handles the common case where mainstream mobile
operating systems (iPhone and Android) negotiate
MOPL values greater than the RFCOMM or L2CAP MTU.

Signed-off-by: Cheng Chang <cheng.chang@nxp.com>
2025-12-05 10:54:21 +02:00
Holt Sun
07a67e81b6 samples: memc: rw612: set AHB RX buffer defaults for FlexSPI cache/DMA
FRDM/RD RW612 overlays are updated to provide explicit AHB RX buffer
configuration for the FlexSPI controller, aligning with RW61x features:
- FlexSPI flash (port A): 32 KiB cache, dynamic decryption, XIP, DMA
- FlexSPI pSRAM (port B): 32 KiB cache, dynamic decryption, XIP, DMA

The rx-buffer-config now assigns a dedicated buffer for the primary
CPU traffic and leaves buffer 7 as the generic fallback, matching the
expected cache/DMA behavior and MCUX SDK defaults. This ensures sane
defaults when PSRAM is enabled without requiring users to patch AHB
buffer settings manually.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-05 10:54:12 +02:00
Zhaoxiang Jin
f052dbb68f drivers: counter: lptmr: Fix get_pending_int wrong implementation
Originally, function 'mcux_lptmr_get_pending_int' checks if both
TCF and TIE flags are set to determine if an interrupt is pending.
But function 'LPTMR_GetStatusFlags' only returns the status flags,
that is we will never get TIE flag from it. then the function
always returns false.

The correct approach is to read the CSR register directly and check
if both TIE and TCF bits are 1. If yes, there's a pending interrupt;
if not, there isn't.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-05 10:54:01 +02:00
Jordan Yates
8b697b6b03 tests: audio: dmic_util: test PDM_DT_IO_CFG_GET
Test the implementation of `PDM_DT_IO_CFG_GET`. Implemented as a
distinct test from `dmic_api` to allow running natively in CI.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-05 10:53:35 +02:00
Jordan Yates
e2d88b44e4 audio: dmic: macros to query DT microphone config
Add a macro to construct a `struct pdm_io_cfg` instance from the
devicetree node with the appropriate properties.

Add macros to query which PDM channels are available.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-05 10:53:35 +02:00
Jordan Yates
2ceda8506e dts: bindings: audio: common PDM channel configuration
The allowable ranges for the clock frequency and duty cycle, together
with the enabled channels, are hardware configuration parameters that
should be described in devicetree.

`pdm-dmic.yaml` is its own file to allow more complicated hardware
configurations to inherit it.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-05 10:53:35 +02:00
Seppo Takalo
acf375ed48 drivers: modem_cellular: Switch chat to UART when CMUX closes
When CMUX channels are closed, UART goes back to AT command mode.
Switch Chat pipe to use the plain UART as DLCI2 pipe does not
exist anymore.

Add a small delay, so the remote end have time to clean up and
go back to normal AT command mode.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-05 10:53:25 +02:00
Alex Apostolu
557e7c6111 tests: drivers: dma: configure alignment based on devicetree
Configure the alignment of the data buffers based on the
dma_buf_addr_alignment property. Default to 32 if property isn't set.

Signed-off-by: Alex Apostolu <aapostolu@tenstorrent.com>
2025-12-05 10:53:12 +02:00
Alex Apostolu
0e28a0230c tests: drivers: dma: use tst_dma0 across all tests
Use tst_dma0 node across all tests for consistency.

Signed-off-by: Alex Apostolu <aapostolu@tenstorrent.com>
2025-12-05 10:53:12 +02:00
Badr Bacem KAABIA
ceac2e6c0f drivers: wifi: airoc: Fallback to user security on scan fail
In the `airoc_mgmt_connect` function, if the user provides a security
type of `WIFI_SECURITY_TYPE_NONE` along with a PSK, the driver attempts
to scan for the AP to determine the correct security protocol.

However, if this scan fails or does not find the AP, the driver would
previously fail the connection attempt instead of using the security
type originally provided by the user.

This change ensures that if the scan does not resolve the security
type (`WHD_SECURITY_UNKNOWN`), the driver falls back to using the
security type from the connection parameters. This makes the connection
process more robust and resilient to scan failures.

Signed-off-by: Badr Bacem KAABIA <badrbacemkaabia@gmail.com>
2025-12-05 10:52:44 +02:00
Jacky Lee
83c7b1a6b8 doc: boards: update index.rst
Updated boards/index.rst to remove unnecessary context
and fix statements.

Signed-off-by: Jacky Lee <jacky.lee@egistec.com>
2025-12-05 10:52:33 +02:00
Jacky Lee
46b9326bfd soc: egis_et171: Fix the i-cache activation order issue
Since caching is enabled before z_data_copy(), RAM
functions may still be cached in the d-cache instead
of being written to SRAM. In this case, the i-cache
will fetch the wrong content from SRAM. Thus, using
"fence.i" to fix it.

Signed-off-by: Jacky Lee <jacky.lee@egistec.com>
2025-12-05 10:52:33 +02:00
Jacky Lee
61e6e64abc boards: egis_et171: Remove unnecessary default configuration
Remove the default configuration FLASH_LOAD_SIZE, because
"linker.ld" will automatically configure FLASH_LOAD_SIZE
to the same default value

Signed-off-by: Jacky Lee <jacky.lee@egistec.com>
2025-12-05 10:52:33 +02:00
Mark Wang
3a8d37ecc4 libsbc: Fix compiler-specific warning flag for non-GNU compilers
The -Wno-stringop-overflow flag is specific to GCC and causes issues
with other compilers like Clang. Separate the compiler options so that
the warning suppression flag is only applied when using GCC.

This change wraps the -Wno-stringop-overflow flag in a compiler ID
check while keeping the optimization flags (-O3 -std=c11 -ffast-math)
applied for all compilers.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-12-05 10:52:18 +02:00
farsin NASAR V A
fd63bf93a5 tests: drivers: rtc: Add support for the sam_e54_xpro board
Added sam_e54_xpro.conf file

Signed-off-by: farsin NASAR V A <farsin.nasarva@microchip.com>
2025-12-04 17:12:33 -05:00
farsin NASAR V A
e30cf00a70 boards: microchip: sam: Add RTC node and enable RTC G1 support
Add RTC node in sam_e54_xpro.dts
Update sam_e54_xpro.yaml to reflect RTC G1 support on the board.

Signed-off-by: farsin NASAR V A <farsin.nasarva@microchip.com>
2025-12-04 17:12:33 -05:00
Farsin Nasar V A
e7b40aeb15 drivers: rtc: microchip: Add rtc driver
Add rtc driver for Microchip RTC G1.

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-04 17:12:33 -05:00
farsin NASAR V A
2830be0cd5 dts: arm: microchip: add RTC node and binding for G1 IP
Add the device tree node and the binding file for
microchip RTC G1 IP.

Signed-off-by: farsin NASAR V A <farsin.nasarva@microchip.com>
2025-12-04 17:12:33 -05:00
Kevin Chan
bde681d27a drivers: dma: add UART async. logic
- Modified DMA configuration and logic for UART Async.

Signed-off-by: Kevin Chan <kevin.chan3@infineon.com>
2025-12-04 17:12:23 -05:00
Kevin Chan
162be31386 samples: drivers: uart: async_api: support PSC3 and PSE84
- add overlay files in order to run async_api app.

Signed-off-by: Kevin Chan <kevin.chan3@infineon.com>
2025-12-04 17:12:23 -05:00
Kevin Chan
531e4507a8 tests: drivers: uart: uart_async_api: support pse84 and psc3
- add overlay and .conf files in order to run uart_async_api app.

Signed-off-by: Kevin Chan <kevin.chan3@infineon.com>
2025-12-04 17:12:23 -05:00
Kevin Chan
203c655343 Drivers: Serial: Add PDL based UART Async. for PSE84 and PSC3
- add UART Async. driver code
- Remove references to cat1-uart-pdl from devicetree references

Signed-off-by: Kevin Chan <kevin.chan3@infineon.com>
2025-12-04 17:12:23 -05:00
John Batch
0fadfd211f boards: Infineon: Removing dts references to infineon,cat1-uart-pdl
Removing references to infineon,cat1-uart-pdl from device tree board
files.  The differentiation between PDL and UART based drivers is done
by a Kconfig option.  See discussion in this PR for context:

https://github.com/zephyrproject-rtos/zephyr/pull/98035

Signed-off-by: John Batch <john.batch@infineon.com>
2025-12-04 17:12:23 -05:00
Julien Racki
b3cb7040e8 samples: watchdog: Add CI build test for STM32 IWDG EWI
This commit ensures the CI will run test build  for the STM32
that supports the IWDG early wake-up.

Signed-off-by: Julien Racki <julien.racki-ext@st.com>
2025-12-04 17:12:08 -05:00
Julien Racki
086b873667 drivers: watchdog: Add the support of the IWDG Early Wakeup
Add the support of the IWDG early wakeup.
Gives the possibility for the user to set a
callback that will be called before an IWDG reset.

Signed-off-by: Julien Racki <julien.racki-ext@st.com>
2025-12-04 17:12:08 -05:00
Julien Racki
d3baaac688 drivers: watchdog: Add Kconfig option for the IWDG Early Wakeup
Add a Kconfig option that is enabled if the soc's
IWDG support early wakeup.

Signed-off-by: Julien Racki <julien.racki-ext@st.com>
2025-12-04 17:12:08 -05:00
Julien Racki
2715539964 dts: arm: st: Add the interrupt line for the IWDG
Add the interrupt line for the socs with the IWDG implemented.

Signed-off-by: Julien Racki <julien.racki-ext@st.com>
2025-12-04 17:12:08 -05:00
Farsin Nasar V A
2a5077b407 tests: drivers: pwm: pic32cx_sg61_cult: added pwm test support files
Added pwm test support files for pic32cx_sg61_cult

Signed-off-by: Farsin Nasar V A <farsin.nasarva@microchip.com>
2025-12-04 17:11:56 -05:00
Muhammed Asif
6b6711f520 boards: microchip: pic32cx_sg41_cult: Add pwm-led on board
- Configures the pwm led on board.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-12-04 17:11:56 -05:00
Muhammed Asif
b936e42adf boards: microchip: pic32cx_sg61_cult: Add pwm-led on board
- Configures the pwm led on board.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-12-04 17:11:56 -05:00
Muhammed Asif
b70c7bb7d5 dts: arm: microchip: pic32cx_sg: add tcc node for pwm peripheral
- Adds the dts nodes for pwm driver using tcc peripheral.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-12-04 17:11:56 -05:00
Fabin V Martin
7e44876a29 tests: boot: test_mcuboot: Add board to platform allow list
Add pic32cx sg41 and sg61 cult boards.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-04 17:11:43 -05:00
Fabin V Martin
eee296298e samples: sysbuild: update list of allowed platforms
Add pic32cx sg41 and sg61 cult boards.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-04 17:11:43 -05:00
Fabin V Martin
51cf71afea boards: microchip: pic32cx_sg61_cult: update board dts
Add zephyr,flash-controller to the chosen node and
add partitions for mcuboot support

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-04 17:11:43 -05:00
Fabin V Martin
6e7591d772 boards: microchip: pic32cx_sg41_cult: update board dts
Add zephyr,flash-controller to the chosen node and
add partitions for mcuboot support

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-04 17:11:43 -05:00
Fabin V Martin
840a7c6955 dts: arm: microchip: add flash node and bindings
Add flash node and binding parameters for nvmctrl
flash driver

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-04 17:11:43 -05:00
Marco Widmer
9634425478 net: context: release context mutex before clearing IN_USE flag
A race condition was observed with concurrent net_context_get()
and net_context_unref() calls: If net_context_unref() is interrupted
just after clearing the NET_CONTEXT_IN_USE flag, net_context_get() may
try to reuse the context and reinitialize its mutex through
k_mutex_init(). Once net_context_unref() resumes, it calls
k_mutex_unlock() on the newly initialized mutex, which may lead to the
following assertion:

ASSERTION FAIL [mutex->lock_count > 0U] @ zephyr/kernel/mutex.c

Fix this by unlocking the context mutex before clearing the
NET_CONTEXT_IN_USE flag.

Signed-off-by: Marco Widmer <marco.widmer@bytesatwork.ch>
2025-12-04 17:11:25 -05:00
Nikhil Namjoshi
79a7106f9d net: Initialize unspec_addr to avoid -Werror=maybe-uninitialized
The variable 'unspec_addr' in net_dhcpv6_init() is implicitly
initialized on some platforms and optimization levels, but not
guaranteed to be initialized on all code paths when built with
compiler instrumentation.

This leads to a build failure with the strict
'-Werror=maybe-uninitialized' warning when code coverage flags are
enabled (e.g., via twister --coverage).

```
zephyr/subsys/net/lib/dhcpv6/dhcpv6.c:2325:26: error: ‘unspec_addr’
may be used uninitialized [-Werror=maybe-uninitialized]
         net_ipaddr_copy(&net_sin6(&unspec_addr)->sin6_addr,
```

Signed-off-by: Nikhil Namjoshi <nikhilnamjoshi@google.com>
2025-12-04 17:11:17 -05:00
Swamidas Nampalli
c2f8f9813d drivers: wifi: siwx91x: Drop the loop back packets
Added a MAC-layer filter to discard frames whose source MAC address
matches the devices own MAC address. These packets are looped-back
frames that do not need to be processed again by the network stack.

Dropping such frames early improves correctness, avoids redundant RX
processing, and reduces load on the IPv4/IPv6 protocol handlers.

This patch is a workaround for a bug in the NWP

Signed-off-by: Swamidas Nampalli <Swami.Das@silabs.com>
2025-12-04 14:05:47 -05:00
Johann Fischer
c828f5db8d doc: usb: add VID/PID documentation for the new USB device stack
The content is almost identical to that of the legacy stack because we
either ported or rewrote all the samples.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2025-12-04 14:05:35 -05:00
Markus Becker
96944d92f4 net: ocpp: Change Current.OfferedMaximum to Current.Offered
According to
<https://openchargealliance.org/wp-content/uploads/2025/04/OCPP_1.6_documentation.zip>
the Measurand value is called Current.Offered (Maximum current offered
to EV).

Signed-off-by: Markus Becker <markushx@gmail.com>
2025-12-04 14:05:24 -05:00
Jaro Van Landschoot
ca556db5c3 doc: releases: 4.4: Add PWM events
Add an entry for the addition of PWM events

Signed-off-by: Jaro Van Landschoot <jaro.vanlandschoot@basalte.be>
2025-12-04 14:05:13 -05:00
Jaro Van Landschoot
9be9684b53 samples: drivers: pwm: event: Add sample
Add a simple sample demonstrating how the PWM event API can be
used to precisely time 5 periods of a PWM signal.

Signed-off-by: Jaro Van Landschoot <jaro.vanlandschoot@basalte.be>
2025-12-04 14:05:13 -05:00
Jaro Van Landschoot
1becebc8f9 tests: drivers: build_all: pwm: add pwm event to sam
Add the pwm event functions of the sam pwm driver to the
build all test.

Signed-off-by: Jaro Van Landschoot <jaro.vanlandschoot@basalte.be>
2025-12-04 14:05:13 -05:00
Jaro Van Landschoot
8407f1766f drivers: pwm: sam: Add period and fault events
The SAM4S pwm supports several events. This commit
implements the events when a channel period has ended
or a fault event has occured.

Signed-off-by: Jaro Van Landschoot <jaro.vanlandschoot@basalte.be>
2025-12-04 14:05:13 -05:00
Jaro Van Landschoot
c6e64a1337 drivers: pwm: extend API to support events
Extend the PWM API to support events, as some
controllers allow interrupts if e.g., a pwm period
has ended or a fault occured.

Signed-off-by: Jaro Van Landschoot <jaro.vanlandschoot@basalte.be>
2025-12-04 14:05:13 -05:00
Emil Gydesen
ff4347571b Bluetooth: BAP: Bcast Source: Add missing use of variable
The broadcast_state variable was not used in
bt_bap_broadcast_source_update_metadata to verify the
state, but broadcast_source_get_state was instead called
twice.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-04 14:05:05 -05:00
Emil Gydesen
51946986e6 Bluetooth: BAP: Bcast Source: Refactor bt_bap_broadcast_source_reconfig
Refactor the bt_bap_broadcast_source_reconfig function to be less
complex by splitting the verification into multiple functions.

Additionally, it also fixes a rare, but potential, issue where
some subgroups were updated before a later subgroup would fail
to be updated. Added can_merge_codec_cfg_data to verify correctness
before we attempt to update any subgroups. This new check is also
applied to bt_bap_broadcast_source_create.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-04 14:05:05 -05:00
Emil Gydesen
b6e3f8ee5c Bluetooth: BAP: Broadcast source: Reduce complexicty of valid_param
Move the subgroup parameter validation to its own function to
reduce the size and complexity of valid_broadcast_source_param
to make Sonarcube happy.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-04 14:05:05 -05:00
David Jewsbury
6450eaab48 drivers: nrf_auxpll: Add CHECK_DTS_BINDING_VS_MDK macro
Macro added to compare the devicetree bindings against
values in the MDK to clean up code and check out-div
bindings.

Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
2025-12-04 14:04:54 -05:00
David Jewsbury
2a395ba0b9 dts: bindings: clock: nrf-auxpll: add out-div binding
It was previously possible to set output division setting
to an invalid number. These bindings ensure a valid number
is set of 0-8.

Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
2025-12-04 14:04:54 -05:00
David Jewsbury
0e00299dcf dts: nrf9280: Update canpll to use frequency dts binding
CANPLL was not using the frequency binding defined in
nrf-auxpll.h

Signed-off-by: David Jewsbury <david.jewsbury@nordicsemi.no>
2025-12-04 14:04:54 -05:00
Vignesh Pandian
c310133b3e scripts: checkpatch: fix missing blank line detection
Fix checkpatch not warning when blank line after declaration
is removed. Updated regexes to also handle context lines,
ensuring consistent detection.

Fixes: #98976

Signed-off-by: Vignesh Pandian <vignesh@aerlync.com>
2025-12-04 14:04:45 -05:00
Tomi Fontanilles
82906c642b doc: release-notes-4.4: add entry for TF-M 2.2.2 update
Document the update.

Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
2025-12-04 14:03:35 -05:00
Tomi Fontanilles
ea3697bf88 manifest: tf-m: update to 2.2.2
Update the TF-M repos to 2.2.2, from version 2.2.0.

Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
2025-12-04 14:03:35 -05:00
Mathieu Choplain
0289dec335 samples: board: st: wkup_pins: configure the GPIO pin as input
Certain series (e.g., STM32WBA) require pins to be configured as input
to behave properly as wake-up pins.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 14:03:17 -05:00
Lyle Zhu
91f19de3f8 tests: Bluetooth: Classic: rfcomm_s: Check connect event before send
Sometimes, the command `rfcomm_s send 9 1` will fail to execute due
to the DLC has not been established.

Check the DLC connected event before sending shell command
`rfcomm_s send 9 1`.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-04 14:03:06 -05:00
Emil Hammarström
9538b4f0de drivers: sensor: lsm6dso: Add support for Accel LP filter
Add device tree support for enabling the second low pass filter
(LPF2) for the accelerometer output.

This adds additional low pass on top of the default ODR/2 from
the LPF1 output.

Signed-off-by: Emil Hammarström <emil.a.hammarstrom@gmail.com>
2025-12-04 14:02:57 -05:00
Emil Hammarström
54cd6a3963 drivers: sensor: lsm6dso: Change log level for failures during init
Log level in failures were changed from DBG to ERR so that the reason of
initialization failure may be known.

Signed-off-by: Emil Hammarström <emil.a.hammarstrom@gmail.com>
2025-12-04 14:02:57 -05:00
Axel Le Bourhis
5a2c28236e soc: nxp: mcxw23: increase system workque stack size when BT
Fix sysworkq stack overflow in various bluetooth samples due to using
mbedtls for crypto.

Signed-off-by: Axel Le Bourhis <axel.lebourhis@nxp.com>
2025-12-04 14:02:41 -05:00
Carlo Caione
6343677e80 modules: Bump lora-basics-modem to v4.9.0
Bump lora-basics-modem module to v4.9.0.

Signed-off-by: Carlo Caione <carlo.caione@gmail.com>
2025-12-04 14:02:28 -05:00
Mathieu Choplain
92ebb28bb2 doc: generation: bump up known-good Doxygen and Latexmk versions
The "Documentation Generation" page listed a severely outdated "known-good"
version for Doxygen (1.8.13) which is no longer correct: recent attempts to
build the documentation using 1.9.1 failed miserably.

Update the minimum version to 1.15.0 which matches the version used by the
Zephyr-build Docker image, also used as part of CI, to ensure that what we
document as "known-good" is indeed a configuration known to work.

Following the same logic, bump up the known-good version of Latexmk to 4.83
which matches the version found in the Docker image. Even though some older
versions (such as 4.76) are also working, this documentation page is
informative rather than authoritative, so it's fine to merely document one
version known to work rather than the exact minimum version required.

The Graphviz version is untouched as it seems to match the Docker image.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 14:01:55 -05:00
Mathieu Choplain
fdd70c3769 dts: arm: st: n6: add nodes for USB2 instance
Even though the USB driver does not support multi-instance yet, out-of-tree
or custom boards may want to use the USB2 instance instead of USB1, which
is not currently possible because its node is not declared.

Add missing USBOTGHS2 and corresponding USBPHYC2 nodes to STM32N6 series
root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 14:01:31 -05:00
Stine Åkredalen
78c2b35a0e docs: Bluetooth: Mesh: Add Static OOB entropy requirement
Updates documentation for clarifying that for secure provisioning
with the BTM_ECDH_P256_HMAC_SHA256_AES_CCM algorithm,
the Static OOB value should contain more than 128 bits of
entropy to provide adequate security against attacks.

Signed-off-by: Stine Åkredalen <stine.akredalen@nordicsemi.no>
2025-12-04 14:01:22 -05:00
Valerio Setti
4cf7cd5748 drivers: crypto: mbedtls_shim: allow tag len to be specified in CCM
Retrieve the desired tag length from the "struct cipher_ctx" being passed
to "cipher_begin_session()" when using CCM.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-04 14:01:02 -05:00
Mathieu Choplain
518725cb3b drivers: rtc: stm32: remove ll in driver's file name
The `ll` part of driver's file name indicates that the implementation uses
the STM32Cube Low Level ("LL") library, which is not interesting because
there is only *one* STM32 driver implementation anyways. Addtionnally, the
presence of `ll` among STM32 drivers is not consistent.

Get rid of it for this class's driver to match most other STM32 drivers.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 14:00:34 -05:00
Mathieu Choplain
d0113285cf drivers: i2s: stm32: remove ll in driver's file name
The `ll` part of driver's file name indicates that the implementation uses
the STM32Cube Low Level ("LL") library, which is not interesting because
there is only *one* STM32 driver implementation anyways. Addtionnally, the
presence of `ll` among STM32 drivers is not consistent.

Get rid of it for this class's driver to match most other STM32 drivers.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 14:00:34 -05:00
Mathieu Choplain
967b42cbfe drivers: i2c: stm32: remove ll in drivers' file name
The `ll` part of drivers' file name indicates that the implementation uses
the STM32Cube Low Level ("LL") library, which is not interesting because
there is only *one* STM32 driver implementation anyways (per IP variant).
Addtionnally, the presence of `ll` among STM32 drivers is not consistent.

Get rid of it for drivers of this class to match most other STM32 drivers.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 14:00:34 -05:00
Mathieu Choplain
96632cd686 drivers: counter: stm32: remove ll in drivers' file name
The `ll` part of drivers' file name indicates that the implementation uses
the STM32Cube Low Level ("LL") library, which is not interesting because
there is only *one* STM32 driver implementation anyways (per IP variant).
Addtionnally, the presence of `ll` among STM32 drivers is not consistent.

Get rid of it for drivers of this class to match most other STM32 drivers.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 14:00:34 -05:00
Mathieu Choplain
6cb3ea5510 drivers: spi: stm32: remove ll in driver's file name
The `ll` part of driver's file name indicates that the implementation uses
the STM32Cube Low Level ("LL") library, which is not interesting because
there is only *one* STM32 driver implementation anyways. Addtionnally, the
presence of `ll` among STM32 drivers is not consistent.

Get rid of it for this class's driver to match most other STM32 drivers.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 14:00:34 -05:00
Piotr Kosycarz
167247ccdd tests: crypto: mbedtls_psa: just use ztest
This is regular ztest, no need to console harness.
(beside that console harness fails)

Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
2025-12-04 14:00:24 -05:00
Mark Wang
ab09c94377 doc: releases: migration-guide-4.4: libsbc is moved under bluetooth
Document that libsbc (sbc.c and sbc.h) has been moved under the Bluetooth
subsystem, with sbc.h now located in include/zephyr/bluetooth.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-12-04 05:26:00 -05:00
Mark Wang
2739b87566 libsbc: remove unused compile definitions
They are used in the sbc of bluedroid not in the sbc of Android bluetooth,
and Zephyr is using the sbc of Android bluetooth, so remove them.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-12-04 05:26:00 -05:00
Mark Wang
d776d00c42 bluetooth: sbc: move sbc to bluetooth
move sbc to bluetooth because only bluetooth uses it,
change CONFIG_LIBSBC_ENCODER and CONFIG_LIBSBC_DECODER as CONFIG_LIBSBC.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-12-04 05:26:00 -05:00
Mark Wang
5f79cd83ea libsbc: fix build issue
Remove `-Wno-array-bounds` as there does not seem to be any issues
that require it anymore.
Add -Wno-stringop-overflow to avoid what seem like false positive
warnings with gcc 13.3.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-12-04 05:26:00 -05:00
Firas Sammoura
0119c82065 tests: riscv: Add unit tests for riscv_pmp_decode_region
This commit introduces a suite of unit tests for the `pmp_decode_region`
function using the Ztest framework. The tests validate the correct
calculation of start and end addresses for various RISC-V PMP
(Physical Memory Protection) entry configurations.

The following scenarios are covered:
- TOR (Top of Range) mode for index 0.
- TOR (Top of Range) mode for index > 0.
- NA4 (Naturally Aligned Four-byte) mode.
- NAPOT (Naturally Aligned Power-of-Two) mode.
- Default behavior for a disabled PMP entry.

These tests ensure the PMP region decoding logic is accurate across
different addressing modes.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-12-04 05:25:40 -05:00
Mohamed Azhar
01af640688 boards: microchip: pic32cz_ca80_cult: add pinctrl to supported list
Add pinctrl to the supported drivers list for pic32cz_ca80_cult board

Signed-off-by: Mohamed Azhar <mohamed.azhar@microchip.com>
2025-12-04 05:24:51 -05:00
Mohamed Azhar
3c79fb39a0 drivers: pinctrl: microchip: update pinctrl driver for Port G1
Updates G1 pinctrl driver

Signed-off-by: Mohamed Azhar <mohamed.azhar@microchip.com>
2025-12-04 05:24:51 -05:00
Mohamed Azhar
d90bd3a0ed dts: arm: microchip: pic32cz_ca: Add pinctrl nodes
Adds the pinctrl node and encapsulates the port nodes within
the pinctrl node for pic32cz ca series of socs, and updates
the binding file

Signed-off-by: Mohamed Azhar <mohamed.azhar@microchip.com>
2025-12-04 05:24:51 -05:00
Mohamed Azhar
f1cd357087 west.yml: Update west.yml for updating hal directory
Update west.yml for adding the pinctrl definition in
hal_microchip for pic32cz_ca devices

Signed-off-by: Mohamed Azhar <mohamed.azhar@microchip.com>
2025-12-04 05:24:51 -05:00
Seppo Takalo
7f1eb218c0 modem: pipe: Don't return EPERM on closed pipe
When working on CMUX power saving, it is typical
that we end up closing the pipe before the last
RX_READY event is handled from workqueue, so we end up
receiving -EPERM which is not really a fatal error.

Pipes recover when they are re-opened. So drop this error
and return zero instead, like modem_pipe_open() and close() does.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-04 05:24:38 -05:00
Seppo Takalo
437becb0da modem: cmux: Add struct cmux_config into struct cmux
Instead of copying all fields from cmux_config into run-time
struct cmux, just have the configuration structure as a member.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-04 05:24:38 -05:00
Seppo Takalo
392665578c doc: modem: Add documentation regarding CMUX power saving
Add documentation and state machine diagrams for CMUX power saving
feature and how to use it with Zephyr.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-04 05:24:38 -05:00
Seppo Takalo
f6f4212710 drivers: modem: Implement support for RING indicator
Use ring indicator to wake up the CMUX device
from sleep.
Only used for runtime power management, but same event
could be used for initiating idle -> connected as well.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-04 05:24:38 -05:00
Seppo Takalo
94246742fb drivers: modem: cellular: Use k_pipe instead of ringbuffer
Ringbuffer is not safe in ISR but k_pipe without waiting is.
So use pipe for events, so that possible GPIO callbacks from
ISR content can post events.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-04 05:24:38 -05:00
Seppo Takalo
af0a788bd8 drivers: modem: Implement runtime power management for CMUX
CMUX driver can enable the support for idle-timer in
devicetree and can be requested to shut down the pipe
during sleep.

Then UART backend put the actual device into sleep when
pipe is closed.

Waking up is requested by sending data to DLC pipe
or by manually opening the uart_pipe.
Modem may request similar wake-up by a RING interrupt which
would open the same pipe.

When UART is powered and pipe is not closed, CMUX wake-up
procedure is automatic. Either end may initiate the wake-up.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-04 05:24:38 -05:00
Seppo Takalo
aa408d7184 modem: cmux: Implement Power Saving Control message
Signal powersaving mode for the remote end using PSC command.
Wakes up the remote end from powersaving mode by sending flag characters.

This method is defined in 3GPP TS 27.010.
Sections 5.4.6.3.2 Power Saving Control (PSC) and
5.4.7 Power Control and Wake-up Mechanisms.

Essentially it is one PSC command to indicate a sleep state, and
then repeated flag characters to wake up the remote end or indicate
that we have been woken up.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-12-04 05:24:38 -05:00
Yves Wang
3d0d909d9f doc: Update edac shell sample's readme
Update the console log in readme to make it aligned with the actual
output

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-12-04 05:24:28 -05:00
Yves Wang
e9209e60ef samples: edac: update the app to support more platforms
Decouple the edac sample with IBECC.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-12-04 05:24:28 -05:00
Yves Wang
e0cf011c9a dts: nxp: add edac support for MCX platforms
Add eim, erm and edac instance for frdm_mcxa153, frdm_mcxn236,
frdm_mcxn947, frdm_mcxe247 and frdm_mcxe31b.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-12-04 05:24:28 -05:00
Yves Wang
67e0217399 drivers: edac: Add NXP EDAC driver
Add edac driver for NXP's ERM and EIM peripherals. It can inject ECC
error to specific channel within EIM and then report the error address,
syndrome and count within ERM.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-12-04 05:24:28 -05:00
Lucien Zhao
f335c00ccd boards: nxp: mimxrt700_evk: Upgrade the onboard chip to B0 silicon
- Update the pinctrl configuration for mimxrt700_evk board to support
- Update FCB settings from SDK

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-04 05:24:16 -05:00
Lucien Zhao
b6868c885a manifest: hal_nxp: sync rt700 B0 chip update
Update manifest to sync rt700 B0 chip update

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-12-04 05:24:16 -05:00
farsin NASAR V A
ec1167d78f tests: drivers: clock_control: Added sam_e54_xpro test support files
Added mchp_v1_subsys.h and sam_e54_xpro.overlay file and .conf file
Added Added sam_e54_xpro platform allow in testcase.yaml

Signed-off-by: farsin NASAR V A <farsin.nasarva@microchip.com>
2025-12-04 05:23:59 -05:00
Mathieu Choplain
aaee496010 mgmt: ec_host_cmd: backends/stm32_spi: configure proper DMA burst length
The burst length unit is bytes, not number of transfers. This had not been
an issue since the DMA driver historically ignored the values, but has now
become one since they are used and (most importantly for us) validated.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:23:02 -05:00
Mathieu Choplain
3b745a1214 drivers: video: stm32_dcmi: configure proper DMA burst length
The burst length unit is bytes, not number of transfers. This had not been
an issue since the DMA driver historically ignored the values, but has now
become one since they are used and (most importantly for us) validated.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:23:02 -05:00
Mathieu Choplain
4aa5e95135 drivers: uart: stm32: configure proper DMA burst length
The burst length unit is bytes, not number of transfers. This had not been
an issue since the DMA driver historically ignored the values, but has now
become one since they are used and (most importantly for us) validated.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:23:02 -05:00
Mathieu Choplain
be9c5398ae drivers: i3c: stm32: configure proper DMA burst length
The burst length unit is bytes, not number of transfers. This had not been
an issue since the DMA driver historically ignored the values, but has now
become one since they are used and (most importantly for us) validated.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:23:02 -05:00
Mathieu Choplain
9e14885e14 drivers: i2s: stm32: configure proper DMA burst length
The burst length unit is bytes, not number of transfers. This had not been
an issue since the DMA driver historically ignored the values, but has now
become one since they are used and (most importantly for us) validated.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:23:02 -05:00
Mathieu Choplain
f3499071cd drivers: i2c: stm32: configure proper DMA burst length
The burst length unit is bytes, not number of transfers. This had not been
an issue since the DMA driver historically ignored the values, but has now
become one since they are used and (most importantly for us) validated.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:23:02 -05:00
Mathieu Choplain
c4d884c7ed drivers: adc: stm32: configure proper DMA burst length
The burst length unit is bytes, not number of transfers. This had not been
an issue since the DMA driver historically ignored the values, but has now
become one since they are used and (most importantly for us) validated.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:23:02 -05:00
Mathieu Choplain
208b3ef5ba drivers: spi: stm32: configure proper DMA burst length
The burst length unit is bytes, not number of transfers. This had not been
an issue since the DMA driver historically ignored the values, but has now
become one since they are used and (most importantly for us) validated.

Fixes broken 16-bit on STM32N6 series.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:23:02 -05:00
Mathieu Choplain
3e64d53b17 release-notes: 4.4: add new voltage-scale property for STM32U5 PWRC
Add new voltage scale selection property for STM32U5 to 4.4 release notes.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:22:26 -05:00
Mathieu Choplain
926f9f456b drivers: clock_control: stm32u5: fix frequency range check for scale
The range check should be inclusive: scale 4 allows *up to* 25 MHz, scale 3
*up to* 55 MHz, etc.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:22:26 -05:00
Mathieu Choplain
1f70c795c7 drivers: clock_control: stm32u5: add configurable voltage scale support
Add support for the new `voltage-scale` property on the STM32U5-specific
Power Controller binding.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:22:26 -05:00
Mathieu Choplain
6dd9182912 dts: arm: st: stm32: u5: add U5-specific compatible on Power Controller
Add the "st,stm32u5-pwr" compatible to the Power Controller node in the
DTSI for STM32U5 series.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:22:26 -05:00
Mathieu Choplain
a49a06949c dts: bindings: pwr: add STM32U5 power controller binding
Add a binding for the power controller of STM32U5 series.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-04 05:22:26 -05:00
Michał Stasiak
46e90f93f5 soc: nordic: nrf_sys_event: handle errors correctly
nrfx_power_constlat API returns negative value if
the requested action has no effect, which is expected
in cases of multiple requests/releases. Align nrf_sys_event
to not treat it as an error.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-04 05:21:55 -05:00
Sai Santhosh Malae
ef1bd9d2a9 samples: adc: siwx91x: Add adc_dt support for siwx917_rb4338a
Add an overlay to enable the adc_dt sample on the siwx917_rb4338a
board.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-04 05:21:40 -05:00
Sai Santhosh Malae
78f47a362f drivers: adc: siwx91x: Return raw ADC value
Instead of returning a converted ADC reading, return the
raw ADC sample. Conversion is left to the user based on
the selected ADC mode (single-ended or differential).

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-04 05:21:40 -05:00
Sai Santhosh Malae
f4c152ab47 drivers: adc: siwx91x: Add ref_internal to device API
The Siwx91x ADC reference voltage is configurable rather than fixed.
Expose `ref_internal` in the device API so the driver can retrieve the
reference voltage from the device tree instead of assuming a constant
value.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-04 05:21:40 -05:00
Alvis Sun
55156419bc drivers: sensor: npcx: add sensor v2t support for npck3
Introduces the sensor driver managing the V2T module for
temperature readout.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2025-12-04 05:21:24 -05:00
Alvis Sun
e69bbfc55c drivers: adc: npcx: add-v2t support for npck3
Please note that when performing conversions,
the selected channels must all be of the same type
(either ADC raw or V2T.)

Mixing ADC and V2T channels in a single conversion sequence is
not supported.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2025-12-04 05:21:24 -05:00
Alvis Sun
b4a9e6f0b6 drivers: adc: npcx: add adc driver support for npck3
As title.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2025-12-04 05:21:24 -05:00
S Mohamed Fiaz
57a2249896 boards: silabs: siwx91x: Fix MEMC enable and initialization priorities
This commit corrects board configuration to enable the memory controller
and set proper initialization priorities, ensuring PSRAM is correctly
initialized during system startup.

Signed-off-by: S Mohamed Fiaz <Fiaz.Mohamed@silabs.com>
2025-12-04 05:20:20 -05:00
Rex Chen
64a1477976 modules: hostap: Fix connection failed with TLS cipher RSA3K
The TLS cipher RSA3K ciphersuites ECDHE-RSA-AES256-GCM-SHA384 and
DHE-RSA-AES256-GCM-SHA384 only support TLS1.2, but TLS1.3 enabled,
version check failed in ssl_tls13_validate_peer_ciphersuite
during parse client hello.
Disable TLS1.3 for TLS cipher RSA3K to fix this issue.

Signed-off-by: Rex Chen <rex.chen_1@nxp.com>
2025-12-04 06:34:58 +00:00
Peter Mitsis
0d4856bb38 tests: Fix variable name
Updates the spawn_threads() sleep_sec parameter name to sleep_msec
to more accurately reflect the units of measurement.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-12-04 06:34:47 +00:00
Maureen Helm
e76dd0c7ec dts: bindings: usb: Fix max3421e compatible to use hyphen word separator
Fixes the max3421e devicetree compatible to follow the convention of
using a hyphen rather than an underscore as the word separator.

Signed-off-by: Maureen Helm <maureen.helm@analog.com>
2025-12-04 06:34:09 +00:00
Nicholas Lowell
d98ec13320 logging: add all format options to Kconfig and std_get_flags()
Some but not all LOG_OUTPUT_ format flags were Kconfigurable
for log backends using log_backend_std_get_flags()

Adding the missing configurable flags to Kconfig and referencing
them in log_backend_std_get_flags() for full control of output:
- CRLF_NONE
- CRLF_LFONLY
- SKIP_SOURCE

FORMAT_SYSLOG was omitted b/c it is specific to NET log backend.

Signed-off-by: Nicholas Lowell <Nicholas.Lowell@lexmark.com>
2025-12-04 06:33:40 +00:00
Sylvio Alves
d14a547d42 dts/dtsi: add missing zephyr prefix for consistency
Many dts/dtsi files where its dt-bindings are in-tree
do not include zephyr prefix in the #include path.
Add it to make it consistent globally.

Some dt-bindings that resides in hal can not be changed.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-12-03 15:38:17 -05:00
Holt Sun
6cacb70092 soc: nxp: lpc55XXX: add cache support for LPC55S36
Enable instruction cache support for LPC55S36 SoC:
- Select CPU_HAS_ICACHE and HAS_MCUX_SYSCON_LPCAC
- Enable CACHE_MANAGEMENT and EXTERNAL_CACHE by default
- Set ICACHE_LINE_SIZE to 256 bytes

This enables the SYSCON LPCAC cache driver for improved
performance on the LPC55S36 SoC.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-03 15:37:50 -05:00
Holt Sun
aa6f7e925b modules: hal_nxp: add SYSCON LPCAC cache support
Add HAL support for SYSCON LPCAC cache controller by:
- Adding HAS_MCUX_SYSCON_LPCAC Kconfig option
- Integrating cache_lpcac_mcxn driver component

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-03 15:37:50 -05:00
Holt Sun
b403bb5c66 drivers: cache: add NXP SYSCON LPCAC cache driver
add cache driver for NXP SYSCON LPCAC controller,
this driver provides instruction cache management
with enable/disable and invalidation support.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-03 15:37:50 -05:00
Martin Hoff
4f1313b0ad soc: silabs: siwx91x: unique place for sys clock tick definition
This patch put in the same place the default value for
SYS_CLOCK_TICKS_PER_SEC. It also apply the sleeptimer clock frequency
when sleeptimer is used for sys clock.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-03 15:37:09 -05:00
Martin Hoff
e524c1f51e soc: silabs: siwx91x: define hardware sys clock from dts
This patch introduce configuration of the symbol
'SYS_CLOCK_HW_CYCLES_PER_SEC' with dts entry rather than a hardcoded
value.
Clock control on siwx91x needs to use the clock frequency of the cpu
to init rather than the 'SYS_CLOCK_HW_CYCLES_PER_SEC' symbol,
otherwise we initialize the m4 clock with the ULP ref clock.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-03 15:37:09 -05:00
Damjan Belavic
470290cfc4 xen/dom0: Add xen_domctl_deassign_dt_device support
Add wrapper function for XEN_DOMCTL_deassign_device hypercall to
support deassigning device tree devices from guest domains.

Signed-off-by: Damjan Belavic <damjan_belavic@epam.com>
2025-12-03 15:37:00 -05:00
Chaitanya Tata
466d18d19c net: l2: wifi_shell: Fix MFPR handling
When protocol says MFP is required for WPA3, no point in asking user and
then validating.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-12-03 15:36:47 -05:00
Chaitanya Tata
7cbcd1d1d3 modules: hostap: Add checks for WPA3
If the WPA3 is disabled in the build handle gracefully rather than
cryptic supplicant internal messages.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-12-03 15:36:47 -05:00
Chaitanya Tata
237e4e4ae8 modules: hostap: Fix auto mode without WPA3 enabled
In case WPA3 is disabled in the config but auto security is used, the
wifi status shows security as "Unknown".

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-12-03 15:36:47 -05:00
Alberto Escolar Piedras
61e544c2f3 tests: benchmark: Mbed TLs: filter for posix arch
There is no point benchmarking on the posix architecture, and
how the test is now it just hungs. So let's filter it.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-12-03 15:36:29 -05:00
Rahul Gurram
e02845b7cb drivers: wifi: siwx91x: To improve SiWx91x performance
To enhance throughput performance on the SiWx91x series, Added
some Siwx91x configurations by deafult.

Signed-off-by: Rahul Gurram <rahul.gurram@silabs.com>
2025-12-03 10:40:10 -05:00
Damian Krolik
6402a58f34 debug: coredump: stack top limit for current thread
Extend the functionality to limit the number of stack bytes
included in the core dump by allowing the limit to be
different for the current thread and remaining threads.

This is useful because it is more likely that we need more
call frames of the thread that was running when the
exception occurred than of the other threads in order to
analyze the exception.

Signed-off-by: Damian Krolik <damian.krolik@nordicsemi.no>
2025-12-03 10:40:00 -05:00
Marc Herbert
a0045c5573 doc/requirements.in: clarify they are additional, not standalone
Rephrase the file header to make sure these dependencies cannot be
misinterpreted as standalone.

The doc requirements were standalone in January 2021 as demonstrated by
commit e21ffe6baa ("requirements-doc: add PyYAML which removes
dependency on -base") and were most likely tested as standalone by CI
until January 2025 when commit b6922c83a8 ("ci: doc: add
action-zephyr-setup") added a Zephyr setup step to
`.github/workflows/doc-build.yml`

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2025-12-03 10:39:52 -05:00
Ricardo Cañuelo Navarro
e407153fd2 shields: buydisplay_3_5_tft: disable pointer axes inversion
The current configuration of the touch controller node inverts the x and
y axes, which doesn't match the current display configuration in the
ili9488_buydisplay_3_5_tft_touch_arduino node, ie. pointing to the
right/bottom side of the screen registers a touch in the left/top side.

Fix it by removing the inverted-x and inverted-y properties.

Signed-off-by: Ricardo Cañuelo Navarro <rcn@igalia.com>
2025-12-03 10:39:36 -05:00
Matthias Alleman
78b5ecff1e lvgl: input: lvgl_pointer_input: fix NULL pointer dereferencing
Fixes the dereferencing of a NULL pointer when interrupts of an
input device happen early in the application.

Signed-off-by: Matthias Alleman <matthias.alleman@basalte.be>
2025-12-03 10:39:23 -05:00
dependabot[bot]
53950396ff ci: doc: bump the doc-deps group across 1 directory with 3 updates
Bumps the doc-deps group with 3 updates in the /doc directory: [doxmlparser](https://github.com/doxygen/doxygen), [pytest](https://github.com/pytest-dev/pytest) and [python-dotenv](https://github.com/theskumar/python-dotenv).


Updates `doxmlparser` from 1.14.0 to 1.15.0
- [Release notes](https://github.com/doxygen/doxygen/releases)
- [Changelog](https://github.com/doxygen/doxygen/blob/master/doc_internal/releases.md)
- [Commits](https://github.com/doxygen/doxygen/commits)

Updates `pytest` from 8.4.2 to 9.0.1
- [Release notes](https://github.com/pytest-dev/pytest/releases)
- [Changelog](https://github.com/pytest-dev/pytest/blob/main/CHANGELOG.rst)
- [Commits](https://github.com/pytest-dev/pytest/compare/8.4.2...9.0.1)

Updates `python-dotenv` from 1.1.1 to 1.2.1
- [Release notes](https://github.com/theskumar/python-dotenv/releases)
- [Changelog](https://github.com/theskumar/python-dotenv/blob/main/CHANGELOG.md)
- [Commits](https://github.com/theskumar/python-dotenv/compare/v1.1.1...v1.2.1)

---
updated-dependencies:
- dependency-name: doxmlparser
  dependency-version: 1.15.0
  dependency-type: direct:production
  update-type: version-update:semver-minor
  dependency-group: doc-deps
- dependency-name: pytest
  dependency-version: 9.0.1
  dependency-type: direct:production
  update-type: version-update:semver-major
  dependency-group: doc-deps
- dependency-name: python-dotenv
  dependency-version: 1.2.1
  dependency-type: direct:production
  update-type: version-update:semver-minor
  dependency-group: doc-deps
...

Signed-off-by: dependabot[bot] <support@github.com>
2025-12-03 10:39:10 -05:00
Krzysztof Chruściński
be27fa38b4 soc: nordic: common: gppi_init: Move initialization earlier
GPPI initialization shall be executed as early as possible.
Add _ prefix to the initialization function to reduce chances that
other function calls uninitialized GPPI.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-03 10:38:57 -05:00
Pavel Vasilyev
9227a7c131 bluetooth: buf: Fix callback protection for ISR context
Fix assertion failure when buf_rx_freed_notify() is called from ISR
by replacing k_sched_lock with atomic_ptr operations for callback
pointer access.

The scheduler lock is retained during callback execution in thread
context to maintain backward compatibility, but is skipped in ISR
context where it's not available.

Updated documentation to clarify the behavior difference between
thread and ISR contexts.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2025-12-03 10:38:47 -05:00
Piotr Kosycarz
9cd1247615 tests: bluetooth: audio: pacs: move native_sim to common
Move platform def into common section.

Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
2025-12-03 10:38:37 -05:00
Piotr Kosycarz
20eabf354d tests: bluetooth: audio: ascs: set native_sim in common
Use native_sim for all configurations.

Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
2025-12-03 10:38:37 -05:00
Fin Maaß
0e0ff29121 drivers: regulator: Add TI tps55287
Add regulator driver for TI TPS55287 buck-boost

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-03 09:13:45 -05:00
Michał Stasiak
3603ce5626 manifest: update hal_nordic to have nRF54l errata 55 fixed
Errata needs to apply in more cases.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-03 09:13:33 -05:00
Michał Stasiak
60892a30a7 drivers: watchdog: wdt_nrfx: return expected error
According to API docs, wdt_disable() should return
EFAULT when called too early. Adjusted driver.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-03 09:13:24 -05:00
Aaron Delago
bc6edd95c7 include: storage: fixes typo in disk_access.h
Fix two typos in the disk access header file.

Signed-off-by: Aaron Delago <aarondelago@gmail.com>
2025-12-03 09:13:12 -05:00
Robert Lubos
2c21048ade net: core: Verify interface state in net_try_send_data()
Verify that the interface is in operational UP state before attempting
to send the packet with net_send_data() / net_try_send_data().

So far there's only been an NET_IF_LOWER_UP check in a lower level
function, net_if_try_send_data(), however that didn't work well with
interface like Wi-Fi, whouch could have carrier state set to ON, but
was still not associated with the network (so the interface was no
operational UP). Protocols like ICMP or DHCP, which use net_send_data()
directly, should not be able to send packets in such case.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-12-03 09:12:58 -05:00
Adam Kondraciuk
75dfc059e7 drivers: i2s: nrf_tdm: Add guards for buffers size
TDM peripheral requires TXD.MAXCNT and RXD.MAXCNT registers to be:
- multiple of 4 bytes
- larger than 8 bytes

Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
2025-12-03 09:12:29 -05:00
Fabian Blatz
de52d1df10 drivers: display: sdl: Move sdl_bottom parameters into structs
Since the number of function arguments grows out of hand, place them into
structs and pass a struct to the method instead.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-12-03 09:12:18 -05:00
Fabian Blatz
ef45a64f0d drivers: display: sdl: Add elliptical masking of display area
Adds `SDL_DISPLAY_ROUNDED_MASK` and `SDL_DISPLAY_ROUNDED_MASK_COLOR`
Kconfig options to mask a elliptical area of the display. This is useful
for prototyping alignments for rounded displays.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-12-03 09:12:18 -05:00
Mathieu Choplain
636df434b9 twister: device-handler: use --dev-id for STM32CubeProgrammer runner
Now that the STM32CubeProgrammer runner supports the standard `--dev-id`
argument, replace usage of `--tool-opt` in the Twister device handler code.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-03 09:12:09 -05:00
Mathieu Choplain
aaaf1d3992 scripts: pytest: hw_adapter: use --dev-id for STM32CubeProgrammer runner
Now that the STM32CubeProgrammer runner supports the standard `--dev-id`
argument, replace usage of `--tool-opt` in the pytest harness hardware
adapter.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-03 09:12:09 -05:00
Mathieu Choplain
f1a75d75c7 runners: stm32cubeprogrammer: add support for --dev-id
Add support for the standard `--dev-id` argument used to select
target ST-Link debug probe based on serial number. Note that this
could already be achieved using custom argument `--conn-modifiers`.
(`--dev-id <XXX>` is equivalent to `--conn-modifiers sn=<XXX>`)

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-03 09:12:09 -05:00
Mathieu Choplain
5f67dfdf41 twister: device-handler: silence no-name-in-module warning
Silence CI warning caused by line "from . import ZEPHYR_BASE". This is a
legitimate pattern, but pylint seems unable to deduce so. Many other
scripts perform a similar silencing.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-03 09:12:09 -05:00
Stanislav Bobokalo
f16f13d9e8 dts: renesas: fix syntax error in multiple DTS/DTSI files
Properties in bclk nodes were defined after the bclkout subnode,
disk subnode was defined before properties in a few boards DTS files
which violates the Devicetree Specification v0.4, section 6.3:

"Nodes may contain property definitions and/or child node definitions.
If both are present, properties shall come before child nodes."

This caused the Device Tree Compiler error:
"Properties must precede subnodes. Unable to parse input tree"

This commit moves nested nodes after properties,
fixing the syntax error and ensuring compliance with
the Devicetree Specification.

Signed-off-by: Stanislav Bobokalo <stanislav.b@embedd.it>
2025-12-03 09:12:00 -05:00
Michał Stasiak
316c363f8e modules: hal_nordic: nrfx: change symbol for pinreset GPIO
Changed symbol that configures GPIO as pinreset source,
aligning to change in nRF MDK.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-03 09:11:50 -05:00
Michał Stasiak
6e5400bd24 modules: hal_nordic: nrfx: allow SWD pins as GPIOs
Added compile definition expected by nRF MDK that configures
SWD pins as GPIOs.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-03 09:11:50 -05:00
Michał Stasiak
cb7433bc72 dts: bindings: arm: add binding for Nordic TAMPC
Added dts binding for Nordic Tamper Controller with
property to configure SWD pins as GPIOs.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-03 09:11:50 -05:00
Tony Han
e411e7e896 tests: crypto: hash: update to support testing Microchip SHA
Update to support testing crypto_hash on sama7g54_ek board.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-03 09:11:40 -05:00
Tony Han
bec0afff62 boards: microchip: sam: enable SHA in sama7g54-ek dts
Enable the SHA node in sama7g54_ek.dts file.
Add crypto to sama7g54_ek.yaml support list.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-03 09:11:40 -05:00
Tony Han
6d52c87443 drivers: crypto: hash: add driver for Microchip SHA
Add driver for Microchip Secure Hash Algorithm (SHA), update Kconfig
and make files.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-03 09:11:40 -05:00
Tony Han
39fde55680 soc: microchip: sam: update MMU for sama7g5 SHA
When SHA is activated in the DT, configure it's register region with
strong ordered, read and write access.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-03 09:11:40 -05:00
Tony Han
c1251176fb dts: arm: microchip: sama7g5: add the node for SHA
Add the node for Secure Hash Algorithm (SHA) to sama7g5.dtsi file.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-03 09:11:40 -05:00
Tony Han
ff8acc2d7a dts: bindings: crypto: add microchip,sha-g1-crypto.yaml
Add microchip,sha-g1-crypto.yaml for Secure Hash Algorithm (SHA)
controller.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-03 09:11:40 -05:00
Tony Han
ac31be0d98 drivers: crypto: Kconfig: rename Kconfig.xec to Kconfig.mchp
Rename to Kconfig.mchp for Microchip crypto drivers support.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-03 09:11:40 -05:00
Tony Han
05ef041359 dts: arm: microchip: sam: reorder the nodes by address in sama7g5.dtsi
Update the soc nodes in sama7g5.dtsi by address ascending order.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-03 09:11:40 -05:00
farsin NASAR V A
d3076f0600 tests: drivers: flash: Add support for the sam_e54_xpro board
Added sam_e54_xpro platform allow in testcase.yaml.
Added board support in main.c

Signed-off-by: farsin NASAR V A <farsin.nasarva@microchip.com>
2025-12-03 09:11:31 -05:00
Henrik Lindblom
83064c0f5c settings: apply clang-format to settings.h
The code was not formatted properly causing compliance failures.

Signed-off-by: Henrik Lindblom <henrik.lindblom@vaisala.com>
2025-12-03 09:11:03 -05:00
Henrik Lindblom
d5fc0dd6ad docs: settings: add missing docstring
The macro SETTINGS_STATIC_HANDLER_DEFINE did not have a docstring alghough
it's used in-tree more than the documented
SETTINGS_STATIC_HANDLER_DEFINE_WITH_CPRIO.

Signed-off-by: Henrik Lindblom <henrik.lindblom@vaisala.com>
2025-12-03 09:11:03 -05:00
Henrik Lindblom
41da3e91a8 docs: settings: harmonize docstring style
Use the same docstring style throughout the public header. Prefer to
have struct field documentation above the field definition instead of
placing it after using "/**<". Also use the doxygen special commands for
documenting function parameters and return values.

Signed-off-by: Henrik Lindblom <henrik.lindblom@vaisala.com>
2025-12-03 09:11:03 -05:00
Sunil Abraham
a3952ebef0 boards: microchip: PIC32CM_JH: configure clock source and frequency
Configure CPU clock using FDPLL, sourced from XOSC to achieve 48Mhz.

Signed-off-by: Sunil Abraham <sunil.abraham@microchip.com>
2025-12-03 09:10:52 -05:00
Sunil Abraham
a280bb5b9d drivers: clock_control: PIC32CM_JH: Add clock control driver
Add clock control driver.
Implement bootup clock initialization, on, off and get_rate API.

Signed-off-by: Sunil Abraham <sunil.abraham@microchip.com>
2025-12-03 09:10:52 -05:00
Sunil Abraham
236589252e dts: clock: PIC32CM_JH: Add clock control driver bindings
Add bindings for dfll, fdpll, gclk generator, mclk cpu, osc32k, rtc clock
and xosc.

Signed-off-by: Sunil Abraham <sunil.abraham@microchip.com>
2025-12-03 09:10:52 -05:00
Appana Durga Kedareswara rao
c8d6d20443 boards: amd: versalnet_apu: Add comprehensive TF-A build integration
Enable ARM Trusted Firmware support for Versal NET APU board with
platform-specific optimizations.

Changes:
- Add TF-A platform configuration (PLAT=versal_net)
- Configure board-specific TF-A parameters (TFA_NO_PM, PRELOADED_BL33_BASE)
- Add automatic TF-A module selection in Kconfig
- Update QEMU kernel loading to use TF-A bl31.elf
- Modified data address configuration to match QEMU implementation

The board now automatically builds ARM Trusted Firmware during Zephyr
application compilation with Versal NET specific optimizations.

Boot flow: Boot PDI -> TF-A -> Zephyr

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
2025-12-03 09:10:37 -05:00
Appana Durga Kedareswara rao
927584b773 modules: tf-a: Add extensible board-specific build parameter support
Enhance the TF-A build system to support board-specific build parameters
through TFA_EXTRA_ARGS mechanism.

Changes:
- Add TFA_EXTRA_ARGS variable support for board-specific parameters
- Implement proper string-to-list conversion for make argument expansion

This allows individual board configurations to specify platform-specific
TF-A build parameters without modifying the core TF-A build logic.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
2025-12-03 09:10:37 -05:00
Pieter De Gendt
7e4235ff21 scripts: ci: check_compliance: Skip generated Devicetree Kconfig symbols
Do not generate a compliance error when referring to generated Kconfig
symbols from Devicetree.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-03 11:45:00 +01:00
Aleksandr Khromykh
00fdcf0582 bluetooth: mesh: lpn shouldn't relay messages received over friendship
Commit fixes the issue when lpn device relays
broad- and group cast messages received over
friendship queue. This is specification violation,
see Table 3.13: Network layer Network PDU retransmission
requirements. Also, it does not have sense since
sending messages have already happened and lpn
just consumes extra power to retransmit useless data.
In general, lpn device will be more power efficient after
this fix.

Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
2025-12-03 11:44:34 +01:00
Haoran Jiang
e73f231ef8 dt-bindings: pinctrl: sf32lb52: Add SA port pinmux definition
Add SA port pinmux definition

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-12-03 11:44:28 +01:00
Haoran Jiang
6d4900d0b9 drivers: pinctrl: sf32lb: Preserve the SR/IS definition for each register
Only modify the definitions that need to be changed in the pinmux register;
SR/IS will retain their default values after reset.

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-12-03 11:44:28 +01:00
Haoran Jiang
7ebf5091c2 soc: sifli: sf32lb52x: Add pinctrl definition
- Add helper macros related to sifli,analog
- Standardize driver level descriptions to `DS` instead of `DS0`

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-12-03 11:44:28 +01:00
Haoran Jiang
f71beede1a dts: bindings: pinctrl: Modify pinmux binding definitions in sf32lb
- Add sifli and analog definitions
- Modify the drive-strength definition to use the original register
    definition instead of the physical current value, as different I/O
    pins may have different definitions

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-12-03 11:44:28 +01:00
Biwen Li
e6c9feabef tests: app_dev: ram_context_for_isr: fix irq_num
This commit fixes build issue when multi level interrupts is enabled,
define TEST_IRQ_NUM as (CONFIG_2ND_LVL_ISR_TBL_OFFSET - 1)
  - CMSIS/Core/Include/core_cm33.h:2438:15: error: array subscript 24
    is above array bounds of volatile uint32_t[16]

Signed-off-by: Biwen Li <biwen.li@nxp.com>
2025-12-03 11:44:03 +01:00
Chaitanya Tata
8981e4ed6b manifest: nrf_wifi: Pull fix for set station failure
Fixes issue with authentication in nRF71 set station.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-12-03 11:43:30 +01:00
Zhaoxiang Jin
a3663c8c7f drivers: counter: mcux_lptmr: add alarm support
LPTMR is a commonly used wake-up source for many NXP MCUs and
may be used as the companion low-power timer for the Cortex-M
systick. This commit enabled LPTMR set and cancel ALARM functions.

Enabling single-shot alarm support requires reprogramming
the hardware compare register (COMPARE/CMR), which is the same
resource used for the periodic TOP callback. Because of this
hardware limitation, we added Kconfig 'CONFIG_COUNTER_MCUX_LPTMR_ALARM'
to select whether alarm support is enabled. When alarm support is
enabled the driver will not allow support set TOP operation at runtime
(attempts to set TOP will return -ENOTSUP); When alarm support is
disabled the driver will not allow set and cancel ALARM operation
at runtime (attempts to set and cancel ALARM will return -ENOTSUP).
Choose the configuration that matches your application's requirements.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-03 11:43:22 +01:00
Zhaoxiang Jin
10b529709b west.yml: update hal_nxp to MCUX SDK latest release
update hal_nxp to MCUX SDK latest release (25.12.00 pvw2)

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-12-03 11:42:11 +01:00
Make Shi
8a5657427e Bluetooth: AVRCP: Mask invalid bit in absolute volume
PTS may send absolute volume values with bit 7 set, which exceed the
valid range. Instead of rejecting these values, mask the invalid bit
to ensure compatibility.

Signed-off-by: Make Shi <make.shi@nxp.com>
2025-12-03 11:41:55 +01:00
Make Shi
d58782fe1a Bluetooth: AVRCP: Return INVALID_COMMAND when PDU ID is invalid
Added a check in the vendor dependent handler to ensure the PDU ID
matches supported command handlers. If the PDU ID or command type
is invalid, respond with BT_AVRCP_STATUS_INVALID_COMMAND.

Signed-off-by: Make Shi <make.shi@nxp.com>
2025-12-03 11:41:55 +01:00
Chris Friedt
de917358aa libc: minimal: add missing ctype.h functions
Add the functions below to the minimal libc ctype.h since they are
missing, and are required as of C89 (C99 for `isblank()`)

* `isblank()`
* `islower()`
* `ispunct()`

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-12-03 11:41:43 +01:00
Chris Friedt
6b6a259b78 libc: minimal: ctype: remove unnecessary casts
A review comment in the PR below requested that unnecessary casts were
removed from ctype.h in the PR below.

https://github.com/zephyrproject-rtos/zephyr/pull/99451

Tested with manual compilation in C and C++ mode with the arguments
```shell
gcc -Wconversion -Werror -Wall -Wextra -Wint-conversion
clang -Wconversion -Werror -Wall -Wextra -Wint-conversion
gcc -Wconversion -Werror -Wall -Wimplicit--Wextra
clang++ -Wconversion -Werror -Wall -Wextra
```

and also with `-- -DCONFIG_COMPILER_WARNINGS_AS_ERRORS=y`

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-12-03 11:41:43 +01:00
Chris Friedt
6b393c7106 libc: minimal: ctype: express ctype limits in more direct fashion
Based on review feedback, it was suggested to express ctype
character checks in a more direct fashion, rather than using
arithmetic, and allow the compiler to optimize as it sees fit.

https://github.com/zephyrproject-rtos/zephyr/pull/99451#\
discussion_r2530339430

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-12-03 11:41:43 +01:00
Chris Friedt
8a2442fadd libc: minimal: ctype: use unsigned int instead of unsigned
The "check warns" workflow in CI warned over the use of `unsigned` as a
shorthand for `unsigned int` in several locations in
`lib/libc/minimal/include/ctype.h`.

```
 UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned'
File:lib/libc/minimal/include/ctype.h
```

Adjust `unsigned` to `unsigned int` to avoid linter warnings.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-12-03 11:41:43 +01:00
Bindu S
473db1d26e boards: intel: adl: Added alias for pwm
Added pwm alias for ADL-N platform.

Signed-off-by: Bindu S <bindu.s@intel.com>
2025-12-03 11:41:33 +01:00
Bindu S
64a3e11ee0 samples: drivers: uart: async_api: Added overlay to support ADL-n platform
Added support for async api application on ADL-n platform

Signed-off-by: Bindu S <bindu.s@intel.com>
2025-12-03 11:41:33 +01:00
Holt Sun
888bd699d5 soc: nxp: mcx: mcxe24x: enable LMEM I-cache and cache management
Select CPU_HAS_ICACHE and HAS_MCUX_LMEM_CACHE.
Default CACHE_MANAGEMENT=y and select EXTERNAL_CACHE.
Prepares MCXE24x to use the LMEM cache driver.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-03 11:41:13 +01:00
Holt Sun
e179f48a8c drivers: cache: add NXP LMEM cache driver
Add LMEM cache driver implementing instruction cache ops.
Wire driver into cache Kconfig menu and CMake build.
Enables I-cache control on SoCs with NXP LMEM controller.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-03 11:41:13 +01:00
Holt Sun
e881029ae8 modules: hal_nxp: mcux: add HAS_MCUX_LMEM_CACHE and hook LMEM for MCXE24X
Select cache_lmem component for MCXE24X devices.
This exposes the LMEM cache API needed by the Zephyr driver

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-03 11:41:13 +01:00
Sreeram Tatapudi
d0cda31dc4 MAINTAINERS: Adding airoc wifi driver
Adding Infineon AIROC drivers to the Infineon Platforms

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-12-02 21:00:55 -05:00
Yongxu Wang
0626d57441 MAINTAINERS: Add Yongxu Wang as Firmware collaborator
Add myself as a collaborator for the firmware drivers subsystem.
I have been actively contributing to SCMI protocol implementations
and will continue developing new features, reviewing patches,
and testing firmware functionality

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-12-02 21:00:12 -05:00
James Roy
44106ac05f edtlib: binding: Add a examples keyword
Add an `examples` keyword to the binding to
provide a minimal example node for the binding.

Signed-off-by: James Roy <rruuaanng@outlook.com>
2025-12-02 20:53:01 -05:00
Mathieu Choplain
d770c6ce13 docs: bindings-syntax: re-add note about title being optional
When originally introduced in [1], `title` was described as optional, but
this information was lost when the documentation was reworked in [2], even
though the underlying behavior in edtlib is unchanged.

Update the documentation to indicate that that `title` is optional. While
at it, fix a little typo in modified paragraph.

[1]: ee17657ad3
[2]: 3a2f839d45

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 20:52:49 -05:00
Anton Puppe
043a725b1f edtlib: Fix unformatted error message
Adds a missing f in the second line of a multiline f-string.
Previously, having the wrong top-level keys in a DTS binding YAML file
could cause a partially unformatted error message to be printed.

Signed-off-by: Anton Puppe <anton-noel-flynn.puppe@zeiss.com>
on-behalf-of: @ZEISS anton-noel-flynn.puppe@zeiss.com
2025-12-02 20:52:34 -05:00
Mathieu Choplain
18b62a567f doc: kconfig: document "named choices" as a language extension
When creating a "choice" block, it is possible to associate a name to the
choice, resulting in a so-called "named choice" being created. This allows
modification of the choice after its initial declaration - for example, its
default value can be overridden from another Kconfig file.

This feature originates from Linux and is supported by Kconfiglib; however,
since [1] (first found in release v6.9), Linux no longer supports this
feature. Critically, this means that the feature is no longer covered by
the Linux Kconfig Language documentation [2], even though it is supported
and used in Zephyr.

Add "named choices" to the Kconfig language extensions documentation page
since it has de facto become an extension after its support was dropped
from Linux.

[1] c83f020973bc72d9eec65474d8c47495191aef20 (on Linux source tree)
[2] https://www.kernel.org/doc/html/latest/kbuild/kconfig-language.html

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 19:02:38 -05:00
Mahesh Mahadevan
2c7d560c71 MAINTAINERS: Update the NXP maintainers list
Update the NXP area maintainers and collaborators

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-12-02 18:45:35 -05:00
Fabian Blatz
25d96b2589 modules: lvgl: Prevent false pointer input events
Fixes an issue where input events which have the sync flag set but are
neither X/Y coordiante updates nor press/release updates triggers a false
reporting of input to LVGL.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-12-02 18:41:42 -05:00
Scott Worley
8824b288dd boards: microchip: mec_assy6941: Add MEC1653B to board docs
We added information about MEC1653B to the mec_assy6941 board
documentation.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-12-02 18:41:18 -05:00
Scott Worley
c00ca4497b boards: microchip: mec_assy6941: Add support for MEC1653B
We added support for the MEC1653B daughter card on the
mec_assy6941 EVB base board. We removed variant specific
kconfig files since none of the boards require board
specific settings.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-12-02 18:41:18 -05:00
Scott Worley
91e7959c94 soc: microchip: mec: Add MEC165xB chip series
We add Microchip MEC165xB SoC series.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-12-02 18:41:18 -05:00
Scott Worley
e9e8d1ee52 dts: arm: microchip: mec: Add MEC165xB chip device tree files
We add MEC165xB chip device tree files. We are sharing the
same base mec5.dtsi which required modifications due to
peripherals not present in MEC165xB.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-12-02 18:41:18 -05:00
Alexander Kozhinov
fa5a2c7d94 tests: lib: devicetree: api: add new macro tests
add tests for DT_STRING_TOKEN_BY_IDX_OR macro
add tests for DT_INST_STRING_TOKEN_BY_IDX_OR macro

Signed-off-by: Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
2025-12-02 18:41:09 -05:00
Alexander Kozhinov
047cec8a34 zephyr: devicetree: add string token helper macros
This commit introduces the DT_INST_STRING_TOKEN_BY_IDX_OR()
and DT_STRING_TOKEN_BY_IDX_OR() macros, which allow
specifying a default value if the indexed string token is not
defined.

Signed-off-by: Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
2025-12-02 18:41:09 -05:00
Adrien Lessard
87d52f4993 drivers: serial: stm32: fix locked pm state
When not using the async API, the rx_woken flag can be set but cannot be
cleared, leading to an indefinitely locked pm state. This commit
prevents the flag from being set when not using the async API.

Signed-off-by: Adrien Lessard <adrien.lessard.42@gmail.com>
2025-12-02 18:40:58 -05:00
Radosław Koppel
9b35906861 Bluetooth: GATT: Simplify GAP write_name and apperance_write
Update write_name function to check the offset value against 0 as long
writes are not used here.
Simplify write_appearance function also to remove long writes support.
The appearance property is always 16 bit and is should not even support
long writes.

Signed-off-by: Radosław Koppel <r.koppel@k-el.com>
2025-12-02 18:40:50 -05:00
Ibrahim Abdalkader
78429c804b dts: arm: st: h7: delete ITCM/DTCM nodes from M4 devicetree
Delete the ITCM and DTCM nodes from all M4-specific devicetree.

Signed-off-by: Ibrahim Abdalkader <i.abdalkader@gmail.com>
2025-12-02 18:40:42 -05:00
Ibrahim Abdalkader
a794f8eb8b dts: arm: st: h7: add ITCM and DTCM memory regions for STM32H7
Add ITCM and DTCM memory region definitions to the common STM32H7
devicetree.

ITCM: 64 KB @ 0x00000000
DTCM: 128 KB @ 0x20000000

Signed-off-by: Ibrahim Abdalkader <i.abdalkader@gmail.com>
2025-12-02 18:40:42 -05:00
Dmitrii Sharshakov
956063604b drivers: led: shell: avoid implicit conversion to boolean
Use a clear and style-adherent condition format.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-12-02 18:38:53 -05:00
Johan Hedberg
24842b852a MAINTAINERS: Remove Johan & Chris from release notes
Remove the 4.3 release managers from the maintainers list for the release
notes.

Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
2025-12-02 18:38:45 -05:00
Yuvraj Khadke
b7dc36f186 sensors: dps310: Added dps368 node for CY8CKIT-062S2-AI
Enable DPS310 and I2C in DTS
for Infineon CY8CKIT-062S2-AI kit.

Fixes #97948

Signed-off-by: Yuvraj Khadke <yuvraj.khadke@infineon.com>
2025-12-02 15:49:39 -05:00
Holt Sun
ce186be5fa tests: settings: its: enable lpcxpresso55s69_cpu0_ns platform
Enable the lpcxpresso55s69_cpu0_ns board for the Internal Trusted
Storage (ITS) settings test case. This platform supports the required
settings subsystem functionality needed for ITS testing.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-12-02 15:49:22 -05:00
Szymon Janc
c37f0567b1 Tests: Bluetooth: tester: Update LL overlay configuration
Match number of supported periodic advertising instances with
configure extended advertising instances and increase number
of advertising buffers to match qualification tests requirements.

Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
2025-12-02 15:24:00 -05:00
Camille BAUD
3b9007ad93 boards: Add flash to supported for bflb boards
Adds the flash to supported for testing

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-02 15:23:13 -05:00
Camille BAUD
20c16ee36b soc: bflb: Enable Flash Controller
Enable the flash controller. Relocation is required.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-02 15:23:13 -05:00
Camille BAUD
05520bcf9f dts: bflb: Enable Flash Controller
Enable the Flash Controller

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-02 15:23:13 -05:00
Camille BAUD
a2a7463ec0 drivers: flash: Introduce BFLB flash controller
Introduce Bouffalolab Flash Controller with support for bank 1

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-12-02 15:23:13 -05:00
McAtee Maxwell
61100bb14f drivers: clock_control: bugfix pse84 frequencies by fixing dpll support
- fix dpll_hp support
- add dpll_lp support for kit_pse84_*
- update kit_pse84_eval dts for dpll fixes
- update kit_pse84_ai dts for dpll fixes

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-12-02 15:23:03 -05:00
McAtee Maxwell
95184d330d drivers: clock_control: bugfix frequency on psc3 by adding dpll support
- add dpll_lp support to infineon clock_control drivers
- update psc3 dts for fix

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-12-02 15:23:03 -05:00
Vinayak Kariappa Chettimada
9351a1ab79 samples: Bluetooth: observer: Fix Extended Scanning on BBC Micro:bit
Fix configuration overlay file to support observer sample
with Extended Scanning on BBC Micro:bit board.

Due to slow CPU, there were assertions and, this commit
addresses them by defaulting to use of BT_CTLR_LOW_LAT.

Asserts mitigated:

- ASSERTION FAIL [start_us == (aux_start_us + 1U)]
  @ WEST_TOPDIR/zephyr/subsys/bluetooth/controller/ll_sw/
  nordic/lll/lll_scan_aux.c:359
  This will happen for small aux offset value, definitely
  for the 300 us because CPU usage latency to setup such
  auxiliary PDU reception on nRF51 is high due to slow CPU.

- ASSERTION FAIL [0]
  @ WEST_TOPDIR/zephyr/subsys/bluetooth/controller/ll_sw/
  nordic/lll/lll_scan_aux.c:592
    prepare_cb: Actual EVENT_OVERHEAD_START_US = 579
  This will happen due to CPU usage latencies scheduling
  the radio events, due to slow CPU.

Relates to commit eba31282e8 ("samples: Bluetooth:
observer: Extended Scanning on BBC Micro Bit board").

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2025-12-02 15:22:52 -05:00
Vinayak Kariappa Chettimada
57e8cf516c Bluetooth: Controller: Fix BT_CTLR_LOW_LAT scan disable hang
When using BT_CTLR_LOW_LAT and LLL_PRIO equals ULL_LOW_PRIO,
add missing mayfly_enable() call for ULL_LOW execution
context, without this ticker_stop() does not get processed.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2025-12-02 15:22:52 -05:00
Raffael Rostagno
b3d34a20f6 drivers: sensor: dietemp: esp32: Update driver
Update driver to new version, from legacy driver.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-12-02 15:22:30 -05:00
Stoyan Bogdanov
57ea97ca8e tests: build_all: counter: Enable GPIO in prj.conf
Add missing CONFIG_GPIO in prj.conf which cause fails
while testing drivers which use GPIOs

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
7af8403a51 tests: sensor: Add microcrystal,rv3032-temp in build_all test suite
Ensure this driver is tested in the build_all test suite.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
1659a967e6 tests: counter: Add microcrystal,rv3032-counter in build_all test suite
Ensure this driver is tested in the build_all test suite.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
036cd7a451 tests: rtc: Update microcrystal,rv3032 in build_all test suite
Update rv3032 to reflect latest chanes to the driver.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
641ec27106 drivers: sensor: rv3032c7: Add temperature sensor driver for rv3032
Expose internal temperature sensor for rv-3032-c7. Driver is reporting
temperature from internal deice sensors and have HIGH an LOW temperature
treshhold which are triggering interrupts. I2C communication and IRQ are
handled from parent MFD driver.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
5028aa4036 drivers: counter: rv3032c7: Add rv3032 counter driver
Expose timer functionality from rv-3032-c7 via counter api.
I2C communication and IRQs are arbitrated via MFD parent driver
for rtc, sensor and counter at once.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
1a93d33d29 drivers: rtc: rv3032: Rework driver to use MFD driver
Rework rv3032 implementaion to use MFD driver unstead of local
implementaion for I2C access and Interrupt managements. This way
could be utilized parts which are not implemented because did not fit
in to RTC api - counter and temperature sensor. To have propper
sincronization arbitration is need which is handled from mfd_rv3032.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
c7bf6e83d6 dts: bindings: rv3032: Remove backup from rtc driver
Remove backup flag from RTC driver and move it to parent instead.
RTC driver still can access the values of the flags but MFD need
to know what is expected in term of initial behaviour.
Some assumptions done in RTC driver are causing inconsistant behaviour.
We cannot assume that the RTC alarms and notifications need to be
cleaned only if POR bit is triggered. We can have situation where
whole system go throigh soft restart and need to zero RV3032, so driver
need to have option to allow that kind of behaviour.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
f39882472a dts: bindings: rtc: Update rv3032 bindings
Remove gpio-int since interrupts will be managed from MFD driver
insted, acticting like dispatcher for interrupts.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
395d97bf81 drivers: rtc: Kconfig: Update rv3032 Kconfig to utilize MFD driver
Add dependecy for MFD driver and remove I2C dependency since it will
be managed from MFD driver together with interrupts.

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
Stoyan Bogdanov
4d1713a07e drivers: mfd: rv3032: Add MFD driver for rv3032
Add MFD driver for managing rv3032 functionality which did not fit RTC
api. That way are implemented part which otherwise will not be used:
- RTC
- counter/timer
- temperature sensor

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-12-02 15:20:56 -05:00
S Mohamed Fiaz
376747f2dd tests: gpio: siwx917_rb4342a: Add gpio_basic_api overlay files
This commit adds the GPIO overlay files for the brd4342a board,
enabling gpio_basic_api support in Zephyr.

Signed-off-by: S Mohamed Fiaz <Fiaz.Mohamed@silabs.com>
2025-12-02 15:20:47 -05:00
Mathieu Choplain
6cab9e7343 boards: st: *c0: add missing wake-up pins
On the STM32C0 series, the availability of certain wake-up pins depends on
the exact SoC in use. To avoid providing a large amout of SoC DTSI files,
boards are responsible for defining these "optional" wake-up pins inside
their own DTS.

Update existing STM32C0 boards' DTS to include the missing wake-up pins.
While at it, align Nucleo-C092RC which has the pins, but no comment about
why they are provided.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 15:20:11 -05:00
Trond F. Christiansen
e716bb7546 tests: zbus: add channel name test suite
Add tests to verify the zbus_chan_from_name() functionality

Signed-off-by: Trond F. Christiansen <trond.christiansen@nordicsemi.no>
2025-12-02 15:19:32 -05:00
Trond F. Christiansen
46eca1e3a9 zbus: add zbus_chan_from_name() function
Add a new API function zbus_chan_from_name() that allows retrieving a
zbus channel by its name string. This complements the existing
zbus_chan_from_id() function and provides more flexibility for channel
lookup operations.

The implementation is conditionally compiled when CONFIG_ZBUS_CHANNEL_NAME
is enabled, ensuring it's only available when channel names are configured
in the system.

Signed-off-by: Trond F. Christiansen <trond.christiansen@nordicsemi.no>
2025-12-02 15:19:32 -05:00
Fin Maaß
5c152e19fa drivers: gpio: use I2C_INIT_PRIORITY as default for gpio chips on i2c bus
use I2C_INIT_PRIORITY as default for gpio chips,
that are on a i2c bus.

If childs have the same priority as their parents,
the init order is decided by the devicetree ordinals.
This ensures, that these childs are init after their parent.
Because of that gpio chips on a i2c bus can have the
same priority as the i2c controller.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-02 15:19:24 -05:00
Fin Maaß
66f572e24b drivers: gpio: Kconfig: use if for pca95xx and pca_series
use if instead of multiple depends on for pca95xx and pca_series GPIO
Kconfig files to improve readability.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-02 15:19:24 -05:00
Emil Gydesen
9155e50d3d doc: releases: Fix duplicate Bluetooth entry
There were 2 entries for Bluetooth in the New APIs and options

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-02 15:19:13 -05:00
Pieter De Gendt
5c56bf0240 tests: unit: util: Add tests for COND_CASE_1
Add test cases for the COND_CASE_1 macro.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-02 15:19:02 -05:00
Pieter De Gendt
0d43cd2ba0 sys: util: Add COND_CASE_1 macro
Add a switch/case like variant of the COND_CODE_1 macro where the first
flag that equals 1 has its value expanded, with a default fallback.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-02 15:19:02 -05:00
Martin Hoff
ff3637bf83 soc: silabs: siwx91x: enabled clock control by default for siwx91x soc
Enable clock control by default for siwx91x SoCs. Moreover, most
drivers for siwx91x soc depend on clock control, but didn't declare
it.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-02 15:18:53 -05:00
Yves Wang
bf9f4c0cee ci: compliance: Correct dts-linter install cmd
Install dts-linter requires prefix for package.json

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-12-02 15:18:43 -05:00
Mathieu Choplain
16a14f9dd8 boards: st: *: use lowercase hex for properties
Update various properties using hex values in STM32 boards DTS to comply
with the DTS Coding Style which says that "hex values in properties should
use lowercase hex".

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 15:18:36 -05:00
Mathieu Choplain
c30fd6e3e4 dts: arm: st: *: use lowercase hex for vrefint-cal-addr property
Update all `vrefint-cal-addr` properties in STM32 DTSI to comply with DTS
Coding Style which says that "hex values in properties should use lowercase
hex".

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 15:18:36 -05:00
Mathieu Choplain
e9e1d12496 dts: arm: st: *: use lowercase hex for dietemp cal-addr properties
Update all `cal-addr` properties in STM32 DTSI to comply with DTS Coding
Style which says that "hex values in properties should use lowercase hex".

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 15:18:36 -05:00
Mathieu Choplain
9176880f25 dts: arm: st: *: use lowercase hex for reg property
Update all `reg` properties in STM32 DTSI to comply with DTS Coding Style
which says that "hex values in properties should use lowercase hex".

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 15:18:36 -05:00
Fabio Baltieri
db1a4f6e54 ci: pr_metadata_check: add a concurrency key
Add a concurrency key so old runs are cancelled automatically.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-12-02 15:18:18 -05:00
Fabio Baltieri
d646664406 ci: pr_metadata_check: timeout after 30mins
This workflow spins forever if the manifest workflow does not run, and
apparently sometimes GitHub "forgets" to run it.

Add a timeout so that this fails after some time rather than the whole
6h timeout.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-12-02 15:18:18 -05:00
Qingsong Gou
f45b55404f boards: sifli: sf32lb52_devkit_lcd: enable reset
Enable reset on sf32lb52_devkit_lcd board

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-02 16:16:20 +00:00
Mathieu Choplain
bfef7e6de9 soc: st: stm32: reorganize family-wide common Kconfig
Split STM32 family-wide common Kconfig in two separate files: a new Kconfig
file `soc/st/stm32/common/Kconfig` to hold options that affect the common
code found in the same directory, and the existing top-level Kconfig file
`soc/st/stm32/Kconfig` which now only holds options used by multiple series
but not consumed by the common code - for example, options that are used by
SoC-specific code or consumed by the STM32Cube HAL module go in this file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 16:16:13 +00:00
Mathieu Choplain
236e0d0765 soc: st: stm32: use autogenerated compatible Kconfig macro variables
Instead of defining our own, use the DT_COMPAT_<> macro variables generated
by the build system inside the STM32 SoC Kconfig file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 16:16:03 +00:00
Yasushi SHOJI
912dd66608 boards: sc: Add SC-OBC module V1 support
Add initial board support for the Space Cubics SC-OBC Module V1. The
hardware is based on an AMD Versal AI Edge VE2302 and a Microchip
IGLOO2. This Zephyr port runs on the Versal device’s Real-Time Processing
Unit (dual Arm Cortex-R5F).

This commit is the first in the series and only supports the basic devices
needed to run samples/hello_world and samples/philosophers. Specifically,
it adds the Cortex-R5F, UARTs, and the GIC interrupt controller.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2025-12-02 16:15:49 +00:00
Erwan Gouriou
eefebb4555 dts: stm32l4: Clean up comment from can nodes
Remove use less comments

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-12-02 16:15:29 +00:00
Jilay Pandya
a3ce6ccb0a drivers: tmc51xx: move DT_DRV_COMPAT to tmc51xx.c
TMC51XX would have to be remodeled as a mfd, this means
that each device tmc51xx, tmc51xx_motion_controller and
tmc51xx_stepper_driver will have their own DT_DRV_COMPATs.
Whenever the common header is included as of now, the
adi_tmc51xx DT_DRV_COMPAT would have to be undef-ed each time
in order to define a new DT_DRV_COMPAT i.e. required by the devices
of the tmc51xx mfd.

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-12-02 16:14:47 +00:00
Mathieu Choplain
d49fc11661 drivers: usb: udc: stm32: instance-aware ULPI reset GPIO handling
Make ULPI reset GPIO accessible via a pointer in the instance configuration
block, initialized only when the instance's PHY is an ULPI PHY with the
corresponding property. Check at runtime during instance initialization for
this GPIO, and perform appropriate action depending on its presence.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 16:14:37 +00:00
Mathieu Choplain
4c51bf6987 drivers: usb: udc: stm32: instance-aware disconnect GPIO handling
Make disconnect GPIO accessible via a pointer in the instance configuration
block, initialized only when the instance does have it as property. Always
provide the HAL_PCDEx_SetConnectionState() callback which configures the
GPIO when present in the instance configuration block.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 16:14:37 +00:00
Mathieu Choplain
659c6e91f2 drivers: usb: udc: stm32: instance-aware message queue handling
Move message queue backing buffer inside instance data block to reduce
usage of globals. The message queue structure itself was already inside the
instance data block, only the initialization code needed an update.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 16:14:37 +00:00
Mathieu Choplain
d3769f7385 drivers: usb: udc: stm32: instance-aware worker thread handling
Obtain the stack info for each instance's worker thread from the instance
configuration block instead of using globals.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 16:14:37 +00:00
Mathieu Choplain
419860eb97 drivers: usb: udc: stm32: instance-aware pinctrl configuration handling
Use pinctrl from the instance configuration block instead of global object.
Create pinctrl on all series (even STM32N6) and always attempt to configure
it, but don't treat empty configuration as an error to allow pinctrl-less
series to work.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 16:14:37 +00:00
Mathieu Choplain
a06a97c40a drivers: usb: udc: stm32: instance-aware EP configurations handling
Get rid of global macro USB_NUM_BIDIR_ENDPOINTS by using the direct DT
macro when creating the endpoint configuration arrays and initializing
the instance configuration block. Access the endpoint configurations
through the instance configuration block instead of using global objects.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 16:14:37 +00:00
Mathieu Choplain
eccb243bdf drivers: usb: udc: stm32: instance-aware IRQ configuration handling
Get rid of global macros UDC_STM32_IRQ and UDC_STM32_IRQ_PRI by using the
direct DT macro when initializing the instance configuration block, and
performing IRQ_CONNECT() in a per-instance function called indirectly via
the instance configuration block.

While at it, get rid of the driver's useless ISR wrapping layer: the Zephyr
ISR calling convention just so happens to allow using the HAL IRQ handler
directly without a trampoline, which is slightly faster and ought to use
less ROM.

Note that global UDC_STM32_IRQ_NAME is still consumed, but it will be
replaced by another mechanism as part of the final step of multi-instance
support implementation.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-12-02 16:14:37 +00:00
Valerio Setti
f5ec45bf49 tests: benchmark: renew Mbed TLS crypto testing
The previous source file was copied from Mbed TLS several years ago and
since then not many updates were made. For example:
- testing stopped at CTR-DRBG exiting with failure;
- emulation wasn't really catching any output so a timeout of 60 seconds
  was required in order to fully complete the testing;
- the "harness: crypto" was preventing the code from being really tested
  with twister.

Last but not least, all of the functions used here belong to the legacy
Mbed TLS crypto support that is going to be removed from the next
TF-PSA-Crypto release.

The goal of this commit is to renew the test code making it really usable
and testable. For the time being hash and ciphers are tested, but
asymmetric key testing can be added in the future if desired.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 16:14:25 +00:00
Valerio Setti
e41a4098b5 tests: mbedtls: remove crypto.mbedtls
The file "mbedtls.c" was copied from upstream Mbed TLS several years ago
and since then only minor fixes has been added when failing, no real
upgrade was made since then.

Reasons for removal include:
- some of the symbols were already removed (ex: MD2, MD4, RIPEMD160, ARC4,
  etc) but their testing was not removed;
- most of the code is guarded but "prj.conf" doesn't set any Kconfig
  related to the crypto features in Mbed TLS, so likely only the default
  ones are really tested;
- last but not least all of these "mbedtls_xxx_self_test()" function will
  disappear in the next TF-PSA-Crypto release so they cannot be maintained
  here.

This suite is replaced with tests in "zephyr/tests/crypto/mbedtls_psa".

"MAINTAINERS.yml" was also updated in this commit in order to reflect
this removal and add path for existing tests.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 16:14:25 +00:00
Valerio Setti
ad8ffe9c14 tests: crypto: mbedtls_psa: add tests for hash, hmac and cipher
Extend current testing of Mbed TLS' PSA Crypto API adding hash and hmac
functions.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 16:14:25 +00:00
Valerio Setti
97e4511a03 doc: migration-guide: add note for JWT_SIGN_RSA_LEGACY removal
Add a note about CONFIG_JWT_SIGN_RSA_LEGACY removal. The note also includes
details on why this removal is done before the usual Zephyr deprecation
period.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 16:14:11 +00:00
Valerio Setti
6ebc151f6d tests: subsys: jwt: remove tests for legacy RSA support
Since support for CONFIG_JWT_SIGN_RSA_LEGACY has been removed,
corresponding tests should be removed as well.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 16:14:11 +00:00
Valerio Setti
597fc3bbe1 jwt: remove support for legacy RSA crypto
CONFIG_JWT_SIGN_RSA_LEGACY was already deprecated, but we agreed on
removing all usages of legacy Mbed TLS crypto from Zephyr codebase quickly
in order to prepare for the transition to Mbed TLS 4.0/TF-PSA-Crypto 1.0.

Therefore this commit remvoes support for CONFIG_JWT_SIGN_RSA_LEGACY
before the deprecation period expires.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 16:14:11 +00:00
Marek Matej
d5d8bb17fa samples: espressif: Flash multicore sharing example
This is a simple example of sharing flash access between multiple CPU
cores.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2025-12-02 16:13:52 +00:00
Marek Matej
4c62fee6eb drivers: flash: esp32: flash access supervisor
Add support to access flash from remote CPU cores.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2025-12-02 16:13:52 +00:00
Sumit Batra
8d8fdbd7e0 boards: nxp: mr_canhubk3: add mcuboot variant and document sysbuild
Add an mcuboot board variant under the S32K344 SoC in board.yml.
New target is - mr_canhubk3/s32k344/mcuboot. This enables a
single sysbuild invocation to build MCUboot and the application.
Also make a common dtsi for all mr_canhubk3 board variants.

Extend the board documentation with an “MCUboot (sysbuild)” section
that:

Shows one-command sysbuild to produce both MCUboot and app
Documents signing via sysbuild (SB_CONFIG_BOOT_SIGNATURE_*),
and where the signed artifacts are generated.

Provides simple flashing instructions and a troubleshooting
note about using a 1 KiB (0x400) image header and not emitting
an IVT for chain-loaded apps.

Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
2025-12-02 16:12:51 +00:00
Sumit Batra
3edbc3762c soc: nxp: s32k3: gate IVT emission when chain-loaded by MCUboot
Emit the IVT section and IVT header only when XIP and the image is either
a standalone XIP app or MCUboot itself. Do not emit the IVT when the
Zephyr image is chain-loaded by MCUboot (BOOTLOADER_MCUBOOT=y).

- linker.ld/sections.ld: place .ivt_header at IVT_HEADER only under
XIP && (!BOOTLOADER_MCUBOOT || MCUBOOT).
Provide __ivt_region_start/end symbols.
- soc.c: guard IVT struct under the same condition and mark it 'used'
so the linker keeps it when needed.
- Kconfig.defconfig - Make the bootloader and the sign tool compatible
with the vector table.

This avoids populating 0x400000 IVT from the app image while retaining it
for MCUboot or standalone XIP use-cases.

Files:
- soc/nxp/s32/s32k3/linker.ld
- soc/nxp/s32/s32k3/sections.ld
- soc/nxp/s32/s32k3/soc.c
- soc/nxp/s32/s32k3/Kconfig.defconfig

Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
2025-12-02 16:12:51 +00:00
Sumit Batra
1b2517b9b6 soc: nxp s32k3: derive sys clock from devicetree
Use devicetree to provide the system clock frequency for S32K3
instead of hardcoding it in board defconfigs.

- Add clock-frequency to /cpus/cpu@0 in nxp_s32k344_m7.dtsi using
DT_FREQ_M(160).
- Define DT_SYSCLK_PATH and derive SYS_CLOCK_HW_CYCLES_PER_SEC from
the sysclk node via dt_node_int_prop_int() when CORTEX_M_SYSTICK.
- Remove CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC from mr_canhubk3

This keeps the clock configuration in a single SoC-level place,
aligns S32K3 with other NXP Cortex-M SoCs, and ensures both the
MCUboot and application builds share the same
SYS_CLOCK_HW_CYCLES_PER_SEC.

Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
2025-12-02 16:12:51 +00:00
Sumit Batra
1be79f0c92 dts: nxp: Add binding for C40 flash and flash controller
Introduce DT bindings for on-chip C40 flash and its controller
and describe their corresponding nodes in nxp_s32k344_m7.dtsi.

- Binding: dts/bindings/mtd/nxp,c40-flash.yaml
Erase/write block sizes.

- Binding: dts/bindings/flash_controller/nxp,c40-flash-controller.yaml
Describe flash device (child) ranges

- SoC nodes:  With the new compatible and geometry
properties. Keep status = "disabled" at the SoC level
so boards opt-in.

This prepares the platform for using Zephyr’s flash API / FLASH_MAP /
MCUboot with internal code flash.

Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
2025-12-02 16:12:51 +00:00
Sumit Batra
404556e36c drivers: flash: Add MCUX C40 flash controller driver
Add flash controller driver for the on-chip C40 flash controller
The driver is backed by the MCUX C40 HAL and implements
read/erase/program, page layout, and an optional protection policy
that can lock well-known regions (IVT/MCUboot) derived from devicetree.

Key details:
- Selects FLASH_HAS_DRIVER_ENABLED / FLASH_HAS_EXPLICIT_ERASE /
FLASH_HAS_PAGE_LAYOUT.
- Runs erase/program from SRAM when XIP by relocating both the shim and
the MCUX HAL source if CODE_DATA_RELOCATION_SRAM=y.
- Optional protection pass at init (FLASH_MCUX_C40_APPLY_PROTECTION),
which aligns windows to sector boundaries and applies lock/unlock
using the HAL. This is useful on XIP systems to keep IVT/bootloader
ranges read-only; can be disabled if a bootloader or security policy
manages protection instead.

Files:
- drivers/flash/flash_mcux_c40.c (new)
- drivers/flash/CMakeLists.txt (+zephyr_code_relocate when needed,
Compliance fixes)
- drivers/flash/Kconfig.mcux (enable flash driver, reloc & protection)
- modules/hal_nxp/mcux/mcux-sdk-ng/drivers/drivers.cmake

Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
2025-12-02 16:12:51 +00:00
Omeed Baboli
1034ba6b9b drivers: sensor: qdec_stm32: add sensor channel for encoder counts
Add a sensor channel for the encoder counts. This is useful for
reading the encoder counts and calculating an absolute position
of a linear actuator.

Signed-off-by: Omeed Baboli <omeedbaboli@gmail.com>
2025-12-02 16:12:35 +00:00
Muzaffar Ahmed
d31c6e9503 drivers: wifi: siwx91x: Fix link mode query for AP mode in channel 14
Add a channel check to update the link mode in wifi status query.

Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
2025-12-02 12:31:30 +00:00
Siratul Islam
86db58627a boards: xtensa: add support for WEMOS LOLIN32 Lite
Add board support for the WEMOS LOLIN32 Lite, a compact ESP32-D0WDQ6/
ESP32-D0WD-V3 based development board with integrated Wi-Fi and BLE.

Features:
- 4MB flash (W25Q32)
- Onboard battery charging (TP4054, PH-2 connector)
- CH340C USB-to-serial converter
- Onboard LED on GPIO22
- Micro-USB or USB Type-C variants

Signed-off-by: Siratul Islam <email@sirat.me>
2025-12-02 12:31:22 +00:00
Maochen Wang
cf6e450f5a manifest: fix double-free assertion in TLS 1.3 case of hostap
In TLS 1.3, when mbedtls_ssl_read() returns an error, wpabuf_free() is
called twice: first in tls_connection_handshake() and then again in
eap_tls_process_input(), leading to an assertion failure. Remove the
redundant wpabuf_free() to prevent the double-free issue.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2025-12-02 12:30:57 +00:00
Maochen Wang
bdaf732c44 samples: net: wifi: fix PEAP connection failure on RW612
PEAP Wi-Fi connections on RW612 may fail due to memory allocation
errors in mbedTLS. Increasing the mbedTLS heap size resolves this
issue.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2025-12-02 12:30:57 +00:00
Maochen Wang
198592a505 hostap: disable TLS 1.3 for PEAP-TLS phase2
The supplicant currently supports TLS 1.3 only for EAP-TLS. To prevent
TLS handshake failures in PEAP-TLS phase2, add the flag
'tls_disable_tlsv1_3=1' to phase2 configuration, ensuring TLS 1.3 is
disabled for inner authentication.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2025-12-02 12:30:57 +00:00
Luis Ubieda
b0646f3d03 modules: hal_afbr: Add binary blobs with FPU
To work with applications using Floating point math.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-12-02 12:30:28 +00:00
Aksel Skauge Mellbye
e61c04e05d drivers: entropy: gecko_trng: Fully initialize on read
If the TRNG has been unretained, it's not sufficient to enable
the clock, it must be fully reinitialized.

This is a minimal fix to ensure entropy is accumulated after sleep.
Long term, this driver should be made to use device power
management with power domain awareness.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-12-02 12:29:14 +00:00
Yangbo Lu
ad205339ef samples: net: gptp: add default case for status switch statement
Added default case for status switch statement.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-02 11:45:19 +01:00
Yangbo Lu
548d0008b6 samples: net: dsa: improve code quality
Improved code quality with below changes.
- Avoided declaration shadowing variable in the global scope.
- Avoided missing default in switch block.
- Dropped unused variable.
- Reduced the level of if statements properly.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-02 11:45:19 +01:00
Yangbo Lu
40594fa40c samples: net: add Ethernet bridge sample
Added Ethernet bridge sample and enable mimxrt1180_evk_mimxrt1189_cm33
board as an example. On mimxrt1180_evk_mimxrt1189_cm33, 5 ports are
bridged with DHCPv4 enabled to test, including 4 DSA ports and
1 normal Ethernet port.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-02 11:45:19 +01:00
Yangbo Lu
c697eff0c3 MAINTAINERS: update vlan and dsa samples path
Updated vlan and dsa samples path as they were moved.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-02 11:45:19 +01:00
Yangbo Lu
840d464ffb samples: net: move Ethernet samples to folder
Moved current Ethernet samples to folder ethernet,
as there will be more samples added in the future.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-02 11:45:19 +01:00
Yangbo Lu
8c95e841ec net: dsa: use snprintk instead of snprintf
Used snprintk instead of snprintf as snprintk is compatible
across platforms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-02 11:45:19 +01:00
Yangbo Lu
b46db1e2ea net: net_if: use debug level message for iface down
Dropping packet is normal operation when iface is down.
So, we don't have to use warning here for much noise.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-02 11:45:19 +01:00
Yangbo Lu
44463a42d8 net: bridge: enable IPv4/IPv6 support
Ethernet bridge performs L2 forwarding between bridged interfaces.
But for the virtual bridge interface, we could make it perform as
normal Ethernet interface with IP address to use.

This is useful allowing applications to communicate with network,
like LAN router or switch with a host IP.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-02 11:45:19 +01:00
Yangbo Lu
684957e9c1 net: bridge: add forward decision support
Added forward decision support including for broadcast,
multicast and local address packets.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-02 11:45:19 +01:00
Yangbo Lu
27b8d65b77 net: ethernet: support bridge RX
Added support for bridge RX. We were going to support protocols
on bridge.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-02 11:45:19 +01:00
Yangbo Lu
7d22828642 net: bridge: handle RX in bridge_input.c
Current bridge function is very simple which does forwarding for all
packets. There will be more and more features of bridge RX handling.

Let's move bridge RX handling to bridge_input.c for next IPv4/IPv6
protocols support for virtual bridge interface.

And currently there is no path to call bridge_iface_recv function.
Let's rework it for proper function returning NET_CONTINUE.

Also fixed another issue of link local address checking. Because
net_linkaddr structure changed. So fixed

is_link_local_addr((struct net_eth_addr *)net_pkt_lladdr_dst(pkt))

to

is_link_local_addr((struct net_eth_addr *)(net_pkt_lladdr_dst(pkt)->addr))

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-02 11:45:19 +01:00
Yangbo Lu
3361dd1939 net: bridge: move bridge files to folder
Moved bridge files to folder to manage. More bridge features
and files will be added in the future.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-02 11:45:19 +01:00
Fabin V Martin
08fdc8fcdc boards: microchip: pic32cx_sg41_cult: update board with uart nodes
Add uart support for pic32cx_sg41_cult.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-02 11:45:04 +01:00
Fabin V Martin
91258fada7 boards: microchip: pic32cx_sg61_cult: update board with uart nodes
Add uart support for pic32cx_sg61_cult.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-02 11:45:04 +01:00
Fabin V Martin
c394cd8502 dts: arm: microchip: pic32cx_sg: add sercom nodes
Add sercom nodes for pic32cx_sg

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-12-02 11:45:04 +01:00
Pavel Vasilyev
6da559f565 bluetooth: host: Fix stale RPA usage after invalidation
Add !BT_ADV_RPA_VALID check to force RPA regeneration when re-enabling
an advertising set after RPA rotation occurred while disabled.

The BT_ADV_RANDOM_ADDR_UPDATED flag was added to prevent unnecessary
address regeneration (RPA/NRPA) between bt_le_ext_adv_param_set() and
bt_le_ext_adv_start() calls. However, this revealed an issue:

When RPA rotation (le_force_rpa_timeout) occurs while an advertiser is
disabled, BT_ADV_RPA_VALID is cleared but the RPA is not regenerated.
On subsequent bt_le_ext_adv_start() without a new param_set() call:
- BT_ADV_RANDOM_ADDR_UPDATED is already cleared (from previous start)
- Without BT_PER_ADV_ENABLED, no regeneration occurs
- Stale RPA is used, violating privacy requirements

Add !BT_ADV_RPA_VALID check for both connectable and non-connectable
advertisers to ensure fresh RPA generation when the previous RPA was
invalidated while the advertiser was disabled.

Fixes regression introduced in #98117.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2025-12-02 11:40:39 +01:00
Luis Ubieda
1c07d92f7f gnss: F9P: Send RTK commands only if RTK is enabled
Otherwise treat it as a basic UXB GNSS modem.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-12-02 11:35:18 +01:00
Yves Wang
9dafe6e67e cmake: usage: add ram/rom plot and traceconfig in usage
Added missing ram/rom plot and traceconfig targets in usage.cmake.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-12-02 11:35:05 +01:00
Valerio Setti
e5ec376e28 samples: tfm_integration: replace legacy Mbed TLS deps with PSA API
Replace selection of legacy Mbed TLS Kconfigs with PSA API ones.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 11:32:35 +01:00
Valerio Setti
b2f3175793 samples: mcumgr: smp_svr: replace legacy Mbed TLS deps with PSA API
Replace selection of legacy Mbed TLS Kconfigs with PSA API ones.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 11:32:35 +01:00
Valerio Setti
768df256b2 samples: net: http_client: replace legacy Mbed TLS deps with PSA API
Replace selection of legacy Mbed TLS Kconfigs with PSA Crypto API ones.

While at this, add also a test case using "overlay-tls.conf" since this
is also mentioned in README file.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 11:32:35 +01:00
Valerio Setti
271a213f23 samples: net: big_http_download: replace legacy MD with PSA API
Replace usage of Mbed TLS' MD module with PSA Crypto API for SHA-256 hash
computation.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 11:32:35 +01:00
Valerio Setti
04cfed9fd0 samples: net: lwm2m_client: replace legacy Mbed TLS deps with PSA API
Replace selection of legacy Mbed TLS crypto support with PSA API.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 11:32:35 +01:00
Valerio Setti
67d68108fa samples: net: mqtt_azure: replace legacy Mbed TLS deps with PSA API
Replace selection of legacy Mbed TLS crypto with corresponding PSA API
alternative.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 11:32:35 +01:00
Valerio Setti
4f947f00f9 tests: net: tls_configurations: replace legacy crypto with PSA API
Replace selection of legacy Mbed TLS crypto Kconfig with PSA Crypto API
ones.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 11:32:35 +01:00
Valerio Setti
99bb73537c tests: net: lwm2m: replace legacy crypto deps with PSA API
Replace usage of legacy Mbed TLS crypto with PSA Crypto API.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 11:32:35 +01:00
Valerio Setti
52df6fb770 tests: net: http_server: replace legacy crypto deps with PSA API
Replace legacy Mbed TLS crypto support with PSA API.
RSA key exchange dependency was removed because all certificates and
keys used in the test are EC.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-02 11:32:35 +01:00
Krzysztof Chruściński
9d09993ce6 tests: kernel: timer: timer_api: Fix hanging for slow platforms
Test had forever loop that was attempting to read k_timer_remaining_ticks
while system tick did not change. If target has relatively fast system
clock then it might be impossible.

Tweak test to repeat few times and if k_timer_remaining_ticks is not
read in the known tick then range is used to validate correctness of
the returned value.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-12-02 11:31:41 +01:00
Muzaffar Ahmed
f0454eb8b1 drivers: wifi: siwx91x: Fix AP mode channel status when using auto channel
Fixes the auto channel status by using the channel number from fetched
wireless info, rather than the input config variable.

Signed-off-by: Muzaffar Ahmed <muzaffar.ahmed@silabs.com>
2025-12-02 11:31:24 +01:00
Fabian Blatz
85e0067877 doc: dts: Expand explanation of zephyr,touch chosen node
Add explanation of the `CONFIG_LV_Z_POINTER_FROM_CHOSEN_TOUCH` interaction
with the `zephyr,touch` chosen node.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-12-02 11:31:07 +01:00
Fabian Blatz
d7720d8085 tests: misc: check_init_priorities: Update reference init level list
After removing the `zephyr,lvgl-pointer-input` device the init level
entries have shifted by one entry. Update them accordingly.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-12-02 11:31:07 +01:00
Fabian Blatz
d4ec3fef5e boards: Remove lvgl_input_pointer where chosen zephyr,touch is present
With the new LV_Z_POINTER_FROM_CHOSEN_TOUCH most boards do not need to
specify a dedicated pseudo device anymore.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-12-02 11:31:07 +01:00
Fabian Blatz
36c673f5f9 modules: lvgl: Add LV_Z_POINTER_FROM_CHOSEN_TOUCH option
Adds a Kconfig option LV_Z_POINTER_FROM_CHOSEN_TOUCH which automatically
creates a lvgl input pointer device from the chosen zephyr,touch node.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-12-02 11:31:07 +01:00
Chun-Chieh Li
d29321fee6 drivers: can: numaker: fix m55m1x core clock
On M55M1 series, the clock module index is virtual to stay compatible
with 32-bit only cell value in devicetree. Its real value of being
64-bit integer needs to acquire indirectly.

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-12-02 11:27:51 +01:00
Dilip Raman
00e9d45245 drivers: sensor: adi: fix build warnings in ADXL decoder drivers
Fix invalid pointer-to-integer cast and comparison warnings in
ADXL362, ADXL367, and ADXL372 decoder drivers. The previous code
used `(uint8_t *)*fit` for offset comparison, which triggered
`-Wint-to-pointer-cast` warnings on recent compilers and could
lead to undefined behavior.

This patch replaces unsafe casts with `uintptr_t` arithmetic and
ensures type-safe offset calculations, preserving existing logic
while eliminating all build warnings.

Signed-off-by: Dilip Raman <dilipr@aerlync.com>
2025-12-02 11:27:43 +01:00
S Mohamed Fiaz
8dda8fc1a6 tests: drivers: rtc: Add rtc_api overlay and update yaml file
This commit adds the rtc_api overlay file for the brd4342a board,
enabling rtc support and also updates the rtc tag in
siwx917_rb4342a.yaml.

Signed-off-by: S Mohamed Fiaz <Fiaz.Mohamed@silabs.com>
2025-12-02 11:27:24 +01:00
S Mohamed Fiaz
8c5e3d05b5 tests: drivers: counter: Add counter_basic_api overlay file
This commit adds the counter_basic_api overlay file for the
brd4338a board,enabling counter support.

Signed-off-by: S Mohamed Fiaz <Fiaz.Mohamed@silabs.com>
2025-12-02 11:27:24 +01:00
S Mohamed Fiaz
c8fa6c8d34 tests: drivers: pwm: Add pwm_api overlay and update yaml file
This commit adds the pwm overlay file for the brd4342a board,
enabling pwm support and also updates the pwm tag in
siwx917_dk2605a.yaml.

Signed-off-by: S Mohamed Fiaz <Fiaz.Mohamed@silabs.com>
2025-12-02 11:27:24 +01:00
S Mohamed Fiaz
08b55fae92 tests: dma: siwx917_rb4342a: Add chan_blen_transfer overlay files
This commit adds the DMA overlay and config file for the brd4342a board,
enabling chan_blen_transfer support in Zephyr.

Signed-off-by: S Mohamed Fiaz <Fiaz.Mohamed@silabs.com>
2025-12-02 11:27:11 +01:00
Tony Han
7e29ddadda soc: microchip: sam: common: update CMakeLists.txt for more obvious
The 'common' folder is under 'soc/microchip/sam' which contains both MCU
and MPU devices. Currently all the files in 'common' is for MPU. Adding
if(foo) in 'CMakeLists.txt' to make more obvious of where the files are
used.
Update soc/microchip/sam/common/CMakeLists.txt with combining the .c
files with the same usage into one 'zephyr_source' call.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-02 11:24:28 +01:00
Tony Han
9810eecad9 soc: microchip: sam: sama7: some optimize in Kconfig and CMakeLists.txt
Select MMU and CACHE_MANAGEMENT in 'config SOC_FAMILY_MICROCHIP_SAMA7'.
Replace 'config' with 'configdefault' for items in defconfig file.
Remove duplicated linker script in CMakeLists.txt in sama7d6 and sama7g5
directories, use the one in sama7 directory.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-02 11:24:28 +01:00
Tony Han
f703c2ee09 soc: microchip: sam: sama7: add sama7g54 (System-in-Package) SIP SoCs
Add SAMA7G5 series System-in-Package (SiP) MPUs to Kconfig.soc and
soc.yml, update the header files for them too.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-02 11:24:28 +01:00
Tony Han
0a9d1493a8 soc: microchip: sam: reorganize directory structure for sama7g5 series
Update directory structure to the following hierarchy for MPU devices:
  Product Architecture
    |__ SOC Series
          |__ Product Group
Move directory 'soc/microchip/sama7g5/' into 'soc/microchip/sama7/'.
Add sama7g5 to 'soc/microchip/sam/sama7/soc.yml'.
Remove the files under soc/microchip/sam due to they became useless
with the reorganization.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-12-02 11:24:28 +01:00
Jeppe Odgaard
6fbff921c7 drivers: led: pca9533: fix ms_to_psc wrap-around
If `period_ms` is 3 or less `tmp` is 0. Since `tmp` is type `uint32`
subtracting 1 from 0 will wrap around to `UINT32_MAX` and is then clamped
to `UINT8_MAX`.

Fix the issue by changing `tmp` and `1` to signed types.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2025-12-02 11:22:48 +01:00
Jordan Yates
e401209af0 bluetooth: host: name AUTO_PHY choices
Add names to the automatic PHY update choices so the defaults can be
updated.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-02 11:22:38 +01:00
Emil Gydesen
1d1f66c509 tests: Bluetooth: CCP: Modify server unittests to native_sim
Modify the unit tests to use the native_sim board instead of the
unit_testing board.
The native_sim board allows us to use the kernel in a more
regular way, while still being able to treat the tests as
unittest.

To support mocking we cannot rely on the default
Kconfig options and values. The required Kconfig options
to satisfy dependencies are overridden in the Kconfig
file and the necessary Kconfig files are sourced.
We cannot enable e.g. CONFIG_BT as that would attempt
to pull in a lot of files we do not want in this test.

This commit also removes unused includes in the CMakelists

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-02 11:21:21 +01:00
Emil Gydesen
522b8697b0 tests: Bluetooth: CCP: Modify client unittests to native_sim
Modify the unit tests to use the native_sim board instead of the
unit_testing board.
The native_sim board allows us to use the kernel in a more
regular way, while still being able to treat the tests as
unittest.

To support mocking we cannot rely on the default
Kconfig options and values. The required Kconfig options
to satisfy dependencies are overridden in the Kconfig
file and the necessary Kconfig files are sourced.
We cannot enable e.g. CONFIG_BT as that would attempt
to pull in a lot of files we do not want in this test.

This commit also removes unused includes in the CMakelists

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-02 11:21:11 +01:00
Emil Gydesen
96630fa564 tests: Bluetooth: CCID: Modify initiator unittests to native_sim
Modify the unit tests to use the native_sim board instead of the
unit_testing board.
The native_sim board allows us to use the kernel in a more
regular way, while still being able to treat the tests as
unittest.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-02 11:21:03 +01:00
Emil Gydesen
90b05da76a tests: Bluetooth: CAP: Modify commander unittests to native_sim
Modify the unit tests to use the native_sim board instead of the
unit_testing board.
The native_sim board allows us to use the kernel in a more
regular way, while still being able to treat the tests as
unittest.

To support mocking we cannot rely on the default
Kconfig options and values. The required Kconfig options
to satisfy dependencies are overridden in the Kconfig
file and the necessary Kconfig files are sourced.
We cannot enable e.g. CONFIG_BT as that would attempt
to pull in a lot of files we do not want in this test.

This commit also removes unused includes in the CMakelists

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-02 11:20:55 +01:00
Emil Gydesen
50a5cb3ec6 tests: Bluetooth: ASCS: Modify unittests to native_sim
Modify the unit tests to use the native_sim board instead of the
unit_testing board.
The native_sim board allows us to use the kernel in a more
regular way, while still being able to treat the tests as
unittest.

To support mocking we cannot rely on the default
Kconfig options and values. The required Kconfig options
to satisfy dependencies are overridden in the Kconfig
file and the necessary Kconfig files are sourced.
We cannot enable e.g. CONFIG_BT as that would attempt
to pull in a lot of files we do not want in this test.

This commit also removes unused includes in the CMakelists,
and cleans up the code.
Since the kernel is actually running, we also need to support
that e.g. k_work items are actually scheduled, and that we have
to wait for them to finish. test_drain_syswq has been implemented
as a way to drain the system workqueue before we check for
callbacks or perform subsequent actions.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-02 11:20:48 +01:00
Emil Gydesen
540e6c6c75 tests: Bluetooth: BAP: Modify Broadcast unittests to native_sim
Modify the unit tests to use the native_sim board instead of the
unit_testing board.
The native_sim board allows us to use the kernel in a more
regular way, while still being able to treat the tests as
unittest.

To support mocking we cannot rely on the default
Kconfig options and values. The required Kconfig options
to satisfy dependencies are overridden in the Kconfig
file and the necessary Kconfig files are sourced.
We cannot enable e.g. CONFIG_BT as that would attempt
to pull in a lot of files we do not want in this test.

This commit also removes unused includes in the CMakelists,
and moves the mock bap_broadcast_source.c file to the
correct location.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-02 11:20:40 +01:00
Ha Duong Quang
676a0504e5 boards: enables support for s32z270 hse crypto
Enable test for s32z270 hash crypto.

Enable samples for cipher cryptoEndable samples for EBC, CBC,
CTR mode of cipher crypto.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2025-12-02 11:20:29 +01:00
Ha Duong Quang
aab99a548b driver: crypto: add NXP S32 CRYPTO HSE driver
Add device tree node for MU instances that will be used by HSE and RTU
for s32z270.

Add support hash crypto for NXP S32 with Algo 2:
SHA224, SHA256, SHA384 and SHA512.

Add support cipher crypto with ECB, CBC and CTR mode by using ram key
catalog.

Add support 128/256 bits ram key length.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2025-12-02 11:20:29 +01:00
Johannes Meyer
8aaa5031f7 drivers: sensor: ti: Add INA232 native support
The INA232 is another device in the INA2XX family and is very similar
to the already implemented INA230 and INA236. The main difference
between the INA232 and the INA236 is that the INA232 does not have a
Device ID register. Because of these similarities, it is implemented
in the ina230.x files in the same way as the IN236. Modifications to
the corresponding tests are included as well.

Signed-off-by: Johannes Meyer <johannes.meyer@intego.de>
2025-12-01 19:48:40 -05:00
Johan Alfvén
d5e82737a7 samples: tflm_ethosu: add PMU counters
Add CONFIG_SAMPLE_TFLM_ETHOSU_PMU to collect PMU counters per inference
in the sample. Disabled by default.

Signed-off-by: Johan Alfvén <johan.alfven@arm.com>
2025-12-01 19:48:29 -05:00
Michał Stasiak
d722ac0aab tests: drivers: uart_async_dual: remove unused overlay
nRF54L15 PDK is no longer supported.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-12-01 19:48:07 -05:00
Łukasz Stępnicki
c00dd68c9d tests: arch: common: nrf54h20/cpuflpr needs different isr offset
NRF54H20 cpuflpr and cpuppr do not share common interrupts
(VEVIF TASKS) that can be used in this test, so they need
to be separated.

Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
2025-12-01 19:47:57 -05:00
Aurelien Jarno
6cb019d0ab openthread: Kconfig: fix MTD build by enabling OPENTHREAD_UPTIME
The 250745e198 OT stack upmerge pulled upstream commit 079852b67e9b
("[uptime] enforce `UPTIME` feature for MTD and FTD builds (#11354)")
which made `OPENTHREAD_CONFIG_UPTIME_ENABLE` mandatory for MTD builds.

Update the module configuration accordingly to fix a build failure with
CONFIG_OPENTHREAD_MTD=y.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2025-12-01 19:47:46 -05:00
Fin Maaß
4ae9e45db9 drivers: ethernet: phy: also set autoneg_in_progress for already on init
also set autoneg_in_progress for already on init.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-01 19:47:37 -05:00
Fin Maaß
5da33001d2 drivers: ethernet: phy: check auto negotiation completion directly
auto negotiation might already be finished when we
check the link status, therefore check directly
instead of waiting 100 ms.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-01 19:47:37 -05:00
Fin Maaß
e92adb56b2 drivers: ethernet: phy: improve reading of latched bits
The latched bits are defined in the ethernet specification,
as the only latched bit, that we use, is the link status, improve
the code for it.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-01 19:47:37 -05:00
Fin Maaß
570c658f51 drivers: ethernet: phy: let the compiler remove checks for cfg->fixed
let the compiler remove checks for cfg->fixed if we don't have any
fixed link.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-01 19:47:37 -05:00
Fin Maaß
c99e3413ea net: mii.h: provide the BMSR bits positions
provide the BMSR bits positions, so we can use
the `IS_BIT_SET` macro with them.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-01 19:47:37 -05:00
Abderrahmane JARMOUNI
2334a6a347 MAINTAINERS: Add collaborators to MIPI DSI & DBI areas
Add JarmouniA as collaborator to MIPI-DSI area.
Add JarmouniA and VynDragon as collaborators to MIPI-DBI area.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-12-01 19:47:27 -05:00
Fabio Baltieri
b676f6ba6d samples: usb: common: clarify the use of sample vid/pid
Add a note about sample vid/pid.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-12-01 12:41:15 -05:00
Fabio Baltieri
2dee7614ed samples: usb: common: make vid configurable
Add a SAMPLE_USBD_VID Kconfig to allow changing the USB VID on samples
using the common code. Can be handy for testing things against code that
expects a specific vid.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-12-01 12:41:15 -05:00
Benjamin Cabé
9cbfcc0bf3 doc: zephyr.doxyfile.in: remove workaround for Doxygen <= 1.14
Doxygen 1.15.0 is now available and a bug previously impacting
STRIP_FROM_INC_PATH handling has been fixed. Update the list of
paths accordingly to have headers from lib/libc/minimal/include/
covered.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-01 12:41:04 -05:00
Benjamin Cabé
a8fac553b6 ci: doc-build: update to Doxygen 1.15.0
Update to Doxygen 1.15.0 version (html build uses doxygen from the
docker image but PDF build uses vanilla Ubuntu runner from GitHub
so installation is done manually).
Replace MD5SUM by SHA256SUM since Doxygen project now conveniently makes
the checksums available on their Github releases page.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-01 12:41:04 -05:00
Paweł Pelikan
76701217f1 tests: kernel: usage: Adjustments for slower platforms
Adjusting sleep times as core is to slow too run
the test with the default system clock frequency,
and fixing outdated comment in the test manifest file.

Signed-off-by: Paweł Pelikan <pawel.pelikan@nordicsemi.no>
2025-12-01 12:26:31 -05:00
Carles Cufi
a264b54f37 drivers: nrf: Clean up remnants of nrfx error codes
Starting with nrfx 4.0.0, the nrfx_err_t, NRFX_SUCCESS and NRFX_ERROR_*
have been deprecated. Most of them were removed here:

https://github.com/zephyrproject-rtos/zephyr/pull/99399

but a few were missed.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-12-01 12:26:18 -05:00
Łukasz Stępnicki
1cb7671248 tests: drivers: counter: nrf54h20/cpuflpr support
Added new target nrf54h20/cpuflpr/xip to counter basic
api tests. Only XIP is supported for cpuflpr since
RAM memory for this cpu is too small to fit whole
counter basic test code and data.

Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
2025-12-01 12:26:09 -05:00
Alexander Svensen
f6cbd2f3a8 tests: bluetooth: tester: Start stream from connected_cb
- When we are a peripheral we want to be able to start a stream
  from the stream_connected_cb, given that we are in an enabling state
  and the stream is in the sink direction

Signed-off-by: Alexander Svensen <alexander.svensen@nordicsemi.no>
2025-12-01 12:25:40 -05:00
Arnaud Pouliquen
cfe2d71e24 soc: st: stm32mp13: fix KERNEL_DIRECT_MAP config usage
Fix config dependency between MMU KERNEL_VM_SUPPORT and KERNEL_DIRECT_MAP

This fix following build issue:

warning: KERNEL_DIRECT_MAP (defined at kernel/Kconfig.vm:83) has direct
dependencies MMU && KERNEL_VM_SUPPORT with value n, but is currently
being y-selected by the following symbols:
 - SOC_SERIES_STM32MP13X (defined at soc/st/stm32/stm32mp13x/Kconfig.soc:6,
   soc/st/stm32/stm32mp13x/Kconfig:6), with value y, direct dependencies y
   (value: y), and select condition SOC_FAMILY_STM32 (value: y)

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
2025-12-01 12:25:16 -05:00
Benjamin Cabé
d55b7be1ac doc: services: crc: add CRC doc page
Add a page for documenting CRC services

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-01 12:25:05 -05:00
Pieter De Gendt
4a52afd9c3 doc: connectivity: networking: Add MAC address configuration page
Add a page with information on how ethernet drivers can be assigned a MAC
address, using the MAC address configuration mechanism.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-01 12:24:54 -05:00
Pieter De Gendt
fb6e2c5065 drivers: ethernet: Add doxygen to net_eth_mac_load and move to public API
Add missing doxygen brief to the net_eth_mac_load helper function.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-01 12:24:54 -05:00
Ville Kujala
8883febbcf boards: nrf9280pdk: Merge cpuapp iron variant into the base variant
Replaces the legacy SDFW compatible board configuration with the
IronSide SE compatible one, thus removing support for running samples
and tests on nRF9280 devices with the old firmware.

Signed-off-by: Ville Kujala <ville.kujala@nordicsemi.no>
2025-12-01 12:24:42 -05:00
alperen sener
7ae81e6ad0 tests: bluetooth: tester: add support for wid 145 and 167
wid 145 requests handle of a UUID of a long characteristic. wid 167
requests to remove the characteristic by handle requested in wid 145.

2 new commands are added to support these wids:
- BTP_GATT_GET_HANDLE_FROM_UUID to request handle of a certain UUID
- BTP_GATT_REMOVE_HANDLE_FROM_DB to remove attribute by handle.

Signed-off-by: alperen sener <alperen.sener@nordicsemi.no>
Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2025-12-01 12:24:20 -05:00
Simon Piriou
f186218e42 net: l2: ieee802154: add support for MLME coordinator address
There are two ways in the current implementation to join a network,
either with an association request or a via MLME-SET(macShortAddress) to
rejoin a previously associated network.

The coordinator address needs to be valid in the rejoin case. It can be
lost, for example if the device power cycles. This commit fixes that gap
with new MLME GET/SET for:
- macCoordShortAddress
- macCoordExtendedAddress

Signed-off-by: Simon Piriou <spiriou31@gmail.com>
2025-12-01 12:24:05 -05:00
Simon Piriou
9aa69e6bc1 drivers: ieee802154: nrf5: improve debug logs
This commit prefixes "0x%x" debug logs with the entity, and prints the
"set" parameter when updating a filter.

Signed-off-by: Simon Piriou <spiriou31@gmail.com>
2025-12-01 12:23:56 -05:00
Simon Piriou
b87b17502f net: l2: ieee802154: skip filter removal for unassociated values
Trying to remove filter with NOT_ASSOCIATED parameter results in noisy
warning logs in most of the radio drivers. It's safe to ignore it as
this is an invalid operation.

Signed-off-by: Simon Piriou <spiriou31@gmail.com>
2025-12-01 12:23:56 -05:00
Maksim Salau
1eaceb448f cfb: Skip non-existent font glyphs
The change ensures that returned glyph exists in the current font.

Signed-off-by: Maksim Salau <maksim.salau@gmail.com>
2025-12-01 12:23:41 -05:00
Arnaud Pouliquen
c5d7f93b0a samples: ipc: openamp_rsc_table: add support for STM32MP25F boards
Add openamp_rsc_table support for STM32MP257F EV1 and DK boards to
enable communication between the Cortex-M33 and Cortex-A35 (running Linux).

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
2025-12-01 12:23:31 -05:00
Arnaud Pouliquen
e226124111 boards: add IPCC1 mailbox support for STM32MP257F boards.
Enable the IPCC1 for the stm32MP257F EV1 and DK boards.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
2025-12-01 12:23:31 -05:00
Arnaud Pouliquen
166b50b91d dts: arm: stm32mp2_m33.dtsi: add IPCC1 mailbox node
Add the support of the mailbox IPCC1 for communication between
the Cortex-M33 and the Cortex-A35

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
2025-12-01 12:23:31 -05:00
Arnaud Pouliquen
51480351ab drivers: ipm: stm32_ipcc: make clock optional
On the STM32MP2 series, the IPCC clock is managed at the system
level by the CPU responsible for system configuration.
In topologies where the Cortex-M33 acts as a companion processor, it
cannot enable the IPCC clock.

This update makes the IPCC clock optional in both the device tree
and the driver.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
2025-12-01 12:23:31 -05:00
Qingsong Gou
6211909b78 drivers: pwm: sf32lb: add gpt based pwm driver support
Add gpt based pwm driver for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-01 12:23:17 -05:00
Qingsong Gou
03f2d0e3e1 drivers: clock_control: sf32lb: add SF32LB_CLOCK_DT_INST_PARENT_SPEC_GET
Add SF32LB_CLOCK_DT_INST_PARENT_SPEC_GET clock macro

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-01 12:23:17 -05:00
Qingsong Gou
68a9265d04 dts: arm: sifli: sf32lb52x: define gpt2 instance
Add gpt2 controller for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-01 12:23:17 -05:00
Qingsong Gou
30746de20a dts: bindings: pwm: add sifli,sf32lb-gpt-pwm
Add gpt based pwm device bindings for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-01 12:23:17 -05:00
Qingsong Gou
ef8ab28736 dts: bindings: timer: sf32lb: add sifli,sf32lb-gptim
Add GPT timer bindings for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-12-01 12:23:17 -05:00
Jacky Lee
a29797d264 soc: egis_et171: add customize config value of fw size info
Allows applications to customize the firmware size information
for binary header optionally.

Signed-off-by: Jacky Lee <jacky.lee@egistec.com>
2025-12-01 12:22:44 -05:00
Ivan Pankratov
4f18248b72 doc: releases: document radio binding renames in 4.4
Add migration guide and release notes entries for the radio-related
devicetree binding renames:
- generic-fem-two-ctrl-pins -> radio-fem-two-ctrl-pins
- gpio-radio-coex -> radio-gpio-coex
- tx-high-power-supported -> radio-tx-high-power-supported

Also document the new radio.yaml base binding for generic radio
hardware capabilities.

Signed-off-by: Ivan Pankratov <ivan.pankratov@silabs.com>
2025-12-01 12:22:33 -05:00
Ivan Pankratov
a44583c8f4 dts: bindings: Rename gpio-radio-coex to radio-gpio-coex
Rename GPIO coex binding to use 'radio-' prefix for consistency with
other radio bindings (radio.yaml, radio-fem-two-ctrl-pins.yaml).

Updated beacon sample overlay and coex documentation.

Signed-off-by: Ivan Pankratov <ivan.pankratov@silabs.com>
2025-12-01 12:22:33 -05:00
Ivan Pankratov
6ccc58a8f6 dts: bindings: Rename generic-fem-two-ctrl-pins to radio-fem-two-ctrl-pins
Rename generic FEM binding to use 'radio-' prefix for consistency with
other radio bindings (radio.yaml, ble-radio.yaml).

Updated 3 board files, Nordic BLE controller HAL, documentation, and
test overlays. Added missing settle-time properties to pan1783a board.

Signed-off-by: Ivan Pankratov <ivan.pankratov@silabs.com>
2025-12-01 12:22:33 -05:00
Ivan Pankratov
0aa208d51e dts: bluetooth: add base binding for BLE radio hardware capabilities
Create a shared base binding (ble-radio.yaml) for common Bluetooth LE
radio hardware capabilities to avoid duplication between vendors and
ensure consistent property naming across the ecosystem.

Properties are prefixed with 'ble-' and ordered chronologically by
Bluetooth Core Specification version (5.0, 5.1, 6.0). Each property
indicates a hardware capability, not current enablement state.

Signed-off-by: Ivan Pankratov <ivan.pankratov@silabs.com>
2025-12-01 12:22:33 -05:00
Ivan Pankratov
675e6e05cd drivers: bluetooth: efr32: move Silabs Kconfig settings
Vendor specific configuration is moved to a separate file.

Signed-off-by: Ivan Pankratov <ivan.pankratov@silabs.com>
2025-12-01 12:22:33 -05:00
Emil Gydesen
f537b770e2 tests: Bluetooth: CAP: Unit tests: Delete group after creation
Some of the CAP initiator unit tests did not delete the group
after creation, even if they easily could.

Especially for test_initiator_unicast_group_add_streams it was
a problem, as the stream added was stack allocated, and by the
end of the test it was deallocated, causing issues when the
group was finally deleted in
cap_initiator_test_unicast_group_after.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-01 12:22:13 -05:00
Emil Gydesen
bfe66fc548 tests: Bluetooth: CAP: Modify initiator unittests to native_sim
Modify the unit tests to use the native_sim board instead of the
unit_testing board.
The native_sim board allows us to use the kernel in a more
regular way, while still being able to treat the tests as
unittest.

To support mocking we cannot rely on the default
Kconfig options and values. The required Kconfig options
to satisfy dependencies are overridden in the Kconfig
file and the necessary Kconfig files are sourced.
We cannot enable e.g. CONFIG_BT as that would attempt
to pull in a lot of files we do not want in this test.

This commit also removes unused includes in the CMakelists

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-12-01 12:22:13 -05:00
Kevin Zeng
ada3aad811 assert: Add an option for a custom assert header
Similar to logging and shell, allow application to override and
extend the ASSERT macros globally. This enables intercepting log strings
at the macro level for things like string tokenizations.

Signed-off-by: Kevin Zeng <zengk@google.com>
2025-12-01 12:22:03 -05:00
Pieter De Gendt
d9be161571 nvmem: Verify device readiness before read/write
Verify the NVMEM controller device state before reads/writes.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-12-01 12:21:52 -05:00
Martin Hoff
d02cdc734e drivers: i2s: siwx91x: ensure device runtime is released
Removed conditional checks for device runtime put in DMA RX and
TX callbacks, ensuring that device runtime is always released
asynchronously.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-01 11:11:23 +01:00
Martin Hoff
8f4f1efc86 drivers: dma: siwx91x: fix interrupt flag reset
This patch fix a reg write that needs to be done before calling the
callback. Since the user can start a new dma transfer in the callback,
it can miss the interrupt from the new transfer if the new transfer is
done before the interrupt bit is cleared.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-01 11:11:23 +01:00
Martin Hoff
aa315948dc drivers: dma: siwx91x: replace pm_state with pm_device (udma and gpdma)
Removed unnecessary power management state lock calls since the DMA is
on a power domain that already handles state locking.
It will now managed directly pm_device which will active power_domain
and then block pm_state.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-01 11:11:23 +01:00
Martin Hoff
d5c45b10e5 drivers: spi: siwx91x: ensure device runtime is released on error
Added calls to pm_device_runtime_put() to ensure proper device runtime
management when configuration or DMA transceive operations fail.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-01 11:11:23 +01:00
Martin Hoff
b78fe9f1aa drivers: power_domain: siwx91x: fix the link between pd and cpu state
This patch is needed to block the pm_state "PM_STATE_SUSPEND_TO_IDLE"
when a device on the power domain (actually all the peripherals) is
active. Without this patch, cpu can decide to go to deep sleep while
a peripheral is active.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-01 11:11:23 +01:00
Aksel Skauge Mellbye
a83b19b3f9 soc: silabs: Fix clock control dependency declarations
Most drivers for Series 2 depend on clock control, but didn't
declare it. Enable clock control by default for Series 2 SoCs.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-12-01 11:11:14 +01:00
Sai Santhosh Malae
a80855354c tests: watchdog: wdt_basic_api: Enable PM
Add a new test for enabling device runtime PM
for siwx917_rb4338a

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-01 11:10:39 +01:00
Sai Santhosh Malae
d83740f2d8 drivers: watchdog: siwx91x: Fix pause in sleep
The watchdog timer on SiWx91x devices is designed to
pause during deep-sleep and resume after wakeup.
However, an incorrect check in`wdt_setup` was
preventing this intended behavior. This patch removes
the check, restoring the correct pause-in-sleep
functionality.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-12-01 11:10:39 +01:00
Tim Pambor
9f35dd41ad tests: drivers: regulator: add test for STM32 vrefbuf regulator
Add build test for vrefbuf regulator found on STM32H5 and STM32U5 series.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-01 11:10:25 +01:00
Tim Pambor
291ae703d9 tests: drivers: regulator: move app.overlay to board-specific file
Relocate the contents of app.overlay into a board-specific overlay for
native_sim. This change prepares the codebase for adding regulator tests
for other boards.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-01 11:10:25 +01:00
Tim Pambor
19423fab21 dts: arm: st: stm32u5: Add support for vrefbuf
Add a node for the VREFBUF peripheral in the STM32U5.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-01 11:10:25 +01:00
Tim Pambor
e6cefe2a58 dts: arm: st: stm32h5: Add support for vrefbuf
Add a node for the VREFBUF peripheral in the STM32H5.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-01 11:10:25 +01:00
Tim Pambor
cec1861cae drivers: regulator: add stm32 vrefbuf driver
Add driver for the VREFBUF regulator found on STM32 microcontrollers.

Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
2025-12-01 11:10:25 +01:00
cyliang tw
333d1160a3 tests: drivers: watchdog: wdt_basic_api: Support numaker_m3334ki
Add support for Nuvoton numaker board numaker_m3334ki.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-12-01 11:10:18 +01:00
cyliang tw
780f260efd drivers: watchdog: Fix Numaker driver bug in test suite
NuMaker watchdog control register is write-once after power-on
or reset. Thus, the control registeris written in the setup
function and the disable function only disables IRQ.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-12-01 11:10:18 +01:00
Adrian Warecki
6cd7cfa104 xtensa: mmu: ptables: Set PPN in region_map_update to fix memory mapping
Set PPN (Physical Page Number) in L2 entry in the region_map_update
function to ensure correct mapping for memory that was not previously
mapped based on xtensa_soc_mmu_ranges.

When a new memory domain is created, the arch_mem_domain_init function
allocates new ptables using the dup_table function. This function only
copies original L2 entries created from xtensa_soc_mmu_ranges with
OPTION_SAVE_ATTRS. Entries added later by arch_mem_map are replaced with
XTENSA_MMU_PTE_L2_ILLEGAL and have PPN (Physical Page Number) set to zero.

When adding a new partition to a memory domain, the update_region function
is used. It sets new access attributes in the L2 table without setting the
PPN value. As a result, it does not work correctly for memory that was not
previously mapped based on xtensa_soc_mmu_ranges.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2025-12-01 11:09:09 +01:00
Adrian Warecki
942b1e8571 xtensa: mmu: ptables: Introduce PTE_PPN_SET macro
Add macro PTE_PPN_SET to simplify setting the physical page
number assigned in the page table entry.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2025-12-01 11:09:09 +01:00
Adrian Warecki
f5f56113fe xtensa: mmu: ptables: Introduce PTE_PPN_GET macro
Add macro PTE_PPN_GET to simplify retrieval of the physical page
number assigned to a page table entry.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2025-12-01 11:09:09 +01:00
Yangbo Lu
001d889ab7 samples: net: gptp: add mimxrt1180_evk_mimxrt1189_cm33 support
Added mimxrt1180_evk_mimxrt1189_cm33 support.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-01 11:09:01 +01:00
Yangbo Lu
3461123ce9 boards: nxp: mimxrt1180_evk: enable ptp clock
Enabled ptp clock.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-01 11:09:01 +01:00
Yangbo Lu
9229383f8a dts: arm: nxp_rt118x: add ptp clock node
Added ptp clock node.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-01 11:09:01 +01:00
Yangbo Lu
92decb6273 drivers: eth_nxp_imx_netc: support PTP timestamping for no-tag switch
Added PTP timestamping support in NETC ENETC host driver for no-tag
supported NETC switch.

On RX path, extended descriptor is used on host (pseudo MAC) to get
timestamp writeback.

On TX path, TX timestamp response should be enabled on host (pseudo MAC).
After TX, writeback TX timestamp ID should be updated to tx pkt fifo.
Once RX path received TX timestamp response, match TX timestamp to tx
pkt in fifo with the timestamp ID.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-01 11:09:01 +01:00
Yangbo Lu
b2b0c9d4e1 drivers: dsa_nxp_imx_netc: support PTP timestamping for no-tag switch
For NETC switch with tag support, PTP timestamping had already been
supported in tag driver.

This patch is to add PTP timestamping support for no-tag supported switch.
Timestamp functions are implemented and exported for host driver to
handle.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-01 11:09:01 +01:00
Yangbo Lu
b693f3ca2d drivers: eth_nxp_imx_netc: improve PTP timestamping enablement
Converted to use NETC_PTP_TIMESTAMPING_SUPPORT for PTP timestamping.
PTP timestamping is needed only when NET_L2_PTP and PTP_CLOCK_NXP_NETC
are selected.

Used default 16 bytes for ETH_NXP_IMX_RX_RING_LEN for PTP timestamping
because RX extended descriptor would be used.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-01 11:09:01 +01:00
Yangbo Lu
5b8af91236 drivers: dsa_nxp_imx_netc: improve PTP timestamping enablement
PTP timestamping should be enabled only when NET_L2_PTP and
PTP_CLOCK_NXP_NETC are selected. And NET_PKT_CONTROL_BLOCK
is required for PTP timestamping code.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-01 11:09:01 +01:00
Yangbo Lu
0b9f25335b drivers: ptp_clock: support clock division for platforms
Supported clock division for platforms as it may vary from
platforms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-12-01 11:09:01 +01:00
Martin Hoff
29fb893bab soc: silabs: siwx91x: removed sscanf for nwp firmware version check
This patch removes the use of sscanf to maintain compatibility with
tests that use the minimal cpp library. The expected version is now
defined using multiple individual values rather than a single
formatted string.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-12-01 11:08:51 +01:00
Andrea Gilardoni
53eaf0f71e llext: llext_priv: INSTR_FETCHABLE missing parentheses in definition
C macro INSTR_FETCHABLE is missing parentheses in its definition,
this could lead to incorrect expansion when combined with logical
operators

Signed-off-by: Andrea Gilardoni <a.gilardoni@arduino.cc>
2025-12-01 08:32:11 +01:00
Fin Maaß
8fd4f987b3 drivers: ethernet: renesas: implement get_phy
implement get_phy for the renesas ethernet
driver.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-12-01 08:32:00 +01:00
Anas Nashif
d31def38bb doc: usermode: correct header where k_objects is defined
Fix location of where k_objects is defined.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-12-01 08:31:46 +01:00
Lyle Zhu
05dc860f11 Bluetooth: Classic: A2DP: Fix out of bounds issue
This is a negative detection. The conn index should be never out of
bounds of the array `connection`. Because the size of the array is
`CONFIG_BT_MAX_CONN`.

To improve the readability, add a `__ASSERT` checking to check if the
conn index is out of bounds.

CID 487769

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-01 08:31:26 +01:00
Lyle Zhu
e586213417 Bluetooth: Classic: SDP: Fix out of bounds issue
This is a negative detection. The conn index should be never out of
bounds of the array `bt_sdp_client_pool`. Because the size of the
array is `CONFIG_BT_MAX_CONN`.

To improve the readability, add a `__ASSERT` checking here. Check
whether the conn index is out of bounds.

Fix #99985

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-01 08:31:19 +01:00
Lyle Zhu
2b827d31fc Bluetooth: Classic: conn: Fix br conn cannot be found issue
There is a corner case that the connect complete event is notified
before the function `bt_hci_cmd_send_sync()` returns. Because the
created conn object is in the state of `BT_CONN_DISCONNECTED`, it
cannot be found in the connect complete event. As a result, the
connect can not established normally.

Fix the issue by setting the connect state and role before calling
the function `bt_hci_cmd_send_sync()`.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-12-01 08:30:53 +01:00
Muhammed Asif
1fb4d82ef1 boards: microchip: Add minimal support for sam_e54_cult board
- Adds the basic board support
- Tested with blinky and hello world
- Product page : https://www.microchip.com/en-us/development-tool/EV66Z56A

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-12-01 08:30:44 +01:00
Ryan McClelland
cde2107308 tests: drivers: build_all: i3c: add build for no ibis
Add a test case to build without CONFIG_I3C_USE_IBI

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2025-12-01 08:30:37 +01:00
Ryan McClelland
bb6d7f470a drivers: i3c: cdns: fix warning when building without i3c_use_ibi
Add a conditional compile around data in `cdns_i3c_irq_handler` to
prevent a warning when building controller only and without ibi.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2025-12-01 08:30:37 +01:00
Ryan McClelland
54af134088 drivers: i3c: fix unused function warning
Fix unused function warning when building without
CONFIG_I3C_USE_IBI.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2025-12-01 08:30:37 +01:00
Benjamin Cabé
da95e8499a doc: services: storage: sort ToC entries alphabetically
Sort entries alphabetically instead of the current somewhat random order.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-01 08:27:52 +01:00
Benjamin Cabé
4ee5499f67 doc: storage: nvmem: move nvmem docs under storage
This moves nvmem docs to a better suited home since we already have
a section for all things storage.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-01 08:27:52 +01:00
Benjamin Cabé
bd62f24893 doc: storage: fs: move file system docs under storage
This moves fs docs to a better suited home since we already have
a section for all things storage.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-01 08:27:52 +01:00
Benjamin Cabé
8c6c350138 doc: storage: retention: move retention docs under storage
This moves retention into a better suited home since we already have
a section for all things storage.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-12-01 08:27:52 +01:00
Bogdan Ivanus
7117baf15c LED PINS: Corrected arduino_portenta_c33.dts file definitions.
Changed ACTIVE_HIGH to ACTIVE_LOW, for LEDs green and blue in c33.dts file
These appear to have been cofigured wrong from the beginning.

Signed-off-by: Bogdan Ivanus <b.ivanus@arduino.cc>
2025-12-01 08:27:37 +01:00
Jordan Yates
685e5bf0e6 boards: arm: mps2: enable QEMU for AN386
Enable QEMU emulation for the AN386, which gives a QEMU platform for the
cortex-m4 architecture. This allows testing of hardware floating point
operations.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-12-01 08:27:23 +01:00
Mark Wang
44b194b41a libsbc: replace zephyr_compile_definitions
Replace zephyr_compile_definitions with zephyr_library_compile_definitions
to avoid setting options globally.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-12-01 08:27:14 +01:00
Maureen Helm
5f33d75bce tests: lib: devicetree: Add hwspinlock dt spec test
Extends the devicetree library test to exercise the hwspinlock dt spec
macros and detect the context initializer build warning that was fixed
in commit 8b208b0d5a. Previously the build
warning wasn't reproducible in-tree.

Signed-off-by: Maureen Helm <maureen.helm@analog.com>
2025-12-01 08:27:04 +01:00
Ryan McClelland
cdfecb6354 drivers: serial: cdns: fix race conditon under heavy uart load
There can be a race conditon where another interrupt fires while it
is in the callback, but then the interrupt is cleared towards the
end of the interrupt. Clear the interrupts it intends to service
at the beginning of the ISR.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2025-12-01 08:26:56 +01:00
Jisheng Zhang
ed12482c38 tests: lib: mpsc_pbuf: use DCB instead of CoreDebug
commit a763207962 ("arch: arm: dwt: use the cmsis_6 macro
unconditionally") use cmsis_6 macro unconditionally, we can use DCB
instead of CoreDebug macro unconditionally.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
2025-12-01 08:26:46 +01:00
Jisheng Zhang
0ac6d10ea5 samples: debugmon: use DCB instead of CoreDebug
commit a763207962 ("arch: arm: dwt: use the cmsis_6 macro
unconditionally") use cmsis_6 macro unconditionally, we can use DCB
instead of CoreDebug macro unconditionally.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
2025-12-01 08:26:46 +01:00
Jisheng Zhang
30c5c7c8a8 logging: backend: swo: use DCB instead of CoreDebug
commit a763207962 ("arch: arm: dwt: use the cmsis_6 macro
unconditionally") use cmsis_6 macro unconditionally, we can use DCB
instead of CoreDebug macro unconditionally.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
2025-12-01 08:26:46 +01:00
Jisheng Zhang
2c1e1ad7c9 arch: arm: dwt: use DCB instead of CoreDebug
commit a763207962 ("arch: arm: dwt: use the cmsis_6 macro
unconditionally") use cmsis_6 macro unconditionally, we can use DCB
instead of CoreDebug macro unconditionally.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
2025-12-01 08:26:46 +01:00
Valerio Setti
b7d0e1293c tests: net: ieee802154: remove cipher selection in mbedtls-shim driver
Cipher support is already implied by default so there is no need to
select it explicitly.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-01 08:26:29 +01:00
Valerio Setti
1969f493e3 net: lib: midi2: remove unnecessary cipher selection in mbedtls-shim driver
Cipher support is already implied by default so there is no need to
select it explicitly.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-01 08:26:29 +01:00
Valerio Setti
3a6f0879c4 mgmt: osdp: remove unnecessary cipher selection in mbedtls-shim driver
Cipher support is already implied by default so there is no need to
select it explicitly.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-01 08:26:29 +01:00
Valerio Setti
e94d975111 tests: crypto: crypto_hash: remove unnecessary Kconfig
Cipher related Kconfigs are unnecessary for this test since it's only
evaluating Hash algorithms.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-01 08:26:29 +01:00
Valerio Setti
711f13fff6 drivers: crypto: mbedtls_shim: improve session handling
Add a new function to free an mbedtls_shim session:
'mbedtls_free_session()'. Together with 'mbedtls_get_unused_session()',
these will be the only entry points to acquire/release sessions.
In this way it's easier to ensure that the mutex is properly held while
setting the 'in_use' parameter.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-01 08:26:29 +01:00
Valerio Setti
cc65c9543b drivers: crypto: mbedtls_shim: replace legacy cipher API with PSA API
Replace legacy crypto API for cipher (ECB, CBC) and AEAD (CCM, GCM) with
PSA API.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-01 08:26:29 +01:00
Valerio Setti
678542d899 drivers: crypto: mbedtls_shim: replace legacy hash API with PSA API
Replace usage of legacy crypto hash functions from Mbed TLS with PSA API.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-01 08:26:29 +01:00
Valerio Setti
91dbaf5c45 drivers: crypto: mbedtls_shim: move mbedtls_get_unused_session_index()
Move mbedtls_get_unused_session_index() at the top of the file and leave
cipher and hash functions below.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-01 08:26:29 +01:00
Valerio Setti
0cee013a3f drivers: crypto: mbedtls_shim: add _cipher_ to cipher ops
Another small renaming for cipher ops that just adds "_cipher_" in the
function's name.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-01 08:26:29 +01:00
Valerio Setti
37197f869a drivers: crypto: mbedtls_shim: general renaming
This commit just implements some renaming:
* mbedTLS -> Mbed TLS
* MbedTLS -> Mbed TLS
* MTLS_ -> MBEDTLS_
* mtls_ -> mbedtls_
* mtls_ccm -> ccm_ctx
* mtls_gcm -> gcm_ctx
* mtls_aes -> aes_ctx
* mtls_sha256 -> sha256_ctx
* mtls_sha512 -> sha512_ctx

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-01 08:26:29 +01:00
Valerio Setti
5eb2f46e0d drivers: crypto: mbedtls_shim: rename module
Use full name for the module so "mtls" -> "mbedtls"

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-12-01 08:26:29 +01:00
Dmitrii Sharshakov
e3ef835ffe soc: raspberrypi: rp2350: imply XIP
Imply XIP from the SoC config to make XIP the default to match the
behaviour between Cortex-M33 and Hazard3 variants.

This fixes cbe6a716d3, which stopped
selecting XIP at the SoC level.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-11-28 20:58:32 -05:00
Mark Wang
6cf0829d7d drivers: usb: uhc: mcux: Improve setup noncache buffer allocation
Only allocate nocache setup packet buffer for control endpoint (EP0).

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-11-28 20:58:16 -05:00
Mark Wang
7ea8992d47 drivers: usb: uhc: mcux: Fix nocache buffer allocation for IN/OUT transfer
Use net_buf_tail() instead of __buf for proper buffer positioning.
Add null check and error handling for nocache buffer allocation.
Only copy data for OUT transfers during buffer setup.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-11-28 20:58:16 -05:00
Mark Wang
d5a509583b drivers: usb: uhc: mcux: add data to buf only for IN transfer
After the transfer callback, add the received data to buf only for IN.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-11-28 20:58:16 -05:00
Mark Wang
d12279b694 drivers: usb: uhc: mcux: Fix buffer setup for IN/OUT transfers
Differentiating between IN and OUT transfers for proper buffer setup.
For OUT transfers: use existing data from buf->data with buf->len.
For IN transfers: use available space from net_buf_tail() with tailroom.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-11-28 20:58:16 -05:00
Sudan Landge
9962bc12cf arch: arm: fix start of the privileged stack
Make sure that arch.mode is set with appropriate flags before setting up
the privileged stack start.

Fixes #99895

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-11-28 20:57:53 -05:00
Aurelien Jarno
78a3890acb net: mqtt_sn: udp: enforce maximum address size at build time
Introduce BUILD_ASSERT checks in the UDP transport implementation to
ensure the configured maximum address size is large enough for the
enabled IP families.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2025-11-28 22:10:40 +00:00
Aurelien Jarno
05b9ffb390 net: mqtt_sn: document address size and add support for IPv6
Add guidelines in Kconfig explaining the minimum required
MQTT_SN_LIB_MAX_ADDR_SIZE for UDP transport and IPv4 and or IPv6. Also
explain when this value might need to be changed.

Use these values to provide a sane default for IPv4 and IPv6.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2025-11-28 22:10:40 +00:00
Sylvio Alves
3d77a766c3 west.yml: hal_espressif: update rom reentrant calls as weak
This update modify some ROM reentrant calls to weak in order
to use the one provided in libc.

This also remove the usage of logging that requires locking
handling before scheduler is running.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-11-28 22:10:31 +00:00
Benjamin Cabé
efa9e1dfdd doc: index: redesign landing page with persona-based navigation
Completely overhaul the documentation landing page to improve user
experience and navigability.

Key changes:
- Replace the static grid list with a modern, responsive HTML/CSS layout.
- Introduce "Persona" cards (App Developer, Hardware Engineer, Product
  Maker) to guide users to relevant sections faster.
- Highlight key reference resources (API, Kconfig, DeviceTree, ...) in a
  dedicated reference section.
- Call out "How to contribute" with a dedicated card.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-28 22:10:24 +00:00
Pieter De Gendt
09eeb734ca drivers: ethernet: eth_virtio_net: Support MAC address config
Update the virtio ethernet driver to use a MAC address configuration
struct.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-28 17:28:00 +00:00
Jukka Rissanen
5a0fb5c011 tests: net: all: Increase CONFIG_MAX_THREAD_BYTES to 5
This is done to avoid this error

  Too many thread objects (38)
  Increase CONFIG_MAX_THREAD_BYTES to 5

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-28 17:27:52 +00:00
Jukka Rissanen
e39c6c56fb tests: net: all: Make sure OpenThread tests are run
The platform_allow line in common: overrides the setting in
individual tests, so add the platform_allow line to each test
separately so that OpenThread tests are run with proper platform.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-28 17:27:52 +00:00
Jukka Rissanen
9d3f4a7073 modules: openthread: Fix network namespace API usage
Some of the socket calls still used POSIX symbols, replace these
by native Zephyr network API calls.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-28 17:27:52 +00:00
Aleksandr Khromykh
3576e6b156 MAINTAINERS: add alxelax as bt qualification collaborator
Add myself (alxelax) as Bluetooth Qualification
collaborator. The main reason is as Bluetooth Mesh
collaborator would like to follow up qualification tool
updates since it impacts Mesh qualification too.

Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
2025-11-28 17:26:26 +00:00
Lyle Zhu
57b99f5846 Bluetooth: Classic: RFCOMM: Fix unchecked returned value issue
Check the return code of the function `bt_l2cap_br_server_register()`.

Fix #100016

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-28 17:26:21 +00:00
Marek Slowinski
b545d584a2 tests: arch: interrupt: Exclude mpfs_icicle SMP platform from LTO test
Other variants of arch.interrupt test pass on this platform,
but arch.shared_interrupt.lto asserts in test_isr_offload_job_identi.

The issue was reported in #98658.

Signed-off-by: Marek Slowinski <mslowinski@antmicro.com>
2025-11-28 17:25:58 +00:00
Vinayak Kariappa Chettimada
06cd4f5849 Bluetooth: Controller: Remove redundant Sync ISO must expire
Remove redundant Sync ISO must expire code that is not
planned to be implemented.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2025-11-28 17:25:50 +00:00
Marek Matej
a00bec83c3 snippets: espressif: update flash size snippets
Update Espressif flash related snippets:

* add support for ESP32-H2
* add 2M,64M and 128M flash support
* change included overlays structure

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2025-11-28 17:25:40 +00:00
Marek Matej
97d74795da dts: vendor: Add Espressif partition tables
Add support for bigger flash sizes.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2025-11-28 17:25:40 +00:00
Haoran Jiang
40accad696 soc: sifli: sf32: Add SF32LB52 platform ftab generation
Using the `gen_ftab.py` script, we can retrieve the current image
distribution information from the device tree and generate the
corresponding `ftab.bin` file. This eliminates the need to burn an
additional `ftab.bin` externally before running the device

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-11-28 17:25:27 +00:00
Haoran Jiang
8454f91e39 scripts: west_commands: runners: sftool: Add flash_files param
In addition to Zephyr's default build artifacts, other build processes
may generate additional images. Therefore, we have added the
`--flash-file` parameter to flash these supplementary images


Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-11-28 17:25:27 +00:00
Vinayak Kariappa Chettimada
2ab41387a4 Bluetooth: Controller: nRF54Lx: Fix Radio Tx Power set
Fix incorrectly high Radio Tx Power being set as default.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2025-11-28 17:25:02 +00:00
James Torres
d30d7c29f3 drivers: watchdog: stm32 wwdg: remove floats to reduce footprint
On STM boards without an FPU (like nucleo_f091rc) the WWDG driver
requires 4K more of flash than the IWDG due to the use of floating
point math. Fixed it by refactoring to use integer math.
Reduced sample build ROM size from 24848 B to 21620 B on
nucleo_f091rc.

Signed-off-by: James Torres <jamesktorres2022@gmail.com>
2025-11-28 17:24:26 +00:00
Vinayak Kariappa Chettimada
6692264d22 Bluetooth: Controller: In-system profiling and CPU overhead assertions
Updated in-system profiling for CPU usage with on target
measurements and added assertion checks.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2025-11-28 17:24:09 +00:00
Vinayak Kariappa Chettimada
d82c1dcaec Bluetooth: Controller: In-system ticker_start and ticker_stop tests
Add in-system ticker_start and ticker_stop tests.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2025-11-28 17:24:09 +00:00
Aaron Ye
1a49b418f5 samples: Bluetooth: peripheral_past: fix the uninitialized parameter
The past_param.options is uninitialized and causes
bt_le_per_adv_sync_transfer_subscribe() returning error.

Signed-off-by: Aaron Ye <aye@ambiq.com>
2025-11-28 10:12:07 +00:00
Thomas Decker
2fbefdbc53 soc: st: stm32: h7rsxx: Fix MPU region for read-only id flash region
Set correct MPU memory type and size for the uniqe device id, package code
and ADC VREF/TS calibration read-only flash region.

REGION_IO_ATTR configures the MPU region to device-memory with RW access,
which is also used for the PERIPH region. To avoid complicating things
unnecessarily, we use this type instead of defining a new device-RO.

The size is reduced to 512 bytes, because RM0477 table 28 and chapter
5.3.12 state that this read-only flash area has a size of 512 bytes.

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2025-11-28 10:11:57 +00:00
Kyle Bonnici
787bc17711 devicetree: format after rebase
Applying dts-linter results files after rebase

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2025-11-28 10:09:39 +00:00
Kyle Bonnici
589be43e2e devicetree: remaining files
Applying dts-linter results for remaining format files

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2025-11-28 10:09:39 +00:00
Kyle Bonnici
a510704ed2 devicetree: format files in tests
Applying dts-linter results for files in

tests

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2025-11-28 10:09:39 +00:00
Kyle Bonnici
70806c585f devicetree: format files in samples
Applying dts-linter results for format files in

samples

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2025-11-28 10:09:39 +00:00
Kyle Bonnici
b3f756e800 devicetree: format files in dts
Applying dts-linter results for files in

dts

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2025-11-28 10:09:39 +00:00
Kyle Bonnici
f06b35e698 devicetree: format files in boards
Applying dts-linter results for format files in

boards

Signed-off-by: Kyle Bonnici <kylebonnici@hotmail.com>
2025-11-28 10:09:39 +00:00
Pieter De Gendt
b72da97eec doc: services: nvmem: Mention flash configuration
Add an entry to the configuration section for flash related Kconfig
symbols.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-28 09:50:47 +00:00
Xianglong Zhang
ad641f8ebb boards: shields: m5stack_cardputer: Correct the display parameter
Refer to the M5Stack official code, it need to correct
the value of x-offset of st7789v display driver from 53 to 52,
or the leftmost column of the LCD shows an anomaly.

Signed-off-by: Xianglong Zhang <zhangxianglong@cvte.com>
2025-11-28 09:50:38 +00:00
Benjamin Cabé
4ff7102ed9 doc: services: serialization: add cbor doc page
Add a doc page for CBOR as part of Serialization services

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-28 09:50:28 +00:00
Benjamin Cabé
9fa197cf2e samples: doc: add "json" as relevant_api to a few samples
This ensure people browsing the JSON doc page will see a few more
options in terms of code samples exercising JSON API

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-28 09:50:28 +00:00
Benjamin Cabé
fe2357072e doc: services: serialization: add json doc page
Move the mostly empty doc section from misc to serialization.
Also add basic code snippets.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-28 09:50:28 +00:00
Carles Cufi
84a85ed9d8 tests: Add LTO tests variants with LTO_SINGLE_THREADED
Add variants of existing tests to cover this new Kconfig option.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-11-28 09:50:04 +00:00
Carles Cufi
d0547b67cd toolchain: gcc: Add a new LTO_SINGLE_THREADED option for LTO
As described in this issue:
https://github.com/zephyrproject-rtos/sdk-ng/issues/1038
`-flto=auto` fails on some (slower) Windows machines due to an issue with
the Zephyr SDK's GCC toolchain for Windows.
In order to allow users to work around this issue, introduce a new
CONFIG_LTO_SINGLE_THREADED option that switches to `-flto=1`, which
enforces a single thread when processing LTO.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-11-28 09:50:04 +00:00
Kate Wang
027d77168b drivers: mipi_dbi: Fix typo in NXP DCnano driver
Fix typo in NXP DCnano driver

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-11-28 09:49:59 +00:00
Kate Wang
1e86329fe9 drivers: display: display_rm67162: Check reset pin configuration return
Check the return value of reset pin gpio configuration operation.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-11-28 09:49:59 +00:00
Firas Sammoura
f7e2b8daf7 tests: riscv Add tests for unlocked PMP entries
Adds four new test cases to validate the PMP stack guard protection when
`CONFIG_PMP_NO_LOCK_GLOBAL` is enabled (i.e., when PMP entries are not
globally locked).

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-11-28 09:49:50 +00:00
Firas Sammoura
e0f2b4e354 riscv: pmp: Add support for unlocked global PMP entries
Adds the Kconfig option PMP_NO_LOCK_GLOBAL to remove the PMP Lock bit
usage. The global entry is an internal detail of the driver
implementation and should not be reflected in the user interface. This
allows the application to dynamically reconfigure the PMP entries
without requiring hard reset. This is essential for firmware that
performs an RO-to-RW jump. By keeping these system entries unlocked,
higher-privileged M-mode code can dynamically reconfigure memory
permissions during the secure handover process, which is not possible if
the entries are permanently locked during early boot.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-11-28 09:49:50 +00:00
Robert Lubos
f908d0b5f2 net: shell: Verify array index during dynamic iface completion
Verify that the interface index, converted to array index,
 does not exceed the preallocated string array for dynamic index
completion.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-27 21:56:37 +01:00
Robert Lubos
852a1e8104 net: sockets: getnameinfo: Cast to sockaddr_in6 instead of sockaddr_in
As explained in the comment in the code, both structs have the same
offsets for it's fields, but sockaddr_in is smaller, hence it can
confuse static analyzer, giving warnings about potential out-of-bound
access. Therefore, cast to sockaddr_in6 instead to avoid the warning.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-27 21:55:12 +01:00
Felipe Neves
487386e9df boards: witte: linum: fix CAN controller settings.
To match the fixed RCC/Clock settings.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
2025-11-27 21:54:51 +01:00
Felipe Neves
cc64b17b5e boards: witte: linum: fix clock settings.
to make the ethernet, USB and FDCAN usable.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
2025-11-27 21:54:51 +01:00
Mario Paja
88f50fabcb drivers: audio: wm8904: fix sample rate
This change aligns sample rates to the datasheet and removes
non existing values for 11.025kHz, 22.05kHz, & 44.1kHz

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-11-27 21:54:39 +01:00
Guillaume Gautier
7d63600c3c dts: arm: st: f7: fix indentation for ci compliance check
Fix indentation for CI compliance check.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-11-27 21:54:24 +01:00
Guillaume Gautier
3c27e6f1ec tests: drivers: counter: basic_api: complete stm32 board overlays
Completes the STM32 overlays:
- Adds missing timers
- Adds copyright notice
- Adds okay to timer instances so that shared interrupts can be enabled
  if needed
- Adds an overlay for STM32H7R/S
- Removes the conf file for N6 that is useless now that userspace works.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-11-27 21:54:24 +01:00
Guillaume Gautier
85e6b867fe dts: arm: st: l1: add missing timers and fix timers5
Adds timers 6 and 7 that were missing to L1 series.
Fixes timer 5 interrupt line.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-11-27 21:54:24 +01:00
Guillaume Gautier
4f278aa9c0 dts: arm: st: h7rs: add missing timers 12/13/14
Timers 12, 13 and 14 were missing in the STM32H7R/S device tree.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-11-27 21:54:24 +01:00
Guillaume Gautier
3f5aa82f3e dts: arm: st: add counter support for all stm32 timers
For all existing STM32 timer nodes, add the counter node if it was missing.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-11-27 21:54:24 +01:00
Guillaume Gautier
3206d73994 soc: st: stm32: add timer shared interrupts
For some STM32 series, some interrupts are shared between different timer
instances. Use the SHARED_INTERRUPTS for these series so that all timers
can be used at the same time.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-11-27 21:54:24 +01:00
Guillaume Gautier
2fb9eb0fee drivers: counter: stm32: timer: fix counter for stm32 advanced timers
Counter driver was not functional with STM32 advanced timers (like
TIMER1/8) due to them having more than one interrupt line.
This commit defines the proper interrupts for the advanced timers so that
they can be used as counters.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-11-27 21:54:24 +01:00
Benjamin Cabé
c962977da8 boards: arm: fix full_name for fvp_baser_aemv8r
Ensure the board's full name shows up correctly in the docs.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-27 21:54:13 +01:00
Benjamin Cabé
8e687fc0dd ci: Switch to CI image v0.28.7
This commit updates the CI workflows to use the CI image v0.28.7, which
updates versions of the following components:
- Doxygen 1.15.0.
- Renode 1.16.0.
- BSIM 3.0.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-27 11:25:47 -05:00
Benjamin Cabé
89292a29b9 doc: update references to RFCs using :rfc: role across multiple files
Sphinx has a built-in `:rfc:` role for referencing RFC documents.
This commit updates documentation pages referencing RFCs to use this role.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-27 16:05:19 +01:00
Mathieu Choplain
7defeda8bd soc: st: stm32: wkup_pins: break after configuring I/O retention on pin
After we found the target GPIO port and configured I/O retention on target
wake-up pin, break from the search loop.

Applies only to STM32WBA series.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-27 16:02:47 +01:00
Aksel Skauge Mellbye
2602b707b1 boards: silabs: xg24_dk2601b: Enable commander runner
Enable the use of Simplicity Commander as a runner on the
xg24_dk2601b dev kit.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-11-27 16:02:41 +01:00
Fabian Blatz
0f07faa14b drivers: input: gt911: Add touchscreen common config
Adds the touchscreen common config to the gt911 controller.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-11-27 16:02:13 +01:00
Emil Gydesen
4bd0c33cdd Bluetooth: CSIP: Only allow rank changes with set size changes
The rank cannot be notified and the function allowed for
just updated to the rank. The CSIS spec does not mention
the usecase, nor support, for changing the rank of a device.
The spec only seems to allow for dynamic changes to the set
size (and only during that can the rank be set).

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-27 16:01:36 +01:00
Sudan Landge
3c66b7e205 tests: fix ci for fvp_baser_aemv8r
Disable cache modeling in FVP and skip a few tests that have not been
working for a while to unblock the running ci on this board.
The tests will be tracked by an issue and fixed later.

Related issue #97602

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-11-27 16:01:27 +01:00
Sudan Landge
04fb068463 sample: net: fix the board config and overlay name
Rename the board config to fix ci issue while running samples for
fvp_baser_aemv8r:
```
INFO    - 1) sample.net.zperf.async_tx.stm32 on
fvp_baser_aemv8r/fvp_aemv8r_aarch32 error (CMake build failure - CMake
Error at cmake/modules/extensions.cmake:2905 (message):   Board
fvp_baser_aemv8r defines multiple SoCs.)
```

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-11-27 16:01:27 +01:00
Sudan Landge
1f030c303a boards: fvp_aemv8r_aarch32: fix sample.bindesc
Make sure bindesc are placed right after the vector table and fix ci
failure with sample.bindesc for fvp_baser_aemv8r/fvp_aemv8r_aarch32.
Without this change the bindesc are placed at a location that is not
mapped leading to a data abort while running the sample.

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-11-27 16:01:27 +01:00
Sudan Landge
c1ded6b9b6 arch: arm64: fix definition of ARCH_HAS_STACKWALK
Move ARCH_HAS_STACKWALK under CPU_CORTEX_A section since only Cortex-A
implements arch_stack_walk(), while Cortex-R does not.

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-11-27 16:01:27 +01:00
Sudan Landge
c8688926c0 tests: MPS2: skip running wdt_basic_api on fvp for an385
Skip running the test scenario `drivers.watchdog` on Arm FVP for the
board `mps2/an385`.

Since the test runs by default on qemu, this issue was missed earlier
when the test was excluded for the other MPS2 variants that use FVP.

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-11-27 16:01:27 +01:00
Arunmani Alagarsamy
1814b902a9 soc: silabs: siwg917: Add configurable boot features via DTS and Kconfig
Add support for configuring hardware-specific boot feature bitmaps
through Devicetree and software-specific boot configurations through
Kconfig options.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-11-27 14:48:35 +01:00
Arunmani Alagarsamy
e21df1fab1 dts: silabs: Add NWP boot configuration properties
Add new Devicetree properties under the SiWx91x NWP node to describe
hardware-specific boot configuration options.

The properties are documented in the SiWx91x NWP YAML binding.

Signed-off-by: Arunmani Alagarsamy <arunmani.a@silabs.com>
2025-11-27 14:48:35 +01:00
Tomasz Moń
6f0a40090f drivers: udc_dwc2: Avoid endpoint disable timeouts on bus reset
DWC2 core automatically clears USBActEP (for all endpoints other than
endpoint 0) on bus reset. While core is deactivating the endpoint, it
does not disarm it.

On bus reset USB stack first calls ep_disable API and then ep_dequeue.
This was leading to endpoint is not active warning followed by endpoint
disable timeout. Disable timeout was effectively caused by waiting for
EPDisbld interrupt on endpoint with disabled interrupts.

Solve the issue by unconditionally disarming endpoint in ep_disable API
handler. Remove the false warning because USBActEP cannot really be used
for sanity checking as it is not only the driver that clears it.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-11-27 13:48:18 +00:00
Thorsten Klein
69536a6811 scripts: zephyr_module: ignore empty paths in extra modules env variables
Ignore empty paths in environment variables ZEPHYR_EXTRA_MODULES or
EXTRA_ZEPHYR_MODULES.

Signed-off-by: Thorsten Klein <thorsten.klein@bshg.com>
2025-11-27 14:48:13 +01:00
Sebastian Bøe
a053b97144 soc: ironside: counter_service: 2 compilation errors fixed
2 compilation errors fixed in counter service.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2025-11-27 13:47:58 +00:00
Benjamin Klaric
e83f36f934 boards: stm32h7s78_dk: add FDCAN1 support
Add FDCAN1 configuration to the board's .dtsi file and
comments explaining how to enable it, since fdcan1 and i2c1
share the pb9 pin. Updated documentation to explain CAN usage.

Signed-off-by: Benjamin Klaric <benjamin.klaric01@gmail.com>
2025-11-27 14:47:01 +01:00
Benjamin Cabé
8349a01b13 cmake: extensions: remove invalid add_dependencies
The `add_dependencies` command in CMake is used to specify dependencies
between targets - here it was used to specify a dependency on a folder,
which is not valid (and causes failures on CMake 4.2 when using
the cmake-file-api).

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-27 14:46:50 +01:00
Jamie McCrae
33a5c301a1 dfu: kconfig: Raise limit of MCUboot images to 8
This update was seemingly forgotten when additional image support
was added to supporting MCUboot files

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2025-11-27 14:46:40 +01:00
Jamie McCrae
5c713cd7d4 dfu: kconfig: Fix styling
Fixes this styling to be valid

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2025-11-27 14:46:40 +01:00
Jamie McCrae
6950bf2b42 dfu: boot: cmake: Fix styling
Fixes this styling to be valid

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2025-11-27 14:46:40 +01:00
Jamie McCrae
a12e21fe8e dfu: boot: mcuboot: Use Kconfig for log level
Prevents this module from just trampling over your logging with
debug logs no matter the configuration

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2025-11-27 14:46:40 +01:00
Remi Buisson
f4170e255f modules: hal_tdk: Update icm42x7x driver version 3.3.0
Update icm42x7x driver to version 3.3.0.

Signed-off-by: Remi Buisson <remi.buisson@tdk.com>
2025-11-27 14:46:23 +01:00
Tim Lin
8c00b5359b drivers: i2c: i2c_ite_enhance: refactor pio isr handling
This commit refactors the pio isr handling to avoid losing i2c
transactions that occur back-to-back. It also removes the
compile-time check for target buffer mode config, as both pio
and dma modes are now supported.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
2025-11-27 14:46:14 +01:00
Aksel Skauge Mellbye
eabde5b278 soc: silabs: Add xg24 variants
Add support for more SoC variants for xG24.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-11-27 14:45:47 +01:00
Robert Lubos
a00fefc5a9 net: sockets: tls: Specify a separate Kconfig option for TLS timeout
It's been periodically reported that the default connect timeout shared
with regular TCP sockets (3 seconds) is not enough for the TLS handshake
to complete. Therefore, it'd make sense to increase the default value
for TLS sockets specifically. However currently the option is used by
both TCP and TLS connections, which makes this impractical.

Therefore, introduce a separate CONFIG_NET_SOCKETS_TLS_CONNECT_TIMEOUT
Kconfig option for TLS sockets specifically, and set the default to 10
seconds. For samples/tests that modified the old option for TLS-specific
purpose, update the new option value as well.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-27 14:45:32 +01:00
Robert Lubos
996a0f445c net: sockets: tls: Fix timeout error code for blocking accept()
In case a handshake timed out on a blocking accept() call, the TLS
socket would return EAGAIN error which is ambiguous and not intuitive.
Report ETIMEDOUT instead.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-27 14:45:32 +01:00
Nikodem Kastelik
ad1e5ac253 nordic: update and align to nrfx 4.0.1
New nrfx release contains major rework of nrfx drivers
instantiation making it easier to integrate with dts nodes.
Now, nrfx driver instances can no longer be `const`
because they contain driver runtime state.
Additionally, all nrfx drivers return `errno` error codes
instead of deprecated `nrfx_err_t`.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2025-11-27 14:45:17 +01:00
Sylvio Alves
8ae38804ac tests: board: espressif: update net struct usage
Fix net struct naming convention.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-11-27 11:37:26 +01:00
Aurelien Jarno
5f5db5bf3c net: mqtt_sn: udp: use correct get/setsockopt parameters for IPv6
On IPv6, IPPROTO_IPV6 needs to be replaced by IPPROTO_IP and
IP_MULTICAST_TTL by IPV6_MULTICAST_HOPS.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2025-11-27 11:35:03 +01:00
Aurelien Jarno
5e3bf02e50 net: mqtt_sn: udp: ignore EALREADY when adding multicast addresses
On IPv6, the host is subscribed to a few multicast addresses by default.
Reusing such an address for MQTT-SN leads to an EALREADY error. Ignore
this error instead of returning. Do the same for IPv4 for consistency,
and because it could happen if the multicast address has already been
added manually from another part of the code, although this is really a
corner case.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2025-11-27 11:35:03 +01:00
Aurelien Jarno
e3013fe5c2 net: mqtt_sn: udp: reserve enough space to hold an IPv6 address
The current allocated buffer for storing the IP address is not always
large enough to hold an IPv6 address.  Instead of using a hard-coded
value, use NET_INET6_ADDRSTRLEN, which covers all cases, including
possible mapped IPv4 addresses.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2025-11-27 11:35:03 +01:00
Aurelien Jarno
05dd10c3f1 net: mqtt_sn: udp: fix return value in case of error
errno returns a positive value, while the API specifies that a negative
value is returned in case of error. Therefore replaces "return errno" by
"return -errno".

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2025-11-27 11:35:03 +01:00
Simon Piriou
25f667a6a0 net: l2: ieee802154: don't use net_context->local for AF_PACKET sockets
There is an issue with AF_PACKET sockets bound to ieee802154 l2 iface.
The socket keeps track of the iface link_addr with a sockaddr_ll_ptr
structure, with sll_addr pointing to the iface link_addr address, and
sll_halen being a copy of the iface link_addr length.

The iface link address for ieee802154 can change during association
between extended address (8 bytes) and short address (2 bytes). The
iface link_addr s correctly updated, but the sll_halen of already bound
sockets is not, as it's a out of sync local copy.

This commit fixes #99711 by replacing all the sll_halen usage for
AF_PACKET socket with the iface link_addr length directly on recv and
send paths.

Signed-off-by: Simon Piriou <spiriou31@gmail.com>
2025-11-27 11:34:54 +01:00
Lyle Zhu
57b7899e3a Bluetooth: att: Fix NULL pointer access issue
If the connect type is not `LE`, the return value of function
`bt_conn_get_dst()` is a NULL pointer. In function `bt_addr_le_str()`,
 the NULL pointer will be accessed without any checking. It will cause
the issue `Segmentation fault` in the platform `native_sim`.

Fix the issue by checking the conn type at the beginning of the
function `eatt_auto_connect()`.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-27 11:34:39 +01:00
Kiara Navarro
ee7792c343 lora: remove EXPERIMENTAL from already unstable api
Based on api lifecycle documentation, the lora driver has been recently
moved to unstable. This means that the state of this driver is no longer
experimental. Due this new state, the change should be updated on
Kconfig.

This commit remove the `EXPERIMENTAL` symbol selection from the driver
itself. It also remove the word `experimental` from the lora basic
modem backend since the api lifecycle documentation only describes the
state of the api based upon the api itself and not any particular
backend implementation.

Signed-off-by: Kiara Navarro <knavarro@paltatech.com>
2025-11-27 11:33:59 +01:00
Fabio Baltieri
0d64686ef5 include: ec_host_cmd: add an extra _ on handler structs
Add an extra _ on the handler struct name generated bu the
EC_HOST_CMD_HANDLER macros, this makes them a bit easier to list as they
now look something like

__cmd_EC_CMD_GET_VERSION

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-11-27 11:33:51 +01:00
Fabio Baltieri
0b63777843 include: ec_host_cmd: add a request and response only handler macros
Add two macro variants for registering handlers that have either only a
request structure or only a response structure.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-11-27 11:33:51 +01:00
Francois Ramu
b4cdb239c8 soc: st: stm32u5 set backup sram retention if regulator is LDO
On the stm32u5 series, this commit will enable backup sram regulator
when the regulator is LDO, during SOC init. Then stm32_backup_sram_init
does not change the backup SRAM retention anymore.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2025-11-27 11:33:40 +01:00
Hau Ho
75e0bea1c9 tests: drivers: spi: Add overlay file for spi_loopback test
Add overlay file for EK-RX261 and FPB-RX261 boards

Signed-off-by: Hau Ho <hau.ho.xc@bp.renesas.com>
2025-11-27 11:33:28 +01:00
Hau Ho
00a209e304 boards: renesas: Add SPI support for FPB-RX261 board
Add SPI support for FPB-RX261 board

Signed-off-by: Hau Ho <hau.ho.xc@bp.renesas.com>
2025-11-27 11:33:28 +01:00
Hau Ho
9082bb78bb boards: renesas: Add SPI support for EK-RX261 board
Add SPI support for EK-RX261 board

Signed-off-by: Hau Ho <hau.ho.xc@bp.renesas.com>
2025-11-27 11:33:28 +01:00
Hau Ho
51f3e6702d dts: renesas: rx: Add dts property node for SPI support on RX261
Add dts property node for SPI support on RX261

Signed-off-by: Hau Ho <hau.ho.xc@bp.renesas.com>
2025-11-27 11:33:28 +01:00
Jordan Yates
325c354913 scripts: build: ruff compliance
Update scripts in the build folder to pass all enabled `ruff` checks.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-27 11:33:18 +01:00
Jordan Yates
b9a3f42d18 scripts: build: apply ruff format
Apply `ruff` formatting rules to all scripts in the build folder.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-27 11:33:18 +01:00
Qingsong Gou
e968b69db8 drivers: adc: sf32lb: add adc driver support
Add adc driver for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-27 11:32:59 +01:00
Qingsong Gou
7fa0c99e4d dts: arm: sifli: add adc node
Add adc controller for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-27 11:32:59 +01:00
Qingsong Gou
a5cd2966d3 dts: bindings: adc: add sifli,sf32lb-gpadc
Add adc controller for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-27 11:32:59 +01:00
McAtee Maxwell
80ab57446f boards: add spi support for kit_pse84_eval_m33
- add spi to supported in board yaml file
- add spi_loopback test overlay

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-11-27 11:32:46 +01:00
McAtee Maxwell
32a75ec537 boards: update kit_pse84_eval/m33 to use cached address for flash
- update address for flash to cached address

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-11-27 11:32:46 +01:00
Benjamin Cabé
4d5b5d6575 doc: conf.py: add glossary link to sidebar
Add a link to the glossary in the "Reference" section of the sidebar.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-27 11:32:30 +01:00
Rico van Dongen
e55bf93d5d cmake: allow spaces in install path of GNU Arm Embedded linker
This commit fixes bug #95402. When the GNU toolchain is installed
in its default path the library include dir will contain spaces.
By encasulating the library path in quotes the linker works again.

Signed-off-by: Rico van Dongen <rdongen@ziggo.nl>
2025-11-27 11:32:19 +01:00
Lyle Zhu
741afc85af Bluetooth: Classic: HFP_AG: Optimize audio connect management
In current implementation, the call will be terminated, or rejected if
the audio connect cannot be established. But from the application
view, if the sco connect cannot be established, the audio paths can be
routed towards the AG. So force routeing the audio towards the HF is
not reasonable and it is not the mandatory.

The changes aim to keep the sequence that creating SCO connect in the
right time. And ignore the result whether the SCO connect has been
created or can be established.

If the audio connect cannot be established, the application can try to
change the audio route paths according to the audio connection
procedure.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-27 11:31:36 +01:00
Khoa Tran
940ae75941 tests: boards: renesas: Add ELC test support for mck_ra4t1
Add ELC test support for Renesas mck_ra4t1

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
26b7d8efec tests: drivers: flash: Add tests support for Renesas mck_ra4t1
Add support for test app on Renesas mck_ra4t1:
- tests/drivers/flash/common

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
da7f81d2ad tests: drivers: dma: Add tests support for Renesas mck_ra4t1
Add support for test app on Renesas mck_ra4t1:
- tests/drivers/dma/chan_blen_transfer
- tests/drivers/dma/chan_blen_transfer

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
d373a46a59 tests: drivers: dac: Add tests support for Renesas mck_ra4t1
Add support for test app on Renesas mck_ra4t1:
- tests/drivers/dac/dac_api
- tests/drivers/dac/dac_loopback

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
56c4611f6f tests: drivers: adc: Add tests support for Renesas mck_ra4t1
Add support for test app on Renesas mck_ra4t1:
- tests/drivers/adc/adc_accuracy_test
- tests/drivers/adc/adc_api

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
f267689288 tests: drivers: counter: Add test support for Renesas mck_ra4t1
Add support for test app on Renesas mck_ra4t1:
- tests/drivers/counter/counter_basic_api

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
7087edd517 tests: drivers: pwm: Add test support for Renesas mck_ra4t1
Add support for test app on Renesas mck_ra4t1:
- tests/drivers/i2c/i2c_api

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
9119b57834 tests: drivers: spi: Add test support for mck_ra4t1
Add support for test app Renesas mck_ra4t1:
- tests/drivers/spi/spi_loopback

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
798a81b7e7 tests: drivers: uart: Add test support for mck_ra4t1
Add support for test app on Renesas mck_ra4t1:
- tests/drivers/uart/uart_async_api

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
8e33cdb13f samples: boards: renesas: Add ELC sample support for mck_ra4t1
Add ELC sample support for Renesas mck_ra4t1

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
e7f3c41175 samples: drivers: adc: Add sample support for Renesas mck_ra4t1
Add support for sample apps on Renesas mck_ra4t1 board:
- samples/drivers/adc/adc_dt
- samples/drivers/adc/adc_sequence

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
a764f7b7cd samples: drivers: dac: Add sample support for Renesas mck_ra4t1
Add support for sample app on Renesas mck_ra4t1:
- samples/drivers/dac

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
4d61652415 samples: drivers: counter: Add sample support for Renesas mck_ra4t1
Add support for sample app on Renesas mck_ra4t1:
- samples/drivers/counter/alarm

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
8fbfe4fad5 boards: renesas: Add board support for Renesas mck_ra4t1
Add board layer support for Renesas mck_ra4t1 board

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
70eaa271f6 dts: arm: renesas: Add dts support for Renesas RA4T1 SoC series
Add dts support for Renesas RA4T1 SoC series

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
60fccde40e dt-bindings: misc: Add ELC enum dts bindings for RA4T1 SoC
Add RA4T1 SoC's ELC signal enums for devicetree bindings

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
8a86e9bbf9 soc: renesas: ra: Add support for Renesas RA4T1 SoC series
Add support for Renesas RA4T1 SoC series

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Khoa Tran
e1689f7fe7 manifest: update revision of hal_renesas to latest
Update revision of hal_renesas to get RA4T1 support

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-27 11:30:12 +01:00
Johann Fischer
0d515e777f drivers: udc_dwc2: avoid register read on disabled controller
The VBUS bounces when the USB connector is plugged in. This can lead to
events VBUS removed and Suspended occurring in that order. With
hibernation support enabled, hibernation request, as result of the
suspend interrupt, will be delegated to the driver thread. Once the
driver thread is scheduled to process hibernation request, the
controller may be already disabled and controller/phy clocks be off. On
nRF54LM20 this leads to CPU crash and a hang.

To avoid this happening, cancel the possible hibernation request after
interrupts are disabled. Although the thread could be still waked up
because of USBSUSP interrupt raised and event posted, this is considered
to be harmless, as there would be a second check in the thread whether
the event is still valid or is cleared in between.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2025-11-27 11:29:43 +01:00
Qiang Zhao
413414a550 tests: arm_irq_advanced_features: Use first-level IRQ for direct ISR test
CONFIG_NUM_IRQS - 1 may be a second-level interrupt number on platforms
with multi-level interrupt support. Second-level interrupts cannot be
used for direct ISR testing.

Use CONFIG_2ND_LVL_ISR_TBL_OFFSET - 1 when available to ensure we test
with a first-level interrupt that supports direct ISR functionality.

Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
2025-11-27 11:29:34 +01:00
Camille BAUD
a92b122c4a boards: bflb: Add SPI tests support to some boards
Adds SPI tests running

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-27 11:27:45 +01:00
Camille BAUD
2c8912e223 drivers: spi: Introduce Basic BFLB SPI driver
Introduce spi driver with basic features

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-27 11:27:45 +01:00
Camille BAUD
ba2a602ff9 dts: bflb: Add spi nodes
Adds Node for SPI driver to bl61x and bl70x

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-27 11:27:45 +01:00
Camille BAUD
b46ce633dd drivers: clock_control: bflb: Add SPI elements
Add clock elements to enable using SPI

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-27 11:27:45 +01:00
Camille BAUD
b257655da3 west.yml: Update hal_bouffalolab to latest
Updates hal version to have spi defines fixes.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-27 11:27:45 +01:00
Vinayak Kariappa Chettimada
61a8648c2c Bluetooth: Controller: Replace Kconfig select with depends
Replace use of `select` with `depends on` in the LL_SW_SPLIT
Kconfig options.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2025-11-26 12:17:47 -05:00
Qingsong Gou
6e2b729cad samples: subsys: fs: fs_sample: add board sf32lb52_devkit_lcd support
Add board sf32lb52_devkit_lcd support

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-26 12:17:32 -05:00
Qingsong Gou
9874f7c451 boards: sifli: sf32lb52_devkit_lcd: enable spi1
Enable spi1 on sf32lb52_devkit_lcd board

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-26 12:17:32 -05:00
Qingsong Gou
d3037c6361 drivers: spi: add spi driver for sf32lb platform
Add spi driver for sifli sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-26 12:17:32 -05:00
Qingsong Gou
615c35549e dts: arm: sifli: sf32lb: add spi definition
Add spi for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-26 12:17:32 -05:00
Qingsong Gou
26c0acb7c4 dts: bingdings: spi: sf32lb: add spi bingdings
Add spi controller bingdings

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-26 12:17:32 -05:00
Aleksander Wasaznik
04b8dbae4b Bluetooth: Host: Disable bt_hci_cmd_send_sync workaround
The workaround in bt_cmd_send_sync should no longer by needed when
tx_processor is not on the system work queue.

Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
2025-11-26 12:16:43 -05:00
Aleksander Wasaznik
f101976e31 Bluetooth: Host: Run tx processor on its own thread
When thread that TX processor is used to send commands and data to
Controller is also used for sync commands sending and command buffer
allocation, a deadlock happens.

This thread is used to avoid such deadlocks by moving TX processor to
its own dedicated thread exclusively used by tx processor only.

Co-authored-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
2025-11-26 12:16:43 -05:00
Aleksander Wasaznik
0ee5d70f38 Bluetooth: Samples: Reduce RAM requirement of peripheral_identity
Reduce BT_MAX_CONN from 62 to 61 to make it build on integration
platform qemu_cortex_m3/ti_lm3s6965 when we add bt_taskq in subsequent
commit.

The number 62 seems arbitrary here, so reducing it by one should not
have any practical impact.

Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
2025-11-26 12:16:43 -05:00
Aleksander Wasaznik
6889042d96 Bluetooth: Host: Don't call user callback from TX thread
ATT is invoking user callbacks in its net_buf destroy function. It is
common practice that these callbacks can block on bt_hci_cmd_alloc().
This is a deadlock when the net_buf_unref() happens inside the HCI
driver, invoked from tx_processor.

Blocking callbacks like this appear in our own samples. See further down
about how this problem was detected.

tx_processor not protect against blocking callbacks so it is de-facto
forbidden. The Host should not equip net_bufs with dangerous destroy
callbacks.

This commit makes ATT defer its net_buf destruction and user callback
invocation to the system workqueue, so that net_buf_unref is safe to
call from non-blocking threads. In the case of the deadlock, the
net_buf_unref() was below the tx_processor in the call stack, which (at
the time of this commit) is on the system work queue, so defering it to
the system work queue is preserving the existing behavior.

Future improvement may be to allow the user to provide their own
workqueue for ATT callbacks.

This deadlock was detected because the following test was failing while
moving tx_processor to the bt_taskq:

    tests/bsim/bluetooth/ll/throughput/tests_scripts/gatt_write.sh

The above test has an ATT callback `write_cmd_cb` invokes
`bt_conn_le_param_update` can block waiting for `tx_processor`.

The reason it was not failing while tx_processor was on the system work
queue is that the GATT API has a special non-blocking behavior when
called from the system work queue.

Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
2025-11-26 12:16:43 -05:00
Pieter De Gendt
8439d0d917 doc: releases: 4.4: Add NVMEM entry for flash device support
Add an entry with Kconfig options for NVMEM on flash devices.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-26 12:16:08 -05:00
Pieter De Gendt
f704a832ff tests: nvmem: Add flash testcase
Add an overlay/config to test the NVMEM subsystem with a flash driver.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-26 12:16:08 -05:00
Pieter De Gendt
a85f73386d nvmem: Add flash support
Allow flash devices to be accessed using the NVMEM API. Note that it simply
uses the read/write API functions. Erasing should be handled by the
application.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-26 12:16:08 -05:00
Mathieu Choplain
e784a030f2 scripts: runners: stlink_gdbserver: add support for --no-load
Add support for the --load/--no-load argument from the base runner class.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-26 12:15:53 -05:00
Mathieu Choplain
2240f10f16 scripts: runners: generalize --no-load argument
Move the existing "--no-load" argument from the OpenOCD and Intel Cyclone V
runners into an argument in the runners base class such that it can be used
by all runners. Also update the existing runners to work with the common
option instead of their own.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-26 12:15:53 -05:00
Zhaoxiang Jin
bcb1813f5c drivers: systick: Add prompt for CORTEX_M_SYSTICK_RESET_BY_LPM
This commit adds a prompt to the Kconfig file to make
CORTEX_M_SYSTICK_RESET_BY_LPM option more visible to users
configuring the driver.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-11-26 12:15:26 -05:00
Zhaoxiang Jin
3e5320192b drivers: cortex_m_systick: add stub callback for idle timer alarm
When low-power mode timer is enabled, a counter alarm is set on the
idle timer before entering low-power mode. The counter API requires
a non-NULL callback function for the alarm. This commit adds a stub
callback function to satisfy the API requirement.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-11-26 12:15:26 -05:00
Ilan Costa
26316742f0 boards: heltec: add support for heltec_wireless_tracker
Add support for heltec_wireless_tracker

Signed-off-by: Ilan Costa <ilan.costa@gmail.com>
2025-11-26 12:14:06 -05:00
John Batch
2ec1a8d734 tests: spi: Removing references to infineon,cat1-spi-pdl
Removing references to infineon,cat1-spi-pdl.  Differentiation between
PDL and HAL drivers have been changed to use Kconfig options.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-26 12:13:48 -05:00
John Batch
5c2332c7d4 drivers: spi: Removing devicetree references to cat1-spi-pdl
Removing references to infineon,cat1-spi-pdl from the device tree files.
Updates the driver bindings and driver file to look at the
infineon,cat1-spi binding and uses a Kconfig option to select Legacy HAL
implementation instead.

See https://github.com/zephyrproject-rtos/zephyr/pull/98035 for context.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-26 12:13:48 -05:00
Tomasz Moń
152844a7e0 usb: device_next: msc: Do not leak SCSI buffer on dequeue
Multiple submitted requests are getting merged to single cancelled
net_buf on endpoint dequeue. While MSC class was correctly decrementing
the usage counters, it was not freeing SCSI buffer pointed to by frags.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-11-26 12:11:59 -05:00
Erwan Gouriou
6b6018e969 drivers: interrupt_controller: stm32: Fix discontinuous index in n6/mp1x
Similarly to what was present on L0, GPIO port indexes are not continuous
in EXTI configuration register and a dedicated treatment is required.
Deal with it case by case.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-11-26 12:11:48 -05:00
Qingsong Gou
0278e67afa drivers: rtc: sf32lb: fix nsec error
Fix nsec set and get

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-26 12:11:39 -05:00
Anas Nashif
d1170f668a doc: various fixes for include path
Many include paths missing the zephyr namespace.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-26 12:11:27 -05:00
Anas Nashif
5f91f5fb38 doc: fix reference to kernel.h
Fix reference to kernel.h and add zephyr namespace where it was missing.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-26 12:11:27 -05:00
Aksel Skauge Mellbye
ad867a1264 drivers: entropy: gecko_trng: Fix blocking behavior
entropy_get_entropy() is allowed to block while waiting for
entropy. Don't exit with an error if entropy is exhausted,
wait instead. Move clock enable out of the inner loop to avoid
unnecessarily calling it multiple times.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-11-26 11:09:19 +00:00
Sebastian Bøe
e0ad51e375 soc: nordic: gen_uicr: Enable IS_GEN_UICR_IMAGE by default
Enable IS_GEN_UICR_IMAGE by default for the gen_uicr image.

A recent change accidentally made this default n, and broke a bunch of
users.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2025-11-26 11:08:09 +00:00
Andrew Kontra
c47de21db3 net: Using const char * in net_hostname_set()
When calling net_hostname_set() from C++, you will hit compile
errors if you attempt to use a const char *. Since the internals
of net_hostname_set() just uses memcpy(), we should pass in the
new hostname as a const char * to better support C++.

Tested using samples/cpp/hello_world, with an added call to
net_hostname_set().

Signed-off-by: Andrew Kontra <andrew@legatoxp.com>
2025-11-26 11:06:34 +00:00
Andrzej Głąbek
15dabaa595 drivers: uart_nrfx_uarte: Fix runtime device PM for interrupt driven API
Add missing getting/putting of the device when the RX interrupt is
enabled/disabled. Also fix enabling and disabling of the TX interrupt
so that the device is got/put only if the interrupt wasn't already
enabled/disabled and device PM reference counting is done correctly.

This fixes `console_getchar()` that would hang when used with
`CONFIG_PM_DEVICE_RUNTIME=y`.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-11-26 11:06:18 +00:00
Matthias Alleman
1feafdbef7 tests: drivers: build_all: ethernet: add testing of ethernet-phy
Add build test for ethernet-phy compatible

Signed-off-by: Matthias Alleman <matthias.alleman@basalte.be>
2025-11-26 11:05:52 +00:00
Matthias Alleman
60fd112806 drivers: ethernet: phy: phy_mii: add gpio reset
Add support for hardware reset to the phy_mii driver

Signed-off-by: Matthias Alleman <matthias.alleman@basalte.be>
2025-11-26 11:05:52 +00:00
Etienne Carriere
6b2e014292 tests: drivers: memc: test full SDRAM on a few stm32 boards
Add an overlay for some STM32 boards that embed an SDRAM connected
through FMC interface to better cover their accessibility. Despite
each SDRAM is a few MByte large test are not too long lasting:
- stm32f429i_disc1 .... 8MByte: <1s
- stm32f469i_disco ... 16MByte: <1.5s
- stm32f746g_disco .... 8MByte: <1s
- stm32f7508_dk ......  8MByte: not tested
- stm32f769i_disco ... 16MByte: ~2s
- stm32h745i_disco .... 8MByte: <0.2s
- stm32h747i_disco ... 32MByte: <0.6s
- stm32h750b_dk ....... 8Mbyte: <0.2s
- stm32h757i_eval .... 32MByte: not tested
- stm32h7b31i_dk ..... 16MByte: not tested

Adding these test ensures non-regression on SDRAM support.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:05:35 +00:00
Etienne Carriere
b88d259b5c tests: drivers: memc: fix minor inconsistencies in offsets
Correct memc driver test application to allocated only the required
size for the tests and print valid information instead of byte
offset that was actually a 32bit cell pointer offset.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:05:35 +00:00
Etienne Carriere
2b858a4c6b boards: st: stm32f7508_dk: Fix sdram available size
According to UM2470 Rev 2 section 4.13 "SDRAM memory" [1], the
available SDRAM size is only 8MB since only the lowest 64-Mbit
are accessible despite the SDRAM capacity is 16MByte (128MBit).

Link: https://www.st.com/resource/en/user_manual/um2470-discovery-kit-for-stm32f7-series-with-stm32f750n8-mcu-stmicroelectronics.pdf [1]
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:05:35 +00:00
Etienne Carriere
6240bdcbe5 boards: st: stm32f746g_disco: Fix sdram available size
According to UM1907 Rev 6 section 5.13 "SDRAM Memory" [1], the
available SDRAM size is only 8MByte since only the lowest 64Mbit are
accessible despite the SDRAM capacity is 16MByte (128MBit).

Link: https://www.st.com/resource/en/user_manual/um1907-discovery-kit-for-stm32f7-series-with-stm32f746ng-mcu-stmicroelectronics.pdf [1]
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:05:35 +00:00
Etienne Carriere
c4df2dbcc4 boards: st: stm32h750b_dk: increase FMC SDRAM clock period
Testing full SDRAM access on stm32h750b_disco showed instabilities
and corrupted accessed. Increasing the FMC SDRAM clock period fixes
the issue.

This change ensures stability of transactions with the SDRAM but
may be sub-optimized regarding performances. An alternate correction
would need further investigations in the FMC interface timings
and clocks configuration.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:05:35 +00:00
Etienne Carriere
68cd3ad30d boards: st: stm32h745i_disco: increase FMC SDRAM clock period
Testing full SDRAM access on stm32h745i_disco showed instabilities
and corrupted accessed. Increasing the FMC SDRAM clock period fixes
the issue.

This change ensures stability of transactions with the SDRAM but
may be sub-optimized regarding performances. An alternate correction
would need further investigations in the FMC interface timings
and clocks configuration.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:05:35 +00:00
Omkar Kulkarni
d8ed0f8e3d tests: Bluetooth: Tester: Audio: Adds BRS
This commit adds API to tester to allow exposing of Broadcast Receive
State.

Signed-off-by: Omkar Kulkarni <omkar.kulkarni@nordicsemi.no>
2025-11-26 11:05:19 +00:00
Omkar Kulkarni
b6e5d03ff4 bluetooth: audio: Update encrypt state value
Fixes a bug where encrypt state value was not updated based on given
parameters.

Signed-off-by: Omkar Kulkarni <omkar.kulkarni@nordicsemi.no>
2025-11-26 11:05:19 +00:00
Benjamin Cabé
9a3a6dacf2 doc: hardware: porting: clarify board porting recommendations
This commit introduces some clarifications to the "General
Recommendations" in the board porting documentation, in particular it
makes it clearer that DT nodes for key peripherals should be configured
AND enabled. It also makes it easier to see the set of recommendations
at a glance by adding a short summary for each item.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Co-authored-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-11-26 11:05:11 +00:00
Chaitanya Tata
e797874fbb manifest: hostap: Pull fix for SAE
Fix build failure in case a different SAE implementation is used (e.g.,
PSA).

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-11-26 11:04:34 +00:00
Lyle Zhu
25d2c50ca3 Bluetooth: Classic: HFP_HF: Correct definition of supported features
In current implementation, there are two issues found,

Issue 1, the feature defined in the SDP HFP HF record are used in
combination as HFP HF supported features reported via `+BRSF`.

Issue 2, the macro `BT_HFP_HF_FEATURE_CODEC_NEG_ENABLE` is not
aligned with macro name of other features. The other macros are named
with prefix `BT_HFP_HF_FEATURE_`.

Use `BT_HFP_HF_FEATURE_VOLUME_ENABLE` to set the volume feature
instead of `BT_HFP_HF_SDP_FEATURE_VOLUME_ENABLE`.

Rename `BT_HFP_HF_CODEC_NEG_ENABLE` with new name
`BT_HFP_HF_FEATURE_CODEC_NEG_ENABLE`.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-26 11:04:23 +00:00
Joel Schaller
8f6b216ec0 shell: backend: telnet: No Error ENETDOWN
Set Log Level to Info when the Telnet socket reports ENETDOWN,
instead of logging an error each time the network is down.

Signed-off-by: Joel Schaller <joel.schaller16@gmail.com>
2025-11-26 11:04:13 +00:00
Etienne Carriere
ca9d5e8190 drivers: ipm: stm32_hsem: clean indentation in instance init macros
Clean indentation in macros used to define instances in STM32
HSEM hardware semaphore drivers.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:03:50 +00:00
Etienne Carriere
a2a9541cea drivers: serial: stm32: simplify ISR handlers definition
Simplify interrupt handler helper macros by removing
STM32_UART_IRQ_HANDLER_DECL(), using STM32_UART_IRQ_HANDLER() only
renamed STM32_UART_IRQ_HANDLER_DEFINE() and aggregating where the
macro and STM32_UART_IRQ_HANDLER_FUNC() macro are defined.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:03:50 +00:00
Etienne Carriere
8001b3c343 drivers: serial: stm32: clean indentation in instance init macros
Clean indentation in local macros used to define UART instances.
Remove extra line escape ending CONFIG_UART_ASYNC_API() macro value.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:03:50 +00:00
Etienne Carriere
2f4962fa0a drivers: pwm: stm32: clean indentation in instance init macros
Clean indentation in IRQ_CONNECT_AND_ENABLE_BY_NAME(), IRQ_CONFIG_FUNC()
and IRQ_CONNECT_AND_ENABLE_DEFAULT() macros of STM32 PWM driver.
Remove a useless trailing semi column character in the interrupt function
defined with IRQ_CONFIG_FUNC() macro.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:03:50 +00:00
Etienne Carriere
b69361f88b drivers: i3c: stm32: clean indentation in instance init macros
Clean indentation in STM32_I3C_DMA_CHANNEL_INIT() and
STM32_I3C_DMA_CHANNEL() macros of STM32 I3C driver.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:03:50 +00:00
Etienne Carriere
f98f568275 drivers: i2c: stm32: clean indentation in instance init macros
Clean indentation in I2C_DMA_DATA_INIT() and I2C_STM32_INIT() macros.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:03:50 +00:00
Etienne Carriere
9dfd35115b drivers: sdmmc: stm32: clean indentation in instance init macros
Clean indentation in SDMMC_DMA_CHANNEL() macro and fix an extra line
escape at last line of SDMMC_DMA_CHANNEL_INIT() macro value.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:03:50 +00:00
Etienne Carriere
2ea6435bb7 drivers: clock_control: stm32: clean indentation in instance init macros
Clean indentation in STM32_MCO_INIT() and STM32_MUX_CLK_INIT() macros.
Add after coma pclken field value in stm32_clk_mux_cfg_##id to ease
possible later changes.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-26 11:03:50 +00:00
Pieter De Gendt
dbdd5e91e7 doc: releases: migration-guide-4.4: Keep device drivers titles sorted
Add zephyr-keep-sorted tags to force sorted titles in the "Device Drivers
and Devicetree" section.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-26 07:10:50 +00:00
Pieter De Gendt
d1bcedea9f doc: releases: migration-guide-4.4: Fix QSPI title
Add missing = for the QSPI title.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-26 07:10:50 +00:00
Jiafei Pan
0ec9360cf4 scripts: requirements: update pyocd version
Update pyocd version to be greater than or equal to 0.36.0 to fix
the potential hang issue when execute "west packages pip --install"

This PR is to fix the issue #99115.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-11-26 07:10:39 +00:00
Mihira Madhava Bollapragada
adf1c8c693 drivers: intc: change the VIM kconfig to TI_VIM
VIM is a vector interrupt manager that TI devices have and is used a
interrupt controller. the driver's Kconfig selection is created as "VIM"
and is resulting in the confusion with a Text Editor name.

Make the VIM Kconfig option to indicate the vendor TI name in it.

Signed-off-by: Mihira Madhava Bollapragada <madhava@ti.com>
2025-11-26 07:10:13 +00:00
Yongxu Wang
38751613f6 dts: arm: nxp: disable gpio node for imx95 m7
Disable gpio node in imx95 m7 which not owner gpio privilege
in default system manager config, the status should be set as okay
in specific case test instead of nxp_imx95_m7.dtsi

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-11-26 07:09:57 +00:00
Fabin V Martin
5818719c96 boards: sam_e54_xpro: add entropy support
Add zephyr,entropy to chosen node and
entropy in supported list

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-11-26 07:09:41 +00:00
Fabin V Martin
876eb94234 drivers: entropy: microchip: add entropy g1 driver
Add entropy g1 driver for Microchip TRNG

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-11-26 07:09:41 +00:00
Fabin V Martin
8f23bd31e7 dts: arm: microchip: add entropy node and bindings
Add entropy node and binding parameters for microchip
TRNG entropy g1 driver

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-11-26 07:09:41 +00:00
David Leach
9045474411 maintainer: hal_openisa: Add zejiang0jason as collaborator
Adding Zejiang0jason as collaborator to the openisa HAL. He was the
developer of the original SDK.

Signed-off-by: David Leach <david.leach@nxp.com>
2025-11-25 20:25:42 -05:00
Dmitrii Sharshakov
4cc737f9a5 settings: its: do not rely on TFM settings override
Use config from TF-M instead, not necessitating an override.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-11-25 20:23:56 -05:00
Dmitrii Sharshakov
36ee86d3dc tests: settings: its: enable functional tests for TF-M ITS
Run on mps2/an521/cpu0/ns.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-11-25 20:23:56 -05:00
Dmitrii Sharshakov
db904d1511 settings: its: move structure to a header
This private header can be used by tests for information on UID ranges
that should be cleaned for testing.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-11-25 20:23:56 -05:00
Dmitrii Sharshakov
2a46964794 samples: settings: run integration on QEMU with TF-M
Make sure ITS backend is tested in the CI.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-11-25 20:23:56 -05:00
Dmitrii Sharshakov
f73eae4757 tests: settings: its: run on mps2/an521/cpu0/ns
Run on QEMU to make sure this is tested in the CI.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-11-25 20:23:56 -05:00
Dmitrii Sharshakov
d5905de2db settings: its: enable TF-M PSA headers
Avoid missing headers on some platforms like mps2/an521/cpu0/ns.

Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
2025-11-25 20:23:56 -05:00
Sreeram Tatapudi
0efab13217 tests: subsys: logging: Add overlay for PSE84
Add required overlay files to enable log_backend_fs test
for kit_pse84_eval board

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-11-25 20:23:14 -05:00
Sreeram Tatapudi
59801cf6a7 tests: drivers: flash: kit_pse84_eval: Add support for flash testing
Enabling test application for PSE84

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-11-25 20:23:14 -05:00
Sreeram Tatapudi
a039b94f48 drivers: flash: Infineon: Add QSPI Flash driver for PSE84
Add QSPI Flash driver for PSE84 (based on the serial-memory asset)

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2025-11-25 20:23:14 -05:00
Daniel Leung
a6fe6a8f7d xtensa: fix unused func warning on l2_page_tables_counter_inc
xt-clang complains about l2_page_tables_counter_inc() being
unused but not GCC. So fix that by using it somewhere else.

Fixes #99753

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-25 20:22:54 -05:00
Bill Waters
e787380ec8 soc: infineon: edge: pse84: slot size
Increase the slot size for secure applications to
support testing applications that require more than
the default size of 0x20000

Signed-off-by: Bill Waters <bill.waters@infineon.com>
2025-11-25 20:22:45 -05:00
Pisit Sawangvonganan
7aa052e7f1 drivers: can: sja1000: consolidate SFF/EFF payload loops
Utilize `data_reg` to select the appropriate SFF/EFF data register
base and use a single read/write loop for frame data access.
This replaces the separate SFF/EFF loops, streamlining the code
and reducing its footprint.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2025-11-25 20:22:33 -05:00
Benjamin Cabé
9d23d32814 drivers: input: gt911: prefix all macros
macros with very generic name like DEVICE_ID are really not ideal so
prefix them all with GT911_.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-25 20:22:20 -05:00
David Leach
4a2fca31c0 maintainers: hal_nxp: update maintainers and collaborators.
Expanding responsibilities for hal_nxp:

- Add ZhaoxiangJin to the maintainers list to allow merge rights on HAL
- Add zejiang0jason and Holt-Sun to the collaborators list for review

Signed-off-by: David Leach <david.leach@nxp.com>
2025-11-25 20:21:42 -05:00
Chris Wilson
5220936bbc soc: st: stm32: add '-align' flag for signing tool v2.21.0+
Starting in v2.21.0, the STM32 signing tool ('STM32_SigningTool_CLI')
stopped automatically adding padding bytes at the beginning of the
payload to align it to the 0x400 offset. To restore this behavior, the
'-align' flag must be passed to the signing tool post-build command.

This commit checks for signing tool version v2.21.0 or higher and
appends the '-align' flag to the post-build signing command. It also
changes local CMake variable names to lower case and corrects some
indentation issues.

Fixes zephyrproject-rtos/zephyr#99456

Signed-off-by: Chris Wilson <chris@binho.io>
2025-11-25 21:13:29 +00:00
Peter Mitsis
599e3bba04 tests: Stack safety for thread analyzer
Adds stack safety to thread analyzer test case.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-11-25 19:25:44 +00:00
Peter Mitsis
70347cec76 debug: Integrate stack safety into thread analzyer
This updates the thread analyzer to optionally leverage the kernel's
thread runtime stack safety infrastructure to act upon threads whose
unused stack space has fallen below their configured thresholds.

By default, the thread analyzer merely reports what it has found.
However, a developer can override this behavior with a custom handler
using thread_analyzer_stack_safety_handler_set().

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-11-25 19:25:44 +00:00
Peter Mitsis
c08905ecc9 kernel: Add thread runtime stack safety
Adds support for thread runtime stack safety. This kernel feature
allows a developer to run enhanced stack usage checks on threads
such that if the amount of unused stack space drops below a thread's
configured threshold, it will invoke a custom handler/callback.

This can be used by monitoring software to log warnings, suspend
or abort threads, or even reboot the system.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-11-25 19:25:44 +00:00
Benjamin Cabé
962a4cadec doc: net: ensure PTP docs appears in only one table of contents
PTP docs are already included in the TSN section, so removing from
protocols.rst to avoid duplication and Sphinx warnings.

Fixes zephyrproject-rtos/zephyr#95438.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-25 19:25:12 +00:00
Robert Lubos
0f9131e351 net: tcp: Fix out-of-bound warnings in debugging code
A few debug logs in TCP code relied on a fact that IP address offset is
the same in struct sockaddr_in and sockaddr_in6. However, the logs
casted the address to struct sockaddr_in, which is smaller than
sockaddr_in6, causing theoretical out-of-bounds access warnings in IPv6
case. Fix this by casting to struct sockaddr_in6 instead.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-25 19:25:05 +00:00
Marek Matej
b4ee630506 soc: espressif: esp32c6: set early init stack
Early init stack pointer can interfere with bss segments if grown
enought, therefore stack pointer is set to safe area before starting
init.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2025-11-25 19:24:57 +00:00
Humphrey Chiramba
960586509b drivers: wifi: esp32: Enable WiFi connection by specifying BSSID
Added a method for users to connect to a given access point
by specifying its MAC address.

Signed-off-by: Humphrey Chiramba <humphrey@plentify.co.za>
2025-11-25 19:24:26 +00:00
Mathieu Choplain
c1d16c0555 drivers: usb: udc: stm32: instance-aware clock configuration handling
Instead of using globals, save the clock configuration from DTS in each
instance's configuration block, from which it is consumed by the driver's
clock configuration functions.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-25 17:39:37 +00:00
Mathieu Choplain
172aa3658a drivers: usb: udc: stm32: use direct function calls for clock on/off
To enable/disable clocks, the UDC driver used function pointers stored in
the instance private data(!), which *could* be NULL... but in practice,
they were always initialized. Furthermore, the clock configuration is
done through Clock Control API calls so the code can be shared by all
instances.

Replace indirect calls through function pointers with direct calls to the
"priv_clock_(dis|en)able" function, which are renamed to "udc_stm32_..."
for consistency with the rest of the driver. The now-unused function
pointers are also removed from the instance data structure.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-25 17:39:37 +00:00
Mathieu Choplain
e5fdd46a39 drivers: usb: udc: stm32: expand USB_RAM_SIZE in place where it's consumed
Instead of using global macro "USB_RAM_SIZE", replace it by its content
(i.e., DT_INST_PROP()) in the only place where it was used.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-25 17:39:37 +00:00
Martin Hoff
87ab3e337a soc: silabs: siwx91x: introduce zero latency irq
The HAL used by the SiWx91x SoC implements a mechanism to protect
atomic sections. Since this HAL also supports a zero-latency
interrupt (ZLI) mechanism, we need to ensure the same number of
bits are used for ZLI interrupts.
The interrupt priority level (2) depends on a hardcoded value in the
Simplicity SDK (CORE_ATOMIC_BASE_PRIORITY_LEVEL).
Without this fix, arch_irq_lock (which sets the BASEPRI register to
0x4 when zero-latency interrupts are not enabled) is overridden by
CORE_EnterAtomic in the HAL, which sets BASEPRI to 0xC since the HAL
does not use the BASEPRI_MAX function. IRQ might then fires since it's
register with a lowest priority in Zephyr.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-11-25 17:39:13 +00:00
Peter Mitsis
ce6c26a927 kernel: Simplify move_current_to_end_of_prio_q()
It is now more obvious that the move_current_to_end_or_prio_q() logic
is supposed to match that of k_yield() (without the schedule point).

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-11-25 17:37:52 +00:00
Peter Mitsis
77ad7111e1 kernel: Rename move_thread_to_end_of_prio_q()
All instances of the internal routine move_thread_to_end_of_prio_q()
use the current thread. Renaming it to move_current_to_end_of_prio_q()
to reflect that.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-11-25 17:37:52 +00:00
Peter Mitsis
ffc6c8839b kernel: Rename z_move_thread_to_end_of_prio_q()
The routine z_move_thread_to_end_of_prio_q() has been renamed to
z_yield_testing_only() as it was only both only used for test code
and always operated on the current thread.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2025-11-25 17:37:52 +00:00
Beleswar Prasad Padhi
7e6215e140 scripts: west_commands: Log a hint for rate-limit failure during install
`west sdk install` may fail with a GitHub API rate-limit (HTTP 403)
error. This typically occurs when the command is run multiple times
after previous failures, which is common for new users setting up
the project. Currently, the thrown exception only links to a generic
GitHub rate-limit documentation page, which may be confusing to users.

Users can bypass the rate limit by authenticating with GitHub using a
Personal Access Token. The install script supports this via the
`--personal-access-token` argument. Therefore, detect rate-limit related
failures and print a helpful message suggesting the use of this
argument or netrc based authentication.

Signed-off-by: Beleswar Prasad Padhi <b-padhi@ti.com>
2025-11-25 17:37:19 +00:00
Qingsong Gou
25318f9623 tests: drivers: rtc: Add tests support on sf32lb52_devkit_lcd board
Add tests support on sf32lb52_devkit_lcd board

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-25 17:36:45 +00:00
Qingsong Gou
23e8e3bb3f drivers: rtc: sf32lb: add rtc alarm support
Add rtc alarm support for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-25 17:36:45 +00:00
Qingsong Gou
f730c7cdf9 dts: bindings: rtc: sf32lb: fix alarms-count missing
Add alarms-count to rtc node

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-25 17:36:45 +00:00
Daniel Leung
29c478361a tests: kernel/smp: rework signals in stress test
The k_poll signal and event code is reworked a bit such that
signal is raised and event is processed only when appropriate.
We want to avoid changing the internal of event and signal
objects at the same time we try to raise the signal (which
changes the internal states too).

In addition, print out some information on how many signals
raised and received to indicate we are actually switching
all related threads.

Fixes #98136

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-25 17:36:16 +00:00
Bjarki Arge Andreasen
034d3d3325 nordic: nrf54h: bicr: allow for custom bicr.json in application
Allow placing a custom bicr.json file in the application source
folder which will be used instead of the default one in the
boards folder. Also allows setting a custom name to use for the
file so multiple files can be placed in either boards or app dirs
and selected with Kconfig (prj.conf or <board>.conf)

The following will take precedence over the bicr.json file in the
board folder:

- <app>/bicr.json
- <app>/bicr_foo.json + CONFIG_SOC_NRF54H20_BICR_NAME="bicr_foo.json"

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-11-25 17:35:23 +00:00
Pieter De Gendt
5421bfc9c7 doc: releases: 4.4: Add entries for Ethernet MAC address configuration
Add an entry with the symbols introduced for Ethernet MAC address
configuration.
Add removed symbols to the migration guide.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-25 16:21:30 +00:00
Pieter De Gendt
cf0d1b877e drivers: ethernet: sam_gmac: Use ethernet MAC configuration
Rework the Atmel SAM GMAC driver to read a MAC address from the provided
NVMEM cell instead of using I2C commands directly.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-25 16:21:30 +00:00
Pieter De Gendt
9445d5dc32 tests: drivers: ethernet: Add MAC address configuration tests
Add a test suite for validating MAC address configuration variations.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-25 16:21:30 +00:00
Pieter De Gendt
604efc4e0f drivers: ethernet: eth_test: Add MAC configuration support
Add structs to the vnd,ethernet test driver for MAC address configuration
support.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-25 16:21:30 +00:00
Pieter De Gendt
509b2c4688 dts: bindings: ethernet: Add nvmem-consumer to ethernet-contoller
Turn ethernet controller devicetree nodes into NVMEM consumers. Allow
passing mac-address cells.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-25 16:21:30 +00:00
Pieter De Gendt
7bc538a8ee drivers: ethernet: Add Helper function to load MAC address
Given an ethernet MAC configuration struct, load a MAC address into a
provided array.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-25 16:21:30 +00:00
Pieter De Gendt
d513f8e3b5 include: zephyr: net: ethernet.h: Add MAC address configuration
Add MAC address configuration struct and macros.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-25 16:21:30 +00:00
Saravanan Sekar
d837c9531e net: lib: ocpp: cleanup outdated code from initial design
Cleanup outdated code from initial design.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2025-11-25 16:07:44 +00:00
Peter van der Perk
5f95facee0 include: zephyr: arch: add GCC/Clang check for CFI support
Add a preprocessor check to ensure that DWARF Control Flow Integrity (CFI)
headers are only included when building with GCC or Clang toolchains, as
CFI support is currently limited to these compilers. This prevents
unsupported compilers from including architecture-specific CFI headers.

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-11-25 16:07:29 +00:00
Jukka Rissanen
5e4aa5e75e tests: net: all: Compile test network packet filter code
Add pkt_filter library to be compile tested by network all tests.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-25 16:06:56 +00:00
Jukka Rissanen
2d7d56964c net: shell: filter: Convert to use Zephyr APIs
The filter shell used POSIX symbols so replaced them by
Zephyr APIs.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-25 16:06:56 +00:00
Jukka Rissanen
f53e6041b7 tests: net: all: Compile test tftp library code
Add tftp library to be compile tested by network all tests.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-25 16:06:56 +00:00
Jukka Rissanen
7a84027de2 net: tftp: Replace POSIX symbols by Zephyr network API symbols
Replace "struct sockaddr" by "struct net_sockaddr" as that is
the remaining of the POSIX symbols found in the tftp library.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-25 16:06:56 +00:00
Jukka Rissanen
016b2f2237 tests: net: all: Compile test PTP library code
Add PTP library to be compile tested by network all tests.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-25 16:06:56 +00:00
Jukka Rissanen
e458197499 net: ptp: Convert to use Zephyr network APIs
Couple of POSIX API leftovers replaced by Zephyr network APIs.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-25 16:06:56 +00:00
Jukka Rissanen
afedd24451 drivers: ethernet: net: Replace POSIX symbols by Zephyr ones
The native_sim Ethernet driver was still using POSIX symbols,
so convert these to use Zephyr ones.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-25 16:06:56 +00:00
Jukka Rissanen
a01256a233 samples: net: Replace POSIX symbols by Zephyr ones
These samples were still using POSIX symbols without enabling
POSIX APIs, so convert these to use Zephyr ones.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-25 16:06:56 +00:00
Jukka Rissanen
34a1e5411e samples: net: Convert to use POSIX APIs
Convert coap_download and coap_upload to use POSIX APIs just to be
consistent with other samples in sockets directory.

Replace non-POSIX network symbols by POSIX ones in the network
samples. We do not want to have network samples that mix both
Zephyr network API with the relevant POSIX API like
zsock_socket() and socket() etc.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-25 16:06:56 +00:00
Chris Friedt
94e07d235b tests: posix: headers: remove testsuite
Remove the tests/posix/headers testsuite.

A large part of this testsuite was originally feeling-out what types,
functions, and other declarations were expected in POSIX headers when
CONFIG_POSIX_API was not selected.

Really, libraries and applications should generally not expect to be able
to use POSIX headers in particularly meaningful ways when POSIX APIs are
not enabled.

The portions of the testsuite that check for the existence of declarations
and symbols when POSIX APIs are configured also effectively duplicates
the implicit tests of simply compiling code and testsuites.

Also, given that CONFIG_POSIX_API is effectively deprecated, it does not
make a lot of sense to maintain the testsuite.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-11-25 16:06:46 +00:00
Mathieu Choplain
3db76f0373 samples: st: power_mgmt: wkup_pins: correct overlay for Nucleo-F103RB
The overlay indicated the pin was active-low with a pull-up resistor, but
the hardware forces a pull-DOWN which makes the pin active-HIGH instead.
Also add a comment indicating that the pin is not wired to a button and
a short (to Vdd!) must be applied via a jumper wire.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-25 16:06:35 +00:00
Jamie McCrae
ae2b4a44dc mgmt: mcumgr: grp: img_mgmt: Fix detecting where a slot resides
Fixes an issue introduced in commit
32615695ad which wrongly did not
check what the residing device was on before determining if a
slot was part of a partition area

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-25 16:06:23 +00:00
Sebastian Bøe
f324a1540f soc: nordic: ironside: Add counter service
Add counter service.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2025-11-25 16:06:00 +00:00
Haoran Jiang
d70234fa2a boards: sifli: sf32lb52_devkit_lcd: Add sys-clk-src
Add sys-clk-src.

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-11-25 16:05:46 +00:00
Haoran Jiang
8321842d72 drivers: clock_control: sf32lb_rcc: Add RCC configuration driver
Add RCC configuration driver.

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-11-25 16:05:46 +00:00
Haoran Jiang
5eb9d202d6 dts: arm: sifli: sf32lb52x: Improve the RCC definition for sf32lb
Add the RCC configuration
binding on the sf32lb52 platform.
- sys-clk-src
- peri-clk-src
- mpi1/2-clk-src
- A
- usb-div

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-11-25 16:05:46 +00:00
Gang He
562afb6279 driver: bluetooth: hci: sifli: Add SF32LB Bluetooth HCI driver
Add Bluetooth driver for SF32LB chipsets.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-11-25 16:05:02 +00:00
Gang He
0b28125aae module: hal_sifli: Add IPC zephyr porting header file
Add SF32LB IPC zephyr porting header file.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-11-25 16:05:02 +00:00
Gang He
8dbfa3daf3 module: hal_sifli: Overwrite SiFli HAL delay function with k_sleep
SiFli HAL is using HAL_Delay_us to delay for certain microseconds.
This is a weak function. I overwrites this function with Zephyr k_sleep.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-11-25 16:05:02 +00:00
Gang He
d3e2e3d077 module: hal_sifli: Add CMakefile script for bluetooth HCI driver
Add CMakefile script needed for Bluetooth HCI driver.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-11-25 16:05:02 +00:00
Gang He
2565b99fcf board: sifli: sf32lb52_devkit_lcd: Add mailbox in board device tree
Add mailbox in board devicetree, used in Bluetooth HCI driver.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-11-25 16:05:02 +00:00
Gang He
6305063de2 driver: bluetooth: hci: sifli: Add configuration for SF32LB HCI driver
Add configuration for SiFli SF32LB chipset Bluetooth HCI driver.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-11-25 16:05:02 +00:00
Gang He
6437340bf3 soc: sifli: sf32: Add configuration for Bluetooth HCI driver support
Add configuration support for Bluetooth HCI driver.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-11-25 16:05:02 +00:00
Gang He
289d999c38 module: sifli: kconfig: Add Bluetooth HCI driver configuration
Add SiFli Bluetooth HCI driver configurations.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-11-25 16:05:02 +00:00
Gang He
4451cfc89d dts: arm: sifli: add definition for memory non-cachable
Memory used by Bluetooth LCPU should be no-cachable.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-11-25 16:05:02 +00:00
Gang He
062e223c49 dts: arm: sifli: sf32lb52x: define mailbox
Mbox is hardware interface between Application HCPU and Bluetooth LCPU.

Signed-off-by: Gang He <ganghe@sifli.com>
2025-11-25 16:05:02 +00:00
Gang He
44b4ae6d76 west.yml: hal_sifli: Update to latest revision
- Add Bluetooth HCI driver support for SF32LB chipsets

Signed-off-by: Gang He <ganghe@sifli.com>
2025-11-25 16:05:02 +00:00
Jisheng Zhang
55856d130a boards: st: stm32h750b-dk: Fix sdram available size
According to UM2488 section 6.12[1], the available SDRAM size is only 8MB
by hardware design, though 128Bit SDRAM is connected.

Link: https://www.st.com/resource/en/user_manual/um2488-discovery-kits-with-stm32h745xi-and-stm32h750xb-mcus-stmicroelectronics.pdf [1]
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
2025-11-25 13:07:44 +01:00
Jisheng Zhang
c6cb9b6543 boards: st: stm32h745i_disco: m7: Fix sdram available size
According to UM2488 section 6.12[1], the available SDRAM size is only 8MB
by hardware design, though 128Bit SDRAM is connected.

Link: https://www.st.com/resource/en/user_manual/um2488-discovery-kits-with-stm32h745xi-and-stm32h750xb-mcus-stmicroelectronics.pdf [1]
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
2025-11-25 13:07:44 +01:00
Robert Lubos
741ce37f28 net: config: sntp: Asynchronous resynchronization
Make SNTP resynchronization asynchronous, so that it doesn't block the
system work queue while waiting for response.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-25 13:07:13 +01:00
Robert Lubos
550e0b866c net: config: sntp: Add helper symbols for resync timeouts
For more concise code.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-25 13:07:13 +01:00
Robert Lubos
a1e4047e38 net: config: sntp: Add helper function to set clocks
Move the code responsible for setting clocks into a helper function,
as it'll be reused with asynchronous resynchronization.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-25 13:07:13 +01:00
Thorsten Klein
d7829271bb doc: develop: west: add documentation for west blobs caches
Documentation for west blobs `--cache-dirs` and `--auto-cache`,
respectively config options `blobs.cache-dirs` and `blobs.auto-cache`.

Signed-off-by: Thorsten Klein <Thorsten.Klein@bshg.com>
2025-11-25 13:06:06 +01:00
Thorsten Klein
bdbdbcbe8d scripts: west_commands: blobs: support blobs cache
An auto-cache directory can be provided via the `west blobs fetch
--auto-cache` argument or the `blobs.auto-cache-dir` config option.
When enabled, the auto-cache is automatically filled whenever a blob is
missing and must be downloaded.

One or more additional cache directories can be specified via argument
`west blobs fetch --cache-dirs` or the `blobs.cache-dir` config option
(multiple paths separated by `;`).

`west blobs fetch` searches all configured cache directories (including
the auto-cache) for a matching blob filename. Cached files may be stored
either under their original filename or with a SHA-256 suffix
(`<filename>.<sha>`).
If found, the blob is copied from the cache to the blob path; otherwise
it is downloaded from its url to the blob path.

Signed-off-by: Thorsten Klein <Thorsten.Klein@bshg.com>
2025-11-25 13:06:06 +01:00
Thorsten Klein
92a9a7eb00 .ruff-excludes: remove scripts/west_commands/blobs.py
Regarding documentation, when changing an excluded file, contributors
are encouraged to remove it from the list and format it in a separate
commit.

Signed-off-by: Thorsten Klein <Thorsten.Klein@bshg.com>
2025-11-25 13:06:06 +01:00
Thorsten Klein
8fab89e521 scripts: west_commands: format blobs.py
blobs.py is formatted with `ruff format`

Signed-off-by: Thorsten Klein <Thorsten.Klein@bshg.com>
2025-11-25 13:06:06 +01:00
Emil Gydesen
b8e71e6098 tests: Bluetooth: Tester: Allow connecting CIS in QoS state
Add support for connecting the CIS in QoS state.
To support this some checks were added to check the CIS
state while entering the enabling state, as well as the
ASE state when the CIS was connected to determine when to
send the ASE start opcode.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-25 13:04:46 +01:00
Emil Gydesen
29f4f24019 tests: Bluetooth: Add ASCS CIS connection events
Add support for the ASCS CIS connection state events.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-25 13:04:46 +01:00
Nakul Chauhan
0172845b3d ci/compliance: update requirements of check_compliance.py script
add missing modules to requirements-compliance.txt to run compliance script

Signed-off-by: Nakul Chauhan <nakulchauhan111@gmail.com>
2025-11-25 13:04:34 +01:00
Felix Wang
5d48b0718a samples: drivers: led: pwm: Add fallback blink delay calculation
When CONFIG_BLINK_DELAY_SHORT or CONFIG_BLINK_DELAY_LONG exceed the
timer's range, automatically calculate blink delays from the LED's
PWM period defined in devicetree using configurable divisors.

Add led_periods_ns array to store PWM periods for each LED and new
Kconfig options BLINK_DELAY_SHORT_LED_PERIOD_DIV and
BLINK_DELAY_LONG_LED_PERIOD_DIV to control the calculation.

This ensures the LED PWM sample works on platforms with timer
limitations by providing hardware-appropriate fallback delays.

Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
2025-11-25 13:04:27 +01:00
Pascal Linder
f1e1d91e72 drivers: dma: stm32u5: Configure burst lengths
The source and destination burst lengths can be configured with a value
from 1 to 64. As the appropriate values are available in the DMA
configuration structure provided by Zephyr, these can be set during driver
configuration. Unfortunately, the STM32 DMA LL API does currently not
provide the minimum and maximum values.

Signed-off-by: Pascal Linder <pascal.linder@zuehlke.com>
2025-11-25 13:04:10 +01:00
Camille BAUD
eaf743e48b tests: drivers: build_all: add BFLB dbi test via boards/ai_m62_12f
Adds a BFLB DBI test

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
Camille BAUD
660f3a1976 drivers: mipi-dbi: Introduce BFLB dbi driver
Introduces a driver for the BL61x DBI peripheral

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
Camille BAUD
f361d5888a dts: Add BFLB dbi nodes
Adds nodes for the DBI peripheral

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
Camille BAUD
8209c59329 drivers: dma: bflb: Update DMA to properly support device usage
Make it so you can set both address and peripheral via dma_slot

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
Camille BAUD
a3c5e72904 drivers: clock_control: bflb: Add DBI elements
Add clock elements to enable using DBI

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
Camille BAUD
cadd0ecfe5 west.yml: Update hal_bouffalolab revision
Update to latest hal_bouffalolab revision for DBI.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-25 13:04:02 +01:00
Albort Xue
8885c708bf soc: nxp: mcx: mcxw7xx: Update power management in case of NBU is used.
Added conditional compilication for 'power_state_set' function. The
changes ensure that mode of NBU domain is manually set only when
the NBU is not used. If NBU is enabled, the mode of NBU domain is
auto updated by software run on NBU.

Change include:
- Conditional checks around the NBU mode in sleep and deep sleep mode.

Signed-off-by: Albort Xue <yao.xue@nxp.com>
2025-11-25 13:03:49 +01:00
Mario Paja
3c930a7760 drivers: i2s: stm32 sai enable dma priority configuration
This change enables the user to configure SAI DMA priority.

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-11-25 13:03:41 +01:00
Anas Nashif
16fecc0276 manifest: optional: move lz4 to external
Move lz4 to become external module. It is not in the default manifest
anymore (through submanifests) and will need to be added if application
requires it per the docs.

Samples will be moved to the module itself.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-25 13:01:12 +01:00
Anas Nashif
015bf2ed49 manifest: move zscilib to be an external module
Remove from manifest and make it an external module.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-25 13:01:12 +01:00
Anas Nashif
13bf9895d8 ci: twister: pull testing group in manifest
We need the tests in CI to be able to run them on supported platforms.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-25 13:01:12 +01:00
Anas Nashif
a7c53391d5 manifest: move psa-arch-tests to main manifest
Tests needed to verify tf-a module.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-25 13:01:12 +01:00
Anas Nashif
a2ccf506bd manifest: move tf-m-tests to main manifest
Those tests are needed for verifying and testing tf-m. While not needed
directly by zephyr, they are needed for testing and CI.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-25 13:01:12 +01:00
Fabian Blatz
8c264d30ea drivers: input: chsc5x: Add INPUT_TOUCH_STRUCT_CHECK for config
Adds the missing INPUT_TOUCH_STRUCT_CHECK for the config struct, to harden
against member reordering.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-11-24 15:27:41 -05:00
Fabian Blatz
421a4232ee drivers: input: Add input-touch assert for inversion without dimensions
Adds an assert to inform the user of possible coordinate wrap around
due to missing screen dimension configurations.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-11-24 15:27:41 -05:00
S Swetha
e891ca601e drivers: gpio: intel: Fix Pad IO Termination values
Swap PAD_CFG1_IOSTERM_PU and PAD_CFG1_IOSTERM_PD values.

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
dc34b3c40b tests: drivers: Add overlays for intel wcl boards
This commit introduces overlay files for intel
Wildcat lake boards

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
9271e65058 boards: intel: wcl: Add board definition
This commit introduces board defintion for Wildcat Lake.

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
9c5f675e37 dts: x86: intel: Add wildcat lake dtsi
This commit introduces device treee source for
Wildcat Lake platform

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
78a67404f0 dts: bindings: timer: Fix HPET clock frequency property
Fix HPET Clock-frequency property in yaml file

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
d7cede7b20 dts: bindings: cpu: Add wildcat lake yaml
Add wildcat lake yaml

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
S Swetha
bf093f939e soc: intel: wildcat_lake: Add soc support for WCL
This commit introduces SOC support for
Wildcat Lake.

Signed-off-by: S Swetha <s.swetha@intel.com>
2025-11-24 21:15:21 +01:00
Declan Snyder
cd4c027fce MAINTAINERS: Consolidate NXP areas using file-groups
Use the new file-groups feature to consolidate the NXP areas, and have
more specific collaborators/reviewers over certain areas.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-11-24 15:13:52 -05:00
Adrian Bonislawski
b33fc9a7b2 drivers: dai: intel: ssp: Fix SSP blob v3.0 TLV parsing
Fix incorrect TLV (Type-Length-Value) data length calculation for
SSP configuration blob version 3.0. The blob30->size field does not
include auxiliary TLV data appended after the main structure, leading
to incorrect parsing boundaries.

Changes:
- Use the total 'size' parameter instead of blob30->size for v3.0
- Pass size parameter through dai_ssp_parse_aux_data() chain
- Ensures correct parsing of auxiliary data (clocks, sync, DMA controls)

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-11-24 20:59:20 +01:00
Adrian Bonislawski
b038ee72fa drivers: dai: Add size parameter to dai_config_set API
Add explicit bespoke_cfg_size parameter to the dai_config_set()
function and its underlying driver API to improve configuration
validation and security.

Changes:
- Add 'size_t size' parameter to dai_driver_api.config_set callback
- Update dai_config_set() inline wrapper to pass size parameter
- Update all DAI driver implementations:
  - Intel: SSP, DMIC, HDA, ALH
  - NXP: SAI, ESAI, MICFIL
- Add documentation for new size parameter

This change enables drivers to validate the size of bespoke
configuration data, preventing buffer overruns and improving
robustness of the DAI configuration interface.

All existing callers must be updated to pass the size of their
bespoke configuration structures.

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-11-24 20:59:20 +01:00
Adrian Bonislawski
552c1514a6 drivers: dai: intel: ssp: Add support for SSP_GTW_DMA_CONFIG_ID TLV type
Add handling for SSP_GTW_DMA_CONFIG_ID (0x1000) TLV type in SSP driver's
auxiliary data parsing functions. This TLV type is explicitly ignored as
it does not require any processing by the driver.

Changes:
- Define SSP_GTW_DMA_CONFIG_ID constant (0x1000) in dai-params-intel-ipc4.h
- Add case handling in dai_ssp_check_aux_data() to validate this TLV
- Add case handling in dai_ssp_parse_tlv() to skip processing of this TLV

This allows SSP configuration blobs containing SSP_GTW_DMA_CONFIG_ID
entries to be parsed successfully without triggering errors
for undefined TLV types.

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-11-24 20:59:20 +01:00
Saravanan Sekar
c7bd062171 tests: drivers: build_all: fuel_gauge: Add hy4245 device to build test
Add build tests for the hycon,hy4245 device.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2025-11-24 14:58:39 -05:00
Saravanan Sekar
89df5f55ed drivers: fuelgauge: Add Hycon Technology HY4245 driver
Add a support for Hycon Technology HY4245 fuel gauge driver.

The HY4245 operates with Single and Two Cells Li+ battery cells as a
stand–along battery gauge. The device uses GaugePackTM algorithm, which
mixes Coulomb–Counting and Open–Circuit–Voltage (OCV) measurements with
battery cell characteristics to manage battery gauge, to maintain accurate
battery capacity estimates with compensation for rate, temperature, age
and self–discharge effects.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2025-11-24 14:58:39 -05:00
Saravanan Sekar
bcb83d5dda dts: fuel-gauge: hy4245: Add HY4245 fuel gauge
Add dts bindings for Hycon Technology HY4245 fuel gauge.

Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
2025-11-24 14:58:39 -05:00
Adrian Bonislawski
af974c3074 soc: intel_adsp: ace: add IMR info registers
Adds devicetree nodes for IMR (Isolated Memory Regions)
information registers across all ACE platforms.
These registers provide information about the IMR memory region,
such as whether it is in use and its size.

Implements structures and utility functions to access
these registers and retrieve IMR information programmatically.
This allows dynamic detection of IMR availability and its size at runtime,
instead of relying on hardcoded values.

Removes the hardcoded IMR_L3_HEAP_SIZE definition since the size can now be
determined dynamically using the newly added ace_imr_get_mem_size() func.

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-11-24 14:58:27 -05:00
Adrian Bonislawski
35a1e62035 soc: intel_adsp: ace40: extend hwreg1 MMU mapping
This patch will extend MMU mapping range for hwreg1 entry
because it is required to access lower register addresses

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2025-11-24 14:58:27 -05:00
Paul Luse
80c14d8a37 testsuite: ztest: fix bug in host only mock func
Change the mock for snprintf() to call the correct variadic function.

Signed-off-by: Paul Luse <paul.e.luse@intel.com>
2025-11-24 14:58:02 -05:00
Marco Domingo
42d0611ce0 doc: tfm: fix broken reference to mps3 board
Replace the outdated :ref:`mps3_board` reference with the proper
:zephyr:board:`mps3` role to align with current board documentation.

Signed-off-by: Marco Domingo <marco.domingo2@arm.com>
2025-11-24 14:57:46 -05:00
Marco Domingo
d13353115d boards: mps3/mps4: improve board searchability and naming
Update board YAML full_name to improve searchability and make it
easier to find Corstone FVP platforms in the supported boards list.

Update the mps3 .rst file to align the title and zephyr:board
directive with the YAML full_name, consistent with the mps4 board
documentation.

- mps3_an547 -> "MPS3 FPGA/Corstone FVP"
- mps4 -> "MPS4 Corstone FVP"

Signed-off-by: Marco Domingo <marco.domingo2@arm.com>
2025-11-24 14:57:46 -05:00
Appana Durga Kedareswara rao
4e8cafe641 arch: arm64: mmu: Call k_panic() when translation tables exhausted
When CONFIG_MAX_XLAT_TABLES is too small and new_table() cannot allocate
a translation table, the system must halt rather than continue with
undefined behavior.

This change ensures k_panic() is called after reporting the error,
preventing the system from proceeding when it runs out of translation
tables. Additionally, adds printk() fallback for configurations where
CONFIG_LOG is disabled to ensure the error is always visible.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
2025-11-24 14:57:25 -05:00
Ayush Singh
64eefc709e drivers: gpio: cc13xx_cc26xx: Remove multi functions
- It seems that the mask variants of GPIO functions are not present in
  the latest sdk, so replace those with direct register access.
- This was already done in [0], but was reverted due to some hal
  problems.
- I am working on a hal update, but since this change does not require a
  hal update to work, it would be best to merge this first.

[0]: https://github.com/zephyrproject-rtos/zephyr/pull/83402

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-11-24 14:57:16 -05:00
Mathieu Choplain
0aa9877d9b drivers: usb: udc: fix OTGHS on STM32F7 SoCs with USBPHYC
From testing on STM32F723E-DISCO, it seems necessary to enable OTGHSULPI
clock in addition to USBPHYC when the internal USBPHYC HS PHY is used.
(USBPHYC is found on STM32F723xx, STM32F730Z8 and STM32F730I8 SoCs)

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-24 14:56:45 -05:00
Morten Kristensen
4f2ad9a53d scripts: ci: use vermin 1.8.0
Update workflow to use the new version of Vermin to enrich the Python
minimum version checks in the CI pipelines.

Signed-off-by: Morten Kristensen <me@mortens.dev>
2025-11-24 14:56:36 -05:00
Vladislav Kulikov
cde7195a57 MAINTAINERS: update SMF maintainers
Sam Burke has agreed to step down as maintainer of the State Machine
Framework (SMF), per discussion with Keith Short. Update the SMF
MAINTAINERS entry to reflect this by removing Sam.

Signed-off-by: Vladislav Kulikov <vlad_kulikov_c@pm.me>
2025-11-24 14:56:24 -05:00
Stoyan Bogdanov
79793542e1 MAINTAINERS: Add collaborator for TI SimpleLink Platforms
Add jpanisbl as collaborator for TI SimpleLink

Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
2025-11-24 14:56:14 -05:00
Andrew Kontra
7a65336edc net: C++ support for mdns_responder.h
mdns_responder.h did not include header guards for C++, causing
it to fail if used in a C++ file. This change adds the header
guards.

Tested using samples/cpp/hello_world, with an added call to
mdns_responder_set_ext_records().

Signed-off-by: Andrew Kontra <andrew@legatoxp.com>
2025-11-24 17:36:32 +01:00
Nik Schewtschuk
d36c0bec85 net: l2: ppp: Add support for LCP MRU negotiation
Previously, the LCP MRU option sent by the peer was ignored.
This could result in the interface MTU remaining at the default (1500),
even if the peer requested a smaller MRU, potentially leading to packet
loss. This commit adds parsing for the peer's MRU option and updates the
network interface MTU accordingly.

Signed-off-by: Nik Schewtschuk <nik@schew.dev>
2025-11-24 17:36:18 +01:00
Tomasz Moń
614dd5738e drivers: usb: dwc2: Do cache operations on ownership change
Perform cache operations in thread context when the buffer ownership
changes between USB stack and UDC driver. This offers clearly measurable
throughput increase on Mass Storage when double buffering is enabled.
When endpoint operations are not double buffered the difference is
negligible. The positive side effect is reducing number of operations
performed in interrupt context.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-11-24 17:35:58 +01:00
Erwan Gouriou
47650a46bd dts: arm: st: wba6: Add missing i2c nodes
i2c2 and i2c4 were missing from soc description.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-11-24 17:35:31 +01:00
Håvard Reierstad
6bb0e982ad Bluetooth: Host: Add legacy pairing test config
Adds the `CONFIG_BT_SMP_LEGACY_PAIR_ONLY` Kconfig option to force
devices to use legacy pairing. This has a dependency on
`CONFIG_BT_TESTING` as it is only intended for testing purposes, and use
of legacy pairing is discouraged.

Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
2025-11-24 17:35:19 +01:00
Liu Qian
a2ca8b9b0a device: remove duplicate code
API z_device_state_init has already defined in init.c

Signed-off-by: Liu Qian <liuqian.andy@picoheart.com>
2025-11-24 17:33:13 +01:00
Chen Xingyu
b6e79199b5 boards: m5stack: cores3: Correct touchscreen axis
X and Y are swapped

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-11-24 17:32:58 +01:00
Torsten Rasmussen
18594c217c cmake: remove quotes around SUBALIGN
Quotes around `"SUBALIGN ${SUBALIGN}"` results in the parameters to
become a text string with a space, and therefore will give the warning

> CMake Warning at /.../extensions.cmake:5197 (message):
>  zephyr_linker_section(NAME ...) given unknown arguments: SUBALIGN 4
> Call Stack (most recent call first):
>   /.../extensions.cmake:5333 (zephyr_linker_section)
>   /.../CMakeLists.txt:x (zephyr_iterable_section)

Remove the quotes so that `SUBALIGN` and the value are correctly treated
as argument name and value.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2025-11-24 17:31:51 +01:00
Robert Lubos
8b91d3abc3 net: websocket: Fix truncated string warning on copying
WS_MAGIC is a constant string and when calculating lengths for copying
we always exclude the NULL terminator. In result, using strncpy() for
copying can generate a warning about truncated string, as WS_MAGIC will
always be truncated from the NULL terminator. Therefore replace
strncpy() with memcpy() as it seems more appropriate for this case.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-24 17:30:22 +01:00
Jordan Yates
dda100cb28 tests: zbus: publish_stats: update thresholds
`zbus_chan_pub_stats_msg_age` returns milliseconds, while `clock_window`
is in clock ticks. Update the thresholds to refer to the same 50ms
window as `clock_window`.

Fixes #99500.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-24 17:30:13 +01:00
Mathieu Choplain
0ee6ec0617 soc: st: stm32: wkup_pins: enable retention for STM32WBA wake-up pins
In order for wake-up pins to behave properly in Standby mode on STM32WBA,
the I/O Standby Retention must be enabled. (It only comes in effect when
the SoC does enter Standby mode, and has no effect otherwise).

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-24 17:30:03 +01:00
Muhammed Asif
c3e7e55bb4 boards: microchip: pic32cx_sg41_cult: Add clock support
- Updates the clock from 48MHz to 120MHz
- Adds the xosc related nodes to board file.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-11-24 17:29:54 +01:00
Ayush Singh
a9fa2ef116 drivers: adc: cc13x2_cc26x2: Fix PM
- Currently, ADC driver does not implement any PM related constraints.
  Due to this, when using it with PM enabled (example ieee802154, which
  enabled PM by default), it will stall the system.
- Similar to pwm driver, disable standby when ADC is sampling. The
  variable standby_disabled is just a flag to ensure that we disable (or
  enable) standby only when ADC driver selects it. Otherwise, it is
  possible to have a condition where ADC enabled PM and ieee802154
  disables it.
- This follows what TI SDK ADC driver does [0].

[0]: 507c93efc8/source/ti/drivers/adc/ADCCC26XX.c (L186)

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-11-24 17:29:44 +01:00
Emil Gydesen
4c54eef0d0 Bluetooth: BAP: Fix bad check for ASE state for CIS connect
A CIS may be connected in either the QoS Configured state
or the enabling state. The QoS Configured state is the
earliest state it is allowed, due to it being the first
state where the CIS_ID and ASE_ID are paired.
The enabling state is the "last" state it is allowed,
as if the ASE is in the streaming, disabling or releasing
state we should not allow/expect a CIS connection to happen.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-24 17:28:58 +01:00
Henrik Brix Andersen
0b06f2751f dts: bindings: i2c: gpio: add description for SDA/SCL pin configuration
Add recommendations for how to configure the GPIOs used as SDA/SCL pins.

Fixes: #95903

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2025-11-24 17:26:49 +01:00
Krzysztof Chruściński
84ccc54fda drivers: cache: nrf: Allow execution of sys_cache_instr_invd_all
Driver did not allow to execute any invalidate all operation.
This operation should not be allowed for data cache as it will lead to
undefined behavior but it is ok to invalidate instruction cache.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-24 17:26:35 +01:00
Allen Zhang
d83f249e20 doc: boards: nxp: mcxw23_evk: Updated the index.rst
Added the links to MCXW23-EVK website, user manual and design files

Signed-off-by: Allen Zhang <chunfeng.zhang@nxp.com>
2025-11-24 17:25:43 +01:00
Ayush Singh
239e5a6b2f drivers: adc: cc13xx_cc26xx: Fix includes
- Include device specific headers even if the header files end up being
  the same.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-11-24 17:25:24 +01:00
Lucien Zhao
e1bf67139d dts: arm: nxp: add missed sub-parts dtsi files
add back missed sub-parts dtsi files for mcxe31x

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-11-24 17:23:56 +01:00
Hui Bai
d073ae1bf5 drivers: wifi: Update debug level of wakeup source dump function
Update wakeup source dump function to DBG level. This function will
print and clear wakeup source registers of NXP wifi chips with
CONFIG_WIFI_LOG_LEVEL_DBG enabled. By changing debug level of this file,
user can avoid wakeup source clear.

Signed-off-by: Hui Bai <hui.bai@nxp.com>
2025-11-24 17:23:43 +01:00
Hui Bai
c0715601b2 west.yml: Sync hal_nxp repo
Sync hal_nxp repo

Signed-off-by: Hui Bai <hui.bai@nxp.com>
2025-11-24 17:23:43 +01:00
Hui Bai
0f8228f410 drivers: wifi: Add new config CONFIG_NXP_WIFI_WAKE_TIMER_ENABLE
Added new config CONFIG_NXP_WIFI_WAKE_TIMER_ENABLE and enable it for NXP
wifi chips.

Signed-off-by: Hui Bai <hui.bai@nxp.com>
2025-11-24 17:23:43 +01:00
Haoran Jiang
eb8d8a50b2 boards: sifli: sf32lb52_devkit_lcd: enable crc
Enable CRC device

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-11-24 17:23:13 +01:00
Haoran Jiang
2e7c1d1816 drivers: crc: add crc driver for sf32lb platform
Add crc driver for sf32lb platform

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-11-24 17:23:13 +01:00
Haoran Jiang
e25f29560a dts: arm: sifli: sf32lb52x: define crc instances
Add crc device bindings for sf32lb platform

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-11-24 17:23:13 +01:00
Haoran Jiang
1a67d5753c dts: bindings: crc: sf32lb: add sifli,sf32lb-crc
Add crc device bindings for sf32lb platform

Signed-off-by: Haoran Jiang <halfsweet@halfsweet.cn>
2025-11-24 17:23:13 +01:00
Eemil Visakorpi
1d70b705b0 twister: Fix serial open for UART devices that do not immediately appear
Testing on linux, --flash-before argument did not work to wait for jlink
upload to complete. Instead Serial port opening throws file not found. The
fix ensures that the code waits for the serial port to appear before
attempting to connect. Tested on a proprietary platform with virtual UART
through usb.

Signed-off-by: Eemil Visakorpi <eemil@doublepoint.com>
2025-11-24 17:22:22 +01:00
Ayush Singh
0b173063fe soc: ti: simplelink: cc13x2x7_cc26x2x7: Add poweroff support
- Tested on BeagleConnect Freedom with
  samples/boards/ti/cc13x2_cc26x2/system_off

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-11-24 17:22:06 +01:00
Make Shi
f88eb16d7c Bluetooth: AVRCP: enable full browsing commands
This change implements full AVRCP Browsing support on both CT/TG,
and included all public APIs and callbacks, and add shell commands
for testing.

Signed-off-by: Make Shi <make.shi@nxp.com>
2025-11-24 17:21:27 +01:00
Make Shi
497d3bba43 Bluetooth: AVRCP: Add alloc_buf callback and browsing RX pool
Introduce an optional alloc_buf() callback into AVCTP so that each
session can decide which RX buffer pool to use. Provided a dedicated
RX pool for the AVRCP browsing channel.
Also provided BT_AVRCP_BROWSING_L2CAP_MTU for configure.

Signed-off-by: Make Shi <make.shi@nxp.com>
2025-11-24 17:21:27 +01:00
Make Shi
3d57125247 bluetooth: avrcp: align enums and response struct naming
Drop the 'U' suffix from enum hex literals keep style consistent
and rename `bt_avrcp_list_app_setting_attr_rsp` to the clearer.

Signed-off-by: Make Shi <make.shi@nxp.com>
2025-11-24 17:21:27 +01:00
Bartlomiej Buczek
1a5180d350 samples: drivers: jesd216: add nrf54l15dk cases.
Extend jesd216 sample with nrf54l15dk cases. These platforms have
jesd216 compatible flash memories on board.

Signed-off-by: Bartlomiej Buczek <bartlomiej.buczek@nordicsemi.no>
2025-11-24 17:21:13 +01:00
Bartlomiej Buczek
bbf2695915 test: drivers: flash: common: Add sfdp case for nrf54l15 tests.
Add case for using flash with some parameters read with runtime sfdp
instead of dt declarations.

Signed-off-by: Bartlomiej Buczek <bartlomiej.buczek@nordicsemi.no>
2025-11-24 17:21:13 +01:00
Bartlomiej Buczek
1028fc27b3 tests: drivers: adc: Enable tests for nrf54h20 PPR.
Fill in necessary config files with test data.

Signed-off-by: Bartlomiej Buczek <bartlomiej.buczek@nordicsemi.no>
2025-11-24 17:20:35 +01:00
Dave Joseph
3474deee3d drivers: firmware: Clock control TISCI driver support
Support added for clock control using TISCI for devices using the binding
ti,k2g-sci-clk. This driver relies on the TISCI layer to make calls to the
DMSC core to set and get the clock rate and retrieve clock status.

Signed-off-by: Dave Joseph <d-joseph@ti.com>
2025-11-24 17:20:24 +01:00
Lyle Zhu
e7cb176018 Bluetooth: tester: Add command to send connectionless data
Add command `BTP_L2CAP_CONNLESS_SEND` to send connectionless data with
specific PSM.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-24 17:19:20 +01:00
Lyle Zhu
efcbb1f060 Bluetooth: tester: Classic: change L2CAP server count to 2
If CONFIG_BT_CLASSIC is enabled, change the count of L2CAP server to 2.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-24 17:19:20 +01:00
Lyle Zhu
4450c9b96c Bluetooth: tester: Classic: L2CAP: Support local busy
If the option BTP_L2CAP_CONNECT_V2_OPT_HOLD_CREDIT or
BTP_L2CAP_LISTEN_V2_OPT_HOLD_CREDIT is set, set the local flag
`hold_credit`. When the data received, holds the buffer and returns
the error code `-EINPROGRESS`.

The held buffers will be released if the L2CAP channel disconnect
callback is triggered. Or only of the held buffers will be released
if the L2CAP BTP command `credits` is received.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-24 17:19:20 +01:00
Lyle Zhu
1e9493393d Bluetooth: tester: L2CAP: Set TX data buffer count to windows size
If `CONFIG_BT_CLASSIC` and `CONFIG_BT_L2CAP_MAX_WINDOW_SIZE` are
defined, set the TX data buffer count to
CONFIG_BT_L2CAP_MAX_WINDOW_SIZE. Or, set the TX data buffer count to
CHANNELS.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-24 17:19:20 +01:00
Lyle Zhu
b9e1f53b1f Bluetooth: tester: Add BTP command BTP_L2CAP_LISTEN_V2
Add a new BTP L2CAP command BTP_L2CAP_LISTEN_V2 to extend the L2CAP
server feature.

Compared with BTP command `listen`, two fields are added, including
`mode` and `options`.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-24 17:19:20 +01:00
Lyle Zhu
3588a116bc Bluetooth: tester: Add BTP command BTP_L2CAP_CONNECT_V2
Add a new BTP L2CAP command BTP_L2CAP_CONNECT_V2 to set extend the
L2CAP connect request.
Compared with BTP command `connect`, two fields are extended,
including `mode` and `options`.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-24 17:19:20 +01:00
Lyle Zhu
8d97c8a4bf Bluetooth: tester: Add L2CAP ECHO REQ BTP command
Add a BTP command `BTP_L2CAP_SEND_ECHO_REQ` to send L2CAP ECHO REQ.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-24 17:19:20 +01:00
Lyle Zhu
ccb7084899 Bluetooth: tester: Support L2CAP BR ECHO req/rsp
Register ECHO callbacks in function `tester_init_l2cap()`.

Unregister ECHO callbacks in function `tester_unregister_l2cap()`.

Send ECHO response if ECHO request is received.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-24 17:19:20 +01:00
Lyle Zhu
7c3c864016 Bluetooth: tester: Support BR L2CAP channel data receiving
Add the function `br_alloc_buf_cb()` to allocate receiving buffer for
BR L2CAP channel.

Add the function `br_recv_cb()` to report the received BR L2CAP
channel data.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-24 17:19:20 +01:00
Lyle Zhu
c0f46f6371 Bluetooth: tester: Support L2CAP retransmission and flow-control mode
Configure the following configurations to support the L2CAP
retransmission and flow-control mode.
CONFIG_BT_L2CAP_RET=y
CONFIG_BT_L2CAP_FC=y
CONFIG_BT_L2CAP_ENH_RET=y
CONFIG_BT_L2CAP_STREAM=y
CONFIG_BT_L2CAP_FCS=y
CONFIG_BT_L2CAP_EXT_WIN_SIZE=y
CONFIG_BT_L2CAP_MAX_WINDOW_SIZE=5

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-24 17:19:20 +01:00
Lyle Zhu
b6f555b750 Bluetooth: tester: Support BR L2CAP send data command
If the channel id is more than ARRAY_SIZE(channels), send L2CAP data
through BR transport.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-24 17:19:20 +01:00
Anas Nashif
c9b01e8257 ci: set_assignee: remove size: XS label on updates
The script currently only adds the 'size: XS' label for small PRs (1
commit with ≤1 addition and ≤1 deletion), but it doesn't remove this
label if the PR grows larger after subsequent updates.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-24 08:47:51 +01:00
Rodrigo Peixoto
6b321eaffd doc: zbus: Adjust observer types image
Add the Async Listener type to the observer types image.

Signed-off-by: Rodrigo Peixoto <rodrigopex@gmail.com>
2025-11-24 08:47:40 +01:00
Peter van der Perk
8ba3999e66 tests: vector_table_relocation: Add DTCM and ITCM testcases
Expand vector table relocation with DTCM and ITCM veriants if
applicable

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-11-24 08:47:28 +01:00
Peter van der Perk
7d9e8923cc arch: arm: cortex_m: Allow VTOR to be relocated to TCM
Allows you to relocate the vector table from Flash to ITCM/DTCM to
minimize interrupt latency. TCM offers single-cycle access compared to
multi-cycle SRAM reads and even slower flash reads. This improves exception
handling speed for real-time workloads.

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-11-24 08:47:28 +01:00
McAtee Maxwell
f587c056a7 drivers: clock_control: fix clock pathing for infineon clocks
- fix fixed_factor clock_control driver
- update pse84 dts with fixes
- update psc3 dts with fixes
- update pse84_ai dts with fixes

Signed-off-by: McAtee Maxwell <maxwell.mcatee@infineon.com>
2025-11-24 08:47:15 +01:00
Jukka Rissanen
882387eeaa drivers: ieee802154: Properly namespace AF_UNSPEC by NET_AF_UNSPEC
Couple of AF_UNSPEC need to be replaced by NET_AF_UNSPEC so that
OpenThread tests will pass.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-24 08:47:05 +01:00
Andrey Smirnov
af04b317e9 bindings: pwm-leds: Include base.yaml
Include base.yaml in order to support zephyr,deferred-init property.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
2025-11-23 05:31:38 -05:00
Fabian Blatz
0ec9fc42a4 modules: lvgl: Fix thread deletion in OSAL
Do not delete the thread from within the thread callback function,
secure thread_delete against trying to delete a terminated thread.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-11-23 05:31:29 -05:00
Fabian Blatz
152e48a9fb tests: lib: gui: lvgl: Add missing DYNAMIC_THREAD dependency
This patch adds a CONFIG_THREAD_STACK_INFO to properly enable
CONFIG_DYNAMIC_THREAD.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-11-23 05:31:29 -05:00
Fabian Blatz
871103d072 manifest: Update LVGL to v9.4
Update the west yaml to point to the new LVGL version.
Update CMakeLists and samples accordingly.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-11-23 05:31:29 -05:00
Alberto Escolar Piedras
4d7944037f tests zbus async_listeners: Fix bug in test
Fix a bug in the test which caused it to fail (depending on compiler,
platform and optimization level).

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-23 05:31:00 -05:00
Arkadiusz Cholewinski
1d6e0d533a Power harness: Update path for the raw data file.
Change direction for raw data file from $ZEPHYR_BASE
to <path_to>twister-out/../<test>/

Signed-off-by: Arkadiusz Cholewinski <arkadiuszx.cholewinski@intel.com>
2025-11-22 11:45:44 +01:00
Simone Orru
5f7c451671 west: spdx: Fix copyright parsing in REUSE 0.6.x
Fix broken copyright parsing. Since REUSE 6.0.0 the copyright_lines
attribute has been removed. The new attribute copyright_notices is used.
Additionally, the python package REUSE should now be at least v0.6.0.
This will require an update of REUSE for users that were using a
version earlier than 0.6.

Fixes #98378

Signed-off-by: Simone Orru <simone.orru@secomind.com>
2025-11-22 05:13:26 -05:00
Ha Duong Quang
bf16aeaf4f soc: nxp: mcux: enable driver dmamux for S32Z270
S32ZE use DMAMUX for DMA channel routing instead of TRGMUX.

Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
2025-11-22 05:13:04 -05:00
Håvard Reierstad
627b6e4dd7 Bluetooth: Host: Legacy passkey entry 6.2 update
As of Core v6.2, the passkey entry pairing method for legacy pairing
does no longer grant authenticated MITM protection. This commit
updates `smp.c` accordingly to not grant the authenticated states when
using legacy passkey entry pairing.

Adds a check to make sure that bonds that have been stored persistently
adheres to these changes. Bonds that have been generated using the
legacy passkey entry pairing method will thus be downgraded from
authenticated to unauthenticated when restored from storage.

Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
2025-11-22 05:12:56 -05:00
Mathieu Choplain
cc749290a7 include: crypto: remove experimental API note
Update top-level comment of `include/zephyr/crypto/crypto.h` as the API is
no longer experimental, as indicated by the @version 1.0.0 tag in Doxygen.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-22 05:12:47 -05:00
Benjamin Cabé
2abc94830e docs: gpio: Add GPIO docs
Add more complete documentation page for GPIO

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-22 05:12:37 -05:00
Pete Johanson
625a2c2c7c boards: adi: Ensure no flash access on MAX32657 NS
MAX32657 NS does not have access to the flash peripheral, so ensure the
placeholder flash controller node is disabled, and update the "storage"
node in the evkit board definition to properly document its use for TFM.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2025-11-22 05:12:27 -05:00
Fin Maaß
dee55a64f3 doc: releases: migration-guide: 4.4: mention mdio change
mention mdio change.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-11-22 05:12:18 -05:00
Fin Maaß
374c745e3f drivers: mdio: remove mdio_bus_enable/mdio_bus_disable
remove mdio_bus_enable/mdio_bus_disable, as they are no
longer needed and make the mdio api simpler.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-11-22 05:12:18 -05:00
Fin Maaß
e484f4a842 drivers: mdio: always enable mdio bus
always enable mdio bus during init.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-11-22 05:12:18 -05:00
John Batch
f7594383b4 drivers: i2c: Infineon: Removing references to pdl from device tree
Removes differentiation between pdl and hal based drivers from device
tree.  This differentiation is now done as a Kconfig option.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-22 05:12:02 -05:00
John Batch
8275b4fb2f drivers: i2c: infineon: Fixing build errors in i2c_ifx_cat1_pdl.c
Fixing build errors related to reference to an incorrect define.
Adds missing headers to pinctrl_soc.h for Edge platform.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-22 05:12:02 -05:00
Emil Gydesen
7bbf704f60 tests: Bluetooth: Tester: Add validation of preconfig values
Add checks for the values in btp_ascs_preconfigure_qos
to determine if they are valid. If they are invalid
we reject the command.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-22 05:11:54 -05:00
Emil Gydesen
1d28715d25 Bluetooth: ISO: Add SDU check for CIS
If both the TX and RX SDUs are 0, then we reject
the call as that is an invalid configuration
(minimum SDU size is 1, and 0 indicates that
no data in that direction is being configured).

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-22 05:11:45 -05:00
Maureen Helm
3cb5e6aff8 drivers: can: Select pin control in max32 driver
Fixes the max32 can driver to follow the convention for drivers to
select pin control if they need it.

Signed-off-by: Maureen Helm <maureen.helm@analog.com>
2025-11-22 05:11:35 -05:00
Luca Burelli
4e33ca16be boards: arduino: fix docs to remove note about BT only functionality
SDIO is now fully supported on STM32 targets, and this enabled the use
of Wi-Fi functionality on Arduino H7 boards. Remove the note in the
documentation that states only Bluetooth is supported.

Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
2025-11-22 05:11:24 -05:00
Benjamin Cabé
955317160d Bluetooth: AVRCP: fix doxygen warning
fix a small typo that turns into a doxygen warning on recent doxygen
versions.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-22 05:11:12 -05:00
Rodrigo Peixoto
9463d9a51d doc: zbus: async listeners
Add documentation for async listeners.

Signed-off-by: Rodrigo Peixoto <rodrigopex@gmail.com>
2025-11-21 11:42:56 -05:00
Rodrigo Peixoto
854eda699c samples: zbus: add async linstener to the hello world sample
Add the async linstener to the hello_world sample.

Signed-off-by: Rodrigo Peixoto <rodrigopex@gmail.com>
2025-11-21 11:42:56 -05:00
Rodrigo Peixoto
52ec497937 samples: zbus: async listeners sample
Add a sample for async listeners.

Signed-off-by: Rodrigo Peixoto <rodrigopex@gmail.com>
2025-11-21 11:42:56 -05:00
Rodrigo Peixoto
804a5d68d6 tests: zbus: filter out tests that aren't SMP aware
The tests are failing in architectures that support SMP. Filtering them to
make CI happy, as done in #97827. Issue #98217 was created to address that
separately for all tests.

Signed-off-by: Rodrigo Peixoto <rodrigopex@gmail.com>
2025-11-21 11:42:56 -05:00
Rodrigo Peixoto
f4c1bdf57d tests: zbus: add async listeners tests
Add test for async listeners.

Signed-off-by: Rodrigo Peixoto <rodrigopex@gmail.com>
2025-11-21 11:42:56 -05:00
Rodrigo Peixoto
71712e2ca0 zbus: introduce async listeners
Add a new type of observer: Async Listeners. They are executed within the
system work queue context, offering distinct advantages:

- Asychrouness: obviously it gains the ability of run some urgent/light
  work load in a separate context.
- Prioritization: Async Listeners typically execute before other
  application observers, as they run within the system work queue context
  which is cooperative.
- Reliability: Ensures no message loss during execution. They use the same
  mechanism as Message Subscribers.

Signed-off-by: Rodrigo Peixoto <rodrigopex@gmail.com>
2025-11-21 11:42:56 -05:00
Cristian Bulacu
b9542abf86 net: l2: openthread: border_router: Enhance modules deinit
This commit deinitializes platform modules when external network
interface is brought down. It also delets the multicast routes that are
added for OpenThread interface.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-11-21 11:42:46 -05:00
Cristian Bulacu
f1a432d8c8 openthread: platform: Correct handling of closing sockets
In this commit, `net_socket_service_register` is called when a platform
module that has sockets is deinitialized, and it's socket/sockets are
closed.
This commit also handles a case when a module tries to join a multicast
group and a subscription, from another module, is already present.

Also, covered network namespace changes done in #99169

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-11-21 11:42:46 -05:00
Cristian Bulacu
e888405c61 openthread: platform: trel: Handle enable/disable from CLI
OpenThread interface is initialized beform Wi-Fi interface.
`otPlatTrelEnable` is called by OpenThread stack when it's interface is
being initialized. Given this scenario, socket operation, like `bind`,
will fail. There is also no mean to get a valid pointer to backbone
interface. This is why, `trel_plat_init` was declared and called when
backbone interface reported connectivity.

This commit handles the `ot trel disable/ot trel enable` scenario that
can be initialized from CLI. `otPlatTrelEnable` will be called, but
`trel_plat_init` will not be called anymore, leaving trel socket without
any options set, and `net_socket_service_register` is not called
anymore, to handle incoming traffic.
Now, when `otPlatTrelEnable` is called, it will verify if Wi-Fi
interface is connected and will call `trel_plat_init` if needed.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-11-21 11:42:46 -05:00
Alberto Escolar Piedras
1329a097c1 net: ocpp: Correct way of getting strdup prototype
Zephyr subsystems' headers should not duplicate C library prototypes
(in this case strdup(), which is either ISO C23 or a POSIX extension to
the C library <string.h>).

Instead they should request those prototypes from the C library.
By now Zephyr only requires ISO C17, but many C libraries will have
strdup() and expose it also when the POSIX extensions prototypes are
requested, so let's request these prototype from the C library by
setting the feature test macro _POSIX_C_SOURCE to version 2008.09
which includes it.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-21 11:42:33 -05:00
Aleksandar Stanoev
1eea6adad2 bluetooth: host: Fix bt_conn reference leak in Frame Space Update
Fix a missing unref of a bt_conn reference, leading to a ref count
mismatch, and causing the following warning to be printed:
bt_conn: Found valid connection ... in disconnected state.

Signed-off-by: Aleksandar Stanoev <aleksandar.stanoev@nordicsemi.no>
2025-11-21 11:41:24 -05:00
Johann Fischer
5137439a47 usb: device_next: use slist to store completed transfer requests
USBD_MAX_UDC_MSG configures the number of events coming from the UDC
driver that the stack can keep. This can be filled very quickly if there
would be multiple bus events for some reason, or function handlers of
those events are blocked for long time. As a consequence, subsequent
events could be dropped, and completed transfers not handled. To avoid
it, we can store completed transfer requests in a slist and check it on
every event.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2025-11-21 11:41:15 -05:00
Peter van der Perk
9f20e79f66 soc: nxp: s32: S32K3 use early reset to init ECC ram before using it.
SOC_RESET_HOOK is already too late because the code touches ram already
instead use the newer SOC_EARLY_RESET_HOOK so we can do ECC
initialization before using the memory

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-11-21 11:40:56 -05:00
Robert Lubos
7a9ca8e410 tests: net: dns_resolve: Add tests for dns_unpack_name()
Verify that dns_unpack_name() generates a valid DNS name when unpacking
records and that it returns an error in case of overflow.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-21 11:40:44 -05:00
Robert Lubos
7bd45cd39b net: dns: Fix potential buffer overflow when unpacking labels
As the loop unpacking the DNS name from records checks the current
label length on each iteration, it's also needed to update the remaining
buffer length on each iteration, otherwise the buffer length checks
doesn't work as expected.

Additionally, the remaining buffer checks while technically worked, they
were conceptually wrong and unintuitive. The buf->data pointer doesn't
move, so comparing against this pointer when adding new labels doesn't
make sense. It's more intuitive to simply compare the label size vs
the remaining buffer space.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-21 11:40:44 -05:00
Carles Cufi
353dadf54b scripts: test_plan: Fix issue introduced in 3f77560
The rewrite by ruff seems to wrongly pass a single argument to filter(),
as seen in the logs:

```
    f.process()
  File "/home/runner/work/zephyr/zephyr/zephyr/./scripts/ci/test_plan.py",
  line 145, in process
    self.find_boards()
  File "/home/runner/work/zephyr/zephyr/zephyr/./scripts/ci/test_plan.py",
  line 292, in find_boards
    self.resolved_files.extend(list(filter(resolved_filter)))
                                    ^^^^^^^^^^^^^^^^^^^^^^^
TypeError: filter expected 2 arguments, got 1
```

Split things up properly to avoid this.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-11-21 09:48:12 -05:00
Robert Lubos
396fcbf4f5 tests: net: socket: tcp: Add another test case for asynchronous connect
Verify that if the application triggers asynchronous connect with
non-blocking sockets, and starts to monitor the socket with poll()
immediately but with POLLIN only set, the poll() is still able to
report an error if the connection fails. As no POLLOUT is monitored, the
application won't know when the connection is done in case of success,
but it should still be notified in case of errors.

To achieve this, modify the existing test case to allow to specify what
events should be monitored by poll(). Additionally monitor the time
spent in poll() - an error should cause poll() to exit immediately,
not after the specified timeout.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-21 09:47:50 -05:00
Robert Lubos
6be292c35e net: tcp: Wake pending threads if non-blocking connect fails
If a thread was sleeping in poll(), monitoring POLLIN only, it should
still be notified if an asynchronous connection, triggered by
non-blocking connect(), failed. Currently that's not the case.
In result the application would never know whether the connection
was successful or not and would be stuck with a disconnected socket
that would not report anything with poll().

This was not an issue if POLLOUT was monitored as well, because POLLOUT
sets up a connect semaphore that was reset in case of errors. POLLIN
however only monitors the recv fifo, which was not waken up in such
case.

Fix this by canceling any pending waits on recv fifo and recv
condition variable.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-21 09:47:50 -05:00
Lyle Zhu
17384f450e samples: Bluetooth: Classic: Add guide on how to build/run samples
Add guide on how to build and run samples for the Bluetooth Classic.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-21 09:47:42 -05:00
Firas Sammoura
b433573997 tests: riscv: Remove local z_riscv_pmp_read_config() prototype in PMP test
The function prototype for `z_riscv_pmp_read_config()` was previously
declared in `tests/arch/riscv/pmp/clear-pmp-unlocked-entries/src/main.c`.

This local declaration is no longer necessary as the prototype is now
defined within the centralized PMP header, `include/arch/riscv/pmp.h`,
which is already included via `kernel_internal.h`. The prototype
is guarded by the `CONFIG_ZTEST` Kconfig option.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-11-21 09:47:21 -05:00
Alexander Svensen
87997afeb2 bluetooth: audio: scan_delegator: Reject remove when PA synced
- BASS mandates that a remove_source operation is not done if
  we are synced to PA or BIS. This PR fixes that
- Update BabbleSim tests to reflect this behavior
- Fixes BASS/SR/SPE/BI-05-C

Signed-off-by: Alexander Svensen <alexander.svensen@nordicsemi.no>
2025-11-21 09:47:10 -05:00
Thomas Decker
2864417de9 boards: st: nucleo_h7s3l8 & stm32h7s78_dk: Fix ext_mem MPU type
Change the zephyr,memory-attr of the ext_memory / ext_flash_mem node to
ATTR_MPU_FLASH because ATTR_MPU_IO does not allow unaligned memory access.

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2025-11-21 09:47:01 -05:00
Thomas Decker
50268f5f02 dts: arm: st: h7rs: Remove ext_memory node
Remove the ext_memory: memory@70000000 node as the external flash memory
is part of the board design. The nucleo_h7s3l8 and stm32h7s78_dk boards
already have this node.

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2025-11-21 09:47:01 -05:00
Pieter De Gendt
d43e592f04 drivers: ethernet: eth_sam: Fix BUF_TX_FRAME macro
Add missing n,x macro arguments.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-21 09:46:52 -05:00
Carles Cufi
d6f5aa9258 scripts: west: nrfutil: Use build dir to store generated json
Until now the code was using the path to the .hex file to select the
directory where the generated JSON file required for nrfutil would be
generated. But this has a problem: if the .hex file in a sysbuild
project is located in the tree as a precompiled binary, the runner would
place a file in there and make the tree dirty. Instead use the build_dir
folder which always corresponds (in both sysbuild and regular builds)
to the current target build directory.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-11-21 09:46:41 -05:00
Jukka Rissanen
5b5d42dd92 tests: posix: headers: Tests disable POSIX API but use POSIX symbols
This cannot possibly work, if POSIX is disabled, then the POSIX
symbols are also not found so remove the "without_posix_api" tests.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-21 09:46:14 -05:00
Guillaume Legoupil
2baee8af6d drivers: add config NXP_IEEE802154_MAC to pull up MCUX_COMPONENTs for NBU
west: update hal_nxp to integrate mcux: middleware: ieee_802_15_4 MAC: Add
      CONFIG_NXP_IEEE802154_MAC
      zephyr: blobs: add MCXW71 & MCXW72 BLE controller and Host libraries
                     (ieee-802.15.4-mac) to MCUXSDK 25.09.00 release
      This new version of the BLE controller is for ZigBee support and
      implements ieee-802.15.4 MAC interface.

Update connectivity framework for MCXW71 & MCXW72 BLE controller
(ieee-802.15.4 MAC) from MCUXSDK 25.09 release.

Signed-off-by: Guillaume Legoupil <guillaume.legoupil@nxp.com>
2025-11-21 12:02:00 +01:00
Fabrice DJIATSA
56d44d9261 drivers: flash: stm32_h7: invalidate data cache after flash write
STM32H7 platforms now enable cache management by default.
To ensure data coherency after flash writes, invalidate cache
lines to the region written.
This prevents stale data and ensures proper memory visibility.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-11-21 12:01:41 +01:00
Fabrice DJIATSA
d73f59a829 tests: drivers: flash: stm32: fix bus fault after blocking OPT/CR registers
On STM32H7 targets with cache management enabled by default, blocking
access to flash option/control registers using flash_ex_op() may cause
imprecise Bus Faults when attempting to unlock them immediately afterward.

This is due to instruction pipeline and cache effects, where the CPU might
execute a forbidden access before the lock is fully acknowledged.

Adding barrier_isync_fence_full() ensures that all prior
instructions are completed and the pipeline is flushed,preventing premature
access and avoiding the fault.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-11-21 12:01:41 +01:00
Jukka Rissanen
61d57c35ff net: Disable namespace compatibility support for tests
Do not enable network compatibility mode flag for network tests
so that we will get better coverage of the wrong network APIs
used.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-21 12:01:31 +01:00
Alberto Escolar Piedras
8ecbda3283 net: lwm2m: Remove use of fcntl.h
Use the underlaying zsock_ prefixed fcntl macros instead of the
POSIX_API fcntl renames.
After d45cd6716b and this, we do not
anymore use fcntl directly but use the underlaying Zephyr APIs.
So, let's also remove this include.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-21 12:01:31 +01:00
Jukka Rissanen
9795ce7bba tests: net: ocpp: Fix uninitialized variable warning
According to the compiler, the ret variable might be uninitialized
in the function (looks like a false positive but fix it anyway).

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-21 12:01:31 +01:00
Jukka Rissanen
a42c23e002 drivers: net: nsos: Convert to use namespaced net APIs
Use the namespaced network APIs instead of POSIX ones.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-21 12:01:31 +01:00
Jukka Rissanen
8046a24104 net: Fix network API calls that were not namespaced
Some of the networking calls were not namespaced so fix it.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-21 12:01:31 +01:00
Pieter De Gendt
506beae4bb drivers: sensor: Fix RTIO fallback scaling from sensor_value to q31
If the sensor_value only has an integer part N, this always resulted in q31
value of <N-1>.999999.
As the calculated shift value already uses 'abs(sample.val1) + 1' it is
safe to assume we can't have 100% scaling of this integer part and we can
omit the -1.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-21 12:01:21 +01:00
Etienne Carriere
06c231dcdf tests: drivers: build_all: misc: build test for stm32n6_axisram
Add a build-all test for stm32n6_axisram driver that is currentl not
default enabled in any STM32N6xx based boards.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-21 12:01:12 +01:00
Etienne Carriere
85088539a6 drivers: misc: stm32n6_axisram: fix clock config info
Correct clock config info recently modified that should use
STM32_DT_INST_CLOCK_INFO_BY_NAME() macro instead of
STM32_CLOCK_INFO_BY_NAME() macro.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-21 12:01:12 +01:00
Peter Büchler
8d01323b2f net: lib: ptp: fix BTCA grandmaster selection and related state transition
The BMCA comparator ptp_btca_ds_cmp() did not follow the IEEE1588
ranking order: priority fields handled only the “greater” case, causing
valid winners to fall through to the clockIdentity tie-breaker and
resulting in incorrect grandmaster selection. This also caused the
state transition from TIME_TRANSMITTER to GRAND_MASTER to be missed.

Fixes: #99562
Fixes: #99566

Signed-off-by: Peter Büchler <peter.buechler@gmail.com>
2025-11-21 11:59:49 +01:00
Mathieu Choplain
a7b396f9ab drivers: gpio: stm32: use FOR_EACH to instantiate devices
Use a list of ports and FOR_EACH to instantiate GPIO devices instead of
having one line to instantiate each port. This is much shorter and also
makes it easier to add support for new ports, if necessary in the future.

While at it, cover all ports from A to Z since it is now trivial to do so.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-21 11:59:40 +01:00
Christophe Dufaza
b5744c3158 doc: develop: manifests: external: add dtsh
Introduce documentation for using dtsh (a Devicetree Shell)
as an external module in Zephyr.

This module installs a West extension.

See also RFC #59863.

Signed-off-by: Christophe Dufaza <chris@openmarl.org>
2025-11-21 10:11:14 +02:00
Yongxu Wang
1266be59d6 soc: nxp: imx9: use SCMI generic power domain ON/OFF
Switch to SCMI_POWER_STATE_GENERIC_ON/OFF from the power protocol
header instead of local defines

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-11-21 10:10:24 +02:00
Yongxu Wang
c77b4ba46f drivers: firmware: scmi: define generic power domain ON/OFF states
Add SCMI generic power state definitions for ON and OFF as specified
by the SCMI Power Domain protocol.
These constants will be used when setting or querying power states.

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-11-21 10:10:24 +02:00
Tomasz Bursztyka
bda00b3770 drivers: uart: Add configure/config_get API support for mspm0 driver
It is thus possible to enable CONFIG_UART_USE_RUNTIME_CONFIGURE for
this driver and re-configure a uart device at runtime.

Driver's init function was moved to the bottom of the file for two
reasons: to ease factorization and to follow the common device driver
source structure (usually: the init function is right before the
API structure and the instanciation macros).

Signed-off-by: Tomasz Bursztyka <tobu@bang-olufsen.dk>
2025-11-21 10:10:11 +02:00
Yves Wang
fbf5cacbf3 tests: watchdog: Clear watchdog reset source for frdm_mcxe31b
Clear watchdog reset flag then device can retein memory.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-11-21 10:09:59 +02:00
Yves Wang
364c380681 dts: nxp: Add watchdog support for MCXE31x
Enable swt as watchdog instance for NXP MCXE31x.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-11-21 10:09:59 +02:00
Yves Wang
e909110dc4 boards: nxp: frdm_mcxce31b allow clear des fes reset flag
On destructive or functional reset, the soc_reset_hook will check reset
source and clear SRAM TCM.
Add support to let developer clear specify reset source to retein memory
content.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-11-21 10:09:59 +02:00
Yves Wang
9f81fcb5f1 drivers: clock_control: MC_CGM support get SIRC clock rate
Return fixed SIRC clock rate in nxp mc_cgm.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-11-21 10:09:59 +02:00
Yves Wang
ec7b99a855 drivers: watchdog: Make SWT compatible with hal_nxp
Avoid multiple declarations of SWT macros.
No need to log error for redundant watchdog disable.

Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
2025-11-21 10:09:59 +02:00
Tomasz Moń
7e11bc5817 usb: device_next: msc: Reduce memory usage
MSC BOT can work with just one buffer because buffer to receive CBW is
never queued at the same time as CSW. SCSI buffer needs to be multiple
of bulk endpoint wMaxPacketSize and therefore is suitable for handling
both CBW and CSW. Take advantage of this to reduce memory usage.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-11-21 10:09:49 +02:00
Tomasz Moń
1243aba8e5 usb: device_next: msc: Implement double buffering
Double buffering make it possible to significantly increase the transfer
rates by avoiding idle states. With two SCSI buffers, one buffer can be
used by disk subsystem while the other is being used by UDC (ideally
with DMA).

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-11-21 10:09:49 +02:00
Tomasz Moń
78291d4fc2 usb: device_next: msc: stall endpoints on enqueue error
When endpoint enqueue fails the device has no reliable means of recovery
other than a reset. Implement 6.6.2 Internal Device Error handling on
failed enqueue.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-11-21 10:09:49 +02:00
Yongxu Wang
2c72fe58e8 soc: nxp: imx943: configure GPT as system timer for power management
Configure GPT timers as system tick source when PM is enabled to resolve
low power mode issues:
- Cortex-M SysTick loses state during mix power-off
- SysTick cannot maintain time during system suspend

Configuration changes:
- Disable Cortex-M SysTick when GPT timer is enabled
- Set GPT clock frequency to 32768 Hz for low power operation, 32k is
  reserved in soc level system sleep mode
- Configure system tick rate to 1024 Hz

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-11-21 10:09:40 +02:00
Yongxu Wang
923f1af2ad boards: nxp: imx943: enable GPT hardware timers for system tick
Enable GPT hardware timers on imx943_evk boards:
- gpt_hw_timer1 for M33 core
- gpt_hw_timer2 for M7_0 core
- gpt_hw_timer3 for M7_1 core

These will be used as system tick sources when PM is enabled.

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-11-21 10:09:40 +02:00
Yongxu Wang
2dd1bbd159 dts: arm: imx943: add GPT timer nodes for system tick and counter
Add GPT timer nodes to support system tick and counter functionality:

- gpt_hw_timer1/2/3: System timers for M33/M7_0/M7_1 cores
- gpt4: General purpose timer/counter

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-11-21 10:09:40 +02:00
Yongxu Wang
8583ba39fd dts: arm: nxp: fix imx943 compliance ci check formatted warning
Fix Device Tree formatting issues to comply with Zephyr coding style
guidelines for i.MX943 EVK board and dts files

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-11-21 10:09:40 +02:00
Andrey Smirnov
4ef0ded130 usb: hid: Introduce HID_USAGE_PAGE16()
Introduce HID_USAGE_PAGE16() in order to be able to declare vendor
specific usage pages which require 16-bit numbers.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
2025-11-21 10:09:28 +02:00
Alberto Escolar Piedras
b4ff1f661c tests/posix/net: Fix check for host libc
Let's use CONFIG_NATIVE_LIBC to detect builds with the host C library
instead of pressuming that any build targetting the POSIX architecture
uses it. This has not been the case for several years now, as we can
select different C libraries when targetting the POSIX architecture.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-21 10:09:08 +02:00
Alberto Escolar Piedras
bdfb7604c0 subsys/crc/crc_shell: Fix check for host libc
Let's use CONFIG_NATIVE_LIBC to detect builds with the host C library
instead of pressuming that any build targetting the POSIX architecture
uses it. This has not been the case for several years now, as we can
select different C libraries when targetting the POSIX architecture.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-21 10:09:08 +02:00
Alberto Escolar Piedras
bc77cfafe6 shell: Fix check for host libc
Let's use CONFIG_NATIVE_LIBC to detect builds with the host C library
instead of pressuming that any build targetting the POSIX architecture
uses it. This has not been the case for several years now, as we can
select different C libraries when targetting the POSIX architecture.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-21 10:09:08 +02:00
Alberto Escolar Piedras
65b5240bd4 include posix posix_types.h: simplify libc check
Let's use CONFIG_NATIVE_LIBC to detect builds with the host C library
instead of checking for both CONFIG_ARCH_POSIX && CONFIG_EXTERNAL_LIBC
as it is just simpler since we have this option.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-21 10:09:08 +02:00
Alberto Escolar Piedras
75ac1c18fc net: include: socket_types.h simplify libc check
Let's use CONFIG_NATIVE_LIBC to detect builds with the host C library
instead of checking for both CONFIG_ARCH_POSIX && CONFIG_EXTERNAL_LIBC
as it is just simpler since we have this option.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-21 10:09:08 +02:00
Ederson de Souza
67e229fd20 dts/arm/nuvoton/npcx: Fix uart2 clock on npcx4
Commit 08fedb4a80 ("drivers: uart: npcx: add asychronous API support")
missed updating the clocks for uart2. This patch fixes it.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-11-21 10:08:59 +02:00
Jordan Yates
f8eb167619 scripts: ci: simple ruff formatting
Basic `ruff` format operations to allow CI to enforce from now on.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-21 10:08:50 +02:00
Jordan Yates
3f77560b92 scripts: ci: test_plan: fix ruff reports
Fix problems reported by `ruff` and remove exclusions from the config
file.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-21 10:08:50 +02:00
Jordan Yates
2186558f37 scripts: ci: coverage: fix ruff reports
Fix problems reported by `ruff` and remove exclusions from the config
file.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-21 10:08:50 +02:00
Jordan Yates
3a165b6f5d scripts: ci: stats: merged_prs: fix ruff reports
Fix problems reported by `ruff` and remove exclusions from the config
file.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-21 10:08:50 +02:00
Jordan Yates
764ad5562a scripts: ci: version_mgr: fix ruff reports
Fix problems reported by `ruff` and remove exclusions from the config
file.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-21 10:08:50 +02:00
Jordan Yates
dc1c23312d scripts: ci: errno: fix ruff reports
Fix problems reported by `ruff` and remove exclusions from the config
file.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-21 10:08:50 +02:00
Jordan Yates
f2af864712 scripts: ci: check_compliance: fix ruff reports
Fix problems reported by `ruff` and remove exclusions from the config
file.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-21 10:08:50 +02:00
Jordan Yates
4c6bbae9cc scripts: ci: guideline_check: fix ruff reports
Fix problems reported by `ruff` and remove exclusions from the config
file.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-21 10:08:50 +02:00
Fabian Blatz
da9aa8fcad boards: esp32s3_touch_lcd_1_28: Make cst816s use interrupt by default
Since the interrupt line is connected, there is no reason to force
polling mode for this board.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-11-20 17:15:22 +00:00
Fabian Blatz
a7659d8460 drivers: input: cst816s: Default to interrupt if irq-gpio available
Changes the default value of the INPUT_CST816S_INTERRUPT flag to default to
true if the there is a compatible with the irq-gpio property enabled.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-11-20 17:15:22 +00:00
Robert Lubos
61acbb986b tests: net: all: Ensure TLS sockets are built with CID support
Some CID-related functionalities of the DTLS sockets are conditionally
compiled, make sure that code is built with tests/net/all test suite.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-20 17:15:15 +00:00
Robert Lubos
da5c9c8630 net: sockets: tls: Prefix overlooked CID-related symbols
Some CID-related symbols were prefixed but not updated in sockets_tls.c
as that configuration was not built by the tests/net/all test suite,
hence easy to miss.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-20 17:15:15 +00:00
Kfir Bracha
c53f050e02 net: http_server: Support reason phrase for chunked encoded response
Add HTTP reason phrases in chunked transfer-encoded responses

Signed-off-by: Kfir Bracha <kfirous@gmail.com>
2025-11-20 17:15:05 +00:00
Alberto Escolar Piedras
764e21032f net: l2: wifi_shell: remove unnecessary include
Since we are using sys_getopt now we do not need to pull unistd.h
for anything amore.
Let's remove it.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-20 17:14:57 +00:00
Alberto Escolar Piedras
c3cd5d1c86 subsys/net wifi/wifi_shell: Fix use of sys_getopt global status
sys_getopt has now its global status variables prefixed with sys_getopt_
Let's fix the use here. Note this worked as Zephyr's POSIX_C_LIB_EXT
keeps a replica of these variables without the prefix.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-20 17:14:57 +00:00
Alberto Escolar Piedras
24277bca8d subsys/crc: Fix getopt/sys_getopt use
sys_getopt has now its global status variables prefixed with sys_getopt_
Let's fix the use here. Note this worked as Zephyr's POSIX_C_LIB_EXT
keeps a replica of these variables without the prefix, and it is
enabled by default.
And since sys_getopt was split from POSIX_C_LIB_EXT this component
only needs to enable GETOPT and no the whole POSIX_C_LIB_EXT.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-20 17:14:57 +00:00
Alberto Escolar Piedras
4411efb5a7 samples/subsys/shell/shell_module: Fix use of sys_getopt global status
sys_getopt has now its global status variables prefixed with sys_getopt_
Let's fix the use here. Note this worked as Zephyr's POSIX_C_LIB_EXT
keeps a replica of these variables without the prefix, and it is
enabled by default.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-20 17:14:57 +00:00
Alberto Escolar Piedras
065289e27d samples/shields/npm6001_ek: Fix use of sys_getopt global status
sys_getopt has now its global status variables prefixed with sys_getopt_
Let's fix the use here. Note this worked as Zephyr's POSIX_C_LIB_EXT
keeps a replica of these variables without the prefix.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-20 17:14:57 +00:00
Alberto Escolar Piedras
68e4d0c517 doc/services/shell: Fix incorrect variable name
sys_getopt has now its global status variables prefixed.
Let's fix the docs.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-20 17:14:57 +00:00
Jamie McCrae
02e6615020 doc: services: pm: device: Fix missing #ifdef
Adds a missing #ifdef for CONFIG_DEVICE_DEINIT_SUPPORT for the
driver deinit function example

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-20 17:14:50 +00:00
Jamie McCrae
b128e51994 kernel: kconfig: Disable DEVICE_DEINIT_SUPPORT by default
This Kconfig, which it itself admits is for a "very specific case"
was set to default as yes, this includes extra code in drivers with
this functionality and increases driver struct size for cases where
this function isn't needed (i.e. all because it's enabled by
default), therefore change it to be opt-in rather than opt-out

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-20 17:14:50 +00:00
Jamie McCrae
005a292bbd tests: pm: device_driver_init: Add CONFIG_DEVICE_DEINIT_SUPPORT
Adds this Kconfig, which is needed for the test, because it will
no longer be globally enabled by default

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-20 17:14:50 +00:00
Jamie McCrae
cf08b9062f tests: kernel: device: Add CONFIG_DEVICE_DEINIT_SUPPORT
Adds this Kconfig, which is needed for the test, because it will
no longer be globally enabled by default

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-20 17:14:50 +00:00
Jamie McCrae
13b722b36f drivers: i2c: i2c_bflb: Fix not guarding deinit function
Fixes an issue with an unused function being defined if
CONFIG_DEVICE_DEINIT_SUPPORT was disabled

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-20 17:14:50 +00:00
Jamie McCrae
57263db2e2 drivers: serial: uart_bflb: Fix not guarding deinit function
Fixes an issue with an unused function being defined if
CONFIG_DEVICE_DEINIT_SUPPORT was disabled

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-20 17:14:50 +00:00
Fabrice DJIATSA
9478522b88 tests: drivers: disk: disk_access: change sdmmc bus-with on stm32n6570_dk
The test required an SD card to be plugged into the board.
the test only passes with the bus width set to 1

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-11-20 17:14:21 +00:00
Fabrice DJIATSA
2a662e7ed6 samples: drivers: spi_flash: exclude stm32n6570_dk from CI testing
Decide to remove stm32n6570_dk from this scenario since it seems to
be relevant and work when CONFIG_STM32_MEMMAP is enabled based on
how flash_stm32_xspi.c driver is implemented.

Since there is already a scenario(sample.drivers.spi.flash.stm32.memmap)
that test this mode, excluding from this scenario could also help us
avoid erasing the memory twice every day at the same address.

Note:
  test with dma/interrupt mode will succeed without enable
  CONFIG_STM32_MEMMAP if we remove dependency
  on CONFIG_STM32_APP_IN_EXT_FLASH in 'flash_stm32_xspi_read'.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-11-20 17:14:21 +00:00
Fabrice DJIATSA
a788c77a52 drivers: flash: stm32_xspi: extend HAL DMA EX support to STM32N6X
add SOC_SERIES_STM32N6X dependency with USE_STM32_HAL_DMA_EX
to enable building applications that use XSPI with DMA
configuration.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-11-20 17:14:21 +00:00
Fabrice DJIATSA
5aa0ec8053 tests: application_developement: ram_context_for_isr: exclude stm32n6570_dk
The test requires RAM-based vector table relocation
(CONFIG_SRAM_VECTOR_TABLE), which depends on CONFIG_XIP being enabled.
However, stm32n6570_dk lacks internal flash and does not support XIP,
making SRAM vector relocation unsupported.As a result, the test cannot
validate ISR execution from RAM on this platform.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-11-20 17:14:21 +00:00
Fabrice DJIATSA
6c681272e6 boards: st: reduce the size of ram and flash on stm32n6570_dk
some scenarios (libraries.cmsis_dsp.transform.cq31,
libraries.cmsis_dsp.transform.rq31.fpu) in the test
tests/lib/cmsis_dsp/transform require a minimum RAM of 1024 KB
because they deal with data needing large buffer sizes for dynamic
allocation. However, 1024KB is insufficient for the tests to succeed.

By decreasing these values, the test will no longer be performed.
The rest of the tests will try to fit within SRAM size.

Note: checks have been made to ensure that 512 KB of flash and
128 Kb of RAM are enough to perform relevant daily tests on the
stm32n6570_dk.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-11-20 17:14:21 +00:00
Fabrice DJIATSA
bcfb5bc055 samples: subsys: usb: uvc: boards: increase main stack size
Increase the size of the main stack to avoid a stack overflow error
when running some sample scenarios.
This occur by example on stm32n6570_dk,
sample.subsys.usb.uvc.encoder.jpeg scenario.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-11-20 17:14:21 +00:00
Fabrice DJIATSA
f0a0053d41 tests: drivers: gpio: api_1pin: boards: update led0 on stm32n6570_dk
Replace the green user LED 1 with the red user LED 2 from alias led0
for the test to succeed.
LED1 is connect from a circuitry that prevents GPIO state from
triggering a interrupt while LED2 is directly wired to the GPIO pin.

While we're at it, change the LED's state from GPIO_ACTIVE_HIGH to
GPIO_ACTIVE_LOW to match the circuitry.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
2025-11-20 17:14:21 +00:00
Anas Nashif
4704c6d24d drivers: promote APIs from unstable to stable
Quite a few well established APIs are stuck in unstable status, move
them to stable.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-20 17:14:12 +00:00
Jukka Rissanen
77bdec412f net: openthread: Remove invalid assert
There is no openthread_instance so the assert will always fail so
remove it to prevent compilation issue.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-20 16:00:46 +00:00
Jukka Rissanen
f97e33eb38 tests: net: all: Verify OpenThread compilation
Try to catch various OpenThread related compilation issues.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-20 16:00:46 +00:00
Mathieu Choplain
a8349e7f10 migration-guide: 4.4: add entry about STM32 power configuration
Add an entry about the STM32 power supply configuration to the migration
guide for release 4.4 - it is now done through Devicetree instead of
Kconfig, and all existing Kconfig symbols have been deleted.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-20 16:00:39 +00:00
Mathieu Choplain
df71f6c730 soc: st: stm32: wba: replace Kconfig power supply configuration with DT
Replace the existing infrastructure to specify power supply configuration
through Kconfig with Devicetree, and update all boards according to new
mechanism.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-20 16:00:39 +00:00
Mathieu Choplain
3b55e9a219 soc: st: stm32: u5: replace Kconfig power supply configuration with DT
Replace the existing infrastructure to specify power supply configuration
through Kconfig with Devicetree.
Set the LDO as default to reduce out-of-tree breakage - most users were
relying on LDO being the default and it is harmless to use LDO if board
is designed for SMPS. (Existing SMPS users should break anyways since the
Kconfig symbol no longer exists, but this ensures they actively set the
power supply to SMPS in DT)

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-20 16:00:39 +00:00
Mathieu Choplain
a3b6347b1d dts: bindings: power: introduce STM32 PWRC for LDO+SMPS series
Introduce power controller binding for series equipped with two voltage
regulators (LDO + SMPS).

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-20 16:00:39 +00:00
Mathieu Choplain
7477212372 soc: st: stm32: h7rs: replace Kconfig power supply configuration with DT
Replace the existing infrastructure to specify power supply configuration
through Kconfig with Devicetree. Also update all boards that were defining
the Kconfig to no longer do so.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-20 16:00:39 +00:00
Mathieu Choplain
a14f0b8940 dts: arm: st: h7rs: add Power Controller node
Add node representing the Power Controller to SoC DTSI of STM32H7RS series,
and update DTS of all STM32H7RS-based boards since the new node has
required properties.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-20 16:00:39 +00:00
Mathieu Choplain
9f4d8d57c6 dts: bindings: power: introduce STM32H7R/S Power Controller
Introduce a new binding for the Power Controller of the STM32H7R/S series.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-20 16:00:39 +00:00
Mathieu Choplain
800fefa82b soc: st: stm32: h7: replace Kconfig power supply configuration with DT
Replace the existing infrastructure to specify power supply configuration
through Kconfig with Devicetree. Also update all boards that were defining
the Kconfig to no longer do so.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-20 16:00:39 +00:00
Mathieu Choplain
2af417fae1 dts: arm: st: h7: add Power Controller node
Add node representing the Power Controller to SoC DTSI of STM32H7 series,
and update DTS of all STM32H7-based boards since the new node has required
properties.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-20 16:00:39 +00:00
Mathieu Choplain
6b1aa557ca dts: bindings: power: introduce STM32H7 power controller binding
Introduce a new binding for the power controller of STM32H7 series.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-20 16:00:39 +00:00
Mathieu Choplain
5ea01d9a4c boards: ruiside: art_pi: fix DTS formatting issues
Fix some formatting issues in the board's DTS which trigger CI failures.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-20 16:00:39 +00:00
Siratul Islam
6dad32c81c drivers: display: hub12: add horizontal chaining support
- Add support for chaining multiple 32x16 panels horizontally
- Also fixed a race condition issue.

Signed-off-by: Siratul Islam <email@sirat.me>
2025-11-20 16:00:29 +00:00
Siratul Islam
62f585de7e dts: bindings: display: hub12: add horizontal chaining support
- Add support for chaining multiple 32x16 panels horizontally by
  setting width to multiples of 32 (64, 96, 128, etc).

Signed-off-by: Siratul Islam <email@sirat.me>
2025-11-20 16:00:29 +00:00
Yurii Lozynskyi
088536e547 drivers: uart: ifx_cat1: disable async API for SOC_CY8C6244LQI_S4D92
Exclude SOC_CY8C6244LQI_S4D92 from UART async API support due to
hardware limitations, similar to SOC_FAMILY_INFINEON_CAT1C.

Signed-off-by: Yurii Lozynskyi <yurii.lozynskyi@infineon.com>
2025-11-20 16:00:16 +00:00
Yurii Lozynskyi
b1fa628433 uart: async_api: add cy8ckit_062s2_ai board support
Add overlay files and sample configuration for cy8ckit_062s2_ai
to enable UART async API functionality.

Signed-off-by: Yurii Lozynskyi <yurii.lozynskyi@infineon.com>
2025-11-20 16:00:16 +00:00
Yurii Lozynskyi
2a3f708279 boards: infineon: add trade marks to board names
Update board full names to include PSOC™ trade mark symbols
for consistent branding across Infineon board definitions.

Signed-off-by: Yurii Lozynskyi <yurii.lozynskyi@infineon.com>
2025-11-20 16:00:16 +00:00
Carles Cufi
db0c34d836 c standard: Default to C17 as the minimum required C standard
C99 has been the minimum required C standard version for Zephyr since
its inception. After multiple attempts and discussions, a decision has
been made to upgrade to C17 going forward.
This commits replaces the default C standard from C99 to C17 in the
configuration and build system, and deprecates support for the older
standards.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-11-20 09:04:46 -05:00
Mykyta Poturai
f3b9d18711 xen: Add support for changing Xen Sysctl interface version
Add a new Kconfig option CONFIG_XEN_SYSCTL_INTERFACE_VERSION that allows
to change the version of the Sysctl interface used by Zephyr to issue
sysctl hypercalls.
For now versions 0x15 is supported.

Signed-off-by: Mykyta Poturai <mykyta_poturai@epam.com>
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2025-11-20 09:01:06 -05:00
Mykyta Poturai
4f6fb8989a xen: Add support for changing Xen Domctl interface version
Add a new Kconfig option CONFIG_XEN_DOMCTL_INTERFACE_VERSION that allows
to change the version of the Domctl interface used by Zephyr to issue
domctl hypercalls. Add compile-time checks to enable or disable certain
Domctl operations based on the selected Domctl interface version.
For now versions 0x15, 0x16, and 0x17 are supported.

Also it required to correctly guard domctl call that were not supported
prior to specified version.

Signed-off-by: Mykyta Poturai <mykyta_poturai@epam.com>
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2025-11-20 09:01:06 -05:00
Mykyta Poturai
f344dcb274 xen: domctl: Get back created domain id
If 0 is passed as domain id to the Xen createdomain hypercall, it will
allocate a new domain id and return it via the domctl structure.
Allow callers to access this new domain id via a pointer arg.
This will allow to create domains without explicitly specifying the
domain id for them.

Signed-off-by: Mykyta Poturai <mykyta_poturai@epam.com>
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2025-11-20 09:01:06 -05:00
Mykyta Poturai
db984ae4d2 xen: domctl: add doxygen comments for domctl functions
Document all of the public functions in the domctl API with doxygen

Signed-off-by: Mykyta Poturai <mykyta_poturai@epam.com>
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2025-11-20 09:01:06 -05:00
Mykyta Poturai
eb65bc0f43 xen: domctl: fix function parameter name in set/get_paging_mempool_size
The size is passed in bytes, not in megabytes. So rename the parameter
to avoid confusion.

Signed-off-by: Mykyta Poturai <mykyta_poturai@epam.com>
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2025-11-20 09:01:06 -05:00
Dmytro Semenets
6a2db68fcf drivers: xen: dom0: added getvcpuinfo domctl call
Domain control call "XEN_DOMCTL_getvcpuinfo" provides information
about domain's virtual CPU(s). It can be used by Domain-0 services
for gathering statistic and vCPUs current status.

Signed-off-by: Dmytro Semenets <dmytro_semenets@epam.com>
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2025-11-20 09:01:06 -05:00
Dmytro Semenets
f131d5f3ed drivers: xen: dom0: add Xen sysctl hypercall
This hypercall can be used get some information about physical machine
and running guests:

- sysctl hypercall "xen_sysctl_getphysinfo" allows read information about
physical machine: number CPUs, memory sizes, hardware capabilities, etc.

- sysctl hypercall "xen_sysctl_getdomaininfolist" returns array of domain
info structures that provide information about particular domain(s).

Signed-off-by: Dmytro Semenets <dmytro_semenets@epam.com>
Signed-off-by: Mykyta Poturai <mykyta_poturai@epam.com>
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2025-11-20 09:01:06 -05:00
Dmytro Semenets
eaaa5400dc drivers: xen: add xen version hypercall
Xen API contains hypercall, which allows domains to identify Xen
version, that is currently used on the system. It can be used to check
if current version is supported by Zephyr or to change behavior of the
drivers or services.

Signed-off-by: Dmytro Semenets <dmytro_semenets@epam.com>
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2025-11-20 09:01:06 -05:00
Emil Gydesen
797fa99f57 Bluetooth: BAP: Shell: Refactor receive states
Refactor how receive states are handled in the BAP
shell.

The scan delegator's receive states are not available from
the broadcast sink, and the broadcast sink makes sure to
properly set the pa_sync object in the receive state
struct.
The receive states are now also using the BAP service data to
identity the receive state when using PAST.

The broadcast assistant will now cache data from a remote device,
and makes it available to e.g. CAP.
Additionally if there is a broadcast source, we cache the values
neccesary to identity if a remote receive state represents our
local broadcast source.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-20 09:00:27 -05:00
John Batch
80e3b271e7 MAINTAINERS: update Infineon Platforms collaborators
Adds jsbatch and billwatersiii as collaborators for Infineon Platform
and hal_infineon west project.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-20 09:00:17 -05:00
Emil Gydesen
be874a2aaf Bluetooth: BAP: Missing assignment to aggregated_bis_syncs
When using the add_src and mod_src APIs the
aggregated_bis_syncs variable was only ever set to 0
and never updated, thus making all calls to
bis_syncs_unique_or_no_pref to be true.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-20 08:59:49 -05:00
Peter van der Perk
819955b52c kernel: thread: mark return undefined in z_thread_entry using DWARF
Add DWARF hint to handle z_thread_entry correctly
in debuggers. This function starts a new thread and never returns.
Use `.cfi_undefined` so DWARF-based unwinding does not rely on return.
Without this, unwinding may follow a bogus return address, leading to
invalid memory reads and potential bus faults during backtrace.

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-11-20 08:59:42 -05:00
Aleksandr Khromykh
f93e78b7f7 tests: bluetooth: tester: fix model rx handler
Commit fixes the model rx handler.
Model can receive maximum access payload.
Test should be able fit maximum access payload and
its own header for serial communication.

Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
2025-11-20 08:59:31 -05:00
Pieter De Gendt
1384cfa83c MAINTAINERS: remove pdgendt as Atmel collaborator
Atmel related work has reduced, remove my collaborator role.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-20 08:59:10 -05:00
Emil Gydesen
318067ec6c tests: Bluetooth: tester: Removed bad guard in btp_gap.h
As per the Zephyr coding guidelines, functions declarations
in header files should not be conditionally compiled.

This fixes an issue with tester_gap_clear_adv_instance
where btp_gap.c always expect it to be available.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-20 08:58:56 -05:00
Armando Visconti
0f9932a9ae west.yml: fix build warnings in hal_st module
Fix hal_st module that broke CI.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2025-11-20 06:07:57 -05:00
TOKITA Hiroshi
571f5b92a0 drivers: xen: add DMOP hypercall wrappers
Add wrappers for following XEN_DMOP_* hypercalls.
These enables Xen device model control path:
dm_op provides operations to create/manage the ioreq server
so guest MMIO accesses are trapped and handled by the hypervisor.
These are guarded by CONFIG_XEN_DMOP.

- dmop
  - dmop_create_ioreq_server
    XEN_DMOP_create_ioreq_server
  - dmop_map_io_range_to_ioreq_server
    XEN_DMOP_map_io_range_to_ioreq_server
  - dmop_set_ioreq_server_state
    XEN_DMOP_set_ioreq_server_state
  - dmop_nr_vcpus
    XEN_DMOP_nr_vcpus
  - dmop_set_irq_level:
    XEN_DMOP_set_irq_level

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2025-11-20 06:06:43 -05:00
Anas Nashif
909373f10c scripts: set_assignee: get area object before before collabs
In the manifest case, we were operating on a str instead of the area
object.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-20 06:05:26 -05:00
Bindu S
4a0e6d48c9 samples: drivers: uart: async_api: Added support for ADL
Added support for async api application on ADL-n platform

Signed-off-by: Bindu S <bindu.s@intel.com>
2025-11-20 06:04:09 -05:00
Jukka Rissanen
cbb56fddc3 doc: migration-guide-4.4: Add network API changes
Add information about the network API changes in 4.4 release.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-20 06:03:57 -05:00
Vit Stanicek
6a67a5570e dts: lpcxpresso55s69: Make mikrobus_i2c compliant
Remove non-compliant EOL in the mikrobus_i2c empty node declaration in
boards/nxp/lpcxpresso55s69/lpcxpresso55s69.dtsi.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-11-20 06:03:44 -05:00
Vit Stanicek
587bb77d8c samples: i2s_codec: Enable on mimxrt1170_evk@B/cm4
Add aliases to domain DT overlay and instantiate the wm8962 driver in
it. Add Kconfig fragment and a DT overlay for the sample.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-11-20 06:03:44 -05:00
Vit Stanicek
ea55b27c38 samples: i2s_codec: Enable on rd_rw612_bga
Instantiate the wm8904 driver in rd_rw612_bga's DT. Add MCLK clock
configuration to rw612's soc.c. Modify pinmux definitions to route
those. Add DT and Kconfig fragments to the sample. Document output jack
utilised.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-11-20 06:03:44 -05:00
Vit Stanicek
7341b8ad89 samples: i2s_codec: Enable on lpcxpresso55s69/cpu0
Modify board's pinctrl nodes to include the MCLK signal. Instantiate the
wm8904 driver. Add board specific Kconfig fragment and DT overlay. Set
up the MCLK signal.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-11-20 06:03:44 -05:00
Vit Stanicek
b3603a3fa5 boards: mimxrt685_evk/cm33: Update I2S sharing
Add SCK and WS signals to a shared signal set between Flexcomm #1 and
Flexcomm #3 for the mimxrt685_evk/mimxrt685s/cm33.

This enables the board to both transmit and receive audio, as the BCK
and WS signals produced by the WM8904 codec are only connected to the
Flexcomm #1 peripheral.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-11-20 06:03:44 -05:00
Vit Stanicek
f5cdf8153d dts: mimxrt685_evk: Map all pins of Flexcomm #1
Map all pins of RT685's Flexcomm #1 peripheral.

Needed for opration of Flexcomm #1 in I2S mode or Flexcomm #3 in I2S
mode with shared signals.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
2025-11-20 06:03:44 -05:00
Vladislav Kulikov
0b3ec11762 smf: make while conditions MISRA 14.4 compliant
Replace pointer-as-condition checks, with explicit != NULL comparisons.
Which satisfies MISRA-C:2012 Rule 14.4 (controlling expressions shall be
essentially Boolean).

Signed-off-by: Vladislav Kulikov <vlad_kulikov_c@pm.me>
2025-11-20 06:03:31 -05:00
Charles Hardin
76c1d713c1 drivers: pwm: stm32: add device tree configuration for deadtime
When using an stm32 in a bridge circuit with complementary outputs,
the deadtime needs to be configurable to avoid shoot-thru current
on the circuit. So, the HAL has the configuration in the BDTR init
and use that api access to set the configuration.

Signed-off-by: Charles Hardin <ckhardin@gmail.com>
2025-11-20 06:03:20 -05:00
Qingsong Gou
52e9064c65 boards: sifli: sf32lb52_devkit_lcd: enable trng
Enable trng on sf32lb52_devkit_lcd board

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-20 06:03:12 -05:00
Qingsong Gou
4519041538 drivers: entropy: sf32lb: add trng driver support
Add trng driver for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-20 06:03:12 -05:00
Qingsong Gou
b346fc3db4 dts: arm: sifli: sf32lb52x: add trng
Add trng for sifli sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-20 06:03:12 -05:00
Qingsong Gou
30079aa2bc dts: bindings: rng: add sifli,sf32lb-trng
Add sifli,sf32lb-trng

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-20 06:03:12 -05:00
Bartosz Miller
e638687af4 tests: driver: flash: Increase the single I/O test transfer timeout
Increase the allowed transfer timeout for the signel I/O test.

Signed-off-by: Bartosz Miller <bartosz.miller@nordicsemi.no>
2025-11-20 06:02:58 -05:00
John Batch
3c126ef124 tests: cyw920829m2evk_02: Updating tests boards for multiple socs
Updating supported tests for the cyw920829m2evk_02 board to support
multiple socs.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-20 06:02:48 -05:00
John Batch
2e1e786d61 Samples: Updating board files in samples for CYW820829
Updates all supported samples for the cyw920829m2evk_02 board to support
multiple SOC options.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-20 06:02:48 -05:00
John Batch
993196de27 Boards: Infineon: cyw920829m2evk_02: Adding new procssor variants
Adds the following processor variants and associated cards to the
cyw920829m2evk development kit:
- cyw20829b1010
- cyw20829b1340

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-20 06:02:48 -05:00
John Batch
23132b1dab Boards: Infineon: cyw920829m2evk_02: Reorganizing board hardware
Reorganizing board hardware definition in the device tree to better
reflect hardware design of separate processor board and base board.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-20 06:02:48 -05:00
John Batch
a736bb4cba Drivers: Bluetooth: Infineon: Updating CYW920829 Bluetooth for B1
- Updates Bluetooth driver to include bluetooth firmware for B1 device
  revision.
- Changes build behavior to allow building without blobs being fetched
  to allow CI to verify build.
- Adds cmake warning if blobs are not present.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-20 06:02:48 -05:00
John Batch
36ecb5a39c SOC: Infineon: CYW20829: Adding B1 devices to CYW20829 Family.
Adding B1 revision devices to CYW20829 family.
Clean up unsupported devices from SOC files.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-20 06:02:48 -05:00
John Batch
9102e8856d DTS: Infineon: CYW20829: Adding new SOC devices
Adding new MPN files for B1 part revision.
Updating existing parts to be consistent with changes made for other new
devices (PSOC Edge, PSOC Control C3).

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-20 06:02:48 -05:00
John Batch
33c49ced29 DTS: Infineon: CYW20829: Devicetree cleanup
Renames mpn device tree files to lowercase for consistency with other
devices.
Removes incorrect mpn and package devicetree files.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-20 06:02:48 -05:00
Alain Volmat
38d89c261c display: stm32-ltdc: ensure read/write rectangle fit into display
Ensure that x,y/width-height rectangle mentioned in display_read
and display_write are actually part of the framebuffer, otherwise
return an error.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-11-20 06:02:40 -05:00
Alain Volmat
21def020bd samples: add proper display api functions return value checks
Ensure that display api function return values are checked.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-11-20 06:02:40 -05:00
Cheng Chang
5959016f1b Bluetooth: classic: obex: Fix active client validation logic
Fix the active client validation in OBEX abort operations to
handle concurrent request scenarios. The check now
ensures that if there is an active client and it's different
from the current client, the operation is rejected with -EBUSY.

Signed-off-by: Cheng Chang <cheng.chang@nxp.com>
2025-11-20 06:02:24 -05:00
Lukasz Fundakowski
3a1428f957 twister: Keep pytest output formatting in log
Fixed formatting of pytest output in log by not removing
leading whitespaces.

Signed-off-by: Lukasz Fundakowski <lukasz.fundakowski@nordicsemi.no>
2025-11-20 06:02:15 -05:00
William Tang
8e00b688b4 dts: arm: nxp: s32k146: remove CAN FD support from flexcan2
Remove the `nxp,flexcan-fd` compatible property from flexcan2 node
for S32K146, keeping only `nxp,flexcan`. The FlexCAN2 instance on
S32K146 does not support CAN FD functionality, unlike flexcan0 and
flexcan1.

Signed-off-by: William Tang <william.tang@nxp.com>
2025-11-20 06:01:45 -05:00
Peter Johanson
eace19a59e drivers: input: Support invert x/y in rel mode
Despite the datasheet stating otherwise, the Pinnacle based trackpads can
have their X/Y data inverted when operating in relative mode, so set those
configs in all modes during init.

Signed-off-by: Peter Johanson <peter@peterjohanson.com>
2025-11-20 06:01:35 -05:00
Cheng Chang
ca1a522f93 bluetooth: classic : shell : Add test visibility for static functions
Add STATIC macro definition to conditionally expose static functions
for testing purposes. When CONFIG_ZTEST is enabled, STATIC expands
to nothing, making functions globally visible for unit tests.
Otherwise, STATIC expands to 'static' for normal builds.

Signed-off-by: Cheng Chang <cheng.chang@nxp.com>
2025-11-20 06:01:23 -05:00
Jerzy Kasenberg
7d88f4e886 smartbond_timer: Correct rounding in sys_clock_elapsed
The CYC_TO_TICK macro converts hardware cycles to
system ticks. Smartbond timers can be driven by XTAL32,
RC32K, or RCX sources. At the application level,
tests use milliseconds, which introduces rounding when
converting to hardware cycles.

Previously, CYC_TO_TICK rounded up, causing sys_clock_elapsed()
to sometimes report one extra tick. This value, propagated
through z_add_timeout() via elapsed(), was then used by tests
to determine the current time and the next wake-up point.
As a result, sleep duration was shortened by one tick,
leading to an unnecessary extra wake-up detected by the test.

With this fix, sys_clock_elapsed() no longer reports ticks
that have not fully elapsed, ensuring accurate sleep timing.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg.xr@bp.renesas.com>
2025-11-20 06:01:14 -05:00
Jerzy Kasenberg
3591f5cc82 tests: kernel: context: Disable PM for Smartbond
kernel context test check timing and extra interrupts
being thrown during sleep tests.

Power management is disabled because during tests
code tests sleep and with power management enabled
it could result in going to deep sleep that takes
more time than is allowed.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg.xr@bp.renesas.com>
2025-11-20 06:01:14 -05:00
Dylan Philpot
f1c2ce4f40 MAINTAINERS: update TI MSPM0 maintainers
Adds d-philpot as maintainer for TI MSPM0
Platform and hal-ti west project.

Signed-off-by: Dylan Philpot <d-philpot@ti.com>
2025-11-19 15:58:03 -05:00
Hardevsinh Palaniya
c784481ca0 drivers: video: Add ov5642 camera driver
Add driver to support ov5642 camera sensor

Co-developed-by: Rutvij Trivedi <rutvij.trivedi@siliconsignals.io>
Signed-off-by: Rutvij Trivedi <rutvij.trivedi@siliconsignals.io>
Signed-off-by: Hardevsinh Palaniya <hardevsinh.palaniya@siliconsignals.io>
2025-11-19 15:57:05 -05:00
Jamie McCrae
1cacdf8e43 doc: services: device_mgmt: smp_groups: Add note on single setting
Adds a note that saving single settings is supported, when the
required Kconfig is enabled

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-19 15:56:49 -05:00
Jamie McCrae
24e0515206 doc: releases: release-notes: 4.4: Add note on new settings Kconfigs
Lists new Kconfigs added to settings allowing single settings to be
saved to NVM without modifying their value

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-19 15:56:49 -05:00
Jamie McCrae
2443de2a7c tests: mgmt: mcumgr: settings_mgmt: Add test for single setting save
Expands the test to check thr functionality of the newly adding save
subtree/save single setting

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-19 15:56:49 -05:00
Jamie McCrae
1995b669a1 mgmt: mcumgr: grp: settings_mgmt: Allow saving single setting
Adds functionality that allows saving a single setting to NVM using
the newly added function in the settings subsystem. This also
replaces calling the subtree save function if it the underlying
Kconfig is enabled to reduce code paths in settings mgmt

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-19 15:56:49 -05:00
Jamie McCrae
6c43b61255 tests: settings: functional: Enable single settings check
Enables the Kconfig for the newly introduced
settings_save_subtree_or_single_without_modification() settings
function so that it is tested in CI

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-19 15:56:49 -05:00
Jamie McCrae
37677310c4 tests: settings: functional: Add test for save single function
Adds a test for the newly introduced
settings_save_subtree_or_single_without_modification() settings
function which allows saving a single value or subtree to NVM
without modifying the values

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-19 15:56:49 -05:00
Jamie McCrae
4616a8ac77 settings: Add function for saving (unchanged) single item/subtree
Adds a function that allows saving of a single setting item without
changing the value, or saving a subtree of settings, to the storage
backend

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-19 15:56:49 -05:00
Fei Wang
f1b3ee50b7 tests: lib: mpsc_pbuf:reproduces the deadlock scenario
The test creates two threads: a producer that calls mpsc_pbuf_alloc and
may block inside add_skip_item when entering k_sem_take, and a consumer
that calls mpsc_pbuf_claim when only a small amount of buffer space is
left.

In this condition mpsc_pbuf_claim attempts to reserve space even though
no data is available, preventing the producer from making progress.

Without the fix, the producer thread remains blocked indefinitely in
k_sem_take. With the fix applied, the consumer performs the required
k_sem_give, allowing the producer to resume allocation and the test to
complete.

Signed-off-by: Fei Wang <fei.wang@jaguarmicro.com>
2025-11-19 15:56:39 -05:00
Fei Wang
8af60c6239 lib: os: mpsc_pbuf: fix potential semaphore wait forever
One thread calls mpsc_pbuf_alloc to produce data, which invokes
add_skip_item and steps into k_sem_take.

Another thread calls mpsc_pbuf_claim to consume data. In this condition,
mpsc_pbuf_claim has only small remaining space and needs to call rd_idx_inc
to reserve space, but there is still no data available.

The consumer should call k_sem_give to wake mpsc_pbuf_alloc again,
so the producer can allocate space and continue producing data.

Without this wake-up, the producer thread may wait forever in
k_sem_take, leading to a deadlock situation.

Signed-off-by: Fei Wang <fei.wang@jaguarmicro.com>
2025-11-19 15:56:39 -05:00
Tomáš Juřena
598b904d7e doc: smf: Fix return type in event sample
Fix mismatch between `*_run` function return type and implementation.
The run functions return `enum smf_state_result`, but the event-driven
sample defined them as void while still returning a value.

Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
2025-11-19 15:56:18 -05:00
Appana Durga Kedareswara rao
3ca21faab4 maintainers: Add Kedareswara Rao Appana as Xilinx collaborator
Add myself as a collaborator for Xilinx components. I have been actively
contributing and will continue reviewing and testing patches for the Xilinx
subsystems.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
2025-11-19 15:55:56 -05:00
Vladislav Kulikov
51c96fc453 tests: smf: use BIT() for flat state flags
Replace manual '1 << n' flag definitions in the flat SMF test with the
common BIT(n) macro. This aligns the test with other SMF test.

Signed-off-by: Vladislav Kulikov <vlad_kulikov_c@pm.me>
2025-11-19 15:55:47 -05:00
Jerzy Kasenberg
31c05b13e7 test: scheduling: Disable works for Smartbond
Smartbond device schedules periodic calibrations work
and delayed work for xtal32 settle.
Those works can disrupt strict timing that test checks.

This change disables calibration for RCX and RC32K.
Xtal32k settle work is schedule late as not to be
executed during tests.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg.xr@bp.renesas.com>
2025-11-19 15:55:40 -05:00
Jerzy Kasenberg
7979dd77e9 drivers: clock_control: smartbond: Move calibration to DT
Calibration interval was specified in Kconfig now
configuration is moved to device tree.
This allows to have different values for RCX and RC32K.

While calibration is vital for correct system timing, it
periodically schedules work that measures frequency of RCX or
RC32K.

Now it's also possible to set calibration interval to 0
to prevent calibration entirely. This may be useful for
scheduling tests that are sensitive to number of active
threads.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg.xr@bp.renesas.com>
2025-11-19 15:55:40 -05:00
Carles Cufi
b2d65fbc46 soc: nxp: imxrt: Select missing ATOMIC_OPERATIONS_*
Follow-up to
689ba58b10.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-11-19 15:54:32 -05:00
Alexander Svensen
78729f4ff0 bluetooth: audio: scan_delegator: Fix validation
- Fixes bug where bis_sync_requests were wrongfully validated.
  - Two BISes across subgroups should not have the same bits set
- Remove use of internal->bis_syncs before it's updated in mod_src.

Signed-off-by: Alexander Svensen <alexander.svensen@nordicsemi.no>
2025-11-19 15:54:23 -05:00
Benjamin Cabé
d78a9baff9 samples: net: ocpp: add websocket path configuration option
Make the websocket path configurable since having it hardcoded in the
sample is not practical.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-19 15:54:11 -05:00
Carles Cufi
cdeddeaecc tests: mspi: flash: Use platform_allow for the no-multithreading test
Since many boards enable features that require multithreading (e.g. USB)
that conflict directly with the `CONFIG_MULTITHREADING=n` required for
the test variant, and the filter:
filter: dt_alias_exists("mspi0") and CONFIG_FLASH_MSPI_NOR
does not work since that requires Devicetree and Kconfig building
successfully, which is not the case here (Kconfig fails since
dependencies are not met).

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-11-19 15:54:02 -05:00
Mathieu Choplain
ee71b30106 drivers: usb: udc: stm32: inline priv_pcd_prepare
`priv_pcd_prepare` now only consumes per-instance information or constants.
Instead of calling it indirectly through a function pointer, it could be
called directly, but since it is very shorted and used from only one place,
inline it instead.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-19 15:53:55 -05:00
Mathieu Choplain
70efb293ce drivers: usb: udc: stm32: move base address to instance configuration
Instead of consuming the DT property directly, save the USB controller base
address in the instance configuration block and retrieve it at runtime.
This makes the driver more instance-aware.

While at it, cleanup `priv_pcd_prepare` to always consume the property
(through the instance configuration) instead of sometimes using the base
address from CMSIS.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-19 15:53:55 -05:00
Mathieu Choplain
ea07796a2d drivers: usb: udc: stm32: move IRQn to instance configuration
Move the controller's IRQn from instance data to instance configuration,
and update all consumers accordingly. One instance which used the global
UDC_STM32_IRQ is also updated to consume the per-instance field instead.

While at it, add missing comments for certain fields of the configuration.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-19 15:53:55 -05:00
Tom Burdick
0c50b929bb doc: Sensor Read and Decode no longer Experimental
The docs signaled to readers that Read and Decode was an experimental API
while Kconfig did not. These are no longer experimental APIs. We have a
solid number of implementations in the tree now showing these APIs in
use in the real world. They are still however stabilizing!

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2025-11-19 15:53:44 -05:00
Luca Burelli
93f65752d0 MAINTAINERS: add new Arduino Platforms collaborators
Add Ibrahim Abdelkader and Mattia Pennasilico as collaborators for the
Arduino boards area, as they have long experience on our boards and
will provide insightful reviews.

Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
2025-11-19 15:53:37 -05:00
Alberto Escolar Piedras
72090b73ef lib/utils/getopt: Fix trivial issues detected by SonarCloud
Fix uncontroversional issues detected by SonarCloud, whose fixes are
trivial, and improve code readability.

This commit fixes multiple sonar cloud detected issues like:
"Give names to the parameters of this function prototype."
"Declare the variable "i"/"j" inside the loop"
"Remove this empty statement"

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-19 15:53:28 -05:00
Alberto Escolar Piedras
9fee526365 net: Fix EVENTFD kconfig selection
Since 820cd34dbb these net components
use ZVFS_EVENTFD directly instead of thru EVENTFD.
So, let's select ZVFS_EVENTFD directly instead of indirectly
thru EVENTFD.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-19 15:53:19 -05:00
Anas Nashif
a43e2a76a1 MAINTAINER: add mipi_dbi.h header to related area
Add header to corrosponding area.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-19 15:52:53 -05:00
Anas Nashif
4758cfadf5 tests: twister blackbox: filter module installation
Do not install modules we do not need for testing to save space.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-19 09:18:56 -05:00
Anas Nashif
75f69425dd ci: tags: add posix headers to posix group in tags
When posix headers change, make sure we verify the posix portability
layer.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-19 09:18:36 -05:00
Kai Vehmanen
3f6ef5043c soc: intel_adsp: ace30: allow userspace to execute cold functions
Add access to functions in cold section for XTENSA_MMU_MAP_SHARED
(used for user-space threads). This allows to call functions marked
with "__cold" from user threads.

Suggested-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2025-11-19 15:17:04 +01:00
Timothy Keys
6bfa6fa9a8 bluetooth: host: shell: Add SCI shell commands
This adds support for Shorter Connection Interval commands in the bt
shell.

Signed-off-by: Timothy Keys <timothy.keys@nordicsemi.no>
2025-11-19 09:15:18 -05:00
Timothy Keys
c14dcaf199 bluetooth: host: Change uses of interval to interval_us
Since Shorter Connection Intervals changes the unit that connection
intervals can be represented in. It is necessary to change how
they are stored and represented.

This commit deprecates interval in favour of interval_us.

Remove use of interval in internal bt_conn struct since it is no longer
needed.

Signed-off-by: Timothy Keys <timothy.keys@nordicsemi.no>
2025-11-19 09:15:18 -05:00
Timothy Keys
e2cd247ec4 bluetooth: host: Add Shorter Connection Intervals support
This commit adds support for the Shorter Connection Intervals feature to
the Bluetooth host.

Signed-off-by: Timothy Keys <timothy.keys@nordicsemi.no>
2025-11-19 09:15:18 -05:00
Lukas Gehreke
36beeec662 drivers: modem: sim7080: Added gnss bug description to doxygen.
Some modem revisions can hang up on gnss functionality. Added
a warning and a workaround to doxygen documentation.

Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
2025-11-19 09:15:02 -05:00
Jamie McCrae
881584112f west.yml: MCUboot synchronization from upstream
Update Zephyr fork of MCUboot to revision:
  f3cc9476e233364031e9ab842290392f260fba82

Brings following Zephyr relevant fixes:

  - f3cc9476 updates for 2.3.0-rc1 release
  - 496f74f3 zephyr: Fix BOOT_DOWNGRADE_PREVENTION_CHOICE symbol
  - 6ab9afc6 boot_serial: Use boot_state_init where intent to
    initialize
  - e6fefac2 bootutil: Temporarly drop mem cleanup from
    boot_state_clear
  - 457be0cf bootutil: Fix some debug log format specifiers
  - f9ad3ee2 bootutil: Add API to lock HW counter
  - 6e602004 boot: bootutil: bootutil_area: Add debug for adjusted
    offset
  - 9d334f9b boot: bootutil: bootutil_area: Fix swap using offset
    min scramble
  - 76036133 boot: zephyr: Remove enable from beginning of prompts
  - d14ba22d bootutil: Fix encryption context de initialization in
    boot_state_clear
  - d8c4cc69 bootutil: Remove NULL state logic from boot_state_clear
  - 8ff6b678 bootutil: Use boot_state_init instead of
    boot_state_clear
  - dd4b01f4 boot_serial: Initialize state with boot_state_init
  - a312656b bootutil: Add boot_loader_state_init
  - e9255183 bootutil: Allow using psa_key_id_t in AES crypto
    context
  - 3af40a31 boot: zephyr: sysflash: Increase number of supported
    images
  - c27bb0f4 boot_serial: Use struct enc_data in
    decrypt_region_inplace
  - 0287fd4d boot_serial: Fix double boot_loader_state init
  - f846e9e9 boot: zephyr: Allow disabling default multiple RAM
    region file
  - 0ccce2f7 bootutil: In boot_swap_image add return check from
    boot_read_enc_key
  - 32b3c18b bootutil: Refactor boot_read_enc_key

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-19 09:14:32 -05:00
David Leach
d588d45d90 maintainers: Add Holt-Sun to NXP Platform Drivers collaborators
Add Holt-Sun to the NXP drivers area.

Signed-off-by: David Leach <david.leach@nxp.com>
2025-11-19 09:14:23 -05:00
Chun-Chieh Li
7f6fc2ee4b drivers: can: support nuvoton m333x series
Add support for Nuvoton's M3331 series SoC

Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
2025-11-19 09:14:13 -05:00
Martin Hoff
94ed533c31 soc: silabs: siwg917: add dependency when PM device is enabled
This patch fixes a compilation error when CONFIG_PM_DEVICE is enabled
without CONFIG_PM_DEVICE_RUNTIME and CONFIG_POWER_DOMAIN.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
2025-11-19 09:13:57 -05:00
Cristian Bulacu
34d215d5a9 openthread: platform: Update code to use socket services config
Updated platform code to make use of number of socket services defined
in Kconfig. In this way, hardcoded values are avoided.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-11-19 09:13:49 -05:00
Cristian Bulacu
ac89a2a771 openthread: Kconfig: Add config for number of socket services
This commit adds support to define number of platform socket services
using Kconfig.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-11-19 09:13:49 -05:00
Guillaume Gautier
7e3aa9bf8d boards: st: stm32u5g9j_dk: adjust adc prescaler
Set ADC prescaler to 2 instead of 1 for the STM32U5G9J-DK board.
A prescaler of 1 results in incorrect measurements while 2 returns the
expected values.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-11-19 09:13:39 -05:00
Zhaoxiang Jin
5a1032df59 boards nxp/frdm_mcxn236: remove unused GPIO5 configuration
The GPIO5 has no sofware configurable clock gate in the MCXN236.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-11-19 09:13:31 -05:00
Ruben Völl
d21f6b5ecd include: adc: add adc_read_async_dt()
Add `adc_read_async_dt()`, based on `adc_read_async()` and
`adc_read_dt()`, as static inline function.

Signed-off-by: Ruben Völl <ruben.voell@sevenlab.de>
2025-11-19 06:55:24 -05:00
Tomasz Leman
18b34bb3d2 drivers: power_domain: intel_adsp: Refactor power management initialization
This patch refactors the power management initialization for the Intel
ADSP power domain driver to align with the recommended practices
outlined in the documentation. The changes include:

1. Replacing the manual power management initialization sequence
   (`pm_device_init_suspended` + `pm_device_runtime_enable`) with a call
   to `pm_device_driver_init` in the `pd_intel_adsp_init` function.
2. Adding the `zephyr,pm-device-runtime-auto` property to the power
   domain nodes in the device tree files for ACE15, ACE20, ACE30, and
   ACE40.

These changes ensure that the power domain driver is initialized with
the appropriate power management state and that runtime power management
is automatically enabled based on the device tree configuration. The
functionality of the power management state remains unchanged, ensuring
consistent behavior.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2025-11-19 06:55:12 -05:00
Jiafei Pan
b69a050d82 boards: frdm_imx91: add ENET ethernet port support
Add ENET ethernet port support on FRDM_IMX91 board.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-11-19 06:54:54 -05:00
Jiafei Pan
ac1bd04c3a dts: arm64: mimx9131: add enet device nodes
Add ENET device nodes support for i.MX 9131.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-11-19 06:54:54 -05:00
Jiafei Pan
6c27ec126b drivers: clock_control_mcux_ccm_rev2: add imx91 enet support
Add ENET clock support for i.MX91.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-11-19 06:54:54 -05:00
Jamie McCrae
63883760fb tests: mgmt: mcumgr: Add os mgmt mpstat test
Adds a test to check that the memory pool statistics command works

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2025-11-19 06:54:40 -05:00
Jamie McCrae
d9c2bdf51a mgmt: mcumgr: grp: os_mgmt: Add memory pool statistics command support
Adds support for the memory pool statistics (mpstat) command, which
will list details on various memory heaps on the device

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2025-11-19 06:54:40 -05:00
Jamie McCrae
2f42addef7 mgmt: mcumgr: grp: img_mgmt: Use common reset function
Replaces the img_mgmt specific function with the common SMP
function for resetting the zcbor buffer and allowing a new response
to be sent

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2025-11-19 06:54:40 -05:00
Jamie McCrae
89b01d5c93 mgmt: mcumgr: transport: Add zcbor buffer reset function
Adds a common zcbor reset buffer function, this allows for the
buffer to be reset after data has been added already to add a
different response, e.g. an error response

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2025-11-19 06:54:40 -05:00
Felix Wang
16214ace79 dts: arm: nxp: Add lpit configuration in dts
The LPIT is missing in nxp_mcxe24x_common.dtsi,
this patch add lpit 0 address, registers, interrupts
and channel setting.

Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
2025-11-19 06:53:31 -05:00
Felix Wang
5311349f63 boards: nxp: frdm_mcxe247: Enable lpit
Enable lpit0 clock according to dts setting.

Enable lpit0 and its four channels.

Verified pass with counter_basic_api test.

Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
2025-11-19 06:53:31 -05:00
Felix Wang
c826167f5b drivers: counter: support multiple interrupts for LPIT
For devices like MCXE247, the LPIT instance hase multiple
interrupts, however the current  driver code just support
one interrupt. This patch has improved the code for this
requirement.

Signed-off-by: Felix Wang <fei.wang_3@nxp.com>
2025-11-19 06:53:31 -05:00
Andrzej Głąbek
68fab5fd2c drivers: flash: nrf_qspi_nor: Fix compilation with QER set to NONE
This is a follow-up to commit d1abe40fb0.

Function `qspi_wait_while_writing()` (and also `qspi_rdsr()` that is
called by it) is now always required for `qspi_erase()`, so it can no
longer be under `#if !IS_EQUAL(INST_0_QER, JESD216_DW15_QER_VAL_NONE)`.

Also definition of `dev_config` in `configure_chip()` needs to be moved,
as for QER set to NONE, it is not used and causes a compilation warning.

Add a test case that will ensure the driver can be built successfully
with `quad-enable-requirements = "NONE"`.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2025-11-19 06:53:20 -05:00
Elmo Lan
95aa209226 driver: gpio: Add sleep delay in gpio isr
When EC wakes by GPIO, it may fall back to SUSPEND_TO_IDLE
before the host or peripherals have a chance to take further action.

Add a lightweight delay-sleep mechanism to keep system awake
for as short period after a GPIO wake event.

Signed-off-by: Elmo Lan <elmo_lan@realtek.com>
2025-11-19 06:52:59 -05:00
Pavel Vasilyev
116d4ddb89 tests: bluetooth: qualification: Remove data signing related ICS
This commit removes data signing related ICS.

Removed ICS:
- SM 6/1: Signing Algorithm Generation
- SM 6/2: Signing Algorithm Resolving
- GATT 3/13: Signed Write Without Response
- GATT 9/10: Signed Write Command
- GATT 7/3: LE Security mode 2
- GAP 25/2: LE Security mode 2
- GAP 35/2: LE Security mode 2
- GAP 25/5: Connection data signing procedure
- GAP 35/5: Connection data signing procedure
- GAP 25/6: Authenticate signed data procedure
- GAP 35/6: Authenticate signed data procedure
- GAP 27b/8: Connection Signature Resolving Key (CSRK)
- GAP 37b/8: Connection Signature Resolving Key (CSRK)

The following tests are not supported any longer:
- GAP/SEC/CSIGN/BI-01-C
- GAP/SEC/CSIGN/BI-02-C
- GAP/SEC/CSIGN/BI-03-C
- GAP/SEC/CSIGN/BI-04-C
- GAP/SEC/CSIGN/BV-01-C
- GAP/SEC/CSIGN/BV-02-C
- GATT/CL/GAW/BV-02-C
- SM/CEN/SIGN/BV-01-C

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2025-11-19 06:52:38 -05:00
Pavel Vasilyev
66679c1886 tests: bluetooth: init: Remove duplicate prj_<x>.conf files
Remove duplicated prj.conf file.

prj_6, prj_7, prj_14 are identicall. Since prj_6.conf is unchanged,
keeping it.

prj_8, prj_9, prj_15 are identicall. Since prj_15.conf is
unchanged, keeping it.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2025-11-19 06:52:38 -05:00
Pavel Vasilyev
b7b35b89ed bluetooth: host: Deprecate CONFIG_BT_SIGNING
This commit deprecates:
- the `CONFIG_BT_SIGNING` Kconfig option
- `BT_GATT_CHRC_AUTH` property

IOW, this commit deprecates the LE Security mode 2 support.

Explanation:

Erratum ES-26047 introduced in Bluetooth Core Specification v6.2
requires SingCounter to be persistently stored to prevent replay
attacks.

Currently, the Host doesn't store SignCounter, therefore the device is
vulnerable to replay attacks after reboot.

Additionally, the current implementation doesn't assume that SignCounter
of a received message can be incremented by more than one and thus may
not validate correct message.

The Bluetooth Security and Privacy Best Practices Guide recommends to
not using Data signing and recommends to use LE Security mode 1 levels
2, 3 or 4 instead.

The Signed Write Without Response sub-procedure, which is the only user
of Data signing, is optional (see Vol 3, Part G, Table 4.1).

See also ES-18901.

The aforementioned reasons make no sense to keep this feature.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2025-11-19 06:52:38 -05:00
Adam Kondraciuk
127ba8d494 samples: boards: nrf: system_off: Add sample with system clock disabled
Extend the system off samples by adding an option to disable
the system clock. When the system clock is disabled additional
power savings can be observed.
After using the `sys_clock_disable()` function, the GRTC is
turned off making system time-related features unavailable.

Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
2025-11-19 06:52:24 -05:00
Adam Kondraciuk
dfff593b77 drivers: timer: nrf_grtc_timer: Add system_clock_disable implementation
Add implementation of `sys_clock_disable` function for GRTC timer.

Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
2025-11-19 06:52:24 -05:00
Pieter De Gendt
bb19a9bdb7 drivers: flash: shell: Use timing functions for speed tests
Use the timing functions to increase the accuracy of the flash speed
measurements.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-19 06:52:08 -05:00
Qingsong Gou
339cd882f7 drivers: clock_control: sf32lb: fix clock selection error
Fix clock selection error

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-19 06:51:54 -05:00
Stephanos Ioannidis
da53769d26 ci: assigner: Fix maintainer file check
The commit 1fe332de61 moved the maintainer
file check step from a standalone workflow to the assigner workflow, which
uses the `action-python-env` action to install the Python requirements.

The version of PyGithub package installed by the `action-python-env` action
in the assigner workflow is 2.6.1, which is older than the minimum required
version 2.7.0 (see 5a4b0ac4d7 for more
details), and this caused the maintainer file check to erroneously flag the
users with "Triage" role.

This commit updates the assigner workflow to use the
action-python-env@32e53bef090c33d53aa94f1d9a9d29c93cfdc5f7, the latest
version at the time of this change with up-to-date requirements file, in
order to ensure that PyGithub>=2.7.0 is installed.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2025-11-19 06:48:14 -05:00
Martin Stumpf
0c9d8b7a8e drivers: current_sense_amplifier: fix zero-current-voltage binding
It seems the new microvolt/microamp rework (#95588) simply forgot to
implement zero current voltage offsets.

Signed-off-by: Martin Stumpf <finomnis@gmail.com>
2025-11-18 19:53:22 -05:00
Chris Friedt
27180d2fc5 arch: riscv + xtensa + x86: workaround needed for LLVM linker
Due to slight differences in the way that LLVM and GNU linkers work,
the call to `z_stack_space_get()` is not dead-stripped when linking
with `lld` but it is dead-stripped when linking with GNU `ld`.

The `z_stack_space_get()` function is only available when
`CONFIG_INIT_STACKS` and `CONFIG_THREAD_STACK_INFO` are defined.

The issue is reproducible (although requires building LLVM and
setting up some environment variables) and goes away with the proposed
workaround.

Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
2025-11-18 19:53:10 -05:00
Muhammad Waleed Badar
62cbf13673 samples: ocpp: add native_sim configuration
Disable DHCPv4 and use static network configuration
for native_sim board

Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
2025-11-18 19:52:52 -05:00
Qingsong Gou
114c9a88a9 boards: sifli: sf32lb52_devkit_lcd: enable temp sensor
enable temp sensor on sf32lb52_devkit_lcd board

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-18 19:52:37 -05:00
Qingsong Gou
7a928a3c4e drivers: sensor: sifli: add sf32lb temp sensor
Add temp sensor driver for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-18 19:52:37 -05:00
Qingsong Gou
fd3e6417d1 dts: arm: sifli: sf32lb52x: define temp sensor
add temp sensor device node

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-18 19:52:37 -05:00
Qingsong Gou
53330396b2 dts: bindings: sensor: add sifli,sf32lb-tsen
Add temperature sensor for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-18 19:52:37 -05:00
Fabio Baltieri
b71fafd48b MAINTAINERS: drop the sensor area label from few ares
Drop the "area: Sensors" label from Wurth and TDK sensor areas, the
current setup is causing the issue assigner script to pick up those
maintainers for any issue labeled as sensor as it does not know better,
if these areas wants a label for issue tracking their maintainer can
make an area specific one and use it.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-11-18 19:52:24 -05:00
Nicolas Pitre
159c0117a4 boards: arm: fvp_base_revc_2xaem: add custom atomics workaround
FVP's (ARM Fixed Virtual Platform) atomic instruction emulation appears
to not properly implement the cache coherency guarantees specified by the
ARM architecture. Atomic instructions with acquire/release semantics (LDAR,
LDAXR, LDADDAL, etc.) should ensure that loaded values reflect any prior
stores from other CPUs, but on FVP this can fail, leading to stale cached
values being read in SMP configurations.

This manifests as performance issues in lockfree data structures as
demonstrated by tests/lib/lockfree hanging with excessive retries.

This commit adds board-specific atomic operation implementations with
explicit (and, in theory, redundant) data memory barrier (DMB SY)
instructions before all operations that read from memory. These barriers
force cache invalidation before reads, working around the FVP issue by
ensuring CPUs observe the latest values written by other CPUs. This
should be temporary until this FVP situation is better understood/fixed.

Note: FVP's cache_state_modelled parameter can improve the lockfree test
outcome but this is also 10x slower or more with many tests.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
8a99e284cc boards: arm: fvp_base_revc_2xaem: Increase DRAM to 128 MB
Increase FVP Base RevC 2xAEM DRAM from 2 MB to 128 MB to match the
platform's actual capabilities and align with QEMU's configuration.

The FVP Base RevC supports ~4 GB of RAM as documented in the Linux
kernel device tree (arch/arm64/boot/dts/arm/fvp-base-revc.dts), which
defines two memory regions totaling approximately 4 GB.

The previous 2 MB limitation caused issues with demand paging tests
where the kernel VM size (8 MB) exceeded available RAM, triggering
early page faults before the page frame allocator was initialized.
With 128 MB, demand paging workloads have sufficient memory to operate
without premature paging.

This change brings FVP's memory configuration in line with QEMU
Cortex-A53 (128 MB).

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
106d3db360 arch: arm64: Increase MAX_XLAT_TABLES for userspace tests
Memory protection and userspace tests require more MMU translation
tables than the default. Without this increase, tests fail with:

  E: CONFIG_MAX_XLAT_TABLES too small
  ASSERTION FAIL [ret == 0] @ arch/arm64/core/mmu.c:1244
	privatize_page_range() returned -12

Increase defaults when both USERSPACE and TEST are enabled:
- 32 tables for SMP configurations
- 24 tables for non-SMP configurations

This fixes:
- sample.kernel.memory_protection.shared_mem (all platforms)
- rtio.api.userspace (v8a, v9a)
- rtio.api.userspace.submit_sem (v8a, v9a)
- portability.posix.common.userspace

Consequently the demand paging test needed adjustment to its
qemu_cortex_a53 configs to keep working as this test is highly
sensitive to the amount of available free memory.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
425af7ad06 arch: arm64: Increase stack sizes for userspace with FPU
Increase ARM64 stack sizes to accommodate deeper call stacks in
userspace and SMP configurations when FPU_SHARING is enabled:

- PRIVILEGED_STACK_SIZE: 1024 → 4096 bytes (with FPU_SHARING)
- TEST_EXTRA_STACK_SIZE: 2048 → 4096 bytes (with FPU_SHARING)

The default 1KB privileged stack is insufficient for ARM64 userspace
syscalls when FPU context switching is enabled.

Symptom: Userspace tests crash with Data Abort (EC 0x24) near stack
boundaries during syscalls, particularly on SMP configurations where
multiple threads exercise FPU lazy switching.

Fixes previously failing CI test on fvp_base_revc_2xaem SMP variants:
- kernel.threads.dynamic
- Multiple userspace tests with FPU_SHARING enabled

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
f5d6b9ea0e tests: arm64: Add SIMD context switch stress test
Add stress test for SIMD register save/restore during context switching.
The test validates correct FPU context handling using either ARM Neon or
SVE2 instructions depending on the build target.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
ed6d497276 tests: arm64: SVE: context switching test across different privileges
Expand the SVE context switching test to cover all thread privilege
combinations with validation of SVE state preservation across different
contexts.

Test Coverage:
- Privileged vs Privileged threads (kernel mode)
- User vs User threads (userspace with memory domains)
- User vs Privileged threads (mixed privilege levels)

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
b5d4edcbf8 tests: arm64: Add SVE context switching validation test
Add test to validate SVE (Scalable Vector Extension) context switching
implementation, ensuring proper register preservation across thread
switches in multi-threaded environments.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
ffd08f5385 arch: arm64: Implement SVE context switching for ARMv9-A
Implement Scalable Vector Extension (SVE) context switching support,
enabling threads to use SVE and SVE2 instructions with lazy context
preservation across task switches.

The implementation is incremental: if only FPU instructions are used
then only the NEON access is granted and preserved to minimize context
switching overhead. If SVE is used then the NEON context is upgraded to
SVE and then full SVE access is granted and preserved from that point
onwards.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
e1970ae56d tests: arm64: Add Arm architecture feature detection test
Add comprehensive test to validate ARM64 architectural feature detection
across ARMv8.1 through ARMv9-A implementations, providing runtime
verification of processor capabilities and security features.

Core architecture features tested:
- Exception Level (EL) support detection (EL0-EL3)
- SVE (Scalable Vector Extension) presence and capabilities
- Advanced SIMD (NEON) and Floating Point implementation levels
- Architecture version classification (ARMv8 vs ARMv9-A)

ARMv8.1-A+ features:
- LSE (Large System Extensions) atomic operations with level detection
- Pointer Authentication (PAC) with comprehensive variant analysis:
  * API/APA (Address), GPI/GPA (Generic) authentication
  * Enhanced PAC levels (1, 3, 4, 5) with FPACCOMBINE detection
  * QARMA3 algorithm support (GPA3/APA3)

ARMv8.5-A+ security and performance features:
- Branch Target Identification (BTI) for control flow integrity
- Memory Tagging Extensions (MTE) with level classification
- Random Number Generation (RNDR) hardware entropy
- Speculative Store Bypass Safe (SSBS) side-channel mitigation

ARMv8.7-A+ advanced features:
- WFxT (Wait with Timeout) enhanced synchronization
- RPRES (Reciprocal Precision) optimized math operations

ARMv8.8-A+ features:
- MOPS (Memory Copy/Set) optimized memory operations
- BC (Branch Consistency) advanced branch handling

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
80a6ead8c9 cmake: fix style conformance that makes CI fail
This fixes the following:

CMakeStyle File:cmake/gcc-m-cpu.cmake Line:7
Column:Remove space before '(' in if() statements
CMakeStyle File:cmake/gcc-m-cpu.cmake Line:22
Column:Remove space before '(' in if() statements
CMakeStyle File:cmake/gcc-m-cpu.cmake Line:28
Column:Remove space before '(' in if() statements
CMakeStyle File:cmake/gcc-m-cpu.cmake Line:38
Column:Remove space before '(' in if() statements
CMakeStyle File:cmake/gcc-m-cpu.cmake Line:48
Column:Remove space before '(' in if() statements

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
051623c808 boards: arm: fvp: Add Cortex-A320 board variant support
Add Cortex-A320 support to the unified FVP board structure with ARMv9.2-A
specific configuration parameters.

New board target:
- fvp_base_revc_2xaem/a320

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
02b4903730 boards: arm: Add unified FVP ARMv9-A board support
New board targets:
- fvp_base_revc_2xaem/v9a (basic ARMv9-A single core)
- fvp_base_revc_2xaem/v9a/smp (ARMv9-A SMP 4 cores)
- fvp_base_revc_2xaem/v9a/smp/ns (ARMv9-A SMP non-secure with TFA)

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
a479606c33 modules: trusted-firmware-a: Disable AArch32 context for ARMv9-A
ARMv9-A is AArch64-only and does not support AArch32 execution states
at EL1/EL2/EL3. Configure TF-A build to disable AArch32 register
context (CTX_INCLUDE_AARCH32_REGS=0) when building for ARMv9-A platforms.

This fixes TF-A boot failures on ARMv9-A non-secure variants where
TF-A would panic with:
  ERROR: EL1 supports AArch64-only. Please set build flag
         CTX_INCLUDE_AARCH32_REGS = 0

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
2aef4fbe5b arch: arm64: Add ARMv9-A architecture and Cortex-A510 CPU support
Add ARMv9-A architecture support with Cortex-A510 CPU as the default
processor for generic ARMv9-A targets.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
bf48b42f4a boards: Add backward compatibility for renamed FVP boards
Add deprecated.cmake mappings to redirect old board names to new
unified structure:

- fvp_base_revc_2xaemv8a
→ fvp_base_revc_2xaem/v8a

- fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp
→ fvp_base_revc_2xaem/v8a/smp

- fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp/ns
→ fvp_base_revc_2xaem/v8a/smp/ns

This ensures existing build commands and documentation continue to work
with deprecation warnings while transitioning to the new board structure.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
c01e0943c0 boards: arm: Create unified fvp_base_revc_2xaem board structure
Create unified board configuration to replace verbose board naming
with shorter hierarchical structure. This board works with the new
unified fvp_aem SOC series and supports the v8a architecture variant.

This enables board targets like:
- fvp_base_revc_2xaem/v8a (basic ARMv8-A)
- fvp_base_revc_2xaem/v8a/smp (ARMv8-A SMP)
- fvp_base_revc_2xaem/v8a/smp/ns (ARMv8-A SMP non-secure)

This structure replaces the existing overly verbose board designations
with a cleaner, more maintainable organization and provides a foundation
for adding v9a variants.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
934e61bb61 soc: arm: fvp_aem: Create unified SOC series structure
Reorganize fvp_aemv8a SOC into unified fvp_aem series with a v8a
architecture variants to enable cleaner board target naming. This also
sets the stage for upcoming ARMv9-A support.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
851171a8c4 boards: arm: fvp_base_revc_2xaemv8a: allow SMP on bare metal
This adds necessary configuration files to build with SMP and no trusted
firmware. Given PSCI is not available, CPU power management uses the FVP
power controller directly. This simplifies debugging, and builds faster
too!

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Nicolas Pitre
90afb8f429 drivers: pm_cpu_ops: Add Arm FVP CPU power management driver
Add a new PM CPU ops driver for Arm Fixed Virtual Platform (FVP) that
enables bare metal SMP support without Arm Trusted Firmware (ATF).

The driver provides CPU power-on and system reset operations by directly
interfacing with FVP's power controller (PWRC) and V2M system registers.

The implementation includes RVBAR_EL3 configuration to redirect
secondary CPU reset vectors to Zephyr's image header, enabling
proper SMP initialization without firmware assistance.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2025-11-18 17:49:40 -05:00
Stephano Cetola
ce2e6f6f17 boards: waveshare: Add RP2350 Zero board support
Add initial support for the Waveshare RP2350-Zero, a low-cost,
high-performance Pico-like development board based on the Raspberry
Pi RP2350A microcontroller.

This commit introduces the board definition, devicetree files, pin
control configuration, Kconfig options, and board documentation.

The RP2350-Zero’s Arm and RISC-V cores are supported with this
port. Basic peripherals (GPIO, UART, I2C) are configured and
tested. Verified by building and running the Zephyr "hello_world"
sample on the RP2350-Zero / RP2350-One boards, and manually testing
the GPIO, I2C, PIO, and RGB LED.

Signed-off-by: Stephano Cetola <stephanoc@gmail.com>
2025-11-18 17:49:27 -05:00
John Batch
1f719acbfa boards: Infineon: kit_pse84_eval: Adding DMA support
Adds support to the kit_pse84_eval board for DMA.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-18 17:49:09 -05:00
John Batch
7bd1845b1a tests: drivers: dma: Add kit_pse84_eval test overlays
Adds overlays to enable test runs for DMA on the following tests:
 -tests/drivers/dma/chan_blen_transfer
 -tests/drivers/dma/loop_transfer

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-18 17:49:09 -05:00
John Batch
1d1e2dc140 Drivers: DMA: Infineon PSE84: Adding DMA PDL based driver for pse84
Adds Infineon Cat1 PDL based driver for DMA.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-18 17:49:09 -05:00
John Batch
6ee9976698 soc: infineon: Adding legacy hal definition to soc kconfig
Adds USE_INFINEON_LEGACY_HAL kconfig option to the PSOC6, CYW920829, and
xmc7200 series SOCs.  These devices have not transitioned to newer HAL
based drivers yet.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-18 17:49:09 -05:00
John Batch
62ca912c47 modules: hal_infineon: DMA cmake lists update
Updates DMA includes from the modules needed for DMA PDL based driver
implementation.
Cleans up cmake to use only USE_INFINEON_DMA Kconfig option to select
dma files from PDL/HAL.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-18 17:49:09 -05:00
John Batch
294fa62d93 dts: infineon: pse84: Add bindings for ifx_cat1_dma_pdl driver
Adding binding file for IFX Cat1 DMA PDL based driver implementation.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-11-18 17:49:09 -05:00
JP Hutchins
43f51cd3ed doc: mcumgr: update smp/smpclient; add smpmgr
smp & smpclient have complete, well-tested, coverage
of the spec. smpmgr application is added.

Signed-off-by: JP Hutchins <jp@intercreate.io>
2025-11-18 17:48:43 -05:00
William Tang
56fde5b3ee tests: drivers: can: timing: enable full timing test on mimxrt1180_evk
Enable the full range of CAN timing tests on the NXP mimxrt1180_evk
board cm33 core.

Signed-off-by: William Tang <william.tang@nxp.com>
2025-11-18 17:45:06 -05:00
William Tang
0c4abcdd29 drivers: can: mcux: flexcan: support Enhanced CAN Bit Timing registers
Some FlexCAN devices have enhanced bit timing registers (EPRS ENCBT EDCBT)
with extended timing configuration ranges and different behavior compared
to standard bit timing registers.

This change adds proper support for these enhanced registers, utilize full
bit timing capabilities.

Key differences for enhanced bit timing registers:
- Extended timing ranges with larger maximum values for sjw, phase_seg1,
  phase_seg2, and prescaler fields
- No propagation segment configuration support, so prop_seg must be 0
- prop_seg value is used directly without the typical 'minus 1' adjustment

The implementation adds conditional compilation based on the
`FSL_FEATURE_FLEXCAN_HAS_ENHANCED_BIT_TIMING_REG` feature flag.
For Enhanced registers, use extended timing limits and prop_seg directly.

Test this commit on mimxrt1180_evk/mimxrt1189/cm33 drivers.can.timing
test case, and enable `TEST_ALL_BITRATES` Kconfig symbol.

Signed-off-by: William Tang <william.tang@nxp.com>
2025-11-18 17:45:06 -05:00
Anas Nashif
c55d2eafff scripts: get_maintainer: file group pattern inherit top area patterns
File groups inherit file patterns from their parent area. A file will only
match a file group if it first matches the parent area's patterns, and then
also matches the file group's own patterns. This allows file groups to
further filter and subdivide files that are already covered by the area.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-18 17:44:53 -05:00
Anas Nashif
19cb7f031b scripts: set_assignee: request review from maintainers of changed areas
Also request reviewes from maintainers of changes areas in the
maintainer file.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-18 17:44:53 -05:00
Anas Nashif
616e8d6602 scripts: move set_assignee.py into scripts/ci
Scripts only used by CI, so move it into that directory.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-18 17:44:53 -05:00
Anas Nashif
1fe332de61 ci: assigner: merge maintainer check into assigner workflow
Merge two workflows into one for code sharing an efficiency.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-18 17:44:53 -05:00
Anas Nashif
d22c4dfebd MAINTAINERS file: add documentation for file groups
Document file groups and how they should be used.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-18 17:44:53 -05:00
Anas Nashif
c4b9497b3d scripts: set_assignee.py: Support file groups
Deal with new section in the maintainer file defining file groups.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-18 17:44:53 -05:00
Anas Nashif
9165fb4927 scripts: get_maintainer: support file groups
This new section allows defining a group of files in an area and makes
it possible to assign collaborators to the file group being defined.

The purpose of this new section is to allow fine tuning who is added as
reviewer when files change in a group. It is especially useful in large
areas with hundreds of files, for example platform areas.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-18 17:44:53 -05:00
Lin Yu-Cheng
c6b8128ac7 drivers: spi: add spi driver for rts5912
Add spi driver for Realtek rts5912

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-11-18 17:44:43 -05:00
Pieter De Gendt
d7f8be573b manifest: nanopb: Sync with upstream
Update the nanopb module to the latest upstream version.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-18 17:44:32 -05:00
Zhaoxiang Jin
3235a4b657 tests: cpu_freq: Enable on_demand policy test on frdm_mcxn236
Enable on_demand policy test on frdm_mcxn236

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-11-18 17:44:23 -05:00
Zhaoxiang Jin
ddf7febe4c tests: cpu_freq: on_demand: Increase WAIT_US
A low-load period that is too short (1ms) will cause
the average load to remain almost unchanged. Increase
it to 100ms.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-11-18 17:44:23 -05:00
Zhaoxiang Jin
89083803fb tests: cpu_freq: Enable cpu_freq_soc test on frdm_mcxn236
Enable cpu_freq_soc test on frdm_mcxn236

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-11-18 17:44:23 -05:00
Zhaoxiang Jin
1c6f877c71 soc: mcxn: enable p-state driver for nxp mcxn
Enable p-state driver for nxp mcxn, currently tested
on frdm-mcxn236 but should be easily extendable to
other mcxn boards.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-11-18 17:44:23 -05:00
Zhaoxiang Jin
e23f4acdb5 dts: bindings: p_state: Add bindings for NXP mcxn
1. Add p-state binding for nxp mcxn series.
2. Add p-state nodes for nxp mcxn series.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-11-18 17:44:23 -05:00
Zhaoxiang Jin
86ace20292 boards: frdm_mcxn236: Update CLKOUT source clock
Use the primary clock source FRO12M as the clock source for
CLKOUT. Compared with the secondary clock source(main clock,
the primary clock source is more stable and will not cause
timing problems of camera PCLK, HSYNC and VSYNC due to
unexpected changes.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-11-18 17:44:23 -05:00
Yong Cong Sin
a028d8fafc driver: i2c: i2c_dw: clear block mode on init
Depending on the IP's `IC_TX_CMD_BLOCK_DEFAULT` parameter, we
might have to clear the `TX_CMD_BLOCK` bit on init so that
Controller mode works.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2025-11-18 17:44:10 -05:00
Declan Snyder
687935bb68 drivers: spi_mcux_flexcomm: Abbreviate ctx
I was getting real tired of typing this out, can't believe it hasn't
already been done.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-11-18 17:42:34 -05:00
Declan Snyder
7cb3fca42e drivers: spi_mcux_flexcomm: Fix length unit mixups in DMA path
This driver had a lot of regressions introduced by commits that were
clearly mixing up what values had units of bytes and what values had
units of words. Fix the issues in the DMA path of the driver.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-11-18 17:42:34 -05:00
Declan Snyder
93b766f4f8 drivers: spi_mcux_flexcomm: Remove asserts
The asserts are hard to debug and unrecoverable, they just say kernel
panicked but difficult to realize where and why, it's better to return
an error and log message clearly from spi driver.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-11-18 17:42:34 -05:00
Declan Snyder
45cade7822 drivers: spi_mcux_flexcomm: Remove wrong assert
It is not illegal to provide an RX len with no buffer.
It just means the controller should clock out that many
words but not store them in memory. So remove the assert
and just avoid null dereference.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-11-18 17:42:34 -05:00
Declan Snyder
d3818d4365 drivers: spi_mcux_flexcomm: Refactor get_last_tx_word
Refactor this function to return an error code, instead of assert.
Put the data into a pointed argument instead.
Refactor other functions to make sure to
propogate this error all the way up the call stack.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-11-18 17:42:34 -05:00
Declan Snyder
2a7f651c1f drivers: spi_mcux_flexcomm: Skip xfer if empty
If the transfer is empty we do nothing. Avoids assert in later code
paths.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-11-18 17:42:34 -05:00
Chen Xingyu
8c8a0fe6fe boards: alientek: dnesp32s3b: Add board DNESP32S3B
DNESP32S3B is a development board from Alientek, featuring a compatible
ESP32-S3-WROOM-1-N16R8 module and rich set of on-board peripherals,
providing an out-of-the-box development experience for AIoT applications.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-11-18 17:41:09 -05:00
Andrej Butok
9e0012b313 drivers: gpio: nxp: fix gpio_mcux_lpc_configure()
- Enables Digital mode for both input and output GPIO
  pins, in gpio_mcux_lpc_configure().
- Fixes #99255

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
2025-11-18 17:38:58 -05:00
Siddhant Modi
1d2448e979 drivers: eeprom: mb85rsxx: Adding support for new product ID
This commit adds support for the 0x40 product ID
needed by the MB85RSMTA version of the chip.

Signed-off-by: Siddhant Modi <siddhant.modi@gmail.com>
2025-11-18 17:38:39 -05:00
Yong Cong Sin
3c5807f6ec arch: riscv: stacktrace: support stacktrace in early system init
Add support for stacktrace in dummy thread which is used to run
the early system initialization code before the kernel switches
to the main thread.

On RISC-V, the dummy thread will be running temporarily on the
interrupt stack, but currently we do not initialize the stack
info for the dummy thread, hence check the address against the
interrupt stack.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2025-11-18 17:38:22 -05:00
Yong Cong Sin
4f5f42fa69 kernel: thread: constify thread arg of read-only functions
Since these helper functions are read-only, mark the `thread`
arg as `const` so that we can pass const thread to it without
triggering warnings.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2025-11-18 17:38:22 -05:00
Pisit Sawangvonganan
489b8a386c drivers: gpio_stm32: consolidate *pincfg writes
Use a local accumulator (`cfg`) to build the pin configuration and commit
it to `*pincfg` only once. This keeps intermediate values in registers,
reduces RAM write traffic.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2025-11-18 17:36:49 -05:00
Stanislav Bobokalo
0786873a4c dts: ra6: fix typo in pinctrl node name
Correct a typo in the pinctrl node name to maintain consistent naming
across the RA family.

Signed-off-by: Stanislav Bobokalo <stanislav.b@embedd.it>
2025-11-18 17:36:30 -05:00
Alberto Escolar Piedras
612ae54950 boards/native nrf54lm20bsim: Remove experimental warning
This simulated board has been there for more than 5 months.
The real board (nrf54lm20dk) is properly supported and in the market.
So there is no need to have this warning anymore.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-18 17:36:18 -05:00
Aleksandr Khromykh
613d228002 bluetooth: mesh: update max oob size till 32 bytes
Commit updates maximum OOB authentication size from 8 bytes
till 32 bytes according to specification errata ES-27446.
Since previous OOB API does not allow to expose OOB values
with such width the new API has been introduced.
The previous API was deprecated and hidden under
BT_MESH_PROV_OOB_API_LEGACY option and left for backward
compatibility with existing code base.

Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
2025-11-18 10:48:18 -05:00
Aleksandr Khromykh
6bf8409e39 bluetooth: mesh: adjust adv stack dependency and size
Commit removes legacy dependancy on Host crypto.
Additionally, it adapts advertiser stack size if
provisioner feature has been enabled (tested with
mesh_shell and thread analyzer).

Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
2025-11-18 10:48:18 -05:00
Aleksandr Khromykh
8b2e37f0e2 bluetooth: mesh: prevent getting wrong authentication size
Commit moves SHA256 authentication size under SHA256 macro.

Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
2025-11-18 10:48:18 -05:00
Aleksandr Khromykh
760d190723 bluetooth: mesh: zeroing not used part of auth array
Commit set zero to not used part of authentication array
to prevent garbage from the previous provisioning using.

Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
2025-11-18 10:48:18 -05:00
Aleksandr Khromykh
666950efff bluetooth: mesh: improve oob size checking
Commit improves oob size checking to catch wrong size
as early as possible and prevents zero size.

Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
2025-11-18 10:48:18 -05:00
Frode van der Meeren
48f82d1e34 tests: bluetooth: tester: Fix VCS tests
Zephyr automatically sets the persisted flag for VCS if the volume is
changed after the service is registered. As some of these PTS tests
require a set volume with the flag cleared, the initial volume needs to
be set before registering VCS.

Signed-off-by: Frode van der Meeren <frode.vandermeeren@nordicsemi.no>
2025-11-18 10:48:01 -05:00
Piotr Kosycarz
0d1f73b6fd boards: nordic: nrf54lm20dk: enable debugging for flpr
Use specific jlink device for app and flpr core.
This will enable flpr core debugging.

Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
2025-11-18 10:47:48 -05:00
Seppo Takalo
0364ef4965 MAINTAINERS: Add Seppo Takalo as collaborator for modem area
I'm working at Nordic Semiconductor in a team that is developing the
Serial Modem application for nRF91 and I have spend significant amount
of time for studying the CMUX protocol to implement the power saving
mechanism for it and submitted it here.

I therefore have quite a good understanding of the Zephyr's modem
subsystem.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-11-18 10:47:35 -05:00
Ayush Singh
9f4a0153b8 dts: arm64: ti: ti_am62x_a53: Use GPIO Proxy
After trying out a few different approaches, I think having separate
nodes for each bank in devicetree and having a GPIO proxy node for the
controller is the best solution right now.

To be more specific, GPIO proxy solution still allows for bank level
GPIO toggling. The linux kernel GPIO davinci driver is currently limited
to single pin operations. This might not be a problem in Linux, but I
feel like embedded systems would prefer having support for bank level
operations.

This also does not pose a problem for the future implementation of
interrupts due to that fact that the interrupt router is separate device
and will require a separate driver. In fact, the GPIO interrupt router
is shared between main_gpio0 and main_gpio1.

This patch also reverts the previous bank offset related work on GPIO
davinci driver.

The patch has been tested on PocketBeagle 2.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-11-18 10:47:20 -05:00
Fin Maaß
4670a6a6ec boards: litex: add missing netif:eth to supported
add missing netif:eth to supported for litex board.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-11-18 10:47:12 -05:00
Jamie McCrae
2e54630612 mgmt: mcumgr: grp: img_mgmt: Add support for up to 8 images
Adds slot/image information for using up to 8 images on a device

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-18 10:46:40 -05:00
Jamie McCrae
764b61f306 dfu: boot: mcuboot: Add support for up to 8 images
Adds slot/image information for using up to 8 images on a device

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-18 10:46:40 -05:00
Jukka Rissanen
d164f8b55d lib: posix: Add shim for getopt API
Allow user to use the new sys_getopt API via the old non-Posix
compliant getopt API. This is a temporary solution and the shim
will be deprecated and eventually removed at some point.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-18 10:46:29 -05:00
Jukka Rissanen
22f9ef0a33 sys: getopt: Rename getopt to sys_getopt to avoid conflicts with Posix
Summary:

As Zephyr getopt is not really compatible with Posix getopt, rename
Zephyr getopt to sys_getopt.

Background:

Zephyr getopt module was introduced in #31356 to be used by the shell.
Zephyr's getopt is not the standard one. It has multiple APIs which make
it more suited for a system like Zephyr where different components may
want to use it for different purposes. Including APIs to init it,
get and set its internal state etc.
Several Zephyr modules (shell, net, wifi, ztest) use this getopt with
these special APIs. The getopt module is bundled in the POSIX
compatibility API subsystem (CONFIG_POSIX_C_LIB_EXT).

Problem description:

As it is not the standard getopt(), no C library can possibly provide
a Zephyr compatible version (even if such C library were to provide a
standard getopt()). As it is bundled in Zephyr's POSIX API in
CONFIG_POSIX_C_LIB_EXT), multiple components that depend on it are
selecting CONFIG_POSIX_C_LIB_EXT. Zephyr core components should not
depend on the POSIX API in this way.

Changes done in this commit:

Rename the getopt*() APIs to sys_getopt*() and move them into a module
under lib/utils with its own Kconfig option to enable it.
Zephyr's users are changed to use this new component.
The POSIX subsystem can continue providing getopt() by calling the new
sys_getopt() and in that way retain backwards compatibility for external
users.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-18 10:46:29 -05:00
Vladislav Kulikov
a2f057da97 MAINTAINERS: add vlad-kulikov as SMF maintainer
This is a follow-up to @keith-zephyr’s note that SMF is looking for a
new maintainer:
https://github.com/zephyrproject-rtos/zephyr/pull/97943#issuecomment-3439589314

I am proposing this shortly after getting collaborator only
because there is an active search and I am already working in SMF
(source-level changes, SMF-related RFCs, and improving the
sibling-transition path to make the common transition at least
~30% faster). If there were no open need, I would have waited longer
before proposing this.

Signed-off-by: Vladislav Kulikov <vlad_kulikov_c@pm.me>
2025-11-18 10:46:09 -05:00
Emil Gydesen
1c51cbfb52 tests: Bluetooth: Tester: Decrease BSIM UART poll timeout
Modify the timeout from 10ms to 100us. The reason for this
is that the UART can only hold 4 octets at a time, which
cases events larger than 4 octets to require multiple
timeout before the entire event can be sent.

This solution is mostly a workaround and has the purpose
of increasing the performance and help prevent the tests
from failing due to the low speed caused by this. A
proper solution would likely be to switch to the async UART
API instead.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-18 10:45:41 -05:00
Emil Gydesen
42ad1a3821 tests: Bluetooth: Tester: Increase ISO buffers
The ISO buffers defaults to 1, but since there are
risks that the ISO RX events cannot be sent to
the upper tester via UART before the next RX,
the RX is increased. This also allows to better
support cases where the ISO interval is larger than
the SDU interval.
The ISO TX buffers are similarly increase to help
prevent cases where a TX isn't scheduled.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-18 10:45:41 -05:00
Tahsin Mutlugun
7d58e14261 boards: adi: Add full names for MAX32 boards that were missing them
Add missing `full_name` entries for MAX32657EVKIT and MAX32658EVKIT
in their respective board.yml files.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-11-18 10:45:15 -05:00
Sebastian Głąb
87d15bb2be samples: boards: nordic: spis_wakeup: Run sample on APP+PPR
Extend sample with possibility to use PPR core instead of Radio core.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 08:17:20 -05:00
Seppo Takalo
1d9947188d drivers: modem_cellular: Update nRF91 Serial Modem PPP script
nRF91 Serial Modem application does not anymore start PPP automatically.
Update initialization script to request it.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-11-18 08:13:09 -05:00
Tomi Fontanilles
fe0c6bc773 MAINTAINERS: add tomi-font as TF-M maintainer
Upgrade from collaborator to maintainer as suggested in
https://github.com/zephyrproject-rtos/zephyr/pull/99161#issuecomment-3521814531.

Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
2025-11-18 08:12:57 -05:00
Nicholas Lowell
e6d1941c30 shell / logging: shell log backend output Kconfig
Gives access to all log output format flag configurations
for shell backend.

shell log backend doesn't use log_backend_std_get_flags()
and it's debateable if it should, so give it its own fullly
configurable format set for maximum backend bandwidth control

Signed-off-by: Nicholas Lowell <Nicholas.Lowell@lexmark.com>
2025-11-18 08:12:38 -05:00
Jakub Klimczak
3c4277391a zvfs: Remove test for static initialization of stdin, stdout, stderr
This removes a function that created a new mutex and conditional variable
and used memcpy() to compare them with ones in a given fdtable entry.
Since those struct members are initialized statically, this test doesn't
serve much of a purpose anymore. Moreover, padding bytes inside structs
are technically not required to be zero, so these memcpy() calls caused
SonarQube to complain.

Signed-off-by: Jakub Klimczak <jklimczak@internships.antmicro.com>
2025-11-18 08:12:19 -05:00
Jakub Klimczak
f16f3f641e zvfs: Move fdtable into ZVFS
The file descriptor table is used in every area that expects to work on
files through descriptor indices. It can only be operated on through
functions whose names indicate a relationship with ZVFS (`zvfs_*fd*`).
The integer file descriptor mechanism shouldn't be separate from ZVFS.
This will make cooperation between different file access APIs much
simpler. This commit also makes preparations for the fdtable becoming
optional.

Signed-off-by: Jakub Klimczak <jklimczak@internships.antmicro.com>
2025-11-18 08:12:19 -05:00
Jakub Klimczak
735f0d7363 zvfs: Move file operations from POSIX into ZVFS
This commit moves all operations on single files into ZVFS and makes the
POSIX subsystem call into ZVFS to perform them. It was necessary to define
a `struct zvfs_stat` to avoid a dependency cycle. Functions used
internally for file i/o operations are publicised since they won't require
any changes between various subsystems. This allows ZVFS to actually
fulfill its purpose of facilitating cooperation of different file APIs.

Signed-off-by: Jakub Klimczak <jklimczak@internships.antmicro.com>
2025-11-18 08:12:19 -05:00
Alexander Svensen
52f2686de6 tests: bluetooth: tester: CSIS: Add more commands
- Add command for setting the set size
- Add command for setting the SIRK
- Allows the following tests to pass:
 - CSIS/SR/CN/BV-01-C
 - CSIS/SR/CN/BV-02-C
 - CSIS/SR/CN/BV-03-C
 - CSIS/SR/CN/BV-04-C

Signed-off-by: Alexander Svensen <alexander.svensen@nordicsemi.no>
2025-11-18 08:12:06 -05:00
Alexander Svensen
fa8c244313 Bluetooth: Audio: CSIS: Check all pending notifications
- When a bonded device is reconnected, check flags for pending
  notifications for:
 - Lock
 - SIRK
 - Size

Previously only lock was checked

Signed-off-by: Alexander Svensen <alexander.svensen@nordicsemi.no>
2025-11-18 08:12:06 -05:00
Jordan Yates
f8f43c411e lib: net_buf: usage helper functions
Add helper functions for querying the internal fields of
`struct net_buf_pool` when `CONFIG_NET_BUF_POOL_USAGE` is enabled.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-18 08:11:56 -05:00
Charles Dias
394b49de28 boards: st: stm32u5g9j_dk1: Enable STTS22H and add ambient-temp alias
Add STTS22H node at I2C3 with node label stts22h_temperature
and add ambient-temp alias.

Signed-off-by: Charles Dias <charlesdias.cd@outlook.com>
2025-11-18 08:11:42 -05:00
Simon Maurer
c7fc608633 drivers: i2c: i2c_xilinx_axi: switch to DEVICE_MMIO API
Switch the Xilinx AXI I2C device driver to use the DEVICE_MMIO_...
macros instead of directly using the physical base address from the
device tree. This allows the driver to work on SoCs with an MMU,
such as the Zynq-7000.

Signed-off-by: Simon Maurer <mail@maurer.systems>
2025-11-18 08:11:16 -05:00
Tamas Jozsi
9ebf508e5f boards: arduino: add ADC support for the Nano Matter
Adds ADC capability to the A0-A7 pins on the board.

Signed-off-by: Tamas Jozsi <tamas.jozsi@silabs.com>
2025-11-18 08:11:01 -05:00
Henrik Brix Andersen
3cba0beef6 logging: mark custom header inclusion as experimental
Mark the custom logging header support as experimental.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2025-11-18 08:10:51 -05:00
Henrik Brix Andersen
a4a173b43d shell: mark custom header inclusion as experimental
Mark the custom shell header support as experimental.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2025-11-18 08:10:51 -05:00
Tamas Jozsi
2accdbe9e8 boards: seeed: add ADC support for the XIAO MG24
ADC pins are now mapped to the A0-A6 pins.

Signed-off-by: Tamas Jozsi <tamas.jozsi@silabs.com>
2025-11-18 08:10:31 -05:00
Tamas Jozsi
c008c1e5f6 boards: sparkfun: add ADC support for the ThingPlus MGM240P
ADC pins are now mapped to the A0-A7 pins.

Signed-off-by: Tamas Jozsi <tamas.jozsi@silabs.com>
2025-11-18 08:10:31 -05:00
Abderrahmane JARMOUNI
93586972be MAINTAINERS: Add JarmouniA as Display maintainer
Take on the maintainership of the Display area that have
been unmaintained for some time now.
This will allow me to be in the right position to push
for much needed reworks & improvements in this area.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-11-18 08:10:21 -05:00
Muhammed Asif
11527f216b boards: microchip: add PIC32CX SG41 Curiosity Ultra Evaluation Kit support
Add initial support for the Microchip PIC32CX SG41 Curiosity Ultra board

Product page: https://www.microchip.com/en-us/development-tool/EV06X38A

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-11-18 08:10:13 -05:00
Tomi Fontanilles
ea6a99a697 MAINTAINERS: add valeriosetti and tomi-font as mbedtls maintainers
We have both been active contributors in this area for some time.
Considering the current maintainers are not very active and not always
responsive, step up to help better maintain this area.

Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
2025-11-18 08:10:01 -05:00
Jamie McCrae
cebdb0d1ec cmake: modules: boards: Fix board moved check
Fixes checking for board folders that have moved by checking if
the BOARD_DIR variable is already set (i.e. loaded from cache)

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-18 08:09:49 -05:00
Peter van der Perk
7f0d2088a6 imx95: Enable FlexIO Cortex-M7 SOC
Adds FlexIO DTS definitions for imx95 cortex-m7 to use flexio driver.

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-11-18 08:09:36 -05:00
Jamie McCrae
09d520cbd0 drivers: i2c: i2c_nrfx_twi: Fix not guarding deinit function
Fixes an issue with an unused function being defined if
CONFIG_DEVICE_DEINIT_SUPPORT was disabled

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-18 08:09:24 -05:00
Jamie McCrae
828183f45a drivers: spi: spi_nrfx_spim: Fix not guarding deinit function
Fixes an issue with an unused function being defined if
CONFIG_DEVICE_DEINIT_SUPPORT was disabled

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-18 08:09:24 -05:00
Jamie McCrae
6a07d96b5f drivers: serial: uart_nrfx_uarte: Fix not guarding deinit function
Fixes an issue with an unused function being defined if
CONFIG_DEVICE_DEINIT_SUPPORT was disabled

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-18 08:09:24 -05:00
Mathieu Choplain
173454802b soc: st: stm32: allow disabling ENABLE_DEBUG_SLEEP_STOP when DEBUG=y
Use an override-able 'default' for CONFIG_STM32_ENABLE_DEBUG_SLEEP_STOP
rather than forcefully 'select'ing the symbol when CONFIG_DEBUG=y, as
there are situations where one might want CONFIG_DEBUG=y without inhibiting
low-power mode entry.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-18 08:09:00 -05:00
Fabian Blatz
99a8cf59b8 shell: Fix method name typo
Fix issue where method names contained bacskpace instead of backspace.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2025-11-18 08:08:40 -05:00
Benjamin Cabé
d306473464 doc: build: fix typo in zephyr_cmake_package.rst
Corrected "This is means" to "This means"

Fixes zephyrproject-rtos/zephyr#98714

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-18 08:08:28 -05:00
Tomasz Moń
f22e6a8818 dts: vendor: nordic: nrf54h: add missing newline
Add missing newline found by dts-linter. The missing newline is failing
CI for any change that modifies nrf54h20.dtsi.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-11-18 08:08:08 -05:00
Martin Lampacher
dece6f91e6 doc: ztest: add a note about host restrictions for unit testing
Running unit tests on macOS or Windows is currently not supported due to
fundamental differences in the architectures. Added a note in the
"Quick start - Unit testing" section about this restriction.

Signed-off-by: Martin Lampacher <martin.lampacher@gmail.com>
2025-11-18 11:24:17 +01:00
Mathieu Choplain
acbc86a738 llext: linker: use INFO type instead of COPY
COPY and INFO are different names for the same Output Section Type,
but the latter is easier to understand in the context we are using it.

Replace COPY with INFO in the LLEXT linker script snippet.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-18 11:23:55 +01:00
Daniel Leung
2bfb7e403d x86: ruff format on gen_mmu.py
Format gen_mmu.py via ruff.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-18 11:22:46 +01:00
Daniel Leung
39ed039155 x86: fix ruff issues on gen_mmu.py
Fixes issues found by ruff on gen_mmu.py.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-18 11:22:46 +01:00
Daniel Leung
c19ff1c199 x86: ruff format on gen_idt.py
Format gen_idt.py via ruff.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-18 11:22:46 +01:00
Daniel Leung
b52b6716f6 x86: fix ruff issues on gen_idt.py
Fixes issues found by ruff on gen_idt.py.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-18 11:22:46 +01:00
Daniel Leung
6b0ac6e30b x86: ruff format on gen_gdt.py
Format gen_gdt.py via ruff.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-18 11:22:46 +01:00
Daniel Leung
9b7471277a x86: fix ruff issues on gen_gdt.py
Fixes issues found by ruff on gen_gdt.py.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-18 11:22:46 +01:00
Josh DeWitt
0dc2e0c38f soc: nordic: Gate FLASH_0 MPU region on CONFIG_XIP
Only include a flash MPU region if CONFIG_XIP is set, similar to
arm/core/mpu/arm_mpu_regions.c.

Signed-off-by: Josh DeWitt <josh.dewitt@garmin.com>
2025-11-18 11:22:36 +01:00
Pete Johanson
fbf04aa1c8 drivers: adc: shell: add support for ADI AD7124 ADCs
Include the correct compatible for the ADI AD7124 family of ADCs.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2025-11-18 11:22:06 +01:00
Sebastian Głąb
80a00b818d tests: drivers: watchdog: wdt_basic_api: Run test on nrf54l15 NS
Enable wdt_basic_api test on nrf54l15dk/nrf54l15/cpuapp/ns platform.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
cfe1ffa501 tests: boards: nrf: i2c: i2c_slave: Move tests DTS files
Move DTS overlay files that modify test configuration
from boards sub-directory to the main application directory.
There is no 'i2c_speed_fast' board.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
55f9d2c82c tests: boards: nrf: i2c: i2c_slave: Run test on nrf54l15 NS
Enable i2c_slave test on nrf54l15dk/nrf54l15/cpuapp/ns platform.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
5501999078 tests: boards: nrf: i2c: i2c_slave: Fix DTS formatting
Add reqired empty line as indicated by the compliance check.
Add License header.
Add information about GPIO loopbacks used by the test.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
89723c18f9 tests: drivers: counter: counter_basic_api: Fix test on nrf54l15 NS
Add DTS overlay required to pass the test.
Test filter is meet for nrf54l15 NS platform.
However, test fails due to missing node configuration.

Fix the counter test on nrf54l15dk/nrf54l15/cpuapp/ns platform.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
c359c4440a tests: drivers: spi: spi_controller_peripheral: Move test overlays
Overlay files that modify test configuration shall be stored
in the main application directory.
There is no board with f.e. '1mhz' name.

Move test overlays from boards sub-direcotry to the main
application directory.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
3a7afe31ed tests: drivers: spi: spi_controller_peripheral: Fix DTS formatting
Fix DTS overlay file formatting as requested by
the compliance check.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
399c0a9282 tests: drivers: spi: Run spi_controller_peripheral on nrf54l15 NS
Enable spi_controller_peripheral test on
nrf54l15dk/nrf54l15/cpuapp/ns platform.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
4689b29e85 tests: drivers: adc: Run test on nrf54l15 NS
Enable adc_api test on nrf54l15dk/nrf54l15/cpuapp/ns platform.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
e761ba1950 tests: boards: nrf: qdec: Run test on nrf54l15 NS
Enable QDEC test on nrf54l15dk/nrf54l15/cpuapp/ns platform.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
8a01e8d755 tests: drivers: sensor: temp_sensor: Run test on nrf54l15 NS
Enable temp_senor test on nrf54l15dk/nrf54l15/cpuapp/ns platform.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
2a0b1d258d tests: drivers: pwm: Run test on nrf54l15 NS
Enable pwm_gpio_loopback test on
nrf54l15dk/nrf54l15/cpuapp/ns platform.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
ef3a97acd7 boards: nordic: nrf54l15dk: Sort supported fetures
Sort alphabetically supported features on
- nrf54l15dk/nrf54l15/cpuapp,
- nrf54l15dk/nrf54l15/cpuapp/ns,
platforms.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
539b5b5238 tests: drivers: i2s: Run I2S tests on nrf54l15 NS
Enable I2S tests on nrf54l15dk/nrf54l15/cpuapp/ns platform.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
69fa00dc79 tests: drivers: timer: nrf_grtc_timer: Run test on nrf54l15 NS
Enable nrf_grtc_timer test on nrf54l15dk/nrf54l15/cpuapp/ns platform.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
26562e6b73 tests: drivers: gpio: gpio_basic_api: Run test on nrf54l15 NS
Enable gpio_basic_api test on nrf54l15dk/nrf54l15/cpuapp/ns platform.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
2e685e59d7 tests: drivers: clock_control: Enable tests on nrf54l15 NS
Enable clock control tests on nrf54l15dk/nrf54l15/cpuapp/ns platform.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
07d4577762 tests: drivers: comparator: Enable test on nrf54l15 NS
Add overlays required to run the gpio_loopback test on
nrf54l15dk/nrf54l15/cpuapp/ns platform.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Sebastian Głąb
eb41b8243c tests: drivers: uart: uart_async_api: Fix test on nrf54l15 NS
drivers.uart.async_api filter is meet on nrf54l15 NS platform.
However, overlay file is needed to configure uart peripheral.

Add overlay required to pass uart_async_api test.

Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
2025-11-18 11:21:48 +01:00
Mario Paja
4727f602da drivers: i2s: stm32 sai add sai disable function
This change introduces sai disable at the end of stream or
in an event of an error. It disables SD, FS and SCK.

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-11-18 11:20:42 +01:00
Alexander Kozhinov
881c5b5571 samples: drivers: opamp: output_measure
prj.conf:
	enable logging
	add log buffer size and debug options and comment them

main.c:
	show gain value at runtime as a starting
	use ADC calibration before conversion

README.rst:
	update with sample gain prints

Signed-off-by: Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
2025-11-18 11:19:59 +01:00
Alexander Kozhinov
f57d15c727 dts: bindings: opamp: opamp-controller.yaml
make functional mode required
add functional modes description with circuit examples

Signed-off-by: Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
2025-11-18 11:19:59 +01:00
Alexander Kozhinov
adeb0711ba dts: arm: nxp: opamp functional mode
set the default functional mode of OPAMP peripherals to "follower"

Signed-off-by: Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
2025-11-18 11:19:59 +01:00
Charles Dias
e396e2a180 boards: shields: st: enable the touch input on st_lcd_dsi_mb1835
Add devicetree and configuration for the touch controller on
STM32U5G9J-DK1 and st_lcd_dsi_mb1835 shield.

Signed-off-by: Charles Dias <charlesdias.cd@outlook.com>
2025-11-18 11:18:41 +01:00
Armando Visconti
a920a8b966 modules/hal_st: Align to stmemsc HAL i/f v2.11.1
Align all sensor drivers that are using stmemsc (STdC) HAL i/f
to new APIs of stmemsc v2.11.1

Requires https://github.com/zephyrproject-rtos/hal_st/pull/27

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2025-11-18 11:17:41 +01:00
Yangbo Lu
b8e80ca42d tests: sd: sdmmc: use zephyr,sdmmc-disk as test filter
Used zephyr,sdmmc-disk as test filter instead of sdhc0
for platforms which indeed had SD card.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-11-18 11:14:36 +01:00
Mark Wang
3daddb836f drivers: usb: udc: mcux: force ehci speep as FS
When CONFIG_UDC_DRIVER_HIGH_SPEED_SUPPORT_ENABLED is disabled, force
configure ehci controller to work as FS.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
2025-11-17 16:42:27 -05:00
Dylan Philpot
87cc32f64b soc: add soc defines for g1518/g3518
The SOC config defines were missing for these subset
devices.

Signed-off-by: Dylan Philpot <d-philpot@ti.com>
2025-11-17 16:41:36 -05:00
Anas Nashif
da73b6c30e tests: posix: xsi_realtime: add missing includes
Add missing includes to test.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-17 16:41:16 -05:00
Jukka Rissanen
1380739f25 tests: net: all: Add more compilation support
Make sure we test coap client/server, MQTT SN, telnet and
logging network backend when testing all network options.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
ddf17adc93 log: backend: net: Remove Posix dependency
The network backend needs nothing from Posix so remove the
dependency.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
55457ee4b8 net: zperf: Change old code to pass compliance checker
Compliance checker complains

   TYPO_SPELLING: 'in in' may be misspelled - perhaps 'is in'?

for code like this

   static struct net_sockaddr_in in_addr_my = {

so change the variable to ipv4_addr_my. Similar change is
done for IPv6 variables for consistency.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
b626c83d45 tests: net: socket: tls_configurations: err variable might be unused
Mark the err variable as possibly unsed depending on the enabled
config options.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
13d84b136e tests: net: Add relevant Posix headers for networking
We need certain network related Posix header files so that the
network tests using Posix symbols compiles ok.
Previously the Posix symbols were introduced by network stack
automatically, but that is no longer the case.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
ac859d0e77 samples: net: Add relevant Posix headers for networking
We need certain network related Posix header files so that the
network sample compiles ok. Previously the Posix symbols were
introduced by network stack automatically even if user had not
enabled Posix, but that is no longer the case.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
2fd14905ff lib: posix: net: Add support for namespaced network symbols
Use namespaced network symbols in order to avoid circular dependency
between Posix and network subsystems.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
6c18fd348c net: sockets: Remove Posix header file includes
Do not include Posix header files inside network stack as we should
not depend on Posix symbols in net stack.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
354e117192 net: socket: Network should not include any Posix header
Removing Posix header inclusion as networking APIs and code should
be self contained now.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
55c49cdb8f net: Convert wifi drivers to use renamed network APIs
Rename network symbols in wifi drivers to use the renamed
network APIs.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
bf5af88589 net: Convert usb drivers to use renamed network APIs
Rename network symbols in usb drivers to use the renamed network APIs.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
b5588ed684 net: Convert modem drivers to use renamed network APIs
Rename network symbols in modem drivers to use the renamed
network APIs.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
985d1c0351 net: Convert IEEE 802.15.4 drivers to use renamed network APIs
Rename network symbols in IEEE 802.15.4 drivers to use the renamed
network APIs.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
e6daacf3c9 net: Convert Ethernet drivers to use renamed network APIs
Rename network symbols in Ethernet drivers to use the renamed network APIs.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
d67611a908 net: Convert network drivers to use renamed network APIs
Rename network symbols in net drivers to use the renamed network APIs.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
d45cd6716b net: Convert network codebase to use renamed network APIs
Rename network symbols in network stack to use the renamed network APIs.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
33ac14a764 modules: openthread: Remove SOCK_NONBLOCK as it is not supported
There is no SOCK_NONBLOCK support in zephyr so remove the option.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Jukka Rissanen
a63dbfb6cc net: Namespace network symbols to avoid conflicts with Posix/libc
Rename network symbols i.e., add net_, NET_ or ZSOCK_ prefixes
to those network symbols that can be found in Posix or libc.
This way we can avoid circular dependency issues.

Add also a compatibility header file that allows user to continue
use various network APIs without adding either net_, NET_ or ZSOCK_
prefixes.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-17 14:01:32 -05:00
Mathieu Choplain
f0b8d94590 soc: st: stm32: move POWEROFF entry sequence to common code
Move the architecture-specific (but implementation dependent!) code which
performs entry in poweroff state (Shutdown/Standby without retention) to
a common implementation shared by all STM32 SoC series. This is a first
step and could be further refined at a later time; eventually, a unified
z_sys_poweroff() implementation may even be possible.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-17 13:59:31 -05:00
Sean Kyer
830bc4f13a doc: release: Add Bluetooth ANS service to 4.4 release notes
Add Alert Notification Service (ANS) and enabling Kconfig
to 4.4 release notes.

Signed-off-by: Sean Kyer <sean.actor@gmail.com>
2025-11-17 13:49:22 -05:00
Sean Kyer
05634c3d6c bluetooth: ANS: Add Alert Notification Service
Add alert notification service (ANS) to Bluetooth
subsystem and accompanying sample.

Signed-off-by: Sean Kyer <sean.actor@gmail.com>
2025-11-17 13:49:22 -05:00
Richard Skriwanek
4d6dd7c6a0 samples: basic: blinky_pwm: add nucleo_u385rg_q
The blinky_pwm test was not available for the nucleo_u385rg_q board.
Added the board overlay to the blinky_pwm sample.

Signed-off-by: Richard Skriwanek <richy@fnc.at>
2025-11-17 13:48:31 -05:00
Richard Skriwanek
b2578a2b87 tests: drivers: counter: counter_basic_api: add nucleo_u385rg_q
Counters API test were not available for the nucleo_u385rg_q board.
Added the nucleo_u385rg_q board overlay to the
counter_basic_api test.

Signed-off-by: Richard Skriwanek <richy@fnc.at>
2025-11-17 13:48:31 -05:00
Richard Skriwanek
cc24cea895 tests: drivers: pwm: pwm_api: add nucleo_u385rg_q
PWM API test were not available for the nucleo_u385rg_q board.
Added the nucleo_u385rg_q board overlay to the pwm_api test.

Signed-off-by: Richard Skriwanek <richy@fnc.at>
2025-11-17 13:48:31 -05:00
Richard Skriwanek
851a7fa1d0 boards: st: nucleo_u385rg_q: add PWM LEDs
The nucleo_u385rg_q board had no pwm-led defined.
Added the relevant led and timer definitions.
Additionally the pwm and counter are added
to supported functions.

Signed-off-by: Richard Skriwanek <richy@fnc.at>
2025-11-17 13:48:31 -05:00
Richard Skriwanek
1f84b6c651 dts: arm: st: stm32u3: define timer nodes
The dtsi file for STM32U3 was missing the timer definitions.
Fixed by adding all missing timers.

Signed-off-by: Richard Skriwanek <richy@fnc.at>
2025-11-17 13:48:31 -05:00
Richard Skriwanek
ffa8d6cacf drivers: clock_control: stm32: fix configuration for stm32u3
A change was introduced in how stm32 timers clocks are defined
to have multiple clock definitions.
This change was not handled in the stm32u3 series driver
(which had no timers defined in the dts at all).
This fix ports the required code to the stm32u3 mcu.

Signed-off-by: Richard Skriwanek <richy@fnc.at>
2025-11-17 13:48:31 -05:00
Josuah Demangeon
30950b888d style: drivers: sort Kconfig and CMake includes
Use the "zephyr-keep-sorted-start/stop" comment to have CI check
the alphabetical order of includes, to help reducing the chance
of conflicts while contributing drivers.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Josuah Demangeon
0c4ab40921 style: share: apply coding style on CMakeLists.txt files
Apply the CMake style guidelines to CMakeList.txt files in share/.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Josuah Demangeon
f1101b7c7a style: modules: apply coding style on CMakeLists.txt files
Apply the CMake style guidelines to CMakeList.txt files in modules/.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Josuah Demangeon
23662f1e5d style: soc: apply coding style on CMakeLists.txt files
Apply the CMake style guidelines to CMakeList.txt files in soc/.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Josuah Demangeon
e6e7fc549e style: tests: apply coding style on CMakeLists.txt files
Apply the CMake style guidelines to CMakeList.txt files in tests/.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Josuah Demangeon
a62dd577bd style: samples: apply coding style on CMakeLists.txt files
Apply the CMake style guidelines to CMakeList.txt files in samples/.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Josuah Demangeon
9bd94fab14 style: subsys: apply coding style on CMakeLists.txt files
Apply the CMake style guidelines to CMakeList.txt files in subsys/.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Josuah Demangeon
1b87ec87ef style: drivers: apply coding style on CMakeLists.txt files
Apply the CMake style guidelines to CMakeList.txt files in drivers/.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Josuah Demangeon
bf9c3b150d style: cmake: apply coding style on CMakeLists.txt files
Apply the CMake style guidelines to all CMakeList.txt files in cmake/.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Josuah Demangeon
42a0111133 style: arch: apply coding style on CMakeLists.txt files
Apply the CMake style guidelines to all CMakeList.txt files in arch/.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Josuah Demangeon
ccbc21bb32 style: boards: apply CMakeLists.txt coding style
Apply the CMake style guidelines to all CMakeList.txt files in boards/.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-11-17 13:48:03 -05:00
Zhijie Zhong
ad33607fbc tests: Bluetooth: Add deinit for resource cleanup in unicast tests
call unregister func, Mark TODO for additional cleanup.

Signed-off-by: Zhijie Zhong <zhongzhijie1@xiaomi.com>
2025-11-17 13:46:47 -05:00
Zhijie Zhong
c222dcff8c bluetooth: host: Add bt_gatt_cb_unregister() to unregister GATT callbacks
New API bt_gatt_cb_unregister, use _SAFE iteration for callback list.

Signed-off-by: Zhijie Zhong <zhongzhijie1@xiaomi.com>
2025-11-17 13:46:47 -05:00
Etienne Carriere
1b89002e9c boards: st: fix typos in board doc on M4 related variant
Correct build instruction targeting Cortex-M4 build in ST boards
where a 'm4' variant is needed to build a Zephyr application for the
Cortex-M4 core.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-17 13:46:11 -05:00
Etienne Carriere
7b17c7fbc4 boards: st: nucleo_n657x0_q: add missing empty line
Add missing empty line in nucleo_n657x0_q board documentation.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-17 13:46:11 -05:00
Etienne Carriere
fa0b9d164a boards: st: stm32h745i_disco: reword UM to User Manual in documentation
Reword UM to plain User Manual in stm32h745i_disco board documentation.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-17 13:46:11 -05:00
Etienne Carriere
da75727947 boards: st: stm32h7s78_dk: fix user manual link
Correct link to stm32h7s78_dk board user manual in board documentation.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-17 13:46:11 -05:00
Etienne Carriere
be2b2e71f0 boards: st: stm32h573i_dk: fix user manual link
Correct link to stm32h573i_dk board user manual in board documentation.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-17 13:46:11 -05:00
Lyle Zhu
6c83b9bc04 Bluetooth: Classic: HFP_HF: Register SCO connect callback
There is an issue that the SCO connect cannot be un-referenced by HFP
HF when the SCO connection is broken if the SCO connect is not created
by HFP HF.

Register SCO connect change callback. And un-reference the SCO connect
in SCO disconnected callback.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-17 10:59:10 -05:00
Lyle Zhu
3d8dfd7af7 Bluetooth: Classic: HFP_AG: Compatible old version HF
In current implementation, the HF with old version cannot be
supported properly.
Such as, if the AG is version 0.96, the AT command `AT+BRSF` will not
be sent. It causes the AG cannot know the features of HF.

Compatible old version with the following changes,

Discover the HF SDP record to get the profile version and HF features.
If the SDP discovery is failed, break the RFCOMM DLC connection.

If the AG version is v0.96, update the HF features according to the
discovered HF features.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-17 10:59:10 -05:00
Lyle Zhu
477b3ddd0c Bluetooth: Classic: HFP_HF: Compatible old version AG
In current implementation, the AG with old version cannot be
supported properly.
Such as, if the AG is version 0.96, the AT command `AT+BRSF` should
not be sent.
And if the AG is no newer than version 1.5, the `Codec Negotiation`
should be unsupported.

Compatible old version with the following changes,

Discover the AG SDP record to get the profile version and AG
features. If the SDP discovery is failed, break the RFCOMM DLC
connection.

If the AG version is v0.96, do not send AT command `AT+BRSF`.

Create SCO connection directly if the codec negotiation feature is
unsupported on both side in the function `bt_hfp_hf_audio_connect()`.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-17 10:59:10 -05:00
Lyle Zhu
3f201d5c5f Bluetooth: Classic: shell: Add cover art shell commands
Add cover art shell commands for AVRCP controller and target.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-17 10:58:06 -05:00
Lyle Zhu
8e144a89f3 Bluetooth: Classic: AVRCP: Enable cover art feature
Add Kconfig `BT_AVRCP_TG_COVER_ART` to enable the target cover art
feature.

Add Kconfig `BT_AVRCP_CT_COVER_ART_GET_IMAGE_PROPERTIES` to enable
the controller cover art get image properties feature.

Add Kconfig `BT_AVRCP_CT_COVER_ART_GET_IMAGE` to enable the
controller cover art get image feature.

Add Kconfig `BT_AVRCP_CT_COVER_ART_GET_LINKED_THUMBNAIL` to enable
the controller cover art get linked thumbnail feature.

Add functions `bt_avrcp_cover_art_ct_cb_register()` and
`bt_avrcp_cover_art_tg_cb_register()` to register the callback.

Add function `bt_avrcp_cover_art_ct_l2cap_connect()` to create the
L2CAP connection for OBEX transport.

Add functions `bt_avrcp_cover_art_ct_l2cap_disconnect()` and
`bt_avrcp_cover_art_tg_l2cap_disconnect()` to disconnect the L2CAP
connection.

Add functions to send OBEX request/response, including connect,
disconnect, abort, get_image_properties, get_image, and
get_linked_thumbnail.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-17 10:58:06 -05:00
Peter van der Perk
3945b21b1f imx95: Enable I3C Cortex-M7 SOC
Adds I3C DTS definitions for imx95 cortex-m7 to use mcux-i3c drdiver

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-11-17 10:57:37 -05:00
Frode van der Meeren
03bfafe05e tests: bluetooth: tester: Fix CSIS/SR/SP/BV-07-C
This particular test-case requires bttester to respond with an OOB
procedure SIRK only error. To enable this response, the BTP command to
set SIRK mode has been extended with a new selection.

Signed-off-by: Frode van der Meeren <frode.vandermeeren@nordicsemi.no>
2025-11-17 10:57:28 -05:00
Benjamin Cabé
3598b6f40c modules: openthread: fix doxygen for openthread_set_nat64_receive_cb
Fix include guards and better document the kconfig dependency

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-17 10:56:56 -05:00
Benjamin Klaric
7987614b54 boards: st: stm32h7s78_dk: remove redundant CONFIG_SYS_HEAP_AUTO config
As stated, removed the unnecessary CONFIG_SYS_HEAP_AUTO=y from
both defconigs, since it is enabled per default for this board.

Signed-off-by: Benjamin Klaric <benjamin.klaric01@gmail.com>
2025-11-17 09:26:10 -05:00
Emil Gydesen
2423a41e6a tests: Bluetooth: Audio: Add RX check for each stream
Changed the generic global flag_audio_received flag to
exist for each stream. This will help verify that each
stream, if configured for RX, receives the expected
data.

One test started failing due to this, so that was disabled
until a fix is in place in the controller.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-17 09:25:12 -05:00
Firas Sammoura
f877417f0d tests: riscv: Implement unit tests for PMP memattr configuration and state
This commit implements a new unit test suite to validate the
integration of Device Tree memory attributes (`zephyr,memory-attr`)
with the RISC-V Physical Memory Protection (PMP) hardware.

The test suite includes:
1. **`test_pmp_devicetree_memattr_config`**: Verifies that the PMP
   Control and Status Registers (CSRs) are programmed correctly based
   on the memory regions defined with `zephyr,memory-attr` in the
   Device Tree. It iterates through the active PMP entries and
   asserts a match against the expected DT-defined regions.
2. **`test_riscv_mprv_mpp_config`**: Checks the initial state of the
   Machine Privilege Register Virtualization (MPRV) bit and Machine
   Previous Privilege (MPP) field in the `mstatus` CSR to ensure PMP
   is configured for correct privilege level switching during boot.
3. **`test_dt_pmp_perm_conversion`**: Validates the
   `DT_MEM_RISCV_TO_PMP_PERM` macro to ensure the conversion from
   Device Tree memory attribute flags to RISC-V PMP permission bits
   (R/W/X) is correct.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-11-17 09:25:01 -05:00
Firas Sammoura
80d34bbe0a riscv: pmp: Extract region address calculation to helper function
The logic to decode PMP addressing modes (**TOR**, **NA4**, **NAPOT**) into
physical start and end addresses was previously embedded in
`print_pmp_entries()`.

Extract this calculation into a new static helper function,
`pmp_decode_region()`, to significantly improve the readability and
modularity of the PMP debug printing code.

The new helper function is fully self-contained and exposes a defined API
for the PMP address decoding logic. This enables **direct reuse** in
**unit tests** (e.g., using **Ztest**) to verify the core address
calculation accuracy for all PMP modes and boundary conditions, independent
of the main PMP initialization or logging path.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-11-17 09:25:01 -05:00
Firas Sammoura
c011fddf95 riscv: pmp: Support custom entries from Device Tree for memory attributes
The Physical Memory Protection (PMP) initialization is updated to support
custom entries defined in the Device Tree (DT) using the `zephyr,memattr`
property, contingent on `CONFIG_MEM_ATTR` being enabled. A new function,
`set_pmp_mem_attr()`, iterates over DT-defined regions and programs PMP
entries in `z_riscv_pmp_init()`, allowing for early, flexible, and
hardware-specific R/W/X protection for critical memory areas. DT-based
entries are also installed in `z_riscv_pmp_kernelmode_prepare()` for
thread-specific configuration. The logic for the temporary PMP "catch-all"
entry is adjusted to account for new DT entries. Furthermore, the PMP
domain resync logic now masks user partition permissions against DT-defined
region permissions, preventing privilege escalation. `CONFIG_RISCV_PMP` is
updated to select `PMP_KERNEL_MODE_DYNAMIC` if `MEM_ATTR`. Finally, the
`pmp_cfg` array in `z_riscv_pmp_init()` is initialized to zero to prevent
writing uninitialized stack data to unused PMP entries.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-11-17 09:25:01 -05:00
Firas Sammoura
9fd456e4ab riscv: pmp: Fix pmp_addr index for per-CPU IRQ stack guards in SMP
When CONFIG_SMP is enabled, per-CPU IRQ stack guards are added. To prevent
unintended TOR (Top of Range) entry sharing, the PMP address entry
preceding each guard region in `pmp_addr` is marked with -1L.

The previously used index to access `pmp_addr` could become stale, as
additional PMP entries may be allocated after its initial calculation
but before the SMP loop for IRQ guards.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-11-17 09:25:01 -05:00
Firas Sammoura
c875c586b7 riscv: pmp: Separate global state for M-mode and U-mode regions
Split global PMP state variables (index and last address) into
mode-specific counterparts to correctly track the end of global PMP
ranges for both M-mode (kernel) and U-mode (userspace).

This ensures correct per-thread PMP initialization when configuring
mode-specific dynamic PMP entries.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-11-17 09:25:01 -05:00
Firas Sammoura
f6cec1c30f riscv: Add CONFIG_PMP_KERNEL_MODE_DYNAMIC
Introduce `CONFIG_PMP_KERNEL_MODE_DYNAMIC` to enable dynamic
configuration and activation of Machine mode PMP entries. This allows
PMP settings to be managed efficiently during transitions between
kernel and thread contexts.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-11-17 09:25:01 -05:00
Firas Sammoura
3b27d95f61 riscv: pmp: Rename PMP stackguard functions to kernelmode
Rename the `z_riscv_pmp_stackguard_*` functions to
`z_riscv_pmp_kernelmode_*`. This change better reflects that
these functions are used for general kernel mode PMP configuration,
not strictly limited to stack guard purposes.

Call sites in fatal.c, isr.S, and switch.S have been updated accordingly.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-11-17 09:25:01 -05:00
Peter van der Perk
20d8e9171e dts: arm: imx95: specify ITCM zephyr,memory-region
When using `zephyr,itcm` on a imx95 based board the linkage may fail due
to the absence of a defined ITCM region. This issue can be resolved by
specifying the ITCM region using `zephyr,memory-region`.

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-11-17 09:23:53 -05:00
Jerzy Kasenberg
173cb15283 soc: smartbond: Change SYS_CLOCK_TICKS_PER_SEC
Zephyr default configuration for SYS_CLOCK_TICKS_PER_SEC
is 10000.
For smartbond this value was changed to frequency of lp_clk.
For XTAL32K SYS_CLOCK_TICKS_PER_SEC would increase to 32768
that would equal SYS_CLOCK_HW_CYCLES_PER_SEC.

One would expect SYS_CLOCK_TICKS_PER_SEC to be less then
HW clock cycles.

This restores default value for SYS_CLOCK_TICKS_PER_SEC
and changes it to 5000 only when rcx is used (that runs at
around 15kHz) and keeping it at 10000 would result in
big rounding errors.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg.xr@bp.renesas.com>
2025-11-17 09:23:30 -05:00
Afonso Oliveira
b9a15bf5c8 arch/riscv: Enable NMI delivery for SMRNMI hardware
Add option to enable NMI delivery on boot for SMRNMI hardware.

Changes:
- Add CONFIG_RISCV_SMRNMI_ENABLE_NMI_DELIVERY Kconfig option
- Define SMRNMI CSRs in arch/riscv/include/csr.h
- Set NMIE bit during boot to enable NMI delivery

SMRNMI hardware generates but doesn't deliver NMIs when NMIE=0 (default).
This causes twister test failures and prevents handling of critical
hardware events like watchdog NMIs and ECC errors.

Setting NMIE=1 enables NMI delivery, but note that this implementation
only sets the enable bit - it does not provide full SMRNMI support
(no mnret instruction handling, no RNMI handlers). Users must implement
proper RNMI handlers in SoC-specific code to avoid undefined behavior.

Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
2025-11-17 09:23:11 -05:00
Jordan Yates
9366e4a48e modules: tfm: disable SECURE_UART when TFM_LOG_LEVEL_SILENCE
Explicitly disable the SECURE_UART TFM define when
`CONFIG_TFM_LOG_LEVEL_SILENCE=y`. The secure UART is only enabled by
default on nRF platforms to match the current TF-M defaults.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-17 09:22:58 -05:00
Matjaz Kajba
30bd32969b doc: replace getting started guide image
Replace blinky animation in getting started guide with nicer image.

Signed-off-by: Matjaz Kajba <matjaz@irnas.eu>
2025-11-17 09:22:28 -05:00
Jordan Yates
b4a8035433 llext: option to preserve EDK folder
Add an option to preserve the EDK folder, instead of deleting it after
creating the archive. This can simplify test scripting which can now
avoid immediately uncompressing the archive when compiling an
extension.

If this option is enabled, default to the much faster `.tar.Z` archive
format, since the compression ratio of the archive is not important.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-17 09:21:56 -05:00
Seppo Takalo
aee2604d37 drivers: modem: Implement support for DTR signal
DTR signal on UART extends the power saving by allowing host
to indicate the remote end that the UART is not in active state.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-11-17 09:21:45 -05:00
Fin Maaß
ffa0bbbc87 boards: litex: dts: improve formating of reg values
improve formating of reg values.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-11-17 09:21:15 -05:00
Yongxu Wang
e991623727 soc: nxp: imx943: support cpu mix poweroff with s2ram flow
Add S2RAM (Suspend-to-RAM) support for i.MX943 M7_0/M7_1 cores.
When entering suspend mode, the CPU mix is powered off to save
power consumption while preserving RAM data.

Implementation follows S2RAM suspend/resume workflow:
- Save CPU context (NVIC and SCB registers)
- Configure resume vector for S2RAM detection
- Suspend to RAM preserving stack and heap context
- Enter CPU suspend mode with mix poweroff
- Resume via reset_handler -> S2RAM detection -> context restore

Core registers are lost during poweroff but RAM data is preserved.

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-11-17 09:20:51 -05:00
Yongxu Wang
b0627959d3 dts: arm: nxp: imx943: update power state to support S2RAM
Update power state configuration for i.MX943 M7_0 and M7_1 cores
to use suspend-to-ram instead of standby to properly support
the newly implemented S2RAM (Suspend-to-RAM) functionality.

Changes:
- M7_0: standby -> suspend-to-ram
- M7_1: standby -> suspend-to-ram

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-11-17 09:20:51 -05:00
Alberto Escolar Piedras
8d7752861d boards native_sim: Remove zephyr,native-posix-cpu binding
This binding was deprecated in a8b44fd1d1
for the 4.2 release
Let's remove it now.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-17 09:20:34 -05:00
Alberto Escolar Piedras
9ce1bb356e drivers console: Remove deprecated native_posix_console.h
This header was deprecated in d881e794ba
for the 4.2 release
in favour of posix_arch_console.h
Let's remove it now.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-17 09:20:34 -05:00
Alberto Escolar Piedras
8e19196b1e boards/native/native_sim: Remove deprecated cmdline_common.h
This header was deprecated in ea79fdb4dd
for v4.2.
Let's remove it now.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-17 09:20:34 -05:00
Alberto Escolar Piedras
29a11ee1a4 boards/native/native_sim: Remove deprecated timer_model.h
This header was deprecated in 43b43f5408
for v4.2.
Let's remove it now.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-17 09:20:34 -05:00
Alberto Escolar Piedras
04a24a5a4d boards/native/native_sim: Remove deprecated native_posix_compat.h
This header was deprecated in 543f2da251
for v4.2.
Let's remove it now.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-17 09:20:34 -05:00
Alberto Escolar Piedras
8020428e2a drivers timer: native_sim_timer: Remove deprecated kconfig option
This driver was renamed in
078fef4ab5
And with it the old kconfig option was deprecated for 4.2.
Let's remove this option now

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-17 09:20:34 -05:00
Pieter De Gendt
85b578c087 drivers: syscon: Add shell commands
Add shell commands to use the SYSCON driver API with SYSCON devices.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-17 09:19:46 -05:00
Peter van der Perk
dd693ab2ab soc: nxp: imx9: add HAS_DWT to i.MX95 M7
The Cortex-M7 in IMX95 has the DWT feature but wasn't specified
in Kconfig

Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
2025-11-17 09:19:17 -05:00
Arthur Gay
68e1e50089 cmake: mcuboot: Flash encrypted image when loading to RAM
When both `SB_CONFIG_MCUBOOT_MODE_RAM_LOAD` and `SB_CONFIG_BOOT_ENCRYPTION`
are enabled, MCUBoot loads an encrypted image from flash, decrypts it,
and then executes it from RAM.

Previously, the unencrypted image was being flashed. This caused a boot
failure because MCUBoot would attempt to decrypt an unencrypted image.

This commit ensures the encrypted image is flashed when this
configuration is active, allowing the system to boot correctly.

Signed-off-by: Arthur Gay <arthur.gay@marshmallow.kids>
2025-11-17 09:18:54 -05:00
Chaitanya Tata
de09399fa2 drivers: nrf_wifi: Fix nRF71 build
nRF71 uses a different data structure.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-11-17 09:18:38 -05:00
Chaitanya Tata
6476790987 drivers: wifi: nrf_wifi: Implement stats type
Pass the stats type to the new API.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-11-17 09:18:38 -05:00
Chaitanya Tata
a7e6d6f686 manifest: nrf_wifi: Pull modified API
The API now takes type as input.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-11-17 09:18:38 -05:00
Lyle Zhu
3cc5c1be45 Bluetooth: Classic: HFP_AG: Get default indicator value
In current implementation, the default indicator value cannot be set
when building the SLC. And it causes the incorrect indicator value is
notified by AG.

Add a callback `get_indicator_value` to get the default indicator
value from the application.

Add shell command `indicator_value` to set the default indicator
value. The set indicator value will be passed to HFP AG when callback
`get_indicator_value` is notified.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-17 09:16:45 -05:00
Jerzy Kasenberg
843ba7149a tests: arch: arm_irq_vector_table: Update to run on smartbond
Update the custom vector table to have timer2_isr that
is used for kernel system timer.

While test passes test immediate crashes afterwards due to
missing handler for non-SysTick interrupt.

Now custom interrupt table has additional interrupt handler
to prevent crash.
timer2_isr is no longer static that should not result in
any conflict.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg.xr@bp.renesas.com>
2025-11-17 09:16:14 -05:00
Joel Schaller
f22899e80c net: http_server: No Error ENETDOWN
Set Log Level to Info when the HTTP socket reports ENETDOWN,
instead of logging an error each time the network is down.

Signed-off-by: Joel Schaller <joel.schaller16@gmail.com>
2025-11-17 09:15:54 -05:00
Pete Johanson
9a55353216 drivers: serial: Apply TX AE interrupt workaround on MAX32655
The workaround for missing the almost-empty interrupt when TX of very small
payloads needs to also be applied for the UART on MAX32655, so default on
that workaround symbol on that target.

Signed-off-by: Pete Johanson <pete.johanson@analog.com>
2025-11-17 09:15:36 -05:00
Cristian Bulacu
fd7c368f69 samples: net: openthread: border_router: Update project config
Updated border router sample configuration to adapt newly added NAT64
functionality

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-11-17 09:15:16 -05:00
Cristian Bulacu
0a3de5b07d net: l2: openthread: Add NAT64 code for border router app
This commit enables NAT64 functionality for border router application.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-11-17 09:15:16 -05:00
Cristian Bulacu
6e1fd56513 openthread: platform: Add NAT64 support at platform level
This commit adds platform code for NAT64 functionality

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-11-17 09:15:16 -05:00
Cristian Bulacu
86d5e38699 modules: openthread: Add new receive callback for NAT64 messages
In this commit, a new callback for NAT64 messages is added.
This is done to avoid passing the received message to rx queue of
external network interface.
As cidr is set from host's IPV4 address, this packet would have been
dropped when parsed, as source address was the same with the host
address and packet was not marked as loopback.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-11-17 09:15:16 -05:00
Cristian Bulacu
3fc116cad3 openthread: platform: radio_spinel: Add NAT64 support
This commit enables IPV4 messages exchange between interfaces by adding
NAT64 support at platform level.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-11-17 09:15:16 -05:00
Robert Lubos
60c763527a MAINTAINERS: Cleanup inactive collaborators in OpenThread area
Remove collaborators in OpenThread area that haven't been active for
months. Also unify the collaborator list in "Networking: OpenThread" and
"West project: openthread" areas.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-17 09:14:14 -05:00
cyliang tw
5973b553ed drivers: hwinfo: generalize the numaker config
Modify the numaker configuration to make it more general
instead of depending on specific SoC.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-11-17 09:28:26 +02:00
Hongbo Wang
9aaa9c4440 boards: frdm_imx93: enable enet support
Enable ENET port on FRDM_IMX93 board.

Signed-off-by: Hongbo Wang <hongbo.wang@nxp.com>
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Signed-off-by: Jiafei Pan <jiafei.pan@nxp.com>
2025-11-17 09:28:15 +02:00
Hongbo Wang
e88a5310a4 drivers: eth: phy: add Motorcomm YT8521 PHY driver
Add PHY driver for Motorcomm YT8521 which is used on FRDM_IMX93 board.

Signed-off-by: Hongbo Wang <hongbo.wang@nxp.com>
Signed-off-by: Jiafei Pan <jiafei.pan@nxp.com>
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
2025-11-17 09:28:15 +02:00
Badr Bacem KAABIA
20d4c758be fix(can): mcp2515: Guard TX interrupt handling for multi-buffer configs
The MCP2515 driver can be configured with 1, 2, or 3 transmit
buffers via the `MCP2515_TX_CNT` constant.

The interrupt handler checks for transmit complete interrupts for
`TXB1` and `TXB2`. However, the code for these checks was not guarded
by preprocessor conditionals. This meant the code would be compiled
even if the driver was configured to use only one transmit buffer
(`MCP2515_TX_CNT=1`), which is the default.

This change adds the appropriate `#if MCP2515_TX_CNT > 1` and
`#if MCP2515_TX_CNT > 2` guards around the interrupt handling logic
for the second and third transmit buffers, respectively. This ensures
that the code is only included when the corresponding buffers are
actually configured, improving code clarity and preventing compilation
of unused logic.

Signed-off-by: Badr Bacem KAABIA <badrbacemkaabia@gmail.com>
2025-11-17 09:28:07 +02:00
Mirai SHINJO
039013f8ef scripts: west_commands: patch: treat all subprocess output as text
Pass 'encoding="utf-8"' to all 'subprocess.run()' calls.
This treats the captured stdout and stderr streams as text rather than
byte sequences.

Example without this patch:
west patch apply --roll-back
ERROR: b'error: patch failed: examples/csp_server_client.py:32\n
error: examples/csp_server_client.py: patch does not apply\n'
FATAL ERROR: failed to apply patch libcsp/test.patch

Example with this patch:
west patch apply --roll-back
ERROR: error: patch failed: examples/csp_server_client.py:32
error: examples/csp_server_client.py: patch does not apply

FATAL ERROR: failed to apply patch libcsp/test.patch

Signed-off-by: Mirai SHINJO <oss@mshinjo.com>
2025-11-17 09:27:56 +02:00
Mirai SHINJO
634b45eddd scripts: west_commands: patch: capture subprocess output in apply() method
Pass 'capture_output=True' to the 'subprocess.run()' call in the 'apply()'
method.
This ensures that stdout and stderr are captured, so 'proc.stderr'
is not 'None' when 'self.err()' is called on a failed process.

Example without this patch:
west patch apply --roll-back
error: patch failed: examples/csp_server_client.py:32
error: examples/csp_server_client.py: patch does not apply
ERROR: None
FATAL ERROR: failed to apply patch libcsp/test.patch

Example with this patch:
west patch apply --roll-back
ERROR: b'error: patch failed: examples/csp_server_client.py:32\n
error: examples/csp_server_client.py: patch does not apply\n'
FATAL ERROR: failed to apply patch libcsp/test.patch

Signed-off-by: Mirai SHINJO <oss@mshinjo.com>
2025-11-17 09:27:56 +02:00
dependabot[bot]
5e650e783b ci: github: bump the actions-deps group across 1 directory with 5 updates
Bumps the actions-deps group with 5 updates in the / directory:

| Package | From | To |
| --- | --- | --- |
| [EnricoMi/publish-unit-test-result-action](https://github.com/enricomi/publish-unit-test-result-action) | `2.20.0` | `2.21.0` |
| [actions/upload-artifact](https://github.com/actions/upload-artifact) | `4.6.2` | `5.0.0` |
| [aws-actions/configure-aws-credentials](https://github.com/aws-actions/configure-aws-credentials) | `5.0.0` | `5.1.0` |
| [actions/download-artifact](https://github.com/actions/download-artifact) | `5.0.0` | `6.0.0` |
| [github/codeql-action](https://github.com/github/codeql-action) | `3.30.6` | `4.31.2` |



Updates `EnricoMi/publish-unit-test-result-action` from 2.20.0 to 2.21.0
- [Release notes](https://github.com/enricomi/publish-unit-test-result-action/releases)
- [Commits](3a74b29574...34d7c956a5)

Updates `actions/upload-artifact` from 4.6.2 to 5.0.0
- [Release notes](https://github.com/actions/upload-artifact/releases)
- [Commits](ea165f8d65...330a01c490)

Updates `aws-actions/configure-aws-credentials` from 5.0.0 to 5.1.0
- [Release notes](https://github.com/aws-actions/configure-aws-credentials/releases)
- [Changelog](https://github.com/aws-actions/configure-aws-credentials/blob/main/CHANGELOG.md)
- [Commits](a03048d875...00943011d9)

Updates `actions/download-artifact` from 5.0.0 to 6.0.0
- [Release notes](https://github.com/actions/download-artifact/releases)
- [Commits](634f93cb29...018cc2cf5b)

Updates `github/codeql-action` from 3.30.6 to 4.31.2
- [Release notes](https://github.com/github/codeql-action/releases)
- [Changelog](https://github.com/github/codeql-action/blob/main/CHANGELOG.md)
- [Commits](64d10c1313...0499de31b9)

---
updated-dependencies:
- dependency-name: EnricoMi/publish-unit-test-result-action
  dependency-version: 2.21.0
  dependency-type: direct:production
  update-type: version-update:semver-minor
  dependency-group: actions-deps
- dependency-name: actions/upload-artifact
  dependency-version: 5.0.0
  dependency-type: direct:production
  update-type: version-update:semver-major
  dependency-group: actions-deps
- dependency-name: aws-actions/configure-aws-credentials
  dependency-version: 5.1.0
  dependency-type: direct:production
  update-type: version-update:semver-minor
  dependency-group: actions-deps
- dependency-name: actions/download-artifact
  dependency-version: 6.0.0
  dependency-type: direct:production
  update-type: version-update:semver-major
  dependency-group: actions-deps
- dependency-name: github/codeql-action
  dependency-version: 4.31.2
  dependency-type: direct:production
  update-type: version-update:semver-major
  dependency-group: actions-deps
...

Signed-off-by: dependabot[bot] <support@github.com>
2025-11-17 09:27:46 +02:00
Paul Jones
df2fc692b9 Drivers: Uart: Fix missing extern "C" in uart_bridge.h
uart_bridge.h is missing extern "C", causing link errors for C++ files

Signed-off-by: Paul Jones <paul@pauljones.id.au>
2025-11-17 09:27:33 +02:00
Atakan Demirtaş
20337689a1 drivers: input: vs1838b: Add noise filter for IR signals
Adds logic to shift out the first edge if the initial three edges do not
match a leading burst, improving noise resilience
in the IR input signal processing.

Signed-off-by: Atakan Demirtaş <atakan_demirtas@outlook.com>
2025-11-17 09:27:24 +02:00
Anas Nashif
5f72e95b60 MAINTAINERS file: assign loose paths to respective areas
Add many loose files to existing areas
Add new area for release with release related files, like VERSION and
such.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-17 09:27:11 +02:00
Dmytro Firsov
3cf7b20278 include: xen: events.h: fix Doxygen annotations for Xen events API
Header for Xen event channel API (events.h) previously contain
incorrect Doxygen-style annotations. Also, some functions had not
it at all.

Add proper description for all functions and fix style to make
documentation consistent.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2025-11-15 12:00:01 +01:00
Dmytro Firsov
659b3d6894 drivers: xen: export missing evtchn API function
Previously clear_event_channel() function, that is a part of Xen event
channel API was missing in events.h header.

Add function declaration and documentation description for to let users
add it to external drivers.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2025-11-15 12:00:01 +01:00
Dmytro Firsov
27e0445a80 drivers: xen: return hypercall results from notify_evtchn
Xen event channel notification may fail during hypervisor handling,
so it will be good for user to have a possibility to check results.

Previous implementation ignored hypervisor return code, now it will be
passed to caller.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2025-11-15 12:00:01 +01:00
Etienne Carriere
c73c306a6c include: drivers: clock_control: stm32: fix STM32_CLOCK_INFO_BY_NAME()
Fix STM32_CLOCK_INFO_BY_NAME() macro that messed-up clock information.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-15 11:44:24 +01:00
Camille BAUD
6f7eeaf4d4 boards: bflb: fix ai_wb2_12f formatting
Fix bad formatting.

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-15 11:43:59 +01:00
Camille BAUD
135468a67a boards: bflb: Add I2C tests support to some boards
Adds I2C tests running

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-15 11:43:59 +01:00
Camille BAUD
3da4a2a2f4 drivers: i2c: Introduce basic bflb I2C driver
Introduce synchronous i2c driver

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-15 11:43:59 +01:00
Camille BAUD
80e046f421 dts: bflb: Add I2C nodes
Adds i2c binding and nodes

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-15 11:43:59 +01:00
Paweł Pelikan
fddce23e03 tests: kernel: timer: behavior: Adjustments for NRF54H20 PPR
Adjusting CONFIG_SYS_CLOCK_TICKS_PER_SEC as core is to slow too run
the test with the default system clock frequency.

Signed-off-by: Paweł Pelikan <pawel.pelikan@nordicsemi.no>
2025-11-15 11:43:37 +01:00
Krzysztof Chruściński
395acfcf6b tests: drivers: timer: nrf_grtc_timer: Add stress test
Add stress test that randomly starts and aborts multiple timers
from various contexts. Test checks if timers do not expire prematurely.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-15 11:43:37 +01:00
Krzysztof Chruściński
d6fb9384eb drivers: timer: nrf_grtc_timer: Optimize to reduce register access
Speed up execution of the interrupt handler and sys_clock_set_timeout().
Sys_clock_set_timeout() can be called in two scenarios: from previous
timeout expiration handler or freely. If the former case fast path
can be used since CC value in the GRTC register just expired and it
can be used as a reference for CCADD setting. This is only a single
register write so it's much faster. In the latter a longer procedure
is applied which also happens in two variants. If value which is
set in CC is further in the future (e.g. K_FOREVER was set before) then
CC can be safely overwritten with a new value without a risk of
triggering unexpected COMPARE event. If value in CC is earlier than
the new CC value (if earlier timeout was aborted) then there is a
risk of COMPARE event happening while it is being overwritten.
That case requires long and safer procedure of setting CC.

Update hal_nordic with changes in the nrfx_grtc driver which are
needed for nrf_grtc_timer changes.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-15 11:43:37 +01:00
Daniel Leung
fb055ea77e logging: dictionary: format scripts with ruff
Simple formatting via ruff on dictionary logging scripts.
No manual editing was done on the scripts.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-15 11:38:48 +01:00
Tom Burdick
e37b3ca50e rtio: Add an sqe_acquire_n helper
Makes it safer/easier to obtain n many submissions for use in one go.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2025-11-15 11:38:37 +01:00
Jerzy Kasenberg
aea71084ec smartbond_timer: Fix tick-base behavior
When system was configured to use smartbond_timer with
tick-based kernel, timer interrupt could fire only
once and then time would not advance.

Now when tick-based kernel is chosen timer2_isr()
schedules that it should be fired at next tick.
Timer comparator calculation code was extracted
from existing sys_clock_set_timeout() function
without change so it can be used for tick-less
and tick-based kernel.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg.xr@bp.renesas.com>
2025-11-15 11:37:56 +01:00
Bjarki Arge Andreasen
12a9392eeb drivers: can: nrf: use CAN_DEVICE_DT_INST_DEFINE
The can_nrf.c device driver used DEVICE_DT_INST_DEFINE instead of
CAN_DEVICE_DT_INST_DEFINE, which means we are missing initialization
of some CAN structures, namely STATS.

Update driver to use CAN_DEVICE_DT_INST_DEFINE()

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-11-15 11:37:26 +01:00
Emil Gydesen
25500c61b7 samples: Bluetooth: hci_uart: Add board files for nRF5340ADK
Add board file for nrf5340_audio_dk_nrf5340_cpuapp identical
to the ones for nrf5340dk_nrf5340_cpuapp

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2025-11-15 11:35:51 +01:00
Fengming Ye
478fad83e9 net: zperf: udp upload clock compensate
When clock accuracy is 1KHz or lower, udp_upload rate has
much lower accuracy. eg. 20M rate has 60M actual throughput.
It's because any packet_duration less than 1000us will be
treated as 1 tick. In this case rate cannot control throughput.

Add clock compensate when time clock is lower than 1KHz to fix it.
In every 10 ticks or longer delta time, calculate packets sent
actual number and expected number, and then compensate ticks.
And add compensate ticks to delay ticks count.

If we cannot compensate a minus ticks as delay cannot be negative,
add it to next compensate period.
If compensate sum ticks is lower than -1000, it means current rate
is higher than low level capability. So no need to compensate
in remaining traffic.

Signed-off-by: Fengming Ye <frank.ye@nxp.com>
2025-11-15 11:33:09 +01:00
Yangbo Lu
58edd1b4db net: select NET_PKT_TIMESTAMP_THREAD for NET_L2_PTP
NET_L2_PTP requires NET_PKT_TIMESTAMP_THREAD. So, use
select instead.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-11-15 11:32:42 +01:00
Yangbo Lu
ef4cc7c9b3 include: net_if: fix clarification of timestamp callback
The functions of timestamp callback were implemented under
CONFIG_NET_PKT_TIMESTAMP_THREAD, but were clarified under
CONFIG_NET_PKT_TIMESTAMP.

The clarification in header file may misunderstand users,
because enabling CONFIG_NET_PKT_TIMESTAMP is not enough
to use these functions.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-11-15 11:32:42 +01:00
Yangbo Lu
c1d213a86d net: net_if: remove redundant NET_PKT_TIMESTAMP_STACK_SIZE definition
Kconfig makes sure the NET_PKT_TIMESTAMP_STACK_SIZE with default value
1024 when NET_PKT_TIMESTAMP_THREAD is enabled.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-11-15 11:32:42 +01:00
Muhammad Waleed Badar
03110f1bd8 boards: esp32_cam: remove unused SD card detect pin and fix LED polarity
The ESP32-CAM board does not connect the SD card detect pin, so the
SDHC0_CD_GPIO21 pinmux configuration has been removed. This commit also
updates the status LED to use active-low for correct operation.

Signed-off-by: Muhammad Waleed Badar <walid.badar@gmail.com>
2025-11-15 11:31:51 +01:00
Elmo Lan
194fb3a92a dts: realtek: Add I2C SCL count offset properties
Add devicetree properties `lcnt-offset` and `hcnt-offset` to allow
board-specific tuning of SCL high/low count timing on RTS5912.

Signed-off-by: Elmo Lan <elmo_lan@realtek.com>
2025-11-15 11:31:04 +01:00
Fin Maaß
0d98a515f6 sd: speed up mmc init
speed up mmc init, when sdmmc is also
used. as sdmmc has to fail for that and
can take some long time.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-11-15 11:30:32 +01:00
Anas Nashif
95b48cd5ba west_commands: do not depend on CONFIG_SOF
Do not depend on SOF config, use RIMAGE_SCHEMA instead, defined in SOF.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-15 11:28:47 +01:00
Anas Nashif
71ec5df8f3 intel_adsp: remove workaround for SOF setting core count
During transition to HWMv2 this workaround was added, which should
instead be in SOF and not in Zephyr, as CORE_COUNT is a SOF Kconfig.

Remove this and instead set the CORE_COUNT in SOF to the
MP_MAX_NUM_CPUS.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-15 11:28:47 +01:00
Anas Nashif
1a780f933e manifest: optional: remove sof from optional manifest
Nothing in Zephyr uses SOF, it is the other way round, SOF uses
Zephyr, creating a cyclic dependency in some cases making it difficult
to apply changes to areas used by SOF upstream.

Part of #91061

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2025-11-15 11:28:47 +01:00
Etienne Carriere
6c87662791 boards: st: Refer to doc on OpenOCD deprecation of ST-Link HLA interface
Change the OpenOCD configuration file that mention pontential connection
issues with a reference to the documentation where a dedicated section
was recently added.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-15 11:26:49 +01:00
Etienne Carriere
8d27a5829d boards: OpenOCD deprecation of ST-Link HLA interface
This change aims to address a compatibility issue with recent OpenOCD
pre-release and what is planned in OpenOCD v1.0.0 planned end of 2025.
OpenOCD commit 34ec5536c0ba ("stlink: deprecate HLA support") [1] was
merged in December 2024 after release tag 0.12.0 and before coming
release v1.0.0. It deprecates the legacy HLA driver interface (also
called transport) in favor to the generic DAP interface that is
supported by ST-Link firmware v2.1 and later.

Since the referred commit, OpenOCD config script must source a new
config file (interface/stlink-hla.cfg) in order to select hla_swd
transport. This change breaks many ST-Link based OpenOCD config files
of Zephyr. Alternatively, already existing interface/stlink-dap.cfg
can be used with dapdirect_swd interface to use direct DAP/SWD interface.

To overcome the issue and support older and newer OpenOCD releases,
change the OpenCOD configuration files for non-ST boards that use
ST-Link to interface target debug and/or flash programming support.
Use the already existing are still maintained interface/stlink-dap.cfg
config script file together with dapdirect_swd transport interface.

One may potentially face connection issues if using both a recent
OpenOCD firmware and using a ST-Link adapter that embeds a ST-Link
firmware v1.x. This may happen with old ST-Link adapter devices.
ST-Link firmware v1.0 do not support DAP direct SWD interface. In such
a case, either upgrade the ST-Link firmware (refer to STM32CubeProgrammer
guide), or revert the change made here to explicitly use hla_swd
transport based on stlink-hla.cfg.

Link: 34ec5536c0/ [1]

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-15 11:26:49 +01:00
Etienne Carriere
c56dbff4fd doc: develop: flash_debug: info on OpenOCD deprecation of ST-Link HLA
Add a section about the old legacy HLA interface being deprecated in
OpenOCD and give some hint on how to accommodate if one faces a
communication issue with an old ST-Link adapter.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-15 11:26:49 +01:00
Philipp Miedl
b3bd157ec8 driver: clock-control: mspm0: Remove obsolete MSPM0_LFCLK_ENABLED check
LFCLK is always enabled, there is no way to gate this clock. The
codeblock that was shielded by this check simply changes LFCLK from
LFOSC to LFXT, for which the existing check for an enable LFXT DT node
is sufficient.

Signed-off-by: Philipp Miedl <phmi@bang-olufsen.dk>
2025-11-15 11:25:09 +01:00
Philipp Miedl
cd6c390608 driver: clock_control: mspm0: remove HSCLK DT node
Remove the HSCLK DT node to unify the configuration of MCLK and
simplify the configuration. MCLK is now directly routed to either

  * LFCLK
  * SYSOSC
  * SYSPLL
  * HFCLK

without any intermediate nodes.

Signed-off-by: Philipp Miedl <phmi@bang-olufsen.dk>
2025-11-15 11:25:09 +01:00
Philipp Miedl
03678f154b driver: clock_control: mspm0: Remove node syspll2x
Remove the node syspll2x refering to the output of SYSPLL CLK2X.
SYSPLLCLK2X is controlled via the clk-div2x parameter of the SYSPLL
DT node and only CLK2X or CLK0 can be activated. So there is no need
for an additional node, as routing of downstream clocks from SYSPLL
CLK0/CLK2X are defined by which of the two is active.

Signed-off-by: Philipp Miedl <phmi@bang-olufsen.dk>
2025-11-15 11:25:09 +01:00
Philipp Miedl
0745f05380 driver: clock_control: mspm0: Allow setting SYSOSC clk and restrict MDIV
According to the TI MSPM0 reference manual MDIV must not be set if
SYSOSC is not configured to 4MHz. To make use of this setting, it is
necessary to enable configuring the SYSOSC clock of either 32MHz
(default) or 4MHz with the clock-frequency parameter of the
sysosc node.
If the SYSOSC is configured to run at 4MHz, then the MCLK divider
setting is applied.

Signed-off-by: Philipp Miedl <phmi@bang-olufsen.dk>
2025-11-15 11:25:09 +01:00
Philipp Miedl
afde690c66 drivers: clock_control: mspm0: Rename pll to syspll
To conform with the TI mspm0 datasheet and reference manual, rename the
pll node to syspll. To harmonize, also rename references to the non-
existing node syspll0 to syspll.

Signed-off-by: Philipp Miedl <phmi@bang-olufsen.dk>
2025-11-15 11:25:09 +01:00
Maxmillion McLaughlin
b98304a87b drivers: sensors: bmp581: fix temperature scaling
This change fixes and issue where negative temperatures wrap and
return 250C when the sensor gets below zero. The implementation is
pulled from Boschs official BMP5_SensorAPI and has been tested to
work down to -40

Signed-off-by: Maxmillion McLaughlin <max@sorcerer.earth>
2025-11-15 11:23:54 +01:00
Eden Uhde
ac270df99a drivers: display: ls0xx: add support for serial VCOM inversion
The ls0xx series requires continuous VCOM inversion to prevent panel
damage from DC bias, this adds driver support for doing so over SPI
(without EXTCOMIN), and adds corresponding devicetree properties.

Co-authored-by: Nick Winans <nick@winans.codes>
Signed-off-by: Eden Uhde <eden@rainbowtree.house>
2025-11-15 11:23:03 +01:00
Krzysztof Chruściński
9c1fbc8a86 drivers: serial: nrfx: Remove use of UART_NRFX_UARTE_LEGACY_SHIM
Kconfig got removed.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-14 16:46:15 +01:00
Piotr Kosycarz
f03c105c12 tests: subsys: ipc: ipc_sessions: disable reboot test for nrf53 and nrf54
Remote core does not handle independent reboot.

Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
2025-11-14 15:28:28 +02:00
Johan Hedberg
c88d9d531e github: Update security page for 4.3.0 release
Update the GitHub security page to include the recently released 4.3.0
version.

Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
2025-11-14 15:27:53 +02:00
Michał Stasiak
0f3484a239 dts: nrf54lm20a: align GPIOTE IRQn to non-secure build
Use different GPIOTE interrupt number when building for
cpuapp/ns.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-11-14 15:27:43 +02:00
Ruijia Wang
d4ae43e25f drivers: xspi: fix device config failure in XIP mode
Add bus idle wait after clock rate query to ensure AHB transactions
complete before device configuration. This prevents XSPI_SetDeviceConfig
from failing due to ongoing AHB access detection in XIP environments.
The issue occurs because clock_control_get_rate() triggers AHB
transactions that complete asynchronously, causings subsequent device
configuration to fail due to its bus status checking.

Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
2025-11-14 15:27:26 +02:00
Piotr Kosycarz
4bc8b315c7 tests: drivers: uart: uart_async_api: fix execution at lm20/ns
Add required overlay.

Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
2025-11-14 15:27:11 +02:00
Piotr Kosycarz
23752d2115 tests: drivers: counter: counter_basic_api: fix execution at lm20/ns
Add required overlay.

Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
2025-11-14 15:27:11 +02:00
Piotr Kosycarz
bc8c8f4b3a tests: drivers: i2s: fix execution at lm20/ns
Add required overlay.

Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
2025-11-14 15:27:11 +02:00
Adam Zotow
3804d2f1d1 doc: migration-guide-4.4: Add st,stm32-qspi ssht-enable note
Add migration note for dual-flash configurations requiring ssht-enable
property to reenable sample shifting.

Signed-off-by: Adam Zotow <azo@trackunit.com>
2025-11-14 15:26:31 +02:00
Adam Zotow
40816a81a5 drivers: flash: stm32 qspi: Make delayed data sampling configurable
The QSPI delayed data sampling (SSHIFT) is enabled by default. This
feature is configurable in both XSPI and OSPI drivers. Align with
these drivers and make the feature configurable for QSPI too.

Signed-off-by: Adam Zotow <azo@trackunit.com>
2025-11-14 15:26:31 +02:00
Adam Zotow
54b0c9559c boards: stm32: set ssht-enable property on all qspi dual-flash boards
With ssht-enable property introduced in STM32 QSPI driver the delayed
data sampling (SSHIFT) got disabled for both dual and non-dual flash
configurations. Set ssht-enable property for dual flash boards
to reenable delayed data sampling.

Signed-off-by: Adam Zotow <azo@trackunit.com>
2025-11-14 15:26:31 +02:00
Adam Zotow
e545887d17 dts: bindings: stm32 qspi: add ssht-enable property
This property allows to enable QSPI delayed data sampling (SSHIFT).

Signed-off-by: Adam Zotow <azo@trackunit.com>
2025-11-14 15:26:31 +02:00
Etienne Carriere
b6784734be drivers: gpio: stm32: clean instance init macro indentation
Cleanup indentation in STM32 GPIO controllers device definition
macros. Replace some uses of COND_CODE_1() with IF_ENABLED() that
is bit more explicit.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
8690595a47 drivers: misc: stm32n6_axisram: clean instance init macro indentation
Clean indentation in STM32N6_AXISRAM_INIT() local macro to better
highlight what the macro does. To make it more readable, add a
STM32N6_AXISRAM_MAYBE_INIT() helper macro and use IF_ENABLED()
instead of COND_CODE_0().

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
b3f4439025 drivers: sensor: stm32_digi_temp: clean indentation in init macros
Clean indentation in STM32_DIGI_TEMP_INIT() macro.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
ef51b23a10 drivers: dma: stm32: clean indentation in instance init macros
Clean indentation in macros used to define DMA instances in STM32
DMA drivers.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
fcb9f195a9 drivers: can: stm32: clean indentation in instance init macros
Clean indentation in macros used to define device instances in STM32 CAN
driver.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
97fc64e812 drivers: adc: stm32: clean instance init macro indentation
Cleanup indentation in ADC_STM32_INIT() macro.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
d27e1d6f78 drivers: dac: stm32: clean indentation in instance init macros
Clean indentation in STM32_DAC_INIT() macro.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
b0ccb2295f drivers: stm32: use STM32_CLOCK_INFO_BY_NAME() and friends
Use STM32_CLOCK_INFO(), STM32_DT_INST_CLOCK_INFO(),
STM32_CLOCK_INFO_BY_NAME() and STM32_DT_INST_CLOCK_INFO_BY_NAME()
helper macros in STM32 drivers.

Using these macros ensure the clock division factor is properly
populated according to DT information. Prior these changes some
drivers only got the bus and bits position information and missed
the clock division information which is fine only when this division
factor information is 0.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
c478e7343f include: drivers: clock_control: stm32: add DT clock helper macros
Add helper macros to get clock information from the devicetree:
STM32_DT_INST_CLOCK_INFO_BY_INDEX(), STM32_DT_INST_CLOCK_INFO(),
STM32_CLOCK_INFO_BY_NAME() and STM32_DT_INST_CLOCK_INFO_BY_NAME().

Using these macros or the existing STM32_CLOCK_INFO(), STM32_DT_CLOCKS()
and STM32_DT_INST_CLOCKS() macros ensure clock consumer gets all the
required STM32 clock information that are abstracted by the
STM32 clock drivers resources.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
47717db3be include: drivers: clock_control: stm32: document clock macros
Add a bit of documentation for the existing STM32_CLOCK_INFO()
STM32_DT_CLOCKS().

While at it, fix indentation of STM32_CLOCK_INFO() macro.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Etienne Carriere
a2ea4f310d include: drivers: clock_control: stm32: remove deprecated macro
Remove STM32_DT_DEV_DOMAIN_CLOCK_SUPPORT macro that is unused and
not planned to be.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 15:26:17 +02:00
Sebastian Bøe
70f6cf7ea0 soc: nordic: uicr: Move GEN_UICR options into the main Zephyr tree
I initially added the GEN_UICR options to the gen_uicr image's Kconfig
tree only to not pollute the main tree.

But there is a lot of useful help text in the GEN_UICR option's
Kconfig file that I would like users to be able to read/reference from
the docs.

To not increase the complexity of the Kconfig doc generator, we add
the GEN_UICR options to the main tree and have them all be disabled
for builds other than the gen_uicr image.

Being in the main tree has the added benefit of being recognzied by
the compliance checker.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2025-11-14 15:26:06 +02:00
Ruoshan Shi
d185a9aa43 boards: imx93_evk: Document imx-atf TRDC config for M33 DDR access
Add documentation for required imx-atf TRDC configuration changes
to enable M33 core DDR memory access on i.MX93 EVK board.

Signed-off-by: Ruoshan Shi <ruoshan.shi@nxp.com>
2025-11-14 15:25:53 +02:00
Lukasz Fundakowski
03eff37921 twister: Remove unnecessary code
Removed some old code which is not used/needed any more.

Signed-off-by: Lukasz Fundakowski <lukasz.fundakowski@nordicsemi.no>
2025-11-14 15:25:41 +02:00
Lukasz Fundakowski
bd187425f7 twister: Don't print full stack trace in readlines_until method
The readlines_until method is part of the testing framework
(pytest harness) and should not print a full stack trace
when the expected line isn't found. It should also raise
an AssertionError instead of a TwisterHarnessTimeoutException,
allowing users to know that a test failed because the expected
condition did not happen.

Signed-off-by: Lukasz Fundakowski <lukasz.fundakowski@nordicsemi.no>
2025-11-14 15:25:41 +02:00
Fabin V Martin
c84145fe83 boards: sam_e54_xpro: Update pinctrl, DTS, and YAML files
- Update pin control, device tree and board YAML for sam_e54_xpro.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-11-14 15:25:25 +02:00
Fabin V Martin
e4e36f5f28 drivers: i2c: microchip: Add I2C g1 driver
- Add I2C driver for Microchip SERCOM g1.
- Add and update Kconfig files to support the driver.
- Update CMakeLists.txt to include the new driver.

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-11-14 15:25:25 +02:00
Fabin V Martin
e8f44b49a2 dts: arm: microchip: sam: Add SERCOM I2C node and binding file.
- Add device tree binding file for Microchip g1 I2C driver

Signed-off-by: Fabin V Martin <Fabinv.Martin@microchip.com>
2025-11-14 15:25:25 +02:00
Camille BAUD
976cd09479 fs: Add a minimal littlefs blocksize
Prevents littlefs from failing when block size is too small to work

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-11-14 15:25:13 +02:00
Aymen LAOUINI
ba420519af dts: nordic: update nrf9280 nodes in dtsi
- Removed cpurad_uicr and cpuapp_uicr nodes and added uicr node
  at address 0xfff8000 for nRF9280.
- Add bicr node defined in same node as uicr but at offset 800.
- Add tdd_peripherals node.

Signed-off-by: Aymen LAOUINI <aymen.laouini@nordicsemi.no>
2025-11-14 15:25:01 +02:00
Aymen LAOUINI
8f0fbbe8aa boards: nordic: add partitions to memory map for nRF9280
- nRF9280 memory_map_iron is missing periphconf_partition, added this
  partition to mram11 at address 0xe60a000.
- Add secure_storage_partition at 0xe60c000 to memory map. This
  partition is devided in two: cpuapp_crypto_partition and
  cpuapp_its_partition, both are 4KB. Those partitions are used
  by gen_uicr.py script to generate the UICR file.

Signed-off-by: Aymen LAOUINI <aymen.laouini@nordicsemi.no>
2025-11-14 15:25:01 +02:00
Aymen LAOUINI
d9861d77ff soc: nordic: activate uicr generation and use correct dt reg check
- Activate the UICR file generation and PeriphConf for nRF92 application.
- Add condition in reg dt check file to use the correct uicr node name
  for nRF92X.
- Generation of preriphconf entries filters on device names to match
  the first 5 characters to nrf92 or the 6 first characters to nrf54h,
  this information is also used to determine the device SOC_SERIES
  to be either SOC_SERIES_NRF54HX or SOC_SERIES_NRF92X allowing possible
  extension of usage. Still in case of an unknown device of a certain
  family it will use existing configuration while generating
  periphconf entries.

Signed-off-by: Aymen LAOUINI <aymen.laouini@nordicsemi.no>
2025-11-14 15:25:01 +02:00
Krzysztof Chruściński
3c87faea4b tests: drivers: uart: async_dual: Optimize test data handling
Stress test is executed on CPUs with slow clock (16MHz). Handling of test
data in UART_RX_RDY event is optimized to reduce time spent in the
interrupt context. Since payload is always a decrementing sequence, fixed
array is used to compare memory which allows to use standard memcmp
instead of byte by byte comparison.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-14 15:24:48 +02:00
Krzysztof Chruściński
db9fa069e2 tests: drivers: uart: async_dual: Extend nrf54h20dk configuration
Add workaround timer to instances that are used for reception in the
test.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-14 15:24:48 +02:00
Krzysztof Chruściński
64b7cabd61 tests: drivers: uart: async_dual: Update configuration for nrf54l
Add timer property to the uart device under test.
Add zephyr,pm-device-runtime-auto to the uart device under test.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-14 15:24:48 +02:00
Krzysztof Chruściński
c67c3f4359 tests: drivers: uart: async_dual: Extend testing
Extend test with a mode where HWFC is off and receiver is providing
buffers on time. In that case receiver should be able to continuously
receive data without losing any byte (even without HWFC). Additionally,
TX data is chopped to verify that receiver does not loose bytes when
new TX data collides with detected RX timeout.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-14 15:24:48 +02:00
Krzysztof Chruściński
c5127e677b tests: drivers: uart: async_dual: Add progress report
Add reporting about the test progress. Test lasts few seconds and
progress report helps to see if test stuck or how it is progressing.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-14 15:24:48 +02:00
Krzysztof Chruściński
f1f0b03aea drivers: serial: nrfx_uarte: Add mode with TIMER byte counting
Add mode to be used on UARTE with frame timeout which is using a bounce
buffers and TIMER to count bytes. This mode shall be used to reliably
receive data without HWFC as frame timeout approach is not 100% reliable
because it can loose or corrupt a byte when new byte arrives after
frame timeout is detected but before it is fully handled. This mode is
similar to the one enabled with CONFIG_UART_x_NRF_HW_ASYNC but
additional bounce buffers are used and UARTE is receiving data to
internal buffers and copies data to the user buffer. Legacy apporach
cannot be used because in new SoC DMA attempts to copy data in words
so when byte is received it stays in the DMA internal buffer until
4 bytes are received or end of transfer happens then internal DMA
buffer is flushed.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-14 15:24:48 +02:00
Krzysztof Chruściński
9ae8c4edbc drivers: serial: nrfx_uarte: Prepare code for extension
Rearrange code to prepare for upcoming extension that adds special
receive mode.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-14 15:24:48 +02:00
Krzysztof Chruściński
e20a3acfeb dts: bindings: serial: nrf-uarte: Add timer property
Timer property indicates which TIMER instance should be used for
byte counting. If timer property is present then given instance
is using TIMER to count received bytes.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-11-14 15:24:48 +02:00
Jiafei Pan
e2d6af1f55 tracing: rtio: fix building error in rtio header file
This patch is to fix the following building issue:
include/zephyr/rtio/rtio.h:1773:51: error: 'rtio' undeclared
(first use in this function)

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-11-14 11:17:41 +00:00
Michał Stasiak
3ebf29329e soc: nordic: nrf54l: make SoCs select specific symbols
As future nRF54L SoCs may differ in terms of content,
general SOC_NRF54L_CPUAPP_COMMON symbol needs to cover
less symbols. These will be selected by specific SoC based
on support.

Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
2025-11-14 12:20:17 +02:00
Thomas Decker
f0749b8301 boards: st: nucleo_h7s3l8 & stm32h7s78_dk: Add runner jlink
Add support for Segger J-Link debug probes connected to MIPI20 connector
on the boards nucleo_h7s3l8 and stm32h7s78_dk.

Signed-off-by: Thomas Decker <decker@jb-lighting.de>
2025-11-14 12:20:05 +02:00
Mathieu Choplain
35a391d47c soc: st: stm32: use series-agnostic STM32 LL headers
Use the series-agnostic STM32 LL headers from the STM32Cube HAL module
instead of series-specific ones in STM32 SoC-specific code. Also remove
inclusion of `stm32XXxx.h` in a few files which already include `soc.h`
who is tasked with doing this inclusion.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-14 12:19:48 +02:00
Mathieu Choplain
19e1b2b72b samples: boards: st/pm/stop3: use series-agnostic STM32 LL headers
Use the series-agnostic STM32 LL headers from the STM32Cube HAL module
instead of series-specific ones in this sample.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-14 12:19:48 +02:00
Mathieu Choplain
21b2283fc5 drivers: *: stm32: use series-agnostic STM32 LL headers
Use the series-agnostic STM32 LL headers from the STM32Cube HAL module
instead of series-specific ones in STM32 drivers.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-14 12:19:48 +02:00
Mathieu Choplain
7fbcd494d8 boards: arduino: *: use series-agnostic STM32 LL headers
Use the series-agnostic STM32 LL headers from the STM32Cube HAL module
instead of series-specific ones in board-specific code of these platforms.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-14 12:19:48 +02:00
Jun Lin
a922813034 drivers: i2c: npcx: add more timing parameters for I2C clock frequency
I2C Fast-Plus mode (1 MHz) is limited by the source clock.
For example, with a 15 MHz I2C source clock, the max I2C frequency is
~625 kHz. To support higher I2C frequencies, the APBx source clock must
be increased. This commit adds the timing parameters for I2C operation
at higher APBx clocks.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2025-11-14 12:19:29 +02:00
Qingsong Gou
b0662fea5e boards: sifli: sf32lb52_devkit_lcd: enable I2C1
Enable I2C1 device

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-14 12:19:20 +02:00
Qingsong Gou
1b8e3bdaf7 drivers: i2c: add i2c driver for sf32lb platform
Add i2c driver for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-14 12:19:20 +02:00
Qingsong Gou
65cdc47bcc dts: arm: sifli: sf32lb52x: define all I2C instances
Add i2c device controller for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-14 12:19:20 +02:00
Qingsong Gou
c7b99e9613 dts: bindings: i2c: sf32lb: add sifli,sf32lb-i2c
Add i2c device bindings for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-14 12:19:20 +02:00
Qingsong Gou
6b4ced890b drivers: clock_control: sf32lb: add more helper APIs
Add sf32lb_clock_get_status_dt and sf32lb_clock_get_rate_dt

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-14 12:19:20 +02:00
Emil Dahl Juhl
ea68224424 tests: subsys: dsp: utils: include dsp.h
Commit 451afdbaaf ("dsp: utils: slim down includes") removed the
inclusion of dsp/dsp.h from dsp/utils.h.
Update the tests to explicitly include dsp/dsp.h.

Signed-off-by: Emil Dahl Juhl <emil@s16s.ai>
2025-11-14 12:19:10 +02:00
Emil Dahl Juhl
e732c973c5 dsp: utils: slim down includes
The dsp/utils.h header itself only uses dsp/types.h and doesn't need the
entire dsp/dsp.h.

This also facilitates using the dsp/utils.h in builds that don't enable a
dsp backend at all which can be convenient for sensor drivers where the
q31_t dsp type is used.

Signed-off-by: Emil Dahl Juhl <emil@s16s.ai>
2025-11-14 12:19:10 +02:00
Johan Hedberg
3ab1caa87f Bluetooth: Classic: AVRCP: Fix another Clang/LLVM build failure
subsys/bluetooth/host/classic/shell/avrcp.c:407:3: error: label followed
by a declaration is a C23 extension [-Werror,-Wc23-extensions]
  407 |                 uint64_t identifier;
      |                 ^

Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
2025-11-14 12:19:00 +02:00
Lyle Zhu
46c51cbefe Bluetooth: Classic: BIP: Ensure uncompleted request func consistent
For the uncompleted BIP request, the following BIP request function
should be same with the previous.

Keep the first request function type, and check it with the following
request function type.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:31:16 +02:00
Lyle Zhu
179928a147 Bluetooth: classic: BIP: Check if rsp func is consistent with req's
The response function should be consistent with the function of
request when server responses the request of client.

Check whether the BIP function in the server response function is
consistent with the client request.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:31:16 +02:00
Lyle Zhu
04c2b996a8 Bluetooth: shell: Support BIP SDP record register and discovery
Add command `reg` to register the BIP responder SDP record.

Add command `set_caps`, `set_features`, and `set_functions` to set the
supported capabilities, features, and functions for BIP responder.

Add command `discover` to discovery the BIP responder SDP record. And
parse the response data to get the supported features and functions.

Add command `set_feats_funcs` to set the discovered supported features
and functions.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:31:16 +02:00
Lyle Zhu
b8db23a892 Bluetooth: Classic: SDP: Support BIP profile
Add define `BT_SDP_SUPPORTED_CAPABILITIES` to define supported
capabilities attribute.

Add define `BT_SDP_SUPPORTED_FUNCTIONS` to define supported functions
attribute.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:31:16 +02:00
Lyle Zhu
631bd89dd8 Bluetooth: Classic: BIP: Check features and functions of initiator
Add function `bt_bip_set_supported_capabilities()` to set the
supported caps of responder.

Add function `bt_bip_set_supported_features()` to set the supported
features of responder.

Add function `bt_bip_set_supported_functions()` to set the supported
functions of responder.

Check the supported features of responder when sending OBEX connect
request on initiator side.

Check the supported functions of responder when sending OBEX get/put
request on initiator side.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:31:16 +02:00
Lyle Zhu
270a2e6584 Bluetooth: shell: Add BIP shell commands
Add commands for transport over RFCOMM, including `register-rfcomm`,
`connect-rfcomm`, and `disconnect-rfcomm`.

Add commands for transport over L2CAP, including `register-l2cap`,
`connect-l2cap`, and `disconnect-l2cap`.

Add command `alloc-buf` and `release-buf` to allocate and release TX
buffer.

Add command set `add-header` to add the OBEX headers to allocated TX
buffer.

Add command set `client` to send BIP client requests with allocated
TX buffer.

Add command set `server` to send BIP responses with allocated TX
buffer.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:31:16 +02:00
Lyle Zhu
89fda049bc Bluetooth: classic: Enable BIP features
Add functions to manage BIP transport connect and disconnect both for
l2cap and rfcomm.

Add functions to register and unregister primary and secondary OBEX
servers.

Add functions to send OBEX connect/disconnect request and response.

Add functions to send OBEX get/put request and response with different
type defined by BT_BIP_HDR_TYPE_*.

Add functions to send abort request and response.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:31:16 +02:00
Lyle Zhu
860fb0a96b Bluetooth: classic: OBEX: Fix action id type issue
The OBEX packet cannot be parsed properly if the action ID header is
included in the packet.

It is caused by the value type issue of the action ID. The action ID
type should be `uint8_t` instead of `uint32_t`.

Fix the issue by change action ID value type from `uint32_t` to
`uint8_t`.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:31:16 +02:00
Lyle Zhu
44ef5a8857 Bluetooth: classic: OBEX: Expose function bt_obex_has_header()
The function `bt_obex_has_header()` is used to check whether the
specific header is in the buffer.

It is required by upper layer to check the header from the receiving
buffer.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:31:16 +02:00
Lyle Zhu
99176e86f8 Bluetooth: Classic: OBEX: Expose function bt_obex_string_is_valid()
The `bt_obex_string_is_valid()` is used to check whether the sending
or receiving UTF-16 string is valid or not.

Expose function "bt_obex_string_is_valid()" to support external
checking of UTF-16 strings.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:31:16 +02:00
Lyle Zhu
cf11f71848 Bluetooth: OBEX: Add function bt_obex_add_header_body_or_end_body()
A new function bt_obex_add_header_body_or_end_body() is added to help
to add the body/end body header. When the tail room of the buffer is
more than the passed body room, and the total length of buffer is not
more than the mopl if the body has been added, the header end body
will be added. Or, the header body will be added.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:31:16 +02:00
Parthiban Veerasooran
52b1e8704e drivers: ethernet: phy_microchip_t1s: use 'ret < 0' for error checks
Replace 'if (ret)' with 'if (ret < 0)' in the Microchip T1S PHY driver.
This change follows the legacy coding style commonly used in Zephyr
drivers, where error conditions are checked explicitly against negative
values. The affected functions do not return positive values, so this
modification does not change functionality. No functional change intended.

Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
2025-11-14 10:30:53 +02:00
Parthiban Veerasooran
1843b3126d drivers: ethernet: phy: configure link status control for LAN867x Rev.D0
Configure the link status in the Link Status Control register for
LAN8670/1/2 Rev.D0 PHYs, depending on whether PLCA or CSMA/CD mode
is enabled. When PLCA is enabled, the link status reflects the PLCA
status. When PLCA is disabled (CSMA/CD mode), the PHY does not support
autonegotiation, so the link status is forced active by setting
the LINK_STATUS_SEMAPHORE bit.

The link status control is configured:
- During PHY initialization, for default CSMA/CD mode.
- Whenever PLCA configuration is updated.

This ensures correct link reporting and consistent behavior for
LAN867x Rev.D0 devices.

Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
2025-11-14 10:30:53 +02:00
Parthiban Veerasooran
76034d043b drivers: ethernet: phy: add support for Microchip LAN867X Rev.D0 PHY
Add support for the LAN8670/1/2 Rev.D0 10BASE-T1S PHYs from Microchip.
The new Rev.D0 silicon requires a specific set of initialization
settings to be configured for optimal performance and compliance with
OPEN Alliance specifications, as described in Microchip Application Note
AN1699 (Revision G, DS60001699G – October 2025).
https://www.microchip.com/en-us/application-notes/an1699

Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
2025-11-14 10:30:53 +02:00
Ayush Singh
fcc2932390 boards: beagle: pocketbeagle_2: a53: Enable SPI0 and SPI2
- SPI0 and SPI1 are the default states of these header pins, so enable
  them.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-11-14 10:30:44 +02:00
Ayush Singh
2a4d964600 dts: vendor: ti: k3-am62-main: Add spi
- Add SPI peripherals of main domain.

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-11-14 10:30:44 +02:00
Jani Hirsimäki
9800ff5c47 net: possibility to set custom link layer address length
This commit adds a new Kconfig option NET_LINK_ADDR_CUSTOM_LENGTH
that allows to set custom link layer address length if your link layer
technology is not supported directly. If this option is set to a value
greater than 0, that value is used as link layer address length.

Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
2025-11-14 10:30:35 +02:00
Jani Hirsimäki
f55dacf849 net: ip: new Kconfig NET_MGMT_EVENT_INFO_DEFAULT_DATA_SIZE
The NET_MGMT_EVENT_INFO_DEFAULT_DATA_SIZE is used to set the default
size of the data field in the net_mgmt_event_info structure. This
change allows the user to configure the size of the data field
according to their needs.

Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
2025-11-14 10:30:35 +02:00
Andrew Featherstone
380226b4a9 api: codec: Add support for custom channel identifiers
Follow the convention used elsewhere, e.g. in the sensor API, to allow
users to define their own channel identifiers. This is useful when a
driver's channels don't fit into the predefined set.

Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
2025-11-14 10:30:19 +02:00
Zafer SEN
6fa982854f samples: modem: Add modem at client sample
This PR adds a new sample application demonstrating bidirectional UART
communication between console and cellular modem using the Zephyr modem
subsystem.

 Purpose
- Interactive AT command interface for modem testing
- Transparent bridge for firmware updates via XMODEM
- Reference implementation of uart_pipe + modem_pipe integration

Signed-off-by: Zafer SEN <zafersn93@gmail.com>
2025-11-14 10:30:00 +02:00
Muhammed Asif
fa31cffa0d boards: microchip: pic32cx_sg61_cult: Added clock configurations
Upgrades clock from 48MHz to 120MHz
Configure CPU clock using FDPLL, sourced from XOSC to achieve 120Mhz.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-11-14 10:29:52 +02:00
Muhammed Asif
d838034efd soc: microchip: pic32cx_sg: Add clockcontrol in soc kconfig
Selects the clock control from soc Kconfig file.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-11-14 10:29:52 +02:00
Muhammed Asif
a9878cbf53 dts: arm: microchip: Enhances the clock control capabilities
Add bindings for dfll, fdpll, gclk generator, mclk cpu, osc32k, rtc clock
and xosc for the pic32cx_sg series.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-11-14 10:29:52 +02:00
Muhammed Asif
73cc60a265 dts: arm: microchip: Basic support for clock for pic32cx_sg series
Adds the clock dts nodes and minimal set of binding parameters for using
clock_control driver. It is compatible with same5xd5x series clock.
Hence using the same driver.

Signed-off-by: Muhammed Asif <muhammed.asif@microchip.com>
2025-11-14 10:29:52 +02:00
Jeppe Odgaard
46adf3b1bb drivers: sensor: tach_gpio: fix rpm debug logging
`data->rpm` is a signed value and should be logged as one.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2025-11-14 10:29:43 +02:00
Jeppe Odgaard
97781f8b9d drivers: sensor: tach_gpio: add pulses per round
Add pulses-per-round property.

The driver only measures one pulse and uses pulses-per-round in RPM
calculation.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2025-11-14 10:29:43 +02:00
Lyle Zhu
d14bfb702b Bluetooth: Classic: HFP: Terminate outgoing call without alerting
If the outgoing call is not alerted, support the case to terminate the
call when receiving the AT command `AT+CHUP`.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:29:26 +02:00
Lyle Zhu
e61daa9b9b Bluetooth: Classic: HFP_AG: Support Codec mSBC and LC3_SWB
Add kConfig `BT_HFP_AG_CODEC_MSBC` and `BT_HFP_AG_CODEC_LC3_SWB` for
AG to configure the optional Codec IDs.

If the kConfig `BT_HFP_AG_CODEC_MSBC` is enabled, set the feature
`WBS` bit in SDP record.

If the kConfig `BT_HFP_AG_CODEC_LC3_SWB` is enabled, set the feature
`Super WBS` bit in SDP record.

And check the selected Codec ID if it is supported when creating the
SCO connection.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:29:15 +02:00
Lyle Zhu
ebfbe2b754 Bluetooth: Classic: HFP_HF: Set SDP feature bits WBS and Super WBS
According to the HFP V1.9, the SDP feature bit `WBS` should be set if
the mBSC Codec is supported. And the SDP feature bit `Super WBS`
should be set if the LC3-SWB Codec is supported.

Set SDP feature bit `WBS` if the kConfig `BT_HFP_HF_CODEC_MSBC` is
enabled.

Set SDP feature bit `Super WBS` if the kConfig
`BT_HFP_AG_CODEC_LC3_SWB` is enabled.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:29:04 +02:00
Lyle Zhu
dacc2e0051 Bluetooth: Classic: SCO: Fix byte order issue
Change the byte order from CPU to LE16/LE32 for `accept SCO` and
`setup SCO` HCI commands.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:28:43 +02:00
Lyle Zhu
3a2ee4a0e9 Bluetooth: Classic: SCO: Set connect param with default value
In current implementation, the values are fixed for the field
`Max_Latency` and `Retransmission_Effort` of HCI command
`HCI_Setup_Synchronous_Connection` and
`HCI_Accept_Synchronous_Connection_Request`

It cannot work properly with these fixed value. It is better to
set it with default value. And it is determined by the controller.

Set the field `Max_Latency` and `Retransmission_Effort` of HCI
command `HCI_Setup_Synchronous_Connection` and
`HCI_Accept_Synchronous_Connection_Request` with default value.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:28:43 +02:00
Lyle Zhu
6c83e1a240 Bluetooth: Classic: HFP_AG: Configure voice setting
Set the voice setting according to the selected codec ID.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:28:43 +02:00
Lyle Zhu
a42128bf9b Bluetooth: Classic: HFP_HF: Configure voice setting
Add a filed `active_codec_id` to `struct bt_hfp_hf` to keep the
current codec ID. The default value is `BT_HFP_HF_CODEC_CVSD` when
creating the SLC.

Add a filed `neg_codec_id` to `struct bt_hfp_hf` to flag the
negotiated codec ID. When the AT+BCS command is executed without
error, update the `active_codec_id` with `neg_codec_id`.

Pass the properly voice setting with the `active_codec_id` in
function `bt_hfp_hf_sco_accept()`.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:28:43 +02:00
Lyle Zhu
68b1e45cc5 Bluetooth: Classic: SCO: Set voice setting by upper layer
In current implementation, the voice setting of SCO is fixed value
`BT_VOICE_CVSD_16BIT`. It is not aligned with the negotiated codec
id of the HFP.

Add a filed `voice_setting` to `struct bt_sco_chan` that the voice
setting can be configured by upper layer when providing the sco
channel `struct bt_sco_chan`.

Use the `voice_setting` to setup SCO or accept SCO.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:28:43 +02:00
Lyle Zhu
1be50fa46f Include: Bluetooth: Add HCI voice_setting definitions
Add macro `BT_HCI_VOICE_SETTINGS` to assemble the voice_setting

Add macro `BT_HCI_VOICE_SETTING_*_PREP` to set the fields for
voice_setting.

Add macro `BT_HCI_VOICE_SETTING_*_GET` to get the value of the
field from the voice_setting.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:28:43 +02:00
Lyle Zhu
1edaea146e Bluetooth: Classic: HFP_AG: Update ongoing calls early post SLC setup
There is a corner case that the AT command `AT+BTRH?` is received
before processing the ongoing calls after the SLC established. In
this case the invalid response and hold status will be notified,
because the ongoing calls are not processed.

The ongoing calls should be processed as early as possible after the
SLC established.

Support the case by processing the ongoing calls in the context of
SLC established callback.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:28:32 +02:00
Arunprasath P
012d2800d5 tests: comparator: micorchip: Add board overlay file
Add board overlay file for sam_e54_xpro to enable comparator
test cases to run on this board.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-11-14 10:28:22 +02:00
Arunprasath P
055c20e676 boards: microchip: sam_e54_xpro: add Comparator to supported list
Update sam_e54_xpro.yml to include Comparator in the supported
features list.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-11-14 10:28:22 +02:00
Arunprasath P
8b53661096 drivers: comparator: microchip: Add G1 Comparator Driver
Add G1 Comparator driver for Microchip Analog Comparator Peripherals.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-11-14 10:28:22 +02:00
Arunprasath P
5ffed238ea dts: arm: microchip: add dts node and binding file for comparator g1
Add the device tree node and the binding file for
microchip comparator G1 Peripheral.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-11-14 10:28:22 +02:00
Piotr Krzyzanowski
e21ff79f64 tests: drivers: i2c: i2c_nrfx_twim: add nrf54lm20a
Add support for nrf54lm20a board in i2c_nrfx_twim tests

Signed-off-by: Piotr Krzyzanowski <piotr.krzyzanowski@nordicsemi.no>
2025-11-14 10:28:13 +02:00
Chen Xingyu
dff584177b tests: drivers: display: display_check: Add overlay for M5Stack CoreS3-SE
Add a device tree overlay to enable the MIPI-DBI bus on the M5Stack
CoreS3-SE.

The overlay removes SPIM2_MISO_GPIO35 from the pinctrl so that the MISO pin
can be used as the LCD_DC signal.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-11-14 10:27:55 +02:00
Chen Xingyu
e0e3612c36 samples: modules: lvgl: screen_transp: Add overlay for M5Stack CoreS3-SE
Add a device tree overlay to enable the MIPI-DBI bus on the M5Stack
CoreS3-SE.

The overlay removes SPIM2_MISO_GPIO35 from the pinctrl so that the MISO pin
can be used as the LCD_DC signal.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-11-14 10:27:55 +02:00
Chen Xingyu
51a53b0329 samples: modules: lvgl: demos: Add overlay for M5Stack CoreS3-SE
Add a device tree overlay to enable the MIPI-DBI bus on the M5Stack
CoreS3-SE.

The overlay removes SPIM2_MISO_GPIO35 from the pinctrl so that the MISO pin
can be used as the LCD_DC signal.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-11-14 10:27:55 +02:00
Chen Xingyu
479a675d1e samples: subsys: smf: smf_calculator: Add overlay for M5Stack CoreS3-SE
Add a device tree overlay to enable the MIPI-DBI bus on the M5Stack
CoreS3-SE.

The overlay removes SPIM2_MISO_GPIO35 from the pinctrl so that the MISO pin
can be used as the LCD_DC signal.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-11-14 10:27:55 +02:00
Chen Xingyu
1f94025f8d samples: subsys: display: lvgl: Add overlay for M5Stack CoreS3-SE
Add a device tree overlay to enable the MIPI-DBI bus on the M5Stack
CoreS3-SE.

The overlay removes SPIM2_MISO_GPIO35 from the pinctrl so that the MISO pin
can be used as the LCD_DC signal.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-11-14 10:27:55 +02:00
Chen Xingyu
6994e6efda samples: drivers: display: Add overlay for M5Stack CoreS3-SE
Add a device tree overlay to enable the MIPI-DBI bus on the M5Stack
CoreS3-SE.

The overlay removes SPIM2_MISO_GPIO35 from the pinctrl so that the MISO pin
can be used as the LCD_DC signal.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-11-14 10:27:55 +02:00
Chen Xingyu
6b0feda4f4 boards: m5stack: cores3: Add display configuration
The M5Stack CoreS3 and CoreS3-SE are equipped with an ILI9342C SPI LCD
controller. This commit adds the corresponding DTS nodes for it.

Since the display backlight is powered by the AXP2101 regulator, the
regulator driver is enabled by default, and the initialization priorities
of the mipi_dbi and display drivers have been adjusted accordingly.

Note: On the CoreS3-SE, the TF card slot and the ILI9342C display share the
same SPI bus, and the display repurposes the MISO pin as the LCD_DC signal.
In this case, the `mipi_dbi` DTS node is disabled by default. To enable it,
overlay the configuration to remove `SPIM2_MISO_GPIO35` from the pinctrl.

Signed-off-by: Chen Xingyu <hi@xingrz.me>
2025-11-14 10:27:55 +02:00
Pedro André
c0ba4d3ffe drivers: gnss: f9p: fix multiple rtk enabled instances
The U-blox F9P driver uses the GNSS_RTK_DATA_CALLBACK_DEFINE macro to
register a callback for when RTK data is available. This is an issue when
multiple instances of the F9P are available and RTK is enabled since this
macro leads to a naming collision. The following compilation error is
reported:

     error: redefinition of '_gnss_rtk_data_callback__f9p_rtk_data_cb'

This is because GNSS_RTK_DATA_CALLBACK_DEFINE only uses `_callback` to
identify the callback being registered. As a fix, use the recently
introduced GNSS_DT_RTK_DATA_CALLBACK_DEFINE instead, which takes into
account the `_node_id` while naming the callback.

Signed-off-by: Pedro André <pedro@sentrytechnologies.ai>
2025-11-14 10:27:46 +02:00
Pedro André
3138b54f2c drivers: gnss: introduce node based callback macros
The current GNSS_DATA_CALLBACK_DEFINE, GNSS_SATELLITES_CALLBACK_DEFINE and
GNSS_RTK_DATA_CALLBACK_DEFINE macros only utilize `_callback` when naming
the respective callback. This means that if the same callback function is
used more than once, there will be naming conflicts.

In order to allow the same callback function to be used several times for
specific gnss devices, introduce GNSS_DT_DATA_CALLBACK_DEFINE,
GNSS_DT_SATELLITES_CALLBACK_DEFINE and GNSS_DT_RTK_DATA_CALLBACK_DEFINE
macros that take a device tree node identifier instead of a device
reference. This makes it possible to name the callback using both
`_node_id` and `_callback`. Such will uniquely identify any combination of
gnss device and callback.

Signed-off-by: Pedro André <pedro@sentrytechnologies.ai>
2025-11-14 10:27:46 +02:00
Robert Lubos
7e69575614 tests: net: socket: udp: Remove tests numbering
It shouldn't be needed to execute UDP sockets tests in a fixed order
(currently enforced by embedding the test number into the test case
name). In fact, this was only needed, as two test cases worked as
prerequisites for other tests, that should've been done in the setup()
function though.

Therefore, consolidate the two test cases which pre-configured the test
interface into a proper setup() function executed before the test
suite, and get rid of the confusing test case numbering.
There also was a race in TX time test due to incorrect mutex use, so fix
that by using semaphore instead.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-14 10:27:12 +02:00
Robert Lubos
f19e9667b4 tests: net: socket: udp: Add tests for UDP socket rebinding
Verify that UDP socket rebinding works fine for both, client and server
cases.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-14 10:27:12 +02:00
Robert Lubos
4453bfd1c9 net: context: Allow datagram socket rebinding
Rebinding of UDP sockets works just fine and there's really no reason to
disallow it. Keep the restriction for stream sockets only (as our TCP
implementation doesn't support rebinding).

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-11-14 10:27:12 +02:00
Tony Han
f381e59807 tests: drivers: eeprom: api: enable tests for sama7d65_curiosity
Enable tests: tests/drivers/eeprom/api.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-14 10:26:50 +02:00
Tony Han
5c80e261cf boards: microchip: sam: add eeprom node to sama7d65_curiosity dts file
Add the node for on board EEPROM devices. Only the basic compatible
functions implemented. EUI-48 Node Address not added.
Add eeprom to the support list of the board.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-14 10:26:50 +02:00
Sylvio Alves
327954c3ef driver: wifi: esp32: update API interface
Add set_config to allow custom mac address.
Add statistics reset function.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2025-11-14 10:26:42 +02:00
Daniel Leung
65d31ea860 tests: intel_adsp/smoke: cast to signed ints before abs()
xt-clang complains about the clock ratio difference is unsigned
when being fed to abs(), though GCC does not. So type cast that
to signed integer before feeding to abs(). Clock ratio could be
big enough to overflow signed 32-bit integer. So we first cast
it to be a signed 64-bit integer before substraction.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-14 10:26:32 +02:00
Lyle Zhu
b540fde66b bluetooth: Classic: HFP: Set eSCO S4 bit if controller supports SC
The eSCO S4 settings feature should be enabled for CVSD Coding. It is
suggested by the HFP specification.

Set the eSCO S4 Settings Supported bit if the Secure connection is
supported by controller.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 09:26:21 +01:00
Lyle Zhu
1df6111c93 include: Bluetooth: Change return value of BT_FEAT_TEST() to boolean
In current implementation, the return value of `BT_FEAT_TEST()` is not
a boolean type. However, the macro `BT_FEAT_TEST()` is used as a type
with a return type value of boolean.

Change the return type of `BT_FEAT_TEST()` to boolean type to make it
easy to use.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 09:26:21 +01:00
Jordan Yates
1113d3129c disk: sdmmc_stm32: PM handling
Lock the sleep modes while SDMMC is running operations.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-14 10:26:15 +02:00
Kai Cheng
f0f2057316 Bluetooth: SMP: refactor SMP connection type checks
Replace direct conn->type comparisons with connection type helper
functions in SMP module. This includes:

- Update copyright headers to include Xiaomi Corporation
- Replace conn->type == BT_CONN_TYPE_LE with bt_conn_is_le(conn)
- Replace conn->type == BT_CONN_TYPE_BR with bt_conn_is_br(conn)
- Replace bt_conn_is_type(conn, BT_CONN_TYPE_LE | BT_CONN_TYPE_BR)
  with !bt_conn_is_br(conn) && !bt_conn_is_le(conn) for clearer logic
- Replace IS_ENABLED(CONFIG_BT_CLASSIC) && (conn->type == BT_CONN_TYPE_BR)
  with bt_conn_is_br(conn) for simplified condition

This change completes the connection type helper refactoring across
the Bluetooth host stack, improving code consistency and readability.

Signed-off-by: Kai Cheng <chengkai@xiaomi.com>
2025-11-14 10:26:05 +02:00
Kai Cheng
b0505dbf3d Bluetooth: L2CAP: refactor L2CAP connection type checks
Replace direct conn->type comparisons with connection type helper
functions in L2CAP module. This includes:

- Update copyright headers to include Xiaomi Corporation
- Replace IS_ENABLED(CONFIG_BT_CLASSIC) && conn->type == BT_CONN_TYPE_BR
  with bt_conn_is_br(conn) for cleaner code
- Replace conn->type != BT_CONN_TYPE_LE with !bt_conn_is_le(conn)
- Replace chan->conn->type == BT_CONN_TYPE_BR with
  bt_conn_is_br(chan->conn)

This change improves code readability and maintains consistency
with the connection type helper refactoring across the Bluetooth
host stack.

Signed-off-by: Kai Cheng <chengkai@xiaomi.com>
2025-11-14 10:26:05 +02:00
Kai Cheng
0f80444d12 Bluetooth: Core: refactor HCI core connection type checks
Replace direct conn->type comparisons with connection type helper
functions in HCI core module. This includes:

- Update copyright headers to include Xiaomi Corporation
- Replace conn->type != BT_CONN_TYPE_LE with !bt_conn_is_le(conn)
- Replace conn->type == BT_CONN_TYPE_SCO with bt_conn_is_sco(conn)
- Replace conn->type == BT_CONN_TYPE_BR with bt_conn_is_br(conn)
- Replace conn->type == BT_CONN_TYPE_LE with bt_conn_is_le(conn)

This change improves code consistency and maintains the same
refactoring pattern applied across the Bluetooth host stack.

Signed-off-by: Kai Cheng <chengkai@xiaomi.com>
2025-11-14 10:26:05 +02:00
Lyle Zhu
1820e4ed29 Bluetooth: Classic: HFP_AG: Check semicolon character of AT CMD ATD
Check if the received AT command `ATD` is valid. When the semicolon is
missing, return the error.

Remove the semicolon from the received valid data and notify received
number or memory location value.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:25:55 +02:00
Lyle Zhu
93cc24a678 Bluetooth: Classic: HFP_HF: Force ATD cmd to end with semicolon
Only voice calls are supported by HFP specification. And the
semicolon character shall be added when the voice call is originated.

Add the semicolon character to force the ATD command to end with
semicolon character.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-14 10:25:55 +02:00
Alberto Escolar Piedras
54d2ba3433 drivers/counter/counter_native_sim: Remove deprecated
This driver was renamed in
ab7a6de5bb
while the old kconfig options and dts binding were deprecated for 4.2
Let's remove them now.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-14 10:25:41 +02:00
Carles Cufi
ffe2028dcf scripts: runners: Enable reusing the core dry run logic
In order to avoid duplication of logic in runners, allow subclasses
of ZephyrBinaryRunner to set self.dry_run so that they can then reuse
the logic in core.py to log instead of execute.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-11-14 09:25:32 +01:00
Carles Cufi
48e0481746 scripts: runners: Generalize the --dry-run option
Move the argparse.add_argument() call to the abstract base class and
augment the RunnerCaps class with a dry_run parameter.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-11-14 09:25:32 +01:00
Jordan Yates
18a3838e1c tests: zbus: publish_stats: test zbus_chan_pub_stats_data_age
Test the behaviour of `zbus_chan_pub_stats_data_age`.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-14 10:25:20 +02:00
Jordan Yates
a9626ff3ae zbus: helper to query channel data age
Add a helper function to query how old the data in a channel is. Output
is converted to milliseconds as `k_ticks` objects cannot be compared
directly.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-14 10:25:20 +02:00
Yongxu Wang
dfe2c262c8 drivers: firmware: scmi: add cpu info get interface
Add scmi_cpu_info_get API to query CPU information via
NXP SCMI CPU domain protocol.

Retrieves run mode, sleep mode, and reset vector addresses
for the specified CPU ID using CPU_INFO_GET command.

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-11-14 09:25:10 +01:00
Yongxu Wang
28b98c9ae8 drivers: firmware: scmi: add reset vector interface
Add scmi_cpu_reset_vector API for NXP SCMI CPU domain protocol.

This API allows setting CPU reset vector addresses using the
CPU_RESET_VECTOR_SET command. The vector address must point to
the initial address of the vector table

Supports 64-bit addresses and boot/start/resume vector flags.

Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
2025-11-14 09:25:10 +01:00
Johann Fischer
620b7fe02f usb: host: usbip: fix actual_length in USBIP_RET_SUBMIT handling
actual_length needs to be set also for the OUT transfers. Assume that
requested length was transferred when there are no errors.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2025-11-14 10:25:05 +02:00
Johann Fischer
b84b6d9e0a usb: host: usbip: check pool's buffer size USBIP_CMD_SUBMIT
Check that the pool's buffer size is large enough for the data in the
submit command.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2025-11-14 10:25:05 +02:00
Etienne Carriere
8bf93b26d6 drivers: i2s: stm32: clean indentation in instance init macros
Clean indentation in I2S_DMA_CHANNEL_INIT(), I2S_STM32_INIT() macros
of STM32 I2S driver, and SAI_DMA_CHANNEL_INIT() and I2S_STM32_SAI_INIT()
macros of STM32 I2S/SAI driver.

No functional change.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 10:24:56 +02:00
Etienne Carriere
e5aaceebe0 drivers: i2s: stm32: replace UTIL_AND() with IF_ENABLED()
Replace uses of UTIL_AND() with IF_ENABLED() that is far more
readable when initializing or not a structure instance.

No functional change.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-11-14 10:24:56 +02:00
Allen Curtis
26e9ce192d doc: version: document the required fields of VERSION file
Need to clarify what fields are required to successfully build.

Signed-off-by: Allen Curtis <allen.curtis@curtisembedded.com>
2025-11-14 10:24:47 +02:00
Johan Hedberg
445431c779 Bluetooth: Classic: AVRCP: Fix Clang/LLVM build failures
Having variable declarations after labels causes build failures with
Clang/LLVM:

subsys/bluetooth/host/classic/avrcp.c:1269:2: error: label followed by a
declaration is a C23 extension [-Werror,-Wc23-extensions]
 1269 |         uint8_t failed_evt = 0;
      |         ^

/subsys/bluetooth/host/classic/avrcp.c:3809:3: error: label followed by a
declaration is a C23 extension [-Werror,-Wc23-extensions]
 3809 |              uint64_t identifier = sys_get_be64(data->identifier);
      |              ^

Fix these by moving the declarations to the top of the function in the
first case and add braces for the second.

Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
2025-11-14 10:24:38 +02:00
Jilay Pandya
c9536e65c7 drivers: stepper: tmc22xx: move to driver specific folder
tmc51xx and tmc50xx have already been placed in its dedicated folder,
however,tmc22xx is not.

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-11-14 09:23:14 +01:00
Jilay Pandya
015a7c6d3f drivers: stepper: create gpio_stepper folder for h-bridge & step-dir
currently h_bridge_stepper driver is directly placed in drivers/stepper
and step_dir folder contains only gpio specific functionalities. This
commit reorganizes the h_bridge_stepper in gpio_stepper folder to organize
drivers and libs based on functionality.

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-11-14 09:23:14 +01:00
Jilay Pandya
da6e98e479 drivers: stepper: tmc5xxx: move to driver specific folder
tmc51xx has already been placed in its dedicated folder, however,
tmc50xx is not. use absolute path for including tmc_rampgem_template
Kconfig.

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-11-14 09:23:14 +01:00
Neil Chen
31fd167735 boards: nxp/frdm_mcxaxx6: Support trng for NXP frdm_mcxaxx6 board
Support trng for NXP frdm_mcxa366 and frdm_mcxa266 board
Verified tests/drivers/entropy/api

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-11-14 09:22:29 +01:00
Neil Chen
74d4ad70e0 dts: arm/nxp: Add trng nodes to NXP mcxaxx6 dtsi file
Add trng nodes to NXP mcxa366 and mcxa266 dtsi file

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-11-14 09:22:29 +01:00
Neil Chen
201393a2b3 drivers: syscon: update syscon driver to support mcxa trng clock
Add mcxa trng clock support

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-11-14 09:22:29 +01:00
Neil Chen
43ea5fe81f tests: drivers: pwm: pwm_api: enable flexio pwm test on frdm_mcxaxx6
Enable the flexio pwm test on NXP FRDM-MCXA366 and FRDM-MCXA266 board.

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-11-14 09:22:29 +01:00
Neil Chen
17ee480212 boards: nxp/frdm_mcxaxx6: Support flexio for NXP frdm_mcxaxx6 board
Support flexio for NXP frdm_mcxa366 and frdm_mcxa266 board

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-11-14 09:22:29 +01:00
Neil Chen
53a04f28e6 dts: arm/nxp: Add flexio node to NXP mcxaxx6 dtsi file
Add flexio node to NXP mcxa366 and mcxa266 dtsi file

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-11-14 09:22:29 +01:00
Neil Chen
6a423fc6e9 drivers: syscon: update syscon driver to support mcxa flexio clock
Add mcxa flexio clock support

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-11-14 09:22:29 +01:00
Felipe Neves
01f08e184d boards: witte: linum: add display support
By enabling the LTDC controller and attaching it to
the zephyr, display node

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
2025-11-14 09:22:07 +01:00
Daniel Leung
e45808b9cd xtensa: mmu: add page table usage statistics
Adds function for app to obtain page table usage statistics,
allowing fine tuning of numbers of L1 and L2 page table
array.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-14 09:21:44 +01:00
Daniel Leung
a48345fccf xtensa: mmu/ptables: conserve memory by using COW on L2 tables
When adding new memory domains, we need to start from kernel
page tables by duplicating them. However, there is no need to
duplicate all in-use page tables as some memory regions remain
unchanged. Fror example, hardware register region where only
kernel has access does not need to be duplicated across all
memory domains. The same L2 table can be used among them.
This changes the L2 page table allocation to be copy-on-write
where we only need to duplicate a L2 table if changes need to
be made on it.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-14 09:21:44 +01:00
Daniel Leung
1e41db3ddd xtensa: mmu: no need for cache ops if page tables are not cached
If the page tables are not cached, there is no need to do any
cache ops to flush or invalidate the data in cache. So skip them
if the page tables are not cached. Saves a few CPU cycles.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-14 09:21:44 +01:00
Daniel Leung
501368601d xtensa: mmu/ptables: rework TLB invalidation on L2 unmap
In l2_page_table_unmap(), invalidating TLBs should be limited to
the address and not the whole auto-refill TLBs. Also fix a bug
where the EXEC bit should be determined from the L2 PTE and not
the L1 PTE.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-14 09:21:44 +01:00
Daniel Leung
259be3d559 xtensa: mmu: remove XTENSA_ prefix for page table array macros
Some macros for the page tables array are local to the file so
there is no need to prefix them with XTENSA_. Simplify by
removing the XTENSA_ prefix, and clairfy if needed.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-14 09:21:44 +01:00
Daniel Leung
1470d9ef74 xtensa: mmu: move PTE macros into source file
Almost all page table entry (PTE) related macros are only used
in one source file. These macros are considered the internal
working of MMU. There is no need to expose them in header file
for other to reference. So move them into the source file where
it is only place they are used. Bonus is that we can shorten
the macro names as they are now local to the file. Makes it
easier to read, and few keystrokes to input.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-14 09:21:44 +01:00
Daniel Leung
b6713c0145 xtensa: mmu: skip PTE SW field redirection
This skips the redirection of backup attributes and ring via
some SW field macros, and use the PTE bits directly. Should
make it easier to decode what's going on.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-14 09:21:44 +01:00
Daniel Leung
2bfcb20258 xtensa: mmu: unify PTE macros
The fields in macro should be done with both shift and mask
values to make it clear. So amend some macros so that
the presentation are unified for them.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-14 09:21:44 +01:00
Daniel Leung
f040a738ac soc: cdns/dc233c: linker: add snippets-text-sections.ld
Adds snippets-text-sections.ld to linker scripts. So that
the mem_map test can run on qemu_xtensa/dc233c/mmu.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-14 09:21:44 +01:00
Julien Vermillard
4e54e9a806 net: lwm2m: get cache free slots
Add function to query LwM2M cache free slots on a given path.

Signed-off-by: Julien Vermillard <julien@clunkymachines.com>
2025-11-14 09:20:59 +01:00
Zhaoxiang Jin
0b93c2f8ee tests: on_demand: Add test for P-states order
Ensure that the P-states defined in devicetree for the CPU frequency
scaling on-demand policy are in decreasing order of load thresholds.
This is important because the on-demand policy relies on this order
to select the appropriate P-state based on current CPU load.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-11-13 20:46:01 -05:00
Zhaoxiang Jin
2194069d8d cpu_freq: Validate P-states in devicetree in build time
Validate P-states in devicetree in build time. If no
P-states are defined, a build error will be raised.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-11-13 20:46:01 -05:00
Zhaoxiang Jin
e5c0abb43b doc: cpu_freq: add details about on-demand policy
add details about on-demand policy

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-11-13 20:46:01 -05:00
Zhaoxiang Jin
26f773fb72 cpu_freq: Add fallback mechanism for on-demand policy
In current on_demand policy, if it doesn't find a P-state
with a threshold lower than the current load, it will fail
to switch state. For example, if load went from 100% -> 0%
suddenly as the chip would get stuck in a "turbo mode"
meanwhile its load is low.

This commit add fallback mechanism for on-demand policy,
that is if no P-state matches (i.e., the load is below all
thresholds), the policy will fall back to the P-state with
the lowest load_threshold (typically the lowest performance
state).

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
2025-11-13 20:46:01 -05:00
Lyle Zhu
03e062219a Bluetooth: Classic: shell: hfp: Add command last_number
Add the command `last_number` to set the last dialed phone number.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-13 20:45:50 -05:00
Lyle Zhu
97b4373d9b Bluetooth: Classic: HFP_AG: Add callback redial to get number
If a phone was made during the previous SLC, AG cannot properly
process the redial request sent by HF after reconnecting.

Add a callback `redial` to get the last dial number from the upper
layer when `AT+BLDN` command is received.

If the callback is not provided or the error is returned after the
callback returned, send error response to the HF.

Signed-off-by: Lyle Zhu <lyle.zhu@nxp.com>
2025-11-13 20:45:50 -05:00
Tom Chang
1a8e7f3005 drivers: counter: npcx: add support for lct counter driver
This commit enables configuration and integration of LCT counter by
including relevant source and kconfig files.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2025-11-13 20:45:41 -05:00
Tom Chang
f4d258204a soc: npcx: add lct register definitions
Introduce register structures and macros for the long countdown timer to
support counter functionality in npcx and npck series.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2025-11-13 20:45:41 -05:00
Tom Chang
5dac45d951 dts: counter: npcx: add LCT node and bindings
Introduce bindings for the NPCX LCT hardware counter.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2025-11-13 20:45:41 -05:00
Ayush Singh
66877ec198 boards: beagle: play: Disable internal capacitors
- BeaglePlay has external load capacitors for the 48 MHz crystal. The
  reason for this is described in Radio_01 here [0]. So we should
  disable the internal capacitors.
- I have tested connection between play and bcf with the new play
  settings. For anyone wanting to replicate it, I have used greybus
  loopback protocol [1]. Here is my script:
```
echo 50 > /sys/class/gb_loopback/gb_loopback0/iteration_max
echo 2 > /sys/class/gb_loopback/gb_loopback0/type
sleep 10
cat /sys/class/gb_loopback/gb_loopback0/latency_avg
```
- Results:
  - Before change: 89545.880000 microsec
  - After change: 87822.620000 microsec
- Basically, no regression.

[0]: https://www.ti.com/lit/er/swrz109a/swrz109a.pdf?ts=1761755410798
[1]: https://github.com/zephyrproject-rtos/zephyr/issues/98259

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-11-13 20:45:32 -05:00
Dev Joshi
080734ce0f tracing: rtio: Add tracing hooks for rtio
This commit adds tracing support/hooks for rtio subsystem. It was
requested in #76972.

Signed-off-by: Dev Joshi <devbhave@qti.qualcomm.com>
2025-11-13 20:45:24 -05:00
cyliang tw
1f47d245cd tests: drivers: spi: spi_loopback: support numaker_m3334ki
Add support for Nuvoton numaker board numaker_m3334ki.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-11-13 20:45:15 -05:00
cyliang tw
86ed750ff8 dts: arm: nuvoton: add spi nodes for numaker m333x
Update m333x.dtsi to include spi configuration.
Also fixed warning of not correctly formatted clk-pclkdiv.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
2025-11-13 20:45:15 -05:00
Alberto Escolar Piedras
40dc5b17a8 drivers uart_native_pty: Remove deprecated options & binding
In cb53e40ff9
the uart_native_posix driver was renamed to uart_native_pty while
deprecating the old kconfig options and bidning for the 4.2 release.

Let's remove them now.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-13 20:45:05 -05:00
Alberto Escolar Piedras
62be171fc6 drivers entropy: fake_entropy_native_posix: Remove deprecated
This driver was renamed in
4338122248
while the old kconfig options and dts binding were deprecated for 4.2
Let's remove them now.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-13 20:44:56 -05:00
Erwan SZYMANSKI
873dea03bc boards: st: stm32mp135f_dk: add touchscreen and lvgl pointer
STM32MP135F_DK board embeds a LCD screen with touchscreen driven by I2C5.
GT911 touchscreen already have driver support in Zephyr so just add
necessary nodes here.

Signed-off-by: Erwan SZYMANSKI <erwan.szymanski@st.com>
2025-11-13 20:44:36 -05:00
Alexander Svensen
fa7d9bf09c tests: bluetooth: tester: Fix bis_sink_sync
- Allows the tester to match on either ID or addr
- Previously required that both needed to match, but Auto-PTS is sending
  the wrong address

Signed-off-by: Alexander Svensen <alexander.svensen@nordicsemi.no>
2025-11-13 20:44:02 -05:00
Alberto Escolar Piedras
031a3adaef drivers/ethernet/eth_native_tap: Remove deprecated kconfig options
The old native_posix ethernet was renamed to native_tap in
78f800642a
and its old kconfig options deprecated at the time (in 4.2)
Let's remove them now.

Note in this commit we move the defaults into their right place.
Defaults were set in the deprecated options so we could both
have the defaults and allow users to keep using the old options.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-13 20:43:53 -05:00
Alberto Escolar Piedras
1ad92e5c79 boards native_sim: Remove NATIVE_POSIX_SLOWDOWN_TO_REAL_TIME
The kconfig option NATIVE_POSIX_SLOWDOWN_TO_REAL_TIME was deprecated
in bd42df2662 for the 4.2 release.
Let's remove it now.

Users should be using NATIVE_SIM_SLOWDOWN_TO_REAL_TIME instead.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-13 20:43:44 -05:00
Jonas Berg
a76dfca84a boards: shields: Add Adafruit MCP4728 DAC shield
The product photo is from
https://learn.adafruit.com/assets/86699

Tested with the command mentioned in the index.rst file.

Compile testing of the overlay file is done via the DAC sample.

Signed-off-by: Jonas Berg <jonas.s.t.berg@gmail.com>
2025-11-13 20:43:19 -05:00
Siddhant Modi
904e34c41a drivers: sdhc: sdhc_spi: Adding support for cd_gpio
1. This commit adds support for the cd-gpios property
   to the dts binding for the sdhc_spi driver.
2. The _init function is updated to initialize the GPIO
   pin if it is found.
3. The _get _card_present function is updated to check
   the GPIO pin state if the pin has been initialized.

Signed-off-by: Siddhant Modi <siddhant.modi@gmail.com>
2025-11-13 20:43:12 -05:00
Triveni Danda
0186d123e8 doc: wifi: Add server certificate domain validation instructions
Add instructions for verifying the authentication server’s certificate
domain using exact domain match and domain suffix match options.

Signed-off-by: Triveni Danda <triveni.danda@nordicsemi.no>
2025-11-13 20:42:52 -05:00
Triveni Danda
b4e2cd139b net: l2: wifi: Handle domain match and suffix match parameters
Add support to handle domain match and suffix match parameters
for proper server certification validation.

Signed-off-by: Triveni Danda <triveni.danda@nordicsemi.no>
2025-11-13 20:42:52 -05:00
Triveni Danda
b708f3d04b manifest: hostap: Enable server certificate verification
Enable hostname validation for server certificate verification.

Signed-off-by: Triveni Danda <triveni.danda@nordicsemi.no>
2025-11-13 20:42:52 -05:00
Albort Xue
e6efe0f217 drivers: flash: Optimize mcux_flexspi_nor erase for unaligned operations
Improve erase efficiency by using a hybrid approach that combines block
and sector erase operations.
The new implementation:
- Erases unaligned sectors at the start until block-aligned
- Erases whole blocks in the middle protion
- Erases remaining sectors at the end.

Signed-off-by: Albort Xue <yao.xue@nxp.com>
2025-11-13 20:42:39 -05:00
Grzegorz Chwierut
9953f330cc doc: twister: Document extra serial port
Update documentation for using multiple serial ports
with Twister's --devise-serial option.

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2025-11-13 20:42:31 -05:00
Grzegorz Chwierut
c542b258db samples: sysbuild: hello_world: Get second UART from Twister params
Use --device-serial command line option to specify multiple serial
ports. Split test into two separate test functions.

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2025-11-13 20:42:31 -05:00
Grzegorz Chwierut
b33387c44a scripts: twister: Add support for passing extra serial port to pytest
Extend twister's device serial handling to support multiple serial ports
for pytest-based tests. This enables testing scenarios that require
communication with multiple UART interfaces on the same device.
This enhancement enables comprehensive testing of multi-UART devices
while maintaining backward compatibility with single serial setups.

Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
2025-11-13 20:42:31 -05:00
Xavier Razavet
76a102a8bd drivers: ieee802154: mcxw_get_eui64() updated to manage MAC address
The mcxw_get_eui64() function allows to provide a persistent MAC
address if it does not exist

Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
2025-11-13 20:42:22 -05:00
Xavier Razavet
fbadac59fe samples: openthread: shell: prj-ot-host.conf file updated
Settings configuration is removed in the
zephyr/samples/net/openthread/shell/prj-ot-host.conf file.
No more used.

Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
2025-11-13 20:42:22 -05:00
Xavier Razavet
ec982e6408 boards: nxp: frdm_mcxw71: update flash code/hw_params/storage allocation
This commit add 1K for the hardware parameters (at the end of the flash)
and reduces the storage to 111k. It is used, first, to store the MAC
address.

Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
2025-11-13 20:42:22 -05:00
Xavier Razavet
372341d4c5 boards: nxp: mcxw72: update flash code/hw_params/storage allocation
This commit add 1K for the hardware parameters (at the end of the
flash) and reduces the storage to 15k. It is used, first, to store
the MAC address.

Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
2025-11-13 20:42:22 -05:00
Holt Sun
47dcc246e0 boards: nxp: frdm_mcxe247: enable rtc.
1.enable rtc_counter for frdm_mcxe247.
2.fix some format issue of mcxe247 dts.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-11-13 20:41:39 -05:00
Holt Sun
2e02d29295 boards: nxp: frdm_mcxe31b: enable rtc device.
1. enable RTC and rtc-counter alias for
frdm_mcxe31b.
2. enable sample driver counter alarm.
3. enable sample driver rtc.
4. enable counter_basic_api test.
5. fix misc mcxe31b dts format error.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-11-13 20:41:39 -05:00
Holt Sun
87f8264c65 drivers: counter: add counter driver for NXP E31B.
add counter rtc jdp driver for MCXE31B.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-11-13 20:41:39 -05:00
Holt Sun
11c9176ad6 dts: bindings: rtc: add NXP RTC JDP binding.
rtc jdp binding is for NXP E31B device RTC.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-11-13 20:41:39 -05:00
Holt Sun
9e0cfb7b25 drivers: rtc: rtc_counter driver improvement.
Existing rtc_counter driver only support
frequency equaling 1 Hz, update it to support
any frequency.

Signed-off-by: Holt Sun <holt.sun@nxp.com>
2025-11-13 20:41:39 -05:00
Qingsong Gou
64d0f3faf3 drivers: clock_control: sf32lb: add get_rate support
Add get_rate support for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-13 20:41:27 -05:00
Seppo Takalo
9acbcadfda modem: cmux: Define encoding and decoding functions for commands
Instead of relying non-standard compiler behavior, define
encode and decode functions for all CMUX command structures.

Final command is encoded into a shared buffer, because it is
always copied directly to TX ringbuffer.

Added also functions to validate commands.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-11-13 20:41:17 -05:00
Fin Maaß
402c66a5e1 arch: riscv: vexriscv: add VexRiscv cache driver
add driver for VexRiscv CPU cache controller.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-11-13 20:41:07 -05:00
Fin Maaß
a6858f6bc4 dts: bindings: vendor-prefixes: Add spinalhdl prefix
Add SpinalHDL vendor prefix.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-11-13 20:41:07 -05:00
Daniel Kampert
6ff7a9ec5e sensors: apds9306: Fix typos in APDS9306 macros
- Ensure consistent naming conventions for better readability

Signed-off-by: Daniel Kampert <DanielKampert@kampis-elektroecke.de>
2025-11-13 20:40:53 -05:00
Daniel Kampert
dcbdfea6e7 sensors: apds9306: Add Multi-Instance Support
- Add multi-instance support to the APDS9306 ambient light sensor driver
- Replace global worker item with instance-specific worker item

Closes #97893

Signed-off-by: Daniel Kampert <DanielKampert@kampis-elektroecke.de>
2025-11-13 20:40:53 -05:00
Siratul Islam
11dca1208a boards: xtensa: add support for DOIT ESP32 DevKit V1
This patch adds support for the DOIT ESP32 DevKit V1, an entry-level
development board based on the ESP32-WROOM-32.

Main features:
- ESP32-WROOM-32 module (4 MB Flash, 520 KB SRAM)
- Dual-core Xtensa LX6 processor up to 240 MHz
- 802.11b/g/n Wi-Fi and Bluetooth v4.2 BR/EDR + BLE
- CP2102 USB-to-UART bridge
- Onboard blue LED connected to GPIO2
- All GPIO pins exposed on 2x15 pin headers

The board has been tested with the following Zephyr samples:
- samples/basic/blinky
- samples/hello_world

Signed-off-by: Siratul Islam <sirat4757@gmail.com>
2025-11-13 20:40:43 -05:00
Alexandre Boeglin
23a92a6ec8 usb: device_next: cdc_acm: Trigger TX on configuration enable
When CDC ACM instance gets enabled and there is some data in TX FIFO,
the TX FIFO work will not be triggered if no UART API is used. And if TX
FIFO was full before CDC ACM instance get enabled, TX work will never be
triggered. To fix it TX FIFO should always be drained when CDC ACM gets
enabled.

Signed-off-by: Alexandre Boeglin <alexandre.boeglin@qorvo.com>
2025-11-13 20:39:13 -05:00
Yanan Yang
a3fc3f4d93 boards: frdm_imx91: add sai3_2 and edma4_2 node for i2s_mcux_sai driver
add sai3_2 and edma4_2 node for use with i2s_mcux_sai driver

Signed-off-by: Yanan Yang <yanan.yang@nxp.com>
2025-11-13 20:39:01 -05:00
Yanan Yang
bb8b6d79cb dts: arm64: imx9131: add sai3_2 and edma4_2 node for i2s_mcux_sai driver
add sai3_2 and edma4_2 node for use with i2s_mcux_sai driver

Signed-off-by: Yanan Yang <yanan.yang@nxp.com>
Fix the indent format issue.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2025-11-13 20:39:01 -05:00
Yanan Yang
278a2792de boards: frdm_imx93: add sai3_2 and edma4_2 node for i2s_mcux_sai driver
add sai3_2 and edma4_2 dts node for use with i2s_mcux_sai driver

Signed-off-by: Yanan Yang <yanan.yang@nxp.com>
2025-11-13 20:39:01 -05:00
Yanan Yang
8e5956a5fb boards: imx93_evk: add sai3_2 and edma4_2 node for i2s_mcux_sai driver
add sai3_2 and edma4_2 dts node for use with i2s_mcux_sai driver

Signed-off-by: Yanan Yang <yanan.yang@nxp.com>
2025-11-13 20:39:01 -05:00
Yanan Yang
33a8b00ad1 dts: arm64: imx93: add sai3_2 and edma4_2 node for i2s_mcux_sai driver
Add sai3_2 and edma4_2 dts node for use with i2s_mcux_sai driver.

Signed-off-by: Yanan Yang <yanan.yang@nxp.com>
Fix indent format issue.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2025-11-13 20:39:01 -05:00
Hou Zhiqiang
bf68a487a0 drivers: i2s: i2s_mcux_sai: add i.MX9 platform support
Rework the driver to support i.MX9 platforms.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Yanan Yang <yanan.yang@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2025-11-13 20:39:01 -05:00
Hou Zhiqiang
f60ab24b71 drivers: i2s: mcux_sai: set the Bit Clock Swap on the feature enabled
When the platform has the Bit Clock Swap feature, enable it.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2025-11-13 20:39:01 -05:00
Hou Zhiqiang
59a54b8d98 drivers: i2s: mcux_sai: fix the type of var num_of_bufs
Correct the type of num_of_bufs to uint32_t.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2025-11-13 20:39:01 -05:00
Yanan Yang
d3f3c2c3a1 drivers: i2s: i2s_mcux_sai: use device model MMIO mapping
Change to use device model MMIO mapping APIs.

Signed-off-by: Yanan Yang <yanan.yang@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Fix CI failures: Clean unused code
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2025-11-13 20:39:01 -05:00
Hou Zhiqiang
afe524e5f9 drivers: i2s: mcux_sai: correct DMA burst length
The burst length should be initialized with 'word_size_bits'.

Signed-off-by: Yanan Yang <yanan.yang@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2025-11-13 20:39:01 -05:00
Hou Zhiqiang
05b81be7b2 drivers: mcux_ccm_rev2: fix code format
Remove extra space between the '=' and rvalue.

Signed-off-by: Yanan Yang <yanan.yang@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2025-11-13 20:39:01 -05:00
Yanan Yang
021afed04f drivers: mcux_ccm_rev2: add SAI clock support for i.MX9 platform
add SAI clock support for i.MX9 platform

Signed-off-by: Yanan Yang <yanan.yang@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Fix CI failure: LEADING_SPACE: please, no spaces at the start of a line
Split code format fixing into a new patch
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2025-11-13 20:39:01 -05:00
Yanan Yang
928fa39911 drivers: dma: dma_mcux_edma: enable MMIO mapping
Enable MMIO mapping in dma_mcux_edma driver

Signed-off-by: Yanan Yang <yanan.yang@nxp.com>
2025-11-13 20:39:01 -05:00
Hou Zhiqiang
d3646421af boards: frdm_imx91: fix board dts and pinctrl dtsi format issue
Compliance check reports some format issue, so fix it.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2025-11-13 20:39:01 -05:00
Yuriy Vynnychek
a48924495e board: infineon: kit_t2g_b_h_evk: new board basic support
Add new board basic support: dts, kconfig, defconfig, openocd and doc.

Signed-off-by: Yuriy Vynnychek <Yuriy.Vynnychek-EE@infineon.com>
2025-11-13 20:38:52 -05:00
Yuriy Vynnychek
bc02c2ca12 board: infineon: kit_t2g_b_h_lite: new board basic support
Add new board basic support: dts, kconfig, defconfig, openocd and doc.

Signed-off-by: Yuriy Vynnychek <Yuriy.Vynnychek-EE@infineon.com>
2025-11-13 20:38:52 -05:00
Yuriy Vynnychek
06b5198b3a soc: infineon: xmc7200: extend CYT4BFxx MPNs support
- Add Cortex M0+, M7(0) and M7(1) selection.
- Add TEQFP_176 and BGA_320 package support.

Signed-off-by: Yuriy Vynnychek <Yuriy.Vynnychek-EE@infineon.com>
2025-11-13 20:38:52 -05:00
Yuriy Vynnychek
a315736533 dts: infineon: xmc7200: fix wrong Flash and SRAM namings
Fix wrong case when Flash was called "data" and SRAM was called "code".
Rename Flash to "code" and SRAM to "data".

Signed-off-by: Yuriy Vynnychek <Yuriy.Vynnychek-EE@infineon.com>
2025-11-13 20:38:52 -05:00
Afonso Oliveira
0cdc464285 riscv: add Smcsrind indirect CSR access extension support
Add support for the RISC-V Smcsrind extension, which provides
indirect access to CSRs through the MISELECT and MIREG registers.

Changes:
- Added CONFIG_RISCV_ISA_EXT_SMCSRIND Kconfig option
- Implemented 4 helper functions for indirect CSR access:
  * icsr_read/write - basic access
  * icsr_read_set/clear - bit manipulation
- Defined 7 CSR registers (MISELECT, MIREG, MIREG2-6)

This is a CSR-only extension that does not require any compiler
support or march flags. The helper functions compile to standard
CSR instructions and work with any toolchain that supports Zicsr.

Primary use case: RISC-V AIA (Advanced Interrupt Architecture)
uses indirect CSRs to access IMSIC (Incoming MSI Controller)
registers.

Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
2025-11-13 20:38:38 -05:00
Utsav Munendra
3b09b09609 doc: release: Note changes to flash_mspi_nor
Note that read, write and control commands can be configured
separately via devicetree now.

Signed-off-by: Utsav Munendra <utsavm@meta.com>
2025-11-13 20:37:44 -05:00
Utsav Munendra
c696414f8f driver: flash_mspi_nor: Allow specific read/write IO modes and frequencies
The driver currently provides no way to use Dual IO Read and Single IO
for the rest of the commands currently, and would erroneously use
Single IO PP command in Dual IO mode. This PR fixes and adds
support for that.

Signed-off-by: Utsav Munendra <utsavm@meta.com>
2025-11-13 20:37:44 -05:00
Utsav Munendra
eae12761e1 drivers: flash_mspi_nor: Remove bool tracking of target IO mode
Remove the Boolean tracking of MSPI IO mode as we can now rely on
tracking the entire dev config applied to the MSPI device, multiple
of which will exist in later commits.

Signed-off-by: Utsav Munendra <utsavm@meta.com>
2025-11-13 20:37:44 -05:00
Utsav Munendra
abd35f88a7 drivers: flash_mspi_nor: Flash control commands to use their own configs
Also in preparation for allowing control command frequency to be
different from the read/write frequency and initialization frequency.

Signed-off-by: Utsav Munendra <utsavm@meta.com>
2025-11-13 20:37:44 -05:00
Utsav Munendra
8bc4a92397 drivers: flash_mspi_nor: Track last applied MSPI config
Instead of just tracking in a bool whether the MSPI device is in
Standard MSPI vs. QPI/OPI config, track the entire MSPI config which was
last applied. This makes it easier later to track more than two configs
to apply based on the next command to transceive.

Signed-off-by: Utsav Munendra <utsavm@meta.com>
2025-11-13 20:37:44 -05:00
Utsav Munendra
41988ae62f drivers: flash_mspi_nor: Simplify perform_xfer function
Remove unnecessary function argument, makes later commits also simpler.

Signed-off-by: Utsav Munendra <utsavm@meta.com>
2025-11-13 20:37:44 -05:00
Cla Mattia Galliard
6044262f42 log: output: log thread priority
When logging thread names also log their priorities.

Signed-off-by: Cla Mattia Galliard <clamattia@gmail.com>
2025-11-13 20:37:31 -05:00
Qingsong Gou
6a66a0725e boards: sifli: sf32lb52_devkit_lcd: enable rtc
enable rtc on sf32lb52_devkit_lcd board

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-13 20:37:06 -05:00
Qingsong Gou
cbe5dabd64 drivers: rtc: add rtc driver for sf32lb
add rtc driver for sf32lb platform

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-13 20:37:06 -05:00
Qingsong Gou
b9900e6157 dts: arm: sifli: sf32lb: fix sifli,sf32lb-rtc
Add sifli,cfg for sifli,sf32lb-rtc

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-13 20:37:06 -05:00
Qingsong Gou
0a1214bc82 dts: bindings: rtc: fix sifli,sf32lb-rtc
Add sifli,cfg for sifli,sf32lb-rtc

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-13 20:37:06 -05:00
Firas Sammoura
8a23eff9f6 tests: riscv: Add unit tests for clearing unlocked PMP entries
Adds a new test suite to verify the behavior of `riscv_pmp_clear_all()`.
These tests ensure that the function correctly clears all unlocked PMP
entries while preserving any entries that are locked.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-11-13 20:36:55 -05:00
Firas Sammoura
9dc3906cd3 arch: riscv: Add z_riscv_pmp_clear_all() to reset PMP entries
Introduce the new function `riscv_pmp_clear_all()` to reset the Physical
Memory Protection (PMP) configuration.

This function iterates through all configured PMP slots. For each entry,
it writes 0x0 to the entry's 8-bit configuration register. This action
attempts to clear all fields, including the Address Matching Mode (A) bits
(setting the region type to OFF), the permission bits (R, W, X), and
the Lock (L) bit.

According to the RISC-V specification, any writes to the configuration
or address registers of a locked PMP entry are ignored. Thus, locked
entries will remain unchanged, while all non-locked entries will be
effectively disabled and their permissions cleared.

The function ensures it operates in Machine mode with MSTATUS.MPRV = 0
and MSTATUS.MPP = M-mode before modifying any PMP Control and Status
Registers (CSRs).

This provides a mechanism to clear all non-locked PMP regions,
returning them to a default disabled state. The function declaration is
exposed in the `include/zephyr/arch/riscv/pmp.h` header file, making it
available for inclusion and use by external modules.

It is recommended for firmware to call this function before transitioning
from a Read-Only (RO) stage to a Read-Write (RW) stage. This ensures
that any PMP settings established during the RO phase, which might no
longer be appropriate, are cleared, providing a clean and secure base
PMP configuration for the RW firmware.

Signed-off-by: Firas Sammoura <fsammoura@google.com>
2025-11-13 20:36:55 -05:00
Marcio Ribeiro
cb433ace2e samples: boards: espressif: add retained_mem api to deep_sleep sample
Adds retained_mem api to espressif deep_sleep sample and enables it for the
following platforms:
- esp32_devkitm/esp32/procpu
- esp32c3_devkitm
- esp32c6_devkitc/esp32c6/hpcore
- esp32h2_devkitm
- esp32s2_devkitc
- esp32s3_devkitm/esp32s3/procpu

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2025-11-13 20:36:45 -05:00
Marcio Ribeiro
7d531cb712 tests: drivers: retained_mem: enable api test for espressif platforms
Enables retained_mem api test using RTC RAM for the following platforms:
- esp32_devkitc/esp32/procpu
- esp32c3_devkitm
- esp32c6_devkitc/esp32c6/hpcore
- esp32h2_devkitm
- esp32s2_devkitc
- esp32s3_devkitm/esp32s3/procpu

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2025-11-13 20:36:45 -05:00
Marcio Ribeiro
378829fc69 boards: espressif: add support for retained_mem on espressif platforms
Adds support for retained_men on the following platforms:
- esp32_devkitc/esp32/procpu
- esp32_ethernet_kit/esp32/procpu
- esp32c3_devkitc
- esp32c3_devkitm
- esp32c3_rust
- esp32c6_devkitc/esp32c6/hpcore
- esp32h2_devkitm
- esp32s2_devkitc
- esp32s2_saola
- esp32s3_devkitc/esp32s3/procpu
- esp32s3_devkitm/esp32s3/procpu
- esp32s3_eye/esp32s3/procpu
- esp_wrover_kit/esp32/procpu

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2025-11-13 20:36:45 -05:00
Marcio Ribeiro
3d43f75701 soc: espressif: add region description for rtc ram memory
Adds separate memory regions for rtc ram memory areas and reworks linker
scripts to make use of their starting addresses and lengths

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2025-11-13 20:36:45 -05:00
Jordan Yates
764b0fa60f charger: bq2518x: configurable battery limits
Make the battery undervoltage and over-discharge limits configurable
from devicetree.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 20:36:35 -05:00
Jordan Yates
831c8a7e48 charger: bq2518x: more configuration options
Add configuration for the VSYS target regulation voltage.

Explicitly specify the threshold at which charging will resume, instead
of deriving it from the combination of two devicetree properties which
have no compile-time validation.

Simplify the process of initialising the chip by precomputing the
register values and explicitly writing the whole register, instead of
updating multiple fields individually.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 20:36:35 -05:00
Jordan Yates
212cabd27a charger: bq2518x: restrict precharge values in devicetree
Instead of text in the description that specifies the valid values,
add the `enum` property so values are validated at compile time.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 20:36:35 -05:00
Jordan Yates
4bc7aa312e tests: drivers: build_all: charger: bq2518x variants
Add the `ti,bq25186` and `ti,bq25188`` to the build all test.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 20:36:35 -05:00
Jordan Yates
833cbd8af8 charger: bq2518x variants
Add support for the bq25186 and bq25188 chip variants.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 20:36:35 -05:00
Jordan Yates
c881deabd8 charger: bq25180: rename to bq2518x
Rename the bq25180 implementation and files to the more generic bq2518x.
This charger family contains the bq25180, bq25186, bq25188 and the
standalone (non-I2C) bq25185.

The register maps are practically identical, so the driver should be
re-used.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 20:36:35 -05:00
Omkar Kulkarni
e6ba8a6ade Bluetooth: Mesh: Test network cache improvement
Adds a test that checks that the network message cache differentiates
between PDUs with the same SRC and SEQ but different NetKey Index.

Signed-off-by: Omkar Kulkarni <omkar.kulkarni@nordicsemi.no>
2025-11-13 20:36:24 -05:00
Omkar Kulkarni
22e37982cb Bluetooth: Mesh: Make net msg cache netkey aware
Improve the network message cache to be aware of network keys to
prevent false duplicate detection across different subnets. This
ensures that messages with the same source address and sequence
number but from different network keys are not incorrectly
identified as duplicates, as it can happen in certain cases.
See ES-26350.

Signed-off-by: Omkar Kulkarni <omkar.kulkarni@nordicsemi.no>
2025-11-13 20:36:24 -05:00
Qingsong Gou
5c52f25f5a drivers: input: add ft6146 driver
add initial driver for ft6146

Signed-off-by: Qingsong Gou <gouqs@hotmail.com>
2025-11-13 20:36:08 -05:00
Arunprasath P
1f999e5609 boards: microchip: sam_e54_xpro: add DMA to supported list
Update sam_e54_xpro.yml to include DMA in the supported
features list.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-11-13 20:35:43 -05:00
Arunprasath P
aa6414f09b drivers: dma: microchip: Add G1 DMA Driver
Add G1 DMA driver for Microchip DMA Peripherals.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-11-13 20:35:43 -05:00
Arunprasath P
1c4e15df78 dts: arm: microchip: add dts node and binding file for dma g1
Add the device tree node and the binding file for
microchip dma G1 Peripheral.

Signed-off-by: Arunprasath P <arunprasath.p@microchip.com>
2025-11-13 20:35:43 -05:00
Make Shi
aca9ae2814 Bluetooth: AVRCP: Implement full support vendor-dependent commands
Add full support for all remaining AVRCP vendor-dependent PDUs on both
Controller (CT) and Target (TG), including APIs, callbacks, and shell
commands for testing.

Signed-off-by: Make Shi <make.shi@nxp.com>
2025-11-13 20:35:28 -05:00
Make Shi
8572ec9cf3 Bluetooth: AVRCP: Add Player app Settings vendor-dependent commands
Implement support for AVRCP Player app Settings PDUs on both CT/TG
- Added APIs for sending and handling commands like LIST_ATTRS,
   LIST_VALS, GET_CURR_VAL, SET_VAL, and related text/inform PDUs.
- Added callbacks for TG request handling and CT response processing.
- Add shell commands for Player app Settings commands testing.

Signed-off-by: Make Shi <make.shi@nxp.com>
2025-11-13 20:35:28 -05:00
Make Shi
c0c5a25158 Bluetooth: AVRCP: Add support for notification events
This patch adds AVRCP notification event handling for both CT and
TG roles. Also add Shell command support for testing notification
registration and responses.

Signed-off-by: Make Shi <make.shi@nxp.com>
2025-11-13 20:35:28 -05:00
Make Shi
7008f0eaf3 bluetooth: avrcp: Add vendor-dependent with fragmentation support
This patch introduces support for AVRCP vendor-dependent commands and
responses, including full handling of fragmented messages.

- Adds fragmentation and reassembly logic for AVRCP vendor-dependent
- Introduces TX queue management using delayed work for TG
- Adds support for GetCapabilities PDUs
- Add new Kconfig for vendor-dependent with fragmentation support

Signed-off-by: Make Shi <make.shi@nxp.com>
2025-11-13 20:35:28 -05:00
Make Shi
f06e977de3 Bluetooth: AVCTP: Remove redundant length check in avctp_tx_processor
Remove unnecessary checking for net_buf_tailroom(buf) < chunk_size
before sending data in avctp_tx_processor.

Signed-off-by: Make Shi <make.shi@nxp.com>
2025-11-13 20:35:28 -05:00
Arnaud Pouliquen
3c3418822a boards: st: stm32mp135f_dk: add ethernet nodes
The STM32MP135F-DK board embeds 2 ethernets. Enable the ethernet1
in RMII mode with associated PHY.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Signed-off-by: Arif Balik <arifbalik@outlook.com>
2025-11-13 20:35:09 -05:00
Arnaud Pouliquen
6c508cbd52 drivers: ethernet: stm32: add support of the stm32mp13
Add the support of the stm32mp13 ethernet:
- Adapt to HAL API
- Add support of a memory region in DT for descriptor and buffers
- Add support of PHY with/without crystal 50MHz

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Signed-off-by: Arif Balik <arifbalik@outlook.com>
2025-11-13 20:35:09 -05:00
Arnaud Pouliquen
b05a6f6344 drivers: ethernet: stm32: cleanup deprecated ETH_TxPacketConfig typedef
The typedef ETH_TxPacketConfigTypeDef is used consistently in the driver.
However, some instances of ETH_TxPacketConfig have not yet been replaced.
On the STM32MP13 series, the ETH_TxPacketConfig typedef is no longer
defined. This cleanup ensures compatibility and consistency.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
2025-11-13 20:35:09 -05:00
Arnaud Pouliquen
4e51327722 dts: arm :st: Add ethernet 0 node in stm32mp13
Add the Ethernet 0 MAC and MDIO nodes in the device tree.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Signed-off-by: Arif Balik <arifbalik@outlook.com>
2025-11-13 20:35:09 -05:00
Arnaud Pouliquen
8aacdca78b soc: st: stm32mp13: enable direct memory map
Enable dynamic configuration of region mapping with a 1:1
virtual-to-physical address mapping.
This configuration is aligned with the static declaration of the
MMU table using MMU_REGION_FLAT_ENTRY macro.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
2025-11-13 20:35:09 -05:00
Arnaud Pouliquen
d8e7887ba9 drivers: gpio: invert I2C config dependency for MCP23xxx
The GPIO_MCP230XX config currently depends on the I2C config. This means
that the board/SoC must enable the I2C config to support MCP23xxx devices.
Inverting this dependency allows declaring GPIO_MCP230XX directly in the
board/SoC defconfig without explicitly enabling I2C.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Suggested-by Fin Maaß <f.maass@vogl-electronic.com>
2025-11-13 20:35:09 -05:00
Arnaud Pouliquen
e7a7639d1f drivers: ethernet: add initial support of the LAN8742 PHY
Add basic support of the LAN8742 RMII phy. The driver is inspired
from the phy_mii generic driver, with the support of a GPIO reset.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
2025-11-13 20:35:09 -05:00
Arnaud Pouliquen
7243ba33e3 dts: bindings: ethernet: Add the stm32mp13 bindings
Introduce stm32mp13 bindings to support the ethernet peripherals.
The "memory-regions" property is used to reference non cacheable memory
for the ETH DMA.
The "st,ext-phyclk" property aligned Linux binding is used to specify
the PHY clock for RMII.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
2025-11-13 20:35:09 -05:00
Ayush Singh
9c88612e67 dts: arm: ti: mspm0: l110x: Add uart1
- MSPM0L110x series SOC contain 2 UARTS. So add UART1.
- While all MSPM0L series SOC contain at least 2 UARTs, the address for
  UART1 seems to be different in L222x and L122x (0x4010A000).

Signed-off-by: Ayush Singh <ayush@beagleboard.org>
2025-11-13 20:34:46 -05:00
Jordan Yates
463a6fe8b9 spi: nrfx_spim: cleanup PM usage
Release the PM constraint at the end of the context in which it was
requested (`transceive`), instead of in a semi-related function
(`finalize_spi_transaction`) which is also called by other API functions
(`spi_release`). Asynchronous usage is released in the transaction
complete callback.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 20:34:37 -05:00
Nilesh Vyas
132ab06a3f drivers: display: st7796s: Add display_set_orientation API
This commit adds the implementation for the display_set_orientation API
to the ST7796S display driver.

Currently, the driver lacks support for changing the display orientation
at runtime. This change implements the API to allow for hardware-based
rotation using the MADCTL register.

The implementation was tested on an `rd_rw612_bga` board with a 320x480
display using the ST7796S controller. The API now correctly handles
rotations to 0, 90, 180, and 270 degrees by configuring the MY, MX, and
MV bits of the MADCTL register.

Signed-off-by: Nilesh Vyas <nileshvyas1112@gmail.com>
2025-11-13 20:34:06 -05:00
MA Junyi
2bf29f46df boards: embedsky: add runner bmp for TQ-H503A
Users can choose blackmagicprobe to flash or debug the device,
without needing to set up ST’s customized OpenOCD.

Signed-off-by: MA Junyi <mjysci@live.com>
2025-11-13 20:33:57 -05:00
Khoa Tran
0e0906de0f tests: drivers: disk: Add test support for sdhc on Renesas RA
Add test support for sdhc driver on Renesas ek_ra8m1 and
ek_ra8p1 board:
- tests/drivers/disk/disk_access

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-13 20:33:44 -05:00
Khoa Tran
67fff480d1 samples: subsys: fs: Add sample support for sdhc on Renesas RA
Add sample support for sdhc driver on Renesas ek_ra8m1 and
ek_ra8p1 board:
- samples/subsys/fs/fs_sample

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-13 20:33:44 -05:00
Khoa Nguyen
42a18f3946 boards: renesas: Update supported tag for integration_platforms
Update supported spi and sdhc tag for integration_platforms for
spi and disk test: ek_ra8m1, ek_ra8p1 cm85

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-11-13 20:33:44 -05:00
Khoa Tran
65e2c20b8b tests: drivers: disk: Add tests support for SCI B SPI driver
Add test support using SDMMC card on Renesas RA boards

Add Renesas RA board support for these tests:
- tests/drivers/disk/disk_access

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-13 20:33:44 -05:00
Khoa Tran
06c223686c tests: drivers: sdhc: Add tests support for SCI B SPI driver
Add test support using SDMMC card on Renesas RA boards

Add Renesas RA board support for these tests:
- tests/drivers/sdhc

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-13 20:33:44 -05:00
Khoa Tran
291ef0fccc samples: subsys: fs: Add tests support for SCI B SPI
driver using SDMMC card on Renesas RA boards

Add Renesas RA board support for these samples:
- samples/subsys/fs/fs_sample

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-13 20:33:44 -05:00
Khoa Tran
ef39b92845 tests: drivers: spi: Add tests support for SCI B SPI on RA devices
Add Renesas RA board support for these tests:
- tests/drivers/spi/spi_loopback
- tests/drivers/spi/spi_controller_peripheral

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-13 20:33:44 -05:00
Khoa Tran
504065c8b7 dts: arm: renesas: Add SPI device node to SCI device node
for Renesas RA family

Add SPI device node to support SCI B SPI driver on Renesas RA SoCs:
- ra8x1.dtsi
- ra8x2.dtsi

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-13 20:33:44 -05:00
Khoa Tran
7c529fbd0c drivers: spi: Initial driver support for SCI B SPI on Renesas RA
Add SCI B SPI driver support for Renesas RA

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
2025-11-13 20:33:44 -05:00
Terry Geng
cf3839f5ad drivers: spi: spi_pico_pio: Free sm resources when reconfiguring
When SPI spec is reconfigured, avoid reallocating another sm and properly
free the loaded sm programs before attempting to load new programs.

Fix #94416.

Signed-off-by: Terry Geng <terry@terriex.com>
2025-11-13 20:32:41 -05:00
Michael Smorto
20f6d716a3 drivers: video Add Himax HM0360 camera sensor driver
Adds support for the HM0360 camera.

Signed-off-by: Michael Smorto <CyberMerln@gmail.com>
2025-11-13 20:32:26 -05:00
Sanjay Vallimanalan
9c62d77e99 dts: arm: ti: mspm0: g: Add TRNG node for MSPM0 G series
Add a support for TRNG node for true random number generation.

Signed-off-by: Sanjay Vallimanalan <sanjay@linumiz.com>
2025-11-13 20:31:46 -05:00
Sanjay Vallimanalan
b804a5accc drivers: entropy: mspm0: Add a support for TI MSPM0 TRNG module
TI MSPM0 has a TRNG module to generate truly random bits. Add a support
for TI MSPM0 TRNG module.

Signed-off-by: Sanjay Vallimanalan <sanjay@linumiz.com>
2025-11-13 20:31:46 -05:00
Sanjay Vallimanalan
b34efddb8c dts: bindings: rng: Add bindings for TI MSPM0 TRNG Module
Add bindings for TI MSPM0 TRNG Module.

Signed-off-by: Sanjay Vallimanalan <sanjay@linumiz.com>
2025-11-13 20:31:46 -05:00
Bindu S
e418352112 dts: x86: intel: Added dts changes for spi to support dma for RPL
Added dts changes to support lpss dma for SPI
driver for RPL platform

Signed-off-by: Bindu S <bindu.s@intel.com>
2025-11-13 20:31:31 -05:00
Bindu S
fb954189ee drivers: spi: Added LPSS DMA support for SPI
Enabled intel LPSS DMA interface using dw common to support
usage of internal DMA in LPSS SPI to transfer and
receive data.

Signed-off-by: Bindu S <bindu.s@intel.com>
2025-11-13 20:31:31 -05:00
Tony Han
ee57a95d01 boards: microchip: sam: add CAN to sama7g54_ek dts and yaml file
There's a dual CAN interfce (J17) on sama7g54-ek board.
pin 1~5 siginal: CAN0_H, CAN0_L, GND, CAN1_H, CAN1_L.
The two CAN transceivers are controlled by PIOC15 and PIOC16 GPIOs.
Add CAN to the support list.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:31:14 -05:00
Tony Han
bd15f36928 drivers: can: sam: update the can_sam driver for sama7g5 MCAN
Update the driver (supporting samx7x SOCs) to support sama7g5 MCAN.

Differences lists bellow:
          |           samx7x MCAN           |        sama7g5 MCAN        |
----------|---------------------------------|----------------------------|
CAN core  | the same                        | the same                   |
clock     | peripheral clock with a divider | generic & peripheral clock |
Msg RAM   | address configured by CCFG_CAN0 | in SRAM, configured by SFR |

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:31:14 -05:00
Tony Han
21195f2434 soc: microchip: sam: add clock initialization for sama7g5 MCAN
Initialize MCAN GCLK to 80MHz (divide SYSPLL 400MHz with 5).

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:31:14 -05:00
Tony Han
f2290d1c9c soc: microchip: sam: update MMU for sama7g5 MCAN
When the MCAN is activated in the DT, configure it's register region
with strong ordered, read and write access.
As CANx accesses the lower or upper 64K SRAM is selected by bits in
register 'SFR_CAN_SRAM_SEL', also configure SRAM and SFR region with
strong ordered, read and write access.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:31:14 -05:00
Tony Han
9c43b9d74c dts: microchip: sam: add CAN nodes to sama7g5.dtsi for SAMA7G5 MCAN
The CAN nodes are added to sama7g5.dtsi for SAMA7G5 MCAN.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:31:14 -05:00
Tony Han
3f62a7340a dts: bindings: can: update descriptions for supporting sama7g5 MCAN
Update the descriptions of properties to support sama7g5 MCAN.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:31:14 -05:00
Lukas Woodtli
b2d93b86f4 boards: silabs: Add support for efm32tg_stk3300
Support for the Silabs EFM32TG-STK3300 Starter Kit.

Board features:

* EFM32TG840F32 MCU with 32 kB flash and 4 kB RAM
* Advanced Energy Monitoring
* Real-time, accurate energy and power profiling
* Light, LC and touch sensors
* 8 x 20 LCD
* SEGGER J-Link debugger

Signed-off-by: Lukas Woodtli <woodtli.lukas@gmail.com>
2025-11-13 20:30:55 -05:00
Lukas Woodtli
c53a370c85 soc: Add support for Silabs EFM32TG
* ARM Cortex-M3 processor
* Up to 32 kB Flash and 4 kB RAM memory
* Energy efficient and autonomous peripherals
* Ultra low power Energy Modes
* Fast wake-up

Signed-off-by: Lukas Woodtli <woodtli.lukas@gmail.com>
2025-11-13 20:30:55 -05:00
Tony Han
8876d0ed0c dts: bindings: ethernet-controller: remove unused prop 'max-speed'
The 'max-speed' property in atmel,gmac-common.yaml file is not used,
remove  it.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:30:38 -05:00
Tony Han
3c532c47f0 drivers: net: sam_gmac: add BUILD_ASSERT for checking GMAC_QUEUE_NUM
'GMAC_QUEUE_NUM' is a value of 'num-queues' for the first GMAC
instance getting from the device tree. It is used directly or
indirectly (by GMAC_PRIORITY_QUEUE_NUM) for defining and
initializing 'struct eth_sam_dev_data' with a value from Kconfig
(GMAC_ACTIVE_PRIORITY_QUEUE_NUM).

As there will be a big change for applying the corresponding
num-queues for each GMAC 'struct eth_sam_dev_data', here just
keep it as is. Adding the BUITD_ASSERT to make sure the array
queue_list[] is large enough for all GMAC instances.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:30:38 -05:00
Tony Han
8880364901 drivers: net: sam_gmac: update random MAC addr for multi inst support
Add variable 'random_mac_addr' for 'zephyr,random-mac-address' from
device tree. Update generate_mac() to get random MAC address for each
GAMC interface with the 'zephyr,random-mac-address' property.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:30:38 -05:00
Tony Han
7ff2f53c95 drivers: net: sam_gmac: deprecate the 'mac-eeprom' option
Deprecate the 'ETH_SAM_GMAC_MAC_I2C_EEPROM' for the 'mac-eeprom' option,
Limite it to be used when there's only one activated GMAC instance.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:30:38 -05:00
Tony Han
8b0f8aaa2c drivers: net: sam_gmac: remove getting max_frame_size from DT
As jumbo frame size is not supported by the networking subsystem, only
max_frame_size 1518 and 1536 can be used. The Frame size 1536 would
allow for packets with a vlan tag, so enable GMAC_NCFGR_MAXFS when
NET_VLAN is configured.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:30:38 -05:00
Tony Han
50b3028279 drivers: net: sam_gmac: remove run once check in eth_iface_init()
To allow every interface be initialized properly when there are more than
one instance, remove the static variable "init_done" which is used to make
the initialize procedure only be done once.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:30:38 -05:00
Tony Han
317c67501e drivers: net: sam_gmac: ref_clk_source for multi instances support
Add variable "ref_clk_source" to get and set the source for the GMAC
reference clock from DT for different GMAC instances.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:30:38 -05:00
Tony Han
62732e57e0 drivers: net: sam_gmac: update PHY connection type for multi instances
Add variable "phy_conn_type" to get and use the phy_connection_type from
DT for different GMAC instances.
Update the judgement on phy_connection_type for multi instances support.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:30:38 -05:00
Tony Han
e61c5c0ed1 drivers: net: sam_gmac: update macros for multi GMAC instances support
Change the driver from support 1 instance to support multi instances.

Changes includes:
 - irq_config()
 - config & data definitions
 - ETH_NET_DEVICE_DT_INST_DEFINE
 - PTP content / init / DEVICE_DEFINE

Limitations:
 - generate_mac() to be updated for supporting multi instances.
 - the configurations in Kconfig.sam_gmac are used for all instances.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:30:38 -05:00
Tony Han
fb77401b5c drivers: net: sam_gmac: add var num_queues to config, update LOG info
Changes includes:
 - add the variable for num_queues to eth_sam_dev_cfg
 - update LOG with dev->name to distinguish different instances

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:30:38 -05:00
Tony Han
6536d0d687 drivers: net: sam_gmac: centralize the lists used for different queues
The lists optimized includes:
 - RX descriptors list
 - TX descriptors list
 - RX buffer accounting list
 - TX buffer accounting list
 - TX frames accounting list

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-11-13 20:30:38 -05:00
Jamie McCrae
6963092375 lorawan: Move invalid requirement of 2KiB system workqueue
The LoRaWAN subsystem does not require 2KiB of system workqueue,
testing on nrf54l15 flpr (RISCV) CPU (with custom cryptography code)
shows it uses about 700 bytes of the system workqueue, therefore it
is assumed that the real requirement for 2KiB is the software
cryptography features, not the LoRaWAN stack itself, and the
cryptography parts of LoRaWAN can be replaced with alternatives
that do not need this high of a memory requirement, so the
requirement has been moved to the specific Kconfig for software
cryptography instead

Signed-off-by: Jamie McCrae <spam@helper3000.net>
2025-11-13 23:21:49 +02:00
Ibrahim Abdalkader
a310e57942 llext: Fix ARMv8-M MPU memory region alignment
ARMv8-M and newer ARC MPUs use base/limit addressing with 32-byte
granularity and do not require power-of-two sizing. Only ARMv7-M
and older ARC MPUs have this restriction.

Check CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT (set for ARMv7-M,
older ARC) instead of CONFIG_ARM_MPU to avoid wasting memory on
ARMv8-M systems.

Signed-off-by: Ibrahim Abdalkader <i.abdalkader@gmail.com>
2025-11-13 23:21:27 +02:00
Cristian Bulacu
4520215968 net: l2: openthread: border_router: Delete multicast route by iface
This commit makes use of #98464 and deletes a multicast route by
specified interface.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-11-13 23:21:04 +02:00
Daniel Leung
e63f9fb6de tests: kernel/smp: move switching stress test into its own group
This moves the switching stress test into its own group simply
to signify that there is a group for stress testing. And also
rename torture to stress.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-13 23:20:54 +02:00
Ederson de Souza
d6071319b5 kernel/userspace: Dynamically allocate privileged stack after user stack
When ARM CONFIG_BUILTIN_STACK_GUARD=y, it expects that the privileged
stack has a higher memory address than that of the normal user stack.
However, dynamically allocated stacks had the other way round:
privileged stack had a lower memory address.

This was probably not caught before because relevant tests, such as
`kernel.threads.dynamic_thread.stack.pool.alloc.user` run with no
hardware stack protection. If one were to test it on HW that has stack
protection, such as frdm_mcxn947 with CONFIG_HW_STACK_PROTECTION=y, they
would see it failing.

This patch naively assumes that ARC and RISC-V PMP will be happy with
the shuffling of user and privileged stack positions.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-11-13 23:20:45 +02:00
Ederson de Souza
1a52071392 samples/subsys/llext/edk: Add libc partition to extension memory domain
On platforms where `Z_LIBC_PARTITION_EXISTS` is true - such as Cortex-M
- it is necessary to add this partition to the memory domains of
userspace extensions, otherwise they get memory faults.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-11-13 23:20:34 +02:00
Ederson de Souza
5755081bb3 samples/subsys/llext/edk: Remove astray debug printk
It somehow got upstream...

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2025-11-13 23:20:34 +02:00
Raffael Rostagno
75395b86dc drivers: shdc: esp32: Remove unnecessary timeout
Remove unnecessary timeout. Queue event fetch already has
timeout control.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-11-13 23:20:08 +02:00
Raffael Rostagno
97fb97b047 drivers: sdhc: esp32: Remove pinctrl as required
Adjust driver so that pinctrl property is not required in device
tree. Remove card init functions from driver init, as set_io()
function is meant to power cycle the card (if pin is used) and
initialize card clock and bit width. If card is not inserted
while driver init runs, init() will fail unreasonably, so
card init should take place at set_io() calls.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-11-13 23:20:08 +02:00
Raffael Rostagno
12862fdd6c bindings: sdhc: esp32: Remove pinctrl as required
For ESP32 devices, not all boards are required to configure pinctrl
for signals like Chip Detect (CD) and Write Protect (WP). Remove
pinctrl property as mandatory.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-11-13 23:20:08 +02:00
Declan Snyder
b5de9fe252 tests: spi_loopback: Skip tests properly
There is a couple test cases which for whatever reason does not work on
certain platform drivers, and they are being hardcoded to be skipped in
the test if using those drivers. This decision was made a long time ago,
and I do not have great insight into why, but regardless, the proper way
to skip a ztest case is to call the proper ztest skip API instead of
just returning, because it should be marked as skipped, not passed.
Also, the problem for these couple drivers is clearly the cases where rx
is bigger than tx, so add the same skip for the other new case where rx
is bigger than tx, the same_buf_cmd case.

After analyzing the DSPI driver a bit, I have a suspicion that this is
just a software driver limitation, that could be overcome to function
properly, and not a hardware limitation. But this commit is just to skip
the test properly that is already being skipped, not fix the underlying
issues with these drivers.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-11-13 23:19:54 +02:00
Cristian Bulacu
5b8b5df90e openthread: platform: udp: init udp fds before external net connection
When OpenThread iface is brought up `ot ifconfig up` there are several
modules that will attempt to open a platform socket and perform bind
and bind to netif operation.
Since now, `sockfd_upd` structure was initialized after the backbone
interface announced connectivity, but this implies that OpenThread
interface will always be brought up only after this event, which is not
true, or imposed.

Signed-off-by: Cristian Bulacu <cristian.bulacu@nxp.com>
2025-11-13 23:19:38 +02:00
Appana Durga Kedareswara rao
639739169e twister: handlers: pass platinfo to serialPTY reorder pre-script execution
This commit makes two key improvements to the DeviceHandler:

1. Pass TWISTER_PLATFORM environment variable to serial PTY scripts
   - Enables serial PTY scripts to access platform-specific configuration
   - The platform name is now available via TWISTER_PLATFORM env variable
   - Allows board-specific serial port and baudrate configuration in
     external serial forwarding scripts

2. Reorder pre-script execution before serial PTY initialization
   - Moved pre-script execution before serial PTY setup to avoid conflicts
   - Prevents race conditions when pre-script performs board power cycling
     or reset operations that might interfere with active serial
     connections

These changes enable more flexible hardware testing scenarios where:
- Serial configuration can be automatically selected based on board type
- Board initialization (power cycling, FPGA programming) completes
  before establishing serial connections

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
2025-11-13 23:19:28 +02:00
Jordan Yates
9251f9d814 doc: llext: document symbol groups
Add documentation for LLEXT symbol groups and the default groups created
by Zephyr.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 23:19:19 +02:00
Jordan Yates
07a791448a llext: add helper symbol for default groups
Add a symbol that controls whether the default set of LLEXT groups are
exported from the application.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 23:19:19 +02:00
Jordan Yates
6582969aa9 device: transition device exports to group symbols
Transition the Zephyr device exports to the new group symbol
abstraction.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 23:19:19 +02:00
Jordan Yates
17611885b2 llext: optional libc symbol exports
Make the export of standard library symbols optional.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 23:19:19 +02:00
Jordan Yates
5e5ac8e078 llext: optional syscall symbol exports
Make the export of syscall symbols optional.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 23:19:19 +02:00
Jordan Yates
47656f1a75 llext: symbol: custom groups
Allow symbols to be placed in custom groups, which can be included or
excluded from the build with a common Kconfig symbol.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 23:19:19 +02:00
Jordan Yates
5561d8d302 llext: symbol: group exported symbols
Group exported symbols together by subsystem/library. Groups can then
be enabled or disabled together through the existance of a Kconfig
symbol named `CONFIG_LLEXT_EXPORT_SYMBOL_GROUP_{GROUP_NAME}`.

All symbols declared with the standard `EXPORT_SYMBOL` and
`EXPORT_SYMBOL_NAMED` macros fall into the `DEFAULT` group.

Signed-off-by: Jordan Yates <jordan@embeint.com>

DEFAULT

DEFAULT
2025-11-13 23:19:19 +02:00
Pieter De Gendt
e9efa7260e include: zephyr: drivers: spi: Add SPI_DT_INST_IODEV_DEFINE
Add helper macro for SPI_DT_IODEV_DEFINE with an instance variant.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-13 23:19:06 +02:00
Pieter De Gendt
6c3048dfa6 include: zephyr: drivers: i3c: Add I3C_DT_INST_IODEV_DEFINE
Add helper macro for I3C_DT_IODEV_DEFINE with an instance variant.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-13 23:19:06 +02:00
Pieter De Gendt
5cbc79f43c include: zephyr: drivers: i2c: Add I2C_DT_INST_IODEV_DEFINE
Add helper macro for I2C_DT_IODEV_DEFINE with an instance variant.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2025-11-13 23:19:06 +02:00
Jeppe Odgaard
ab22130b6a sys: util: remove extra call in WAIT_FOR
WAIT_FOR calls `expr` after it has evaluated to true.

Store `expr` in a variable and return it instead to prevent the additional
`expr` call.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2025-11-13 23:18:54 +02:00
Jeppe Odgaard
ba72ff027c tests: sys_util: test wait_for number of expr calls
Test WAIT_FOR calls `expr` the expected number of times.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2025-11-13 23:18:54 +02:00
Sudan Landge
3cd92d2003 tests: fix test failure for smp targets
The test is expected to run on single cpu so set max number of cpus to 1
so that it doesn't fail smp targets like fvp_baser_aemv8r in ci.

Signed-off-by: Sudan Landge <sudan.landge@arm.com>
2025-11-13 23:18:30 +02:00
Mathieu Choplain
947749abfc linker: llext: move #ifdef CONFIG_LLEXT guard inside common file
LLEXT-related sections should only be added to the linker script when the
associated CONFIG_LLEXT is enabled. This has been done by checking for this
Kconfig symbol in every linker file, but this creates a lot of boilerplate
for no good reason.

Use the much simpler solution: move the check inside the common linker file
and remove existing "#ifdef CONFIG_LLEXT" checks in all linker files.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-13 23:17:37 +02:00
Mathieu Choplain
bfc69ad935 soc: st: stm32l4: always unlock IRQs in pm_state_exit_post_ops
Interrupts would only be unlocked when resuming from suspend-to-idle.
Even though other states *should* never be entered, make sure interrupts
are unlocked anyways to conform with the expectations of the PM framework.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-11-13 23:17:27 +02:00
Ibrahim Abdalkader
93ecfe492f boards: arduino: portenta_h7: Add JLink runner.
Adds JLink runner configuration for both Cortex-M7 and Cortex-M4 cores
on the Arduino Portenta H7.

Signed-off-by: Ibrahim Abdalkader <i.abdalkader@gmail.com>
2025-11-13 23:17:19 +02:00
Seppo Takalo
c309869305 net: l2: ppp: Allow PPP to transtition ESTABLISH->DEAD
When remote peer have closed the PPP link normally, the
PPP stack on Zephyr side switches back to ESTABLISH phase
to be ready for next handshake.

When calling net_if_down() on the interface, it should not
try to initiate LCP link termination, but instead go directly
to DEAD phase.

See https://datatracker.ietf.org/doc/html/rfc1661#section-3.2

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-11-13 23:17:10 +02:00
Tim Lin
60f82e6456 it8xxx2: add support for putting switch.S in ram code section
Get better performance from executing z_riscv_switch() function.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-11-13 23:17:00 +02:00
Fabio Baltieri
00966b857e input: keymap: add a MATRIX_CODE macro
Add a MATRIX_CODE macro to extract the key code from a key value created
in DT with MATRIX_KEY. This can be handy for code other than input_keymap.c

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-11-13 23:16:52 +02:00
Tim Lin
6a340f6ef0 drivers/espi: it8xxx2: Add a config to share h2ram pool space
The h2ram is an independent 4KB section. With default settings of
CONFIG_ESPI_PERIPHERAL_HOST_CMD_PARAM_PORT_NUM and
CONFIG_ESPI_PERIPHERAL_ACPI_SHM_REGION_PORT_NUM,
There is a 2KB gap that is unused. This change was made to make
unused gap can be reused by other modules to reduce overall RAM
usage.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-11-13 23:16:43 +02:00
Qiankun Li
3b2b513be3 drivers: wifi: nxp: Raise Wi-Fi mgmt events for soft AP start/stop.
Enhanced the shim driver to raise Wi-Fi management events
when starting or stopping SoftAP, specifically in cases
where CONFIG_WIFI_NM_HOSTAPD_AP is disabled.

Signed-off-by: Qiankun Li <qiankun.li@nxp.com>
2025-11-13 23:16:25 +02:00
Jamie McCrae
2b52c91c06 cmake: modules: version: Check that required fields are present
Will throw an error showing what the issue with the VERSION file
is if a required field is missing

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-13 23:16:02 +02:00
Torsten Rasmussen
f26d245914 sysbuild: exclude APPLICATION_SOURCE_DIR from sysbuild image cache file
APPLICATION_SOURCE_DIR is image specific and the value inside sysbuild
points to sysbuild itself.

This gives wrong results when a sample uses
`zephyr_get(APPLICATION_SOURCE_DIR)` as it will fetch the sysbuild value
and not its own value.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2025-11-13 23:15:45 +02:00
Alexander Svensen
c4ab06b9c4 tests: bluetooth: tester: Add ASE ID when configuring codec
- We want to add the ASE ID to a stream as early as possible
  to make sure the events coming from BTTester to Auto-PTS
  contains the correct information.
- Previously the events that came before stream_configured
  would contain ASE ID 0, regardless of actual value.

Signed-off-by: Alexander Svensen <alexander.svensen@nordicsemi.no>
2025-11-13 23:15:36 +02:00
Carles Cufi
0d18b50009 include: sys: atomic: Check for ATOMIC_OPERATIONS_BUILTIN
The code today relied on ATOMIC_OPERATIONS_BUILTIN being the default
option if the other alternatives (_C and _ARCH) were not enabled.
Instead, explicitly check for it to avoid confusion when browsing the
code and to ensure that the user can always match a particular Kconfig
option with the #ifdeffery in the header file.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-11-13 23:15:27 +02:00
Carles Cufi
689ba58b10 atomic: Select missing ATOMIC_OPERATIONS_BUILTIN
The ATOMIC_OPERATIONS_* Kconfig option is not a choice, so it does not
have a default. However, the file that determines which actual atomic
operations backend will be used does default to
ATOMIC_OPERATIONS_BUILTIN:

3e537db71e/include/zephyr/sys/atomic.h (L26-L41)

Since we want to ensure that all SoCs intentionally select the atomic
operations backend they want to use, select it at the SoC level for all
SoCs, as well as for the Cortex-M arch when the Armv8-M baseline profile
is selected.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-11-13 23:15:27 +02:00
Alberto Escolar Piedras
07b2a098ef manifest: Update bsim to version v3.0
Main changes since v2.7
* Phy-device v2.1 API introduced
* Phy updated to use internally this v2.1 API, so channel and modem IF
  are updated accordingly

Note: Like before, bsim remains fully backwards compatible

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2025-11-13 23:15:17 +02:00
Patryk Koscik
8b20699475 west: boards: remove arch format option
HWMv2 boards do not support this field

Signed-off-by: Patryk Koscik <pkoscik@antmicro.com>
2025-11-13 23:14:53 +02:00
Luca Burelli
56c3fd8744 fs: ext2: (trivial) only enable logging config when ext2 is enabled
Avoid polluting every build that includes this Kconfig with EXT2
logging config unless the ext2 filesystem is actually enabled.

Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
2025-11-13 23:14:44 +02:00
Szymon Janc
d53a1659ef Bluetooth: ISO: Move iso dereference after assertion
Make sure assertion is true before dereferencing chan->iso. In extreme
case compiler could skip assert check (asume it is always false) if address
was already dereferenced.

Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
2025-11-13 23:14:34 +02:00
Daniel Leung
c7ec8b9353 tests: kernel/pipe_api: skip zero size test if KERNEL_COHERENCE
Zero size buffer pipes are not currently supported if memory is
not coherent between CPUs (CONFIG_KERNEL_COHERENCE=y) due to
possibility of buffers being in incoherent memory. So skip
the zero size test for now.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-11-13 23:14:20 +02:00
Albort Xue
d9196c4714 tests: pm: power_domain: add ISR safe power management test coverage
Add a new test configuration to verify power domain functionality with
ISR safe power management enabled. The test conditionally applies
PM_DEVICE_ISR_SAFE flags to test devices based on the new
CONFIG_TEST_PM_DEVICE_ISR_SAFE configuration option.

Enhance existing test assertions to verify the PD_CLAIMED flag is
properly set when devices claim power domains and cleared when they
release them, ensuring correct power domain reference counting in
both regular and ISR safe contexts.

Signed-off-by: Albort Xue <yao.xue@nxp.com>
2025-11-13 23:13:57 +02:00
Albort Xue
3781f6bf9f pm: device_runtime: fix PD_CLAIMED flag logic in ISR_SAFE context
Fix the power domain claiming condition which was inverted, causing
domains to be claimed when they were already claimed instead of when
they weren't. Add null check for power domain before accessing its
properties to prevent potential null pointer dereference. Also ensure
the PD_CLAIMED flag is properly cleared when putting the power domain.

Signed-off-by: Albort Xue <yao.xue@nxp.com>
2025-11-13 23:13:57 +02:00
Gerhard Jörges
b7d2355dbf west: completion: change skip-rebuild to no-rebuild
the west flash --skip-rebuild option was changed to --no-rebuild in
de6b5dba60

Signed-off-by: Gerhard Jörges <joerges@metratec.com>
2025-11-13 23:13:48 +02:00
Vinicius Carvalho
6efc612e8d drivers: adc: nxp: adc reference and differential channels
Fixed regression related to adc reference and adjusted to be
compatible with NXP K and MCX series.

Signed-off-by: Vinicius Carvalho <carvalho-vinicius@outlook.com>
2025-11-13 23:13:36 +02:00
Jordan Yates
71e242556d drivers: nrf_wifi: move Kconfig validation to Kconfig
Move compile time validation of Kconfig symbols into the symbols
themselves.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 23:12:40 +02:00
Jordan Yates
7fe7beb183 drivers: nrf_wifi: buffers from Kconfig
Remove C code overrides of RX buffer counts and sizes when the TX path
is disabled. Move the reduced resource requirements into the Kconfig
default values. Default RX buffer sizes are not changed by the commit.

Fixes #92356

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-11-13 23:12:40 +02:00
Valerio Setti
032339e5fa random: add description for CONFIG_CSPRNG_ENABLED
Add a short description for CONFIG_CSPRNG_ENABLED to explain its purpose.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-11-13 23:12:29 +02:00
Valerio Setti
263d7c1dbc modules: mbedtls: use CONFIG_CSPRNG_NEEDED to simplify CSPRNG enablement
Use the newly created CONFIG_CSPRNG_NEEDED to simplify the enablement of
CSPRNG for the PSA Crypto Core.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-11-13 23:12:29 +02:00
Valerio Setti
ce4319a2fe random: introduce CONFIG_CSPRNG_NEEDED
Its goal is to use it as the "connection point" between what the hardware
support and what the application needs. All the application/module/subsys
need to do is to set this new Kconfig and then check the "return" value
on CONFIG_CSPRNG_ENABLED: if the latter is set then the entropy driver was
enabled; if not something is preventing the driver from being used.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-11-13 23:12:29 +02:00
Valerio Setti
2cb58f2332 random: improve description of CONFIG_ENTROPY_NODE_ENABLED
Replace the current description with a new one which better clarifies the
scope of this Kconfig.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-11-13 23:12:29 +02:00
Valerio Setti
f95e815a1a random: rename CSPRNG_AVAILABLE to ENTROPY_NODE_ENABLED
The initial goal of CONFIG_CSPRNG_AVAILABLE was to declare that there was
an entropy node declared in the DT so that if CONFIG_ENTROPY_GENERATOR
was enabled, then the corresponding driver could be enabled.
This works in most of the cases, but not all. A counter example is the
"entropy_bt_hci" driver which is only enabled if CONFIG_BT_HCI_HOST is also
enabled. This means that in a build where the BT stack is not enabled
that driver won't be enabled even if the DT node is still present.

An example of this are the nrf5340[dk|bsim] boards.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-11-13 23:12:29 +02:00
Raffael Rostagno
4f3d0e49a1 samples: openthread: shell: Remove unnecessary file
Remove unnecessary file. Node is already enabled on board's DTS.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-11-13 23:12:14 +02:00
Raffael Rostagno
9ca6920d98 drivers: ieee802154: esp32: Todo's review
Review todo items to make sure points are solved.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-11-13 23:12:14 +02:00
Raffael Rostagno
7d46b82568 drivers: ieee802154: esp32: Fix start/stop API
Fix start/stop driver API implementation. OT stack expects these
functions to only put IEEE802.15.4 in sleep mode and back in RX
mode when calling start. Fixes ifconfig down/up cycling as well
as nodes staying in leader role and not forming a network.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-11-13 23:12:14 +02:00
Jukka Rissanen
820cd34dbb net: Replace Posix eventfd by zvfs_eventfd API
No need to use Posix eventfd API in core network code as zvfs_eventfd
is compatible with it and we can now avoid using Posix headers
unnecessarily.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-13 23:12:04 +02:00
Derek Snell
6044d455e4 boards: nxp: mimxrt1180_evk: fix directory for Jlink script
Fixes path to the script file so the script is used with "west debug".

Signed-off-by: Derek Snell <derek.snell@nxp.com>
2025-11-13 23:11:49 +02:00
Benjamin Cabé
4a1d4b0c19 twister: harness: display_capture: drop requirements.txt
This requirements file can be confusing and will only get stale over
time. Drop it since these dependencies are actually captured in
scripts/requirements-run-test.txt

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-13 23:11:32 +02:00
Benjamin Cabé
dc0b225919 twister: harness: display_capture: remove duplicate code
Introduce a helper function to check if an exception is expected in
headless environment.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-13 23:11:32 +02:00
Benjamin Cabé
4b67237aaa twister: harness: display_capture: remove unnecessary "noqa: B007"
Properly ignore the unused loop variable

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-13 23:11:32 +02:00
Benjamin Cabé
53649a4f76 twister: harness: display_capture: remove unused fields from UVCCamera
This removes a few unused fields from the UVCCamera class.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-11-13 23:11:32 +02:00
Declan Snyder
6c2410cb90 tests: spi_loopback: Fix race condition with CS testing
There is a race condition in this method of CS behavior verification,
where multiple CS signal transitions can happen during one interrupt
processing, thereby only getting one callback and marking the trigger
count as being less than what is accurate. At least we can account for
most real situations where this happens by also looking at the CS pin
logic level and comparing to how it started, to potentially realize that
there was another edge that happened when it either should or shouldn't
have happened.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-11-13 23:11:23 +02:00
Declan Snyder
2f51f06d6f drivers: flexcomm spi: Fix 0 length xfer in dma path
If rx and tx length are both 0 in dma path then do nothing.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-11-13 23:11:23 +02:00
Jiafei Pan
313d12f272 usb: fix build warning for printing format
Use zu% format for size_t type.
Use d% format for int type.
Use u% format for uint32_t type.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Jony Zhang <jony.zhang@nxp.com>
2025-11-13 23:11:09 +02:00
Yong Cong Sin
6847421188 shell: backends: select RING_BUFFER_LARGE when necessary
Depending on the ring buffer configuration, users may encounter
the "size too big" assertion in runtime. Let's enable the
RING_BUFFER_LARGE when we know that it is required.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2025-11-13 23:10:37 +02:00
Yong Cong Sin
aff6123cfd ring_buffer: update assert message when size too big
Make the runtime assertion message more obvious on why it's
failing.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2025-11-13 23:10:37 +02:00
Bjarki Arge Andreasen
2f99ebe9b0 shell: backends: uart: implement pm_device_runtime
The UART device used by the backend needs to be gotten before use,
and put after. In limited cases, device drivers call
pm_device_runtime_get() as part of the call to uart_rx_enable(),
this is not the case for polling, nor interrupt driven API calls
for most if not all drivers, nor is that expected.

Implement pm_device_runtime calls in shell uart backend similar to
the logging uart backend to support all uart drivers in all
configurations.

Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
2025-11-13 23:10:27 +02:00
Furkan Akkiz
2385641f12 manifest: Update hal_adi revision
Update hal_adi revision to get HAL fix commits. One of the fix commits
addresses an issue where the MAX32650 system clock frequency value was
not set correctly, which could lead to improper operation of
time-dependent functions.

Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
2025-11-13 23:10:14 +02:00
Jamie McCrae
6be751a2ed cmake: Remove HWMv1 checks
Removes checks for HWMv1 as the code for HWMv1 was removed from
Zephyr some time ago and these checks are not needed

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-13 23:09:55 +02:00
Jamie McCrae
9812e073bb modules: hal_nxp: Remove HWMv1 checks
Removes outdated checks that have not been used for a long time

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-13 23:09:55 +02:00
Jamie McCrae
d884a097cd scripts: utils: Remove hwmv1 migration script
HWMv2 was introduced in v3.7, and HWMv1 support was removed in v4.2
so this script is no longer needed

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-13 23:09:55 +02:00
Jamie McCrae
e341b0e481 sysbuild: bootloader: Remove deprecated Kconfig
Removes the previously deprecated
SB_CONFIG_MCUBOOT_MODE_SWAP_WITHOUT_SCRATCH sysbuild Kconfig

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-11-13 23:09:55 +02:00
Jukka Rissanen
2c0cf4ac3f net: midi2: Do not use poll from posix
As midi2 is provided by networking subsystem it should not
depend on any features provided by Posix. Convert Posix poll
API calls to zsock poll ones. There is no functionality changes,
only naming changes.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
2025-11-13 23:09:47 +02:00
Abderrahmane JARMOUNI
c294fc5928 include: zephyr: fix Doxygen \retval command usage
Fix how Doxygen special commands \retval & \return are used in doc text.
\retval: Starts a description for a function's return value with name
<return value>, which needs to be attached and to not be a word that is
part of the sentence, and each return val should have its own \retval.
Otherwise \retval is replaced with \return.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-11-13 23:09:24 +02:00
Abderrahmane JARMOUNI
78595121ac include: fs: fix Doxygen \retval command usage
Fix how Doxygen special commands \retval & \return are used in doc text.
\retval: Starts a description for a function's return value with name
<return value>, which needs to be attached and to not be a word that is
part of the sentence, and each return val should have its own \retval.
Otherwise \retval is replaced with \return.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-11-13 23:09:24 +02:00
Abderrahmane JARMOUNI
55dd265032 include: kernel: fix Doxygen \retval command usage
Fix how Doxygen special commands \retval & \return are used in doc text.
\retval: Starts a description for a function's return value with name
<return value>, which needs to be attached and to not a word that is
part of the sentence, and each return val should have its own \retval.
Otherwise \retval is replaced with \return.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-11-13 23:09:24 +02:00
Abderrahmane JARMOUNI
7c79f4bc5f include: sys: fix Doxygen \retval command usage
Fix how Doxygen special commands \retval & \return are used in doc text.
\retval: Starts a description for a function's return value with name
<return value>, which needs to be attached and to not a word that is
part of the sentence, and each return val should have its own \retval.
Otherwise \retval is replaced with \return.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-11-13 23:09:24 +02:00
Abderrahmane JARMOUNI
cd3312c91f include: net: fix Doxygen \retval command usage
Fix how Doxygen special commands \retval & \return are used in doc text.
\retval: Starts a description for a function's return value with name
<return value>, which needs to be attached and to not be a word that is
part of the sentence, and each return val should have its own \retval.
Otherwise \retval is replaced with \return.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-11-13 23:09:24 +02:00
Abderrahmane JARMOUNI
c98c068c4c include: bluetooth: fix Doxygen \retval command usage
Fix how Doxygen special commands \retval & \return are used in doc text.
\retval: Starts a description for a function's return value with name
<return value>, which needs to be attached and to not be a word that is
part of the sentence, and each return val should have its own \retval.
Otherwise \retval is replaced with \return.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-11-13 23:09:24 +02:00
Abderrahmane JARMOUNI
3d78a76650 include: drivers: fix Doxygen \retval command usage
Fix how Doxygen special commands \retval & \return are used in doc text.
\retval: Starts a description for a function's return value with name
<return value>, which needs to be attached and to not be a word that is
part of the sentence, and each return val should have its own \retval.
Otherwise \retval is replaced with \return.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-11-13 23:09:24 +02:00
Fin Maaß
5805685c32 Kconfig: make use of configdefault
use configdefault, when we want to change
the default of a Kconfig option.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-11-13 11:20:20 -05:00
Fin Maaß
1f3b5570cb boards: remove redundant enabling of drivers
the drivers are already enabled by default
when they are activated in the device tree.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-11-13 11:20:20 -05:00
Fin Maaß
5e3cbb718c disk: remove redundant DISK_DRIVER_SDMMC
DISK_DRIVER_SDMMC is already by default y,
if it is enabled in the dt, so we shouldn't overwrite
that.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-11-13 11:20:20 -05:00
Fin Maaß
a351749711 boards: mdio: remove mdio enable from defconfig files
MDIO will be enabled by default by the ethernet phy, when
needed, we don't need to enable it explicitly in the defconfig files.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-11-13 11:20:20 -05:00
Johan Hedberg
e7c0676cee release: Update to 4.3.99
Set the version to 4.3.99

Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
2025-11-13 11:19:33 -05:00
7070 changed files with 186781 additions and 62071 deletions

6
.github/SECURITY.md vendored
View File

@@ -8,11 +8,11 @@ updates:
- The most recent release, and the release prior to that.
- Active LTS releases.
At this time, with the latest release of v4.2, the supported
At this time, with the latest release of v4.3, the supported
versions are:
- v4.2: Current release
- v4.1: Prior release
- v4.3: Current release
- v4.2: Prior release
- v3.7: Current LTS
## Reporting process

View File

@@ -34,16 +34,17 @@ jobs:
persist-credentials: false
- name: Set up Python
uses: zephyrproject-rtos/action-python-env@ace91a63fd503cd618ff1eb83fbcf302dabd7d44 # main
uses: zephyrproject-rtos/action-python-env@32e53bef090c33d53aa94f1d9a9d29c93cfdc5f7 # main
with:
python-version: 3.12
- name: Fetch west.yml from pull request
- name: Fetch west.yml/Maintainer.yml from pull request
if: >
github.event_name == 'pull_request_target'
github.event_name == 'pull_request_target' && github.base_ref == 'main'
run: |
git fetch origin pull/${{ github.event.pull_request.number }}/merge
git show FETCH_HEAD:west.yml > pr_west.yml
git show FETCH_HEAD:MAINTAINERS.yml > pr_MAINTAINERS.yml
- name: west setup
if: >
@@ -62,7 +63,11 @@ jobs:
FLAGS+=" -r ${{ github.event.repository.name }}"
FLAGS+=" -M MAINTAINERS.yml"
if [ "${{ github.event_name }}" = "pull_request_target" ]; then
FLAGS+=" -P ${{ github.event.pull_request.number }} --updated-manifest pr_west.yml"
if [ "${{ github.base_ref }}" != "main" ]; then
FLAGS+=" -P ${{ github.event.pull_request.number }} --updated-manifest pr_west.yml --updated-maintainer-file pr_MAINTAINERS.yml"
else
FLAGS+=" -P ${{ github.event.pull_request.number }}"
fi
elif [ "${{ github.event_name }}" = "issues" ]; then
FLAGS+=" -I ${{ github.event.issue.number }}"
elif [ "${{ github.event_name }}" = "schedule" ]; then
@@ -71,4 +76,13 @@ jobs:
echo "Unknown event: ${{ github.event_name }}"
exit 1
fi
python3 scripts/set_assignees.py $FLAGS
python3 scripts/ci/set_assignees.py $FLAGS
- name: Check maintainer file changes
if: >
github.event_name == 'pull_request_target' && github.base_ref == 'main'
env:
GITHUB_TOKEN: ${{ secrets.ZB_PR_ASSIGNER_GITHUB_TOKEN }}
run: |
python ./scripts/ci/check_maintainer_changes.py \
--repo zephyrproject-rtos/zephyr MAINTAINERS.yml pr_MAINTAINERS.yml

View File

@@ -24,7 +24,7 @@ jobs:
run_id: ${{ github.event.workflow_run.id }}
- name: Publish BabbleSim Test Results
uses: EnricoMi/publish-unit-test-result-action@3a74b2957438d0b6e2e61d67b05318aa25c9e6c6 # v2.20.0
uses: EnricoMi/publish-unit-test-result-action@34d7c956a59aed1bfebf31df77b8de55db9bbaaf # v2.21.0
with:
check_name: BabbleSim Test Results
comment_mode: off

View File

@@ -42,7 +42,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.7.20251127
options: '--entrypoint /bin/bash'
env:
ZEPHYR_TOOLCHAIN_VARIANT: zephyr
@@ -189,7 +189,7 @@ jobs:
- name: Upload Unit Test Results in HTML
if: always()
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: HTML Unit Test Results
if-no-files-found: ignore
@@ -197,7 +197,7 @@ jobs:
junit.html
- name: Publish Unit Test Results
uses: EnricoMi/publish-unit-test-result-action@3a74b2957438d0b6e2e61d67b05318aa25c9e6c6 # v2.20.0
uses: EnricoMi/publish-unit-test-result-action@34d7c956a59aed1bfebf31df77b8de55db9bbaaf # v2.21.0
with:
check_name: Bsim Test Results
files: "junit.xml"
@@ -205,7 +205,7 @@ jobs:
- name: Upload Event Details
if: always()
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: event
path: |

View File

@@ -51,7 +51,7 @@ jobs:
echo "BUGS_PICKLE_PATH=${BUGS_PICKLE_PATH}" >> ${GITHUB_ENV}
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
uses: aws-actions/configure-aws-credentials@00943011d9042930efac3dcd3a170e4273319bc8 # v5.1.0
with:
aws-access-key-id: ${{ vars.AWS_BUILDS_ZEPHYR_BUG_SNAPSHOT_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_BUILDS_ZEPHYR_BUG_SNAPSHOT_SECRET_ACCESS_KEY }}

View File

@@ -18,7 +18,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.7.20251127
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
@@ -123,7 +123,7 @@ jobs:
- name: Upload Unit Test Results
if: always()
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: Unit Test Results (Subset ${{ matrix.subset }})
path: |
@@ -146,7 +146,7 @@ jobs:
persist-credentials: false
- name: Download Artifacts
uses: actions/download-artifact@634f93cb2916e3fdff6788551b99b062d0335ce0 # v5.0.0
uses: actions/download-artifact@018cc2cf5baa6db3ef3c5f8a56943fffe632ef53 # v6.0.0
with:
path: artifacts
@@ -168,7 +168,7 @@ jobs:
- name: Upload Unit Test Results in HTML
if: always()
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: HTML Unit Test Results
if-no-files-found: ignore
@@ -176,7 +176,7 @@ jobs:
junit-clang.html
- name: Publish Unit Test Results
uses: EnricoMi/publish-unit-test-result-action@3a74b2957438d0b6e2e61d67b05318aa25c9e6c6 # v2.20.0
uses: EnricoMi/publish-unit-test-result-action@34d7c956a59aed1bfebf31df77b8de55db9bbaaf # v2.21.0
if: always()
with:
check_name: Unit Test Results

View File

@@ -20,7 +20,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.7.20251127
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
@@ -126,7 +126,7 @@ jobs:
- name: Upload Doxygen Coverage Results
if: matrix.platform == 'unit_testing'
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: doxygen-coverage-results
path: |
@@ -145,7 +145,7 @@ jobs:
- name: Upload Coverage Results
if: always()
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: Coverage Data (Subset ${{ matrix.normalized }})
path: |
@@ -177,7 +177,7 @@ jobs:
pip install -r scripts/requirements-actions.txt --require-hashes
- name: Download Artifacts
uses: actions/download-artifact@634f93cb2916e3fdff6788551b99b062d0335ce0 # v5.0.0
uses: actions/download-artifact@018cc2cf5baa6db3ef3c5f8a56943fffe632ef53 # v6.0.0
with:
path: coverage/reports
@@ -242,7 +242,7 @@ jobs:
- name: Upload Merged Coverage Results and Report
if: always()
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: Coverage Data and report
path: |

View File

@@ -39,7 +39,7 @@ jobs:
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
- name: Initialize CodeQL
uses: github/codeql-action/init@64d10c13136e1c5bce3e5fbde8d4906eeaafc885 # v3.30.6
uses: github/codeql-action/init@0499de31b99561a6d14a36a5f662c2a54f91beee # v4.31.2
with:
languages: ${{ matrix.language }}
build-mode: ${{ matrix.build-mode }}
@@ -53,6 +53,6 @@ jobs:
exit 0
- name: Perform CodeQL Analysis
uses: github/codeql-action/analyze@64d10c13136e1c5bce3e5fbde8d4906eeaafc885 # v3.30.6
uses: github/codeql-action/analyze@0499de31b99561a6d14a36a5f662c2a54f91beee # v4.31.2
with:
category: "/language:${{matrix.language}}"

View File

@@ -91,14 +91,14 @@ jobs:
./scripts/ci/check_compliance.py --annotate $excludes -c origin/${BASE_REF}..
- name: upload-results
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
continue-on-error: true
with:
name: compliance.xml
path: compliance.xml
- name: Upload dts linter patch
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
continue-on-error: true
if: hashFiles('dts_linter.patch') != ''
with:

View File

@@ -20,7 +20,7 @@ jobs:
steps:
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
uses: aws-actions/configure-aws-credentials@00943011d9042930efac3dcd3a170e4273319bc8 # v5.1.0
with:
aws-access-key-id: ${{ vars.AWS_TESTING_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_TESTING_SECRET_ACCESS_KEY }}

View File

@@ -15,8 +15,8 @@ permissions:
contents: read
env:
DOXYGEN_VERSION: 1.14.0
DOXYGEN_MD5SUM: e761a5097ae20ecccfd02041925f102a
DOXYGEN_VERSION: 1.15.0
DOXYGEN_SHA256SUM: 0ec2e5b2c3cd82b7106d19cb42d8466450730b8cb7a9e85af712be38bf4523a1
JOB_COUNT: 8
jobs:
@@ -59,7 +59,7 @@ jobs:
runs-on:
group: zephyr-runner-v2-linux-x64-4xlarge
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.7.20251127
options: '--entrypoint /bin/bash'
timeout-minutes: 60
concurrency:
@@ -156,13 +156,13 @@ jobs:
tar --use-compress-program="xz -T0" -cf api-coverage.tar.xz coverage-report
- name: Upload HTML output
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: html-output
path: html-output.tar.xz
- name: Upload Doxygen coverage artifacts
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: api-coverage
path: api-coverage.tar.xz
@@ -183,7 +183,7 @@ jobs:
echo "API Coverage Report will be available shortly at: ${API_COVERAGE_URL}" >> $GITHUB_STEP_SUMMARY
- name: Upload PR number
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
if: github.event_name == 'pull_request'
with:
name: pr_num
@@ -221,7 +221,7 @@ jobs:
texlive-fonts-recommended texlive-fonts-extra texlive-xetex \
imagemagick fonts-noto xindy
wget --no-verbose "https://github.com/doxygen/doxygen/releases/download/Release_${DOXYGEN_VERSION//./_}/doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz"
echo "${DOXYGEN_MD5SUM} doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz" | md5sum -c
echo "${DOXYGEN_SHA256SUM} doxygen-${DOXYGEN_VERSION}.linux.bin.tar.gz" | sha256sum -c
if [ $? -ne 0 ]; then
echo "Failed to verify doxygen tarball"
exit 1
@@ -259,7 +259,7 @@ jobs:
- name: upload-build
if: always()
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: pdf-output
if-no-files-found: ignore

View File

@@ -66,7 +66,7 @@ jobs:
- name: Configure AWS Credentials
if: steps.download-artifacts.outputs.found_artifact == 'true'
uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
uses: aws-actions/configure-aws-credentials@00943011d9042930efac3dcd3a170e4273319bc8 # v5.1.0
with:
aws-access-key-id: ${{ vars.AWS_BUILDS_ZEPHYR_PR_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_BUILDS_ZEPHYR_PR_SECRET_ACCESS_KEY }}

View File

@@ -40,7 +40,7 @@ jobs:
fi
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
uses: aws-actions/configure-aws-credentials@00943011d9042930efac3dcd3a170e4273319bc8 # v5.1.0
with:
aws-access-key-id: ${{ vars.AWS_DOCS_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_DOCS_SECRET_ACCESS_KEY }}

View File

@@ -28,7 +28,7 @@ jobs:
group: zephyr-runner-v2-linux-x64-4xlarge
if: github.repository_owner == 'zephyrproject-rtos'
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.7.20251127
options: '--entrypoint /bin/bash'
defaults:
run:
@@ -89,7 +89,7 @@ jobs:
west update 2>&1 1> west.update.log || west update 2>&1 1> west.update2.log
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
uses: aws-actions/configure-aws-credentials@00943011d9042930efac3dcd3a170e4273319bc8 # v5.1.0
with:
aws-access-key-id: ${{ vars.AWS_TESTING_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_TESTING_SECRET_ACCESS_KEY }}

View File

@@ -80,7 +80,7 @@ jobs:
- name: Upload artifacts
if: failure()
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
if-no-files-found: ignore
path:

View File

@@ -38,14 +38,14 @@ jobs:
token: ${{ secrets.GITHUB_TOKEN }}
- name: upload-stats
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
continue-on-error: true
with:
name: ${{ env.OUTPUT_FILE_NAME }}
path: ${{ env.OUTPUT_FILE_NAME }}
- name: Configure AWS Credentials
uses: aws-actions/configure-aws-credentials@a03048d87541d1d9fcf2ecf528a4a65ba9bd7838 # v5.0.0
uses: aws-actions/configure-aws-credentials@00943011d9042930efac3dcd3a170e4273319bc8 # v5.1.0
with:
aws-access-key-id: ${{ vars.AWS_TESTING_ACCESS_KEY_ID }}
aws-secret-access-key: ${{ secrets.AWS_TESTING_SECRET_ACCESS_KEY }}

View File

@@ -20,7 +20,7 @@ jobs:
with:
directory-to-scan: 'scan/'
- name: Artifact Upload
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: scancode
path: ./artifacts

View File

@@ -1,43 +0,0 @@
name: Maintainer file check
on:
pull_request_target:
branches:
- main
paths:
- MAINTAINERS.yml
permissions:
contents: read
jobs:
assignment:
name: Check MAINTAINERS.yml changes
runs-on: ubuntu-24.04
steps:
- name: Check out source code
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
- name: Set up Python
uses: actions/setup-python@e797f83bcb11b83ae66e0230d6156d7c80228e7c # v6.0.0
with:
python-version: 3.12
cache: pip
cache-dependency-path: scripts/requirements-actions.txt
- name: Install Python packages
run: |
pip install -r scripts/requirements-actions.txt --require-hashes
- name: Fetch MAINTAINERS.yml from pull request
run: |
git fetch origin pull/${{ github.event.pull_request.number }}/merge
git show FETCH_HEAD:MAINTAINERS.yml > pr_MAINTAINERS.yml
- name: Check maintainer file changes
env:
GITHUB_TOKEN: ${{ secrets.ZB_PR_ASSIGNER_GITHUB_TOKEN }}
run: |
python ./scripts/ci/check_maintainer_changes.py \
--repo zephyrproject-rtos/zephyr MAINTAINERS.yml pr_MAINTAINERS.yml

View File

@@ -13,10 +13,15 @@ on:
permissions:
contents: read
concurrency:
group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.head_ref || github.ref }}
cancel-in-progress: true
jobs:
do-not-merge:
name: Prevent Merging
runs-on: ubuntu-24.04
timeout-minutes: 30
steps:
- name: Checkout
uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0

View File

@@ -31,7 +31,7 @@ jobs:
args: spdx -o zephyr-${{ steps.get_version.outputs.VERSION }}.spdx
- name: upload-results
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
continue-on-error: true
with:
name: zephyr-${{ steps.get_version.outputs.VERSION }}.spdx

View File

@@ -47,7 +47,7 @@ jobs:
# uploads of run results in SARIF format to the repository Actions tab.
# https://docs.github.com/en/actions/advanced-guides/storing-workflow-data-as-artifacts
- name: "Upload artifact"
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: SARIF file
path: results.sarif
@@ -56,6 +56,6 @@ jobs:
# Upload the results to GitHub's code scanning dashboard (optional).
# Commenting out will disable upload of results to your repo's Code Scanning dashboard
- name: "Upload to code-scanning"
uses: github/codeql-action/upload-sarif@64d10c13136e1c5bce3e5fbde8d4906eeaafc885 # v3.30.6
uses: github/codeql-action/upload-sarif@0499de31b99561a6d14a36a5f662c2a54f91beee # v4.31.2
with:
sarif_file: results.sarif

View File

@@ -127,7 +127,7 @@ jobs:
needs: twister-build-prep
if: needs.twister-build-prep.outputs.size != 0
container:
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.6.20251003
image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.28.7.20251127
options: '--entrypoint /bin/bash'
strategy:
fail-fast: false
@@ -192,7 +192,7 @@ jobs:
echo "$HOME/.cargo/bin" >> $GITHUB_PATH
west init -l . || true
west config manifest.group-filter -- +ci,+optional
west config manifest.group-filter -- +ci,+optional,+testing
west config --global update.narrow true
west update --path-cache /repo-cache/zephyrproject 2>&1 1> west.update.log || west update --path-cache /repo-cache/zephyrproject 2>&1 1> west.update.log || ( rm -rf ../modules ../bootloader ../tools && west update --path-cache /repo-cache/zephyrproject)
west forall -c 'git reset --hard HEAD'
@@ -283,7 +283,7 @@ jobs:
- name: Upload Unit Test Results
if: always()
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: Unit Test Results (Subset ${{ matrix.subset }})
if-no-files-found: ignore
@@ -305,7 +305,7 @@ jobs:
- if: matrix.subset == 1 && github.event_name == 'push'
name: Upload the list of Python packages
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: Frozen PIP package set
path: |
@@ -341,7 +341,7 @@ jobs:
pip install -r scripts/requirements-actions.txt --require-hashes
- name: Download Artifacts
uses: actions/download-artifact@634f93cb2916e3fdff6788551b99b062d0335ce0 # v5.0.0
uses: actions/download-artifact@018cc2cf5baa6db3ef3c5f8a56943fffe632ef53 # v6.0.0
with:
path: artifacts
@@ -352,7 +352,7 @@ jobs:
- name: Upload Unit Test Results
if: always()
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: Unit Test Results
if-no-files-found: ignore
@@ -367,7 +367,7 @@ jobs:
token: ${{ secrets.CODECOV_TOKEN }}
- name: Publish Unit Test Results
uses: EnricoMi/publish-unit-test-result-action@3a74b2957438d0b6e2e61d67b05318aa25c9e6c6 # v2.20.0
uses: EnricoMi/publish-unit-test-result-action@34d7c956a59aed1bfebf31df77b8de55db9bbaaf # v2.21.0
with:
check_name: Unit Test Results
files: "**/twister.xml"
@@ -384,7 +384,7 @@ jobs:
- name: Upload Twister Analysis Results
if: needs.twister-build.result == 'failure'
uses: actions/upload-artifact@ea165f8d65b6e75b540449e92b4886f43607fa02 # v4.6.2
uses: actions/upload-artifact@330a01c490aca151604b8cf639adc76d48f6c5d4 # v5.0.0
with:
name: Twister Analysis Results
if-no-files-found: ignore

View File

@@ -50,6 +50,8 @@ jobs:
app-path: zephyr
toolchains: all
enable-ccache: false
west-group-filter: -tools,-bootloader,-babblesim,-hal
west-project-filter: -nrf_hw_models,+cmsis,+hal_xtensa,+cmsis_6
- name: Run Pytest For Twister Black Box Tests
if: ${{ runner.os == 'Linux' }}
@@ -64,125 +66,3 @@ jobs:
echo "Run twister tests"
source zephyr-env.sh
PYTHONPATH="./scripts/tests" pytest ./scripts/tests/twister_blackbox/
- name: Build firmware No. 1 - basic
working-directory: zephyr
shell: bash
run: |
if [ "${{ runner.os }}" = "macOS" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
elif [ "${{ runner.os }}" = "Windows" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
./scripts/twister --runtime-artifact-cleanup --force-color --inline-logs -T samples/hello_world -T samples/cpp/hello_world -v $EXTRA_TWISTER_FLAGS
- name: Build firmware No. 2 - save and load with emulation only
working-directory: zephyr
shell: bash
run: |
if [ "${{ runner.os }}" = "macOS" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
elif [ "${{ runner.os }}" = "Windows" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -T samples/hello_world -T samples/cpp/hello_world -v $EXTRA_TWISTER_FLAGS"
./scripts/twister --save-tests tests.file $BASIC_FLAGS
./scripts/twister --load-tests tests.file --emulation-only $BASIC_FLAGS
rm tests.file
- name: Build firmware No. 3 - print out test plan
working-directory: zephyr
shell: bash
run: |
if [ "${{ runner.os }}" = "macOS" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
elif [ "${{ runner.os }}" = "Windows" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
./scripts/twister --test-tree -T tests/kernel/spinlock $BASIC_FLAGS
- name: Build firmware No. 4 - integration, exclude tag, filter, shuffle, dry run
working-directory: zephyr
shell: bash
run: |
if [ "${{ runner.os }}" = "macOS" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
elif [ "${{ runner.os }}" = "Windows" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
./scripts/twister --dry-run --integration --subset 1/3 --shuffle-tests --shuffle-tests-seed 1 --filter runnable --exclude-tag audio --exclude-tag driver $BASIC_FLAGS
- name: Build firmware No. 5 - test, arch, vendor, exclude-platform, platform-reports
working-directory: zephyr
shell: bash
run: |
if [ "${{ runner.os }}" = "macOS" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
elif [ "${{ runner.os }}" = "Windows" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
./scripts/twister --test kernel.multiprocessing.spinlock --arch x86 --exclude-platform qemu_x86_64 --vendor qemu --platform-reports $BASIC_FLAGS
- name: Build firmware No. 6 - subtest, platform, rom-ram report, ROM footprint report from buildlog, size report
working-directory: zephyr
shell: bash
run: |
if [ "${{ runner.os }}" = "macOS" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
elif [ "${{ runner.os }}" = "Windows" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --platform qemu_x86 --create-rom-ram-report --footprint-report ROM --enable-size-report --footprint-from-buildlog $BASIC_FLAGS --detailed-test-id
- name: Build firmware No. 7 - list tags
working-directory: zephyr
shell: bash
run: |
if [ "${{ runner.os }}" = "macOS" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
elif [ "${{ runner.os }}" = "Windows" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --list-tags $BASIC_FLAGS --detailed-test-id
- name: Build firmware No. 8 - list tests
working-directory: zephyr
shell: bash
run: |
if [ "${{ runner.os }}" = "macOS" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
elif [ "${{ runner.os }}" = "Windows" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
./scripts/twister -T tests/posix/common --list-tests $BASIC_FLAGS
- name: Build firmware No. 9 - report flags - dir, name, suffix, summary, all-options, filtered
working-directory: zephyr
shell: bash
run: |
if [ "${{ runner.os }}" = "macOS" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
elif [ "${{ runner.os }}" = "Windows" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --platform qemu_x86 --report-dir . --report-name test_name --report-suffix suffix --report-summary 0 --report-all-options --report-filtered $BASIC_FLAGS --detailed-test-id
- name: Build firmware No. 10 - force platform and toolchain, log level, timestamps, logfile
working-directory: zephyr
shell: bash
run: |
if [ "${{ runner.os }}" = "macOS" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --build-only"
elif [ "${{ runner.os }}" = "Windows" ]; then
EXTRA_TWISTER_FLAGS="-P native_sim --short-build-path -O /tmp/twister-out"
fi
BASIC_FLAGS="--runtime-artifact-cleanup --force-color --inline-logs -v $EXTRA_TWISTER_FLAGS"
./scripts/twister --sub-test kernel.multiprocessing.spinlock.minimallibc.spinlock.spinlock_basic --force-platform --platform qemu_x86 --force-toolchain --log-level WARNING --log-file log.file $BASIC_FLAGS --detailed-test-id
rm log.file

View File

@@ -5,21 +5,6 @@
# remove entries for files that pass CI compliance testing.
[lint.per-file-ignores]
"./arch/x86/gen_gdt.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
]
"./arch/x86/gen_idt.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP030", # https://docs.astral.sh/ruff/rules/format-literals
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
]
"./arch/x86/gen_mmu.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
"UP034", # https://docs.astral.sh/ruff/rules/extraneous-parentheses
"UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
]
"./arch/x86/zefi/zefi.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
@@ -134,196 +119,8 @@
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM112", # https://docs.astral.sh/ruff/rules/uncapitalized-environment-variables
]
"./scripts/build/check_init_priorities.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"F401", # https://docs.astral.sh/ruff/rules/unused-import
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
"UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
]
"./scripts/build/check_init_priorities_test.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
]
"./scripts/build/elf_parser.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/build/file2hex.py" = [
"B023", # https://docs.astral.sh/ruff/rules/function-uses-loop-variable
"B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict
]
"./scripts/build/gen_app_partitions.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP030", # https://docs.astral.sh/ruff/rules/format-literals
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/build/gen_cfb_font_header.py" = [
"E101", # https://docs.astral.sh/ruff/rules/mixed-spaces-and-tabs
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/build/gen_device_deps.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/build/gen_image_info.py" = [
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
]
"./scripts/build/gen_isr_tables.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/build/gen_isr_tables_parser_carrays.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP030", # https://docs.astral.sh/ruff/rules/format-literals
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/build/gen_isr_tables_parser_local.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP030", # https://docs.astral.sh/ruff/rules/format-literals
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/build/gen_kobject_list.py" = [
"E101", # https://docs.astral.sh/ruff/rules/mixed-spaces-and-tabs
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM102", # https://docs.astral.sh/ruff/rules/collapsible-if
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"SIM401", # https://docs.astral.sh/ruff/rules/if-else-block-instead-of-dict-get
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
"UP032", # https://docs.astral.sh/ruff/rules/f-string
"W191", # https://docs.astral.sh/ruff/rules/tab-indentation
]
"./scripts/build/gen_kobject_placeholders.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
]
"./scripts/build/gen_offset_header.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
]
"./scripts/build/gen_relocate_app.py" = [
"E101", # https://docs.astral.sh/ruff/rules/mixed-spaces-and-tabs
]
"./scripts/build/gen_strerror_table.py" = [
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"SIM105", # https://docs.astral.sh/ruff/rules/suppressible-exception
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
]
"./scripts/build/gen_strsignal_table.py" = [
"SIM105", # https://docs.astral.sh/ruff/rules/suppressible-exception
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
]
"./scripts/build/gen_symtab.py" = [
"B007", # https://docs.astral.sh/ruff/rules/unused-loop-control-variable
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
]
"./scripts/build/gen_syscalls.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"E713", # https://docs.astral.sh/ruff/rules/not-in-test
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/build/llext_inject_slids.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM113", # https://docs.astral.sh/ruff/rules/enumerate-for-loop
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
]
"./scripts/build/llext_prepare_exptab.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM113", # https://docs.astral.sh/ruff/rules/enumerate-for-loop
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
]
"./scripts/build/mergehex.py" = [
"B904", # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/build/parse_syscalls.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
]
"./scripts/build/process_gperf.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
]
"./scripts/build/subfolder_list.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
]
"./scripts/build/uf2conv.py" = [
"B011", # https://docs.astral.sh/ruff/rules/assert-false
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"E711", # https://docs.astral.sh/ruff/rules/none-comparison
"E722", # https://docs.astral.sh/ruff/rules/bare-except
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM102", # https://docs.astral.sh/ruff/rules/collapsible-if
"SIM103", # https://docs.astral.sh/ruff/rules/needless-bool
"SIM118", # https://docs.astral.sh/ruff/rules/in-dict-keys
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/ci/check_compliance.py" = [
"B904", # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"E741", # https://docs.astral.sh/ruff/rules/ambiguous-variable-name
"F401", # https://docs.astral.sh/ruff/rules/unused-import
"SIM112", # https://docs.astral.sh/ruff/rules/uncapitalized-environment-variables
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
]
"./scripts/ci/coverage/coverage_analysis.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
]
"./scripts/ci/errno.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
]
"./scripts/ci/guideline_check.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/ci/stats/merged_prs.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
]
"./scripts/ci/test_plan.py" = [
"B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default
"E401", # https://docs.astral.sh/ruff/rules/multiple-imports-on-one-line
"E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM102", # https://docs.astral.sh/ruff/rules/collapsible-if
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/ci/upload_test_results_es.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
@@ -331,62 +128,14 @@
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
]
"./scripts/ci/version_mgr.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
]
"./scripts/coredump/coredump_gdbserver.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
]
"./scripts/coredump/coredump_parser/elf_parser.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
"UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
]
"./scripts/coredump/coredump_parser/log_parser.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP030", # https://docs.astral.sh/ruff/rules/format-literals
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
"UP032", # https://docs.astral.sh/ruff/rules/f-string
]
"./scripts/coredump/coredump_serial_log_parser.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler
"UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes
]
"./scripts/coredump/gdbstubs/arch/arm64.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
]
"./scripts/coredump/gdbstubs/arch/arm_cortex_m.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
]
"./scripts/coredump/gdbstubs/arch/risc_v.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
]
"./scripts/coredump/gdbstubs/arch/x86.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
]
"./scripts/coredump/gdbstubs/arch/x86_64.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses
]
"./scripts/coredump/gdbstubs/arch/xtensa.py" = [
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
"SIM113", # https://docs.astral.sh/ruff/rules/enumerate-for-loop
"UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting
]
"./scripts/coredump/gdbstubs/gdbstub.py" = [
"E501", # https://docs.astral.sh/ruff/rules/line-too-long
"I001", # https://docs.astral.sh/ruff/rules/unsorted-imports
]
"./scripts/dts/gen_defines.py" = [
"B007", # https://docs.astral.sh/ruff/rules/unused-loop-control-variable
@@ -1142,9 +891,6 @@
[format]
exclude = [
"./arch/x86/gen_gdt.py",
"./arch/x86/gen_idt.py",
"./arch/x86/gen_mmu.py",
"./arch/x86/zefi/zefi.py",
"./boards/microchip/mec172xevb_assy6906/support/mec172x_remote_flasher.py",
"./doc/_scripts/gen_devicetree_rest.py",
@@ -1174,52 +920,8 @@ exclude = [
"./samples/subsys/testsuite/pytest/basic/pytest/conftest.py",
"./samples/subsys/testsuite/pytest/basic/pytest/test_sample.py",
"./samples/subsys/zbus/remote_mock/remote_mock.py",
"./scripts/build/check_init_priorities.py",
"./scripts/build/check_init_priorities_test.py",
"./scripts/build/elf_parser.py",
"./scripts/build/file2hex.py",
"./scripts/build/gen_app_partitions.py",
"./scripts/build/gen_cfb_font_header.py",
"./scripts/build/gen_device_deps.py",
"./scripts/build/gen_image_info.py",
"./scripts/build/gen_isr_tables.py",
"./scripts/build/gen_isr_tables_parser_carrays.py",
"./scripts/build/gen_isr_tables_parser_local.py",
"./scripts/build/gen_kobject_list.py",
"./scripts/build/gen_kobject_placeholders.py",
"./scripts/build/gen_offset_header.py",
"./scripts/build/gen_strerror_table.py",
"./scripts/build/gen_strsignal_table.py",
"./scripts/build/gen_symtab.py",
"./scripts/build/gen_syscalls.py",
"./scripts/build/llext_inject_slids.py",
"./scripts/build/llext_prepare_exptab.py",
"./scripts/build/mergehex.py",
"./scripts/build/parse_syscalls.py",
"./scripts/build/process_gperf.py",
"./scripts/build/subfolder_list.py",
"./scripts/build/uf2conv.py",
"./scripts/check_maintainers.py",
"./scripts/ci/check_compliance.py",
"./scripts/ci/coverage/coverage_analysis.py",
"./scripts/ci/errno.py",
"./scripts/ci/guideline_check.py",
"./scripts/ci/stats/merged_prs.py",
"./scripts/ci/test_plan.py",
"./scripts/ci/twister_report_analyzer.py",
"./scripts/ci/upload_test_results_es.py",
"./scripts/ci/version_mgr.py",
"./scripts/coredump/coredump_gdbserver.py",
"./scripts/coredump/coredump_parser/elf_parser.py",
"./scripts/coredump/coredump_parser/log_parser.py",
"./scripts/coredump/coredump_serial_log_parser.py",
"./scripts/coredump/gdbstubs/arch/arm64.py",
"./scripts/coredump/gdbstubs/arch/arm_cortex_m.py",
"./scripts/coredump/gdbstubs/arch/risc_v.py",
"./scripts/coredump/gdbstubs/arch/x86.py",
"./scripts/coredump/gdbstubs/arch/x86_64.py",
"./scripts/coredump/gdbstubs/arch/xtensa.py",
"./scripts/coredump/gdbstubs/gdbstub.py",
"./scripts/dts/gen_defines.py",
"./scripts/dts/gen_driver_kconfig_dts.py",
"./scripts/dts/gen_dts_cmake.py",
@@ -1250,15 +952,6 @@ exclude = [
"./scripts/list_boards.py",
"./scripts/list_hardware.py",
"./scripts/list_shields.py",
"./scripts/logging/dictionary/database_gen.py",
"./scripts/logging/dictionary/dictionary_parser/data_types.py",
"./scripts/logging/dictionary/dictionary_parser/log_database.py",
"./scripts/logging/dictionary/dictionary_parser/log_parser.py",
"./scripts/logging/dictionary/dictionary_parser/log_parser_v1.py",
"./scripts/logging/dictionary/dictionary_parser/log_parser_v3.py",
"./scripts/logging/dictionary/dictionary_parser/utils.py",
"./scripts/logging/dictionary/log_parser.py",
"./scripts/logging/dictionary/log_parser_uart.py",
"./scripts/make_bugs_pickle.py",
"./scripts/net/enumerate_http_status.py",
"./scripts/profiling/stackcollapse.py",
@@ -1361,7 +1054,6 @@ exclude = [
"./scripts/utils/pinctrl_nrf_migrate.py",
"./scripts/utils/twister_to_list.py",
"./scripts/west_commands/bindesc.py",
"./scripts/west_commands/blobs.py",
"./scripts/west_commands/boards.py",
"./scripts/west_commands/build.py",
"./scripts/west_commands/build_helpers.py",
@@ -1474,6 +1166,5 @@ exclude = [
"./tests/net/socket/tls_configurations/pytest/test_app_vs_openssl.py",
"./tests/net/socket/udp/generate-c-string.py",
"./tests/subsys/debug/gdbstub/pytest/test_gdbstub.py",
"./tests/subsys/logging/dictionary/pytest/test_logging_dictionary.py",
"./tests/ztest/ztest_param/pytest/test_parameters.py",
]

View File

@@ -311,8 +311,13 @@ compiler_simple_options(simple_options)
toolchain_linker_add_compiler_options(${simple_options})
if(CONFIG_LTO)
zephyr_compile_options($<TARGET_PROPERTY:compiler,optimization_lto>)
add_link_options($<TARGET_PROPERTY:linker,lto_arguments>)
if(CONFIG_LTO_SINGLE_THREADED)
zephyr_compile_options($<TARGET_PROPERTY:compiler,optimization_lto_st>)
add_link_options($<TARGET_PROPERTY:linker,lto_arguments_st>)
else()
zephyr_compile_options($<TARGET_PROPERTY:compiler,optimization_lto>)
add_link_options($<TARGET_PROPERTY:linker,lto_arguments>)
endif()
endif()
if(CONFIG_STD_C23)

View File

@@ -1,4 +1,4 @@
# Contributor Covenant Code of Conduct
# Zephyr Project Code of Conduct
## Our Pledge

View File

@@ -9,6 +9,10 @@ source "Kconfig.constants"
osource "$(APPLICATION_SOURCE_DIR)/VERSION"
# This should be sourced early since the autogen Kconfig.dts options
# and macros may get used by shields/boards/SoC defconfig or modules.
source "dts/Kconfig"
# Include Kconfig.defconfig files first so that they can override defaults and
# other symbol/choice properties by adding extra symbol/choice definitions.
# After merging all definitions for a symbol/choice, Kconfig picks the first
@@ -33,10 +37,6 @@ osource "$(TOOLCHAIN_KCONFIG_DIR)/Kconfig.defconfig"
# This loads the testsuite defconfig
source "subsys/testsuite/Kconfig.defconfig"
# This should be early since the autogen Kconfig.dts symbols may get
# used by modules
source "dts/Kconfig"
menu "Modules"
source "modules/Kconfig"
@@ -357,18 +357,19 @@ menu "Compiler Options"
config REQUIRES_STD_C99
bool
select DEPRECATED
help
Hidden option to select compiler support C99 standard or higher.
config REQUIRES_STD_C11
bool
select DEPRECATED
select REQUIRES_STD_C99
help
Hidden option to select compiler support C11 standard or higher.
config REQUIRES_STD_C17
bool
select REQUIRES_STD_C11
help
Hidden option to select compiler support C17 standard or higher.
@@ -381,27 +382,28 @@ config REQUIRES_STD_C23
choice STD_C
prompt "C Standard"
default STD_C23 if REQUIRES_STD_C23
default STD_C17 if REQUIRES_STD_C17
default STD_C11 if REQUIRES_STD_C11
default STD_C99
default STD_C17
help
C Standards.
config STD_C90
bool "C90"
bool "C90 [DEPRECATED]"
select DEPRECATED
depends on !REQUIRES_STD_C99
help
1989 C standard as completed in 1989 and ratified by ISO/IEC
as ISO/IEC 9899:1990. This version is known as "ANSI C".
config STD_C99
bool "C99"
bool "C99 [DEPRECATED]"
select DEPRECATED
depends on !REQUIRES_STD_C11
help
1999 C standard.
config STD_C11
bool "C11"
bool "C11 [DEPRECATED]"
select DEPRECATED
depends on !REQUIRES_STD_C17
help
2011 C standard.
@@ -480,7 +482,9 @@ choice COMPILER_OPTIMIZATIONS
prompt "Optimization level"
default NO_OPTIMIZATIONS if COVERAGE
default DEBUG_OPTIMIZATIONS if DEBUG
default SIZE_OPTIMIZATIONS_AGGRESSIVE if "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "llvm"
# gcc 14.3 -Os is broken on riscv. This setting should be in the SDK, it's here for testing
default SPEED_OPTIMIZATIONS if "$(TOOLCHAIN_VARIANT_COMPILER)" = "gnu" && RISCV
default SIZE_OPTIMIZATIONS_AGGRESSIVE if "$(TOOLCHAIN_VARIANT_COMPILER)" = "llvm"
default SIZE_OPTIMIZATIONS
help
Note that these flags shall only control the compiler
@@ -529,6 +533,14 @@ config LTO
help
This option enables Link Time Optimization.
config LTO_SINGLE_THREADED
bool "Single-threaded LTO"
depends on LTO
help
This option instructs the linker to use a single thread to process
LTO. See the following issue for more info:
https://github.com/zephyrproject-rtos/sdk-ng/issues/1038
config COMPILER_WARNINGS_AS_ERRORS
bool "Treat warnings as errors"
help
@@ -1061,8 +1073,6 @@ menu "Boot Options"
config IS_BOOTLOADER
bool "Act as a bootloader"
depends on XIP
depends on ARM
help
This option indicates that Zephyr will act as a bootloader to execute
a separate Zephyr image payload.

File diff suppressed because it is too large Load Diff

View File

@@ -1,5 +1,5 @@
VERSION_MAJOR = 4
VERSION_MINOR = 3
PATCHLEVEL = 0
PATCHLEVEL = 99
VERSION_TWEAK = 0
EXTRAVERSION =

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@@ -137,6 +137,8 @@ config XTENSA
select THREAD_STACK_INFO
select ARCH_HAS_THREAD_PRIV_STACK_SPACE_GET if USERSPACE
select ARCH_SUPPORTS_COREDUMP_STACK_PTR if !SMP
select ARCH_HAS_USERSPACE if XTENSA_MMU || XTENSA_MPU
imply ARCH_HAS_RESERVED_PAGE_FRAMES if XTENSA_MMU
help
Xtensa architecture
@@ -153,12 +155,6 @@ config ARCH_POSIX
select BARRIER_OPERATIONS_BUILTIN
# POSIX arch based targets get their memory cleared on entry by the host OS
select SKIP_BSS_CLEAR
# Override the C standard used for compilation to C 2011
# This is due to some tests using _Static_assert which is a 2011 feature, but
# otherwise relying on compilers supporting it also when set to C99.
# This was in general ok, but with some host compilers and C library versions
# it led to problems. So we override it to 2011 for the native targets.
select REQUIRES_STD_C11
help
POSIX (native) architecture
@@ -764,13 +760,6 @@ config ARCH_HAS_EXTRA_EXCEPTION_INFO
config ARCH_HAS_GDBSTUB
bool
config ARCH_HAS_COHERENCE
bool
help
When selected, the architecture supports the
arch_mem_coherent() API and can link into incoherent/cached
memory using the ".cached" linker section.
config ARCH_HAS_THREAD_LOCAL_STORAGE
bool
@@ -1089,10 +1078,22 @@ config ICACHE
help
This option enables the support for the instruction cache (i-cache).
config CACHE_HAS_MIRRORED_MEMORY_REGIONS
bool "Mirrored memory region(s) for both cached and uncached access"
depends on CPU_CACHE_INCOHERENT
help
Enable this if hardware has mirrored memory regions at different
addressed when accessing one would go through cache, but accessing
the other would go to memory directly. A pointer can be cheaply
converted to cached or uncached access.
This applies to intra-CPU multiprocessing incoherence and makes only
sense when MP_MAX_NUM_CPUS > 1.
config CACHE_DOUBLEMAP
bool "Cache double-mapping support"
depends on CPU_CACHE_INCOHERENT
default y
select CACHE_HAS_MIRRORED_MEMORY_REGIONS
select DEPRECATED
help
Double-mapping behavior where a pointer can be cheaply converted to
point to the same cached/uncached memory at different locations.
@@ -1170,6 +1171,14 @@ config ARCH_CACHE
help
Integrated on-core cache controller
config SOC_CACHE
bool "SoC specific cache controller"
depends on SOC_HAS_CACHE_FUNCTIONS
help
SoC specific cache controller.
This requires soc_cache.h file to exist in search path.
config EXTERNAL_CACHE
bool "External cache controller"
help
@@ -1177,6 +1186,14 @@ config EXTERNAL_CACHE
endchoice
config CACHE_CAN_SAY_MEM_COHERENCE
bool
help
sys_cache_is_mem_coherent() is defined when enabled. This function can be
used to determine if a pointer lies inside "coherence regions" and can be
safely used in multiprocessor code without explicit flush or invalidate
operations.
endif # CACHE_MANAGEMENT
endmenu

View File

@@ -190,4 +190,43 @@ config HAS_SWO
help
When enabled, indicates that SoC has an SWO output
DT_CHOSEN_Z_DTCM := zephyr,dtcm
DT_CHOSEN_Z_ITCM := zephyr,itcm
choice
prompt "Vector table memory location"
depends on SRAM_VECTOR_TABLE
default ARM_VECTOR_TABLE_SRAM
config ARM_VECTOR_TABLE_SRAM
bool "Place the vector table in DT Chosen SRAM instead of DT Chosen Flash"
help
When executing in place (XiP), selecting this option will result in the
interrupt vector table being relocated from DT 'zephyr,flash' chosen
memory to DT 'zephyr,sram' chosen memory.
config ARM_VECTOR_TABLE_DTCM
bool "Place the vector table in DT Chosen DTCM instead of DT Chosen Flash"
depends on $(dt_chosen_enabled,$(DT_CHOSEN_Z_DTCM))
help
When executing in place (XiP), selecting this option will result in the
interrupt vector table being relocated from DT 'zephyr,flash' chosen
memory to DT 'zephyr,dtcm' chosen memory. While the vector table is
instruction-fetched during exception entry, a DTCM option is provided
for systems where ITCM is unavailable. DTCM still offers low-latency,
deterministic access compared to normal RAM, but is not the optimal
location for instruction fetch performance.
config ARM_VECTOR_TABLE_ITCM
bool "Place the vector table in DT Chosen ITCM instead of DT Chosen Flash"
depends on $(dt_chosen_enabled,$(DT_CHOSEN_Z_ITCM))
help
When executing in place (XiP), selecting this option will result in the
interrupt vector table being relocated from DT 'zephyr,flash' chosen
memory to DT 'zephyr,itcm' chosen memory. ITCM provides single-cycle,
deterministic instruction fetches via the CPU instruction bus, it offers
the lowest interrupt latency and is the preferred location when available.
endchoice
endmenu

View File

@@ -49,9 +49,9 @@ if(CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT)
endif()
if(CONFIG_CORTEX_M_DWT)
if(CONFIG_TIMING_FUNCTIONS)
zephyr_library_sources(timing.c)
endif()
if(CONFIG_TIMING_FUNCTIONS)
zephyr_library_sources(timing.c)
endif()
endif()
if(CONFIG_SW_VECTOR_RELAY)

View File

@@ -192,6 +192,7 @@ config CPU_CORTEX_M_HAS_CMSE
config ARMV6_M_ARMV8_M_BASELINE
bool
select ATOMIC_OPERATIONS_BUILTIN if ARMV8_M_BASELINE
select ATOMIC_OPERATIONS_C if !ARMV8_M_BASELINE
select ISA_THUMB2
help

View File

@@ -28,5 +28,11 @@ SECTION_PROLOGUE(.sram_vt,,)
. += _vector_end - _vector_start;
MPU_ALIGN(_sram_vector_size);
_sram_vector_end = .;
#if defined(CONFIG_ARM_VECTOR_TABLE_ITCM)
} GROUP_DATA_LINK_IN(ITCM, ROMABLE_REGION)
#elif defined(CONFIG_ARM_VECTOR_TABLE_DTCM)
} GROUP_DATA_LINK_IN(DTCM, ROMABLE_REGION)
#else
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
#endif
_sram_vector_size = _sram_vector_end - _sram_vector_start;

View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2019 - 2020 Nordic Semiconductor ASA
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -57,4 +58,8 @@ INCLUDE isr_tables_vt.ld
KEEP(*(.vectors))
#endif
#ifdef CONFIG_CPU_AARCH32_CORTEX_R
KEEP(*(._bindesc_entry.*))
#endif
_vector_end = .;

View File

@@ -82,7 +82,7 @@ static inline void dwt_access(bool ena)
static inline int z_arm_dwt_init(void)
{
/* Enable tracing */
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
DCB->DEMCR |= DCB_DEMCR_TRCENA_Msk;
/* Unlock DWT access if any */
dwt_access(true);
@@ -149,7 +149,7 @@ static inline void z_arm_dwt_enable_debug_monitor(void)
* unpredictable if the DebugMonitor exception is triggered. We
* assert that the CPU is in normal mode.
*/
__ASSERT((CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk) == 0,
__ASSERT((DCB->DHCSR & DCB_DHCSR_C_DEBUGEN_Msk) == 0,
"Cannot enable DBM when CPU is in Debug mode\n");
#if defined(CONFIG_ARMV8_M_SE) && !defined(CONFIG_ARM_NONSECURE_FIRMWARE)
@@ -160,7 +160,7 @@ static inline void z_arm_dwt_enable_debug_monitor(void)
* when enabling the DebugMonitor exception, assert that
* it is not targeting the Non Secure domain.
*/
__ASSERT((CoreDebug->DEMCR & DCB_DEMCR_SDME_Msk) != 0, "DebugMonitor targets Non-Secure\n");
__ASSERT((DCB->DEMCR & DCB_DEMCR_SDME_Msk) != 0, "DebugMonitor targets Non-Secure\n");
#endif
/* The DebugMonitor handler priority is set already
@@ -169,7 +169,7 @@ static inline void z_arm_dwt_enable_debug_monitor(void)
*/
/* Enable debug monitor exception triggered on debug events */
CoreDebug->DEMCR |= CoreDebug_DEMCR_MON_EN_Msk;
DCB->DEMCR |= DCB_DEMCR_MON_EN_Msk;
}
#endif /* CONFIG_CORTEX_M_DWT */

View File

@@ -79,6 +79,26 @@ config CPU_CORTEX_A78
help
This option signifies the use of a Cortex-A78 CPU
config CPU_CORTEX_A510
bool
select CPU_CORTEX_A
select ARMV9_A
help
This option signifies the use of a Cortex-A510 CPU, which is Arm's
efficiency core implementing the ARMv9-A architecture. It provides
power-efficient processing optimized for embedded applications with
ARMv9-A features.
config CPU_CORTEX_A320
bool
select CPU_CORTEX_A
select ARMV9_A
help
This option signifies the use of a Cortex-A320 CPU, which implements
the ARMv9.2-A architecture. It provides advanced features including
enhanced SVE2, improved security extensions, and specialized performance
optimizations.
config CPU_CORTEX_R82
bool
select CPU_AARCH64_CORTEX_R
@@ -101,10 +121,15 @@ config MAIN_STACK_SIZE
config IDLE_STACK_SIZE
default 4096
config PRIVILEGED_STACK_SIZE
default 4096 if FPU_SHARING
default 2048
config ISR_STACK_SIZE
default 4096
config TEST_EXTRA_STACK_SIZE
default 4096 if FPU_SHARING
default 2048
config SYSTEM_WORKQUEUE_STACK_SIZE
@@ -158,14 +183,6 @@ config ARM64_EXCEPTION_STACK_TRACE
help
Internal config to enable runtime stack traces on fatal exceptions.
config ARCH_HAS_STACKWALK
bool
default y
depends on FRAME_POINTER
help
Internal config to indicate that the arch_stack_walk() API is implemented
and it can be enabled.
config ARM64_SAFE_EXCEPTION_STACK_SIZE
int "The stack size of the safe exception stack"
default 4096
@@ -196,6 +213,14 @@ config ARM64_STACK_PROTECTION
if CPU_CORTEX_A
config ARCH_HAS_STACKWALK
bool
default y
depends on FRAME_POINTER
help
Internal config to indicate that the arch_stack_walk() API is implemented
and it can be enabled.
config ARMV8_A_NS
bool "ARMv8-A Normal World (Non-Secure world of Trustzone)"
help
@@ -223,6 +248,20 @@ config ARMV8_A
so that it can support some features included in the AArch64 state.
It supports the T32 and A32 instruction sets.
config ARMV9_A
bool
select ATOMIC_OPERATIONS_BUILTIN
select CPU_HAS_MMU
select ARCH_HAS_USERSPACE if ARM_MMU
select ARCH_HAS_NOCACHE_MEMORY_SUPPORT if ARM_MMU
imply ARM64_SVE if FPU_SHARING
help
This option signifies the use of an ARMv9-A processor
implementation.
ARMv9-A builds on ARMv8-A and introduces additional security,
performance, and machine learning capabilities while maintaining
backward compatibility with ARMv8-A software.
rsource "xen/Kconfig"
endif # CPU_CORTEX_A
@@ -348,6 +387,8 @@ config ARM64_PA_BITS
config MAX_XLAT_TABLES
int "Maximum numbers of translation tables"
default 32 if USERSPACE && TEST && SMP
default 24 if USERSPACE && TEST
default 20 if USERSPACE && (ARM64_VA_BITS >= 40)
default 16 if USERSPACE
default 12 if (ARM64_VA_BITS >= 40)
@@ -380,4 +421,27 @@ config ARM64_BOOT_DISABLE_DCACHE
cache and then disable data cache, it will will be re-enabled after
MMU is configured and enabled.
config ARM64_SVE
bool "Scalable Vector Extension (SVE) support"
depends on ARMV9_A
help
Enable support for ARM64 Scalable Vector Extension (SVE).
This allows threads to use SVE/SVE2 instructions and automatically
handles context switching of SVE registers (Z0-Z31, P0-P15, FFR)
if CONFIG_FPU_SHARING is also set. Requires ARMv9-A architecture.
config ARM64_SVE_VL_MAX
int "Maximum SVE vector length in bytes"
depends on ARM64_SVE
default 16
range 16 256
help
Maximum supported SVE vector length in bytes. This determines
the SVE context size within each thread structure. Valid values
are any power of two from 16 to 256 inclusive (128 to 2048 bits).
This can be smaller than the hardware supported vector length to
save some per-thread memory in which case the hardware will be
limited to the specified length. Having a larger value than what
the hardware supports will only waste memory.
endif # CPU_CORTEX_A || CPU_AARCH64_CORTEX_R

View File

@@ -337,7 +337,7 @@ static bool z_arm64_stack_corruption_check(struct arch_esf *esf, uint64_t esr, u
* a new nested exception triggered by FPU accessing (var_args).
*/
arch_flush_local_fpu();
write_cpacr_el1(read_cpacr_el1() | CPACR_EL1_FPEN_NOTRAP);
write_cpacr_el1(read_cpacr_el1() | CPACR_EL1_FPEN);
#endif
arch_curr_cpu()->arch.corrupted_sp = 0UL;
EXCEPTION_DUMP("STACK OVERFLOW FROM KERNEL,"

View File

@@ -7,12 +7,20 @@
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/offsets.h>
_ASM_FILE_PROLOGUE
GTEXT(z_arm64_fpu_save)
SECTION_FUNC(TEXT, z_arm64_fpu_save)
mrs x1, fpsr
mrs x2, fpcr
str w1, [x0, #__z_arm64_fp_context_fpsr_OFFSET]
str w2, [x0, #__z_arm64_fp_context_fpcr_OFFSET]
/* Save NEON registers */
add x0, x0, #__z_arm64_fp_context_neon_OFFSET
stp q0, q1, [x0, #(16 * 0)]
stp q2, q3, [x0, #(16 * 2)]
stp q4, q5, [x0, #(16 * 4)]
@@ -30,16 +38,18 @@ SECTION_FUNC(TEXT, z_arm64_fpu_save)
stp q28, q29, [x0, #(16 * 28)]
stp q30, q31, [x0, #(16 * 30)]
mrs x1, fpsr
mrs x2, fpcr
str w1, [x0, #(16 * 32 + 0)]
str w2, [x0, #(16 * 32 + 4)]
ret
GTEXT(z_arm64_fpu_restore)
SECTION_FUNC(TEXT, z_arm64_fpu_restore)
ldr w1, [x0, #__z_arm64_fp_context_fpsr_OFFSET]
ldr w2, [x0, #__z_arm64_fp_context_fpcr_OFFSET]
msr fpsr, x1
msr fpcr, x2
/* Restore NEON registers */
add x0, x0, #__z_arm64_fp_context_neon_OFFSET
ldp q0, q1, [x0, #(16 * 0)]
ldp q2, q3, [x0, #(16 * 2)]
ldp q4, q5, [x0, #(16 * 4)]
@@ -57,9 +67,164 @@ SECTION_FUNC(TEXT, z_arm64_fpu_restore)
ldp q28, q29, [x0, #(16 * 28)]
ldp q30, q31, [x0, #(16 * 30)]
ldr w1, [x0, #(16 * 32 + 0)]
ldr w2, [x0, #(16 * 32 + 4)]
msr fpsr, x1
msr fpcr, x2
ret
#ifdef CONFIG_ARM64_SVE
GTEXT(z_arm64_sve_save)
SECTION_FUNC(TEXT, z_arm64_sve_save)
/* Save control registers */
mrs x2, fpsr
mrs x3, fpcr
str w2, [x0, #__z_arm64_fp_context_fpsr_OFFSET]
str w3, [x0, #__z_arm64_fp_context_fpcr_OFFSET]
/* Get Z registers base address */
add x2, x0, #__z_arm64_fp_context_sve_z_regs_OFFSET
/* Save Z registers */
str z0, [x2, #0, MUL VL]
str z1, [x2, #1, MUL VL]
str z2, [x2, #2, MUL VL]
str z3, [x2, #3, MUL VL]
str z4, [x2, #4, MUL VL]
str z5, [x2, #5, MUL VL]
str z6, [x2, #6, MUL VL]
str z7, [x2, #7, MUL VL]
str z8, [x2, #8, MUL VL]
str z9, [x2, #9, MUL VL]
str z10, [x2, #10, MUL VL]
str z11, [x2, #11, MUL VL]
str z12, [x2, #12, MUL VL]
str z13, [x2, #13, MUL VL]
str z14, [x2, #14, MUL VL]
str z15, [x2, #15, MUL VL]
str z16, [x2, #16, MUL VL]
str z17, [x2, #17, MUL VL]
str z18, [x2, #18, MUL VL]
str z19, [x2, #19, MUL VL]
str z20, [x2, #20, MUL VL]
str z21, [x2, #21, MUL VL]
str z22, [x2, #22, MUL VL]
str z23, [x2, #23, MUL VL]
str z24, [x2, #24, MUL VL]
str z25, [x2, #25, MUL VL]
str z26, [x2, #26, MUL VL]
str z27, [x2, #27, MUL VL]
str z28, [x2, #28, MUL VL]
str z29, [x2, #29, MUL VL]
str z30, [x2, #30, MUL VL]
str z31, [x2, #31, MUL VL]
/* Get P registers base address */
mov x3, #__z_arm64_fp_context_sve_p_regs_OFFSET
add x3, x0, x3
/* Save P registers */
str p0, [x3, #0, MUL VL]
str p1, [x3, #1, MUL VL]
str p2, [x3, #2, MUL VL]
str p3, [x3, #3, MUL VL]
str p4, [x3, #4, MUL VL]
str p5, [x3, #5, MUL VL]
str p6, [x3, #6, MUL VL]
str p7, [x3, #7, MUL VL]
str p8, [x3, #8, MUL VL]
str p9, [x3, #9, MUL VL]
str p10, [x3, #10, MUL VL]
str p11, [x3, #11, MUL VL]
str p12, [x3, #12, MUL VL]
str p13, [x3, #13, MUL VL]
str p14, [x3, #14, MUL VL]
str p15, [x3, #15, MUL VL]
/* Get FFR base address */
mov x4, #__z_arm64_fp_context_sve_ffr_OFFSET
add x4, x0, x4
/* Save FFR */
rdffr p0.b
str p0, [x4]
ret
GTEXT(z_arm64_sve_restore)
SECTION_FUNC(TEXT, z_arm64_sve_restore)
/* Get Z registers base address */
add x2, x0, #__z_arm64_fp_context_sve_z_regs_OFFSET
/* Restore Z registers */
ldr z0, [x2, #0, MUL VL]
ldr z1, [x2, #1, MUL VL]
ldr z2, [x2, #2, MUL VL]
ldr z3, [x2, #3, MUL VL]
ldr z4, [x2, #4, MUL VL]
ldr z5, [x2, #5, MUL VL]
ldr z6, [x2, #6, MUL VL]
ldr z7, [x2, #7, MUL VL]
ldr z8, [x2, #8, MUL VL]
ldr z9, [x2, #9, MUL VL]
ldr z10, [x2, #10, MUL VL]
ldr z11, [x2, #11, MUL VL]
ldr z12, [x2, #12, MUL VL]
ldr z13, [x2, #13, MUL VL]
ldr z14, [x2, #14, MUL VL]
ldr z15, [x2, #15, MUL VL]
ldr z16, [x2, #16, MUL VL]
ldr z17, [x2, #17, MUL VL]
ldr z18, [x2, #18, MUL VL]
ldr z19, [x2, #19, MUL VL]
ldr z20, [x2, #20, MUL VL]
ldr z21, [x2, #21, MUL VL]
ldr z22, [x2, #22, MUL VL]
ldr z23, [x2, #23, MUL VL]
ldr z24, [x2, #24, MUL VL]
ldr z25, [x2, #25, MUL VL]
ldr z26, [x2, #26, MUL VL]
ldr z27, [x2, #27, MUL VL]
ldr z28, [x2, #28, MUL VL]
ldr z29, [x2, #29, MUL VL]
ldr z30, [x2, #30, MUL VL]
ldr z31, [x2, #31, MUL VL]
/* Get FFR base address */
mov x4, #__z_arm64_fp_context_sve_ffr_OFFSET
add x4, x0, x4
/* Restore FFR */
ldr p0, [x4]
wrffr p0.b
/* Get P registers base address */
mov x3, #__z_arm64_fp_context_sve_p_regs_OFFSET
add x3, x0, x3
/* Restore P registers intervals */
ldr p0, [x3, #0, MUL VL]
ldr p1, [x3, #1, MUL VL]
ldr p2, [x3, #2, MUL VL]
ldr p3, [x3, #3, MUL VL]
ldr p4, [x3, #4, MUL VL]
ldr p5, [x3, #5, MUL VL]
ldr p6, [x3, #6, MUL VL]
ldr p7, [x3, #7, MUL VL]
ldr p8, [x3, #8, MUL VL]
ldr p9, [x3, #9, MUL VL]
ldr p10, [x3, #10, MUL VL]
ldr p11, [x3, #11, MUL VL]
ldr p12, [x3, #12, MUL VL]
ldr p13, [x3, #13, MUL VL]
ldr p14, [x3, #14, MUL VL]
ldr p15, [x3, #15, MUL VL]
/* Restore control registers */
ldr w2, [x0, #__z_arm64_fp_context_fpsr_OFFSET]
ldr w3, [x0, #__z_arm64_fp_context_fpcr_OFFSET]
msr fpsr, x2
msr fpcr, x3
ret
#endif /* CONFIG_ARM64_SVE */

View File

@@ -15,6 +15,8 @@
/* to be found in fpu.S */
extern void z_arm64_fpu_save(struct z_arm64_fp_context *saved_fp_context);
extern void z_arm64_fpu_restore(struct z_arm64_fp_context *saved_fp_context);
extern void z_arm64_sve_save(struct z_arm64_fp_context *saved_fp_context);
extern void z_arm64_sve_restore(struct z_arm64_fp_context *saved_fp_context);
#define FPU_DEBUG 0
@@ -53,7 +55,7 @@ static void DBG(char *msg, struct k_thread *th)
if (th == NULL) {
th = _current;
}
v = *(unsigned char *)&th->arch.saved_fp_context;
v = *(unsigned char *)&th->arch.saved_fp_context.neon;
*p++ = ' ';
*p++ = ((v >> 4) < 10) ? ((v >> 4) + '0') : ((v >> 4) - 10 + 'a');
*p++ = ((v & 15) < 10) ? ((v & 15) + '0') : ((v & 15) - 10 + 'a');
@@ -91,6 +93,46 @@ static inline void DBG_PC(char *msg, uintptr_t pc) { }
#endif /* FPU_DEBUG */
#ifdef CONFIG_ARM64_SVE
/* Get current SVE vector length */
static inline uint32_t z_arm64_sve_get_vl(void)
{
uint32_t vl;
__asm__("rdvl %0, #1" : "=r"(vl));
return vl;
}
#define USE_SVE(t) ((t) && (t)->arch.saved_fp_context.sve.simd_mode == SIMD_SVE)
/* Convert NEON V registers to SVE Z registers in place */
static void convert_Vx_to_Zx(struct z_arm64_fp_context *context)
{
uint32_t vl = z_arm64_sve_get_vl();
if (CONFIG_ARM64_SVE_VL_MAX <= 16 || vl <= 16) {
return;
}
/*
* Since it's a union, we need to extend each 128-bit NEON register
* to the full SVE vector length, working backwards to avoid overwriting
* data we still need to copy.
*/
for (int i = 31; i >= 0; i--) {
/* Copy the 128-bit NEON value to the low 128 bits of the Z register */
*(__int128 *)&context->sve.z_regs[i * vl] = context->neon.v_regs[i];
/* Zero the upper part of the Z register (beyond 128 bits) */
memset(&context->sve.z_regs[i * vl + 16], 0, vl - 16);
}
}
#else
#define USE_SVE(t) false
#endif
/*
* Flush FPU content and disable access.
* This is called locally and also from flush_fpu_ipi_handler().
@@ -105,19 +147,30 @@ void arch_flush_local_fpu(void)
uint64_t cpacr = read_cpacr_el1();
/* turn on FPU access */
write_cpacr_el1(cpacr | CPACR_EL1_FPEN_NOTRAP);
cpacr |= CPACR_EL1_FPEN;
if (USE_SVE(owner)) {
cpacr |= CPACR_EL1_ZEN;
}
write_cpacr_el1(cpacr);
barrier_isync_fence_full();
/* save current owner's content */
z_arm64_fpu_save(&owner->arch.saved_fp_context);
if (USE_SVE(owner)) {
z_arm64_sve_save(&owner->arch.saved_fp_context);
} else {
z_arm64_fpu_save(&owner->arch.saved_fp_context);
}
/* make sure content made it to memory before releasing */
barrier_dsync_fence_full();
/* release ownership */
atomic_ptr_clear(&_current_cpu->arch.fpu_owner);
DBG("disable", owner);
/* disable FPU access */
write_cpacr_el1(cpacr & ~CPACR_EL1_FPEN_NOTRAP);
cpacr &= ~(CPACR_EL1_FPEN | CPACR_EL1_ZEN);
write_cpacr_el1(cpacr);
barrier_isync_fence_full();
}
}
@@ -173,7 +226,7 @@ void z_arm64_fpu_enter_exc(void)
__ASSERT(read_daif() & DAIF_IRQ_BIT, "must be called with IRQs disabled");
/* always deny FPU access whenever an exception is entered */
write_cpacr_el1(read_cpacr_el1() & ~CPACR_EL1_FPEN_NOTRAP);
write_cpacr_el1(read_cpacr_el1() & ~(CPACR_EL1_FPEN | CPACR_EL1_ZEN));
barrier_isync_fence_full();
}
@@ -253,29 +306,48 @@ static bool simulate_str_q_insn(struct arch_esf *esf)
* don't get interrupted that is. To ensure that we mask interrupts to
* the triggering exception context.
*/
void z_arm64_fpu_trap(struct arch_esf *esf)
void z_arm64_fpu_trap(struct arch_esf *esf, uint32_t exception_class)
{
__ASSERT(read_daif() & DAIF_IRQ_BIT, "must be called with IRQs disabled");
/* check if a quick simulation can do it */
if (simulate_str_q_insn(esf)) {
if (!(IS_ENABLED(CONFIG_ARM64_SVE) && exception_class == 0x19) &&
simulate_str_q_insn(esf)) {
return;
}
DBG_PC("trap entry", esf->elr);
struct k_thread *owner = atomic_ptr_get(&_current_cpu->arch.fpu_owner);
uint64_t cpacr = read_cpacr_el1();
/* turn on FPU access */
write_cpacr_el1(read_cpacr_el1() | CPACR_EL1_FPEN_NOTRAP);
cpacr |= CPACR_EL1_FPEN;
if (USE_SVE(owner)) {
cpacr |= CPACR_EL1_ZEN;
}
write_cpacr_el1(cpacr);
barrier_isync_fence_full();
/* save current owner's content if any */
struct k_thread *owner = atomic_ptr_get(&_current_cpu->arch.fpu_owner);
if (owner) {
z_arm64_fpu_save(&owner->arch.saved_fp_context);
if (USE_SVE(owner)) {
z_arm64_sve_save(&owner->arch.saved_fp_context);
DBG("sve_save", owner);
} else {
z_arm64_fpu_save(&owner->arch.saved_fp_context);
DBG("fpu_save", owner);
}
barrier_dsync_fence_full();
atomic_ptr_clear(&_current_cpu->arch.fpu_owner);
DBG("save", owner);
}
if (IS_ENABLED(CONFIG_ARM64_SVE) && exception_class == 0x19 &&
!(cpacr & CPACR_EL1_ZEN)) {
/* SVE trap - also enable SVE access */
cpacr |= CPACR_EL1_ZEN;
write_cpacr_el1(cpacr);
barrier_isync_fence_full();
}
if (arch_exception_depth() > 1) {
@@ -300,9 +372,45 @@ void z_arm64_fpu_trap(struct arch_esf *esf)
/* become new owner */
atomic_ptr_set(&_current_cpu->arch.fpu_owner, _current);
#ifdef CONFIG_ARM64_SVE
if (exception_class == 0x19) {
/* SVE trap */
if (_current->arch.saved_fp_context.sve.simd_mode == SIMD_NEON) {
/* upgrade from Neon to SVE before loading regs */
convert_Vx_to_Zx(&_current->arch.saved_fp_context);
}
_current->arch.saved_fp_context.sve.simd_mode = SIMD_SVE;
} else if (_current->arch.saved_fp_context.sve.simd_mode != SIMD_SVE) {
/* not SVE trap and context is not SVE either */
if ((cpacr & CPACR_EL1_ZEN) != 0) {
/* disable SVE access leaving only FP */
cpacr &= ~CPACR_EL1_ZEN;
write_cpacr_el1(cpacr);
barrier_isync_fence_full();
}
_current->arch.saved_fp_context.sve.simd_mode = SIMD_NEON;
} else if ((cpacr & CPACR_EL1_ZEN) == 0) {
/*
* Not SVE trap but context is SVE and CPACR_EL1_ZEN not set.
* This is an edge case that happens when previous owner
* didn't use SVE and we are not using SVE right now either
* although we did in the past. We're about to restore an
* SVE context so make sure SVE access is enabled.
*/
cpacr |= CPACR_EL1_ZEN;
write_cpacr_el1(cpacr);
barrier_isync_fence_full();
}
#endif
/* restore our content */
z_arm64_fpu_restore(&_current->arch.saved_fp_context);
DBG("restore", NULL);
if (USE_SVE(_current)) {
z_arm64_sve_restore(&_current->arch.saved_fp_context);
DBG("sve_restore", NULL);
} else {
z_arm64_fpu_restore(&_current->arch.saved_fp_context);
DBG("fpu_restore", NULL);
}
}
/*
@@ -323,10 +431,14 @@ static void fpu_access_update(unsigned int exc_update_level)
/* We're about to execute non-exception code */
if (atomic_ptr_get(&_current_cpu->arch.fpu_owner) == _current) {
/* turn on FPU access */
write_cpacr_el1(cpacr | CPACR_EL1_FPEN_NOTRAP);
cpacr |= CPACR_EL1_FPEN;
if (USE_SVE(_current)) {
cpacr |= CPACR_EL1_ZEN;
}
write_cpacr_el1(cpacr);
} else {
/* deny FPU access */
write_cpacr_el1(cpacr & ~CPACR_EL1_FPEN_NOTRAP);
write_cpacr_el1(cpacr & ~(CPACR_EL1_FPEN | CPACR_EL1_ZEN));
}
} else {
/*
@@ -334,7 +446,7 @@ static void fpu_access_update(unsigned int exc_update_level)
* access as we want to make sure IRQs are disabled before
* granting it access (see z_arm64_fpu_trap() documentation).
*/
write_cpacr_el1(cpacr & ~CPACR_EL1_FPEN_NOTRAP);
write_cpacr_el1(cpacr & ~(CPACR_EL1_FPEN | CPACR_EL1_ZEN));
}
barrier_isync_fence_full();
}

View File

@@ -54,7 +54,15 @@ static uint64_t *new_table(void)
}
}
LOG_ERR("CONFIG_MAX_XLAT_TABLES, too small");
#if defined(CONFIG_LOG)
LOG_ERR("CONFIG_MAX_XLAT_TABLES is too small");
#else
printk("ERROR: CONFIG_MAX_XLAT_TABLES is too small\n");
#endif
/* Unfortunately many code paths are not ready for failure */
k_panic();
return NULL;
}

View File

@@ -29,6 +29,7 @@
#include <zephyr/kernel.h>
#include <kernel_arch_data.h>
#include <kernel_offsets.h>
#include <zephyr/arch/arm64/thread.h>
GEN_OFFSET_SYM(_thread_arch_t, exception_depth);
@@ -77,6 +78,20 @@ GEN_NAMED_OFFSET_SYM(arm_smccc_res_t, a6, a6_a7);
#endif /* CONFIG_HAS_ARM_SMCCC */
#ifdef CONFIG_FPU_SHARING
GEN_OFFSET_SYM(z_arm64_fp_context, fpsr);
GEN_OFFSET_SYM(z_arm64_fp_context, fpcr);
GEN_OFFSET_SYM(z_arm64_fp_context, neon);
#ifdef CONFIG_ARM64_SVE
GEN_ABSOLUTE_SYM(__z_arm64_fp_context_sve_z_regs_OFFSET,
offsetof(struct z_arm64_fp_context, sve.z_regs));
GEN_ABSOLUTE_SYM(__z_arm64_fp_context_sve_p_regs_OFFSET,
offsetof(struct z_arm64_fp_context, sve.p_regs));
GEN_ABSOLUTE_SYM(__z_arm64_fp_context_sve_ffr_OFFSET,
offsetof(struct z_arm64_fp_context, sve.ffr));
#endif
#endif
GEN_ABS_SYM_END
#endif /* _ARM_OFFSETS_INC_ */

View File

@@ -78,7 +78,22 @@ void z_arm64_el3_init(void)
reg &= ~(CPTR_TTA_BIT | /* Do not trap sysreg accesses */
CPTR_TFP_BIT | /* Do not trap SVE, SIMD and FP */
CPTR_TCPAC_BIT); /* Do not trap CPTR_EL2 / CPACR_EL1 accesses */
#ifdef CONFIG_ARM64_SVE
/* Enable SVE for EL2 and below if SVE is implemented */
if (is_sve_implemented()) {
reg |= CPTR_EZ_BIT; /* Enable SVE access for lower ELs */
write_cptr_el3(reg);
/* Initialize ZCR_EL3 for full SVE vector length */
/* ZCR_EL3.LEN = 0x1ff means full hardware vector length */
write_zcr_el3(0x1ff);
} else {
write_cptr_el3(reg);
}
#else
write_cptr_el3(reg);
#endif
reg = 0U; /* Reset */
#ifdef CONFIG_ARMV8_A_NS
@@ -156,8 +171,24 @@ void z_arm64_el2_init(void)
reg = 0U; /* RES0 */
reg |= CPTR_EL2_RES1; /* RES1 */
reg &= ~(CPTR_TFP_BIT | /* Do not trap SVE, SIMD and FP */
CPTR_TCPAC_BIT); /* Do not trap CPACR_EL1 accesses */
CPTR_TCPAC_BIT | /* Do not trap CPACR_EL1 accesses */
CPTR_EL2_TZ_BIT); /* Do not trap SVE to EL2 */
#ifdef CONFIG_ARM64_SVE
/* Enable SVE for EL1 and EL0 if SVE is implemented */
if (is_sve_implemented()) {
reg &= ~CPTR_EL2_ZEN_MASK;
reg |= (CPTR_EL2_ZEN_EL1_EN | CPTR_EL2_ZEN_EL0_EN);
write_cptr_el2(reg);
/* Initialize ZCR_EL2 for full SVE vector length */
/* ZCR_EL2.LEN = 0x1ff means full hardware vector length */
write_zcr_el2(0x1ff);
} else {
write_cptr_el2(reg);
}
#else
write_cptr_el2(reg);
#endif
zero_cntvoff_el2(); /* Set 64-bit virtual timer offset to 0 */
zero_cnthctl_el2();
@@ -191,9 +222,22 @@ void z_arm64_el1_init(void)
barrier_isync_fence_full();
reg = 0U; /* RES0 */
reg |= CPACR_EL1_FPEN_NOTRAP; /* Do not trap NEON/SIMD/FP initially */
reg |= CPACR_EL1_FPEN; /* Do not trap NEON/SIMD/FP initially */
/* TODO: CONFIG_FLOAT_*_FORBIDDEN */
#ifdef CONFIG_ARM64_SVE
/* Enable SVE access if SVE is implemented */
if (is_sve_implemented()) {
reg |= CPACR_EL1_ZEN; /* Do not trap SVE initially */
write_cpacr_el1(reg);
/* Initialize ZCR_EL1 SVE vector length */
write_zcr_el1(CONFIG_ARM64_SVE_VL_MAX/16 - 1);
} else {
write_cpacr_el1(reg);
}
#else
write_cpacr_el1(reg);
#endif
reg = read_sctlr_el1();
reg |= (SCTLR_EL1_RES1 | /* RES1 */

View File

@@ -153,8 +153,15 @@ SECTION_FUNC(TEXT, z_arm64_sync_exc)
#ifdef CONFIG_FPU_SHARING
cmp x1, #0x07 /*Access to SIMD or floating-point */
bne 1f
mov x0, sp
beq fpu_sve_trap
#ifdef CONFIG_ARM64_SVE
cmp x1, #0x19 /*Trapped access to SVE functionality */
beq fpu_sve_trap
#endif
b 1f
fpu_sve_trap:
mov x0, sp /* ESF pointer */
/* x1 already contains exception class (EC) - pass as second argument */
bl z_arm64_fpu_trap
b z_arm64_exit_exc_fpu_done
1:

View File

@@ -33,3 +33,25 @@ config XEN_INTERFACE_VERSION
help
Xen interface version to use. This is the version of the
interface that Zephyr will use to communicate with the hypervisor.
config XEN_DOMCTL_INTERFACE_VERSION
hex "Xen Domctl interface version"
default 0x17
range 0x15 0x17
depends on XEN
help
Xen Domctl interface version to use. This is the version of the
domctl interface that Zephyr will use to communicate with
the hypervisor. The default value is the latest version supported
by the kernel.
config XEN_SYSCTL_INTERFACE_VERSION
hex "Xen Sysctl interface version"
default 0x15
range 0x15 0x15
depends on XEN
help
Xen Sysctl interface version to use. This is the version of the
domctl interface that Zephyr will use to communicate with
the hypervisor. The default value is the latest version supported
by the kernel.

View File

@@ -23,7 +23,10 @@ HYPERCALL(sched_op);
HYPERCALL(event_channel_op);
HYPERCALL(hvm_op);
HYPERCALL(memory_op);
HYPERCALL(dm_op);
HYPERCALL(xen_version);
#ifdef CONFIG_XEN_DOM0
HYPERCALL(domctl);
HYPERCALL(sysctl);
#endif

View File

@@ -55,11 +55,6 @@ void arch_bss_zero(void)
}
arch_early_memset(__bss_start, 0, __bss_end - __bss_start);
#if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_ccm))
arch_early_memset(&__ccm_bss_start, 0,
(uintptr_t) &__ccm_bss_end
- (uintptr_t) &__ccm_bss_start);
#endif
#if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_dtcm))
arch_early_memset(&__dtcm_bss_start, 0,
(uintptr_t) &__dtcm_bss_end

View File

@@ -38,10 +38,6 @@ void arch_data_copy(void)
(uintptr_t) &_nocache_load_ram_size);
#endif /* CONFIG_NOCACHE_MEMORY */
#endif /* CONFIG_ARCH_HAS_NOCACHE_MEMORY_SUPPORT */
#if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_ccm))
arch_early_memcpy(&__ccm_data_start, &__ccm_data_load_start,
__ccm_data_end - __ccm_data_start);
#endif
#if DT_NODE_HAS_STATUS_OKAY(DT_CHOSEN(zephyr_itcm))
arch_early_memcpy(&__itcm_start, &__itcm_load_start,
(uintptr_t) &__itcm_size);

View File

@@ -7,9 +7,9 @@
#
if(CONFIG_BIG_ENDIAN)
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT "elf32-bigmips")
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT "elf32-bigmips")
else()
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT "elf32-littlemips")
set_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT "elf32-littlemips")
endif()
add_subdirectory(core)

View File

@@ -39,34 +39,29 @@ set_property(TARGET native_simulator PROPERTY LOCALIZE_EXTRA_OPTIONS "")
set(NSI_DIR ${ZEPHYR_BASE}/scripts/native_simulator CACHE PATH "Path to the native simulator")
if(EXISTS ${CMAKE_CURRENT_LIST_DIR}/${CMAKE_HOST_SYSTEM_NAME}.${CMAKE_HOST_SYSTEM_PROCESSOR}.cmake)
# @Intent: Set necessary compiler & linker options for this specific host architecture & OS
include(${CMAKE_HOST_SYSTEM_NAME}.${CMAKE_HOST_SYSTEM_PROCESSOR}.cmake)
else() # Linux.x86_64
if(CONFIG_64BIT)
# some gcc versions fail to build without -fPIC
zephyr_compile_options(-m64 -fPIC)
zephyr_link_libraries(-m64)
target_link_options(native_simulator INTERFACE "-m64")
target_compile_options(native_simulator INTERFACE "-m64")
if(NATIVE_TARGET_HOST) # Allow users to manually select the target for cross-compiling use cases
set(TARGET_HOST ${NATIVE_TARGET_HOST})
else()
if("${CMAKE_HOST_SYSTEM_PROCESSOR}" MATCHES "arm.*")
# All 32bit arm variants
set(TARGET_HOST "arm")
elseif("${CMAKE_HOST_SYSTEM_PROCESSOR}" MATCHES ".*86.*")
# x86_64/i*86
set(TARGET_HOST "x86_64")
else()
zephyr_compile_options(-m32)
zephyr_link_libraries(-m32)
target_link_options(native_simulator INTERFACE "-m32")
target_compile_options(native_simulator INTERFACE "-m32")
# When building for 32bits x86, gcc defaults to using the old 8087 float arithmetic
# which causes some issues with literal float comparisons. So we set it
# to use the SSE2 float path instead
# (clang defaults to use SSE, but, setting this option for it is safe)
check_set_compiler_property(APPEND PROPERTY fpsse2 "SHELL:-msse2 -mfpmath=sse")
zephyr_compile_options($<TARGET_PROPERTY:compiler,fpsse2>)
target_compile_options(native_simulator INTERFACE "$<TARGET_PROPERTY:compiler,fpsse2>")
set(TARGET_HOST ${CMAKE_HOST_SYSTEM_PROCESSOR})
endif()
endif()
if(EXISTS ${CMAKE_CURRENT_LIST_DIR}/${TARGET_HOST}.cmake)
# Set necessary compiler & linker options for this specific host architecture
include(${TARGET_HOST}.cmake)
elseif(DEFINED NATIVE_TARGET_HOST)
message(WARNING "NATIVE_TARGET_HOST set to ${NATIVE_TARGET_HOST}, but ${CMAKE_CURRENT_LIST_DIR}/"
"${TARGET_HOST}.cmake not found. No custom target options will be applied."
)
endif()
zephyr_compile_options(
${ARCH_FLAG}
)

View File

@@ -4,7 +4,7 @@
# distributions. Userspace is (generally) either 32-bit or 64-bit but not
# both.
# @Intent: Call a script to get userspace wordsize for comparison with CONFIG_64BIT
# Get userspace wordsize for comparison with CONFIG_64BIT
execute_process(
COMMAND
${PYTHON_EXECUTABLE}

9
arch/posix/arm.cmake Normal file
View File

@@ -0,0 +1,9 @@
# SPDX-License-Identifier: Apache-2.0
if(CONFIG_64BIT)
message(FATAL_ERROR
"CONFIG_64BIT=y while targeting a 32-bit ARM processor.\n"
"If you were targeting native_sim/native/64, target native_sim instead.\n"
"Otherwise, be sure to define CONFIG_64BIT appropriately.\n"
)
endif()

View File

@@ -3,17 +3,17 @@
zephyr_library()
zephyr_library_compile_definitions(NO_POSIX_CHEATS)
zephyr_library_sources(
cpuhalt.c
fatal.c
irq.c
swap.c
thread.c
)
cpuhalt.c
fatal.c
irq.c
swap.c
thread.c
)
if(CONFIG_ARCH_POSIX_TRAP_ON_FATAL)
target_sources(native_simulator INTERFACE fatal_trap.c)
endif()
zephyr_library_sources(
posix_core_nsi.c
posix_core_nsi.c
)

24
arch/posix/x86_64.cmake Normal file
View File

@@ -0,0 +1,24 @@
# SPDX-License-Identifier: Apache-2.0
if(CONFIG_64BIT)
# some gcc versions fail to build without -fPIC
zephyr_compile_options(-m64 -fPIC)
zephyr_link_libraries(-m64)
target_link_options(native_simulator INTERFACE "-m64")
target_compile_options(native_simulator INTERFACE "-m64")
else()
zephyr_compile_options(-m32)
zephyr_link_libraries(-m32)
target_link_options(native_simulator INTERFACE "-m32")
target_compile_options(native_simulator INTERFACE "-m32")
# When building for 32bits x86, gcc defaults to using the old 8087 float arithmetic
# which causes some issues with literal float comparisons. So we set it
# to use the SSE2 float path instead
# (clang defaults to use SSE, but, setting this option for it is safe)
check_set_compiler_property(APPEND PROPERTY fpsse2 "SHELL:-msse2 -mfpmath=sse")
zephyr_compile_options($<TARGET_PROPERTY:compiler,fpsse2>)
target_compile_options(native_simulator INTERFACE "$<TARGET_PROPERTY:compiler,fpsse2>")
endif()

View File

@@ -361,6 +361,7 @@ config RISCV_PMP
select THREAD_LOCAL_STORAGE if USERSPACE
select ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS
select MEM_DOMAIN_ISOLATED_STACKS
select PMP_KERNEL_MODE_DYNAMIC if MEM_ATTR
help
MCU implements Physical Memory Protection.
@@ -409,11 +410,20 @@ config PMP_GRANULARITY
(ie 4, 8, 16, ...), but if neither TOR mode nor NA4 mode is
supported, the minimum granularity is 8.
config PMP_NO_LOCK_GLOBAL
bool "Do not lock the global PMP entries"
select PMP_KERNEL_MODE_DYNAMIC
help
Configure the PMP entries as unlocked (L=0) to implement PMP relative
features. This allows application to dynamically reconfigure PMP
entries without requiring hard reset.
endif #RISCV_PMP
config PMP_STACK_GUARD
def_bool y
depends on HW_STACK_PROTECTION
select PMP_KERNEL_MODE_DYNAMIC if MULTITHREADING
config PMP_STACK_GUARD_MIN_SIZE
int "Stack Guard area size"
@@ -430,6 +440,12 @@ config PMP_STACK_GUARD_MIN_SIZE
wiggle room to accommodate the eventual overflow exception
stack usage.
config PMP_KERNEL_MODE_DYNAMIC
bool
help
Enable this to dynamically reconfigure and activate PMP entries for
Machine mode when switching between kernel (ISR, syscall) and threads.
# Implement the null pointer detection using the Physical Memory Protection
# (PMP) Unit.
config NULL_POINTER_EXCEPTION_DETECTION_PMP
@@ -460,6 +476,17 @@ config RISCV_IMPRECISE_FPU_STATE_TRACKING
the floating-point register state imprecisely by reporting the state to be
dirty even when it has not been modified. This option reflects that.
config RISCV_SMRNMI_ENABLE_NMI_DELIVERY
bool "NMI delivery on SMRNMI hardware (MNSTATUS.NMIE=1)"
select RISCV_ISA_EXT_ZICSR
help
Set MNSTATUS.NMIE bit to 1 during boot to enable NMI delivery on
RISC-V hardware implementing the SMRNMI extension.
This option only enables NMI delivery. It does not provide RNMI
handlers or mnret instruction support. Proper RNMI handlers must
be implemented in SoC-specific code to handle NMI events.
endmenu
config MAIN_STACK_SIZE

View File

@@ -119,6 +119,15 @@ config RISCV_ISA_EXT_ZICSR
The "Zicsr" extension introduces support for the full set of CSR
instructions that operate on CSRs registers.
config RISCV_ISA_EXT_SMCSRIND
bool
depends on RISCV_ISA_EXT_ZICSR
help
(Smcsrind) - Standard Extension for Indirect CSR Access
The Smcsrind extension provides indirect access to CSRs through
the MISELECT and MIREG registers.
config RISCV_ISA_EXT_ZIFENCEI
bool
help

View File

@@ -221,12 +221,12 @@ void z_riscv_fault(struct arch_esf *esf)
unsigned int reason = K_ERR_CPU_EXCEPTION;
if (bad_stack_pointer(esf)) {
#ifdef CONFIG_PMP_STACK_GUARD
#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
/*
* Remove the thread's PMP setting to prevent triggering a stack
* overflow error again due to the previous configuration.
*/
z_riscv_pmp_stackguard_disable();
z_riscv_pmp_kernelmode_disable();
#endif /* CONFIG_PMP_STACK_GUARD */
reason = K_ERR_STACK_CHK_FAIL;
}

View File

@@ -368,19 +368,19 @@ no_fp: /* increment _current->arch.exception_depth */
li t1, RISCV_EXC_ECALLU
beq t0, t1, is_user_syscall
#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
/*
* Determine if we come from user space. If so, reconfigure the PMP for
* kernel mode stack guard.
* kernel mode configuration.
*/
csrr t0, mstatus
li t1, MSTATUS_MPP
and t0, t0, t1
bnez t0, 1f
lr a0, ___cpu_t_current_OFFSET(s0)
call z_riscv_pmp_stackguard_enable
call z_riscv_pmp_kernelmode_enable
1:
#endif /* CONFIG_PMP_STACK_GUARD */
#endif /* CONFIG_PMP_KERNEL_MODE_DYNAMIC */
#endif /* CONFIG_USERSPACE */
@@ -422,7 +422,7 @@ is_kernel_syscall:
addi t0, t0, 4
sr t0, __struct_arch_esf_mepc_OFFSET(sp)
#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
/* Re-activate PMP for m-mode */
li t1, MSTATUS_MPP
csrc mstatus, t1
@@ -515,13 +515,13 @@ do_irq_offload:
#ifdef CONFIG_USERSPACE
is_user_syscall:
#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
/*
* We came from userspace and need to reconfigure the
* PMP for kernel mode stack guard.
* PMP for kernel mode configuration.
*/
lr a0, ___cpu_t_current_OFFSET(s0)
call z_riscv_pmp_stackguard_enable
call z_riscv_pmp_kernelmode_enable
#endif
/* It is safe to re-enable IRQs now */
@@ -585,18 +585,18 @@ valid_syscall_id:
is_interrupt:
#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
#ifdef CONFIG_USERSPACE
/*
* If we came from userspace then we need to reconfigure the
* PMP for kernel mode stack guard.
* PMP for kernel mode configuration.
*/
lr t0, __struct_arch_esf_mstatus_OFFSET(sp)
li t1, MSTATUS_MPP
and t0, t0, t1
bnez t0, 1f
lr a0, ___cpu_t_current_OFFSET(s0)
call z_riscv_pmp_stackguard_enable
call z_riscv_pmp_kernelmode_enable
j 2f
#endif /* CONFIG_USERSPACE */
1: /* Re-activate PMP for m-mode */
@@ -769,8 +769,8 @@ fp_trap_exit:
and t0, t2, t1
bnez t0, 1f
#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
/* Remove kernel stack guard and Reconfigure PMP for user mode */
#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
/* Remove kernel mode configuration and Reconfigure PMP for user mode */
lr a0, ___cpu_t_current_OFFSET(s0)
call z_riscv_pmp_usermode_enable
#endif

View File

@@ -93,6 +93,18 @@ pmpcfg_done:
add t0, t0, a0
jr t0
/*
* Prototype:
*
* void z_riscv_clear_all_pmp_entries(void)
*
* Called from pmp.c to clear all PMP entries.
*
* Note: this is shared with tail clearing code above, hence the same section.
*/
GTEXT(z_riscv_clear_all_pmp_entries)
z_riscv_clear_all_pmp_entries:
pmpcfg_zerotail:
.option push

View File

@@ -15,22 +15,26 @@
* cycles on corresponding CSR registers. Relevant CSR registers are always
* written in batch from their shadow copy in RAM for better efficiency.
*
* In the stackguard case we keep an m-mode copy for each thread. Each user
* In the kernel mode case we keep an m-mode copy for each thread. Each user
* mode threads also has a u-mode copy. This makes faster context switching
* as precomputed content just have to be written to actual registers with
* no additional processing.
*
* Thread-specific m-mode and u-mode PMP entries start from the PMP slot
* indicated by global_pmp_end_index. Lower slots are used by global entries
* which are never modified.
* indicated by global_pmp_end_index[M_MODE] and global_pmp_end_index[U_MODE],
* respectively. Lower slots are used by global entries which are never
* modified.
*/
#include "zephyr/toolchain.h"
#include <zephyr/kernel.h>
#include <kernel_internal.h>
#include <zephyr/linker/linker-defs.h>
#include <pmp.h>
#include <zephyr/arch/arch_interface.h>
#include <zephyr/arch/riscv/csr.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr-riscv.h>
#include <zephyr/mem_mgmt/mem_attr.h>
#define LOG_LEVEL CONFIG_MPU_LOG_LEVEL
#include <zephyr/logging/log.h>
@@ -54,6 +58,47 @@ LOG_MODULE_REGISTER(mpu);
#define PMP_NONE 0
#define PMP_PERM_MASK (PMP_R | PMP_W | PMP_X)
/**
* @brief Decodes PMP configuration and address registers into a memory region's
* start/end addresses.
*
* @param cfg_byte The PMP configuration byte (pmpcfg_n).
* @param pmp_addr A pointer to the full array of PMP address registers (pmpaddr_n).
* @param index The current PMP entry index.
* @param start Pointer to where the calculated start address should be stored.
* @param end Pointer to where the calculated end address should be stored.
*/
IF_DISABLED(CONFIG_ZTEST, (static))
void pmp_decode_region(uint8_t cfg_byte, unsigned long *pmp_addr, unsigned int index,
unsigned long *start, unsigned long *end)
{
unsigned long tmp;
unsigned long pmp_addr_val = pmp_addr[index];
unsigned long pmp_prev_addr_val = (index == 0) ? 0 : pmp_addr[index - 1];
switch (cfg_byte & PMP_A) {
case PMP_TOR:
*start = (index == 0) ? 0 : (pmp_prev_addr_val << 2);
*end = (pmp_addr_val << 2) - 1;
break;
case PMP_NA4:
*start = pmp_addr_val << 2;
*end = *start + 3;
break;
case PMP_NAPOT:
tmp = (pmp_addr_val << 2) | 0x3;
*start = tmp & (tmp + 1);
*end = tmp | (tmp + 1);
break;
default:
*start = 0;
*end = 0;
break;
}
}
static void print_pmp_entries(unsigned int pmp_start, unsigned int pmp_end,
unsigned long *pmp_addr, unsigned long *pmp_cfg,
const char *banner)
@@ -63,27 +108,9 @@ static void print_pmp_entries(unsigned int pmp_start, unsigned int pmp_end,
LOG_DBG("PMP %s:", banner);
for (index = pmp_start; index < pmp_end; index++) {
unsigned long start, end, tmp;
unsigned long start, end;
switch (pmp_n_cfg[index] & PMP_A) {
case PMP_TOR:
start = (index == 0) ? 0 : (pmp_addr[index - 1] << 2);
end = (pmp_addr[index] << 2) - 1;
break;
case PMP_NA4:
start = pmp_addr[index] << 2;
end = start + 3;
break;
case PMP_NAPOT:
tmp = (pmp_addr[index] << 2) | 0x3;
start = tmp & (tmp + 1);
end = tmp | (tmp + 1);
break;
default:
start = 0;
end = 0;
break;
}
pmp_decode_region(pmp_n_cfg[index], pmp_addr, index, &start, &end);
if (end == 0) {
LOG_DBG("%3d: "PR_ADDR" 0x%02x", index,
@@ -112,7 +139,8 @@ static void print_pmp_entries(unsigned int pmp_start, unsigned int pmp_end,
* @param pmp_cfg Pointer to the array where the CSR contents will be stored.
* @param pmp_cfg_size The size of the pmp_cfg array, measured in unsigned long entries.
*/
static inline void z_riscv_pmp_read_config(unsigned long *pmp_cfg, size_t pmp_cfg_size)
IF_DISABLED(CONFIG_ZTEST, (static inline))
void z_riscv_pmp_read_config(unsigned long *pmp_cfg, size_t pmp_cfg_size)
{
__ASSERT(pmp_cfg_size == (size_t)(CONFIG_PMP_SLOTS / PMPCFG_STRIDE),
"Invalid PMP config array size");
@@ -144,7 +172,8 @@ static inline void z_riscv_pmp_read_config(unsigned long *pmp_cfg, size_t pmp_cf
* @param pmp_addr Pointer to the array where the CSR contents will be stored.
* @param pmp_addr_size The size of the pmp_addr array, measured in unsigned long entries.
*/
static inline void z_riscv_pmp_read_addr(unsigned long *pmp_addr, size_t pmp_addr_size)
IF_DISABLED(CONFIG_ZTEST, (static inline))
void z_riscv_pmp_read_addr(unsigned long *pmp_addr, size_t pmp_addr_size)
{
__ASSERT(pmp_addr_size == (size_t)(CONFIG_PMP_SLOTS), "PMP address array size mismatch");
@@ -236,7 +265,7 @@ static bool set_pmp_entry(unsigned int *index_p, uint8_t perm,
return ok;
}
#ifdef CONFIG_PMP_STACK_GUARD
#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
static inline bool set_pmp_mprv_catchall(unsigned int *index_p,
unsigned long *pmp_addr, unsigned long *pmp_cfg,
unsigned int index_limit)
@@ -264,7 +293,7 @@ static inline bool set_pmp_mprv_catchall(unsigned int *index_p,
return ok;
}
#endif /* CONFIG_PMP_STACK_GUARD */
#endif /* CONFIG_PMP_KERNEL_MODE_DYNAMIC */
/**
* @brief Write a range of PMP entries to corresponding PMP registers
@@ -348,6 +377,86 @@ static void write_pmp_entries(unsigned int start, unsigned int end,
pmp_addr, pmp_cfg);
}
#ifdef CONFIG_MEM_ATTR
/**
* @brief Install PMP entries from devicetree mem-attr regions.
*
* Iterates over devicetree-provided memory-attr regions and programs PMP
* via set_pmp_entry(). Ordering matters because PMP checks entries from lowest
* to highest index and uses the first entry that matches the address.
*
* @param index_p Location of the current PMP slot index to use. This index
* will be updated according to the number of slots used.
* @param pmp_addr Array of pmpaddr values (starting at entry 0).
* @param pmp_cfg Array of pmpcfg values (starting at entry 0).
* @param index_limit Index value representing the size of the provided arrays.
* @return Number of PMP slots consumed by installed mem-attr regions.
*
* @note DT_MEM_RISCV_TYPE_IO_X Limitation:
* Since the current PMP entries are non-locked, the eXecute (X)
* permission restriction applied by DT_MEM_RISCV_TYPE_IO_X does
* not prevent execution in higher privilege modes (M-mode/kernel).
* This is because the mstatus.MPRV register bit only affects
* M-mode load/store operations, not instruction fetches.
* The execute restriction still applies to User mode because PMP
* is always enforced for lower privilege modes.
*/
static unsigned int set_pmp_mem_attr(unsigned int *index_p,
unsigned long *pmp_addr, unsigned long *pmp_cfg,
unsigned int index_limit)
{
const struct mem_attr_region_t *region;
unsigned int entry_cnt = *index_p;
size_t num_regions;
num_regions = mem_attr_get_regions(&region);
for (size_t idx = 0; idx < num_regions; ++idx) {
uint8_t perm = DT_MEM_RISCV_TO_PMP_PERM(region[idx].dt_attr);
if (perm || (region[idx].dt_attr & DT_MEM_RISCV_TYPE_EMPTY)) {
set_pmp_entry(index_p, perm,
(uintptr_t)(region[idx].dt_addr),
(size_t)(region[idx].dt_size),
pmp_addr, pmp_cfg, index_limit);
}
}
entry_cnt = *index_p - entry_cnt;
return entry_cnt;
}
#endif /* CONFIG_MEM_ATTR */
/**
* @brief Clear and disable all Physical Memory Protection (PMP) entries.
*
* This function clears all PMP configuration CSRs (pmpcfgX) by writing
* zero to them for all entries defined by CONFIG_PMP_SLOTS.
*
* This unconditional write sets the Address Matching Mode ('A' field) to
* 'OFF' (0x00) for every entry, effectively disabling the PMP mechanism.
*
* This routine does not check the Lock bit. Changes to locked PMP entries
* will be silently ignored by the hardware.
*
* It is implemented in assembly (pmp.S) for efficient RISC-V CSR access.
*/
extern void z_riscv_clear_all_pmp_entries(void);
void z_riscv_pmp_clear_all(void)
{
/*
* Ensure we are in M-mode and that memory accesses use M-mode privileges
* (MPRV=0). We also set MPP to M-mode to establish a predictable prior privilege level.
*/
csr_clear(mstatus, MSTATUS_MPRV);
csr_set(mstatus, MSTATUS_MPP);
z_riscv_clear_all_pmp_entries();
}
/**
* @brief Abstract the last 3 arguments to set_pmp_entry() and
* write_pmp_entries( for m-mode.
@@ -368,16 +477,115 @@ static void write_pmp_entries(unsigned int start, unsigned int end,
/*
* Stores the initial values of the pmpcfg CSRs, covering all global
* m-mode PMP entries. This array is sized to hold all pmpcfg registers
* necessary for CONFIG_PMP_SLOTS. It is used to seed the per-thread
* PMP configuration copies. Locked entries aren't modifiable but
* we could have non-locked entries here too.
* m-mode and u-mode PMP entries. This array is sized to hold all pmpcfg
* registers necessary for CONFIG_PMP_SLOTS. It is used to seed the
* per-thread PMP configuration copies. Locked entries aren't modifiable
* but we could have non-locked entries here too.
*/
static unsigned long global_pmp_cfg[CONFIG_PMP_SLOTS / PMPCFG_STRIDE];
static unsigned long global_pmp_last_addr;
/* End of global PMP entry range */
static unsigned int global_pmp_end_index;
/*
* Defines an enumeration for PMP operating modes (M or U) to index the
* PMP state arrays.
*/
enum pmp_mode {
M_MODE = 0,
#if defined(CONFIG_USERSPACE)
U_MODE,
#endif /* CONFIG_USERSPACE */
MODE_TOTAL
};
/* Last address of global PMP entry range for each mode (M or U). */
static unsigned long global_pmp_last_addr[MODE_TOTAL];
/* End of global PMP entry range for each mode (M or U). */
static unsigned int global_pmp_end_index[MODE_TOTAL];
#if defined(CONFIG_MEM_ATTR) && defined(CONFIG_USERSPACE)
/* Stores the initial pmpaddr values for the memory attribute region. */
static unsigned long mem_attr_pmp_addr[CONFIG_PMP_SLOTS];
#endif
#ifdef CONFIG_MEM_ATTR
int z_riscv_pmp_change_permissions(size_t region_idx, uint8_t perm)
{
if (perm & ~PMP_PERM_MASK) {
LOG_ERR("Invalid PMP permission 0x%x. Only R, W, X (0x%x) are allowed.", perm,
PMP_PERM_MASK);
return -EINVAL;
}
const struct mem_attr_region_t *region;
size_t num_regions;
num_regions = mem_attr_get_regions(&region);
if (region_idx >= num_regions) {
LOG_ERR("region_idx %zu is out of bounds (num_regions: %zu)", region_idx,
num_regions);
return -EINVAL;
}
uintptr_t region_start_address = region[region_idx].dt_addr;
size_t region_size = region[region_idx].dt_size;
int entry_index = -1;
size_t pmp_cfg_size = CONFIG_PMP_SLOTS / PMPCFG_STRIDE;
unsigned long pmp_addr[CONFIG_PMP_SLOTS];
unsigned long pmp_cfg[pmp_cfg_size];
/*
* The PMP configuration update (reading and writing) must be performed with
* interrupts disabled. This prevents thread preemption from splitting the
* atomic read-modify-write operation, which could lead to a catastrophic
* half-configured state. Unlike other PMP functions, this is not called
* from an already-atomic context.
*/
unsigned int key = arch_irq_lock();
z_riscv_pmp_read_addr(pmp_addr, (size_t)(CONFIG_PMP_SLOTS));
z_riscv_pmp_read_config(pmp_cfg, pmp_cfg_size);
uint8_t *pmp_n_cfg = (uint8_t *)pmp_cfg;
for (unsigned int index = 0; index < CONFIG_PMP_SLOTS; ++index) {
unsigned long start, end;
pmp_decode_region(pmp_n_cfg[index], pmp_addr, index, &start, &end);
if (start == region_start_address &&
end == (region_start_address + region_size - 1)) {
entry_index = index;
break;
}
}
if (entry_index == -1) {
LOG_ERR("PMP entry for address 0x%lx not found", region_start_address);
arch_irq_unlock(key);
return -ENOENT;
}
/*
* Clear the old R/W/X bits while preserving all other bits and tet the new R/W/X bits from
* the 'perm' variable.
*/
pmp_n_cfg[entry_index] &= ~PMP_PERM_MASK;
pmp_n_cfg[entry_index] |= perm;
/*
* Disable (non-locked) PMP entries for m-mode while we update them.
* While at it, also clear MSTATUS_MPP as it must be cleared for
* MSTATUS_MPRV to be effective later.
*/
csr_clear(mstatus, MSTATUS_MPRV | MSTATUS_MPP);
write_pmp_entries(entry_index, entry_index + 1, false, pmp_addr, pmp_cfg,
ARRAY_SIZE(pmp_addr));
csr_set(mstatus, MSTATUS_MPRV);
arch_irq_unlock(key);
return 0;
}
#endif /* CONFIG_MEM_ATTR */
/**
* @Brief Initialize the PMP with global entries on each CPU
@@ -385,22 +593,26 @@ static unsigned int global_pmp_end_index;
void z_riscv_pmp_init(void)
{
unsigned long pmp_addr[CONFIG_PMP_SLOTS];
unsigned long pmp_cfg[CONFIG_PMP_SLOTS / PMPCFG_STRIDE];
unsigned long pmp_cfg[CONFIG_PMP_SLOTS / PMPCFG_STRIDE] = {0};
unsigned int index = 0;
unsigned int attr_cnt = 0;
ARG_UNUSED(attr_cnt);
#ifdef CONFIG_NULL_POINTER_EXCEPTION_DETECTION_PMP
/*
* Use a PMP slot to make region (starting at address 0x0) inaccessible
* for detecting null pointer dereferencing.
*/
set_pmp_entry(&index, PMP_NONE | PMP_L,
set_pmp_entry(&index, PMP_NONE | COND_CODE_1(CONFIG_PMP_NO_LOCK_GLOBAL, (0x0), (PMP_L)),
0,
CONFIG_NULL_POINTER_EXCEPTION_REGION_SIZE,
pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
#endif
/* The read-only area is always there for every mode */
set_pmp_entry(&index, PMP_R | PMP_X | PMP_L,
set_pmp_entry(&index,
PMP_R | PMP_X | COND_CODE_1(CONFIG_PMP_NO_LOCK_GLOBAL, (0x0), (PMP_L)),
(uintptr_t)__rom_region_start,
(size_t)__rom_region_size,
pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
@@ -409,48 +621,60 @@ void z_riscv_pmp_init(void)
#ifdef CONFIG_MULTITHREADING
/*
* Set the stack guard for this CPU's IRQ stack by making the bottom
* addresses inaccessible. This will never change so we do it here
* and lock it too.
* addresses inaccessible. This will never change so we do it here.
*/
set_pmp_entry(&index, PMP_NONE | PMP_L,
set_pmp_entry(&index, PMP_NONE | COND_CODE_1(CONFIG_PMP_NO_LOCK_GLOBAL, (0x0), (PMP_L)),
(uintptr_t)z_interrupt_stacks[_current_cpu->id],
Z_RISCV_STACK_GUARD_SIZE,
pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
#else
/* Without multithreading setup stack guards for IRQ and main stacks */
set_pmp_entry(&index, PMP_NONE | COND_CODE_1(CONFIG_PMP_NO_LOCK_GLOBAL, (0x0), (PMP_L)),
(uintptr_t)z_interrupt_stacks,
Z_RISCV_STACK_GUARD_SIZE,
pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
set_pmp_entry(&index, PMP_NONE | COND_CODE_1(CONFIG_PMP_NO_LOCK_GLOBAL, (0x0), (PMP_L)),
(uintptr_t)z_main_stack,
Z_RISCV_STACK_GUARD_SIZE,
pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
#endif /* CONFIG_MULTITHREADING */
#ifdef CONFIG_SMP
unsigned int irq_index = index;
#endif /* CONFIG_SMP */
#endif
#ifdef CONFIG_MEM_ATTR
/*
* This early, the kernel init code uses the IRQ stack and we want to
* safeguard it as soon as possible. But we need a temporary default
* "catch all" PMP entry for MPRV to work. Later on, this entry will
* be set for each thread by z_riscv_pmp_stackguard_prepare().
* Set the memory attribute region as temporary PMP entries for early
* kernel initialization. This provides essential protection before
* the kernel mode memory attribute permission is fully operational.
*/
attr_cnt = set_pmp_mem_attr(&index, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
#endif /* CONFIG_MEM_ATTR */
#if defined(CONFIG_MEM_ATTR) || defined(CONFIG_PMP_NO_LOCK_GLOBAL)
/*
* This early, we want to protect unlock PMP entries as soon as
* possible. But we need a temporary default "catch all" PMP entry for
* MPRV to work. Later on, this entry will be set for each thread by
* z_riscv_pmp_kernelmode_prepare().
*/
set_pmp_mprv_catchall(&index, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
/* Write those entries to PMP regs. */
/* Write those entries to PMP regs. */
write_pmp_entries(0, index, true, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
/* Activate our non-locked PMP entries for m-mode */
csr_clear(mstatus, MSTATUS_MPP);
csr_set(mstatus, MSTATUS_MPRV);
/* And forget about that last entry as we won't need it later */
index--;
#else
/* Without multithreading setup stack guards for IRQ and main stacks */
set_pmp_entry(&index, PMP_NONE | PMP_L,
(uintptr_t)z_interrupt_stacks,
Z_RISCV_STACK_GUARD_SIZE,
pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
set_pmp_entry(&index, PMP_NONE | PMP_L,
(uintptr_t)z_main_stack,
Z_RISCV_STACK_GUARD_SIZE,
pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
/* Write those entries to PMP regs. */
write_pmp_entries(0, index, true, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
#endif /* CONFIG_MULTITHREADING */
#else
/* Write those entries to PMP regs. */
write_pmp_entries(0, index, true, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
#endif
#ifdef CONFIG_SMP
@@ -460,21 +684,36 @@ void z_riscv_pmp_init(void)
* Make sure TOR entry sharing won't be attempted with it by
* remembering a bogus address for those entries.
*/
pmp_addr[index - 1] = -1L;
pmp_addr[irq_index - 1] = -1L;
#endif
/* Make sure secondary CPUs produced the same values */
if (global_pmp_end_index != 0) {
__ASSERT(global_pmp_end_index == index, "");
if (global_pmp_end_index[M_MODE] != 0) {
__ASSERT(global_pmp_end_index[M_MODE] == index, "");
__ASSERT(global_pmp_cfg[index / PMPCFG_STRIDE] == pmp_cfg[index / PMPCFG_STRIDE],
"");
__ASSERT(global_pmp_last_addr == pmp_addr[index - 1], "");
__ASSERT(global_pmp_last_addr[M_MODE] == pmp_addr[index - 1], "");
}
#endif
memcpy(global_pmp_cfg, pmp_cfg, sizeof(pmp_cfg));
global_pmp_last_addr = pmp_addr[index - 1];
global_pmp_end_index = index;
global_pmp_last_addr[M_MODE] = pmp_addr[index - 1];
global_pmp_end_index[M_MODE] = index;
#ifdef CONFIG_USERSPACE
global_pmp_last_addr[U_MODE] = pmp_addr[index - attr_cnt - 1];
global_pmp_end_index[U_MODE] = index - attr_cnt;
#endif /* CONFIG_USERSPACE */
#if defined(CONFIG_MEM_ATTR) && defined(CONFIG_USERSPACE)
/*
* Copy the memory attribute pmpaddr entries to the global buffer.
* These kernel mode pmpaddr entries are saved for restoration when
* switching back from user mode.
*/
memcpy(mem_attr_pmp_addr, &pmp_addr[global_pmp_end_index[U_MODE]],
attr_cnt * PMPCFG_STRIDE);
#endif
if (PMP_DEBUG_DUMP) {
dump_pmp_regs("initial register dump");
@@ -484,9 +723,9 @@ void z_riscv_pmp_init(void)
/**
* @Brief Initialize the per-thread PMP register copy with global values.
*/
#if (defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)) || defined(CONFIG_USERSPACE)
static inline unsigned int z_riscv_pmp_thread_init(unsigned long *pmp_addr,
unsigned long *pmp_cfg,
#if defined(CONFIG_PMP_KERNEL_MODE_DYNAMIC) || defined(CONFIG_USERSPACE)
static inline unsigned int z_riscv_pmp_thread_init(enum pmp_mode mode,
unsigned long *pmp_addr, unsigned long *pmp_cfg,
unsigned int index_limit)
{
ARG_UNUSED(index_limit);
@@ -500,23 +739,38 @@ static inline unsigned int z_riscv_pmp_thread_init(unsigned long *pmp_addr,
* Retrieve the pmpaddr value matching the last global PMP slot.
* This is so that set_pmp_entry() can safely attempt TOR with it.
*/
pmp_addr[global_pmp_end_index - 1] = global_pmp_last_addr;
unsigned int pmp_end_index = global_pmp_end_index[mode];
return global_pmp_end_index;
pmp_addr[pmp_end_index - 1] = global_pmp_last_addr[mode];
#if defined(CONFIG_MEM_ATTR) && defined(CONFIG_USERSPACE)
/*
* This block restores the PMP entries used for memory attributes (set in
* mem_attr_pmp_addr) that were overwritten when switching from user mode
* back to kernel mode. It only applies when running in M_MODE pmp mode.
*/
if (mode == M_MODE) {
memcpy(&pmp_addr[global_pmp_end_index[U_MODE]], mem_attr_pmp_addr,
(global_pmp_end_index[M_MODE] - global_pmp_end_index[U_MODE]) *
PMPCFG_STRIDE);
}
#endif
return pmp_end_index;
}
#endif
#ifdef CONFIG_PMP_STACK_GUARD
#ifdef CONFIG_MULTITHREADING
#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
/**
* @brief Prepare the PMP stackguard content for given thread.
* @brief Prepare the PMP kernelmode content for given thread.
*
* This is called once during new thread creation.
*/
void z_riscv_pmp_stackguard_prepare(struct k_thread *thread)
void z_riscv_pmp_kernelmode_prepare(struct k_thread *thread)
{
unsigned int index = z_riscv_pmp_thread_init(PMP_M_MODE(thread));
unsigned int index = z_riscv_pmp_thread_init(M_MODE, PMP_M_MODE(thread));
#if defined(CONFIG_PMP_STACK_GUARD) && defined(CONFIG_MULTITHREADING)
uintptr_t stack_bottom;
/* make the bottom addresses of our stack inaccessible */
@@ -527,10 +781,12 @@ void z_riscv_pmp_stackguard_prepare(struct k_thread *thread)
} else if (z_stack_is_user_capable(thread->stack_obj)) {
stack_bottom = thread->stack_info.start - K_THREAD_STACK_RESERVED;
}
#endif
#endif /* CONFIG_USERSPACE */
set_pmp_entry(&index, PMP_NONE,
stack_bottom, Z_RISCV_STACK_GUARD_SIZE,
PMP_M_MODE(thread));
#endif /* CONFIG_PMP_STACK_GUARD */
set_pmp_mprv_catchall(&index, PMP_M_MODE(thread));
/* remember how many entries we use */
@@ -538,13 +794,13 @@ void z_riscv_pmp_stackguard_prepare(struct k_thread *thread)
}
/**
* @brief Write PMP stackguard content to actual PMP registers
* @brief Write PMP kernel mode content to actual PMP registers
*
* This is called on every context switch.
*/
void z_riscv_pmp_stackguard_enable(struct k_thread *thread)
void z_riscv_pmp_kernelmode_enable(struct k_thread *thread)
{
LOG_DBG("pmp_stackguard_enable for thread %p", thread);
LOG_DBG("pmp_kernelmode_enable for thread %p", thread);
/*
* Disable (non-locked) PMP entries for m-mode while we update them.
@@ -554,9 +810,17 @@ void z_riscv_pmp_stackguard_enable(struct k_thread *thread)
csr_clear(mstatus, MSTATUS_MPRV | MSTATUS_MPP);
/* Write our m-mode MPP entries */
write_pmp_entries(global_pmp_end_index, thread->arch.m_mode_pmp_end_index,
#ifdef CONFIG_USERSPACE
write_pmp_entries(global_pmp_end_index[U_MODE],
thread->arch.m_mode_pmp_end_index,
false /* no need to clear to the end */,
PMP_M_MODE(thread));
#else
write_pmp_entries(global_pmp_end_index[M_MODE],
thread->arch.m_mode_pmp_end_index,
false /* no need to clear to the end */,
PMP_M_MODE(thread));
#endif /* CONFIG_USERSPACE */
if (PMP_DEBUG_DUMP) {
dump_pmp_regs("m-mode register dump");
@@ -566,20 +830,18 @@ void z_riscv_pmp_stackguard_enable(struct k_thread *thread)
csr_set(mstatus, MSTATUS_MPRV);
}
#endif /* CONFIG_MULTITHREADING */
/**
* @brief Remove PMP stackguard content to actual PMP registers
* @brief Remove PMP kernel mode content to actual PMP registers
*/
void z_riscv_pmp_stackguard_disable(void)
void z_riscv_pmp_kernelmode_disable(void)
{
unsigned long pmp_addr[CONFIG_PMP_SLOTS];
unsigned long pmp_cfg[CONFIG_PMP_SLOTS / PMPCFG_STRIDE];
unsigned int index = global_pmp_end_index;
unsigned int index = global_pmp_end_index[M_MODE];
/* Retrieve the pmpaddr value matching the last global PMP slot. */
pmp_addr[global_pmp_end_index - 1] = global_pmp_last_addr;
pmp_addr[index - 1] = global_pmp_last_addr[M_MODE];
/* Disable (non-locked) PMP entries for m-mode while we update them. */
csr_clear(mstatus, MSTATUS_MPRV);
@@ -591,15 +853,14 @@ void z_riscv_pmp_stackguard_disable(void)
set_pmp_mprv_catchall(&index, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
/* Write "catch all" entry and clear unlocked entries to PMP regs. */
write_pmp_entries(global_pmp_end_index, index,
write_pmp_entries(global_pmp_end_index[M_MODE], index,
true, pmp_addr, pmp_cfg, ARRAY_SIZE(pmp_addr));
if (PMP_DEBUG_DUMP) {
dump_pmp_regs("catch all register dump");
}
}
#endif /* CONFIG_PMP_STACK_GUARD */
#endif /* CONFIG_PMP_KERNEL_MODE_DYNAMIC */
#ifdef CONFIG_USERSPACE
@@ -621,7 +882,7 @@ void z_riscv_pmp_usermode_init(struct k_thread *thread)
*/
void z_riscv_pmp_usermode_prepare(struct k_thread *thread)
{
unsigned int index = z_riscv_pmp_thread_init(PMP_U_MODE(thread));
unsigned int index = z_riscv_pmp_thread_init(U_MODE, PMP_U_MODE(thread));
LOG_DBG("pmp_usermode_prepare for thread %p", thread);
@@ -665,8 +926,52 @@ static void resync_pmp_domain(struct k_thread *thread,
continue;
}
ok = set_pmp_entry(&index, part->attr.pmp_attr,
part->start, part->size, PMP_U_MODE(thread));
#ifdef CONFIG_MEM_ATTR
/*
* Determine whether the partition is covered by a memory
* attribute region.
*
* Constraint due to number of PMP entry limitation:
* The logic asserts against any cases that requires splitting
* a partition into multiple permissions, such as partial
* overlap or the partition fully containing the memory
* attribute region but not fully match.
*
* Supported cases:
* 1. Partition excludes all memory attribute regions
* The partition's permission is applied directly.
* 2. Partition is contained in a memory attribute region:
* The partition's permission is masked with the memory
* attribute.
*/
const struct mem_attr_region_t *region;
uint8_t attr_mask = PMP_R | PMP_W | PMP_X;
for (int idx = 0; idx < mem_attr_get_regions(&region); idx++) {
uintptr_t dt_start = (uintptr_t)(region[idx].dt_addr);
uintptr_t dt_end = dt_start + (size_t)(region[idx].dt_size);
bool covered = false;
/* No overlap at all, skip this memory region */
if ((part->start + part->size) <= dt_start || part->start >= dt_end) {
continue;
}
/* Check if the partition is contained in the memory attribute region. */
covered = part->start >= dt_start && (part->start + part->size) <= dt_end;
__ASSERT(covered, "No allowed partition partially overlaps memory region");
attr_mask = DT_MEM_RISCV_TO_PMP_PERM(region[idx].dt_attr);
break;
}
ok = set_pmp_entry(&index, part->attr.pmp_attr & attr_mask, part->start, part->size,
PMP_U_MODE(thread));
#else
ok = set_pmp_entry(&index, part->attr.pmp_attr, part->start, part->size,
PMP_U_MODE(thread));
#endif
__ASSERT(ok,
"no PMP slot left for %d remaining partitions in domain %p",
remaining_partitions + 1, domain);
@@ -702,13 +1007,14 @@ void z_riscv_pmp_usermode_enable(struct k_thread *thread)
resync_pmp_domain(thread, domain);
}
#ifdef CONFIG_PMP_STACK_GUARD
#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
/* Make sure m-mode PMP usage is disabled before we reprogram it */
csr_clear(mstatus, MSTATUS_MPRV);
#endif
/* Write our u-mode MPP entries */
write_pmp_entries(global_pmp_end_index, thread->arch.u_mode_pmp_end_index,
write_pmp_entries(global_pmp_end_index[U_MODE],
thread->arch.u_mode_pmp_end_index,
true /* must clear to the end */,
PMP_U_MODE(thread));
@@ -722,7 +1028,7 @@ int arch_mem_domain_max_partitions_get(void)
int available_pmp_slots = CONFIG_PMP_SLOTS;
/* remove those slots dedicated to global entries */
available_pmp_slots -= global_pmp_end_index;
available_pmp_slots -= global_pmp_end_index[U_MODE];
/*
* User thread stack mapping:

View File

@@ -9,6 +9,7 @@
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/offsets.h>
#include <zephyr/arch/riscv/csr.h>
#include "asm_macros.inc"
/* exports */
@@ -82,6 +83,10 @@ aa_loop:
li t0, __z_interrupt_stack_SIZEOF
add sp, sp, t0
#ifdef CONFIG_RISCV_SMRNMI_ENABLE_NMI_DELIVERY
csrs CSR_MNSTATUS, MNSTATUS_NMIE
#endif
#ifdef CONFIG_WDOG_INIT
call _WdogInit
#endif

View File

@@ -41,8 +41,17 @@ static inline bool in_kernel_thread_stack_bound(uintptr_t addr, const struct k_t
#ifdef CONFIG_THREAD_STACK_INFO
uintptr_t start, end;
start = thread->stack_info.start;
end = Z_STACK_PTR_ALIGN(thread->stack_info.start + thread->stack_info.size);
/*
* Special handling to support stacktrace in dummy thread during system initialization,
* as its stack info isn't initialized.
*/
if (is_thread_dummy(thread)) {
start = (uintptr_t)z_interrupt_stacks;
end = Z_STACK_PTR_ALIGN(start + __z_interrupt_stack_SIZEOF);
} else {
start = thread->stack_info.start;
end = Z_STACK_PTR_ALIGN(thread->stack_info.start + thread->stack_info.size);
}
return (addr >= start) && (addr < end);
#else

View File

@@ -61,16 +61,17 @@ SECTION_FUNC(TEXT, z_riscv_switch)
mv a0, s0
#endif
#if defined(CONFIG_PMP_STACK_GUARD)
/* Stack guard has priority over user space for PMP usage. */
#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
/* Kernel mode has priority over user space for PMP usage. */
mv s0, a0
call z_riscv_pmp_stackguard_enable
call z_riscv_pmp_kernelmode_enable
mv a0, s0
#elif defined(CONFIG_USERSPACE)
/*
* When stackguard is not enabled, we need to configure the PMP only
* at context switch time as the PMP is not in effect while inm-mode.
* (it is done on every exception return otherwise).
* When kernel mode dynamic configuration is not enabled, we need to
* configure the PMP only at context switch time as the PMP is not
* in effect while in m-mode. (it is done on every exception return
* otherwise).
*/
lb t0, _thread_offset_to_user_options(a0)
andi t0, t0, K_USER

View File

@@ -89,18 +89,18 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
/* Supervisor thread */
stack_init->mepc = (unsigned long)z_thread_entry;
#if defined(CONFIG_PMP_STACK_GUARD)
#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
/* Enable PMP in mstatus.MPRV mode for RISC-V machine mode
* if thread is supervisor thread.
*/
stack_init->mstatus |= MSTATUS_MPRV;
#endif /* CONFIG_PMP_STACK_GUARD */
#endif /* CONFIG_PMP_KERNEL_MODE_DYNAMIC */
}
#if defined(CONFIG_PMP_STACK_GUARD)
/* Setup PMP regions of PMP stack guard of thread. */
z_riscv_pmp_stackguard_prepare(thread);
#endif /* CONFIG_PMP_STACK_GUARD */
#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
/* Setup PMP regions of kernel mode configuration of thread. */
z_riscv_pmp_kernelmode_prepare(thread);
#endif /* CONFIG_PMP_KERNEL_MODE_DYNAMIC */
#ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
stack_init->soc_context = soc_esf_init;
@@ -176,9 +176,9 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry,
csr_write(mstatus, status);
csr_write(mepc, z_thread_entry);
#ifdef CONFIG_PMP_STACK_GUARD
/* reconfigure as the kernel mode stack will be different */
z_riscv_pmp_stackguard_prepare(_current);
#ifdef CONFIG_PMP_KERNEL_MODE_DYNAMIC
/* reconfigure as the kernel mode configuration will be different */
z_riscv_pmp_kernelmode_prepare(_current);
#endif
/* Set up Physical Memory Protection */

View File

@@ -6,4 +6,5 @@ add_subdirectory_ifdef(CONFIG_DT_HAS_OPENHWGROUP_CVA6_ENABLED openhwgroup/cva6)
add_subdirectory_ifdef(CONFIG_DT_HAS_NUCLEI_BUMBLEBEE_ENABLED nuclei)
add_subdirectory_ifdef(CONFIG_DT_HAS_OPENISA_RI5CY_ENABLED openisa/ri5cy)
add_subdirectory_ifdef(CONFIG_DT_HAS_OPENISA_ZERO_RI5CY_ENABLED openisa/zero_riscy)
add_subdirectory_ifdef(CONFIG_DT_HAS_SPINALHDL_VEXRISCV_ENABLED vexriscv)
add_subdirectory_ifdef(CONFIG_DT_HAS_XUANTIE_E907_ENABLED thead)

View File

@@ -7,6 +7,12 @@ rsource "andes/Kconfig"
endif # DT_HAS_ANDESTECH_ANDESCORE_V5_ENABLED
if DT_HAS_SPINALHDL_VEXRISCV_ENABLED
rsource "vexriscv/Kconfig"
endif # DT_HAS_SPINALHDL_VEXRISCV_ENABLED
if DT_HAS_XUANTIE_E907_ENABLED
rsource "thead/Kconfig"

View File

@@ -0,0 +1,4 @@
# SPDX-FileCopyrightText: Copyright The Zephyr Project Contributors
# SPDX-License-Identifier: Apache-2.0
zephyr_library_sources_ifdef(CONFIG_RISCV_CUSTOM_CSR_VEXRISCV_CACHE cache_vexriscv.c)

View File

@@ -0,0 +1,9 @@
# SPDX-FileCopyrightText: Copyright The Zephyr Project Contributors
# SPDX-License-Identifier: Apache-2.0
config RISCV_CUSTOM_CSR_VEXRISCV_CACHE
bool
default y
depends on ARCH_CACHE
help
This option enables cache support for VexRiscv family of CPUs.

View File

@@ -0,0 +1,122 @@
/*
* SPDX-FileCopyrightText: Copyright The Zephyr Project Contributors
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/cache.h>
#ifdef CONFIG_DCACHE
void arch_dcache_enable(void)
{
/* Nothing */
}
void arch_dcache_disable(void)
{
/* Nothing */
}
int arch_dcache_invd_all(void)
{
/* Invalidate whole data cache instruction: 0x500F
* https://github.com/SpinalHDL/VexRiscv?tab=readme-ov-file#dbuscachedplugin
*/
__asm__ volatile(".insn 0x500F\n");
return 0;
}
int arch_dcache_invd_range(void *addr, size_t size)
{
/* Invalidate cache line instruction: 0x500f | (rs1 << 15)
* https://github.com/SpinalHDL/VexRiscv?tab=readme-ov-file#dbuscachedplugin
*/
__asm__ volatile(
"mv a0, %1\n"
"j 2f\n"
"3:\n"
".insn 0x5500F\n" /* 0x500f | (a0 << 15) */
"add a0, a0, %0\n"
"2:\n"
"bltu a0, %2, 3b\n"
: : "r"(CONFIG_DCACHE_LINE_SIZE),
"r"((unsigned int)(addr) & ~((CONFIG_DCACHE_LINE_SIZE) - 1UL)),
"r"((unsigned int)(addr) + (size))
: "a0");
return 0;
}
int arch_dcache_flush_all(void)
{
/* VexRiscv cache is write-through */
return 0;
}
int arch_dcache_flush_range(void *addr __unused, size_t size __unused)
{
return 0;
}
int arch_dcache_flush_and_invd_all(void)
{
return arch_dcache_invd_all();
}
int arch_dcache_flush_and_invd_range(void *addr, size_t size)
{
return arch_dcache_invd_range(addr, size);
}
#endif /* CONFIG_DCACHE */
#ifdef CONFIG_ICACHE
void arch_icache_enable(void)
{
/* Nothing */
}
void arch_icache_disable(void)
{
/* Nothing */
}
int arch_icache_flush_all(void)
{
__asm__ volatile("fence.i\n");
return 0;
}
int arch_icache_invd_all(void)
{
return arch_icache_flush_all();
}
int arch_icache_invd_range(void *addr_in __unused, size_t size __unused)
{
return arch_icache_flush_all();
}
int arch_icache_flush_and_invd_all(void)
{
return arch_icache_flush_all();
}
int arch_icache_flush_range(void *addr __unused, size_t size __unused)
{
return arch_icache_flush_all();
}
int arch_icache_flush_and_invd_range(void *addr __unused, size_t size __unused)
{
return arch_icache_flush_all();
}
#endif /* CONFIG_ICACHE */
void arch_cache_init(void)
{
/* Nothing */
}

View File

@@ -7,14 +7,28 @@
#ifndef PMP_H_
#define PMP_H_
#include <zephyr/dt-bindings/memory-attr/memory-attr-riscv.h>
#define PMPCFG_STRIDE (__riscv_xlen / 8)
#define DT_MEM_RISCV_TO_PMP_PERM(dt_attr) ( \
(((dt_attr) & DT_MEM_RISCV_TYPE_IO_R) ? PMP_R : 0) | \
(((dt_attr) & DT_MEM_RISCV_TYPE_IO_W) ? PMP_W : 0) | \
(((dt_attr) & DT_MEM_RISCV_TYPE_IO_X) ? PMP_X : 0))
void z_riscv_pmp_init(void);
void z_riscv_pmp_stackguard_prepare(struct k_thread *thread);
void z_riscv_pmp_stackguard_enable(struct k_thread *thread);
void z_riscv_pmp_stackguard_disable(void);
void z_riscv_pmp_kernelmode_prepare(struct k_thread *thread);
void z_riscv_pmp_kernelmode_enable(struct k_thread *thread);
void z_riscv_pmp_kernelmode_disable(void);
void z_riscv_pmp_usermode_init(struct k_thread *thread);
void z_riscv_pmp_usermode_prepare(struct k_thread *thread);
void z_riscv_pmp_usermode_enable(struct k_thread *thread);
#ifdef CONFIG_ZTEST
void z_riscv_pmp_read_config(unsigned long *pmp_cfg, size_t pmp_cfg_size);
void z_riscv_pmp_read_addr(unsigned long *pmp_addr, size_t pmp_addr_size);
void pmp_decode_region(uint8_t cfg_byte, unsigned long *pmp_addr, unsigned int index,
unsigned long *start, unsigned long *end);
#endif /* CONFIG_ZTEST */
#endif /* PMP_H_ */

View File

@@ -36,16 +36,14 @@ flat code/data segments for ring 3 execution.
"""
import argparse
import sys
import struct
import os
from packaging import version
import struct
import sys
import elftools
from elftools.elf.elffile import ELFFile
from elftools.elf.sections import SymbolTableSection
from packaging import version
if version.parse(elftools.__version__) < version.parse('0.24'):
sys.exit("pyelftools is out of date, need version 0.24 or later")
@@ -75,7 +73,7 @@ ACCESS_RW = 1 << 1 # read or write permission
def create_gdt_pseudo_desc(addr, size):
"""Create pseudo GDT descriptor"""
debug("create pseudo descriptor: %x %x" % (addr, size))
debug(f"create pseudo descriptor: {addr:x} {size:x}")
# ...and take back one byte for the Intel god whose Ark this is...
size = size - 1
return struct.pack(GDT_PD_FMT, size, addr, 0)
@@ -98,11 +96,9 @@ GDT_ENT_FMT = "<HHBBBB"
def create_code_data_entry(base, limit, dpl, flags, access):
"""Create GDT entry for code or data"""
debug("create code or data entry: %x %x %x %x %x" %
(base, limit, dpl, flags, access))
debug(f"create code or data entry: {base:x} {limit:x} {dpl:x} {flags:x} {access:x}")
base_lo, base_mid, base_hi, limit_lo, limit_hi = chop_base_limit(base,
limit)
base_lo, base_mid, base_hi, limit_lo, limit_hi = chop_base_limit(base, limit)
# This is a valid descriptor
present = 1
@@ -121,17 +117,21 @@ def create_code_data_entry(base, limit, dpl, flags, access):
access = access | (present << 7) | (dpl << 5) | (desc_type << 4) | accessed
flags = flags | (size << 6) | limit_hi
return struct.pack(GDT_ENT_FMT, limit_lo, base_lo, base_mid,
access, flags, base_hi)
return struct.pack(GDT_ENT_FMT, limit_lo, base_lo, base_mid, access, flags, base_hi)
def create_tss_entry(base, limit, dpl):
"""Create GDT TSS entry"""
debug("create TSS entry: %x %x %x" % (base, limit, dpl))
debug(f"create TSS entry: {base:x} {limit:x} {dpl:x}")
present = 1
base_lo, base_mid, base_hi, limit_lo, limit_hi, = chop_base_limit(base,
limit)
(
base_lo,
base_mid,
base_hi,
limit_lo,
limit_hi,
) = chop_base_limit(base, limit)
type_code = 0x9 # non-busy 32-bit TSS descriptor
gran = 0
@@ -139,16 +139,14 @@ def create_tss_entry(base, limit, dpl):
flags = (gran << 7) | limit_hi
type_byte = (present << 7) | (dpl << 5) | type_code
return struct.pack(GDT_ENT_FMT, limit_lo, base_lo, base_mid,
type_byte, flags, base_hi)
return struct.pack(GDT_ENT_FMT, limit_lo, base_lo, base_mid, type_byte, flags, base_hi)
def get_symbols(obj):
"""Extract all symbols from ELF file object"""
for section in obj.iter_sections():
if isinstance(section, SymbolTableSection):
return {sym.name: sym.entry.st_value
for sym in section.iter_symbols()}
return {sym.name: sym.entry.st_value for sym in section.iter_symbols()}
raise LookupError("Could not find symbol table")
@@ -158,14 +156,15 @@ def parse_args():
global args
parser = argparse.ArgumentParser(
description=__doc__,
formatter_class=argparse.RawDescriptionHelpFormatter, allow_abbrev=False)
formatter_class=argparse.RawDescriptionHelpFormatter,
allow_abbrev=False,
)
parser.add_argument("-k", "--kernel", required=True,
help="Zephyr kernel image")
parser.add_argument("-v", "--verbose", action="store_true",
help="Print extra debugging information")
parser.add_argument("-o", "--output-gdt", required=True,
help="output GDT binary")
parser.add_argument("-k", "--kernel", required=True, help="Zephyr kernel image")
parser.add_argument(
"-v", "--verbose", action="store_true", help="Print extra debugging information"
)
parser.add_argument("-o", "--output-gdt", required=True, help="output GDT binary")
args = parser.parse_args()
if "VERBOSE" in os.environ:
args.verbose = 1
@@ -205,12 +204,10 @@ def main():
output_fp.write(create_gdt_pseudo_desc(gdt_base, num_entries * 8))
# Selector 0x08: code descriptor
output_fp.write(create_code_data_entry(0, 0xFFFFF, 0,
FLAGS_GRAN, ACCESS_EX | ACCESS_RW))
output_fp.write(create_code_data_entry(0, 0xFFFFF, 0, FLAGS_GRAN, ACCESS_EX | ACCESS_RW))
# Selector 0x10: data descriptor
output_fp.write(create_code_data_entry(0, 0xFFFFF, 0,
FLAGS_GRAN, ACCESS_RW))
output_fp.write(create_code_data_entry(0, 0xFFFFF, 0, FLAGS_GRAN, ACCESS_RW))
if num_entries >= 5:
main_tss = syms["_main_tss"]
@@ -224,12 +221,12 @@ def main():
if num_entries >= 7:
# Selector 0x28: code descriptor, dpl = 3
output_fp.write(create_code_data_entry(0, 0xFFFFF, 3,
FLAGS_GRAN, ACCESS_EX | ACCESS_RW))
output_fp.write(
create_code_data_entry(0, 0xFFFFF, 3, FLAGS_GRAN, ACCESS_EX | ACCESS_RW)
)
# Selector 0x30: data descriptor, dpl = 3
output_fp.write(create_code_data_entry(0, 0xFFFFF, 3,
FLAGS_GRAN, ACCESS_RW))
output_fp.write(create_code_data_entry(0, 0xFFFFF, 3, FLAGS_GRAN, ACCESS_RW))
if use_tls:
# Selector 0x18, 0x28 or 0x38 (depending on entries above):
@@ -237,8 +234,7 @@ def main():
#
# for use with thread local storage while this will be
# modified at runtime.
output_fp.write(create_code_data_entry(0, 0xFFFFF, 3,
FLAGS_GRAN, ACCESS_RW))
output_fp.write(create_code_data_entry(0, 0xFFFFF, 3, FLAGS_GRAN, ACCESS_RW))
if __name__ == "__main__":

View File

@@ -29,13 +29,14 @@ This script outputs three binary tables:
"""
import argparse
import sys
import struct
import os
import struct
import sys
import elftools
from packaging import version
from elftools.elf.elffile import ELFFile
from elftools.elf.sections import SymbolTableSection
from packaging import version
if version.parse(elftools.__version__) < version.parse('0.24'):
sys.exit("pyelftools is out of date, need version 0.24 or later")
@@ -69,8 +70,7 @@ def create_irq_gate(handler, dpl):
offset_hi = handler >> 16
offset_lo = handler & 0xFFFF
data = struct.pack(gate_desc_format, offset_lo, KERNEL_CODE_SEG, 0,
type_attr, offset_hi)
data = struct.pack(gate_desc_format, offset_lo, KERNEL_CODE_SEG, 0, type_attr, offset_hi)
return data
@@ -121,15 +121,14 @@ def update_irq_vec_map(irq_vec_map, irq, vector, max_irq):
return
if irq >= max_irq:
error("irq %d specified, but CONFIG_MAX_IRQ_LINES is %d" %
(irq, max_irq))
error(f"irq {irq:d} specified, but CONFIG_MAX_IRQ_LINES is {max_irq:d}")
# This table will never have values less than 32 since those are for
# exceptions; 0 means unconfigured
if irq_vec_map[irq] != 0:
error("multiple vector assignments for interrupt line %d" % irq)
error(f"multiple vector assignments for interrupt line {irq:d}")
debug("assign IRQ %d to vector %d" % (irq, vector))
debug(f"assign IRQ {irq:d} to vector {vector:d}")
irq_vec_map[irq] = vector
@@ -145,11 +144,10 @@ def setup_idt(spur_code, spur_nocode, intlist, max_vec, max_irq):
continue
if vec >= max_vec:
error("Vector %d specified, but size of IDT is only %d vectors" %
(vec, max_vec))
error(f"Vector {vec:d} specified, but size of IDT is only {max_vec:d} vectors")
if vectors[vec] is not None:
error("Multiple assignments for vector %d" % vec)
error(f"Multiple assignments for vector {vec:d}")
vectors[vec] = (handler, tss, dpl)
update_irq_vec_map(irq_vec_map, irq, vec, max_irq)
@@ -167,7 +165,7 @@ def setup_idt(spur_code, spur_nocode, intlist, max_vec, max_irq):
break
if vec == -1:
error("can't find a free vector in priority level %d" % prio)
error(f"can't find a free vector in priority level {prio:d}")
vectors[vec] = (handler, tss, dpl)
update_irq_vec_map(irq_vec_map, irq, vec, max_irq)
@@ -190,27 +188,27 @@ def setup_idt(spur_code, spur_nocode, intlist, max_vec, max_irq):
def get_symbols(obj):
for section in obj.iter_sections():
if isinstance(section, SymbolTableSection):
return {sym.name: sym.entry.st_value
for sym in section.iter_symbols()}
return {sym.name: sym.entry.st_value for sym in section.iter_symbols()}
raise LookupError("Could not find symbol table")
# struct genidt_header_s {
# uint32_t spurious_addr;
# uint32_t spurious_no_error_addr;
# int32_t num_entries;
# uint32_t spurious_addr;
# uint32_t spurious_no_error_addr;
# int32_t num_entries;
# };
intlist_header_fmt = "<II"
# struct genidt_entry_s {
# uint32_t isr;
# int32_t irq;
# int32_t priority;
# int32_t vector_id;
# int32_t dpl;
# int32_t tss;
# uint32_t isr;
# int32_t irq;
# int32_t priority;
# int32_t vector_id;
# int32_t dpl;
# int32_t tss;
# };
intlist_entry_fmt = "<Iiiiii"
@@ -226,23 +224,23 @@ def get_intlist(elf):
spurious_code = header[0]
spurious_nocode = header[1]
debug("spurious handler (code) : %s" % hex(header[0]))
debug("spurious handler (no code) : %s" % hex(header[1]))
debug(f"spurious handler (code) : {hex(header[0]):s}")
debug(f"spurious handler (no code) : {hex(header[1]):s}")
intlist = [i for i in
struct.iter_unpack(intlist_entry_fmt, intdata)]
intlist = [i for i in struct.iter_unpack(intlist_entry_fmt, intdata)]
debug("Configured interrupt routing")
debug("handler irq pri vec dpl")
debug("--------------------------")
for irq in intlist:
debug("{0:<10} {1:<3} {2:<3} {3:<3} {4:<2}".format(
hex(irq[0]),
"-" if irq[1] == -1 else irq[1],
"-" if irq[2] == -1 else irq[2],
"-" if irq[3] == -1 else irq[3],
irq[4]))
debug(
f"{hex(irq[0]):<10} "
f"{'-' if irq[1] == -1 else irq[1]:<3} "
f"{'-' if irq[2] == -1 else irq[2]:<3} "
f"{'-' if irq[3] == -1 else irq[3]:<3} "
f"{irq[4]:<2}"
)
return (spurious_code, spurious_nocode, intlist)
@@ -251,18 +249,26 @@ def parse_args():
global args
parser = argparse.ArgumentParser(
description=__doc__,
formatter_class=argparse.RawDescriptionHelpFormatter, allow_abbrev=False)
formatter_class=argparse.RawDescriptionHelpFormatter,
allow_abbrev=False,
)
parser.add_argument("-m", "--vector-map", required=True,
help="Output file mapping IRQ lines to IDT vectors")
parser.add_argument("-o", "--output-idt", required=True,
help="Output file containing IDT binary")
parser.add_argument("-a", "--output-vectors-alloc", required=False,
help="Output file indicating allocated vectors")
parser.add_argument("-k", "--kernel", required=True,
help="Zephyr kernel image")
parser.add_argument("-v", "--verbose", action="store_true",
help="Print extra debugging information")
parser.add_argument(
"-m", "--vector-map", required=True, help="Output file mapping IRQ lines to IDT vectors"
)
parser.add_argument(
"-o", "--output-idt", required=True, help="Output file containing IDT binary"
)
parser.add_argument(
"-a",
"--output-vectors-alloc",
required=False,
help="Output file indicating allocated vectors",
)
parser.add_argument("-k", "--kernel", required=True, help="Zephyr kernel image")
parser.add_argument(
"-v", "--verbose", action="store_true", help="Print extra debugging information"
)
args = parser.parse_args()
if "VERBOSE" in os.environ:
args.verbose = 1
@@ -274,7 +280,7 @@ def create_irq_vectors_allocated(vectors, spur_code, spur_nocode, filename):
# interrupt handlers installed, they are free for runtime installation
# of interrupts
num_chars = (len(vectors) + 7) // 8
vbits = num_chars*[0]
vbits = num_chars * [0]
for i, (handler, _, _) in enumerate(vectors):
if handler not in (spur_code, spur_nocode):
continue
@@ -300,14 +306,12 @@ def main():
max_irq = syms["CONFIG_MAX_IRQ_LINES"]
max_vec = syms["CONFIG_IDT_NUM_VECTORS"]
vectors, irq_vec_map = setup_idt(spur_code, spur_nocode, intlist, max_vec,
max_irq)
vectors, irq_vec_map = setup_idt(spur_code, spur_nocode, intlist, max_vec, max_irq)
create_idt_binary(vectors, args.output_idt)
create_irq_vec_map_binary(irq_vec_map, args.vector_map)
if args.output_vectors_alloc:
create_irq_vectors_allocated(vectors, spur_code, spur_nocode,
args.output_vectors_alloc)
create_irq_vectors_allocated(vectors, spur_code, spur_nocode, args.output_vectors_alloc)
if __name__ == "__main__":

View File

@@ -65,20 +65,19 @@ to the end of the binary produced by this script, minus the size of the
top-level paging structure as it is written out last.
"""
import sys
import array
import argparse
import array
import ctypes
import os
import struct
import re
import struct
import sys
import textwrap
from packaging import version
import elftools
from elftools.elf.elffile import ELFFile
from elftools.elf.sections import SymbolTableSection
from packaging import version
if version.parse(elftools.__version__) < version.parse('0.24'):
sys.exit("pyelftools is out of date, need version 0.24 or later")
@@ -134,9 +133,9 @@ def error(text):
def align_check(base, size, scope=4096):
"""Make sure base and size are page-aligned"""
if (base % scope) != 0:
error("unaligned base address %x" % base)
error(f"unaligned base address {base:x}")
if (size % scope) != 0:
error("Unaligned region size 0x%x for base %x" % (size, base))
error(f"Unaligned region size 0x{size:x} for base {base:x}")
def dump_flags(flags):
@@ -184,12 +183,12 @@ def round_down(val, align):
# access or set caching properties at leaf levels.
INT_FLAGS = FLAG_P | FLAG_RW | FLAG_US
class MMUTable():
class MMUTable:
"""Represents a particular table in a set of page tables, at any level"""
def __init__(self):
self.entries = array.array(self.type_code,
[0 for i in range(self.num_entries)])
self.entries = array.array(self.type_code, [0 for i in range(self.num_entries)])
def get_binary(self):
"""Return a bytearray representation of this table"""
@@ -261,82 +260,110 @@ class MMUTable():
this is the physical address of the next level table"""
index = self.entry_index(virt_addr)
verbose("%s: mapping 0x%x to 0x%x : %s" %
(self.__class__.__name__,
phys_addr, virt_addr, dump_flags(entry_flags)))
verbose(
f"{self.__class__.__name__:s}: "
f"mapping 0x{phys_addr:x} to 0x{virt_addr:x} : "
f"{dump_flags(entry_flags):s}"
)
self.entries[index] = ((phys_addr & self.addr_mask) |
(entry_flags & self.supported_flags))
self.entries[index] = (phys_addr & self.addr_mask) | (entry_flags & self.supported_flags)
def set_perms(self, virt_addr, entry_flags):
""""For the table entry corresponding to the provided virtual address,
"""For the table entry corresponding to the provided virtual address,
update just the flags, leaving the physical mapping alone.
Unsupported flags will be filtered out."""
index = self.entry_index(virt_addr)
verbose("%s: changing perm at 0x%x : %s" %
(self.__class__.__name__,
virt_addr, dump_flags(entry_flags)))
verbose(
f"{self.__class__.__name__:s}: "
f"changing perm at 0x{virt_addr:x} : "
f"{dump_flags(entry_flags):s}"
)
self.entries[index] = ((self.entries[index] & self.addr_mask) |
(entry_flags & self.supported_flags))
self.entries[index] = (self.entries[index] & self.addr_mask) | (
entry_flags & self.supported_flags
)
# Specific supported table types
class Pml4(MMUTable):
"""Page mapping level 4 for IA-32e"""
addr_shift = 39
addr_mask = 0x7FFFFFFFFFFFF000
type_code = 'Q'
num_entries = 512
supported_flags = INT_FLAGS
class Pdpt(MMUTable):
"""Page directory pointer table for IA-32e"""
addr_shift = 30
addr_mask = 0x7FFFFFFFFFFFF000
type_code = 'Q'
num_entries = 512
supported_flags = INT_FLAGS | FLAG_SZ | FLAG_CD
class PdptPAE(Pdpt):
"""Page directory pointer table for PAE"""
num_entries = 4
class Pd(MMUTable):
"""Page directory for 32-bit"""
addr_shift = 22
addr_mask = 0xFFFFF000
type_code = 'I'
num_entries = 1024
supported_flags = INT_FLAGS | FLAG_SZ | FLAG_CD
class PdXd(Pd):
"""Page directory for either PAE or IA-32e"""
addr_shift = 21
addr_mask = 0x7FFFFFFFFFFFF000
num_entries = 512
type_code = 'Q'
class Pt(MMUTable):
"""Page table for 32-bit"""
addr_shift = 12
addr_mask = 0xFFFFF000
type_code = 'I'
num_entries = 1024
supported_flags = (FLAG_P | FLAG_RW | FLAG_US | FLAG_G | FLAG_CD | FLAG_D |
FLAG_IGNORED0 | FLAG_IGNORED1)
supported_flags = (
FLAG_P | FLAG_RW | FLAG_US | FLAG_G | FLAG_CD | FLAG_D | FLAG_IGNORED0 | FLAG_IGNORED1
)
class PtXd(Pt):
"""Page table for either PAE or IA-32e"""
addr_mask = 0x07FFFFFFFFFFF000
type_code = 'Q'
num_entries = 512
supported_flags = (FLAG_P | FLAG_RW | FLAG_US | FLAG_G | FLAG_XD | FLAG_CD |
FLAG_D | FLAG_IGNORED0 | FLAG_IGNORED1 | FLAG_IGNORED2)
supported_flags = (
FLAG_P
| FLAG_RW
| FLAG_US
| FLAG_G
| FLAG_XD
| FLAG_CD
| FLAG_D
| FLAG_IGNORED0
| FLAG_IGNORED1
| FLAG_IGNORED2
)
class PtableSet():
class PtableSet:
"""Represents a complete set of page tables for any paging mode"""
def __init__(self, pages_start):
@@ -345,8 +372,7 @@ class PtableSet():
self.toplevel = self.levels[0]()
self.page_pos = pages_start
debug("%s starting at physical address 0x%x" %
(self.__class__.__name__, self.page_pos))
debug(f"{self.__class__.__name__:s} starting at physical address 0x{self.page_pos:x}")
# Database of page table pages. Maps physical memory address to
# MMUTable objects, excluding the top-level table which is tracked
@@ -408,8 +434,7 @@ class PtableSet():
"""Create a new child table"""
new_table_addr = self.get_new_mmutable_addr()
new_table = self.levels[depth]()
debug("new %s at physical addr 0x%x"
% (self.levels[depth].__name__, new_table_addr))
debug(f"new {self.levels[depth].__name__:s} at physical addr 0x{new_table_addr:x}")
self.tables[new_table_addr] = new_table
table.map(virt_addr, new_table_addr, INT_FLAGS)
@@ -436,8 +461,7 @@ class PtableSet():
def reserve(self, virt_base, size, to_level=PT_LEVEL):
"""Reserve page table space with already aligned virt_base and size"""
debug("Reserving paging structures for 0x%x (0x%x)" %
(virt_base, size))
debug(f"Reserving paging structures for 0x{virt_base:x} (0x{size:x})")
align_check(virt_base, size)
@@ -445,8 +469,9 @@ class PtableSet():
scope = 1 << self.levels[PD_LEVEL].addr_shift
if virt_base % scope != 0:
error("misaligned virtual address space, 0x%x not a multiple of 0x%x" %
(virt_base, scope))
error(
f"misaligned virtual address space, 0x{virt_base:x} not a multiple of 0x{scope:x}"
)
for addr in range(virt_base, virt_base + size, scope):
self.map_page(addr, 0, 0, True, to_level)
@@ -473,8 +498,7 @@ class PtableSet():
scope = 1 << self.levels[level].addr_shift
debug("Mapping 0x%x (0x%x) to 0x%x: %s" %
(phys_base, size, virt_base, dump_flags(flags)))
debug(f"Mapping 0x{phys_base:x} (0x{size:x}) to 0x{virt_base:x}: {dump_flags(flags):s}")
align_check(phys_base, size, scope)
align_check(virt_base, size, scope)
@@ -537,8 +561,7 @@ class PtableSet():
if size == 0:
return
debug("change flags for %s at 0x%x (0x%x): %s" %
(name, base, size, dump_flags(flags)))
debug(f"change flags for {name:s} at 0x{base:x} (0x{size:x}): {dump_flags(flags):s}")
num_levels = len(self.levels) + level + 1
scope = 1 << self.levels[level].addr_shift
@@ -556,8 +579,7 @@ class PtableSet():
table = self.tables[table.lookup(addr)]
table.set_perms(addr, flags)
except KeyError:
error("no mapping for %s region 0x%x (size 0x%x)" %
(name, base, size))
error(f"no mapping for {name:s} region 0x{base:x} (size 0x{size:x})")
def write_output(self, filename):
"""Write the page tables to the output file in binary format"""
@@ -574,26 +596,33 @@ class PtableSet():
# in PAE, the top-level PDPT has only 4 entries and is not a
# full page in size. We do not put it in the tables dictionary
# and treat it as a special case.
debug("top-level %s at physical addr 0x%x" %
(self.toplevel.__class__.__name__,
self.get_new_mmutable_addr()))
debug(
f"top-level {self.toplevel.__class__.__name__:s} at "
f"physical addr 0x{self.get_new_mmutable_addr():x}"
)
top_level_bin = self.toplevel.get_binary()
output_fp.write(top_level_bin)
written_size += len(top_level_bin)
return written_size
# Paging mode classes, we'll use one depending on configuration
class Ptables32bit(PtableSet):
"""32-bit Page Tables"""
levels = [Pd, Pt]
class PtablesPAE(PtableSet):
"""PAE Page Tables"""
levels = [PdptPAE, PdXd, PtXd]
class PtablesIA32e(PtableSet):
"""Page Tables under IA32e mode"""
levels = [Pml4, Pdpt, PdXd, PtXd]
@@ -603,14 +632,16 @@ def parse_args():
parser = argparse.ArgumentParser(
description=__doc__,
formatter_class=argparse.RawDescriptionHelpFormatter, allow_abbrev=False)
formatter_class=argparse.RawDescriptionHelpFormatter,
allow_abbrev=False,
)
parser.add_argument("-k", "--kernel", required=True,
help="path to prebuilt kernel ELF binary")
parser.add_argument("-o", "--output", required=True,
help="output file")
parser.add_argument("--map", action='append',
help=textwrap.dedent('''\
parser.add_argument("-k", "--kernel", required=True, help="path to prebuilt kernel ELF binary")
parser.add_argument("-o", "--output", required=True, help="output file")
parser.add_argument(
"--map",
action='append',
help=textwrap.dedent('''\
Map extra memory:
<physical address>,<size>[,<flags:LUWXD>[,<virtual address>]]
where flags can be empty or combination of:
@@ -624,9 +655,9 @@ def parse_args():
supervisor only,
read only,
and execution disabled.
'''))
parser.add_argument("-v", "--verbose", action="count",
help="Print extra debugging information")
'''),
)
parser.add_argument("-v", "--verbose", action="count", help="Print extra debugging information")
args = parser.parse_args()
if "VERBOSE" in os.environ:
args.verbose = 1
@@ -636,11 +667,11 @@ def get_symbols(elf_obj):
"""Get all symbols from the ELF file"""
for section in elf_obj.iter_sections():
if isinstance(section, SymbolTableSection):
return {sym.name: sym.entry.st_value
for sym in section.iter_symbols()}
return {sym.name: sym.entry.st_value for sym in section.iter_symbols()}
raise LookupError("Could not find symbol table")
def isdef(sym_name):
"""True if symbol is defined in ELF file"""
return sym_name in syms
@@ -666,13 +697,13 @@ def map_extra_regions(pt):
elements = entry.split(',')
if len(elements) < 2:
error("Not enough arguments for --map %s" % entry)
error(f"Not enough arguments for --map {entry:s}")
one_map = {}
one_map['cmdline'] = entry
one_map['phys'] = int(elements[0], 0)
one_map['size']= int(elements[1], 0)
one_map['size'] = int(elements[1], 0)
one_map['large_page'] = False
flags = FLAG_P | ENTRY_XD
@@ -681,7 +712,7 @@ def map_extra_regions(pt):
# Check for allowed flags
if not bool(re.match('^[LUWXD]*$', map_flags)):
error("Unrecognized flags: %s" % map_flags)
error(f"Unrecognized flags: {map_flags:s}")
flags = FLAG_P | ENTRY_XD
if 'W' in map_flags:
@@ -691,7 +722,7 @@ def map_extra_regions(pt):
if 'U' in map_flags:
flags |= ENTRY_US
if 'L' in map_flags:
flags |= FLAG_SZ
flags |= FLAG_SZ
one_map['large_page'] = True
if 'D' in map_flags:
flags |= FLAG_CD
@@ -716,8 +747,9 @@ def map_extra_regions(pt):
# Check if addresses have already been mapped.
# Error out if so as they could override kernel mappings.
if pt.is_region_mapped(virt, size, level):
error(("Region 0x%x (%d) already been mapped "
"for --map %s" % (virt, size, one_map['cmdline'])))
error(
f"Region 0x{virt:x} ({size:d}) already been mapped for --map {one_map['cmdline']:x}"
)
# Reserve space in page table, and map the region
pt.reserve_unaligned(virt, size, level)
@@ -746,7 +778,7 @@ def main():
else:
pclass = Ptables32bit
debug("building %s" % pclass.__name__)
debug(f"building {pclass.__name__:s}")
vm_base = syms["CONFIG_KERNEL_VM_BASE"]
vm_size = syms["CONFIG_KERNEL_VM_SIZE"]
@@ -778,15 +810,17 @@ def main():
ptables_phys = syms["z_x86_pagetables_start"] + virt_to_phys_offset
debug("Address space: 0x%x - 0x%x size 0x%x" %
(vm_base, vm_base + vm_size - 1, vm_size))
debug(f"Address space: 0x{vm_base:x} - 0x{vm_base + vm_size - 1:x} size 0x{vm_size:x}")
debug("Zephyr image: 0x%x - 0x%x size 0x%x" %
(image_base, image_base + image_size - 1, image_size))
debug(
f"Zephyr image: 0x{image_base:x} - 0x{image_base + image_size - 1:x} size 0x{image_size:x}"
)
if virt_to_phys_offset != 0:
debug("Physical address space: 0x%x - 0x%x size 0x%x" %
(sram_base, sram_base + sram_size - 1, sram_size))
debug(
f"Physical address space: 0x{sram_base:x} - 0x{sram_base + sram_size - 1:x} "
f"size 0x{sram_size:x}"
)
is_perm_regions = isdef("CONFIG_SRAM_REGION_PERMISSIONS")
@@ -794,7 +828,7 @@ def main():
is_generic_section_present = isdef("CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT")
if image_size >= vm_size:
error("VM size is too small (have 0x%x need more than 0x%x)" % (vm_size, image_size))
error(f"VM size is too small (have 0x{vm_size:x} need more than 0x{image_size:x})")
map_flags = 0
@@ -827,22 +861,26 @@ def main():
# Note that this only does the identity mapping
# at the page directory level to minimize wasted space.
pt.reserve_unaligned(image_base_phys, image_size, to_level=PD_LEVEL)
pt.identity_map_unaligned(image_base_phys, image_size,
FLAG_P | FLAG_RW | FLAG_SZ, level=PD_LEVEL)
pt.identity_map_unaligned(
image_base_phys, image_size, FLAG_P | FLAG_RW | FLAG_SZ, level=PD_LEVEL
)
if isdef("CONFIG_X86_64"):
# 64-bit has a special region in the first 64K to bootstrap other CPUs
# from real mode
locore_base = syms["_locore_start"]
locore_size = syms["_lodata_end"] - locore_base
debug("Base addresses: physical 0x%x size 0x%x" % (locore_base,
locore_size))
debug(f"Base addresses: physical 0x{locore_base:x} size 0x{locore_size:x}")
pt.map(locore_base, None, locore_size, map_flags | FLAG_P | ENTRY_RW)
if isdef("CONFIG_XIP"):
# Additionally identity-map all ROM as read-only
pt.map(syms["CONFIG_FLASH_BASE_ADDRESS"], None,
syms["CONFIG_FLASH_SIZE"] * 1024, map_flags | FLAG_P)
pt.map(
syms["CONFIG_FLASH_BASE_ADDRESS"],
None,
syms["CONFIG_FLASH_SIZE"] * 1024,
map_flags | FLAG_P,
)
if isdef("CONFIG_LINKER_USE_BOOT_SECTION"):
pt.map_region("lnkr_boot", map_flags | FLAG_P | ENTRY_RW, virt_to_phys_offset)
@@ -893,8 +931,7 @@ def main():
if isdef("CONFIG_COVERAGE_GCOV") and isdef("CONFIG_USERSPACE"):
# If GCOV is enabled, user mode must be able to write to its
# common data area
pt.set_region_perms("__gcov_bss",
FLAG_P | ENTRY_RW | ENTRY_US | ENTRY_XD)
pt.set_region_perms("__gcov_bss", FLAG_P | ENTRY_RW | ENTRY_US | ENTRY_XD)
if isdef("CONFIG_X86_64"):
# Set appropriate permissions for locore areas much like we did
@@ -917,7 +954,7 @@ def main():
pt.set_region_perms("__x86shadowstack", FLAG_P | FLAG_D | ENTRY_XD)
written_size = pt.write_output(args.output)
debug("Written %d bytes to %s" % (written_size, args.output))
debug(f"Written {written_size:d} bytes to {args.output:s}")
# Warn if reserved page table is not of correct size
if reserved_pt_size and written_size != reserved_pt_size:
@@ -935,9 +972,10 @@ def main():
reason = "big" if reserved_pt_size > written_size else "small"
error(("Reserved space for page table is too %s."
" Set CONFIG_X86_EXTRA_PAGE_TABLE_PAGES=%d") %
(reason, extra_pages_needed))
error(
f"Reserved space for page table is too {reason:s}."
f" Set CONFIG_X86_EXTRA_PAGE_TABLE_PAGES={extra_pages_needed:d}"
)
if __name__ == "__main__":

View File

@@ -11,8 +11,8 @@
* This file contains private kernel structures definitions and various
* other definitions for the Intel Architecture 32 bit (IA-32) processor
* architecture.
* The header include/kernel.h contains the public kernel interface
* definitions, with include/arch/x86/ia32/arch.h supplying the
* The header include/zephyr/kernel.h contains the public kernel interface
* definitions, with include/zephyr/arch/x86/ia32/arch.h supplying the
* IA-32 specific portions of the public kernel interface.
*
* This file is also included by assembly language files which must #define

View File

@@ -44,32 +44,6 @@ config XTENSA_SMALL_VECTOR_TABLE_ENTRY
handlers to the end of vector table, renaming them to
_Level\LVL\()VectorHelper.
config XTENSA_RPO_CACHE
bool "Cached/uncached RPO mapping"
help
Support Cached/uncached RPO mapping.
A design trick on multi-core hardware is to map memory twice
so that it can be seen in both (incoherent) cached mappings
and a coherent "shared" area.
if XTENSA_RPO_CACHE
config XTENSA_CACHED_REGION
int "Cached RPO mapping"
range 0 7
help
This specifies which 512M region (0-7, as defined by the Xtensa
Region Protection Option) contains the "cached" mapping.
config XTENSA_UNCACHED_REGION
int "Uncached RPO mapping"
range 0 7
help
As for XTENSA_CACHED_REGION, this specifies which 512M
region (0-7) contains the "uncached" mapping.
endif
config XTENSA_CCOUNT_HZ
int "CCOUNT cycle rate"
default 1000000
@@ -194,13 +168,27 @@ config XTENSA_MMU
bool "Xtensa MMU Support"
select MMU
select ARCH_MEM_DOMAIN_SYNCHRONOUS_API if USERSPACE
select KERNEL_VM_USE_CUSTOM_MEM_RANGE_CHECK if XTENSA_RPO_CACHE
select CURRENT_THREAD_USE_NO_TLS if USERSPACE
help
Enable support for Xtensa Memory Management Unit.
if XTENSA_MMU
config XTENSA_MMU_USE_DEFAULT_MAPPINGS
bool "Use architecture default MMU mappings"
default y
help
If enabled, the MMU will be initialized with a few default
MMU mappings covering text, data, BSS, rodata, etc. which
should provide a reasonable default. See mmu_zephyr_ranges[]
for details.
If disabled, the SoC must provide all the necessary mappings
via xtensa_soc_mmu_ranges[]. This allows SoC to have more
fine control over the mappings.
If unsure, just say Y.
choice
prompt "PageTable virtual address"
default XTENSA_MMU_PTEVADDR_20000000
@@ -241,12 +229,6 @@ config XTENSA_MMU_NUM_L2_TABLES
help
Each table can address up to 4MB memory address.
config XTENSA_MMU_DOUBLE_MAP
bool "Map memory in cached and uncached region"
help
This option specifies that the memory is mapped in two
distinct region, cached and uncached.
config PRIVILEGED_STACK_SIZE
# Must be multiple of CONFIG_MMU_PAGE_SIZE
default 4096
@@ -258,6 +240,12 @@ config XTENSA_MMU_FLUSH_AUTOREFILL_DTLBS_ON_SWAP
This flushes (invalidates) all auto-refill data TLBs when page
tables are swapped.
config XTENSA_MMU_PAGE_TABLE_STATS
bool "Page table statistics"
help
Enable this for page table statistics, including current usage and
maximum number of page tables used.
endif # XTENSA_MMU
endif # CPU_HAS_MMU

View File

@@ -30,19 +30,9 @@
#if __XTENSA_CALL0_ABI__
# define CALL call0
# define CALLX callx0
# define ARG1 a2 /* 1st outgoing call argument */
# define ARG2 a3 /* 2nd outgoing call argument */
# define ARG3 a4 /* 3rd outgoing call argument */
# define ARG4 a5 /* 4th outgoing call argument */
# define ARG5 a6 /* 5th outgoing call argument */
#else
# define CALL call4
# define CALLX callx4
# define ARG1 a6 /* 1st outgoing call argument */
# define ARG2 a7 /* 2nd outgoing call argument */
# define ARG3 a8 /* 3rd outgoing call argument */
# define ARG4 a9 /* 4th outgoing call argument */
# define ARG5 a10 /* 5th outgoing call argument */
#endif
.text

View File

@@ -85,6 +85,9 @@ FUNC_NORETURN void z_prep_c(void)
#if CONFIG_ARCH_CACHE
arch_cache_init();
#endif
#if CONFIG_SOC_CACHE
soc_cache_init();
#endif
#ifdef CONFIG_XTENSA_MMU
xtensa_mmu_init();

File diff suppressed because it is too large Load Diff

View File

@@ -28,12 +28,6 @@
/** Mask for PPN in PTE */
#define XTENSA_MMU_PTE_PPN_MASK 0xFFFFF000U
/** Mask for attributes in PTE */
#define XTENSA_MMU_PTE_ATTR_MASK 0x0000000FU
/** Mask for cache mode in PTE */
#define XTENSA_MMU_PTE_ATTR_CACHED_MASK 0x0000000CU
/** Mask used to figure out which L1 page table to use */
#define XTENSA_MMU_L1_MASK 0x3FF00000U
@@ -45,96 +39,6 @@
/** Number of bits to shift for PPN in PTE */
#define XTENSA_MMU_PTE_PPN_SHIFT 12U
/** Mask for ring in PTE */
#define XTENSA_MMU_PTE_RING_MASK 0x00000030U
/** Number of bits to shift for ring in PTE */
#define XTENSA_MMU_PTE_RING_SHIFT 4U
/** Number of bits to shift for SW reserved ared in PTE */
#define XTENSA_MMU_PTE_SW_SHIFT 6U
/** Mask for SW bits in PTE */
#define XTENSA_MMU_PTE_SW_MASK 0x00000FC0U
/**
* Number of bits to shift for backup attributes in PTE SW field.
*
* This is relative to the SW field, not the PTE entry.
*/
#define XTENSA_MMU_PTE_SW_ATTR_SHIFT 0U
/**
* Mask for backup attributes in PTE SW field.
*
* This is relative to the SW field, not the PTE entry.
*/
#define XTENSA_MMU_PTE_SW_ATTR_MASK 0x0000000FU
/**
* Number of bits to shift for backup ring value in PTE SW field.
*
* This is relative to the SW field, not the PTE entry.
*/
#define XTENSA_MMU_PTE_SW_RING_SHIFT 4U
/**
* Mask for backup ring value in PTE SW field.
*
* This is relative to the SW field, not the PTE entry.
*/
#define XTENSA_MMU_PTE_SW_RING_MASK 0x00000030U
/** Construct a page table entry (PTE) */
#define XTENSA_MMU_PTE(paddr, ring, sw, attr) \
(((paddr) & XTENSA_MMU_PTE_PPN_MASK) | \
(((ring) << XTENSA_MMU_PTE_RING_SHIFT) & XTENSA_MMU_PTE_RING_MASK) | \
(((sw) << XTENSA_MMU_PTE_SW_SHIFT) & XTENSA_MMU_PTE_SW_MASK) | \
((attr) & XTENSA_MMU_PTE_ATTR_MASK))
/** Get the attributes from a PTE */
#define XTENSA_MMU_PTE_ATTR_GET(pte) \
((pte) & XTENSA_MMU_PTE_ATTR_MASK)
/** Set the attributes in a PTE */
#define XTENSA_MMU_PTE_ATTR_SET(pte, attr) \
(((pte) & ~XTENSA_MMU_PTE_ATTR_MASK) | (attr & XTENSA_MMU_PTE_ATTR_MASK))
/** Set the SW field in a PTE */
#define XTENSA_MMU_PTE_SW_SET(pte, sw) \
(((pte) & ~XTENSA_MMU_PTE_SW_MASK) | (sw << XTENSA_MMU_PTE_SW_SHIFT))
/** Get the SW field from a PTE */
#define XTENSA_MMU_PTE_SW_GET(pte) \
(((pte) & XTENSA_MMU_PTE_SW_MASK) >> XTENSA_MMU_PTE_SW_SHIFT)
/** Construct a PTE SW field to be used for backing up PTE ring and attributes. */
#define XTENSA_MMU_PTE_SW(ring, attr) \
((((ring) << XTENSA_MMU_PTE_SW_RING_SHIFT) & XTENSA_MMU_PTE_SW_RING_MASK) | \
(((attr) << XTENSA_MMU_PTE_SW_ATTR_SHIFT) & XTENSA_MMU_PTE_SW_ATTR_MASK))
/** Get the backed up attributes from the PTE SW field. */
#define XTENSA_MMU_PTE_SW_ATTR_GET(sw) \
(((sw) & XTENSA_MMU_PTE_SW_ATTR_MASK) >> XTENSA_MMU_PTE_SW_ATTR_SHIFT)
/** Get the backed up ring value from the PTE SW field. */
#define XTENSA_MMU_PTE_SW_RING_GET(sw) \
(((sw) & XTENSA_MMU_PTE_SW_RING_MASK) >> XTENSA_MMU_PTE_SW_RING_SHIFT)
/** Set the ring in a PTE */
#define XTENSA_MMU_PTE_RING_SET(pte, ring) \
(((pte) & ~XTENSA_MMU_PTE_RING_MASK) | \
((ring) << XTENSA_MMU_PTE_RING_SHIFT))
/** Get the ring from a PTE */
#define XTENSA_MMU_PTE_RING_GET(pte) \
(((pte) & XTENSA_MMU_PTE_RING_MASK) >> XTENSA_MMU_PTE_RING_SHIFT)
/** Get the ASID from the RASID register corresponding to the ring in a PTE */
#define XTENSA_MMU_PTE_ASID_GET(pte, rasid) \
(((rasid) >> ((((pte) & XTENSA_MMU_PTE_RING_MASK) \
>> XTENSA_MMU_PTE_RING_SHIFT) * 8)) & 0xFF)
/** Calculate the L2 page table position from a virtual address */
#define XTENSA_MMU_L2_POS(vaddr) \
(((vaddr) & XTENSA_MMU_L2_MASK) >> 12U)
@@ -164,15 +68,6 @@
/** Fixed data TLB way to map the vecbase */
#define XTENSA_MMU_VECBASE_WAY 8
/** Kernel specific ASID. Ring field in the PTE */
#define XTENSA_MMU_KERNEL_RING 0
/** User specific ASID. Ring field in the PTE */
#define XTENSA_MMU_USER_RING 2
/** Ring value for MMU_SHARED_ASID */
#define XTENSA_MMU_SHARED_RING 3
/** Number of data TLB ways [0-9] */
#define XTENSA_MMU_NUM_DTLB_WAYS 10
@@ -182,19 +77,6 @@
/** Number of auto-refill ways */
#define XTENSA_MMU_NUM_TLB_AUTOREFILL_WAYS 4
/** Attribute indicating PTE is illegal. */
#define XTENSA_MMU_PTE_ATTR_ILLEGAL (BIT(3) | BIT(2))
/** Illegal PTE entry for Level 1 page tables */
#define XTENSA_MMU_PTE_L1_ILLEGAL XTENSA_MMU_PTE_ATTR_ILLEGAL
/** Illegal PTE entry for Level 2 page tables */
#define XTENSA_MMU_PTE_L2_ILLEGAL \
XTENSA_MMU_PTE(0, XTENSA_MMU_KERNEL_RING, \
XTENSA_MMU_PTE_SW(XTENSA_MMU_KERNEL_RING, \
XTENSA_MMU_PTE_ATTR_ILLEGAL), \
XTENSA_MMU_PTE_ATTR_ILLEGAL)
/**
* PITLB HIT bit.
*

View File

@@ -5,7 +5,7 @@
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32c3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32c3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32c3-gpio-sigmap.h>
&pinctrl {

View File

@@ -18,7 +18,7 @@
zephyr,shell-uart = &uart7;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,ccm = &ccm0;
zephyr,dtcm = &ccm0;
};
leds {

View File

@@ -1,6 +1,8 @@
source [find interface/stlink.cfg]
transport select hla_swd
source [find interface/stlink-dap.cfg]
transport select dapdirect_swd
# If your ST-Link adapter embedded firmware dates prior version v2j24
# DAP transport/intereface is not supported. In this case, refer to
# https://docs.zephyrproject.org/latest/develop/flash_debug/probes.html#OpenOCD-deprecates-hla-st-link-interface
set WORKAREASIZE 0x2000

View File

@@ -5,14 +5,14 @@
if(EXISTS ${BOARD_DIR}/CMakeLists.txt)
if(USING_OUT_OF_TREE_BOARD)
set(build_dir boards/${ARCH}/${BOARD})
set(build_dir boards/${ARCH}/${BOARD})
else()
unset(build_dir)
unset(build_dir)
# FIXME: SHADOW_VARS: Remove this once we have enabled -Wshadow globally.
#
# For now, only enable warning for shadow variables for in-tree boards.
add_compile_options($<TARGET_PROPERTY:compiler,warning_shadow_variables>)
# FIXME: SHADOW_VARS: Remove this once we have enabled -Wshadow globally.
#
# For now, only enable warning for shadow variables for in-tree boards.
add_compile_options($<TARGET_PROPERTY:compiler,warning_shadow_variables>)
endif()
add_subdirectory(${BOARD_DIR} ${build_dir})

View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include "actinius_icarus_som_dk_common-pinctrl.dtsi"
#include <dt-bindings/led/led.h>
#include <zephyr/dt-bindings/led/led.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {

View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
&pinctrl {
uart0_default: uart0_default {

View File

@@ -9,7 +9,7 @@
/dts-v1/;
#include <raspberrypi/rpi_pico/rp2040.dtsi>
#include <dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/led/led.h>
#include "adafruit_feather_adalogger_rp2040-pinctrl.dtsi"

View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
&pinctrl {
uart0_default: uart0_default {

View File

@@ -9,7 +9,7 @@
/dts-v1/;
#include <raspberrypi/rpi_pico/rp2040.dtsi>
#include <dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/led/led.h>
#include "adafruit_feather_canbus_rp2040-pinctrl.dtsi"

View File

@@ -5,7 +5,7 @@
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h>
&pinctrl {

View File

@@ -5,7 +5,7 @@
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32s2-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s2-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s2-gpio-sigmap.h>
&pinctrl {

View File

@@ -11,8 +11,8 @@
#include "adafruit_feather_esp32s2-pinctrl.dtsi"
#include <espressif/partitions_0x1000_default.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <dt-bindings/led/led.h>
#include <dt-bindings/led/worldsemi_ws2812c.h>
#include <zephyr/dt-bindings/led/led.h>
#include <zephyr/dt-bindings/led/worldsemi_ws2812c.h>
#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
/ {

View File

@@ -6,7 +6,7 @@
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
&pinctrl {

View File

@@ -6,7 +6,7 @@
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
&pinctrl {

View File

@@ -7,7 +7,7 @@
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
&pinctrl {

View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
&pinctrl {
uart0_default: uart0_default {

View File

@@ -9,7 +9,7 @@
/dts-v1/;
#include <raspberrypi/rpi_pico/rp2040.dtsi>
#include <dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/led/led.h>
#include "adafruit_feather_rfm95_rp2040-pinctrl.dtsi"
@@ -65,7 +65,7 @@
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 3 0>, /* SCL */
<1 0 &gpio0 2 0>; /* SDA */
<1 0 &gpio0 2 0>; /* SDA */
};
};
@@ -125,11 +125,11 @@ zephyr_i2c: &i2c1 {
compatible = "semtech,sx1276";
reset-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
dio-gpios = <&gpio0 21 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>, /* SX1276 DIO0 */
<&gpio0 22 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>, /* SX1276 DIO1 */
<&gpio0 23 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>, /* SX1276 DIO2 */
<&gpio0 19 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>, /* SX1276 DIO3 */
<&gpio0 20 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>, /* SX1276 DIO4 */
<&gpio0 18 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>; /* SX1276 DIO5 */
<&gpio0 22 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>, /* SX1276 DIO1 */
<&gpio0 23 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>, /* SX1276 DIO2 */
<&gpio0 19 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>, /* SX1276 DIO3 */
<&gpio0 20 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>, /* SX1276 DIO4 */
<&gpio0 18 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>; /* SX1276 DIO5 */
spi-max-frequency = <10000000>;
power-amplifier-output = "pa-boost";
};
@@ -198,8 +198,8 @@ zephyr_i2c: &i2c1 {
gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
chain-length = <1>;
color-mapping = <LED_COLOR_ID_GREEN
LED_COLOR_ID_RED
LED_COLOR_ID_BLUE>;
LED_COLOR_ID_RED
LED_COLOR_ID_BLUE>;
reset-delay = <280>;
frequency = <800000>;
};

View File

@@ -11,29 +11,31 @@
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 26 0>, /* A0 */
<1 0 &gpio0 27 0>, /* A1 */
<2 0 &gpio0 28 0>, /* A2 */
<3 0 &gpio0 29 0>, /* A3 */
<4 0 &gpio0 24 0>, /* D24 */
<5 0 &gpio0 25 0>, /* D25 */
<6 0 &gpio0 14 0>, /* SCK */
<7 0 &gpio0 15 0>, /* MOSI */
<8 0 &gpio0 8 0>, /* MISO */
<9 0 &gpio0 1 0>, /* RX */
<10 0 &gpio0 0 0>, /* TX */
/* GND */
<12 0 &gpio0 2 0>, /* SDA */
<13 0 &gpio0 3 0>, /* SCL */
<14 0 &gpio0 5 0>, /* D5 */
<15 0 &gpio0 6 0>, /* D6 */
<16 0 &gpio0 9 0>, /* D9 */
<17 0 &gpio0 10 0>, /* D10 */
<18 0 &gpio0 11 0>, /* D11 */
<19 0 &gpio0 12 0>, /* D12 */
<20 0 &gpio0 13 0>; /* D13 */
<1 0 &gpio0 27 0>, /* A1 */
<2 0 &gpio0 28 0>, /* A2 */
<3 0 &gpio0 29 0>, /* A3 */
<4 0 &gpio0 24 0>, /* D24 */
<5 0 &gpio0 25 0>, /* D25 */
<6 0 &gpio0 14 0>, /* SCK */
<7 0 &gpio0 15 0>, /* MOSI */
<8 0 &gpio0 8 0>, /* MISO */
<9 0 &gpio0 1 0>, /* RX */
<10 0 &gpio0 0 0>, /* TX */
/* GND */
<12 0 &gpio0 2 0>, /* SDA */
<13 0 &gpio0 3 0>, /* SCL */
<14 0 &gpio0 5 0>, /* D5 */
<15 0 &gpio0 6 0>, /* D6 */
<16 0 &gpio0 9 0>, /* D9 */
<17 0 &gpio0 10 0>, /* D10 */
<18 0 &gpio0 11 0>, /* D11 */
<19 0 &gpio0 12 0>, /* D12 */
<20 0 &gpio0 13 0>; /* D13 */
};
};
feather_serial: &uart0 {};
feather_i2c: &i2c1 {};
feather_spi: &spi1 {};

View File

@@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
&pinctrl {
uart0_default: uart0_default {

View File

@@ -18,7 +18,7 @@
zephyr,shell-uart = &usart3;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,ccm = &ccm0;
zephyr,dtcm = &ccm0;
};
leds {

View File

@@ -1,6 +1,8 @@
source [find interface/stlink.cfg]
transport select hla_swd
source [find interface/stlink-dap.cfg]
transport select dapdirect_swd
# If your ST-Link adapter embedded firmware dates prior version v2j24
# DAP transport/intereface is not supported. In this case, refer to
# https://docs.zephyrproject.org/latest/develop/flash_debug/probes.html#OpenOCD-deprecates-hla-st-link-interface
source [find target/stm32f4x.cfg]

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